target/linux/brcm63xx/patches-2.6.25/001-bcm963xx.patch

   1 From 2b2b8e163d28646cbbfde81c900fbb57d6572a11 Mon Sep 17 00:00:00 2001
   2 From: Axel Gembe <ago@bastart.eu.org>
   3 Date: Thu, 15 May 2008 11:00:43 +0200
   4 Subject: [PATCH] bcm963xx: board support
   5
   6
   7 Signed-off-by: Axel Gembe <ago@bastart.eu.org>
   8 ---
   9  arch/mips/Kconfig            |   11 +++++++++++
  10  arch/mips/Makefile           |    4 ++++
  11  arch/mips/kernel/cpu-probe.c |   16 ++++++++++++++++
  12  arch/mips/mm/c-r4k.c         |    7 +++++++
  13  arch/mips/mm/tlbex.c         |    4 ++++
  14  arch/mips/pci/Makefile       |    1 +
  15  include/asm-mips/bootinfo.h  |   12 ++++++++++++
  16  include/asm-mips/cpu.h       |    7 ++++++-
  17  8 files changed, 61 insertions(+), 1 deletions(-)
  18
  19 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
  20 index 8724ed3..1b1c4bf 100644
  21 --- a/arch/mips/Kconfig
  22 +++ b/arch/mips/Kconfig
  23 @@ -59,6 +59,17 @@ config BCM47XX
  24         help
  25          Support for BCM47XX based boards
  26
  27 +config BCM963XX
  28 +       bool "Support for Broadcom BCM963xx SoC"
  29 +       select SYS_SUPPORTS_32BIT_KERNEL
  30 +       select SYS_SUPPORTS_BIG_ENDIAN
  31 +       select SYS_HAS_CPU_MIPS32_R1
  32 +       select HW_HAS_PCI
  33 +       select DMA_NONCOHERENT
  34 +       select IRQ_CPU
  35 +       help
  36 +         This is a fmaily of boards based on the Broadcom MIPS32
  37 +
  38  config MIPS_COBALT
  39         bool "Cobalt Server"
  40         select CEVT_R4K
  41 diff --git a/arch/mips/Makefile b/arch/mips/Makefile
  42 index 1c62381..16a29e1 100644
  43 --- a/arch/mips/Makefile
  44 +++ b/arch/mips/Makefile
  45 @@ -560,6 +560,10 @@ core-$(CONFIG_BCM47XX)             += arch/mips/bcm47xx/
  46  cflags-$(CONFIG_BCM47XX)       += -Iinclude/asm-mips/mach-bcm47xx
  47  load-$(CONFIG_BCM47XX)         := 0xffffffff80001000
  48
  49 +core-$(CONFIG_BCM963XX)                += arch/mips/bcm963xx/
  50 +cflags-$(CONFIG_BCM963XX)      += -Iinclude/asm-mips/mach-bcm963xx
  51 +load-$(CONFIG_BCM963XX)                := 0xffffffff8001000
  52 +
  53  #
  54  # SNI RM
  55  #
  56 diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
  57 index 89c3304..6706a07 100644
  58 --- a/arch/mips/kernel/cpu-probe.c
  59 +++ b/arch/mips/kernel/cpu-probe.c
  60 @@ -803,6 +803,18 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
  61         case PRID_IMP_BCM4710:
  62                 c->cputype = CPU_BCM4710;
  63                 break;
  64 +//     case PRID_IMP_BCM6338:
  65 +//             c->cputype = CPU_BCM6338;
  66 +//             break;
  67 +       case PRID_IMP_BCM6345:
  68 +               c->cputype = CPU_BCM6345;
  69 +               break;
  70 +       case PRID_IMP_BCM6348:
  71 +               c->cputype = CPU_BCM6348;
  72 +               break;
  73 +       case PRID_IMP_BCM6358:
  74 +               c->cputype = CPU_BCM6358;
  75 +               break;
  76         default:
  77                 c->cputype = CPU_UNKNOWN;
  78                 break;
  79 @@ -887,6 +899,10 @@ static __cpuinit const char *cpu_to_name(struct cpuinfo_mips *c)
  80         case CPU_SR71000:       name = "Sandcraft SR71000"; break;
  81         case CPU_BCM3302:       name = "Broadcom BCM3302"; break;
  82         case CPU_BCM4710:       name = "Broadcom BCM4710"; break;
  83 +       case CPU_BCM6338:       name = "Broadcom BCM6338"; break;
  84 +       case CPU_BCM6345:       name = "Broadcom BCM6345"; break;
  85 +       case CPU_BCM6348:       name = "Broadcom BCM6348"; break;
  86 +       case CPU_BCM6358:       name = "Broadcom BCM6358"; break;
  87         case CPU_PR4450:        name = "Philips PR4450"; break;
  88         case CPU_LOONGSON2:     name = "ICT Loongson-2"; break;
  89         default:
  90 diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
  91 index 77aefb4..23a67cb 100644
  92 --- a/arch/mips/mm/c-r4k.c
  93 +++ b/arch/mips/mm/c-r4k.c
  94 @@ -882,6 +882,13 @@ static void __cpuinit probe_pcache(void)
  95                 if (!(config & MIPS_CONF_M))
  96                         panic("Don't know how to probe P-caches on this cpu.");
  97
  98 +               if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348 || c->cputype == CPU_BCM6358)
  99 +               {
 100 +                       printk("bcm963xx: enabling icache and dcache...\n");
 101 +                       /* Enable caches */
 102 +                       write_c0_diag(read_c0_diag() | 0xC0000000);
 103 +               }
 104 +
 105                 /*
 106                  * So we seem to be a MIPS32 or MIPS64 CPU
 107                  * So let's probe the I-cache ...
 108 diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
 109 index 382738c..b3b6120 100644
 110 --- a/arch/mips/mm/tlbex.c
 111 +++ b/arch/mips/mm/tlbex.c
 112 @@ -315,6 +315,10 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
 113         case CPU_25KF:
 114         case CPU_BCM3302:
 115         case CPU_BCM4710:
 116 +//     case CPU_BCM6338:
 117 +       case CPU_BCM6345:
 118 +       case CPU_BCM6348:
 119 +       case CPU_BCM6358:
 120         case CPU_LOONGSON2:
 121                 if (m4kc_tlbp_war())
 122                         uasm_i_nop(p);
 123 diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
 124 index ed0c076..57a1111 100644
 125 --- a/arch/mips/pci/Makefile
 126 +++ b/arch/mips/pci/Makefile
 127 @@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938)        += fixup-tx4938.o ops-tx4938.o
 128  obj-$(CONFIG_VICTOR_MPC30X)    += fixup-mpc30x.o
 129  obj-$(CONFIG_ZAO_CAPCELLA)     += fixup-capcella.o
 130  obj-$(CONFIG_WR_PPMC)          += fixup-wrppmc.o
 131 +obj-$(CONFIG_BCM963XX)         += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
 132 diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
 133 index e031bdf..17b2a37 100644
 134 --- a/include/asm-mips/bootinfo.h
 135 +++ b/include/asm-mips/bootinfo.h
 136 @@ -94,6 +94,18 @@
 137  #define MACH_MSP7120_FPGA       5      /* PMC-Sierra MSP7120 Emulation */
 138  #define MACH_MSP_OTHER        255      /* PMC-Sierra unknown board type */
 139
 140 +#define MACH_WRPPMC             1
 141 +
 142 +/*
 143 + * Valid machtype for group Broadcom
 144 + */
 145 +#define MACH_GROUP_BRCM                23      /* Broadcom */
 146 +#define  MACH_BCM47XX          1       /* Broadcom BCM47XX */
 147 +#define  MACH_BCM96338         2
 148 +#define  MACH_BCM96345         3
 149 +#define  MACH_BCM96348         4
 150 +#define  MACH_BCM96358         5
 151 +
 152  #define CL_SIZE                        COMMAND_LINE_SIZE
 153
 154  extern char *system_type;
 155 diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
 156 index bf5bbc7..e19389a 100644
 157 --- a/include/asm-mips/cpu.h
 158 +++ b/include/asm-mips/cpu.h
 159 @@ -111,6 +111,10 @@
 160
 161  #define PRID_IMP_BCM4710       0x4000
 162  #define PRID_IMP_BCM3302       0x9000
 163 +//#define PRID_IMP_BCM6338        0x9000
 164 +#define PRID_IMP_BCM6345        0x8000
 165 +#define PRID_IMP_BCM6348        0x9100
 166 +#define PRID_IMP_BCM6358        0xA000
 167
 168  /*
 169   * Definitions for 7:0 on legacy processors
 170 @@ -196,7 +200,8 @@ enum cpu_type_enum {
 171          */
 172         CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
 173         CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, CPU_AU1550,
 174 -       CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
 175 +       CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348,
 176 +       CPU_BCM6358,
 177
 178         /*
 179          * MIPS64 class processors
 180 --
 181 1.5.5.1
 182