target/linux/adm5120-2.6/image/lzma-loader/src/board.c

   1 /*
   2  * ADM5120 specific board support for LZMA decompressor
   3  *
   4  * Copyright (C) 2007 OpenWrt.org
   5  * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20  */
  21
  22 #include <stddef.h>
  23
  24 #define READREG(r)      *(volatile unsigned int *)(r)
  25 #define WRITEREG(r,v)   *(volatile unsigned int *)(r) = v
  26
  27 /*
  28  * INTC definitions
  29  */
  30 #define INTC_BASE       0xB2200000
  31
  32 /* INTC registers */
  33 #define INTC_REG_IRQ_DISABLE    0x0C
  34
  35 /*
  36  * UART definitions
  37  */
  38 #define UART_BASE       0xB2600000
  39 /* UART registers */
  40 #define UART_REG_DATA   0x00    /* Data register */
  41 #define UART_REG_ECR    0x04    /* Error Clear register */
  42 #define UART_REG_LCRH   0x08    /* Line Control High register */
  43 #define UART_REG_LCRM   0x0C    /* Line Control Middle register */
  44 #define UART_REG_LCRL   0x10    /* Line Control Low register */
  45 #define UART_REG_CTRL   0x14    /* Control register */
  46 #define UART_REG_FLAG   0x18    /* Flag register */
  47
  48 /* Control register bits */
  49 #define UART_CTRL_EN    ( 1 << 0 )      /* UART enable */
  50
  51 /* Line Control High register bits */
  52 #define UART_LCRH_FEN   ( 1 << 4 )      /* FIFO enable */
  53
  54 /* Flag register bits */
  55 #define UART_FLAG_CTS   ( 1 << 0 )
  56 #define UART_FLAG_DSR   ( 1 << 1 )
  57 #define UART_FLAG_DCD   ( 1 << 2 )
  58 #define UART_FLAG_BUSY  ( 1 << 3 )
  59 #define UART_FLAG_RXFE  ( 1 << 4 )      /* RX FIFO empty */
  60 #define UART_FLAG_TXFF  ( 1 << 5 )      /* TX FIFO full */
  61 #define UART_FLAG_RXFF  ( 1 << 6 )      /* RX FIFO full */
  62 #define UART_FLAG_TXFE  ( 1 << 7 )      /* TX FIFO empty */
  63
  64 /*
  65  * SWITCH definitions
  66  */
  67 #define SWITCH_BASE     0xB2000000
  68
  69 #define SWITCH_REG_CPUP_CONF    0x0024
  70 #define SWITCH_REG_PORT_CONF0   0x0028
  71
  72 #define SWITCH_REG_GPIO_CONF0   0x00B8
  73 #define SWITCH_REG_GPIO_CONF2   0x00BC
  74
  75 #define SWITCH_REG_PORT0_LED    0x0100
  76 #define SWITCH_REG_PORT1_LED    0x0104
  77 #define SWITCH_REG_PORT2_LED    0x0108
  78 #define SWITCH_REG_PORT3_LED    0x010C
  79 #define SWITCH_REG_PORT4_LED    0x0110
  80
  81 #define SWITCH_PORTS_HW         0x3F            /* Hardware Ports */
  82
  83 /* CPUP_CONF register bits */
  84 #define CPUP_CONF_DCPUP         ( 1 << 0 )      /* Disable CPU port */
  85
  86 /* PORT_CONF0 register bits */
  87 #define PORT_CONF0_DP_SHIFT     0       /* disable port shift*/
  88
  89
  90 /*
  91  * UART routines
  92  */
  93
  94 #define UART_READ(r)    READREG(UART_BASE+(r))
  95 #define UART_WRITE(r,v) WRITEREG(UART_BASE+(r),(v))
  96
  97 static void uart_init(void)
  98 {
  99         unsigned int t;
 100
 101         /* disable uart */
 102         UART_WRITE(UART_REG_CTRL, 0);
 103
 104         /* keep current baud rate */
 105         t = UART_READ(UART_REG_LCRM);
 106         UART_WRITE(UART_REG_LCRM, t);
 107         t = UART_READ(UART_REG_LCRL);
 108         UART_WRITE(UART_REG_LCRL, t);
 109
 110         /* keep data, stop, and parity bits, but disable FIFO */
 111         t = UART_READ(UART_REG_LCRH);
 112         t &= ~(UART_LCRH_FEN);
 113         UART_WRITE(UART_REG_LCRH, t );
 114
 115         /* clear error bits */
 116         UART_WRITE(UART_REG_ECR, 0xFF);
 117
 118         /* enable uart, and disable interrupts */
 119         UART_WRITE(UART_REG_CTRL, UART_CTRL_EN);
 120 }
 121
 122 static void uart_putc(int ch)
 123 {
 124         while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
 125
 126         UART_WRITE(UART_REG_DATA, ch);
 127
 128         while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFF) != 0);
 129 }
 130
 131 /*
 132  * INTC routines
 133  */
 134
 135 #define INTC_READ(r)    READREG(INTC_BASE+(r))
 136 #define INTC_WRITE(r,v) WRITEREG(INTC_BASE+(r),v)
 137
 138 static void intc_init(void)
 139 {
 140         INTC_WRITE(INTC_REG_IRQ_DISABLE, 0xFFFFFFFF);
 141 }
 142
 143 /*
 144  * SWITCH routines
 145  */
 146
 147 #define SWITCH_READ(r)          READREG(SWITCH_BASE+(r))
 148 #define SWITCH_WRITE(r,v)       WRITEREG(SWITCH_BASE+(r),v)
 149
 150 static void switch_init(void)
 151 {
 152         /* disable PHYS ports */
 153         SWITCH_WRITE(SWITCH_REG_PORT_CONF0,
 154             (SWITCH_PORTS_HW << PORT_CONF0_DP_SHIFT));
 155
 156         /* disable CPU port */
 157         SWITCH_WRITE(SWITCH_REG_CPUP_CONF, CPUP_CONF_DCPUP);
 158
 159         /* disable GPIO lines */
 160         SWITCH_WRITE(SWITCH_REG_GPIO_CONF0, 0);
 161         SWITCH_WRITE(SWITCH_REG_GPIO_CONF2, 0);
 162
 163         /* disable LED lines */
 164         SWITCH_WRITE(SWITCH_REG_PORT0_LED, 0);
 165         SWITCH_WRITE(SWITCH_REG_PORT1_LED, 0);
 166         SWITCH_WRITE(SWITCH_REG_PORT2_LED, 0);
 167         SWITCH_WRITE(SWITCH_REG_PORT3_LED, 0);
 168         SWITCH_WRITE(SWITCH_REG_PORT4_LED, 0);
 169 }
 170
 171 /*
 172  *  routines needed by decompress.c
 173  */
 174 void board_putc(int ch)
 175 {
 176         uart_putc(ch);
 177 }
 178
 179 void board_init(void)
 180 {
 181         intc_init();
 182         switch_init();
 183         uart_init();
 184 }