target/linux/adm5120/files/drivers/usb/host/adm5120-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ahcd fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38
  39 #include <asm/io.h>
  40 #include <asm/irq.h>
  41 #include <asm/system.h>
  42 #include <asm/unaligned.h>
  43 #include <asm/byteorder.h>
  44
  45 #include "../core/hcd.h"
  46 #include "../core/hub.h"
  47
  48 #define DRIVER_VERSION  "v0.10.1"
  49 #define DRIVER_AUTHOR   "Gabor Juhos <juhosg at openwrt.org>"
  50 #define DRIVER_DESC     "ADMtek USB 1.1 Host Controller Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 #undef ADMHC_VERBOSE_DEBUG      /* not always helpful */
  55
  56 /* For initializing controller (mask in an HCFS mode too) */
  57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58
  59 #define ADMHC_INTR_INIT \
  60                 ( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
  61                 | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI )
  62
  63 /*-------------------------------------------------------------------------*/
  64
  65 static const char hcd_name [] = "admhc-hcd";
  66
  67 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  68
  69 #include "adm5120.h"
  70
  71 static void admhc_dump(struct admhcd *ahcd, int verbose);
  72 static int admhc_init(struct admhcd *ahcd);
  73 static void admhc_stop(struct usb_hcd *hcd);
  74
  75 #include "adm5120-dbg.c"
  76 #include "adm5120-mem.c"
  77 #include "adm5120-pm.c"
  78 #include "adm5120-hub.c"
  79 #include "adm5120-q.c"
  80
  81 /*-------------------------------------------------------------------------*/
  82
  83 /*
  84  * queue up an urb for anything except the root hub
  85  */
  86 static int admhc_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
  87         struct urb *urb, gfp_t mem_flags)
  88 {
  89         struct admhcd   *ahcd = hcd_to_admhcd(hcd);
  90         struct ed       *ed;
  91         struct urb_priv *urb_priv;
  92         unsigned int    pipe = urb->pipe;
  93         int             td_cnt = 0;
  94         unsigned long   flags;
  95         int             ret = 0;
  96
  97 #ifdef ADMHC_VERBOSE_DEBUG
  98         spin_lock_irqsave(&ahcd->lock, flags);
  99         urb_print(ahcd, urb, "ENQEUE", usb_pipein(pipe));
 100         spin_unlock_irqrestore(&ahcd->lock, flags);
 101 #endif
 102
 103         /* every endpoint has an ed, locate and maybe (re)initialize it */
 104         ed = ed_get(ahcd, ep, urb->dev, pipe, urb->interval);
 105         if (!ed)
 106                 return -ENOMEM;
 107
 108         /* for the private part of the URB we need the number of TDs */
 109         switch (ed->type) {
 110         case PIPE_CONTROL:
 111                 if (urb->transfer_buffer_length > TD_DATALEN_MAX)
 112                         /* td_submit_urb() doesn't yet handle these */
 113                         return -EMSGSIZE;
 114
 115                 /* 1 TD for setup, 1 for ACK, plus ... */
 116                 td_cnt = 2;
 117                 /* FALLTHROUGH */
 118         case PIPE_BULK:
 119                 /* one TD for every 4096 Bytes (can be upto 8K) */
 120                 td_cnt += urb->transfer_buffer_length / TD_DATALEN_MAX;
 121                 /* ... and for any remaining bytes ... */
 122                 if ((urb->transfer_buffer_length % TD_DATALEN_MAX) != 0)
 123                         td_cnt++;
 124                 /* ... and maybe a zero length packet to wrap it up */
 125                 if (td_cnt == 0)
 126                         td_cnt++;
 127                 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 128                         && (urb->transfer_buffer_length
 129                                 % usb_maxpacket(urb->dev, pipe,
 130                                         usb_pipeout (pipe))) == 0)
 131                         td_cnt++;
 132                 break;
 133         case PIPE_INTERRUPT:
 134                 /*
 135                  * for Interrupt IN/OUT transactions, each ED contains
 136                  * only 1 TD.
 137                  * TODO: check transfer_buffer_length?
 138                  */
 139                 td_cnt = 1;
 140                 break;
 141         case PIPE_ISOCHRONOUS:
 142                 /* number of packets from URB */
 143                 td_cnt = urb->number_of_packets;
 144                 break;
 145         default:
 146                 /* paranoia */
 147                 admhc_err(ahcd, "bad EP type %d", ed->type);
 148                 return -EINVAL;
 149         }
 150
 151         urb_priv = urb_priv_alloc(ahcd, td_cnt, mem_flags);
 152         if (!urb_priv)
 153                 return -ENOMEM;
 154
 155         urb_priv->ed = ed;
 156
 157         spin_lock_irqsave(&ahcd->lock, flags);
 158         /* don't submit to a dead HC */
 159         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 160                 ret = -ENODEV;
 161                 goto fail;
 162         }
 163         if (!HC_IS_RUNNING(hcd->state)) {
 164                 ret = -ENODEV;
 165                 goto fail;
 166         }
 167
 168         /* in case of unlink-during-submit */
 169         spin_lock(&urb->lock);
 170         if (urb->status != -EINPROGRESS) {
 171                 spin_unlock(&urb->lock);
 172                 urb->hcpriv = urb_priv;
 173                 finish_urb(ahcd, urb);
 174                 ret = 0;
 175                 goto fail;
 176         }
 177
 178         /* schedule the ed if needed */
 179         if (ed->state == ED_IDLE) {
 180                 ret = ed_schedule(ahcd, ed);
 181                 if (ret < 0)
 182                         goto fail0;
 183
 184                 if (ed->type == PIPE_ISOCHRONOUS) {
 185                         u16     frame = admhc_frame_no(ahcd);
 186
 187                         /* delay a few frames before the first TD */
 188                         frame += max_t (u16, 8, ed->interval);
 189                         frame &= ~(ed->interval - 1);
 190                         frame |= ed->branch;
 191                         urb->start_frame = frame;
 192
 193                         /* yes, only URB_ISO_ASAP is supported, and
 194                          * urb->start_frame is never used as input.
 195                          */
 196                 }
 197         } else if (ed->type == PIPE_ISOCHRONOUS)
 198                 urb->start_frame = ed->last_iso + ed->interval;
 199
 200         /* fill the TDs and link them to the ed; and
 201          * enable that part of the schedule, if needed
 202          * and update count of queued periodic urbs
 203          */
 204         urb->hcpriv = urb_priv;
 205         td_submit_urb(ahcd, urb);
 206
 207 #ifdef ADMHC_VERBOSE_DEBUG
 208         admhc_dump_ed(ahcd, "admhc_urb_enqueue", urb_priv->ed, 1);
 209 #endif
 210 fail0:
 211         spin_unlock(&urb->lock);
 212 fail:
 213         if (ret)
 214                 urb_priv_free(ahcd, urb_priv);
 215
 216         spin_unlock_irqrestore(&ahcd->lock, flags);
 217         return ret;
 218 }
 219
 220 /*
 221  * decouple the URB from the HC queues (TDs, urb_priv); it's
 222  * already marked using urb->status.  reporting is always done
 223  * asynchronously, and we might be dealing with an urb that's
 224  * partially transferred, or an ED with other urbs being unlinked.
 225  */
 226 static int admhc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
 227 {
 228         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 229         unsigned long flags;
 230
 231         spin_lock_irqsave(&ahcd->lock, flags);
 232
 233 #ifdef ADMHC_VERBOSE_DEBUG
 234         urb_print(ahcd, urb, "DEQUEUE", 1);
 235 #endif
 236
 237         if (HC_IS_RUNNING(hcd->state)) {
 238                 struct urb_priv *urb_priv;
 239
 240                 /* Unless an IRQ completed the unlink while it was being
 241                  * handed to us, flag it for unlink and giveback, and force
 242                  * some upcoming INTR_SF to call finish_unlinks()
 243                  */
 244                 urb_priv = urb->hcpriv;
 245                 if (urb_priv) {
 246                         if (urb_priv->ed->state == ED_OPER)
 247                                 start_ed_unlink(ahcd, urb_priv->ed);
 248                 }
 249         } else {
 250                 /*
 251                  * with HC dead, we won't respect hc queue pointers
 252                  * any more ... just clean up every urb's memory.
 253                  */
 254                 if (urb->hcpriv)
 255                         finish_urb(ahcd, urb);
 256         }
 257         spin_unlock_irqrestore(&ahcd->lock, flags);
 258
 259         return 0;
 260 }
 261
 262 /*-------------------------------------------------------------------------*/
 263
 264 /* frees config/altsetting state for endpoints,
 265  * including ED memory, dummy TD, and bulk/intr data toggle
 266  */
 267
 268 static void admhc_endpoint_disable(struct usb_hcd *hcd,
 269                 struct usb_host_endpoint *ep)
 270 {
 271         struct admhcd           *ahcd = hcd_to_admhcd(hcd);
 272         unsigned long           flags;
 273         struct ed               *ed = ep->hcpriv;
 274         unsigned                limit = 1000;
 275
 276         /* ASSERT:  any requests/urbs are being unlinked */
 277         /* ASSERT:  nobody can be submitting urbs for this any more */
 278
 279         if (!ed)
 280                 return;
 281
 282 #ifdef ADMHC_VERBOSE_DEBUG
 283         spin_lock_irqsave(&ahcd->lock, flags);
 284         admhc_dump_ed(ahcd, "EP-DISABLE", ed, 1);
 285         spin_unlock_irqrestore(&ahcd->lock, flags);
 286 #endif
 287
 288 rescan:
 289         spin_lock_irqsave(&ahcd->lock, flags);
 290
 291         if (!HC_IS_RUNNING(hcd->state)) {
 292 sanitize:
 293                 ed->state = ED_IDLE;
 294                 finish_unlinks(ahcd, 0);
 295         }
 296
 297         switch (ed->state) {
 298         case ED_UNLINK:         /* wait for hw to finish? */
 299                 /* major IRQ delivery trouble loses INTR_SOFI too... */
 300                 if (limit-- == 0) {
 301                         admhc_warn(ahcd, "IRQ INTR_SOFI lossage\n");
 302                         goto sanitize;
 303                 }
 304                 spin_unlock_irqrestore(&ahcd->lock, flags);
 305                 schedule_timeout_uninterruptible(1);
 306                 goto rescan;
 307         case ED_IDLE:           /* fully unlinked */
 308                 if (list_empty(&ed->td_list)) {
 309                         td_free (ahcd, ed->dummy);
 310                         ed_free (ahcd, ed);
 311                         break;
 312                 }
 313                 /* else FALL THROUGH */
 314         default:
 315                 /* caller was supposed to have unlinked any requests;
 316                  * that's not our job.  can't recover; must leak ed.
 317                  */
 318                 admhc_err(ahcd, "leak ed %p (#%02x) state %d%s\n",
 319                         ed, ep->desc.bEndpointAddress, ed->state,
 320                         list_empty(&ed->td_list) ? "" : " (has tds)");
 321                 td_free(ahcd, ed->dummy);
 322                 break;
 323         }
 324
 325         ep->hcpriv = NULL;
 326
 327         spin_unlock_irqrestore(&ahcd->lock, flags);
 328         return;
 329 }
 330
 331 static int admhc_get_frame_number(struct usb_hcd *hcd)
 332 {
 333         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 334
 335         return admhc_frame_no(ahcd);
 336 }
 337
 338 static void admhc_usb_reset(struct admhcd *ahcd)
 339 {
 340 #if 0
 341         ahcd->hc_control = admhc_readl(ahcd, &ahcd->regs->control);
 342         ahcd->hc_control &= OHCI_CTRL_RWC;
 343         admhc_writel(ahcd, ahcd->hc_control, &ahcd->regs->control);
 344 #else
 345         /* FIXME */
 346         ahcd->host_control = ADMHC_BUSS_RESET;
 347         admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control);
 348 #endif
 349 }
 350
 351 /* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
 352  * other cases where the next software may expect clean state from the
 353  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 354  */
 355 static void
 356 admhc_shutdown(struct usb_hcd *hcd)
 357 {
 358         struct admhcd *ahcd;
 359
 360         ahcd = hcd_to_admhcd(hcd);
 361         admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
 362         admhc_dma_disable(ahcd);
 363         admhc_usb_reset(ahcd);
 364         /* flush the writes */
 365         admhc_writel_flush(ahcd);
 366 }
 367
 368 /*-------------------------------------------------------------------------*
 369  * HC functions
 370  *-------------------------------------------------------------------------*/
 371
 372 static void admhc_eds_cleanup(struct admhcd *ahcd)
 373 {
 374         if (ahcd->ed_tails[PIPE_INTERRUPT]) {
 375                 ed_free(ahcd, ahcd->ed_tails[PIPE_INTERRUPT]);
 376                 ahcd->ed_tails[PIPE_INTERRUPT] = NULL;
 377         }
 378
 379         if (ahcd->ed_tails[PIPE_ISOCHRONOUS]) {
 380                 ed_free(ahcd, ahcd->ed_tails[PIPE_ISOCHRONOUS]);
 381                 ahcd->ed_tails[PIPE_ISOCHRONOUS] = NULL;
 382         }
 383
 384         if (ahcd->ed_tails[PIPE_CONTROL]) {
 385                 ed_free(ahcd, ahcd->ed_tails[PIPE_CONTROL]);
 386                 ahcd->ed_tails[PIPE_CONTROL] = NULL;
 387         }
 388
 389         if (ahcd->ed_tails[PIPE_BULK]) {
 390                 ed_free(ahcd, ahcd->ed_tails[PIPE_BULK]);
 391                 ahcd->ed_tails[PIPE_BULK] = NULL;
 392         }
 393
 394         ahcd->ed_head = NULL;
 395 }
 396
 397 #define ED_DUMMY_INFO   (ED_SPEED_FULL | ED_SKIP)
 398
 399 static int admhc_eds_init(struct admhcd *ahcd)
 400 {
 401         struct ed *ed;
 402
 403         ed = ed_create(ahcd, PIPE_INTERRUPT, ED_DUMMY_INFO);
 404         if (!ed)
 405                 goto err;
 406
 407         ahcd->ed_tails[PIPE_INTERRUPT] = ed;
 408
 409         ed = ed_create(ahcd, PIPE_ISOCHRONOUS, ED_DUMMY_INFO);
 410         if (!ed)
 411                 goto err;
 412
 413         ahcd->ed_tails[PIPE_ISOCHRONOUS] = ed;
 414         ed->ed_prev = ahcd->ed_tails[PIPE_INTERRUPT];
 415         ahcd->ed_tails[PIPE_INTERRUPT]->ed_next = ed;
 416         ahcd->ed_tails[PIPE_INTERRUPT]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 417
 418         ed = ed_create(ahcd, PIPE_CONTROL, ED_DUMMY_INFO);
 419         if (!ed)
 420                 goto err;
 421
 422         ahcd->ed_tails[PIPE_CONTROL] = ed;
 423         ed->ed_prev = ahcd->ed_tails[PIPE_ISOCHRONOUS];
 424         ahcd->ed_tails[PIPE_ISOCHRONOUS]->ed_next = ed;
 425         ahcd->ed_tails[PIPE_ISOCHRONOUS]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 426
 427         ed = ed_create(ahcd, PIPE_BULK, ED_DUMMY_INFO);
 428         if (!ed)
 429                 goto err;
 430
 431         ahcd->ed_tails[PIPE_BULK] = ed;
 432         ed->ed_prev = ahcd->ed_tails[PIPE_CONTROL];
 433         ahcd->ed_tails[PIPE_CONTROL]->ed_next = ed;
 434         ahcd->ed_tails[PIPE_CONTROL]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 435
 436         ahcd->ed_head = ahcd->ed_tails[PIPE_INTERRUPT];
 437
 438 #ifdef ADMHC_VERBOSE_DEBUG
 439         admhc_dump_ed(ahcd, "ed intr", ahcd->ed_tails[PIPE_INTERRUPT], 1);
 440         admhc_dump_ed(ahcd, "ed isoc", ahcd->ed_tails[PIPE_ISOCHRONOUS], 1);
 441         admhc_dump_ed(ahcd, "ed ctrl", ahcd->ed_tails[PIPE_CONTROL], 1);
 442         admhc_dump_ed(ahcd, "ed bulk", ahcd->ed_tails[PIPE_BULK], 1);
 443 #endif
 444
 445         return 0;
 446
 447 err:
 448         admhc_eds_cleanup(ahcd);
 449         return -ENOMEM;
 450 }
 451
 452 /* init memory, and kick BIOS/SMM off */
 453
 454 static int admhc_init(struct admhcd *ahcd)
 455 {
 456         struct usb_hcd *hcd = admhcd_to_hcd(ahcd);
 457         int ret;
 458
 459         admhc_disable(ahcd);
 460         ahcd->regs = hcd->regs;
 461
 462         /* Disable HC interrupts */
 463         admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
 464
 465         /* Read the number of ports unless overridden */
 466         if (ahcd->num_ports == 0)
 467                 ahcd->num_ports = admhc_read_rhdesc(ahcd) & ADMHC_RH_NUMP;
 468
 469         ret = admhc_mem_init(ahcd);
 470         if (ret)
 471                 goto err;
 472
 473         /* init dummy endpoints */
 474         ret = admhc_eds_init(ahcd);
 475         if (ret)
 476                 goto err;
 477
 478         create_debug_files(ahcd);
 479
 480         return 0;
 481
 482 err:
 483         admhc_stop(hcd);
 484         return ret;
 485 }
 486
 487 /*-------------------------------------------------------------------------*/
 488
 489 /* Start an OHCI controller, set the BUS operational
 490  * resets USB and controller
 491  * enable interrupts
 492  */
 493 static int admhc_run(struct admhcd *ahcd)
 494 {
 495         u32                     temp;
 496         int                     first = ahcd->fminterval == 0;
 497         struct usb_hcd          *hcd = admhcd_to_hcd(ahcd);
 498
 499         admhc_disable(ahcd);
 500
 501         /* boot firmware should have set this up (5.1.1.3.1) */
 502         if (first) {
 503                 temp = admhc_readl(ahcd, &ahcd->regs->fminterval);
 504                 ahcd->fminterval = temp & ADMHC_SFI_FI_MASK;
 505                 if (ahcd->fminterval != FI)
 506                         admhc_dbg(ahcd, "fminterval delta %d\n",
 507                                 ahcd->fminterval - FI);
 508                 ahcd->fminterval |=
 509                         (FSLDP(ahcd->fminterval) << ADMHC_SFI_FSLDP_SHIFT);
 510                 /* also: power/overcurrent flags in rhdesc */
 511         }
 512
 513 #if 0   /* TODO: not applicable */
 514         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 515          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 516          * or if bus glue did the same (e.g. for PCI add-in cards with
 517          * PCI PM support).
 518          */
 519         if ((ahcd->hc_control & OHCI_CTRL_RWC) != 0
 520                         && !device_may_wakeup(hcd->self.controller))
 521                 device_init_wakeup(hcd->self.controller, 1);
 522 #endif
 523
 524         switch (ahcd->host_control & ADMHC_HC_BUSS) {
 525         case ADMHC_BUSS_OPER:
 526                 temp = 0;
 527                 break;
 528         case ADMHC_BUSS_SUSPEND:
 529                 /* FALLTHROUGH ? */
 530         case ADMHC_BUSS_RESUME:
 531                 ahcd->host_control = ADMHC_BUSS_RESUME;
 532                 temp = 10 /* msec wait */;
 533                 break;
 534         /* case ADMHC_BUSS_RESET: */
 535         default:
 536                 ahcd->host_control = ADMHC_BUSS_RESET;
 537                 temp = 50 /* msec wait */;
 538                 break;
 539         }
 540         admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
 541
 542         /* flush the writes */
 543         admhc_writel_flush(ahcd);
 544
 545         msleep(temp);
 546         temp = admhc_read_rhdesc(ahcd);
 547         if (!(temp & ADMHC_RH_NPS)) {
 548                 /* power down each port */
 549                 for (temp = 0; temp < ahcd->num_ports; temp++)
 550                         admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
 551         }
 552         /* flush those writes */
 553         admhc_writel_flush(ahcd);
 554
 555         /* 2msec timelimit here means no irqs/preempt */
 556         spin_lock_irq(&ahcd->lock);
 557
 558         admhc_writel(ahcd, ADMHC_CTRL_SR,  &ahcd->regs->gencontrol);
 559         temp = 30;      /* ... allow extra time */
 560         while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
 561                 if (--temp == 0) {
 562                         spin_unlock_irq(&ahcd->lock);
 563                         admhc_err(ahcd, "USB HC reset timed out!\n");
 564                         return -1;
 565                 }
 566                 udelay(1);
 567         }
 568
 569         /* enable HOST mode, before access any host specific register */
 570         admhc_writel(ahcd, ADMHC_CTRL_UHFE,  &ahcd->regs->gencontrol);
 571
 572         /* Tell the controller where the descriptor list is */
 573         admhc_writel(ahcd, (u32)ahcd->ed_head->dma, &ahcd->regs->hosthead);
 574
 575         periodic_reinit(ahcd);
 576
 577         /* use rhsc irqs after khubd is fully initialized */
 578         hcd->poll_rh = 1;
 579         hcd->uses_new_polling = 1;
 580
 581 #if 0
 582         /* wake on ConnectStatusChange, matching external hubs */
 583         admhc_writel(ahcd, RH_HS_DRWE, &ahcd->regs->roothub.status);
 584 #else
 585         /* FIXME roothub_write_status (ahcd, ADMHC_RH_DRWE); */
 586 #endif
 587
 588         /* Choose the interrupts we care about now, others later on demand */
 589         admhc_intr_ack(ahcd, ~0);
 590         admhc_intr_enable(ahcd, ADMHC_INTR_INIT);
 591
 592         admhc_writel(ahcd, ADMHC_RH_NPS | ADMHC_RH_LPSC, &ahcd->regs->rhdesc);
 593
 594         /* flush those writes */
 595         admhc_writel_flush(ahcd);
 596
 597         /* start controller operations */
 598         ahcd->host_control = ADMHC_BUSS_OPER;
 599         admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
 600
 601         temp = 20;
 602         while ((admhc_readl(ahcd, &ahcd->regs->host_control)
 603                         & ADMHC_HC_BUSS) != ADMHC_BUSS_OPER) {
 604                 if (--temp == 0) {
 605                         spin_unlock_irq(&ahcd->lock);
 606                         admhc_err(ahcd, "unable to setup operational mode!\n");
 607                         return -1;
 608                 }
 609                 mdelay(1);
 610         }
 611
 612         hcd->state = HC_STATE_RUNNING;
 613
 614         ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
 615
 616 #if 0
 617         /* FIXME: enabling DMA is always failed here for an unknown reason */
 618         admhc_dma_enable(ahcd);
 619
 620         temp = 200;
 621         while ((admhc_readl(ahcd, &ahcd->regs->host_control)
 622                         & ADMHC_HC_DMAE) != ADMHC_HC_DMAE) {
 623                 if (--temp == 0) {
 624                         spin_unlock_irq(&ahcd->lock);
 625                         admhc_err(ahcd, "unable to enable DMA!\n");
 626                         admhc_dump(ahcd, 1);
 627                         return -1;
 628                 }
 629                 mdelay(1);
 630         }
 631
 632 #endif
 633
 634         spin_unlock_irq(&ahcd->lock);
 635
 636         mdelay(ADMHC_POTPGT);
 637
 638         return 0;
 639 }
 640
 641 /*-------------------------------------------------------------------------*/
 642
 643 /* an interrupt happens */
 644
 645 static irqreturn_t admhc_irq(struct usb_hcd *hcd)
 646 {
 647         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 648         struct admhcd_regs __iomem *regs = ahcd->regs;
 649         u32 ints;
 650
 651         ints = admhc_readl(ahcd, &regs->int_status);
 652         if ((ints & ADMHC_INTR_INTA) == 0) {
 653                 /* no unmasked interrupt status is set */
 654                 return IRQ_NONE;
 655         }
 656
 657         ints &= admhc_readl(ahcd, &regs->int_enable);
 658
 659         if (ints & ADMHC_INTR_FATI) {
 660                 /* e.g. due to PCI Master/Target Abort */
 661                 admhc_disable(ahcd);
 662                 admhc_err(ahcd, "Fatal Error, controller disabled\n");
 663                 admhc_dump(ahcd, 1);
 664                 admhc_usb_reset(ahcd);
 665         }
 666
 667         if (ints & ADMHC_INTR_BABI) {
 668                 admhc_intr_disable(ahcd, ADMHC_INTR_BABI);
 669                 admhc_intr_ack(ahcd, ADMHC_INTR_BABI);
 670                 admhc_err(ahcd, "Babble Detected\n");
 671         }
 672
 673         if (ints & ADMHC_INTR_INSM) {
 674                 admhc_vdbg(ahcd, "Root Hub Status Change\n");
 675                 ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
 676                 admhc_intr_ack(ahcd, ADMHC_INTR_RESI | ADMHC_INTR_INSM);
 677
 678                 /* NOTE: Vendors didn't always make the same implementation
 679                  * choices for RHSC.  Many followed the spec; RHSC triggers
 680                  * on an edge, like setting and maybe clearing a port status
 681                  * change bit.  With others it's level-triggered, active
 682                  * until khubd clears all the port status change bits.  We'll
 683                  * always disable it here and rely on polling until khubd
 684                  * re-enables it.
 685                  */
 686                 admhc_intr_disable(ahcd, ADMHC_INTR_INSM);
 687                 usb_hcd_poll_rh_status(hcd);
 688         } else if (ints & ADMHC_INTR_RESI) {
 689                 /* For connect and disconnect events, we expect the controller
 690                  * to turn on RHSC along with RD.  But for remote wakeup events
 691                  * this might not happen.
 692                  */
 693                 admhc_vdbg(ahcd, "Resume Detect\n");
 694                 admhc_intr_ack(ahcd, ADMHC_INTR_RESI);
 695                 hcd->poll_rh = 1;
 696                 if (ahcd->autostop) {
 697                         spin_lock(&ahcd->lock);
 698                         admhc_rh_resume(ahcd);
 699                         spin_unlock(&ahcd->lock);
 700                 } else
 701                         usb_hcd_resume_root_hub(hcd);
 702         }
 703
 704         if (ints & ADMHC_INTR_TDC) {
 705                 admhc_vdbg(ahcd, "Transfer Descriptor Complete\n");
 706                 admhc_intr_ack(ahcd, ADMHC_INTR_TDC);
 707                 if (HC_IS_RUNNING(hcd->state))
 708                         admhc_intr_disable(ahcd, ADMHC_INTR_TDC);
 709                 spin_lock(&ahcd->lock);
 710                 admhc_td_complete(ahcd);
 711                 spin_unlock(&ahcd->lock);
 712                 if (HC_IS_RUNNING(hcd->state))
 713                         admhc_intr_enable(ahcd, ADMHC_INTR_TDC);
 714         }
 715
 716         if (ints & ADMHC_INTR_SO) {
 717                 /* could track INTR_SO to reduce available PCI/... bandwidth */
 718                 admhc_vdbg(ahcd, "Schedule Overrun\n");
 719         }
 720
 721 #if 1
 722         spin_lock(&ahcd->lock);
 723         if (ahcd->ed_rm_list)
 724                 finish_unlinks(ahcd, admhc_frame_no(ahcd));
 725
 726         if ((ints & ADMHC_INTR_SOFI) != 0 && !ahcd->ed_rm_list
 727                         && HC_IS_RUNNING(hcd->state))
 728                 admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
 729         spin_unlock(&ahcd->lock);
 730 #else
 731         if (ints & ADMHC_INTR_SOFI) {
 732                 admhc_vdbg(ahcd, "Start Of Frame\n");
 733                 spin_lock(&ahcd->lock);
 734
 735                 /* handle any pending ED removes */
 736                 finish_unlinks(ahcd, admhc_frameno(ahcd));
 737
 738                 /* leaving INTR_SOFI enabled when there's still unlinking
 739                  * to be done in the (next frame).
 740                  */
 741                 if ((ahcd->ed_rm_list == NULL) ||
 742                         HC_IS_RUNNING(hcd->state) == 0)
 743                         /*
 744                          * disable INTR_SOFI if there are no unlinking to be
 745                          * done (in the next frame)
 746                          */
 747                         admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
 748
 749                 spin_unlock(&ahcd->lock);
 750         }
 751 #endif
 752
 753         if (HC_IS_RUNNING(hcd->state)) {
 754                 admhc_intr_ack(ahcd, ints);
 755                 admhc_intr_enable(ahcd, ADMHC_INTR_MIE);
 756                 admhc_writel_flush(ahcd);
 757         }
 758
 759         return IRQ_HANDLED;
 760 }
 761
 762 /*-------------------------------------------------------------------------*/
 763
 764 static void admhc_stop(struct usb_hcd *hcd)
 765 {
 766         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 767
 768         admhc_dump(ahcd, 1);
 769
 770         flush_scheduled_work();
 771
 772         admhc_usb_reset(ahcd);
 773         admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
 774
 775         free_irq(hcd->irq, hcd);
 776         hcd->irq = -1;
 777
 778         remove_debug_files(ahcd);
 779         admhc_eds_cleanup(ahcd);
 780         admhc_mem_cleanup(ahcd);
 781 }
 782
 783 /*-------------------------------------------------------------------------*/
 784
 785 #ifdef CONFIG_MIPS_ADM5120
 786 #include "adm5120-drv.c"
 787 #define PLATFORM_DRIVER         usb_hcd_adm5120_driver
 788 #endif
 789
 790 #if     !defined(PLATFORM_DRIVER)
 791 #error "missing bus glue for admhc-hcd"
 792 #endif
 793
 794 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
 795
 796 static int __init admhc_hcd_mod_init(void)
 797 {
 798         int ret = 0;
 799
 800         if (usb_disabled())
 801                 return -ENODEV;
 802
 803         pr_info("%s: " DRIVER_INFO "\n", hcd_name);
 804         pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 805                 sizeof (struct ed), sizeof (struct td));
 806
 807 #ifdef PLATFORM_DRIVER
 808         ret = platform_driver_register(&PLATFORM_DRIVER);
 809         if (ret < 0)
 810                 goto error_platform;
 811 #endif
 812
 813         return ret;
 814
 815 #ifdef PLATFORM_DRIVER
 816         platform_driver_unregister(&PLATFORM_DRIVER);
 817 error_platform:
 818 #endif
 819         return ret;
 820 }
 821 module_init(admhc_hcd_mod_init);
 822
 823 static void __exit admhc_hcd_mod_exit(void)
 824 {
 825         platform_driver_unregister(&PLATFORM_DRIVER);
 826 }
 827 module_exit(admhc_hcd_mod_exit);
 828
 829 MODULE_AUTHOR(DRIVER_AUTHOR);
 830 MODULE_DESCRIPTION(DRIVER_INFO);
 831 MODULE_LICENSE("GPL");