target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c

   1 /*
   2  *  Atheros AR71xx built-in ethernet mac driver
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Based on Atheros' AG7100 driver
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include "ag71xx.h"
  15
  16 static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
  17 {
  18         switch (ag->speed) {
  19         case SPEED_1000:
  20                 return "1000";
  21         case SPEED_100:
  22                 return "100";
  23         case SPEED_10:
  24                 return "10";
  25         }
  26
  27         return "?";
  28 }
  29
  30 static void ag71xx_phy_link_update(struct ag71xx *ag)
  31 {
  32         struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
  33         u32 cfg2;
  34         u32 ifctl;
  35         u32 fifo5;
  36         u32 mii_speed;
  37
  38         if (!ag->link) {
  39                 netif_carrier_off(ag->dev);
  40                 if (netif_msg_link(ag))
  41                         printk(KERN_INFO "%s: link down\n", ag->dev->name);
  42                 return;
  43         }
  44
  45         cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
  46         cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
  47         cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
  48
  49         ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
  50         ifctl &= ~(MAC_IFCTL_SPEED);
  51
  52         fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
  53         fifo5 &= ~FIFO_CFG5_BM;
  54
  55         switch (ag->speed) {
  56         case SPEED_1000:
  57                 mii_speed =  MII_CTRL_SPEED_1000;
  58                 cfg2 |= MAC_CFG2_IF_1000;
  59                 fifo5 |= FIFO_CFG5_BM;
  60                 break;
  61         case SPEED_100:
  62                 mii_speed = MII_CTRL_SPEED_100;
  63                 cfg2 |= MAC_CFG2_IF_10_100;
  64                 ifctl |= MAC_IFCTL_SPEED;
  65                 break;
  66         case SPEED_10:
  67                 mii_speed = MII_CTRL_SPEED_10;
  68                 cfg2 |= MAC_CFG2_IF_10_100;
  69                 break;
  70         default:
  71                 BUG();
  72                 return;
  73         }
  74
  75         if (pdata->is_ar91xx)
  76                 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
  77         else if (pdata->is_ar724x)
  78                 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
  79         else
  80                 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
  81
  82         if (pdata->set_pll)
  83                 pdata->set_pll(ag->speed);
  84
  85         ag71xx_mii_ctrl_set_speed(ag, mii_speed);
  86
  87         ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
  88         ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
  89         ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
  90
  91         netif_carrier_on(ag->dev);
  92         if (netif_msg_link(ag))
  93                 printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
  94                         ag->dev->name,
  95                         ag71xx_speed_str(ag),
  96                         (DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
  97
  98         DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
  99                 ag->dev->name,
 100                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
 101                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
 102                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
 103
 104         DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
 105                 ag->dev->name,
 106                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
 107                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
 108                 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
 109
 110         DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
 111                 ag->dev->name,
 112                 ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
 113                 ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
 114                 ag71xx_mii_ctrl_rr(ag));
 115 }
 116
 117 static void ag71xx_phy_link_adjust(struct net_device *dev)
 118 {
 119         struct ag71xx *ag = netdev_priv(dev);
 120         struct phy_device *phydev = ag->phy_dev;
 121         unsigned long flags;
 122         int status_change = 0;
 123
 124         spin_lock_irqsave(&ag->lock, flags);
 125
 126         if (phydev->link) {
 127                 if (ag->duplex != phydev->duplex
 128                     || ag->speed != phydev->speed) {
 129                         status_change = 1;
 130                 }
 131         }
 132
 133         if (phydev->link != ag->link)
 134                 status_change = 1;
 135
 136         ag->link = phydev->link;
 137         ag->duplex = phydev->duplex;
 138         ag->speed = phydev->speed;
 139
 140         if (status_change)
 141                 ag71xx_phy_link_update(ag);
 142
 143         spin_unlock_irqrestore(&ag->lock, flags);
 144 }
 145
 146 void ag71xx_phy_start(struct ag71xx *ag)
 147 {
 148         if (ag->phy_dev) {
 149                 phy_start(ag->phy_dev);
 150         } else {
 151                 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 152
 153                 ag->duplex = pdata->duplex;
 154                 ag->speed = pdata->speed;
 155                 ag->link = 1;
 156                 ag71xx_phy_link_update(ag);
 157         }
 158 }
 159
 160 void ag71xx_phy_stop(struct ag71xx *ag)
 161 {
 162         if (ag->phy_dev) {
 163                 phy_stop(ag->phy_dev);
 164         } else {
 165                 ag->duplex = -1;
 166                 ag->link = 0;
 167                 ag->speed = 0;
 168                 ag71xx_phy_link_update(ag);
 169         }
 170 }
 171
 172 static int ag71xx_phy_connect_fixed(struct ag71xx *ag)
 173 {
 174         struct net_device *dev = ag->dev;
 175         struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 176         int ret = 0;
 177
 178         /* use fixed settings */
 179         switch (pdata->speed) {
 180         case SPEED_10:
 181         case SPEED_100:
 182         case SPEED_1000:
 183                 break;
 184         default:
 185                 printk(KERN_ERR "%s: invalid speed specified\n",
 186                         dev->name);
 187                 ret = -EINVAL;
 188                 break;
 189         }
 190
 191         return ret;
 192 }
 193
 194 static int ag71xx_phy_connect_multi(struct ag71xx *ag)
 195 {
 196         struct net_device *dev = ag->dev;
 197         struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 198         struct phy_device *phydev = NULL;
 199         int phy_count = 0;
 200         int phy_addr;
 201         int ret = 0;
 202
 203         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 204                 if (!(pdata->phy_mask & (1 << phy_addr)))
 205                         continue;
 206
 207                 if (ag->mii_bus->phy_map[phy_addr] == NULL)
 208                         continue;
 209
 210                 DBG("%s: PHY found at %s, uid=%08x\n",
 211                         dev->name,
 212                         dev_name(&ag->mii_bus->phy_map[phy_addr]->dev),
 213                         ag->mii_bus->phy_map[phy_addr]->phy_id);
 214
 215                 if (phydev == NULL)
 216                         phydev = ag->mii_bus->phy_map[phy_addr];
 217
 218                 phy_count++;
 219         }
 220
 221         switch (phy_count) {
 222         case 0:
 223                 printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n",
 224                         dev->name, pdata->phy_mask);
 225                 ret = -ENODEV;
 226                 break;
 227         case 1:
 228                 ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev),
 229                         &ag71xx_phy_link_adjust, 0, pdata->phy_if_mode);
 230
 231                 if (IS_ERR(ag->phy_dev)) {
 232                         printk(KERN_ERR "%s: could not connect to PHY at %s\n",
 233                                 dev->name, dev_name(&phydev->dev));
 234                         return PTR_ERR(ag->phy_dev);
 235                 }
 236
 237                 /* mask with MAC supported features */
 238                 if (pdata->has_gbit)
 239                         phydev->supported &= PHY_GBIT_FEATURES;
 240                 else
 241                         phydev->supported &= PHY_BASIC_FEATURES;
 242
 243                 phydev->advertising = phydev->supported;
 244
 245                 printk(KERN_DEBUG "%s: connected to PHY at %s "
 246                         "[uid=%08x, driver=%s]\n",
 247                         dev->name, dev_name(&phydev->dev),
 248                         phydev->phy_id, phydev->drv->name);
 249
 250                 ag->link = 0;
 251                 ag->speed = 0;
 252                 ag->duplex = -1;
 253                 break;
 254
 255         default:
 256                 printk(KERN_DEBUG "%s: connected to %d PHYs\n",
 257                         dev->name, phy_count);
 258                 ret = ag71xx_phy_connect_fixed(ag);
 259                 break;
 260         }
 261
 262         return ret;
 263 }
 264
 265 int ag71xx_phy_connect(struct ag71xx *ag)
 266 {
 267         struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 268
 269         if (pdata->phy_mask)
 270                 return ag71xx_phy_connect_multi(ag);
 271
 272         return ag71xx_phy_connect_fixed(ag);
 273 }
 274
 275 void ag71xx_phy_disconnect(struct ag71xx *ag)
 276 {
 277         if (ag->phy_dev)
 278                 phy_disconnect(ag->phy_dev);
 279 }