2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
39 struct switch_dev dev
;
40 struct phy_device
*phy
;
41 u32 (*read
)(struct ar8216_priv
*priv
, int reg
);
42 void (*write
)(struct ar8216_priv
*priv
, int reg
, u32 val
);
43 const struct net_device_ops
*ndo_old
;
44 struct net_device_ops ndo
;
45 struct mutex reg_mutex
;
53 /* all fields below are cleared on reset */
55 u16 vlan_id
[AR8X16_MAX_VLANS
];
56 u8 vlan_table
[AR8X16_MAX_VLANS
];
58 u16 pvid
[AR8216_NUM_PORTS
];
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
64 split_addr(u32 regaddr
, u16
*r1
, u16
*r2
, u16
*page
)
73 *page
= regaddr
& 0x1ff;
77 ar8216_mii_read(struct ar8216_priv
*priv
, int reg
)
79 struct phy_device
*phy
= priv
->phy
;
83 split_addr((u32
) reg
, &r1
, &r2
, &page
);
84 mdiobus_write(phy
->bus
, 0x18, 0, page
);
85 msleep(1); /* wait for the page switch to propagate */
86 lo
= mdiobus_read(phy
->bus
, 0x10 | r2
, r1
);
87 hi
= mdiobus_read(phy
->bus
, 0x10 | r2
, r1
+ 1);
89 return (hi
<< 16) | lo
;
93 ar8216_mii_write(struct ar8216_priv
*priv
, int reg
, u32 val
)
95 struct phy_device
*phy
= priv
->phy
;
99 split_addr((u32
) reg
, &r1
, &r2
, &r3
);
100 mdiobus_write(phy
->bus
, 0x18, 0, r3
);
101 msleep(1); /* wait for the page switch to propagate */
104 hi
= (u16
) (val
>> 16);
105 mdiobus_write(phy
->bus
, 0x10 | r2
, r1
+ 1, hi
);
106 mdiobus_write(phy
->bus
, 0x10 | r2
, r1
, lo
);
110 ar8216_rmw(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
114 v
= priv
->read(priv
, reg
);
117 priv
->write(priv
, reg
, v
);
123 ar8216_id_chip(struct ar8216_priv
*priv
)
129 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
133 id
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
134 for (i
= 0; i
< AR8X16_PROBE_RETRIES
; i
++) {
137 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
141 t
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
156 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
157 (int)(id
>> AR8216_CTRL_VERSION_S
),
158 (int)(id
& AR8216_CTRL_REVISION
),
159 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 2),
160 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 3));
167 ar8216_set_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
168 struct switch_val
*val
)
170 struct ar8216_priv
*priv
= to_ar8216(dev
);
171 priv
->vlan
= !!val
->value
.i
;
176 ar8216_get_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
177 struct switch_val
*val
)
179 struct ar8216_priv
*priv
= to_ar8216(dev
);
180 val
->value
.i
= priv
->vlan
;
186 ar8216_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
188 struct ar8216_priv
*priv
= to_ar8216(dev
);
190 /* make sure no invalid PVIDs get set */
192 if (vlan
>= dev
->vlans
)
195 priv
->pvid
[port
] = vlan
;
200 ar8216_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
202 struct ar8216_priv
*priv
= to_ar8216(dev
);
203 *vlan
= priv
->pvid
[port
];
208 ar8216_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
209 struct switch_val
*val
)
211 struct ar8216_priv
*priv
= to_ar8216(dev
);
212 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
217 ar8216_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
218 struct switch_val
*val
)
220 struct ar8216_priv
*priv
= to_ar8216(dev
);
221 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
225 static const char *ar8216_speed_str(unsigned speed
)
228 case AR8216_PORT_SPEED_10M
:
230 case AR8216_PORT_SPEED_100M
:
232 case AR8216_PORT_SPEED_1000M
:
239 static int ar8216_port_get_link(struct switch_dev
*dev
,
240 const struct switch_attr
*attr
,
241 struct switch_val
*val
)
243 struct ar8216_priv
*priv
= to_ar8216(dev
);
248 port
= val
->port_vlan
;
250 memset(priv
->buf
, '\0', sizeof(priv
->buf
));
251 status
= priv
->read(priv
, AR8216_REG_PORT_STATUS(port
));
253 if (status
& AR8216_PORT_STATUS_LINK_UP
) {
254 len
= snprintf(priv
->buf
, sizeof(priv
->buf
),
255 "port:%d link:up speed:%s %s-duplex %s%s%s",
257 ar8216_speed_str((status
&
258 AR8216_PORT_STATUS_SPEED
) >>
259 AR8216_PORT_STATUS_SPEED_S
),
260 (status
& AR8216_PORT_STATUS_DUPLEX
) ?
262 (status
& AR8216_PORT_STATUS_TXFLOW
) ?
264 (status
& AR8216_PORT_STATUS_RXFLOW
) ?
266 (status
& AR8216_PORT_STATUS_LINK_AUTO
) ?
269 len
= snprintf(priv
->buf
, sizeof(priv
->buf
), "port:%d link:down",
273 val
->value
.s
= priv
->buf
;
280 ar8216_mangle_tx(struct sk_buff
*skb
, struct net_device
*dev
)
282 struct ar8216_priv
*priv
= dev
->phy_ptr
;
291 if (unlikely(skb_headroom(skb
) < 2)) {
292 if (pskb_expand_head(skb
, 2, 0, GFP_ATOMIC
) < 0)
296 buf
= skb_push(skb
, 2);
301 return priv
->ndo_old
->ndo_start_xmit(skb
, dev
);
304 dev_kfree_skb_any(skb
);
309 ar8216_mangle_rx(struct sk_buff
*skb
, int napi
)
311 struct ar8216_priv
*priv
;
312 struct net_device
*dev
;
324 /* don't strip the header if vlan mode is disabled */
328 /* strip header, get vlan id */
332 /* check for vlan header presence */
333 if ((buf
[12 + 2] != 0x81) || (buf
[13 + 2] != 0x00))
338 /* no need to fix up packets coming from a tagged source */
339 if (priv
->vlan_tagged
& (1 << port
))
342 /* lookup port vid from local table, the switch passes an invalid vlan id */
343 vlan
= priv
->vlan_id
[priv
->pvid
[port
]];
346 buf
[14 + 2] |= vlan
>> 8;
347 buf
[15 + 2] = vlan
& 0xff;
350 skb
->protocol
= eth_type_trans(skb
, skb
->dev
);
353 return netif_receive_skb(skb
);
355 return netif_rx(skb
);
358 /* no vlan? eat the packet! */
359 dev_kfree_skb_any(skb
);
364 ar8216_netif_rx(struct sk_buff
*skb
)
366 return ar8216_mangle_rx(skb
, 0);
370 ar8216_netif_receive_skb(struct sk_buff
*skb
)
372 return ar8216_mangle_rx(skb
, 1);
376 static struct switch_attr ar8216_globals
[] = {
378 .type
= SWITCH_TYPE_INT
,
379 .name
= "enable_vlan",
380 .description
= "Enable VLAN mode",
381 .set
= ar8216_set_vlan
,
382 .get
= ar8216_get_vlan
,
387 static struct switch_attr ar8216_port
[] = {
389 .type
= SWITCH_TYPE_STRING
,
391 .description
= "Get port link information",
394 .get
= ar8216_port_get_link
,
398 static struct switch_attr ar8216_vlan
[] = {
400 .type
= SWITCH_TYPE_INT
,
402 .description
= "VLAN ID (0-4094)",
403 .set
= ar8216_set_vid
,
404 .get
= ar8216_get_vid
,
411 ar8216_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
413 struct ar8216_priv
*priv
= to_ar8216(dev
);
414 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
418 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
419 struct switch_port
*p
;
421 if (!(ports
& (1 << i
)))
424 p
= &val
->value
.ports
[val
->len
++];
426 if (priv
->vlan_tagged
& (1 << i
))
427 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
435 ar8216_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
437 struct ar8216_priv
*priv
= to_ar8216(dev
);
438 u8
*vt
= &priv
->vlan_table
[val
->port_vlan
];
442 for (i
= 0; i
< val
->len
; i
++) {
443 struct switch_port
*p
= &val
->value
.ports
[i
];
445 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
))
446 priv
->vlan_tagged
|= (1 << p
->id
);
448 priv
->vlan_tagged
&= ~(1 << p
->id
);
449 priv
->pvid
[p
->id
] = val
->port_vlan
;
451 /* make sure that an untagged port does not
452 * appear in other vlans */
453 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
454 if (j
== val
->port_vlan
)
456 priv
->vlan_table
[j
] &= ~(1 << p
->id
);
466 ar8216_wait_bit(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
470 while ((priv
->read(priv
, reg
) & mask
) != val
) {
471 if (timeout
-- <= 0) {
472 printk(KERN_ERR
"ar8216: timeout waiting for operation to complete\n");
480 ar8216_vtu_op(struct ar8216_priv
*priv
, u32 op
, u32 val
)
482 if (ar8216_wait_bit(priv
, AR8216_REG_VTU
, AR8216_VTU_ACTIVE
, 0))
484 if ((op
& AR8216_VTU_OP
) == AR8216_VTU_OP_LOAD
) {
485 val
&= AR8216_VTUDATA_MEMBER
;
486 val
|= AR8216_VTUDATA_VALID
;
487 priv
->write(priv
, AR8216_REG_VTU_DATA
, val
);
489 op
|= AR8216_VTU_ACTIVE
;
490 priv
->write(priv
, AR8216_REG_VTU
, op
);
494 ar8216_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
495 u32 members
, u32 pvid
)
499 if (priv
->vlan
&& port
== AR8216_PORT_CPU
&& priv
->chip
== AR8216
)
500 header
= AR8216_PORT_CTRL_HEADER
;
504 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
505 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
506 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
507 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
508 AR8216_PORT_CTRL_LEARN
| header
|
509 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
510 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
512 ar8216_rmw(priv
, AR8216_REG_PORT_VLAN(port
),
513 AR8216_PORT_VLAN_DEST_PORTS
| AR8216_PORT_VLAN_MODE
|
514 AR8216_PORT_VLAN_DEFAULT_ID
,
515 (members
<< AR8216_PORT_VLAN_DEST_PORTS_S
) |
516 (ingress
<< AR8216_PORT_VLAN_MODE_S
) |
517 (pvid
<< AR8216_PORT_VLAN_DEFAULT_ID_S
));
521 ar8236_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
522 u32 members
, u32 pvid
)
524 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
525 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
526 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
527 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
528 AR8216_PORT_CTRL_LEARN
|
529 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
530 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
532 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN(port
),
533 AR8236_PORT_VLAN_DEFAULT_ID
,
534 (pvid
<< AR8236_PORT_VLAN_DEFAULT_ID_S
));
536 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN2(port
),
537 AR8236_PORT_VLAN2_VLAN_MODE
|
538 AR8236_PORT_VLAN2_MEMBER
,
539 (ingress
<< AR8236_PORT_VLAN2_VLAN_MODE_S
) |
540 (members
<< AR8236_PORT_VLAN2_MEMBER_S
));
544 ar8216_hw_apply(struct switch_dev
*dev
)
546 struct ar8216_priv
*priv
= to_ar8216(dev
);
547 u8 portmask
[AR8216_NUM_PORTS
];
550 mutex_lock(&priv
->reg_mutex
);
551 /* flush all vlan translation unit entries */
552 ar8216_vtu_op(priv
, AR8216_VTU_OP_FLUSH
, 0);
554 memset(portmask
, 0, sizeof(portmask
));
556 /* calculate the port destination masks and load vlans
557 * into the vlan translation unit */
558 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
559 u8 vp
= priv
->vlan_table
[j
];
564 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
567 portmask
[i
] |= vp
& ~mask
;
572 (priv
->vlan_id
[j
] << AR8216_VTU_VID_S
),
573 priv
->vlan_table
[j
]);
577 * isolate all ports, but connect them to the cpu port */
578 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
579 if (i
== AR8216_PORT_CPU
)
582 portmask
[i
] = 1 << AR8216_PORT_CPU
;
583 portmask
[AR8216_PORT_CPU
] |= (1 << i
);
587 /* update the port destination mask registers and tag settings */
588 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
593 pvid
= priv
->vlan_id
[priv
->pvid
[i
]];
599 if (priv
->vlan_tagged
& (1 << i
))
600 egress
= AR8216_OUT_ADD_VLAN
;
602 egress
= AR8216_OUT_STRIP_VLAN
;
604 egress
= AR8216_OUT_KEEP
;
607 ingress
= AR8216_IN_SECURE
;
609 ingress
= AR8216_IN_PORT_ONLY
;
612 if (priv
->chip
== AR8236
)
613 ar8236_setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
616 ar8216_setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
619 mutex_unlock(&priv
->reg_mutex
);
624 ar8236_hw_init(struct ar8216_priv
*priv
) {
625 static int initialized
;
632 /* Initialize the PHYs */
633 bus
= priv
->phy
->bus
;
634 for (i
= 0; i
< 5; i
++) {
635 bus
->write(bus
, i
, MII_ADVERTISE
,
636 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
|
637 ADVERTISE_PAUSE_ASYM
);
638 bus
->write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
647 ar8316_hw_init(struct ar8216_priv
*priv
) {
652 val
= priv
->read(priv
, 0x8);
654 if (priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
655 if (priv
->port4_phy
) {
656 /* value taken from Ubiquiti RouterStation Pro */
658 printk(KERN_INFO
"ar8316: Using port 4 as PHY\n");
661 printk(KERN_INFO
"ar8316: Using port 4 as switch port\n");
663 } else if (priv
->phy
->interface
== PHY_INTERFACE_MODE_GMII
) {
664 /* value taken from AVM Fritz!Box 7390 sources */
667 /* no known value for phy interface */
668 printk(KERN_ERR
"ar8316: unsupported mii mode: %d.\n",
669 priv
->phy
->interface
);
676 priv
->write(priv
, 0x8, newval
);
678 /* standard atheros magic */
679 priv
->write(priv
, 0x38, 0xc000050e);
681 /* Initialize the ports */
682 bus
= priv
->phy
->bus
;
683 for (i
= 0; i
< 5; i
++) {
684 if ((i
== 4) && priv
->port4_phy
&&
685 priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
686 /* work around for phy4 rgmii mode */
687 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x12);
688 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x480c);
690 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x0);
691 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x824e);
693 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x5);
694 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x3d47);
698 /* initialize the port itself */
699 mdiobus_write(bus
, i
, MII_ADVERTISE
,
700 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
);
701 mdiobus_write(bus
, i
, MII_CTRL1000
, ADVERTISE_1000FULL
);
702 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
707 priv
->initialized
= true;
712 ar8216_reset_switch(struct switch_dev
*dev
)
714 struct ar8216_priv
*priv
= to_ar8216(dev
);
717 mutex_lock(&priv
->reg_mutex
);
718 memset(&priv
->vlan
, 0, sizeof(struct ar8216_priv
) -
719 offsetof(struct ar8216_priv
, vlan
));
720 for (i
= 0; i
< AR8X16_MAX_VLANS
; i
++) {
721 priv
->vlan_id
[i
] = i
;
723 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
724 /* Enable port learning and tx */
725 priv
->write(priv
, AR8216_REG_PORT_CTRL(i
),
726 AR8216_PORT_CTRL_LEARN
|
727 (4 << AR8216_PORT_CTRL_STATE_S
));
729 priv
->write(priv
, AR8216_REG_PORT_VLAN(i
), 0);
731 /* Configure all PHYs */
732 if (i
== AR8216_PORT_CPU
) {
733 priv
->write(priv
, AR8216_REG_PORT_STATUS(i
),
734 AR8216_PORT_STATUS_LINK_UP
|
735 ((priv
->chip
== AR8316
) ?
736 AR8216_PORT_SPEED_1000M
: AR8216_PORT_SPEED_100M
) |
737 AR8216_PORT_STATUS_TXMAC
|
738 AR8216_PORT_STATUS_RXMAC
|
739 ((priv
->chip
== AR8316
) ? AR8216_PORT_STATUS_RXFLOW
: 0) |
740 ((priv
->chip
== AR8316
) ? AR8216_PORT_STATUS_TXFLOW
: 0) |
741 AR8216_PORT_STATUS_DUPLEX
);
743 priv
->write(priv
, AR8216_REG_PORT_STATUS(i
),
744 AR8216_PORT_STATUS_LINK_AUTO
);
747 /* XXX: undocumented magic from atheros, required! */
748 priv
->write(priv
, 0x38, 0xc000050e);
750 if (priv
->chip
== AR8216
) {
751 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
752 AR8216_GCTRL_MTU
, 1518 + 8 + 2);
753 } else if (priv
->chip
== AR8316
||
754 priv
->chip
== AR8236
) {
755 /* enable jumbo frames */
756 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
757 AR8316_GCTRL_MTU
, 9018 + 8 + 2);
760 if (priv
->chip
== AR8316
) {
761 /* enable cpu port to receive multicast and broadcast frames */
762 priv
->write(priv
, AR8216_REG_FLOOD_MASK
, 0x003f003f);
764 mutex_unlock(&priv
->reg_mutex
);
765 return ar8216_hw_apply(dev
);
769 static const struct switch_dev_ops ar8216_ops
= {
771 .attr
= ar8216_globals
,
772 .n_attr
= ARRAY_SIZE(ar8216_globals
),
776 .n_attr
= ARRAY_SIZE(ar8216_port
),
780 .n_attr
= ARRAY_SIZE(ar8216_vlan
),
782 .get_port_pvid
= ar8216_get_pvid
,
783 .set_port_pvid
= ar8216_set_pvid
,
784 .get_vlan_ports
= ar8216_get_ports
,
785 .set_vlan_ports
= ar8216_set_ports
,
786 .apply_config
= ar8216_hw_apply
,
787 .reset_switch
= ar8216_reset_switch
,
791 ar8216_config_init(struct phy_device
*pdev
)
793 struct ar8216_priv
*priv
= pdev
->priv
;
794 struct net_device
*dev
= pdev
->attached_dev
;
795 struct switch_dev
*swdev
;
799 priv
= kzalloc(sizeof(struct ar8216_priv
), GFP_KERNEL
);
806 priv
->chip
= ar8216_id_chip(priv
);
808 if (pdev
->addr
!= 0) {
809 if (priv
->chip
== AR8316
) {
810 pdev
->supported
|= SUPPORTED_1000baseT_Full
;
811 pdev
->advertising
|= ADVERTISED_1000baseT_Full
;
813 /* check if we're attaching to the switch twice */
814 pdev
= pdev
->bus
->phy_map
[0];
820 /* switch device has not been initialized, reuse priv */
822 priv
->port4_phy
= true;
829 /* switch device has been initialized, reinit */
831 priv
->dev
.ports
= (AR8216_NUM_PORTS
- 1);
832 priv
->initialized
= false;
833 priv
->port4_phy
= true;
834 ar8316_hw_init(priv
);
842 printk(KERN_INFO
"%s: AR%d switch driver attached.\n",
843 pdev
->attached_dev
->name
, priv
->chip
);
845 pdev
->supported
= priv
->chip
== AR8316
?
846 SUPPORTED_1000baseT_Full
: SUPPORTED_100baseT_Full
;
847 pdev
->advertising
= pdev
->supported
;
849 mutex_init(&priv
->reg_mutex
);
850 priv
->read
= ar8216_mii_read
;
851 priv
->write
= ar8216_mii_write
;
856 swdev
->cpu_port
= AR8216_PORT_CPU
;
857 swdev
->ops
= &ar8216_ops
;
858 swdev
->ports
= AR8216_NUM_PORTS
;
860 if (priv
->chip
== AR8316
) {
861 swdev
->name
= "Atheros AR8316";
862 swdev
->vlans
= AR8X16_MAX_VLANS
;
864 if (priv
->port4_phy
) {
865 /* port 5 connected to the other mac, therefore unusable */
866 swdev
->ports
= (AR8216_NUM_PORTS
- 1);
868 } else if (priv
->chip
== AR8236
) {
869 swdev
->name
= "Atheros AR8236";
870 swdev
->vlans
= AR8216_NUM_VLANS
;
871 swdev
->ports
= AR8216_NUM_PORTS
;
873 swdev
->name
= "Atheros AR8216";
874 swdev
->vlans
= AR8216_NUM_VLANS
;
877 if ((ret
= register_switch(&priv
->dev
, pdev
->attached_dev
)) < 0) {
884 if (priv
->chip
== AR8316
) {
885 ret
= ar8316_hw_init(priv
);
892 if (priv
->chip
== AR8236
) {
893 ret
= ar8236_hw_init(priv
);
900 ret
= ar8216_reset_switch(&priv
->dev
);
908 /* VID fixup only needed on ar8216 */
909 if (pdev
->addr
== 0 && priv
->chip
== AR8216
) {
911 pdev
->netif_receive_skb
= ar8216_netif_receive_skb
;
912 pdev
->netif_rx
= ar8216_netif_rx
;
913 priv
->ndo_old
= dev
->netdev_ops
;
914 memcpy(&priv
->ndo
, priv
->ndo_old
, sizeof(struct net_device_ops
));
915 priv
->ndo
.ndo_start_xmit
= ar8216_mangle_tx
;
916 dev
->netdev_ops
= &priv
->ndo
;
926 ar8216_read_status(struct phy_device
*phydev
)
928 struct ar8216_priv
*priv
= phydev
->priv
;
930 if (phydev
->addr
!= 0) {
931 return genphy_read_status(phydev
);
934 phydev
->speed
= priv
->chip
== AR8316
? SPEED_1000
: SPEED_100
;
935 phydev
->duplex
= DUPLEX_FULL
;
938 /* flush the address translation unit */
939 mutex_lock(&priv
->reg_mutex
);
940 ret
= ar8216_wait_bit(priv
, AR8216_REG_ATU
, AR8216_ATU_ACTIVE
, 0);
943 priv
->write(priv
, AR8216_REG_ATU
, AR8216_ATU_OP_FLUSH
);
946 mutex_unlock(&priv
->reg_mutex
);
948 phydev
->state
= PHY_RUNNING
;
949 netif_carrier_on(phydev
->attached_dev
);
950 phydev
->adjust_link(phydev
->attached_dev
);
956 ar8216_config_aneg(struct phy_device
*phydev
)
958 if (phydev
->addr
== 0)
961 return genphy_config_aneg(phydev
);
965 ar8216_probe(struct phy_device
*pdev
)
967 struct ar8216_priv priv
;
971 chip
= ar8216_id_chip(&priv
);
979 ar8216_remove(struct phy_device
*pdev
)
981 struct ar8216_priv
*priv
= pdev
->priv
;
982 struct net_device
*dev
= pdev
->attached_dev
;
987 if (priv
->ndo_old
&& dev
)
988 dev
->netdev_ops
= priv
->ndo_old
;
990 unregister_switch(&priv
->dev
);
994 static struct phy_driver ar8216_driver
= {
995 .phy_id
= 0x004d0000,
996 .name
= "Atheros AR8216/AR8316/AR8326",
997 .phy_id_mask
= 0xffff0000,
998 .features
= PHY_BASIC_FEATURES
,
999 .probe
= ar8216_probe
,
1000 .remove
= ar8216_remove
,
1001 .config_init
= &ar8216_config_init
,
1002 .config_aneg
= &ar8216_config_aneg
,
1003 .read_status
= &ar8216_read_status
,
1004 .driver
= { .owner
= THIS_MODULE
},
1010 return phy_driver_register(&ar8216_driver
);
1016 phy_driver_unregister(&ar8216_driver
);
1019 module_init(ar8216_init
);
1020 module_exit(ar8216_exit
);
1021 MODULE_LICENSE("GPL");