target/linux/adm5120/patches/200-amba_pl010_hacks.patch

   1 --- a/drivers/serial/amba-pl010.c
   2 +++ b/drivers/serial/amba-pl010.c
   3 @@ -52,11 +52,10 @@
   4
   5  #include <asm/io.h>
   6
   7 -#define UART_NR                8
   8 -
   9  #define SERIAL_AMBA_MAJOR      204
  10  #define SERIAL_AMBA_MINOR      16
  11 -#define SERIAL_AMBA_NR         UART_NR
  12 +#define SERIAL_AMBA_NR         CONFIG_SERIAL_AMBA_PL010_NUMPORTS
  13 +#define SERIAL_AMBA_NAME       CONFIG_SERIAL_AMBA_PL010_PORTNAME
  14
  15  #define AMBA_ISR_PASS_LIMIT    256
  16
  17 @@ -82,7 +81,7 @@
  18         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  19         unsigned int cr;
  20
  21 -       cr = readb(uap->port.membase + UART010_CR);
  22 +       cr = readl(uap->port.membase + UART010_CR);
  23         cr &= ~UART010_CR_TIE;
  24         writel(cr, uap->port.membase + UART010_CR);
  25  }
  26 @@ -92,7 +91,7 @@
  27         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  28         unsigned int cr;
  29
  30 -       cr = readb(uap->port.membase + UART010_CR);
  31 +       cr = readl(uap->port.membase + UART010_CR);
  32         cr |= UART010_CR_TIE;
  33         writel(cr, uap->port.membase + UART010_CR);
  34  }
  35 @@ -102,7 +101,7 @@
  36         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  37         unsigned int cr;
  38
  39 -       cr = readb(uap->port.membase + UART010_CR);
  40 +       cr = readl(uap->port.membase + UART010_CR);
  41         cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  42         writel(cr, uap->port.membase + UART010_CR);
  43  }
  44 @@ -112,7 +111,7 @@
  45         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  46         unsigned int cr;
  47
  48 -       cr = readb(uap->port.membase + UART010_CR);
  49 +       cr = readl(uap->port.membase + UART010_CR);
  50         cr |= UART010_CR_MSIE;
  51         writel(cr, uap->port.membase + UART010_CR);
  52  }
  53 @@ -122,9 +121,9 @@
  54         struct tty_struct *tty = uap->port.info->tty;
  55         unsigned int status, ch, flag, rsr, max_count = 256;
  56
  57 -       status = readb(uap->port.membase + UART01x_FR);
  58 +       status = readl(uap->port.membase + UART01x_FR);
  59         while (UART_RX_DATA(status) && max_count--) {
  60 -               ch = readb(uap->port.membase + UART01x_DR);
  61 +               ch = readl(uap->port.membase + UART01x_DR);
  62                 flag = TTY_NORMAL;
  63
  64                 uap->port.icount.rx++;
  65 @@ -133,7 +132,7 @@
  66                  * Note that the error handling code is
  67                  * out of the main execution path
  68                  */
  69 -               rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  70 +               rsr = readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  71                 if (unlikely(rsr & UART01x_RSR_ANY)) {
  72                         writel(0, uap->port.membase + UART01x_ECR);
  73
  74 @@ -165,7 +164,7 @@
  75                 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
  76
  77         ignore_char:
  78 -               status = readb(uap->port.membase + UART01x_FR);
  79 +               status = readl(uap->port.membase + UART01x_FR);
  80         }
  81         spin_unlock(&uap->port.lock);
  82         tty_flip_buffer_push(tty);
  83 @@ -210,7 +209,7 @@
  84
  85         writel(0, uap->port.membase + UART010_ICR);
  86
  87 -       status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  88 +       status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  89
  90         delta = status ^ uap->old_status;
  91         uap->old_status = status;
  92 @@ -238,7 +237,7 @@
  93
  94         spin_lock(&uap->port.lock);
  95
  96 -       status = readb(uap->port.membase + UART010_IIR);
  97 +       status = readl(uap->port.membase + UART010_IIR);
  98         if (status) {
  99                 do {
 100                         if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
 101 @@ -251,7 +250,7 @@
 102                         if (pass_counter-- == 0)
 103                                 break;
 104
 105 -                       status = readb(uap->port.membase + UART010_IIR);
 106 +                       status = readl(uap->port.membase + UART010_IIR);
 107                 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
 108                                    UART010_IIR_TIS));
 109                 handled = 1;
 110 @@ -265,7 +264,7 @@
 111  static unsigned int pl010_tx_empty(struct uart_port *port)
 112  {
 113         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 114 -       unsigned int status = readb(uap->port.membase + UART01x_FR);
 115 +       unsigned int status = readl(uap->port.membase + UART01x_FR);
 116         return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
 117  }
 118
 119 @@ -275,7 +274,7 @@
 120         unsigned int result = 0;
 121         unsigned int status;
 122
 123 -       status = readb(uap->port.membase + UART01x_FR);
 124 +       status = readl(uap->port.membase + UART01x_FR);
 125         if (status & UART01x_FR_DCD)
 126                 result |= TIOCM_CAR;
 127         if (status & UART01x_FR_DSR)
 128 @@ -301,7 +300,7 @@
 129         unsigned int lcr_h;
 130
 131         spin_lock_irqsave(&uap->port.lock, flags);
 132 -       lcr_h = readb(uap->port.membase + UART010_LCRH);
 133 +       lcr_h = readl(uap->port.membase + UART010_LCRH);
 134         if (break_state == -1)
 135                 lcr_h |= UART01x_LCRH_BRK;
 136         else
 137 @@ -334,7 +333,7 @@
 138         /*
 139          * initialise the old status of the modem signals
 140          */
 141 -       uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 142 +       uap->old_status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 143
 144         /*
 145          * Finally, enable interrupts
 146 @@ -365,7 +364,7 @@
 147         writel(0, uap->port.membase + UART010_CR);
 148
 149         /* disable break condition and fifos */
 150 -       writel(readb(uap->port.membase + UART010_LCRH) &
 151 +       writel(readl(uap->port.membase + UART010_LCRH) &
 152                 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
 153                uap->port.membase + UART010_LCRH);
 154
 155 @@ -387,7 +386,7 @@
 156         /*
 157          * Ask the core to calculate the divisor for us.
 158          */
 159 -       baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 160 +       baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 161         quot = uart_get_divisor(port, baud);
 162
 163         switch (termios->c_cflag & CSIZE) {
 164 @@ -450,7 +449,7 @@
 165                 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
 166
 167         /* first, disable everything */
 168 -       old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 169 +       old_cr = readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 170
 171         if (UART_ENABLE_MS(port, termios->c_cflag))
 172                 old_cr |= UART010_CR_MSIE;
 173 @@ -540,7 +539,7 @@
 174         .verify_port    = pl010_verify_port,
 175  };
 176
 177 -static struct uart_amba_port *amba_ports[UART_NR];
 178 +static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
 179
 180  #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
 181
 182 @@ -550,7 +549,7 @@
 183         unsigned int status;
 184
 185         do {
 186 -               status = readb(uap->port.membase + UART01x_FR);
 187 +               status = readl(uap->port.membase + UART01x_FR);
 188                 barrier();
 189         } while (!UART_TX_READY(status));
 190         writel(ch, uap->port.membase + UART01x_DR);
 191 @@ -567,7 +566,7 @@
 192         /*
 193          *      First save the CR then disable the interrupts
 194          */
 195 -       old_cr = readb(uap->port.membase + UART010_CR);
 196 +       old_cr = readl(uap->port.membase + UART010_CR);
 197         writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 198
 199         uart_console_write(&uap->port, s, count, pl010_console_putchar);
 200 @@ -577,7 +576,7 @@
 201          *      and restore the TCR
 202          */
 203         do {
 204 -               status = readb(uap->port.membase + UART01x_FR);
 205 +               status = readl(uap->port.membase + UART01x_FR);
 206                 barrier();
 207         } while (status & UART01x_FR_BUSY);
 208         writel(old_cr, uap->port.membase + UART010_CR);
 209 @@ -589,9 +588,9 @@
 210  pl010_console_get_options(struct uart_amba_port *uap, int *baud,
 211                              int *parity, int *bits)
 212  {
 213 -       if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 214 +       if (readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 215                 unsigned int lcr_h, quot;
 216 -               lcr_h = readb(uap->port.membase + UART010_LCRH);
 217 +               lcr_h = readl(uap->port.membase + UART010_LCRH);
 218
 219                 *parity = 'n';
 220                 if (lcr_h & UART01x_LCRH_PEN) {
 221 @@ -606,8 +605,8 @@
 222                 else
 223                         *bits = 8;
 224
 225 -               quot = readb(uap->port.membase + UART010_LCRL) |
 226 -                      readb(uap->port.membase + UART010_LCRM) << 8;
 227 +               quot = readl(uap->port.membase + UART010_LCRL) |
 228 +                      readl(uap->port.membase + UART010_LCRM) << 8;
 229                 *baud = uap->port.uartclk / (16 * (quot + 1));
 230         }
 231  }
 232 @@ -625,7 +624,7 @@
 233          * if so, search for the first available port that does have
 234          * console support.
 235          */
 236 -       if (co->index >= UART_NR)
 237 +       if (co->index >= SERIAL_AMBA_NR)
 238                 co->index = 0;
 239         uap = amba_ports[co->index];
 240         if (!uap)
 241 @@ -643,7 +642,7 @@
 242
 243  static struct uart_driver amba_reg;
 244  static struct console amba_console = {
 245 -       .name           = "ttyAM",
 246 +       .name           = SERIAL_AMBA_NAME,
 247         .write          = pl010_console_write,
 248         .device         = uart_console_device,
 249         .setup          = pl010_console_setup,
 250 @@ -659,11 +658,11 @@
 251
 252  static struct uart_driver amba_reg = {
 253         .owner                  = THIS_MODULE,
 254 -       .driver_name            = "ttyAM",
 255 -       .dev_name               = "ttyAM",
 256 +       .driver_name            = SERIAL_AMBA_NAME,
 257 +       .dev_name               = SERIAL_AMBA_NAME,
 258         .major                  = SERIAL_AMBA_MAJOR,
 259         .minor                  = SERIAL_AMBA_MINOR,
 260 -       .nr                     = UART_NR,
 261 +       .nr                     = SERIAL_AMBA_NR,
 262         .cons                   = AMBA_CONSOLE,
 263  };
 264
 265 --- a/drivers/serial/Kconfig
 266 +++ b/drivers/serial/Kconfig
 267 @@ -287,10 +287,25 @@
 268         help
 269           This selects the ARM(R) AMBA(R) PrimeCell PL010 UART.  If you have
 270           an Integrator/AP or Integrator/PP2 platform, or if you have a
 271 -         Cirrus Logic EP93xx CPU, say Y or M here.
 272 +         Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
 273
 274           If unsure, say N.
 275
 276 +config SERIAL_AMBA_PL010_NUMPORTS
 277 +       int "Maximum number of AMBA PL010 serial ports"
 278 +       depends on SERIAL_AMBA_PL010
 279 +       default "8"
 280 +       ---help---
 281 +         Set this to the number of serial ports you want the AMBA PL010 driver
 282 +         to support.
 283 +
 284 +config SERIAL_AMBA_PL010_PORTNAME
 285 +       string "Name of the AMBA PL010 serial ports"
 286 +       depends on SERIAL_AMBA_PL010
 287 +       default "ttyAM"
 288 +       ---help---
 289 +         ::: To be written :::
 290 +
 291  config SERIAL_AMBA_PL010_CONSOLE
 292         bool "Support for console on AMBA serial port"
 293         depends on SERIAL_AMBA_PL010=y