openwrt/package/linux/kernel-source/include/sbutils.h

   1 /*
   2  * Misc utility routines for accessing chip-specific features
   3  * of Broadcom HNBU SiliconBackplane-based chips.
   4  *
   5  * Copyright 2004, Broadcom Corporation
   6  * All Rights Reserved.
   7  *
   8  * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
   9  * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
  10  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  11  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  12  *
  13  * $Id$
  14  */
  15
  16 #ifndef _sbutils_h_
  17 #define _sbutils_h_
  18
  19 /* Board styles (bustype) */
  20 #define BOARDSTYLE_SOC          0               /* Silicon Backplane */
  21 #define BOARDSTYLE_PCI          1               /* PCI/MiniPCI board */
  22 #define BOARDSTYLE_PCMCIA       2               /* PCMCIA board */
  23 #define BOARDSTYLE_CARDBUS      3               /* Cardbus board */
  24
  25 /*
  26  * Many of the routines below take an 'sbh' handle as their first arg.
  27  * Allocate this by calling sb_attach().  Free it by calling sb_detach().
  28  * At any one time, the sbh is logically focused on one particular sb core
  29  * (the "current core").
  30  * Use sb_setcore() or sb_setcoreidx() to change the association to another core.
  31  */
  32
  33 /* exported externs */
  34 extern void *sb_attach(uint pcidev, void *osh, void *regs, uint bustype, void *sdh, char **vars, int *varsz);
  35 extern void *sb_kattach(void);
  36 extern void sb_detach(void *sbh);
  37 extern uint sb_chip(void *sbh);
  38 extern uint sb_chiprev(void *sbh);
  39 extern uint sb_chipcrev(void *sbh);
  40 extern uint sb_chippkg(void *sbh);
  41 extern uint sb_pcirev(void *sbh);
  42 extern uint sb_pcmciarev(void *sbh);
  43 extern uint sb_boardvendor(void *sbh);
  44 extern uint sb_boardtype(void *sbh);
  45 extern uint sb_boardstyle(void *sbh);
  46 extern uint sb_bus(void *sbh);
  47 extern uint sb_corelist(void *sbh, uint coreid[]);
  48 extern uint sb_coreid(void *sbh);
  49 extern uint sb_coreidx(void *sbh);
  50 extern uint sb_coreunit(void *sbh);
  51 extern uint sb_corevendor(void *sbh);
  52 extern uint sb_corerev(void *sbh);
  53 extern void *sb_coreregs(void *sbh);
  54 extern uint32 sb_coreflags(void *sbh, uint32 mask, uint32 val);
  55 extern uint32 sb_coreflagshi(void *sbh, uint32 mask, uint32 val);
  56 extern bool sb_iscoreup(void *sbh);
  57 extern void *sb_setcoreidx(void *sbh, uint coreidx);
  58 extern void *sb_setcore(void *sbh, uint coreid, uint coreunit);
  59 extern void sb_commit(void *sbh);
  60 extern uint32 sb_base(uint32 admatch);
  61 extern uint32 sb_size(uint32 admatch);
  62 extern void sb_core_reset(void *sbh, uint32 bits);
  63 extern void sb_core_tofixup(void *sbh);
  64 extern void sb_core_disable(void *sbh, uint32 bits);
  65 extern uint32 sb_clock_rate(uint32 pll_type, uint32 n, uint32 m);
  66 extern uint32 sb_clock(void *sbh);
  67 extern void sb_pci_setup(void *sbh, uint32 *dmaoffset, uint coremask);
  68 extern void sb_pcmcia_init(void *sbh);
  69 extern void sb_watchdog(void *sbh, uint ticks);
  70 extern void *sb_gpiosetcore(void *sbh);
  71 extern uint32 sb_gpiocontrol(void *sbh, uint32 mask, uint32 val);
  72 extern uint32 sb_gpioouten(void *sbh, uint32 mask, uint32 val);
  73 extern uint32 sb_gpioout(void *sbh, uint32 mask, uint32 val);
  74 extern uint32 sb_gpioin(void *sbh);
  75 extern uint32 sb_gpiointpolarity(void *sbh, uint32 mask, uint32 val);
  76 extern uint32 sb_gpiointmask(void *sbh, uint32 mask, uint32 val);
  77 extern bool sb_taclear(void *sbh);
  78 extern void sb_pwrctl_init(void *sbh);
  79 extern uint16 sb_pwrctl_fast_pwrup_delay(void *sbh);
  80 extern bool sb_pwrctl_clk(void *sbh, uint mode);
  81 extern int sb_pwrctl_xtal(void *sbh, uint what, bool on);
  82 extern int sb_pwrctl_slowclk(void *sbh, bool set, uint *div);
  83 extern void sb_register_intr_callback(void *sbh, void *intrsoff_fn, void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg);
  84
  85 /* pwrctl xtal what flags */
  86 #define XTAL            0x1                     /* primary crystal oscillator (2050) */
  87 #define PLL             0x2                     /* main chip pll */
  88
  89 /* pwrctl clk mode */
  90 #define CLK_FAST        0                       /* force fast (pll) clock */
  91 #define CLK_SLOW        1                       /* force slow clock */
  92 #define CLK_DYNAMIC     2                       /* enable dynamic power control */
  93
  94 #endif  /* _sbutils_h_ */