target/linux/ixp4xx/patches-2.6.36/050-disable_dmabounce.patch

   1 --- a/arch/arm/Kconfig
   2 +++ b/arch/arm/Kconfig
   3 @@ -435,7 +435,6 @@ config ARCH_IXP4XX
   4         select CPU_XSCALE
   5         select GENERIC_GPIO
   6         select GENERIC_CLOCKEVENTS
   7 -       select DMABOUNCE if PCI
   8         help
   9           Support for Intel's IXP4XX (XScale) family of processors.
  10
  11 --- a/arch/arm/mach-ixp4xx/Kconfig
  12 +++ b/arch/arm/mach-ixp4xx/Kconfig
  13 @@ -199,6 +199,43 @@ config IXP4XX_INDIRECT_PCI
  14           need to use the indirect method instead. If you don't know
  15           what you need, leave this option unselected.
  16
  17 +config IXP4XX_LEGACY_DMABOUNCE
  18 +       bool "Legacy PCI DMA bounce support"
  19 +       depends on PCI
  20 +       default n
  21 +       select DMABOUNCE
  22 +       help
  23 +         The IXP4xx is limited to a 64MB window for PCI DMA, which
  24 +         requires that PCI accesses >= 64MB are bounced via buffers
  25 +         below 64MB.
  26 +
  27 +         The kernel has traditionally handled this issue by using ARM
  28 +         specific DMA bounce support code for all accesses >= 64MB.
  29 +         That code causes problems of its own, so it is desirable to
  30 +         disable it.
  31 +
  32 +         Enabling this option makes IXP4xx continue to use the problematic
  33 +         ARM DMA bounce code. Disabling this option makes IXP4xx use the
  34 +         kernel's generic bounce code.
  35 +
  36 +         Say 'N'.
  37 +
  38 +config IXP4XX_ZONE_DMA
  39 +       bool "Support > 64MB RAM"
  40 +       depends on !IXP4XX_LEGACY_DMABOUNCE
  41 +       default y
  42 +       select ZONE_DMA
  43 +       help
  44 +         The IXP4xx is limited to a 64MB window for PCI DMA, which
  45 +         requires that PCI accesses above 64MB are bounced via buffers
  46 +         below 64MB.
  47 +
  48 +         Disabling this option allows you to omit the support code for
  49 +         DMA-able memory allocations and DMA bouncing, but the kernel
  50 +         will then not work properly if more than 64MB of RAM is present.
  51 +
  52 +         Say 'Y' unless your platform is limited to <= 64MB of RAM.
  53 +
  54  config IXP4XX_QMGR
  55         tristate "IXP4xx Queue Manager support"
  56         help
  57 --- a/arch/arm/mach-ixp4xx/common-pci.c
  58 +++ b/arch/arm/mach-ixp4xx/common-pci.c
  59 @@ -321,27 +321,33 @@ static int abort_handler(unsigned long a
  60   */
  61  static int ixp4xx_pci_platform_notify(struct device *dev)
  62  {
  63 -       if(dev->bus == &pci_bus_type) {
  64 -               *dev->dma_mask =  SZ_64M - 1;
  65 +       if (dev->bus == &pci_bus_type) {
  66 +               *dev->dma_mask = SZ_64M - 1;
  67                 dev->coherent_dma_mask = SZ_64M - 1;
  68 +#ifdef CONFIG_DMABOUNCE
  69                 dmabounce_register_dev(dev, 2048, 4096);
  70 +#endif
  71         }
  72         return 0;
  73  }
  74
  75  static int ixp4xx_pci_platform_notify_remove(struct device *dev)
  76  {
  77 -       if(dev->bus == &pci_bus_type) {
  78 +#ifdef CONFIG_DMABOUNCE
  79 +       if (dev->bus == &pci_bus_type)
  80                 dmabounce_unregister_dev(dev);
  81 -       }
  82 +#endif
  83         return 0;
  84  }
  85
  86 -int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
  87 +#ifdef CONFIG_DMABOUNCE
  88 +int dma_needs_bounce_2(struct device *dev, dma_addr_t dma_addr, size_t size)
  89  {
  90 -       return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M);
  91 +       return (dev->bus == &pci_bus_type ) && ((dma_addr + size) > SZ_64M);
  92  }
  93 +#endif
  94
  95 +#ifdef CONFIG_ZONE_DMA
  96  /*
  97   * Only first 64MB of memory can be accessed via PCI.
  98   * We use GFP_DMA to allocate safe buffers to do map/unmap.
  99 @@ -364,6 +370,7 @@ void __init ixp4xx_adjust_zones(unsigned
 100         zhole_size[1] = zhole_size[0];
 101         zhole_size[0] = 0;
 102  }
 103 +#endif
 104
 105  void __init ixp4xx_pci_preinit(void)
 106  {
 107 --- a/arch/arm/mach-ixp4xx/include/mach/memory.h
 108 +++ b/arch/arm/mach-ixp4xx/include/mach/memory.h
 109 @@ -16,10 +16,12 @@
 110
 111  #if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
 112
 113 +#ifdef CONFIG_ZONE_DMA
 114  void ixp4xx_adjust_zones(unsigned long *size, unsigned long *holes);
 115
 116  #define arch_adjust_zones(size, holes) \
 117         ixp4xx_adjust_zones(size, holes)
 118 +#endif
 119
 120  #define ISA_DMA_THRESHOLD (SZ_64M - 1)
 121  #define MAX_DMA_ADDRESS                (PAGE_OFFSET + SZ_64M)
 122 --- a/arch/arm/common/dmabounce.c
 123 +++ b/arch/arm/common/dmabounce.c
 124 @@ -30,6 +30,7 @@
 125  #include <linux/dma-mapping.h>
 126  #include <linux/dmapool.h>
 127  #include <linux/list.h>
 128 +#include <linux/pci.h>
 129  #include <linux/scatterlist.h>
 130
 131  #include <asm/cacheflush.h>
 132 @@ -248,7 +249,13 @@ static inline dma_addr_t map_single(stru
 133                 needs_bounce = (dma_addr | (dma_addr + size - 1)) & ~mask;
 134         }
 135
 136 -       if (device_info && (needs_bounce || dma_needs_bounce(dev, dma_addr, size))) {
 137 +#ifdef CONFIG_DMABOUNCE
 138 +int dma_needs_bounce_2(struct device *dev, dma_addr_t dma_addr, size_t size)
 139 +{
 140 +       return (dev->bus == &pci_bus_type ) && ((dma_addr + size) > SZ_64M);
 141 +}
 142 +
 143 +       if (device_info && (needs_bounce || dma_needs_bounce_2(dev, dma_addr, size))) {
 144                 struct safe_buffer *buf;
 145
 146                 buf = alloc_safe_buffer(device_info, ptr, size, dir);
 147 @@ -282,6 +289,7 @@ static inline dma_addr_t map_single(stru
 148
 149         return dma_addr;
 150  }
 151 +#endif
 152
 153  static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
 154                 size_t size, enum dma_data_direction dir)