target/linux/omap24xx/patches-2.6.38/301-nokia-board-additional.patch

   1 --- a/arch/arm/mach-omap2/board-n8x0.c
   2 +++ b/arch/arm/mach-omap2/board-n8x0.c
   3 @@ -23,6 +23,9 @@
   4  #include <linux/spi/spi.h>
   5  #include <linux/usb/musb.h>
   6  #include <sound/tlv320aic3x.h>
   7 +#include <linux/input.h>
   8 +#include <linux/i2c/lm8323.h>
   9 +#include <linux/spi/tsc2005.h>
  10
  11  #include <asm/mach/arch.h>
  12  #include <asm/mach-types.h>
  13 @@ -36,6 +39,7 @@
  14  #include <plat/mmc.h>
  15  #include <plat/serial.h>
  16  #include <plat/cbus.h>
  17 +#include <plat/gpio-switch.h>
  18
  19  #include "mux.h"
  20
  21 @@ -43,6 +47,221 @@ static int slot1_cover_open;
  22  static int slot2_cover_open;
  23  static struct device *mmc_device;
  24
  25 +/* We map the FN key as LALT to workaround an X keycode problem.
  26 + * The XKB map needs to be adjusted to support this. */
  27 +#define MAP_FN_AS_LEFTALT
  28 +
  29 +static s16 rx44_keymap[LM8323_KEYMAP_SIZE] = {
  30 +       [0x01] = KEY_Q,
  31 +       [0x02] = KEY_K,
  32 +       [0x03] = KEY_O,
  33 +       [0x04] = KEY_P,
  34 +       [0x05] = KEY_BACKSPACE,
  35 +       [0x06] = KEY_A,
  36 +       [0x07] = KEY_S,
  37 +       [0x08] = KEY_D,
  38 +       [0x09] = KEY_F,
  39 +       [0x0a] = KEY_G,
  40 +       [0x0b] = KEY_H,
  41 +       [0x0c] = KEY_J,
  42 +
  43 +       [0x11] = KEY_W,
  44 +       [0x12] = KEY_F4,
  45 +       [0x13] = KEY_L,
  46 +       [0x14] = KEY_APOSTROPHE,
  47 +       [0x16] = KEY_Z,
  48 +       [0x17] = KEY_X,
  49 +       [0x18] = KEY_C,
  50 +       [0x19] = KEY_V,
  51 +       [0x1a] = KEY_B,
  52 +       [0x1b] = KEY_N,
  53 +       [0x1c] = KEY_LEFTSHIFT, /* Actually, this is both shift keys */
  54 +       [0x1f] = KEY_F7,
  55 +
  56 +       [0x21] = KEY_E,
  57 +       [0x22] = KEY_SEMICOLON,
  58 +       [0x23] = KEY_MINUS,
  59 +       [0x24] = KEY_EQUAL,
  60 +#ifdef MAP_FN_AS_LEFTALT
  61 +       [0x2b] = KEY_LEFTALT,
  62 +#else
  63 +       [0x2b] = KEY_FN,
  64 +#endif
  65 +       [0x2c] = KEY_M,
  66 +       [0x2f] = KEY_F8,
  67 +
  68 +       [0x31] = KEY_R,
  69 +       [0x32] = KEY_RIGHTCTRL,
  70 +       [0x34] = KEY_SPACE,
  71 +       [0x35] = KEY_COMMA,
  72 +       [0x37] = KEY_UP,
  73 +       [0x3c] = KEY_COMPOSE,
  74 +       [0x3f] = KEY_F6,
  75 +
  76 +       [0x41] = KEY_T,
  77 +       [0x44] = KEY_DOT,
  78 +       [0x46] = KEY_RIGHT,
  79 +       [0x4f] = KEY_F5,
  80 +       [0x51] = KEY_Y,
  81 +       [0x53] = KEY_DOWN,
  82 +       [0x55] = KEY_ENTER,
  83 +       [0x5f] = KEY_ESC,
  84 +
  85 +       [0x61] = KEY_U,
  86 +       [0x64] = KEY_LEFT,
  87 +
  88 +       [0x71] = KEY_I,
  89 +       [0x75] = KEY_KPENTER,
  90 +};
  91 +
  92 +static struct lm8323_platform_data lm8323_pdata = {
  93 +       .repeat         = 0, /* Repeat is handled in userspace for now. */
  94 +       .keymap         = rx44_keymap,
  95 +       .size_x         = 8,
  96 +       .size_y         = 12,
  97 +       .debounce_time  = 12,
  98 +       .active_time    = 500,
  99 +
 100 +       .name           = "Internal keyboard",
 101 +       .pwm_names[0]   = "n810::keyboard",
 102 +       .pwm_names[1]   = "n810::cover",
 103 +};
 104 +
 105 +#define OMAP_TAG_NOKIA_BT      0x4e01
 106 +
 107 +struct omap_bluetooth_config {
 108 +       u8    chip_type;
 109 +       u8    bt_wakeup_gpio;
 110 +       u8    host_wakeup_gpio;
 111 +       u8    reset_gpio;
 112 +       u8    bt_uart;
 113 +       u8    bd_addr[6];
 114 +       u8    bt_sysclk;
 115 +};
 116 +
 117 +static struct platform_device n8x0_bt_device = {
 118 +       .name           = "hci_h4p",
 119 +       .id             = -1,
 120 +       .num_resources  = 0,
 121 +};
 122 +
 123 +void __init n8x0_bt_init(void)
 124 +{
 125 +       const struct omap_bluetooth_config *bt_config;
 126 +
 127 +       bt_config = (void *) omap_get_config(OMAP_TAG_NOKIA_BT,
 128 +                                            struct omap_bluetooth_config);
 129 +       n8x0_bt_device.dev.platform_data = (void *) bt_config;
 130 +       if (platform_device_register(&n8x0_bt_device) < 0)
 131 +               BUG();
 132 +}
 133 +
 134 +#define        RX51_TSC2005_RESET_GPIO 94
 135 +#define        RX51_TSC2005_IRQ_GPIO   106
 136 +
 137 +#ifdef CONFIG_TOUCHSCREEN_TSC2005
 138 +static struct tsc2005_platform_data tsc2005_config;
 139 +static void rx51_tsc2005_set_reset(bool enable)
 140 +{
 141 +       gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
 142 +}
 143 +
 144 +static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
 145 +       .turbo_mode     = 0,
 146 +       .single_channel = 1,
 147 +};
 148 +#endif
 149 +
 150 +static void __init tsc2005_set_config(void)
 151 +{
 152 +       const struct omap_lcd_config *conf;
 153 +
 154 +       conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
 155 +       if (conf != NULL) {
 156 +#ifdef CONFIG_TOUCHSCREEN_TSC2005
 157 +               if (strcmp(conf->panel_name, "lph8923") == 0) {
 158 +                       tsc2005_config.ts_x_plate_ohm = 180;
 159 +                       tsc2005_config.ts_hw_avg = 0;
 160 +                       tsc2005_config.ts_ignore_last = 0;
 161 +                       tsc2005_config.ts_touch_pressure = 1500;
 162 +                       tsc2005_config.ts_stab_time = 100;
 163 +                       tsc2005_config.ts_pressure_max = 2048;
 164 +                       tsc2005_config.ts_pressure_fudge = 2;
 165 +                       tsc2005_config.ts_x_max = 4096;
 166 +                       tsc2005_config.ts_x_fudge = 4;
 167 +                       tsc2005_config.ts_y_max = 4096;
 168 +                       tsc2005_config.ts_y_fudge = 7;
 169 +                       tsc2005_config.set_reset = rx51_tsc2005_set_reset;
 170 +               } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
 171 +                       tsc2005_config.ts_x_plate_ohm = 280;
 172 +                       tsc2005_config.ts_hw_avg = 0;
 173 +                       tsc2005_config.ts_ignore_last = 0;
 174 +                       tsc2005_config.ts_touch_pressure = 1500;
 175 +                       tsc2005_config.ts_stab_time = 1000;
 176 +                       tsc2005_config.ts_pressure_max = 2048;
 177 +                       tsc2005_config.ts_pressure_fudge = 2;
 178 +                       tsc2005_config.ts_x_max = 4096;
 179 +                       tsc2005_config.ts_x_fudge = 4;
 180 +                       tsc2005_config.ts_y_max = 4096;
 181 +                       tsc2005_config.ts_y_fudge = 7;
 182 +                       tsc2005_config.set_reset = rx51_tsc2005_set_reset;
 183 +               } else {
 184 +                       printk(KERN_ERR "Unknown panel type, set default "
 185 +                              "touchscreen configuration\n");
 186 +                       tsc2005_config.ts_x_plate_ohm = 200;
 187 +                       tsc2005_config.ts_stab_time = 100;
 188 +               }
 189 +#endif
 190 +       }
 191 +}
 192 +
 193 +static struct omap2_mcspi_device_config mipid_mcspi_config = {
 194 +       .turbo_mode     = 0,
 195 +       .single_channel = 1,
 196 +};
 197 +
 198 +extern struct mipid_platform_data n8x0_mipid_platform_data;
 199 +
 200 +extern void n8x0_mipid_init(void);
 201 +extern void n8x0_blizzard_init(void);
 202 +
 203 +static struct omap_gpio_switch n8x0_gpio_switches[] __initdata = {
 204 +       {
 205 +               .name                   = "headphone",
 206 +               .gpio                   = -1,
 207 +               .debounce_rising        = 200,
 208 +               .debounce_falling       = 200,
 209 +       }, {
 210 +               .name                   = "cam_act",
 211 +               .gpio                   = -1,
 212 +               .debounce_rising        = 200,
 213 +               .debounce_falling       = 200,
 214 +       }, {
 215 +               .name                   = "cam_turn",
 216 +               .gpio                   = -1,
 217 +               .debounce_rising        = 100,
 218 +               .debounce_falling       = 100,
 219 +       }, {
 220 +               .name                   = "slide",
 221 +               .gpio                   = -1,
 222 +               .debounce_rising        = 200,
 223 +               .debounce_falling       = 200,
 224 +       }, {
 225 +               .name                   = "kb_lock",
 226 +               .gpio                   = -1,
 227 +               .debounce_rising        = 200,
 228 +               .debounce_falling       = 200,
 229 +       },
 230 +};
 231 +
 232 +static void __init n8x0_gpio_switches_init(void)
 233 +{
 234 +       /* The switches are actually registered through ATAG mechanism.
 235 +        * This just updates the parameters (thus .gpio is -1) */
 236 +       omap_register_gpio_switches(n8x0_gpio_switches,
 237 +                                   ARRAY_SIZE(n8x0_gpio_switches));
 238 +}
 239 +
 240  #define TUSB6010_ASYNC_CS      1
 241  #define TUSB6010_SYNC_CS       4
 242  #define TUSB6010_GPIO_INT      58
 243 @@ -146,12 +365,29 @@ static struct omap2_mcspi_device_config
 244
 245  static struct spi_board_info n800_spi_board_info[] __initdata = {
 246         {
 247 +               .modalias       = "lcd_mipid",
 248 +               .bus_num        = 1,
 249 +               .chip_select    = 1,
 250 +               .max_speed_hz   = 4000000,
 251 +               .controller_data= &mipid_mcspi_config,
 252 +               .platform_data  = &n8x0_mipid_platform_data,
 253 +       },
 254 +       {
 255                 .modalias       = "p54spi",
 256                 .bus_num        = 2,
 257                 .chip_select    = 0,
 258                 .max_speed_hz   = 48000000,
 259                 .controller_data = &p54spi_mcspi_config,
 260         },
 261 +       {
 262 +               .modalias        = "tsc2005",
 263 +               .bus_num         = 1,
 264 +               .chip_select     = 0,
 265 +               .irq             = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
 266 +               .max_speed_hz    = 6000000,
 267 +               .controller_data = &tsc2005_mcspi_config,
 268 +               .platform_data   = &tsc2005_config,
 269 +       },
 270  };
 271
 272  #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
 273 @@ -727,6 +963,11 @@ static struct aic3x_pdata n810_aic33_dat
 274  };
 275
 276  static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
 277 +       {
 278 +               I2C_BOARD_INFO("lm8323", 0x45),
 279 +               .irq            = OMAP_GPIO_IRQ(109),
 280 +               .platform_data  = &lm8323_pdata,
 281 +       },
 282         {
 283                 I2C_BOARD_INFO("tlv320aic3x", 0x18),
 284                 .platform_data = &n810_aic33_data,
 285 @@ -796,9 +1037,12 @@ static inline void board_serial_init(voi
 286  static void __init n8x0_init_machine(void)
 287  {
 288         omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
 289 +       n8x0_gpio_switches_init();
 290         n8x0_cbus_init();
 291 +       n8x0_bt_init();
 292
 293         /* FIXME: add n810 spi devices */
 294 +       tsc2005_set_config();
 295         spi_register_board_info(n800_spi_board_info,
 296                                 ARRAY_SIZE(n800_spi_board_info));
 297         omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
 298 @@ -808,6 +1052,8 @@ static void __init n8x0_init_machine(voi
 299                 i2c_register_board_info(2, n810_i2c_board_info_2,
 300                                         ARRAY_SIZE(n810_i2c_board_info_2));
 301         board_serial_init();
 302 +       n8x0_mipid_init();
 303 +       n8x0_blizzard_init();
 304         gpmc_onenand_init(board_onenand_data);
 305         n8x0_mmc_init();
 306         n8x0_usb_init();
 307 --- /dev/null
 308 +++ b/arch/arm/mach-omap2/board-n8x0-lcd.c
 309 @@ -0,0 +1,141 @@
 310 +/*
 311 + * linux/arch/arm/mach-omap2/board-n8x0.c
 312 + *
 313 + * Copyright (C) 2005-2009 Nokia Corporation
 314 + * Author: Juha Yrjola <juha.yrjola@nokia.com>
 315 + *
 316 + * Modified from mach-omap2/board-generic.c
 317 + *
 318 + * This program is free software; you can redistribute it and/or modify
 319 + * it under the terms of the GNU General Public License version 2 as
 320 + * published by the Free Software Foundation.
 321 + */
 322 +
 323 +#include <linux/clk.h>
 324 +#include <linux/delay.h>
 325 +#include <linux/gpio.h>
 326 +#include <linux/omapfb.h>
 327 +
 328 +#include <plat/lcd_mipid.h>
 329 +#include <plat/blizzard.h>
 330 +
 331 +#include <../drivers/cbus/tahvo.h>
 332 +
 333 +#define N8X0_BLIZZARD_POWERDOWN_GPIO   15
 334 +
 335 +// MIPID LCD Panel
 336 +
 337 +static void mipid_shutdown(struct mipid_platform_data *pdata)
 338 +{
 339 +       if (pdata->nreset_gpio != -1) {
 340 +               pr_info("shutdown LCD\n");
 341 +               gpio_set_value(pdata->nreset_gpio, 0);
 342 +               msleep(120);
 343 +       }
 344 +}
 345 +
 346 +struct mipid_platform_data n8x0_mipid_platform_data = {
 347 +       .shutdown = mipid_shutdown,
 348 +};
 349 +
 350 +void __init n8x0_mipid_init(void)
 351 +{
 352 +       const struct omap_lcd_config *conf;
 353 +       int err;
 354 +
 355 +       conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
 356 +       if (conf != NULL) {
 357 +               n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
 358 +               n8x0_mipid_platform_data.data_lines = conf->data_lines;
 359 +               if (conf->nreset_gpio != -1) {
 360 +                       err = gpio_request(conf->nreset_gpio, "MIPID nreset");
 361 +                       if (err) {
 362 +                               printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
 363 +                                      conf->nreset_gpio);
 364 +                       } else {
 365 +                               err = gpio_direction_output(conf->nreset_gpio, 1);
 366 +                               if (err) {
 367 +                                       printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
 368 +                                              conf->nreset_gpio);
 369 +                               }
 370 +                       }
 371 +               }
 372 +               printk(KERN_INFO "N8x0 MIPID config loaded");
 373 +       }
 374 +       else
 375 +               printk(KERN_INFO "N8x0 MIPID config not provided");
 376 +}
 377 +
 378 +
 379 +// Epson Blizzard LCD Controller
 380 +
 381 +static struct {
 382 +       struct clk *sys_ck;
 383 +} blizzard;
 384 +
 385 +static int blizzard_get_clocks(void)
 386 +{
 387 +       blizzard.sys_ck = clk_get(0, "osc_ck");
 388 +       if (IS_ERR(blizzard.sys_ck)) {
 389 +               printk(KERN_ERR "can't get Blizzard clock\n");
 390 +               return PTR_ERR(blizzard.sys_ck);
 391 +       }
 392 +       return 0;
 393 +}
 394 +
 395 +static unsigned long blizzard_get_clock_rate(struct device *dev)
 396 +{
 397 +       return clk_get_rate(blizzard.sys_ck);
 398 +}
 399 +
 400 +static void blizzard_enable_clocks(int enable)
 401 +{
 402 +       if (enable)
 403 +               clk_enable(blizzard.sys_ck);
 404 +       else
 405 +               clk_disable(blizzard.sys_ck);
 406 +}
 407 +
 408 +static void blizzard_power_up(struct device *dev)
 409 +{
 410 +       /* Vcore to 1.475V */
 411 +       tahvo_set_clear_reg_bits(0x07, 0, 0xf);
 412 +       msleep(10);
 413 +
 414 +       blizzard_enable_clocks(1);
 415 +       gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
 416 +}
 417 +
 418 +static void blizzard_power_down(struct device *dev)
 419 +{
 420 +       gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
 421 +       blizzard_enable_clocks(0);
 422 +
 423 +       /* Vcore to 1.005V */
 424 +       tahvo_set_clear_reg_bits(0x07, 0xf, 0);
 425 +}
 426 +
 427 +static struct blizzard_platform_data n8x0_blizzard_data = {
 428 +       .power_up       = blizzard_power_up,
 429 +       .power_down     = blizzard_power_down,
 430 +       .get_clock_rate = blizzard_get_clock_rate,
 431 +       .te_connected   = 1,
 432 +};
 433 +
 434 +void __init n8x0_blizzard_init(void)
 435 +{
 436 +       int r;
 437 +
 438 +       r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
 439 +       if (r < 0)
 440 +       {
 441 +               printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
 442 +               return;
 443 +       }
 444 +       gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
 445 +
 446 +       blizzard_get_clocks();
 447 +       omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
 448 +
 449 +       printk(KERN_INFO "N8x0 Blizzard initialized");
 450 +}
 451 --- a/arch/arm/mach-omap2/Makefile
 452 +++ b/arch/arm/mach-omap2/Makefile
 453 @@ -177,6 +177,7 @@ obj-$(CONFIG_MACH_OMAP_3430SDP)             += boar
 454                                            hsmmc.o \
 455                                            board-flash.o
 456  obj-$(CONFIG_MACH_NOKIA_N8X0)          += board-n8x0.o
 457 +obj-$(CONFIG_MACH_NOKIA_N8X0)          += board-n8x0-lcd.o
 458  obj-$(CONFIG_MACH_NOKIA_RM680)         += board-rm680.o \
 459                                            sdram-nokia.o \
 460                                            hsmmc.o
 461 --- /dev/null
 462 +++ b/arch/arm/plat-omap/include/plat/cbus.h
 463 @@ -0,0 +1,40 @@
 464 +/*
 465 + * cbus.h - CBUS platform_data definition
 466 + *
 467 + * Copyright (C) 2004 - 2009 Nokia Corporation
 468 + *
 469 + * Written by Felipe Balbi <felipe.balbi@nokia.com>
 470 + *
 471 + * This file is subject to the terms and conditions of the GNU General
 472 + * Public License. See the file "COPYING" in the main directory of this
 473 + * archive for more details.
 474 + *
 475 + * This program is distributed in the hope that it will be useful,
 476 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 477 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 478 + * GNU General Public License for more details.
 479 + *
 480 + * You should have received a copy of the GNU General Public License
 481 + * along with this program; if not, write to the Free Software
 482 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 483 + */
 484 +
 485 +#ifndef __PLAT_CBUS_H
 486 +#define __PLAT_CBUS_H
 487 +
 488 +#define CBUS_RETU_DEVICE_ID    0x01
 489 +#define CBUS_TAHVO_DEVICE_ID   0x02
 490 +
 491 +struct cbus_host_platform_data {
 492 +       int     dat_gpio;
 493 +       int     clk_gpio;
 494 +       int     sel_gpio;
 495 +};
 496 +
 497 +struct cbus_retu_platform_data {
 498 +       int     irq_base;
 499 +       int     irq_end;
 500 +       int     devid;
 501 +};
 502 +
 503 +#endif /* __PLAT_CBUS_H */
 504 --- a/arch/arm/plat-omap/include/plat/irqs.h
 505 +++ b/arch/arm/plat-omap/include/plat/irqs.h
 506 @@ -411,7 +411,20 @@
 507  #define TWL_IRQ_END            TWL6030_IRQ_END
 508  #endif
 509
 510 -#define NR_IRQS                        TWL_IRQ_END
 511 +/* GPMC related */
 512 +#define OMAP_GPMC_IRQ_BASE     (TWL_IRQ_END)
 513 +#define OMAP_GPMC_NR_IRQS      7
 514 +#define OMAP_GPMC_IRQ_END      (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
 515 +
 516 +#define CBUS_RETU_IRQ_BASE     OMAP_GPMC_IRQ_END
 517 +#ifdef CONFIG_CBUS_RETU
 518 +#define CBUS_RETU_NR_IRQS      16
 519 +#else
 520 +#define CBUS_RETU_NR_IRQS      0
 521 +#endif
 522 +#define CBUS_RETU_IRQ_END      (CBUS_RETU_IRQ_BASE + CBUS_RETU_NR_IRQS)
 523 +
 524 +#define NR_IRQS                        CBUS_RETU_IRQ_END
 525
 526  #define OMAP_IRQ_BIT(irq)      (1 << ((irq) % 32))
 527
 528 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
 529 +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
 530 @@ -673,6 +673,7 @@ static struct omap_hwmod_ocp_if *omap242
 531
 532  static struct omap_hwmod omap2420_gpio1_hwmod = {
 533         .name           = "gpio1",
 534 +       .flags          = HWMOD_INIT_NO_RESET, /* Workaround: Don't reset the n810 MIPID */
 535         .mpu_irqs       = omap242x_gpio1_irqs,
 536         .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio1_irqs),
 537         .main_clk       = "gpios_fck",