package/ltq-dsl/src/ifxmips_compat.h

   1 #ifndef _IFXMIPS_COMPAT_H__
   2 #define _IFXMIPS_COMPAT_H__
   3
   4 #define IFX_SUCCESS     0
   5 #define IFX_ERROR       (-1)
   6
   7 #define ATM_VBR_NRT     ATM_VBR
   8 #define ATM_VBR_RT      6
   9 #define ATM_UBR_PLUS    7
  10 #define ATM_GFR         8
  11
  12 #define NUM_ENTITY(x)   (sizeof(x) / sizeof(*(x)))
  13
  14 #define SET_BITS(x, msb, lsb, value)    \
  15     (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
  16
  17
  18 #define IFX_PP32_ETOP_CFG               0x16020
  19 #define IFX_PP32_ETOP_MDIO_CFG          0x11804
  20 #define IFX_PP32_ETOP_IG_PLEN_CTRL      0x16080
  21 #define IFX_PP32_ENET_MAC_CFG           0x1840
  22
  23 #define IFX_RCU_DOMAIN_PPE              (1 << 8)
  24 #define IFX_RCU_MODULE_ATM
  25
  26 #define IFX_PMU_ENABLE    1
  27 #define IFX_PMU_DISABLE   0
  28
  29 #define IFX_PMU_MODULE_DSL_DFE    (1 << 9)
  30 #define IFX_PMU_MODULE_AHBS               (1 << 13)
  31 #define IFX_PMU_MODULE_PPE_QSB    (1 << 18)
  32 #define IFX_PMU_MODULE_PPE_SLL01  (1 << 19)
  33 #define IFX_PMU_MODULE_PPE_TC     (1 << 21)
  34 #define IFX_PMU_MODULE_PPE_EMA    (1 << 22)
  35 #define IFX_PMU_MODULE_PPE_TOP    (1 << 29)
  36
  37 #define ifx_pmu_set(a,b)        {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);}
  38
  39 #define PPE_TOP_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))
  40 #define PPE_SLL01_PMU_SETUP(__x)  ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x))
  41 #define PPE_TC_PMU_SETUP(__x)     ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x))
  42 #define PPE_EMA_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x))
  43 #define PPE_QSB_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x))
  44 #define PPE_TPE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x))
  45 #define DSL_DFE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x))
  46
  47 #define IFX_REG_W32(_v, _r)               __raw_writel((_v), (_r))
  48
  49 #define CONFIG_IFXMIPS_DSL_CPE_MEI      y
  50
  51 #define INT_NUM_IM2_IRL24       (INT_NUM_IM2_IRL0 + 24)
  52
  53 #endif