2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 static unsigned char *ag71xx_speed_str(struct ag71xx
*ag
)
30 static void ag71xx_phy_link_update(struct ag71xx
*ag
)
32 struct ag71xx_platform_data
*pdata
= ag71xx_get_pdata(ag
);
39 netif_carrier_off(ag
->dev
);
40 if (netif_msg_link(ag
))
41 printk(KERN_INFO
"%s: link down\n", ag
->dev
->name
);
45 cfg2
= ag71xx_rr(ag
, AG71XX_REG_MAC_CFG2
);
46 cfg2
&= ~(MAC_CFG2_IF_1000
| MAC_CFG2_IF_10_100
| MAC_CFG2_FDX
);
47 cfg2
|= (ag
->duplex
) ? MAC_CFG2_FDX
: 0;
49 ifctl
= ag71xx_rr(ag
, AG71XX_REG_MAC_IFCTL
);
50 ifctl
&= ~(MAC_IFCTL_SPEED
);
52 fifo5
= ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG5
);
53 fifo5
&= ~FIFO_CFG5_BM
;
57 mii_speed
= MII_CTRL_SPEED_1000
;
58 cfg2
|= MAC_CFG2_IF_1000
;
59 fifo5
|= FIFO_CFG5_BM
;
62 mii_speed
= MII_CTRL_SPEED_100
;
63 cfg2
|= MAC_CFG2_IF_10_100
;
64 ifctl
|= MAC_IFCTL_SPEED
;
67 mii_speed
= MII_CTRL_SPEED_10
;
68 cfg2
|= MAC_CFG2_IF_10_100
;
75 ag71xx_wr(ag
, AG71XX_REG_FIFO_CFG3
,
76 pdata
->is_ar91xx
? 0x780fff : 0x008001ff);
79 pdata
->set_pll(ag
->speed
);
81 ag71xx_mii_ctrl_set_speed(ag
, mii_speed
);
83 ag71xx_wr(ag
, AG71XX_REG_MAC_CFG2
, cfg2
);
84 ag71xx_wr(ag
, AG71XX_REG_FIFO_CFG5
, fifo5
);
85 ag71xx_wr(ag
, AG71XX_REG_MAC_IFCTL
, ifctl
);
87 netif_carrier_on(ag
->dev
);
88 if (netif_msg_link(ag
))
89 printk(KERN_INFO
"%s: link up (%sMbps/%s duplex)\n",
92 (DUPLEX_FULL
== ag
->duplex
) ? "Full" : "Half");
94 DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
96 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG0
),
97 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG1
),
98 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG2
));
100 DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
102 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG3
),
103 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG4
),
104 ag71xx_rr(ag
, AG71XX_REG_FIFO_CFG5
));
106 DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
108 ag71xx_rr(ag
, AG71XX_REG_MAC_CFG2
),
109 ag71xx_rr(ag
, AG71XX_REG_MAC_IFCTL
),
110 ag71xx_mii_ctrl_rr(ag
));
113 static void ag71xx_phy_link_adjust(struct net_device
*dev
)
115 struct ag71xx
*ag
= netdev_priv(dev
);
116 struct phy_device
*phydev
= ag
->phy_dev
;
118 int status_change
= 0;
120 spin_lock_irqsave(&ag
->lock
, flags
);
123 if (ag
->duplex
!= phydev
->duplex
124 || ag
->speed
!= phydev
->speed
) {
129 if (phydev
->link
!= ag
->link
)
132 ag
->link
= phydev
->link
;
133 ag
->duplex
= phydev
->duplex
;
134 ag
->speed
= phydev
->speed
;
137 ag71xx_phy_link_update(ag
);
139 spin_unlock_irqrestore(&ag
->lock
, flags
);
142 void ag71xx_phy_start(struct ag71xx
*ag
)
145 phy_start(ag
->phy_dev
);
147 struct ag71xx_platform_data
*pdata
= ag71xx_get_pdata(ag
);
149 ag
->duplex
= pdata
->duplex
;
150 ag
->speed
= pdata
->speed
;
152 ag71xx_phy_link_update(ag
);
156 void ag71xx_phy_stop(struct ag71xx
*ag
)
159 phy_stop(ag
->phy_dev
);
164 ag71xx_phy_link_update(ag
);
168 static int ag71xx_phy_connect_fixed(struct ag71xx
*ag
)
170 struct net_device
*dev
= ag
->dev
;
171 struct ag71xx_platform_data
*pdata
= ag71xx_get_pdata(ag
);
174 /* use fixed settings */
175 switch (pdata
->speed
) {
181 printk(KERN_ERR
"%s: invalid speed specified\n",
190 static int ag71xx_phy_connect_multi(struct ag71xx
*ag
)
192 struct net_device
*dev
= ag
->dev
;
193 struct ag71xx_platform_data
*pdata
= ag71xx_get_pdata(ag
);
194 struct phy_device
*phydev
= NULL
;
199 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
200 if (!(pdata
->phy_mask
& (1 << phy_addr
)))
203 if (ag
->mii_bus
->phy_map
[phy_addr
] == NULL
)
206 DBG("%s: PHY found at %s, uid=%08x\n",
208 dev_name(&ag
->mii_bus
->phy_map
[phy_addr
]->dev
),
209 ag
->mii_bus
->phy_map
[phy_addr
]->phy_id
);
212 phydev
= ag
->mii_bus
->phy_map
[phy_addr
];
219 printk(KERN_ERR
"%s: no PHY found with phy_mask=%08x\n",
220 dev
->name
, pdata
->phy_mask
);
224 ag
->phy_dev
= phy_connect(dev
, dev_name(&phydev
->dev
),
225 &ag71xx_phy_link_adjust
, 0, pdata
->phy_if_mode
);
227 if (IS_ERR(ag
->phy_dev
)) {
228 printk(KERN_ERR
"%s: could not connect to PHY at %s\n",
229 dev
->name
, dev_name(&phydev
->dev
));
230 return PTR_ERR(ag
->phy_dev
);
233 /* mask with MAC supported features */
235 phydev
->supported
&= PHY_GBIT_FEATURES
;
237 phydev
->supported
&= PHY_BASIC_FEATURES
;
239 phydev
->advertising
= phydev
->supported
;
241 printk(KERN_DEBUG
"%s: connected to PHY at %s "
242 "[uid=%08x, driver=%s]\n",
243 dev
->name
, dev_name(&phydev
->dev
),
244 phydev
->phy_id
, phydev
->drv
->name
);
252 printk(KERN_DEBUG
"%s: connected to %d PHYs\n",
253 dev
->name
, phy_count
);
254 ret
= ag71xx_phy_connect_fixed(ag
);
261 int ag71xx_phy_connect(struct ag71xx
*ag
)
263 struct ag71xx_platform_data
*pdata
= ag71xx_get_pdata(ag
);
266 return ag71xx_phy_connect_multi(ag
);
268 return ag71xx_phy_connect_fixed(ag
);
271 void ag71xx_phy_disconnect(struct ag71xx
*ag
)
274 phy_disconnect(ag
->phy_dev
);
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