Fix endianness issues with adm5120eb, thanks to Gabor !
[openwrt.git] / package / acx / patches / 003-endianness-fixes.patch
1 diff -Nur -x '*.o' -x '*.ko' acx-20070101/pci.c acx-20070101.big/pci.c
2 --- acx-20070101/pci.c 2007-06-02 17:29:53.000000000 +0200
3 +++ acx-20070101.big/pci.c 2007-06-02 17:23:37.000000000 +0200
4 @@ -123,6 +123,11 @@
5 ** Register access
6 */
7
8 +#define acx_readl(v) le32_to_cpu(readl((v)))
9 +#define acx_readw(v) le16_to_cpu(readw((v)))
10 +#define acx_writew(v,r) writew(le16_to_cpu((v)), r)
11 +#define acx_writel(v,r) writel(le32_to_cpu((v)), r)
12 +
13 /* Pick one */
14 /* #define INLINE_IO static */
15 #define INLINE_IO static inline
16 @@ -131,17 +136,17 @@
17 read_reg32(acx_device_t *adev, unsigned int offset)
18 {
19 #if ACX_IO_WIDTH == 32
20 - return readl((u8 *)adev->iobase + adev->io[offset]);
21 + return acx_readl((u8 *)adev->iobase + adev->io[offset]);
22 #else
23 - return readw((u8 *)adev->iobase + adev->io[offset])
24 - + (readw((u8 *)adev->iobase + adev->io[offset] + 2) << 16);
25 + return acx_readw((u8 *)adev->iobase + adev->io[offset])
26 + + (acx_readw((u8 *)adev->iobase + adev->io[offset] + 2) << 16);
27 #endif
28 }
29
30 INLINE_IO u16
31 read_reg16(acx_device_t *adev, unsigned int offset)
32 {
33 - return readw((u8 *)adev->iobase + adev->io[offset]);
34 + return acx_readw((u8 *)adev->iobase + adev->io[offset]);
35 }
36
37 INLINE_IO u8
38 @@ -154,17 +159,17 @@
39 write_reg32(acx_device_t *adev, unsigned int offset, u32 val)
40 {
41 #if ACX_IO_WIDTH == 32
42 - writel(val, (u8 *)adev->iobase + adev->io[offset]);
43 + acx_writel(val, (u8 *)adev->iobase + adev->io[offset]);
44 #else
45 - writew(val & 0xffff, (u8 *)adev->iobase + adev->io[offset]);
46 - writew(val >> 16, (u8 *)adev->iobase + adev->io[offset] + 2);
47 + acx_writew(val & 0xffff, (u8 *)adev->iobase + adev->io[offset]);
48 + acx_writew(val >> 16, (u8 *)adev->iobase + adev->io[offset] + 2);
49 #endif
50 }
51
52 INLINE_IO void
53 write_reg16(acx_device_t *adev, unsigned int offset, u16 val)
54 {
55 - writew(val, (u8 *)adev->iobase + adev->io[offset]);
56 + acx_writew(val, (u8 *)adev->iobase + adev->io[offset]);
57 }
58
59 INLINE_IO void
60 @@ -192,7 +197,7 @@
61 {
62 /* fast version (accesses the first register, IO_ACX_SOFT_RESET,
63 * which should be safe): */
64 - return readl(adev->iobase) != 0xffffffff;
65 + return acx_readl(adev->iobase) != 0xffffffff;
66 }
67
68
69 @@ -835,7 +840,7 @@
70 static inline void
71 acxpci_write_cmd_type_status(acx_device_t *adev, u16 type, u16 status)
72 {
73 - writel(type | (status << 16), adev->cmd_area);
74 + acx_writel(type | (status << 16), adev->cmd_area);
75 write_flush(adev);
76 }
77
78 @@ -848,7 +853,7 @@
79 {
80 u32 cmd_type, cmd_status;
81
82 - cmd_type = readl(adev->cmd_area);
83 + cmd_type = acx_readl(adev->cmd_area);
84 cmd_status = (cmd_type >> 16);
85 cmd_type = (u16)cmd_type;
86
87 @@ -2415,12 +2420,12 @@
88 #endif
89 u32 info_type, info_status;
90
91 - info_type = readl(adev->info_area);
92 + info_type = acx_readl(adev->info_area);
93 info_status = (info_type >> 16);
94 info_type = (u16)info_type;
95
96 /* inform fw that we have read this info message */
97 - writel(info_type | 0x00010000, adev->info_area);
98 + acx_writel(info_type | 0x00010000, adev->info_area);
99 write_reg16(adev, IO_ACX_INT_TRIG, INT_TRIG_INFOACK);
100 write_flush(adev);
101
102 @@ -4209,8 +4214,8 @@
103 #define ENDIANNESS_STRING "running on a BIG-ENDIAN CPU\n"
104 #endif
105 log(L_INIT,
106 - ENDIANNESS_STRING
107 - "PCI module " ACX_RELEASE " initialized, "
108 + "acx: " ENDIANNESS_STRING
109 + "acx: PCI module " ACX_RELEASE " initialized, "
110 "waiting for cards to probe...\n"
111 );
112
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