[brcm63xx] add experimental support for 2.6.28.10, tested on bcm6338
[openwrt.git] / target / linux / brcm63xx / patches-2.6.28 / 001-add_broadcom_63xx_cpu_definitions.patch
1 From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001
2 From: Maxime Bizon <mbizon@freebox.fr>
3 Date: Fri, 18 Jul 2008 15:53:08 +0200
4 Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions.
5
6 Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
7 ---
8 arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++
9 arch/mips/mm/tlbex.c | 4 ++++
10 arch/mips/include/asm/cpu.h | 7 +++++++
11 3 files changed, 36 insertions(+), 0 deletions(-)
12
13 --- a/arch/mips/kernel/cpu-probe.c
14 +++ b/arch/mips/kernel/cpu-probe.c
15 @@ -154,6 +154,9 @@ void __init check_wait(void)
16 case CPU_25KF:
17 case CPU_PR4450:
18 case CPU_BCM3302:
19 + case CPU_BCM6338:
20 + case CPU_BCM6348:
21 + case CPU_BCM6358:
22 cpu_wait = r4k_wait;
23 break;
24
25 @@ -864,6 +867,7 @@ static inline void cpu_probe_broadcom(st
26 {
27 decode_configs(c);
28 switch (c->processor_id & 0xff00) {
29 + /* same as PRID_IMP_BCM6338 */
30 case PRID_IMP_BCM3302:
31 c->cputype = CPU_BCM3302;
32 __cpu_name[cpu] = "Broadcom BCM3302";
33 @@ -872,6 +876,26 @@ static inline void cpu_probe_broadcom(st
34 c->cputype = CPU_BCM4710;
35 __cpu_name[cpu] = "Broadcom BCM4710";
36 break;
37 + case PRID_IMP_BCM6345:
38 + c->cputype = CPU_BCM6345;
39 + __cpu_name[cpu] = "Broadcom BCM6345";
40 + break;
41 + case PRID_IMP_BCM6348:
42 + c->cputype = CPU_BCM6348;
43 + __cpu_name[cpu] = "Broadcom BCM6348";
44 + break;
45 + case PRID_IMP_BCM4350:
46 + switch (c->processor_id & 0xf0) {
47 + case PRID_REV_BCM6358:
48 + c->cputype = CPU_BCM6358;
49 + __cpu_name[cpu] = "Broadcom BCM6358";
50 + break;
51 + default:
52 + c->cputype = CPU_UNKNOWN;
53 + __cpu_name[cpu] = "Broadcom BCM63xx";
54 + break;
55 + }
56 + break;
57 }
58 }
59
60 --- a/arch/mips/mm/tlbex.c
61 +++ b/arch/mips/mm/tlbex.c
62 @@ -317,6 +317,10 @@ static void __cpuinit build_tlb_write_en
63 case CPU_BCM3302:
64 case CPU_BCM4710:
65 case CPU_LOONGSON2:
66 + case CPU_BCM6338:
67 + case CPU_BCM6345:
68 + case CPU_BCM6348:
69 + case CPU_BCM6358:
70 if (m4kc_tlbp_war())
71 uasm_i_nop(p);
72 tlbw(p);
73 --- a/arch/mips/include/asm/cpu.h
74 +++ b/arch/mips/include/asm/cpu.h
75 @@ -112,6 +112,12 @@
76
77 #define PRID_IMP_BCM4710 0x4000
78 #define PRID_IMP_BCM3302 0x9000
79 +#define PRID_IMP_BCM6338 0x9000
80 +#define PRID_IMP_BCM6345 0x8000
81 +#define PRID_IMP_BCM6348 0x9100
82 +#define PRID_IMP_BCM4350 0xA000
83 +#define PRID_REV_BCM6358 0x0010
84 +#define PRID_REV_BCM6368 0x0030
85
86 /*
87 * Definitions for 7:0 on legacy processors
88 @@ -198,6 +204,7 @@ enum cpu_type_enum {
89 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
90 CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
91 CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
92 + CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
93
94 /*
95 * MIPS64 class processors
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