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patch nvram library for new nas version (thx to Vincent Bernat)
[openwrt.git] / target / linux / generic-2.4 / patches / 000-linux_mips.patch
1 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/au1xxx_irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/au1xxx_irqmap.c
2 --- linux-2.4.32-rc1/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-19 15:09:26.000000000 +0100
3 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-30 09:01:27.000000000 +0100
4 @@ -172,14 +172,14 @@
5 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
6 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
7 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
8 - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
9 - { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
10 - { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
11 - { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
12 - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
13 - { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
14 - { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
15 - { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
16 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
17 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
18 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
19 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
20 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
21 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
22 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
23 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
24 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
25 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
26 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
27 @@ -200,14 +200,14 @@
28 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
29 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
30 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
31 - { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
32 - { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
33 - { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
34 - { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
35 - { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
36 - { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
37 - { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
38 - { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
39 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
40 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
41 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
42 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
43 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
44 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
45 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
46 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
47 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
48 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
49 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
50 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/cputable.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/cputable.c
51 --- linux-2.4.32-rc1/arch/mips/au1000/common/cputable.c 2005-01-19 15:09:26.000000000 +0100
52 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/cputable.c 2005-01-30 09:01:27.000000000 +0100
53 @@ -39,7 +39,8 @@
54 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
55 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
56 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
57 - { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
58 + { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
59 + { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
60 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
61 };
62
63 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/dbdma.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/dbdma.c
64 --- linux-2.4.32-rc1/arch/mips/au1000/common/dbdma.c 2005-01-19 15:09:26.000000000 +0100
65 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/dbdma.c 2005-02-08 07:28:37.000000000 +0100
66 @@ -41,6 +41,8 @@
67 #include <asm/au1xxx_dbdma.h>
68 #include <asm/system.h>
69
70 +#include <linux/module.h>
71 +
72 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
73
74 /*
75 @@ -60,37 +62,10 @@
76 */
77 #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
78
79 -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
80 -static int dbdma_initialized;
81 +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
82 +static int dbdma_initialized=0;
83 static void au1xxx_dbdma_init(void);
84
85 -typedef struct dbdma_device_table {
86 - u32 dev_id;
87 - u32 dev_flags;
88 - u32 dev_tsize;
89 - u32 dev_devwidth;
90 - u32 dev_physaddr; /* If FIFO */
91 - u32 dev_intlevel;
92 - u32 dev_intpolarity;
93 -} dbdev_tab_t;
94 -
95 -typedef struct dbdma_chan_config {
96 - u32 chan_flags;
97 - u32 chan_index;
98 - dbdev_tab_t *chan_src;
99 - dbdev_tab_t *chan_dest;
100 - au1x_dma_chan_t *chan_ptr;
101 - au1x_ddma_desc_t *chan_desc_base;
102 - au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
103 - void *chan_callparam;
104 - void (*chan_callback)(int, void *, struct pt_regs *);
105 -} chan_tab_t;
106 -
107 -#define DEV_FLAGS_INUSE (1 << 0)
108 -#define DEV_FLAGS_ANYUSE (1 << 1)
109 -#define DEV_FLAGS_OUT (1 << 2)
110 -#define DEV_FLAGS_IN (1 << 3)
111 -
112 static dbdev_tab_t dbdev_tab[] = {
113 #ifdef CONFIG_SOC_AU1550
114 /* UARTS */
115 @@ -156,13 +131,13 @@
116 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
117 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
118
119 - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
120 - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
121 - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
122 - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
123 + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
124 + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
125 + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
126 + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
127
128 - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
129 - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
130 + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
131 + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
132
133 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
134 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
135 @@ -172,9 +147,9 @@
136 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
137 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
138
139 - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
140 - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
141 - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
142 + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
143 + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
144 + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
145 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
146
147 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
148 @@ -183,6 +158,24 @@
149
150 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
151 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
152 +
153 + /* Provide 16 user definable device types */
154 + { 0, 0, 0, 0, 0, 0, 0 },
155 + { 0, 0, 0, 0, 0, 0, 0 },
156 + { 0, 0, 0, 0, 0, 0, 0 },
157 + { 0, 0, 0, 0, 0, 0, 0 },
158 + { 0, 0, 0, 0, 0, 0, 0 },
159 + { 0, 0, 0, 0, 0, 0, 0 },
160 + { 0, 0, 0, 0, 0, 0, 0 },
161 + { 0, 0, 0, 0, 0, 0, 0 },
162 + { 0, 0, 0, 0, 0, 0, 0 },
163 + { 0, 0, 0, 0, 0, 0, 0 },
164 + { 0, 0, 0, 0, 0, 0, 0 },
165 + { 0, 0, 0, 0, 0, 0, 0 },
166 + { 0, 0, 0, 0, 0, 0, 0 },
167 + { 0, 0, 0, 0, 0, 0, 0 },
168 + { 0, 0, 0, 0, 0, 0, 0 },
169 + { 0, 0, 0, 0, 0, 0, 0 },
170 };
171
172 #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
173 @@ -202,6 +195,30 @@
174 return NULL;
175 }
176
177 +u32
178 +au1xxx_ddma_add_device(dbdev_tab_t *dev)
179 +{
180 + u32 ret = 0;
181 + dbdev_tab_t *p=NULL;
182 + static u16 new_id=0x1000;
183 +
184 + p = find_dbdev_id(0);
185 + if ( NULL != p )
186 + {
187 + memcpy(p, dev, sizeof(dbdev_tab_t));
188 + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
189 + ret = p->dev_id;
190 + new_id++;
191 +#if 0
192 + printk("add_device: id:%x flags:%x padd:%x\n",
193 + p->dev_id, p->dev_flags, p->dev_physaddr );
194 +#endif
195 + }
196 +
197 + return ret;
198 +}
199 +EXPORT_SYMBOL(au1xxx_ddma_add_device);
200 +
201 /* Allocate a channel and return a non-zero descriptor if successful.
202 */
203 u32
204 @@ -214,7 +231,7 @@
205 int i;
206 dbdev_tab_t *stp, *dtp;
207 chan_tab_t *ctp;
208 - volatile au1x_dma_chan_t *cp;
209 + au1x_dma_chan_t *cp;
210
211 /* We do the intialization on the first channel allocation.
212 * We have to wait because of the interrupt handler initialization
213 @@ -224,9 +241,6 @@
214 au1xxx_dbdma_init();
215 dbdma_initialized = 1;
216
217 - if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
218 - return 0;
219 -
220 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
221 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
222
223 @@ -268,9 +282,9 @@
224 /* If kmalloc fails, it is caught below same
225 * as a channel not available.
226 */
227 - ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
228 + ctp = (chan_tab_t *)
229 + kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
230 chan_tab_ptr[i] = ctp;
231 - ctp->chan_index = chan = i;
232 break;
233 }
234 }
235 @@ -278,10 +292,11 @@
236
237 if (ctp != NULL) {
238 memset(ctp, 0, sizeof(chan_tab_t));
239 + ctp->chan_index = chan = i;
240 dcp = DDMA_CHANNEL_BASE;
241 dcp += (0x0100 * chan);
242 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
243 - cp = (volatile au1x_dma_chan_t *)dcp;
244 + cp = (au1x_dma_chan_t *)dcp;
245 ctp->chan_src = stp;
246 ctp->chan_dest = dtp;
247 ctp->chan_callback = callback;
248 @@ -298,6 +313,9 @@
249 i |= DDMA_CFG_DED;
250 if (dtp->dev_intpolarity)
251 i |= DDMA_CFG_DP;
252 + if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
253 + (dtp->dev_flags & DEV_FLAGS_SYNC))
254 + i |= DDMA_CFG_SYNC;
255 cp->ddma_cfg = i;
256 au_sync();
257
258 @@ -308,14 +326,14 @@
259 rv = (u32)(&chan_tab_ptr[chan]);
260 }
261 else {
262 - /* Release devices.
263 - */
264 + /* Release devices */
265 stp->dev_flags &= ~DEV_FLAGS_INUSE;
266 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
267 }
268 }
269 return rv;
270 }
271 +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
272
273 /* Set the device width if source or destination is a FIFO.
274 * Should be 8, 16, or 32 bits.
275 @@ -343,6 +361,7 @@
276
277 return rv;
278 }
279 +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
280
281 /* Allocate a descriptor ring, initializing as much as possible.
282 */
283 @@ -369,7 +388,8 @@
284 * and if we try that first we are likely to not waste larger
285 * slabs of memory.
286 */
287 - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
288 + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
289 + GFP_KERNEL|GFP_DMA);
290 if (desc_base == 0)
291 return 0;
292
293 @@ -380,7 +400,7 @@
294 kfree((const void *)desc_base);
295 i = entries * sizeof(au1x_ddma_desc_t);
296 i += (sizeof(au1x_ddma_desc_t) - 1);
297 - if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
298 + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
299 return 0;
300
301 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
302 @@ -460,9 +480,14 @@
303 /* If source input is fifo, set static address.
304 */
305 if (stp->dev_flags & DEV_FLAGS_IN) {
306 - src0 = stp->dev_physaddr;
307 - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
308 + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
309 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
310 + else
311 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
312 +
313 }
314 + if (stp->dev_physaddr)
315 + src0 = stp->dev_physaddr;
316
317 /* Set up dest1. For now, assume no stride and increment.
318 * A channel attribute update can change this later.
319 @@ -486,10 +511,18 @@
320 /* If destination output is fifo, set static address.
321 */
322 if (dtp->dev_flags & DEV_FLAGS_OUT) {
323 - dest0 = dtp->dev_physaddr;
324 + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
325 + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
326 + else
327 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
328 }
329 + if (dtp->dev_physaddr)
330 + dest0 = dtp->dev_physaddr;
331
332 +#if 0
333 + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
334 + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
335 +#endif
336 for (i=0; i<entries; i++) {
337 dp->dscr_cmd0 = cmd0;
338 dp->dscr_cmd1 = cmd1;
339 @@ -498,6 +531,7 @@
340 dp->dscr_dest0 = dest0;
341 dp->dscr_dest1 = dest1;
342 dp->dscr_stat = 0;
343 + dp->sw_context = dp->sw_status = 0;
344 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
345 dp++;
346 }
347 @@ -510,13 +544,14 @@
348
349 return (u32)(ctp->chan_desc_base);
350 }
351 +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
352
353 /* Put a source buffer into the DMA ring.
354 * This updates the source pointer and byte count. Normally used
355 * for memory to fifo transfers.
356 */
357 u32
358 -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
359 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
360 {
361 chan_tab_t *ctp;
362 au1x_ddma_desc_t *dp;
363 @@ -543,24 +578,40 @@
364 */
365 dp->dscr_source0 = virt_to_phys(buf);
366 dp->dscr_cmd1 = nbytes;
367 - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
368 - ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */
369 -
370 + /* Check flags */
371 + if (flags & DDMA_FLAGS_IE)
372 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
373 + if (flags & DDMA_FLAGS_NOIE)
374 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
375 /* Get next descriptor pointer.
376 */
377 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
378
379 + /*
380 + * There is an errata on the Au1200/Au1550 parts that could result
381 + * in "stale" data being DMA'd. It has to do with the snoop logic on
382 + * the dache eviction buffer. NONCOHERENT_IO is on by default for
383 + * these parts. If it is fixedin the future, these dma_cache_inv will
384 + * just be nothing more than empty macros. See io.h.
385 + * */
386 + dma_cache_wback_inv(buf,nbytes);
387 + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
388 + au_sync();
389 + dma_cache_wback_inv(dp, sizeof(dp));
390 + ctp->chan_ptr->ddma_dbell = 0;
391 +
392 /* return something not zero.
393 */
394 return nbytes;
395 }
396 +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
397
398 /* Put a destination buffer into the DMA ring.
399 * This updates the destination pointer and byte count. Normally used
400 * to place an empty buffer into the ring for fifo to memory transfers.
401 */
402 u32
403 -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
404 +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
405 {
406 chan_tab_t *ctp;
407 au1x_ddma_desc_t *dp;
408 @@ -582,11 +633,33 @@
409 if (dp->dscr_cmd0 & DSCR_CMD0_V)
410 return 0;
411
412 - /* Load up buffer address and byte count.
413 - */
414 + /* Load up buffer address and byte count */
415 +
416 + /* Check flags */
417 + if (flags & DDMA_FLAGS_IE)
418 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
419 + if (flags & DDMA_FLAGS_NOIE)
420 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
421 +
422 dp->dscr_dest0 = virt_to_phys(buf);
423 dp->dscr_cmd1 = nbytes;
424 +#if 0
425 + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
426 + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
427 + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
428 +#endif
429 + /*
430 + * There is an errata on the Au1200/Au1550 parts that could result in
431 + * "stale" data being DMA'd. It has to do with the snoop logic on the
432 + * dache eviction buffer. NONCOHERENT_IO is on by default for these
433 + * parts. If it is fixedin the future, these dma_cache_inv will just
434 + * be nothing more than empty macros. See io.h.
435 + * */
436 + dma_cache_inv(buf,nbytes);
437 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
438 + au_sync();
439 + dma_cache_wback_inv(dp, sizeof(dp));
440 + ctp->chan_ptr->ddma_dbell = 0;
441
442 /* Get next descriptor pointer.
443 */
444 @@ -596,6 +669,7 @@
445 */
446 return nbytes;
447 }
448 +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
449
450 /* Get a destination buffer into the DMA ring.
451 * Normally used to get a full buffer from the ring during fifo
452 @@ -645,7 +719,7 @@
453 au1xxx_dbdma_stop(u32 chanid)
454 {
455 chan_tab_t *ctp;
456 - volatile au1x_dma_chan_t *cp;
457 + au1x_dma_chan_t *cp;
458 int halt_timeout = 0;
459
460 ctp = *((chan_tab_t **)chanid);
461 @@ -665,6 +739,7 @@
462 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
463 au_sync();
464 }
465 +EXPORT_SYMBOL(au1xxx_dbdma_stop);
466
467 /* Start using the current descriptor pointer. If the dbdma encounters
468 * a not valid descriptor, it will stop. In this case, we can just
469 @@ -674,17 +749,17 @@
470 au1xxx_dbdma_start(u32 chanid)
471 {
472 chan_tab_t *ctp;
473 - volatile au1x_dma_chan_t *cp;
474 + au1x_dma_chan_t *cp;
475
476 ctp = *((chan_tab_t **)chanid);
477 -
478 cp = ctp->chan_ptr;
479 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
480 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
481 au_sync();
482 - cp->ddma_dbell = 0xffffffff; /* Make it go */
483 + cp->ddma_dbell = 0;
484 au_sync();
485 }
486 +EXPORT_SYMBOL(au1xxx_dbdma_start);
487
488 void
489 au1xxx_dbdma_reset(u32 chanid)
490 @@ -703,15 +778,21 @@
491
492 do {
493 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
494 + /* reset our SW status -- this is used to determine
495 + * if a descriptor is in use by upper level SW. Since
496 + * posting can reset 'V' bit.
497 + */
498 + dp->sw_status = 0;
499 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
500 } while (dp != ctp->chan_desc_base);
501 }
502 +EXPORT_SYMBOL(au1xxx_dbdma_reset);
503
504 u32
505 au1xxx_get_dma_residue(u32 chanid)
506 {
507 chan_tab_t *ctp;
508 - volatile au1x_dma_chan_t *cp;
509 + au1x_dma_chan_t *cp;
510 u32 rv;
511
512 ctp = *((chan_tab_t **)chanid);
513 @@ -746,15 +827,16 @@
514
515 kfree(ctp);
516 }
517 +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
518
519 static void
520 dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
521 {
522 - u32 intstat;
523 + u32 intstat, flags;
524 u32 chan_index;
525 chan_tab_t *ctp;
526 au1x_ddma_desc_t *dp;
527 - volatile au1x_dma_chan_t *cp;
528 + au1x_dma_chan_t *cp;
529
530 intstat = dbdma_gptr->ddma_intstat;
531 au_sync();
532 @@ -773,18 +855,26 @@
533 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
534
535 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
536 -
537 }
538
539 -static void
540 -au1xxx_dbdma_init(void)
541 +static void au1xxx_dbdma_init(void)
542 {
543 + int irq_nr;
544 +
545 dbdma_gptr->ddma_config = 0;
546 dbdma_gptr->ddma_throttle = 0;
547 dbdma_gptr->ddma_inten = 0xffff;
548 au_sync();
549
550 - if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
551 +#if defined(CONFIG_SOC_AU1550)
552 + irq_nr = AU1550_DDMA_INT;
553 +#elif defined(CONFIG_SOC_AU1200)
554 + irq_nr = AU1200_DDMA_INT;
555 +#else
556 + #error Unknown Au1x00 SOC
557 +#endif
558 +
559 + if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
560 "Au1xxx dbdma", (void *)dbdma_gptr))
561 printk("Can't get 1550 dbdma irq");
562 }
563 @@ -795,7 +885,8 @@
564 chan_tab_t *ctp;
565 au1x_ddma_desc_t *dp;
566 dbdev_tab_t *stp, *dtp;
567 - volatile au1x_dma_chan_t *cp;
568 + au1x_dma_chan_t *cp;
569 + u32 i = 0;
570
571 ctp = *((chan_tab_t **)chanid);
572 stp = ctp->chan_src;
573 @@ -820,15 +911,64 @@
574 dp = ctp->chan_desc_base;
575
576 do {
577 - printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
578 - (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
579 - printk("src0 %08x, src1 %08x, dest0 %08x\n",
580 - dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
581 - printk("dest1 %08x, stat %08x, nxtptr %08x\n",
582 - dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
583 + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
584 + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
585 + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
586 + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
587 + printk("stat %08x, nxtptr %08x\n",
588 + dp->dscr_stat, dp->dscr_nxtptr);
589 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
590 } while (dp != ctp->chan_desc_base);
591 }
592
593 +/* Put a descriptor into the DMA ring.
594 + * This updates the source/destination pointers and byte count.
595 + */
596 +u32
597 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
598 +{
599 + chan_tab_t *ctp;
600 + au1x_ddma_desc_t *dp;
601 + u32 nbytes=0;
602 +
603 + /* I guess we could check this to be within the
604 + * range of the table......
605 + */
606 + ctp = *((chan_tab_t **)chanid);
607 +
608 + /* We should have multiple callers for a particular channel,
609 + * an interrupt doesn't affect this pointer nor the descriptor,
610 + * so no locking should be needed.
611 + */
612 + dp = ctp->put_ptr;
613 +
614 + /* If the descriptor is valid, we are way ahead of the DMA
615 + * engine, so just return an error condition.
616 + */
617 + if (dp->dscr_cmd0 & DSCR_CMD0_V)
618 + return 0;
619 +
620 + /* Load up buffer addresses and byte count.
621 + */
622 + dp->dscr_dest0 = dscr->dscr_dest0;
623 + dp->dscr_source0 = dscr->dscr_source0;
624 + dp->dscr_dest1 = dscr->dscr_dest1;
625 + dp->dscr_source1 = dscr->dscr_source1;
626 + dp->dscr_cmd1 = dscr->dscr_cmd1;
627 + nbytes = dscr->dscr_cmd1;
628 + /* Allow the caller to specifiy if an interrupt is generated */
629 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
630 + dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
631 + ctp->chan_ptr->ddma_dbell = 0;
632 +
633 + /* Get next descriptor pointer.
634 + */
635 + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
636 +
637 + /* return something not zero.
638 + */
639 + return nbytes;
640 +}
641 +
642 #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
643
644 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/gpio.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/gpio.c
645 --- linux-2.4.32-rc1/arch/mips/au1000/common/gpio.c 1970-01-01 01:00:00.000000000 +0100
646 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/gpio.c 2005-01-30 09:01:27.000000000 +0100
647 @@ -0,0 +1,118 @@
648 +/*
649 + * This program is free software; you can redistribute it and/or modify it
650 + * under the terms of the GNU General Public License as published by the
651 + * Free Software Foundation; either version 2 of the License, or (at your
652 + * option) any later version.
653 + *
654 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
655 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
656 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
657 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
658 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
659 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
660 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
661 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
662 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
663 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
664 + *
665 + * You should have received a copy of the GNU General Public License along
666 + * with this program; if not, write to the Free Software Foundation, Inc.,
667 + * 675 Mass Ave, Cambridge, MA 02139, USA.
668 + */
669 +
670 +#include <asm/au1000.h>
671 +#include <asm/au1xxx_gpio.h>
672 +
673 +#define gpio1 sys
674 +#if !defined(CONFIG_SOC_AU1000)
675 +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
676 +
677 +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
678 +
679 +int au1xxx_gpio2_read(int signal)
680 +{
681 + signal -= 200;
682 +/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
683 + return ((gpio2->pinstate >> signal) & 0x01);
684 +}
685 +
686 +void au1xxx_gpio2_write(int signal, int value)
687 +{
688 + signal -= 200;
689 +
690 + gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
691 + (value << signal);
692 +}
693 +
694 +void au1xxx_gpio2_tristate(int signal)
695 +{
696 + signal -= 200;
697 + gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
698 +}
699 +#endif
700 +
701 +int au1xxx_gpio1_read(int signal)
702 +{
703 +/* gpio1->trioutclr |= (0x01 << signal); */
704 + return ((gpio1->pinstaterd >> signal) & 0x01);
705 +}
706 +
707 +void au1xxx_gpio1_write(int signal, int value)
708 +{
709 + if(value)
710 + gpio1->outputset = (0x01 << signal);
711 + else
712 + gpio1->outputclr = (0x01 << signal); /* Output a Zero */
713 +}
714 +
715 +void au1xxx_gpio1_tristate(int signal)
716 +{
717 + gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
718 +}
719 +
720 +
721 +int au1xxx_gpio_read(int signal)
722 +{
723 + if(signal >= 200)
724 +#if defined(CONFIG_SOC_AU1000)
725 + return 0;
726 +#else
727 + return au1xxx_gpio2_read(signal);
728 +#endif
729 + else
730 + return au1xxx_gpio1_read(signal);
731 +}
732 +
733 +void au1xxx_gpio_write(int signal, int value)
734 +{
735 + if(signal >= 200)
736 +#if defined(CONFIG_SOC_AU1000)
737 + ;
738 +#else
739 + au1xxx_gpio2_write(signal, value);
740 +#endif
741 + else
742 + au1xxx_gpio1_write(signal, value);
743 +}
744 +
745 +void au1xxx_gpio_tristate(int signal)
746 +{
747 + if(signal >= 200)
748 +#if defined(CONFIG_SOC_AU1000)
749 + ;
750 +#else
751 + au1xxx_gpio2_tristate(signal);
752 +#endif
753 + else
754 + au1xxx_gpio1_tristate(signal);
755 +}
756 +
757 +void au1xxx_gpio1_set_inputs(void)
758 +{
759 + gpio1->pininputen = 0;
760 +}
761 +
762 +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
763 +EXPORT_SYMBOL(au1xxx_gpio_tristate);
764 +EXPORT_SYMBOL(au1xxx_gpio_write);
765 +EXPORT_SYMBOL(au1xxx_gpio_read);
766 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/irq.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/irq.c
767 --- linux-2.4.32-rc1/arch/mips/au1000/common/irq.c 2005-01-19 15:09:26.000000000 +0100
768 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/irq.c 2005-03-13 08:56:57.000000000 +0100
769 @@ -303,8 +303,30 @@
770 };
771
772 #ifdef CONFIG_PM
773 -void startup_match20_interrupt(void)
774 +void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *))
775 {
776 + static struct irqaction action;
777 + /* This is a big problem.... since we didn't use request_irq
778 + when kernel/irq.c calls probe_irq_xxx this interrupt will
779 + be probed for usage. This will end up disabling the device :(
780 +
781 + Give it a bogus "action" pointer -- this will keep it from
782 + getting auto-probed!
783 +
784 + By setting the status to match that of request_irq() we
785 + can avoid it. --cgray
786 + */
787 + action.dev_id = handler;
788 + action.flags = 0;
789 + action.mask = 0;
790 + action.name = "Au1xxx TOY";
791 + action.handler = handler;
792 + action.next = NULL;
793 +
794 + irq_desc[AU1000_TOY_MATCH2_INT].action = &action;
795 + irq_desc[AU1000_TOY_MATCH2_INT].status
796 + &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
797 +
798 local_enable_irq(AU1000_TOY_MATCH2_INT);
799 }
800 #endif
801 @@ -508,6 +530,7 @@
802
803 if (!intc0_req0) return;
804
805 +#ifdef AU1000_USB_DEV_REQ_INT
806 /*
807 * Because of the tight timing of SETUP token to reply
808 * transactions, the USB devices-side packet complete
809 @@ -518,6 +541,7 @@
810 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
811 return;
812 }
813 +#endif
814
815 irq = au_ffs(intc0_req0) - 1;
816 intc0_req0 &= ~(1<<irq);
817 @@ -536,17 +560,7 @@
818
819 irq = au_ffs(intc0_req1) - 1;
820 intc0_req1 &= ~(1<<irq);
821 -#ifdef CONFIG_PM
822 - if (irq == AU1000_TOY_MATCH2_INT) {
823 - mask_and_ack_rise_edge_irq(irq);
824 - counter0_irq(irq, NULL, regs);
825 - local_enable_irq(irq);
826 - }
827 - else
828 -#endif
829 - {
830 - do_IRQ(irq, regs);
831 - }
832 + do_IRQ(irq, regs);
833 }
834
835
836 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/common/Makefile
837 --- linux-2.4.32-rc1/arch/mips/au1000/common/Makefile 2005-01-19 15:09:26.000000000 +0100
838 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/Makefile 2005-01-30 09:01:27.000000000 +0100
839 @@ -19,9 +19,9 @@
840 export-objs = prom.o clocks.o power.o usbdev.o
841
842 obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
843 - au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
844 + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
845
846 -export-objs += dma.o dbdma.o
847 +export-objs += dma.o dbdma.o gpio.o
848
849 obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
850 obj-$(CONFIG_KGDB) += dbg_io.o
851 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/pci_fixup.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/pci_fixup.c
852 --- linux-2.4.32-rc1/arch/mips/au1000/common/pci_fixup.c 2005-01-19 15:09:26.000000000 +0100
853 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/pci_fixup.c 2004-12-03 09:00:32.000000000 +0100
854 @@ -75,9 +75,13 @@
855
856 #ifdef CONFIG_NONCOHERENT_IO
857 /*
858 - * Set the NC bit in controller for pre-AC silicon
859 + * Set the NC bit in controller for Au1500 pre-AC silicon
860 */
861 - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
862 + u32 prid = read_c0_prid();
863 + if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
864 + au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
865 + printk("Non-coherent PCI accesses enabled\n");
866 + }
867 printk("Non-coherent PCI accesses enabled\n");
868 #endif
869
870 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/pci_ops.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/pci_ops.c
871 --- linux-2.4.32-rc1/arch/mips/au1000/common/pci_ops.c 2004-02-18 14:36:30.000000000 +0100
872 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/pci_ops.c 2005-02-27 23:14:24.000000000 +0100
873 @@ -162,6 +162,7 @@
874 static int config_access(unsigned char access_type, struct pci_dev *dev,
875 unsigned char where, u32 * data)
876 {
877 + int error = PCIBIOS_SUCCESSFUL;
878 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
879 unsigned char bus = dev->bus->number;
880 unsigned int dev_fn = dev->devfn;
881 @@ -170,7 +171,6 @@
882 unsigned long offset, status;
883 unsigned long cfg_base;
884 unsigned long flags;
885 - int error = PCIBIOS_SUCCESSFUL;
886 unsigned long entryLo0, entryLo1;
887
888 if (device > 19) {
889 @@ -205,9 +205,8 @@
890 last_entryLo0 = last_entryLo1 = 0xffffffff;
891 }
892
893 - /* Since the Au1xxx doesn't do the idsel timing exactly to spec,
894 - * many board vendors implement their own off-chip idsel, so call
895 - * it now. If it doesn't succeed, may as well bail out at this point.
896 + /* Allow board vendors to implement their own off-chip idsel.
897 + * If it doesn't succeed, may as well bail out at this point.
898 */
899 if (board_pci_idsel) {
900 if (board_pci_idsel(device, 1) == 0) {
901 @@ -271,8 +270,11 @@
902 }
903
904 local_irq_restore(flags);
905 - return error;
906 +#else
907 + /* Fake out Config space access with no responder */
908 + *data = 0xFFFFFFFF;
909 #endif
910 + return error;
911 }
912 #endif
913
914 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/power.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/power.c
915 --- linux-2.4.32-rc1/arch/mips/au1000/common/power.c 2005-01-19 15:09:26.000000000 +0100
916 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/power.c 2005-04-07 02:37:19.000000000 +0200
917 @@ -50,7 +50,6 @@
918
919 static void calibrate_delay(void);
920
921 -extern void set_au1x00_speed(unsigned int new_freq);
922 extern unsigned int get_au1x00_speed(void);
923 extern unsigned long get_au1x00_uart_baud_base(void);
924 extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
925 @@ -116,6 +115,7 @@
926 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
927 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
928
929 +#ifndef CONFIG_SOC_AU1200
930 /* Shutdown USB host/device.
931 */
932 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
933 @@ -127,6 +127,7 @@
934
935 sleep_usbdev_enable = au_readl(USBD_ENABLE);
936 au_writel(0, USBD_ENABLE); au_sync();
937 +#endif
938
939 /* Save interrupt controller state.
940 */
941 @@ -212,14 +213,12 @@
942 int au_sleep(void)
943 {
944 unsigned long wakeup, flags;
945 - extern void save_and_sleep(void);
946 + extern unsigned int save_and_sleep(void);
947
948 spin_lock_irqsave(&pm_lock,flags);
949
950 save_core_regs();
951
952 - flush_cache_all();
953 -
954 /** The code below is all system dependent and we should probably
955 ** have a function call out of here to set this up. You need
956 ** to configure the GPIO or timer interrupts that will bring
957 @@ -227,27 +226,26 @@
958 ** For testing, the TOY counter wakeup is useful.
959 **/
960
961 -#if 0
962 +#if 1
963 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
964
965 /* gpio 6 can cause a wake up event */
966 wakeup = au_readl(SYS_WAKEMSK);
967 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
968 - wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
969 + wakeup = 1 << 5; /* turn on gpio 6 wakeup */
970 #else
971 - /* For testing, allow match20 to wake us up.
972 - */
973 + /* For testing, allow match20 to wake us up. */
974 #ifdef SLEEP_TEST_TIMEOUT
975 wakeup_counter0_set(sleep_ticks);
976 #endif
977 wakeup = 1 << 8; /* turn on match20 wakeup */
978 wakeup = 0;
979 #endif
980 - au_writel(1, SYS_WAKESRC); /* clear cause */
981 + au_writel(0, SYS_WAKESRC); /* clear cause */
982 au_sync();
983 au_writel(wakeup, SYS_WAKEMSK);
984 au_sync();
985 -
986 + DPRINTK("Entering sleep!\n");
987 save_and_sleep();
988
989 /* after a wakeup, the cpu vectors back to 0x1fc00000 so
990 @@ -255,6 +253,7 @@
991 */
992 restore_core_regs();
993 spin_unlock_irqrestore(&pm_lock, flags);
994 + DPRINTK("Leaving sleep!\n");
995 return 0;
996 }
997
998 @@ -285,7 +284,6 @@
999
1000 if (retval)
1001 return retval;
1002 -
1003 au_sleep();
1004 retval = pm_send_all(PM_RESUME, (void *) 0);
1005 }
1006 @@ -296,7 +294,6 @@
1007 void *buffer, size_t * len)
1008 {
1009 int retval = 0;
1010 - void au1k_wait(void);
1011
1012 if (!write) {
1013 *len = 0;
1014 @@ -305,119 +302,9 @@
1015 if (retval)
1016 return retval;
1017 suspend_mode = 1;
1018 - au1k_wait();
1019 - retval = pm_send_all(PM_RESUME, (void *) 0);
1020 - }
1021 - return retval;
1022 -}
1023
1024 -
1025 -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
1026 - void *buffer, size_t * len)
1027 -{
1028 - int retval = 0, i;
1029 - unsigned long val, pll;
1030 -#define TMPBUFLEN 64
1031 -#define MAX_CPU_FREQ 396
1032 - char buf[TMPBUFLEN], *p;
1033 - unsigned long flags, intc0_mask, intc1_mask;
1034 - unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
1035 - old_refresh;
1036 - unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
1037 -
1038 - spin_lock_irqsave(&pm_lock, flags);
1039 - if (!write) {
1040 - *len = 0;
1041 - } else {
1042 - /* Parse the new frequency */
1043 - if (*len > TMPBUFLEN - 1) {
1044 - spin_unlock_irqrestore(&pm_lock, flags);
1045 - return -EFAULT;
1046 - }
1047 - if (copy_from_user(buf, buffer, *len)) {
1048 - spin_unlock_irqrestore(&pm_lock, flags);
1049 - return -EFAULT;
1050 - }
1051 - buf[*len] = 0;
1052 - p = buf;
1053 - val = simple_strtoul(p, &p, 0);
1054 - if (val > MAX_CPU_FREQ) {
1055 - spin_unlock_irqrestore(&pm_lock, flags);
1056 - return -EFAULT;
1057 - }
1058 -
1059 - pll = val / 12;
1060 - if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
1061 - /* revisit this for higher speed cpus */
1062 - spin_unlock_irqrestore(&pm_lock, flags);
1063 - return -EFAULT;
1064 - }
1065 -
1066 - old_baud_base = get_au1x00_uart_baud_base();
1067 - old_cpu_freq = get_au1x00_speed();
1068 -
1069 - new_cpu_freq = pll * 12 * 1000000;
1070 - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
1071 - set_au1x00_speed(new_cpu_freq);
1072 - set_au1x00_uart_baud_base(new_baud_base);
1073 -
1074 - old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
1075 - new_refresh =
1076 - ((old_refresh * new_cpu_freq) /
1077 - old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
1078 -
1079 - au_writel(pll, SYS_CPUPLL);
1080 - au_sync_delay(1);
1081 - au_writel(new_refresh, MEM_SDREFCFG);
1082 - au_sync_delay(1);
1083 -
1084 - for (i = 0; i < 4; i++) {
1085 - if (au_readl
1086 - (UART_BASE + UART_MOD_CNTRL +
1087 - i * 0x00100000) == 3) {
1088 - old_clk =
1089 - au_readl(UART_BASE + UART_CLK +
1090 - i * 0x00100000);
1091 - // baud_rate = baud_base/clk
1092 - baud_rate = old_baud_base / old_clk;
1093 - /* we won't get an exact baud rate and the error
1094 - * could be significant enough that our new
1095 - * calculation will result in a clock that will
1096 - * give us a baud rate that's too far off from
1097 - * what we really want.
1098 - */
1099 - if (baud_rate > 100000)
1100 - baud_rate = 115200;
1101 - else if (baud_rate > 50000)
1102 - baud_rate = 57600;
1103 - else if (baud_rate > 30000)
1104 - baud_rate = 38400;
1105 - else if (baud_rate > 17000)
1106 - baud_rate = 19200;
1107 - else
1108 - (baud_rate = 9600);
1109 - // new_clk = new_baud_base/baud_rate
1110 - new_clk = new_baud_base / baud_rate;
1111 - au_writel(new_clk,
1112 - UART_BASE + UART_CLK +
1113 - i * 0x00100000);
1114 - au_sync_delay(10);
1115 - }
1116 - }
1117 + retval = pm_send_all(PM_RESUME, (void *) 0);
1118 }
1119 -
1120 -
1121 - /* We don't want _any_ interrupts other than
1122 - * match20. Otherwise our calibrate_delay()
1123 - * calculation will be off, potentially a lot.
1124 - */
1125 - intc0_mask = save_local_and_disable(0);
1126 - intc1_mask = save_local_and_disable(1);
1127 - local_enable_irq(AU1000_TOY_MATCH2_INT);
1128 - spin_unlock_irqrestore(&pm_lock, flags);
1129 - calibrate_delay();
1130 - restore_local_and_enable(0, intc0_mask);
1131 - restore_local_and_enable(1, intc1_mask);
1132 return retval;
1133 }
1134
1135 @@ -425,7 +312,6 @@
1136 static struct ctl_table pm_table[] = {
1137 {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
1138 {ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
1139 - {CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
1140 {0}
1141 };
1142
1143 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/reset.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/reset.c
1144 --- linux-2.4.32-rc1/arch/mips/au1000/common/reset.c 2005-01-19 15:09:26.000000000 +0100
1145 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/reset.c 2005-03-19 08:17:51.000000000 +0100
1146 @@ -37,8 +37,6 @@
1147 #include <asm/system.h>
1148 #include <asm/au1000.h>
1149
1150 -extern int au_sleep(void);
1151 -
1152 void au1000_restart(char *command)
1153 {
1154 /* Set all integrated peripherals to disabled states */
1155 @@ -144,6 +142,26 @@
1156 au_writel(0x00, 0xb1900064); /* sys_auxpll */
1157 au_writel(0x00, 0xb1900100); /* sys_pininputen */
1158 break;
1159 + case 0x04000000: /* Au1200 */
1160 + au_writel(0x00, 0xb400300c); /* ddma */
1161 + au_writel(0x00, 0xb1a00004); /* psc 0 */
1162 + au_writel(0x00, 0xb1b00004); /* psc 1 */
1163 + au_writel(0x00d02000, 0xb4020004); /* ehci, ohci, udc, otg */
1164 + au_writel(0x00, 0xb5000004); /* lcd */
1165 + au_writel(0x00, 0xb060000c); /* sd0 */
1166 + au_writel(0x00, 0xb068000c); /* sd1 */
1167 + au_writel(0x00, 0xb1100100); /* swcnt */
1168 + au_writel(0x00, 0xb0300000); /* aes */
1169 + au_writel(0x00, 0xb4004000); /* cim */
1170 + au_writel(0x00, 0xb1100100); /* uart0_enable */
1171 + au_writel(0x00, 0xb1200100); /* uart1_enable */
1172 + au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
1173 + au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
1174 + au_writel(0x00, 0xb1900028); /* sys_clksrc */
1175 + au_writel(0x10, 0xb1900060); /* sys_cpupll */
1176 + au_writel(0x00, 0xb1900064); /* sys_auxpll */
1177 + au_writel(0x00, 0xb1900100); /* sys_pininputen */
1178 + break;
1179
1180 default:
1181 break;
1182 @@ -163,32 +181,23 @@
1183
1184 void au1000_halt(void)
1185 {
1186 -#if defined(CONFIG_MIPS_PB1550)
1187 - /* power off system */
1188 - printk("\n** Powering off Pb1550\n");
1189 - au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
1190 - au_sync();
1191 - while(1); /* should not get here */
1192 -#endif
1193 - printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1194 -#ifdef CONFIG_MIPS_MIRAGE
1195 - au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1196 -#endif
1197 -#ifdef CONFIG_PM
1198 - au_sleep();
1199 -
1200 - /* should not get here */
1201 - printk(KERN_ERR "Unable to put cpu in sleep mode\n");
1202 - while(1);
1203 -#else
1204 - while (1)
1205 + /* Use WAIT in a low-power infinite spin loop */
1206 + while (1) {
1207 __asm__(".set\tmips3\n\t"
1208 "wait\n\t"
1209 ".set\tmips0");
1210 -#endif
1211 + }
1212 }
1213
1214 void au1000_power_off(void)
1215 {
1216 + extern void board_power_off (void);
1217 +
1218 + printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1219 +
1220 + /* Give board a chance to power-off */
1221 + board_power_off();
1222 +
1223 + /* If board can't power-off, spin forever */
1224 au1000_halt();
1225 }
1226 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/setup.c
1227 --- linux-2.4.32-rc1/arch/mips/au1000/common/setup.c 2005-01-19 15:09:26.000000000 +0100
1228 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/setup.c 2005-01-30 09:01:27.000000000 +0100
1229 @@ -174,6 +174,40 @@
1230 initrd_end = (unsigned long)&__rd_end;
1231 #endif
1232
1233 +#if defined(CONFIG_SOC_AU1200)
1234 +#ifdef CONFIG_USB_EHCI_HCD
1235 + if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
1236 + char usb_args[80];
1237 + argptr = prom_getcmdline();
1238 + memset(usb_args, 0, sizeof(usb_args));
1239 + sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
1240 + USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
1241 + strcat(argptr, usb_args);
1242 + }
1243 +#ifdef CONFIG_USB_AMD5536UDC
1244 + /* enable EHC + OHC + UDC clocks, memory and bus mastering */
1245 +/* au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
1246 + au_writel( 0xC0DF207F, USB_MSR_BASE + 4); // incl. prefetch
1247 +#else
1248 + /* enable EHC + OHC clocks, memory and bus mastering */
1249 +/* au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
1250 + au_writel( 0xC0DB200F, USB_MSR_BASE + 4); /* incl. prefetch */
1251 +#endif
1252 + udelay(1000);
1253 +
1254 +#else /* CONFIG_USB_EHCI_HCD */
1255 +
1256 +#ifdef CONFIG_USB_AMD5536UDC
1257 +#ifndef CONFIG_USB_OHCI
1258 + /* enable UDC clocks, memory and bus mastering */
1259 +/* au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
1260 + au_writel( 0xC0DC2070, USB_MSR_BASE + 4); // incl. prefetch
1261 + udelay(1000);
1262 +#endif
1263 +#endif
1264 +#endif /* CONFIG_USB_EHCI_HCD */
1265 +#endif /* CONFIG_SOC_AU1200 */
1266 +
1267 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1268 #ifdef CONFIG_USB_OHCI
1269 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
1270 @@ -187,19 +221,38 @@
1271 #endif
1272
1273 #ifdef CONFIG_USB_OHCI
1274 - // enable host controller and wait for reset done
1275 +#if defined(CONFIG_SOC_AU1200)
1276 +#ifndef CONFIG_USB_EHCI_HCD
1277 +#ifdef CONFIG_USB_AMD5536UDC
1278 + /* enable OHC + UDC clocks, memory and bus mastering */
1279 +/* au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
1280 + au_writel( 0xC0DD2073, USB_MSR_BASE + 4); // incl. prefetch
1281 +#else
1282 + /* enable OHC clocks, memory and bus mastering */
1283 + au_writel( 0x00D12003, USB_MSR_BASE + 4);
1284 +#endif
1285 + udelay(1000);
1286 +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
1287 +#endif
1288 +#else
1289 + /* Au1000, Au1500, Au1100, Au1550 */
1290 + /* enable host controller and wait for reset done */
1291 au_writel(0x08, USB_HOST_CONFIG);
1292 udelay(1000);
1293 au_writel(0x0E, USB_HOST_CONFIG);
1294 udelay(1000);
1295 - au_readl(USB_HOST_CONFIG); // throw away first read
1296 + au_readl(USB_HOST_CONFIG); /* throw away first read */
1297 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
1298 au_readl(USB_HOST_CONFIG);
1299 +#endif /* CONFIG_SOC_AU1200 */
1300 #endif
1301 -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1302 +#else
1303 +
1304 +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
1305 +
1306
1307 #ifdef CONFIG_FB
1308 - // Needed if PCI video card in use
1309 + /* Needed if PCI video card in use */
1310 conswitchp = &dummy_con;
1311 #endif
1312
1313 @@ -209,8 +262,7 @@
1314 #endif
1315
1316 #ifdef CONFIG_BLK_DEV_IDE
1317 - /* Board setup takes precedence for unique devices.
1318 - */
1319 + /* Board setup takes precedence for unique devices. */
1320 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
1321 ide_ops = &std_ide_ops;
1322 #endif
1323 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/sleeper.S linux-2.4.32-rc1.mips/arch/mips/au1000/common/sleeper.S
1324 --- linux-2.4.32-rc1/arch/mips/au1000/common/sleeper.S 2004-02-18 14:36:30.000000000 +0100
1325 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/sleeper.S 2005-01-30 09:01:27.000000000 +0100
1326 @@ -15,17 +15,48 @@
1327 #include <asm/addrspace.h>
1328 #include <asm/regdef.h>
1329 #include <asm/stackframe.h>
1330 +#include <asm/au1000.h>
1331 +
1332 +/*
1333 + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep
1334 + * need not be tied to any particular power management scheme.
1335 + */
1336 +
1337 + .extern ___flush_cache_all
1338
1339 .text
1340 - .set macro
1341 - .set noat
1342 .align 5
1343
1344 -/* Save all of the processor general registers and go to sleep.
1345 - * A wakeup condition will get us back here to restore the registers.
1346 +/*
1347 + * Save the processor general registers and go to sleep. A wakeup
1348 + * condition will get us back here to restore the registers.
1349 */
1350 -LEAF(save_and_sleep)
1351
1352 +/* still need to fix alignment issues here */
1353 +save_and_sleep_frmsz = 48
1354 +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
1355 + .set noreorder
1356 + .set nomacro
1357 + .set noat
1358 + subu sp, save_and_sleep_frmsz
1359 + sw ra, save_and_sleep_frmsz-4(sp)
1360 + sw s0, save_and_sleep_frmsz-8(sp)
1361 + sw s1, save_and_sleep_frmsz-12(sp)
1362 + sw s2, save_and_sleep_frmsz-16(sp)
1363 + sw s3, save_and_sleep_frmsz-20(sp)
1364 + sw s4, save_and_sleep_frmsz-24(sp)
1365 + sw s5, save_and_sleep_frmsz-28(sp)
1366 + sw s6, save_and_sleep_frmsz-32(sp)
1367 + sw s7, save_and_sleep_frmsz-36(sp)
1368 + sw s8, save_and_sleep_frmsz-40(sp)
1369 + sw gp, save_and_sleep_frmsz-44(sp)
1370 +
1371 + /* We only need to save the registers that the calling function
1372 + * hasn't saved for us. 0 is always zero. 8 - 15, 24 and 25 are
1373 + * temporaries and can be used without saving. 26 and 27 are reserved
1374 + * for interrupt/trap handling and expected to change. 29 is the
1375 + * stack pointer which is handled as a special case here.
1376 + */
1377 subu sp, PT_SIZE
1378 sw $1, PT_R1(sp)
1379 sw $2, PT_R2(sp)
1380 @@ -34,14 +65,6 @@
1381 sw $5, PT_R5(sp)
1382 sw $6, PT_R6(sp)
1383 sw $7, PT_R7(sp)
1384 - sw $8, PT_R8(sp)
1385 - sw $9, PT_R9(sp)
1386 - sw $10, PT_R10(sp)
1387 - sw $11, PT_R11(sp)
1388 - sw $12, PT_R12(sp)
1389 - sw $13, PT_R13(sp)
1390 - sw $14, PT_R14(sp)
1391 - sw $15, PT_R15(sp)
1392 sw $16, PT_R16(sp)
1393 sw $17, PT_R17(sp)
1394 sw $18, PT_R18(sp)
1395 @@ -50,32 +73,47 @@
1396 sw $21, PT_R21(sp)
1397 sw $22, PT_R22(sp)
1398 sw $23, PT_R23(sp)
1399 - sw $24, PT_R24(sp)
1400 - sw $25, PT_R25(sp)
1401 - sw $26, PT_R26(sp)
1402 - sw $27, PT_R27(sp)
1403 sw $28, PT_R28(sp)
1404 - sw $29, PT_R29(sp)
1405 sw $30, PT_R30(sp)
1406 sw $31, PT_R31(sp)
1407 +#define PT_C0STATUS PT_LO
1408 +#define PT_CONTEXT PT_HI
1409 +#define PT_PAGEMASK PT_EPC
1410 +#define PT_CONFIG PT_BVADDR
1411 mfc0 k0, CP0_STATUS
1412 - sw k0, 0x20(sp)
1413 + sw k0, PT_C0STATUS(sp) // 0x20
1414 mfc0 k0, CP0_CONTEXT
1415 - sw k0, 0x1c(sp)
1416 + sw k0, PT_CONTEXT(sp) // 0x1c
1417 mfc0 k0, CP0_PAGEMASK
1418 - sw k0, 0x18(sp)
1419 + sw k0, PT_PAGEMASK(sp) // 0x18
1420 mfc0 k0, CP0_CONFIG
1421 - sw k0, 0x14(sp)
1422 + sw k0, PT_CONFIG(sp) // 0x14
1423 +
1424 + .set macro
1425 + .set at
1426 +
1427 + li t0, SYS_SLPPWR
1428 + sw zero, 0(t0) /* Get the processor ready to sleep */
1429 + sync
1430
1431 /* Now set up the scratch registers so the boot rom will
1432 * return to this point upon wakeup.
1433 + * sys_scratch0 : SP
1434 + * sys_scratch1 : RA
1435 + */
1436 + li t0, SYS_SCRATCH0
1437 + li t1, SYS_SCRATCH1
1438 + sw sp, 0(t0)
1439 + la k0, resume_from_sleep
1440 + sw k0, 0(t1)
1441 +
1442 +/*
1443 + * Flush DCACHE to make sure context is in memory
1444 */
1445 - la k0, 1f
1446 - lui k1, 0xb190
1447 - ori k1, 0x18
1448 - sw sp, 0(k1)
1449 - ori k1, 0x1c
1450 - sw k0, 0(k1)
1451 + la t1,___flush_cache_all /* _flush_cache_all is a function pointer */
1452 + lw t0,0(t1)
1453 + jal t0
1454 + nop
1455
1456 /* Put SDRAM into self refresh. Preload instructions into cache,
1457 * issue a precharge, then auto refresh, then sleep commands to it.
1458 @@ -88,30 +126,65 @@
1459 cache 0x14, 96(t0)
1460 .set mips0
1461
1462 + /* Put SDRAM to sleep */
1463 sdsleep:
1464 - lui k0, 0xb400
1465 - sw zero, 0x001c(k0) /* Precharge */
1466 - sw zero, 0x0020(k0) /* Auto refresh */
1467 - sw zero, 0x0030(k0) /* SDRAM sleep */
1468 + li a0, MEM_PHYS_ADDR
1469 + or a0, a0, 0xA0000000
1470 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
1471 + lw k0, MEM_SDMODE0(a0)
1472 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1473 + sw zero, MEM_SDAUTOREF(a0) /* Auto Refresh */
1474 + sw zero, MEM_SDSLEEP(a0) /* Sleep */
1475 sync
1476 -
1477 - lui k1, 0xb190
1478 - sw zero, 0x0078(k1) /* get ready to sleep */
1479 +#endif
1480 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
1481 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1482 + sw zero, MEM_SDSREF(a0)
1483 +
1484 + #lw t0, MEM_SDSTAT(a0)
1485 + #and t0, t0, 0x01000000
1486 + li t0, 0x01000000
1487 +refresh_not_set:
1488 + lw t1, MEM_SDSTAT(a0)
1489 + and t2, t1, t0
1490 + beq zero, t2, refresh_not_set
1491 + nop
1492 +
1493 + li t0, ~0x30000000
1494 + lw t1, MEM_SDCONFIGA(a0)
1495 + and t1, t0, t1
1496 + sw t1, MEM_SDCONFIGA(a0)
1497 sync
1498 - sw zero, 0x007c(k1) /* Put processor to sleep */
1499 +#endif
1500 +
1501 + li t0, SYS_SLEEP
1502 + sw zero, 0(t0) /* Put processor to sleep */
1503 sync
1504 + nop
1505 + nop
1506 + nop
1507 + nop
1508 + nop
1509 + nop
1510 + nop
1511 + nop
1512 +
1513
1514 /* This is where we return upon wakeup.
1515 * Reload all of the registers and return.
1516 */
1517 -1: nop
1518 - lw k0, 0x20(sp)
1519 +resume_from_sleep:
1520 + nop
1521 + .set nomacro
1522 + .set noat
1523 +
1524 + lw k0, PT_C0STATUS(sp) // 0x20
1525 mtc0 k0, CP0_STATUS
1526 - lw k0, 0x1c(sp)
1527 + lw k0, PT_CONTEXT(sp) // 0x1c
1528 mtc0 k0, CP0_CONTEXT
1529 - lw k0, 0x18(sp)
1530 + lw k0, PT_PAGEMASK(sp) // 0x18
1531 mtc0 k0, CP0_PAGEMASK
1532 - lw k0, 0x14(sp)
1533 + lw k0, PT_CONFIG(sp) // 0x14
1534 mtc0 k0, CP0_CONFIG
1535 lw $1, PT_R1(sp)
1536 lw $2, PT_R2(sp)
1537 @@ -120,14 +193,6 @@
1538 lw $5, PT_R5(sp)
1539 lw $6, PT_R6(sp)
1540 lw $7, PT_R7(sp)
1541 - lw $8, PT_R8(sp)
1542 - lw $9, PT_R9(sp)
1543 - lw $10, PT_R10(sp)
1544 - lw $11, PT_R11(sp)
1545 - lw $12, PT_R12(sp)
1546 - lw $13, PT_R13(sp)
1547 - lw $14, PT_R14(sp)
1548 - lw $15, PT_R15(sp)
1549 lw $16, PT_R16(sp)
1550 lw $17, PT_R17(sp)
1551 lw $18, PT_R18(sp)
1552 @@ -136,15 +201,36 @@
1553 lw $21, PT_R21(sp)
1554 lw $22, PT_R22(sp)
1555 lw $23, PT_R23(sp)
1556 - lw $24, PT_R24(sp)
1557 - lw $25, PT_R25(sp)
1558 - lw $26, PT_R26(sp)
1559 - lw $27, PT_R27(sp)
1560 lw $28, PT_R28(sp)
1561 - lw $29, PT_R29(sp)
1562 lw $30, PT_R30(sp)
1563 lw $31, PT_R31(sp)
1564 +
1565 + .set macro
1566 + .set at
1567 +
1568 + /* clear the wake source, but save it as the return value of the function */
1569 + li t0, SYS_WAKESRC
1570 + lw v0, 0(t0)
1571 + sw v0, PT_R2(sp)
1572 + sw zero, 0(t0)
1573 +
1574 addiu sp, PT_SIZE
1575
1576 + lw gp, save_and_sleep_frmsz-44(sp)
1577 + lw s8, save_and_sleep_frmsz-40(sp)
1578 + lw s7, save_and_sleep_frmsz-36(sp)
1579 + lw s6, save_and_sleep_frmsz-32(sp)
1580 + lw s5, save_and_sleep_frmsz-28(sp)
1581 + lw s4, save_and_sleep_frmsz-24(sp)
1582 + lw s3, save_and_sleep_frmsz-20(sp)
1583 + lw s2, save_and_sleep_frmsz-16(sp)
1584 + lw s1, save_and_sleep_frmsz-12(sp)
1585 + lw s0, save_and_sleep_frmsz-8(sp)
1586 + lw ra, save_and_sleep_frmsz-4(sp)
1587 +
1588 + addu sp, save_and_sleep_frmsz
1589 jr ra
1590 + nop
1591 + .set reorder
1592 END(save_and_sleep)
1593 +
1594 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/common/time.c linux-2.4.32-rc1.mips/arch/mips/au1000/common/time.c
1595 --- linux-2.4.32-rc1/arch/mips/au1000/common/time.c 2005-01-19 15:09:26.000000000 +0100
1596 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/common/time.c 2005-04-08 10:33:17.000000000 +0200
1597 @@ -50,7 +50,6 @@
1598 #include <linux/mc146818rtc.h>
1599 #include <linux/timex.h>
1600
1601 -extern void startup_match20_interrupt(void);
1602 extern void do_softirq(void);
1603 extern volatile unsigned long wall_jiffies;
1604 unsigned long missed_heart_beats = 0;
1605 @@ -59,14 +58,14 @@
1606 static unsigned long r4k_cur; /* What counter should be at next timer irq */
1607 extern rwlock_t xtime_lock;
1608 int no_au1xxx_32khz;
1609 -void (*au1k_wait_ptr)(void);
1610 +extern int allow_au1k_wait; /* default off for CP0 Counter */
1611
1612 /* Cycle counter value at the previous timer interrupt.. */
1613 static unsigned int timerhi = 0, timerlo = 0;
1614
1615 #ifdef CONFIG_PM
1616 #define MATCH20_INC 328
1617 -extern void startup_match20_interrupt(void);
1618 +extern void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *));
1619 static unsigned long last_pc0, last_match20;
1620 #endif
1621
1622 @@ -385,7 +384,6 @@
1623 {
1624 unsigned int est_freq;
1625 extern unsigned long (*do_gettimeoffset)(void);
1626 - extern void au1k_wait(void);
1627
1628 printk("calculating r4koff... ");
1629 r4k_offset = cal_r4koff();
1630 @@ -437,9 +435,6 @@
1631 au_writel(0, SYS_TOYWRITE);
1632 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
1633
1634 - au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
1635 - au_writel(~0, SYS_WAKESRC);
1636 - au_sync();
1637 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1638
1639 /* setup match20 to interrupt once every 10ms */
1640 @@ -447,13 +442,13 @@
1641 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
1642 au_sync();
1643 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1644 - startup_match20_interrupt();
1645 + startup_match20_interrupt(counter0_irq);
1646
1647 do_gettimeoffset = do_fast_pm_gettimeoffset;
1648
1649 /* We can use the real 'wait' instruction.
1650 */
1651 - au1k_wait_ptr = au1k_wait;
1652 + allow_au1k_wait = 1;
1653 }
1654
1655 #else
1656 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/db1x00/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/board_setup.c
1657 --- linux-2.4.32-rc1/arch/mips/au1000/db1x00/board_setup.c 2005-01-19 15:09:26.000000000 +0100
1658 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/board_setup.c 2005-03-19 08:17:51.000000000 +0100
1659 @@ -46,10 +46,22 @@
1660 #include <asm/au1000.h>
1661 #include <asm/db1x00.h>
1662
1663 -extern struct rtc_ops no_rtc_ops;
1664 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1665 +#include <asm/au1xxx_dbdma.h>
1666 +extern struct ide_ops *ide_ops;
1667 +extern struct ide_ops au1xxx_ide_ops;
1668 +extern u32 au1xxx_ide_virtbase;
1669 +extern u64 au1xxx_ide_physbase;
1670 +extern int au1xxx_ide_irq;
1671 +
1672 +/* Ddma */
1673 +chan_tab_t *ide_read_ch, *ide_write_ch;
1674 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
1675 +
1676 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
1677 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
1678
1679 -/* not correct for db1550 */
1680 -static BCSR * const bcsr = (BCSR *)0xAE000000;
1681 +extern struct rtc_ops no_rtc_ops;
1682
1683 void board_reset (void)
1684 {
1685 @@ -57,6 +69,13 @@
1686 au_writel(0x00000000, 0xAE00001C);
1687 }
1688
1689 +void board_power_off (void)
1690 +{
1691 +#ifdef CONFIG_MIPS_MIRAGE
1692 + au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1693 +#endif
1694 +}
1695 +
1696 void __init board_setup(void)
1697 {
1698 u32 pin_func;
1699 @@ -108,8 +127,42 @@
1700 au_writel(0x02000200, GPIO2_OUTPUT);
1701 #endif
1702
1703 +#if defined(CONFIG_AU1XXX_SMC91111)
1704 +#define CPLD_CONTROL (0xAF00000C)
1705 + {
1706 + extern uint32_t au1xxx_smc91111_base;
1707 + extern unsigned int au1xxx_smc91111_irq;
1708 + extern int au1xxx_smc91111_nowait;
1709 +
1710 + au1xxx_smc91111_base = 0xAC000300;
1711 + au1xxx_smc91111_irq = AU1000_GPIO_8;
1712 + au1xxx_smc91111_nowait = 1;
1713 +
1714 + /* set up the Static Bus timing - only 396Mhz */
1715 + bcsr->resets |= 0x7;
1716 + au_writel(0x00010003, MEM_STCFG0);
1717 + au_writel(0x000c00c0, MEM_STCFG2);
1718 + au_writel(0x85E1900D, MEM_STTIME2);
1719 + }
1720 +#endif /* end CONFIG_SMC91111 */
1721 au_sync();
1722
1723 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1724 + /*
1725 + * Iniz IDE parameters
1726 + */
1727 + ide_ops = &au1xxx_ide_ops;
1728 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
1729 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
1730 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
1731 +
1732 + /*
1733 + * change PIO or PIO+Ddma
1734 + * check the GPIO-6 pin condition. db1550:s6_dot
1735 + */
1736 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
1737 +#endif
1738 +
1739 #ifdef CONFIG_MIPS_DB1000
1740 printk("AMD Alchemy Au1000/Db1000 Board\n");
1741 #endif
1742 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/db1x00/irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/irqmap.c
1743 --- linux-2.4.32-rc1/arch/mips/au1000/db1x00/irqmap.c 2005-01-19 15:09:26.000000000 +0100
1744 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/irqmap.c 2005-01-30 09:06:19.000000000 +0100
1745 @@ -53,6 +53,7 @@
1746 #ifdef CONFIG_MIPS_DB1550
1747 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
1748 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
1749 + { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
1750 #else
1751 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
1752 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
1753 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/db1x00/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/Makefile
1754 --- linux-2.4.32-rc1/arch/mips/au1000/db1x00/Makefile 2005-01-19 15:09:26.000000000 +0100
1755 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/Makefile 2005-01-30 09:06:19.000000000 +0100
1756 @@ -17,4 +17,11 @@
1757 obj-y := init.o board_setup.o irqmap.o
1758 obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
1759
1760 +ifdef CONFIG_MIPS_DB1100
1761 +ifdef CONFIG_MMC
1762 +obj-y += mmc_support.o
1763 +export-objs += mmc_support.o
1764 +endif
1765 +endif
1766 +
1767 include $(TOPDIR)/Rules.make
1768 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/db1x00/mmc_support.c linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/mmc_support.c
1769 --- linux-2.4.32-rc1/arch/mips/au1000/db1x00/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
1770 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/db1x00/mmc_support.c 2005-01-30 09:07:01.000000000 +0100
1771 @@ -0,0 +1,126 @@
1772 +/*
1773 + * BRIEF MODULE DESCRIPTION
1774 + *
1775 + * MMC support routines for DB1100.
1776 + *
1777 + *
1778 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
1779 + * Author: Embedded Edge, LLC.
1780 + * Contact: dan@embeddededge.com
1781 + *
1782 + * This program is free software; you can redistribute it and/or modify it
1783 + * under the terms of the GNU General Public License as published by the
1784 + * Free Software Foundation; either version 2 of the License, or (at your
1785 + * option) any later version.
1786 + *
1787 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1788 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1789 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
1790 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1791 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1792 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
1793 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1794 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1795 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1796 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1797 + *
1798 + * You should have received a copy of the GNU General Public License along
1799 + * with this program; if not, write to the Free Software Foundation, Inc.,
1800 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1801 + *
1802 + */
1803 +
1804 +
1805 +#include <linux/config.h>
1806 +#include <linux/kernel.h>
1807 +#include <linux/module.h>
1808 +#include <linux/init.h>
1809 +
1810 +#include <asm/irq.h>
1811 +#include <asm/au1000.h>
1812 +#include <asm/au1100_mmc.h>
1813 +#include <asm/db1x00.h>
1814 +
1815 +
1816 +/* SD/MMC controller support functions */
1817 +
1818 +/*
1819 + * Detect card.
1820 + */
1821 +void mmc_card_inserted(int _n_, int *_res_)
1822 +{
1823 + u32 gpios = au_readl(SYS_PINSTATERD);
1824 + u32 emptybit = (_n_) ? (1<<20) : (1<<19);
1825 + *_res_ = ((gpios & emptybit) == 0);
1826 +}
1827 +
1828 +/*
1829 + * Check card write protection.
1830 + */
1831 +void mmc_card_writable(int _n_, int *_res_)
1832 +{
1833 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1834 + unsigned long mmc_wp, board_specific;
1835 +
1836 + if (_n_) {
1837 + mmc_wp = BCSR_BOARD_SD1_WP;
1838 + } else {
1839 + mmc_wp = BCSR_BOARD_SD0_WP;
1840 + }
1841 +
1842 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1843 +
1844 + if (!(board_specific & mmc_wp)) {/* low means card writable */
1845 + *_res_ = 1;
1846 + } else {
1847 + *_res_ = 0;
1848 + }
1849 +}
1850 +
1851 +/*
1852 + * Apply power to card slot.
1853 + */
1854 +void mmc_power_on(int _n_)
1855 +{
1856 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1857 + unsigned long mmc_pwr, board_specific;
1858 +
1859 + if (_n_) {
1860 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1861 + } else {
1862 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1863 + }
1864 +
1865 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1866 + board_specific |= mmc_pwr;
1867 +
1868 + au_writel(board_specific, (int)(&bcsr->specific));
1869 + au_sync_delay(1);
1870 +}
1871 +
1872 +/*
1873 + * Remove power from card slot.
1874 + */
1875 +void mmc_power_off(int _n_)
1876 +{
1877 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1878 + unsigned long mmc_pwr, board_specific;
1879 +
1880 + if (_n_) {
1881 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1882 + } else {
1883 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1884 + }
1885 +
1886 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1887 + board_specific &= ~mmc_pwr;
1888 +
1889 + au_writel(board_specific, (int)(&bcsr->specific));
1890 + au_sync_delay(1);
1891 +}
1892 +
1893 +EXPORT_SYMBOL(mmc_card_inserted);
1894 +EXPORT_SYMBOL(mmc_card_writable);
1895 +EXPORT_SYMBOL(mmc_power_on);
1896 +EXPORT_SYMBOL(mmc_power_off);
1897 +
1898 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/au1200_ibutton.c linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/au1200_ibutton.c
1899 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/au1200_ibutton.c 1970-01-01 01:00:00.000000000 +0100
1900 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/au1200_ibutton.c 2005-02-03 07:35:29.000000000 +0100
1901 @@ -0,0 +1,270 @@
1902 +/* ----------------------------------------------------------------------
1903 + * mtwilson_keys.c
1904 + *
1905 + * Copyright (C) 2003 Intrinsyc Software Inc.
1906 + *
1907 + * Intel Personal Media Player buttons
1908 + *
1909 + * This program is free software; you can redistribute it and/or modify
1910 + * it under the terms of the GNU General Public License version 2 as
1911 + * published by the Free Software Foundation.
1912 + *
1913 + * May 02, 2003 : Initial version [FB]
1914 + *
1915 + ------------------------------------------------------------------------*/
1916 +
1917 +#include <linux/config.h>
1918 +#include <linux/module.h>
1919 +#include <linux/kernel.h>
1920 +#include <linux/init.h>
1921 +#include <linux/fs.h>
1922 +#include <linux/sched.h>
1923 +#include <linux/miscdevice.h>
1924 +#include <linux/errno.h>
1925 +#include <linux/poll.h>
1926 +#include <linux/delay.h>
1927 +#include <linux/input.h>
1928 +
1929 +#include <asm/au1000.h>
1930 +#include <asm/uaccess.h>
1931 +#include <asm/au1xxx_gpio.h>
1932 +#include <asm/irq.h>
1933 +#include <asm/keyboard.h>
1934 +#include <linux/time.h>
1935 +
1936 +#define DRIVER_VERSION "V1.0"
1937 +#define DRIVER_AUTHOR "FIC"
1938 +#define DRIVER_DESC "FIC Travis Media Player Button Driver"
1939 +#define DRIVER_NAME "Au1200Button"
1940 +
1941 +#define BUTTON_MAIN (1<<1)
1942 +#define BUTTON_SELECT (1<<6)
1943 +#define BUTTON_GUIDE (1<<12)
1944 +#define BUTTON_DOWN (1<<17)
1945 +#define BUTTON_LEFT (1<<19)
1946 +#define BUTTON_RIGHT (1<<26)
1947 +#define BUTTON_UP (1<<28)
1948 +
1949 +#define BUTTON_MASK (\
1950 + BUTTON_MAIN \
1951 + | BUTTON_SELECT \
1952 + | BUTTON_GUIDE \
1953 + | BUTTON_DOWN \
1954 + | BUTTON_LEFT \
1955 + | BUTTON_RIGHT \
1956 + | BUTTON_UP \
1957 + )
1958 +
1959 +#define BUTTON_INVERT (\
1960 + BUTTON_MAIN \
1961 + | 0 \
1962 + | BUTTON_GUIDE \
1963 + | 0 \
1964 + | 0 \
1965 + | 0 \
1966 + | 0 \
1967 + )
1968 +
1969 +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1970 +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1971 +
1972 +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1973 +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1974 +
1975 +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
1976 +
1977 +struct input_dev dev;
1978 +struct timeval cur_tv;
1979 +
1980 +static unsigned int old_tv_usec = 0;
1981 +
1982 +static unsigned int read_button_state(void)
1983 +{
1984 + unsigned int state;
1985 +
1986 + state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
1987 +
1988 + state ^= BUTTON_INVERT; /* invert main & guide button */
1989 +
1990 + /* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
1991 + return state;
1992 +}
1993 +
1994 +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
1995 +static unsigned int bounce()
1996 +{
1997 +
1998 + unsigned int elapsed_time;
1999 +
2000 + do_gettimeofday (&cur_tv);
2001 +
2002 + if (!old_tv_usec) {
2003 + old_tv_usec = cur_tv.tv_usec;
2004 + return 0;
2005 + }
2006 +
2007 + if(cur_tv.tv_usec > old_tv_usec) {
2008 + /* If there hasn't been rollover */
2009 + elapsed_time = ((cur_tv.tv_usec - old_tv_usec));
2010 + }
2011 + else {
2012 + /* Accounting for rollover */
2013 + elapsed_time = ((1000000 - old_tv_usec + cur_tv.tv_usec));
2014 + }
2015 +
2016 + if (elapsed_time > 250000) {
2017 + old_tv_usec = 0; /* reset the bounce time */
2018 + return 0;
2019 + }
2020 +
2021 + return 1;
2022 +}
2023 +
2024 +/* button interrupt handler */
2025 +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
2026 +{
2027 +
2028 + unsigned int i,bit_mask, key_choice;
2029 + u32 button_state;
2030 +
2031 + /* Report state to upper level */
2032 +
2033 + button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
2034 +
2035 + /* Return if this is a repeated (bouncing) event */
2036 + if(bounce())
2037 + return;
2038 +
2039 + /* we want to make keystrokes */
2040 + for( i=0; i< BUTTON_COUNT; i++) {
2041 + bit_mask = 1<<i;
2042 + if (button_state & bit_mask) {
2043 + key_choice = button_map[i];
2044 + /* toggle key down */
2045 + input_report_key(dev, key_choice, 1);
2046 + /* toggle key up */
2047 + input_report_key(dev, key_choice, 0);
2048 + printk("ibutton gpio %d stat %x scan code %d\r\n",
2049 + i, button_state, key_choice);
2050 + /* Only report the first key event; it doesn't make
2051 + * sense for two keys to be pressed at the same time,
2052 + * and causes problems with the directional keys
2053 + * return;
2054 + */
2055 + }
2056 + }
2057 +}
2058 +
2059 +static int
2060 +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
2061 +{
2062 + static int prev_scancode;
2063 +
2064 + printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n",
2065 + scancode, raw_mode);
2066 +
2067 + if (scancode == 0xe0 || scancode == 0xe1) {
2068 + prev_scancode = scancode;
2069 + return 0;
2070 + }
2071 +
2072 + if (scancode == 0x00 || scancode == 0xff) {
2073 + prev_scancode = 0;
2074 + return 0;
2075 + }
2076 +
2077 + *keycode = scancode;
2078 +
2079 + return 1;
2080 +}
2081 +
2082 +/* init button hardware */
2083 +static int button_hw_init(void)
2084 +{
2085 + unsigned int ipinfunc=0;
2086 +
2087 + printk("au1200_ibutton.c: Initializing buttons hardware\n");
2088 +
2089 + // initialize GPIO pin function assignments
2090 +
2091 + ipinfunc = au_readl(SYS_PINFUNC);
2092 +
2093 + ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);
2094 + au_writel( ipinfunc ,SYS_PINFUNC);
2095 +
2096 + ipinfunc |= (SYS_PINFUNC_S0C);
2097 + au_writel( ipinfunc ,SYS_PINFUNC);
2098 +
2099 + return 0;
2100 +}
2101 +
2102 +/* button driver init */
2103 +static int __init button_init(void)
2104 +{
2105 + int ret, i;
2106 + unsigned int flag=0;
2107 +
2108 + printk("au1200_ibutton.c: button_init()\r\n");
2109 +
2110 + button_hw_init();
2111 +
2112 + /* register all button irq handler */
2113 +
2114 + for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
2115 + {
2116 + /* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
2117 + if(button_map[i] != 0)
2118 + {
2119 + ret = request_irq(AU1000_GPIO_0 + i ,
2120 + &button_interrupt , SA_INTERRUPT ,
2121 + DRIVER_NAME , &dev);
2122 + if(ret) flag |= 1<<i;
2123 + }
2124 + }
2125 +
2126 + printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
2127 +
2128 + if (ret) {
2129 + printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
2130 + return ret;
2131 + }
2132 +
2133 + dev.name = DRIVER_NAME;
2134 + dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
2135 +
2136 + for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2137 + {
2138 + dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
2139 + }
2140 +
2141 + input_register_device(&dev);
2142 +
2143 + /* ready to receive interrupts */
2144 +
2145 + return 0;
2146 +}
2147 +
2148 +/* button driver exit */
2149 +static void __exit button_exit(void)
2150 +{
2151 + int i;
2152 +
2153 + for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2154 + {
2155 + if(button_map[i] != 0)
2156 + {
2157 + free_irq( AU1000_GPIO_0 + i, &dev);
2158 + }
2159 + }
2160 +
2161 + input_unregister_device(&dev);
2162 +
2163 + printk("au1200_ibutton.c: button_exit()\r\n");
2164 +}
2165 +
2166 +module_init(button_init);
2167 +module_exit(button_exit);
2168 +
2169 +MODULE_AUTHOR( DRIVER_AUTHOR );
2170 +MODULE_DESCRIPTION( DRIVER_DESC );
2171 +MODULE_LICENSE("GPL");
2172 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/au1xxx_dock.c linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/au1xxx_dock.c
2173 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/au1xxx_dock.c 1970-01-01 01:00:00.000000000 +0100
2174 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/au1xxx_dock.c 2005-01-30 09:01:27.000000000 +0100
2175 @@ -0,0 +1,261 @@
2176 +/*
2177 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2178 + *
2179 + * This program is free software; you can redistribute it and/or modify
2180 + * it under the terms of the GNU General Public License version 2 as
2181 + * published by the Free Software Foundation.
2182 + */
2183 +
2184 +#include <linux/config.h>
2185 +#include <linux/module.h>
2186 +#include <linux/init.h>
2187 +#include <linux/fs.h>
2188 +#include <linux/sched.h>
2189 +#include <linux/miscdevice.h>
2190 +#include <linux/errno.h>
2191 +#include <linux/poll.h>
2192 +#include <asm/au1000.h>
2193 +#include <asm/uaccess.h>
2194 +#include <asm/au1xxx_gpio.h>
2195 +
2196 +
2197 +#if defined(CONFIG_MIPS_FICMMP)
2198 + #define DOCK_GPIO 215
2199 +#else
2200 + #error Unsupported Au1xxx Platform
2201 +#endif
2202 +
2203 +#define MAKE_FLAG 0x20
2204 +
2205 +#undef DEBUG
2206 +
2207 +#define DEBUG 0
2208 +//#define DEBUG 1
2209 +
2210 +#if DEBUG
2211 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2212 +#else
2213 +#define DPRINTK(format, args...) do { } while (0)
2214 +#endif
2215 +
2216 +/* Please note that this driver is based on a timer and is not interrupt
2217 + * driven. If you are going to make use of this driver, you will need to have
2218 + * your application open the dock listing from the /dev directory first.
2219 + */
2220 +
2221 +struct au1xxx_dock {
2222 + struct fasync_struct *fasync;
2223 + wait_queue_head_t read_wait;
2224 + int open_count;
2225 + unsigned int debounce;
2226 + unsigned int current;
2227 + unsigned int last;
2228 +};
2229 +
2230 +static struct au1xxx_dock dock_info;
2231 +
2232 +
2233 +static void dock_timer_periodic(void *data);
2234 +
2235 +static struct tq_struct dock_task = {
2236 + routine: dock_timer_periodic,
2237 + data: NULL
2238 +};
2239 +
2240 +static int cleanup_flag = 0;
2241 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2242 +
2243 +
2244 +static unsigned int read_dock_state(void)
2245 +{
2246 + u32 state;
2247 +
2248 + state = au1xxx_gpio_read(DOCK_GPIO);
2249 +
2250 + /* printk( "Current Dock State: %d\n", state ); */
2251 +
2252 + return state;
2253 +}
2254 +
2255 +
2256 +static void dock_timer_periodic(void *data)
2257 +{
2258 + struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
2259 + unsigned long dock_state;
2260 +
2261 + /* If cleanup wants us to die */
2262 + if (cleanup_flag) {
2263 + /* now cleanup_module can return */
2264 + wake_up(&cleanup_wait_queue);
2265 + } else {
2266 + /* put ourselves back in the task queue */
2267 + queue_task(&dock_task, &tq_timer);
2268 + }
2269 +
2270 + /* read current dock */
2271 + dock_state = read_dock_state();
2272 +
2273 + /* if dock states hasn't changed */
2274 + /* save time and be done. */
2275 + if (dock_state == dock->current) {
2276 + return;
2277 + }
2278 +
2279 + if (dock_state == dock->debounce) {
2280 + dock->current = dock_state;
2281 + } else {
2282 + dock->debounce = dock_state;
2283 + }
2284 + if (dock->current != dock->last) {
2285 + if (waitqueue_active(&dock->read_wait)) {
2286 + wake_up_interruptible(&dock->read_wait);
2287 + }
2288 + }
2289 +}
2290 +
2291 +
2292 +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2293 +{
2294 + struct au1xxx_dock *dock = filp->private_data;
2295 + char event[3];
2296 + int last;
2297 + int cur;
2298 + int err;
2299 +
2300 +try_again:
2301 +
2302 + while (dock->current == dock->last) {
2303 + if (filp->f_flags & O_NONBLOCK) {
2304 + return -EAGAIN;
2305 + }
2306 + interruptible_sleep_on(&dock->read_wait);
2307 + if (signal_pending(current)) {
2308 + return -ERESTARTSYS;
2309 + }
2310 + }
2311 +
2312 + cur = dock->current;
2313 + last = dock->last;
2314 +
2315 + if(cur != last)
2316 + {
2317 + event[0] = cur ? 'D' : 'U';
2318 + event[1] = '\r';
2319 + event[2] = '\n';
2320 + }
2321 + else
2322 + goto try_again;
2323 +
2324 + dock->last = cur;
2325 + err = copy_to_user(buffer, &event, 3);
2326 + if (err) {
2327 + return err;
2328 + }
2329 +
2330 + return 3;
2331 +}
2332 +
2333 +
2334 +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
2335 +{
2336 + struct au1xxx_dock *dock = &dock_info;
2337 +
2338 + MOD_INC_USE_COUNT;
2339 +
2340 + filp->private_data = dock;
2341 +
2342 + if (dock->open_count++ == 0) {
2343 + dock_task.data = dock;
2344 + cleanup_flag = 0;
2345 + queue_task(&dock_task, &tq_timer);
2346 + }
2347 +
2348 + return 0;
2349 +}
2350 +
2351 +
2352 +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
2353 +{
2354 + struct au1xxx_dock *dock = filp->private_data;
2355 + int ret = 0;
2356 +
2357 + DPRINTK("start\n");
2358 + poll_wait(filp, &dock->read_wait, wait);
2359 + if (dock->current != dock->last) {
2360 + ret = POLLIN | POLLRDNORM;
2361 + }
2362 + return ret;
2363 +}
2364 +
2365 +
2366 +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
2367 +{
2368 + struct au1xxx_dock *dock = filp->private_data;
2369 +
2370 + DPRINTK("start\n");
2371 +
2372 + if (--dock->open_count == 0) {
2373 + cleanup_flag = 1;
2374 + sleep_on(&cleanup_wait_queue);
2375 + }
2376 + MOD_DEC_USE_COUNT;
2377 +
2378 + return 0;
2379 +}
2380 +
2381 +
2382 +
2383 +static struct file_operations au1xxx_dock_fops = {
2384 + owner: THIS_MODULE,
2385 + read: au1xxx_dock_read,
2386 + poll: au1xxx_dock_poll,
2387 + open: au1xxx_dock_open,
2388 + release: au1xxx_dock_release,
2389 +};
2390 +
2391 +/*
2392 + * The au1xxx dock is a misc device:
2393 + * Major 10 char
2394 + * Minor 22 /dev/dock
2395 + *
2396 + * This is /dev/misc/dock if devfs is used.
2397 + */
2398 +
2399 +static struct miscdevice au1xxx_dock_dev = {
2400 + minor: 23,
2401 + name: "dock",
2402 + fops: &au1xxx_dock_fops,
2403 +};
2404 +
2405 +static int __init au1xxx_dock_init(void)
2406 +{
2407 + struct au1xxx_dock *dock = &dock_info;
2408 + int ret;
2409 +
2410 + DPRINTK("Initializing dock driver\n");
2411 + dock->open_count = 0;
2412 + cleanup_flag = 0;
2413 + init_waitqueue_head(&dock->read_wait);
2414 +
2415 +
2416 + /* yamon configures GPIO pins for the dock
2417 + * no initialization needed
2418 + */
2419 +
2420 + ret = misc_register(&au1xxx_dock_dev);
2421 +
2422 + DPRINTK("dock driver fully initialized.\n");
2423 +
2424 + return ret;
2425 +}
2426 +
2427 +
2428 +static void __exit au1xxx_dock_exit(void)
2429 +{
2430 + DPRINTK("unloading dock driver\n");
2431 + misc_deregister(&au1xxx_dock_dev);
2432 +}
2433 +
2434 +
2435 +module_init(au1xxx_dock_init);
2436 +module_exit(au1xxx_dock_exit);
2437 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/board_setup.c
2438 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/board_setup.c 1970-01-01 01:00:00.000000000 +0100
2439 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/board_setup.c 2005-03-19 08:17:51.000000000 +0100
2440 @@ -0,0 +1,226 @@
2441 +/*
2442 + *
2443 + * BRIEF MODULE DESCRIPTION
2444 + * Alchemy Pb1200 board setup.
2445 + *
2446 + * This program is free software; you can redistribute it and/or modify it
2447 + * under the terms of the GNU General Public License as published by the
2448 + * Free Software Foundation; either version 2 of the License, or (at your
2449 + * option) any later version.
2450 + *
2451 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2452 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2453 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2454 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2455 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2456 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2457 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2458 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2459 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2460 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2461 + *
2462 + * You should have received a copy of the GNU General Public License along
2463 + * with this program; if not, write to the Free Software Foundation, Inc.,
2464 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2465 + */
2466 +#include <linux/config.h>
2467 +#include <linux/init.h>
2468 +#include <linux/sched.h>
2469 +#include <linux/ioport.h>
2470 +#include <linux/mm.h>
2471 +#include <linux/console.h>
2472 +#include <linux/mc146818rtc.h>
2473 +#include <linux/delay.h>
2474 +#include <linux/ide.h>
2475 +
2476 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2477 +#include <linux/ide.h>
2478 +#endif
2479 +
2480 +#include <asm/cpu.h>
2481 +#include <asm/bootinfo.h>
2482 +#include <asm/irq.h>
2483 +#include <asm/keyboard.h>
2484 +#include <asm/mipsregs.h>
2485 +#include <asm/reboot.h>
2486 +#include <asm/pgtable.h>
2487 +#include <asm/au1000.h>
2488 +#include <asm/ficmmp.h>
2489 +#include <asm/au1xxx_dbdma.h>
2490 +#include <asm/au1xxx_gpio.h>
2491 +
2492 +extern struct rtc_ops no_rtc_ops;
2493 +
2494 +/* value currently in the board configuration register */
2495 +u16 ficmmp_config = 0;
2496 +
2497 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2498 +extern struct ide_ops *ide_ops;
2499 +extern struct ide_ops au1xxx_ide_ops;
2500 +extern u32 au1xxx_ide_virtbase;
2501 +extern u64 au1xxx_ide_physbase;
2502 +extern int au1xxx_ide_irq;
2503 +
2504 +u32 led_base_addr;
2505 +/* Ddma */
2506 +chan_tab_t *ide_read_ch, *ide_write_ch;
2507 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
2508 +
2509 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
2510 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
2511 +
2512 +void board_reset (void)
2513 +{
2514 + au_writel(0, 0xAD80001C);
2515 +}
2516 +
2517 +void board_power_off (void)
2518 +{
2519 +}
2520 +
2521 +void __init board_setup(void)
2522 +{
2523 + char *argptr = NULL;
2524 + u32 pin_func;
2525 + rtc_ops = &no_rtc_ops;
2526 +
2527 + ficmmp_config_init(); //Initialize FIC control register
2528 +
2529 +#if 0
2530 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
2531 + * but it is board specific code, so put it here.
2532 + */
2533 + pin_func = au_readl(SYS_PINFUNC);
2534 + au_sync();
2535 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
2536 + au_writel(pin_func, SYS_PINFUNC);
2537 +
2538 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
2539 + au_sync();
2540 +#endif
2541 +
2542 +#if defined( CONFIG_I2C_ALGO_AU1550 )
2543 + {
2544 + u32 freq0, clksrc;
2545 +
2546 + /* Select SMBUS in CPLD */
2547 + /* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
2548 +
2549 + pin_func = au_readl(SYS_PINFUNC);
2550 + au_sync();
2551 + pin_func &= ~(3<<17 | 1<<4);
2552 + /* Set GPIOs correctly */
2553 + pin_func |= 2<<17;
2554 + au_writel(pin_func, SYS_PINFUNC);
2555 + au_sync();
2556 +
2557 + /* The i2c driver depends on 50Mhz clock */
2558 + freq0 = au_readl(SYS_FREQCTRL0);
2559 + au_sync();
2560 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
2561 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
2562 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
2563 + au_writel(freq0, SYS_FREQCTRL0);
2564 + au_sync();
2565 + freq0 |= SYS_FC_FE1;
2566 + au_writel(freq0, SYS_FREQCTRL0);
2567 + au_sync();
2568 +
2569 + clksrc = au_readl(SYS_CLKSRC);
2570 + au_sync();
2571 + clksrc &= ~0x01f00000;
2572 + /* bit 22 is EXTCLK0 for PSC0 */
2573 + clksrc |= (0x3 << 22);
2574 + au_writel(clksrc, SYS_CLKSRC);
2575 + au_sync();
2576 + }
2577 +#endif
2578 +
2579 +#ifdef CONFIG_FB_AU1200
2580 + argptr = prom_getcmdline();
2581 + strcat(argptr, " video=au1200fb:");
2582 +#endif
2583 +
2584 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2585 + /*
2586 + * Iniz IDE parameters
2587 + */
2588 + ide_ops = &au1xxx_ide_ops;
2589 + au1xxx_ide_irq = FICMMP_IDE_INT;
2590 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
2591 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
2592 + switch4ddma = 0;
2593 + /*
2594 + ide_ops = &au1xxx_ide_ops;
2595 + au1xxx_ide_irq = FICMMP_IDE_INT;
2596 + au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
2597 + */
2598 + au1xxx_gpio_write(9, 1);
2599 + printk("B4001010: %X\n", *((u32*)0xB4001010));
2600 + printk("B4001014: %X\n", *((u32*)0xB4001014));
2601 + printk("B4001018: %X\n", *((u32*)0xB4001018));
2602 + printk("B1900100: %X\n", *((u32*)0xB1900100));
2603 +
2604 +#if 0
2605 + ficmmp_config_clear(FICMMP_CONFIG_IDERST);
2606 + mdelay(100);
2607 + ficmmp_config_set(FICMMP_CONFIG_IDERST);
2608 + mdelay(100);
2609 +#endif
2610 + /*
2611 + * change PIO or PIO+Ddma
2612 + * check the GPIO-5 pin condition. pb1200:s18_dot
2613 + */
2614 +/* switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
2615 +#endif
2616 +
2617 + /* The Pb1200 development board uses external MUX for PSC0 to
2618 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
2619 + */
2620 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
2621 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
2622 + Refer to Pb1200 documentation.
2623 +#elif defined( CONFIG_AU1550_PSC_SPI )
2624 + //bcsr->resets |= BCSR_RESETS_PCS0MUX;
2625 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
2626 + //bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
2627 +#endif
2628 + au_sync();
2629 +
2630 + printk("FIC Multimedia Player Board\n");
2631 + au1xxx_gpio_tristate(5);
2632 + printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
2633 + printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
2634 +}
2635 +
2636 +int
2637 +board_au1200fb_panel (void)
2638 +{
2639 + au1xxx_gpio_tristate(6);
2640 +
2641 + if (au1xxx_gpio_read(12) == 0)
2642 + return 9; /* FS453_640x480 (Composite/S-Video) */
2643 + else
2644 + return 7; /* Sharp 320x240 TFT */
2645 +}
2646 +
2647 +int
2648 +board_au1200fb_panel_init (void)
2649 +{
2650 + /*Enable data buffers*/
2651 + ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
2652 + /*Take LCD out of reset*/
2653 + ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
2654 + return 0;
2655 +}
2656 +
2657 +int
2658 +board_au1200fb_panel_shutdown (void)
2659 +{
2660 + /*Disable data buffers*/
2661 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
2662 + /*Put LCD in reset, remove power*/
2663 + ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
2664 + return 0;
2665 +}
2666 +
2667 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/init.c linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/init.c
2668 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/init.c 1970-01-01 01:00:00.000000000 +0100
2669 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/init.c 2005-01-30 09:01:27.000000000 +0100
2670 @@ -0,0 +1,76 @@
2671 +/*
2672 + *
2673 + * BRIEF MODULE DESCRIPTION
2674 + * PB1200 board setup
2675 + *
2676 + * This program is free software; you can redistribute it and/or modify it
2677 + * under the terms of the GNU General Public License as published by the
2678 + * Free Software Foundation; either version 2 of the License, or (at your
2679 + * option) any later version.
2680 + *
2681 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2682 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2683 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2684 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2685 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2686 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2687 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2688 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2689 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2690 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2691 + *
2692 + * You should have received a copy of the GNU General Public License along
2693 + * with this program; if not, write to the Free Software Foundation, Inc.,
2694 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2695 + */
2696 +
2697 +#include <linux/init.h>
2698 +#include <linux/mm.h>
2699 +#include <linux/sched.h>
2700 +#include <linux/bootmem.h>
2701 +#include <asm/addrspace.h>
2702 +#include <asm/bootinfo.h>
2703 +#include <linux/config.h>
2704 +#include <linux/string.h>
2705 +#include <linux/kernel.h>
2706 +#include <linux/sched.h>
2707 +
2708 +int prom_argc;
2709 +char **prom_argv, **prom_envp;
2710 +extern void __init prom_init_cmdline(void);
2711 +extern char *prom_getenv(char *envname);
2712 +
2713 +const char *get_system_type(void)
2714 +{
2715 + return "FIC Multimedia Player (Au1200)";
2716 +}
2717 +
2718 +u32 mae_memsize = 0;
2719 +
2720 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
2721 +{
2722 + unsigned char *memsize_str;
2723 + unsigned long memsize;
2724 +
2725 + prom_argc = argc;
2726 + prom_argv = argv;
2727 + prom_envp = envp;
2728 +
2729 + mips_machgroup = MACH_GROUP_ALCHEMY;
2730 + mips_machtype = MACH_PB1000; /* set the platform # */
2731 + prom_init_cmdline();
2732 +
2733 + memsize_str = prom_getenv("memsize");
2734 + if (!memsize_str) {
2735 + memsize = 0x08000000;
2736 + } else {
2737 + memsize = simple_strtol(memsize_str, NULL, 0);
2738 + }
2739 +
2740 + /* reserved 32MB for MAE driver */
2741 + memsize -= (32 * 1024 * 1024);
2742 + add_memory_region(0, memsize, BOOT_MEM_RAM);
2743 + mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
2744 + return 0;
2745 +}
2746 +
2747 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/irqmap.c
2748 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/irqmap.c 1970-01-01 01:00:00.000000000 +0100
2749 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/irqmap.c 2005-01-30 09:01:27.000000000 +0100
2750 @@ -0,0 +1,61 @@
2751 +/*
2752 + * BRIEF MODULE DESCRIPTION
2753 + * Au1xxx irq map table
2754 + *
2755 + * This program is free software; you can redistribute it and/or modify it
2756 + * under the terms of the GNU General Public License as published by the
2757 + * Free Software Foundation; either version 2 of the License, or (at your
2758 + * option) any later version.
2759 + *
2760 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2761 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2762 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2763 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2764 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2765 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2766 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2767 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2768 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2769 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2770 + *
2771 + * You should have received a copy of the GNU General Public License along
2772 + * with this program; if not, write to the Free Software Foundation, Inc.,
2773 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2774 + */
2775 +#include <linux/errno.h>
2776 +#include <linux/init.h>
2777 +#include <linux/irq.h>
2778 +#include <linux/kernel_stat.h>
2779 +#include <linux/module.h>
2780 +#include <linux/signal.h>
2781 +#include <linux/sched.h>
2782 +#include <linux/types.h>
2783 +#include <linux/interrupt.h>
2784 +#include <linux/ioport.h>
2785 +#include <linux/timex.h>
2786 +#include <linux/slab.h>
2787 +#include <linux/random.h>
2788 +#include <linux/delay.h>
2789 +
2790 +#include <asm/bitops.h>
2791 +#include <asm/bootinfo.h>
2792 +#include <asm/io.h>
2793 +#include <asm/mipsregs.h>
2794 +#include <asm/system.h>
2795 +#include <asm/au1000.h>
2796 +#include <asm/ficmmp.h>
2797 +
2798 +au1xxx_irq_map_t au1xxx_irq_map[] = {
2799 + { FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
2800 + { AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
2801 + { AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 }, // main button
2802 + { AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 }, // select button
2803 + { AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 }, // guide button
2804 + { AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 }, // down button
2805 + { AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 }, // left button
2806 + { AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 }, // right button
2807 + { AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 }, // up button
2808 +};
2809 +
2810 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
2811 +
2812 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/ficmmp/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/Makefile
2813 --- linux-2.4.32-rc1/arch/mips/au1000/ficmmp/Makefile 1970-01-01 01:00:00.000000000 +0100
2814 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/ficmmp/Makefile 2005-01-30 09:01:27.000000000 +0100
2815 @@ -0,0 +1,25 @@
2816 +#
2817 +# Copyright 2000 MontaVista Software Inc.
2818 +# Author: MontaVista Software, Inc.
2819 +# ppopov@mvista.com or source@mvista.com
2820 +#
2821 +# Makefile for the Alchemy Semiconductor FIC board.
2822 +#
2823 +# Note! Dependencies are done automagically by 'make dep', which also
2824 +# removes any old dependencies. DON'T put your own dependencies here
2825 +# unless it's something special (ie not a .c file).
2826 +#
2827 +
2828 +USE_STANDARD_AS_RULE := true
2829 +
2830 +O_TARGET := ficmmp.o
2831 +
2832 +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
2833 +
2834 +ifdef CONFIG_MMC
2835 +obj-y += mmc_support.o
2836 +export-objs +=mmc_support.o
2837 +endif
2838 +
2839 +
2840 +include $(TOPDIR)/Rules.make
2841 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/board_setup.c
2842 --- linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-19 15:09:26.000000000 +0100
2843 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/board_setup.c 2005-03-19 08:17:51.000000000 +0100
2844 @@ -51,12 +51,19 @@
2845 {
2846 }
2847
2848 +void board_power_off (void)
2849 +{
2850 +}
2851 +
2852 void __init board_setup(void)
2853 {
2854 u32 pin_func;
2855
2856 rtc_ops = &no_rtc_ops;
2857
2858 + /* Set GPIO14 high to make CD/DAT1 high for MMC to work */
2859 + au_writel(1<<14, SYS_OUTPUTSET);
2860 +
2861 #ifdef CONFIG_AU1X00_USB_DEVICE
2862 // 2nd USB port is USB device
2863 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
2864 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/buttons.c linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/buttons.c
2865 --- linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/buttons.c 1970-01-01 01:00:00.000000000 +0100
2866 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/buttons.c 2005-02-11 22:09:55.000000000 +0100
2867 @@ -0,0 +1,308 @@
2868 +/*
2869 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2870 + *
2871 + * This program is free software; you can redistribute it and/or modify
2872 + * it under the terms of the GNU General Public License version 2 as
2873 + * published by the Free Software Foundation.
2874 + */
2875 +
2876 +#include <linux/config.h>
2877 +#include <linux/module.h>
2878 +#include <linux/init.h>
2879 +#include <linux/fs.h>
2880 +#include <linux/sched.h>
2881 +#include <linux/miscdevice.h>
2882 +#include <linux/errno.h>
2883 +#include <linux/poll.h>
2884 +#include <asm/au1000.h>
2885 +#include <asm/uaccess.h>
2886 +
2887 +#define BUTTON_SELECT (1<<1)
2888 +#define BUTTON_1 (1<<2)
2889 +#define BUTTON_2 (1<<3)
2890 +#define BUTTON_ONOFF (1<<6)
2891 +#define BUTTON_3 (1<<7)
2892 +#define BUTTON_4 (1<<8)
2893 +#define BUTTON_LEFT (1<<9)
2894 +#define BUTTON_DOWN (1<<10)
2895 +#define BUTTON_RIGHT (1<<11)
2896 +#define BUTTON_UP (1<<12)
2897 +
2898 +#define BUTTON_MASK (\
2899 + BUTTON_SELECT \
2900 + | BUTTON_1 \
2901 + | BUTTON_2 \
2902 + | BUTTON_ONOFF \
2903 + | BUTTON_3 \
2904 + | BUTTON_4 \
2905 + | BUTTON_LEFT \
2906 + | BUTTON_DOWN \
2907 + | BUTTON_RIGHT \
2908 + | BUTTON_UP \
2909 + )
2910 +
2911 +#define BUTTON_INVERT (\
2912 + BUTTON_SELECT \
2913 + | BUTTON_1 \
2914 + | BUTTON_2 \
2915 + | BUTTON_3 \
2916 + | BUTTON_4 \
2917 + | BUTTON_LEFT \
2918 + | BUTTON_DOWN \
2919 + | BUTTON_RIGHT \
2920 + | BUTTON_UP \
2921 + )
2922 +
2923 +
2924 +
2925 +#define MAKE_FLAG 0x20
2926 +
2927 +#undef DEBUG
2928 +
2929 +#define DEBUG 0
2930 +//#define DEBUG 1
2931 +
2932 +#if DEBUG
2933 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2934 +#else
2935 +#define DPRINTK(format, args...) do { } while (0)
2936 +#endif
2937 +
2938 +/* Please note that this driver is based on a timer and is not interrupt
2939 + * driven. If you are going to make use of this driver, you will need to have
2940 + * your application open the buttons listing from the /dev directory first.
2941 + */
2942 +
2943 +struct hydrogen3_buttons {
2944 + struct fasync_struct *fasync;
2945 + wait_queue_head_t read_wait;
2946 + int open_count;
2947 + unsigned int debounce;
2948 + unsigned int current;
2949 + unsigned int last;
2950 +};
2951 +
2952 +static struct hydrogen3_buttons buttons_info;
2953 +
2954 +
2955 +static void button_timer_periodic(void *data);
2956 +
2957 +static struct tq_struct button_task = {
2958 + routine: button_timer_periodic,
2959 + data: NULL
2960 +};
2961 +
2962 +static int cleanup_flag = 0;
2963 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2964 +
2965 +
2966 +static unsigned int read_button_state(void)
2967 +{
2968 + unsigned long state;
2969 +
2970 + state = inl(SYS_PINSTATERD) & BUTTON_MASK;
2971 + state ^= BUTTON_INVERT;
2972 +
2973 + DPRINTK( "Current Button State: %d\n", state );
2974 +
2975 + return state;
2976 +}
2977 +
2978 +
2979 +static void button_timer_periodic(void *data)
2980 +{
2981 + struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
2982 + unsigned long button_state;
2983 +
2984 + // If cleanup wants us to die
2985 + if (cleanup_flag) {
2986 + wake_up(&cleanup_wait_queue); // now cleanup_module can return
2987 + } else {
2988 + queue_task(&button_task, &tq_timer); // put ourselves back in the task queue
2989 + }
2990 +
2991 + // read current buttons
2992 + button_state = read_button_state();
2993 +
2994 + // if no buttons are down and nothing to do then
2995 + // save time and be done.
2996 + if ((button_state == 0) && (buttons->current == 0)) {
2997 + return;
2998 + }
2999 +
3000 + if (button_state == buttons->debounce) {
3001 + buttons->current = button_state;
3002 + } else {
3003 + buttons->debounce = button_state;
3004 + }
3005 +// printk("0x%04x\n", button_state);
3006 + if (buttons->current != buttons->last) {
3007 + if (waitqueue_active(&buttons->read_wait)) {
3008 + wake_up_interruptible(&buttons->read_wait);
3009 + }
3010 + }
3011 +}
3012 +
3013 +
3014 +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
3015 +{
3016 + struct hydrogen3_buttons *buttons = filp->private_data;
3017 + char events[16];
3018 + int index;
3019 + int last;
3020 + int cur;
3021 + int bit;
3022 + int bit_mask;
3023 + int err;
3024 +
3025 + DPRINTK("start\n");
3026 +
3027 +try_again:
3028 +
3029 + while (buttons->current == buttons->last) {
3030 + if (filp->f_flags & O_NONBLOCK) {
3031 + return -EAGAIN;
3032 + }
3033 + interruptible_sleep_on(&buttons->read_wait);
3034 + if (signal_pending(current)) {
3035 + return -ERESTARTSYS;
3036 + }
3037 + }
3038 +
3039 + cur = buttons->current;
3040 + last = buttons->last;
3041 +
3042 + index = 0;
3043 + bit_mask = 1;
3044 + for (bit = 0; (bit < 16) && count; bit++) {
3045 + if ((cur ^ last) & bit_mask) {
3046 + if (cur & bit_mask) {
3047 + events[index] = (bit | MAKE_FLAG) + 'A';
3048 + last |= bit_mask;
3049 + } else {
3050 + events[index] = bit + 'A';
3051 + last &= ~bit_mask;
3052 + }
3053 + index++;
3054 + count--;
3055 + }
3056 + bit_mask <<= 1;
3057 + }
3058 + buttons->last = last;
3059 +
3060 + if (index == 0) {
3061 + goto try_again;
3062 + }
3063 +
3064 + err = copy_to_user(buffer, events, index);
3065 + if (err) {
3066 + return err;
3067 + }
3068 +
3069 + return index;
3070 +}
3071 +
3072 +
3073 +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
3074 +{
3075 + struct hydrogen3_buttons *buttons = &buttons_info;
3076 +
3077 + DPRINTK("start\n");
3078 + MOD_INC_USE_COUNT;
3079 +
3080 + filp->private_data = buttons;
3081 +
3082 + if (buttons->open_count++ == 0) {
3083 + button_task.data = buttons;
3084 + cleanup_flag = 0;
3085 + queue_task(&button_task, &tq_timer);
3086 + }
3087 +
3088 + return 0;
3089 +}
3090 +
3091 +
3092 +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
3093 +{
3094 + struct hydrogen3_buttons *buttons = filp->private_data;
3095 + int ret = 0;
3096 +
3097 + DPRINTK("start\n");
3098 + poll_wait(filp, &buttons->read_wait, wait);
3099 + if (buttons->current != buttons->last) {
3100 + ret = POLLIN | POLLRDNORM;
3101 + }
3102 + return ret;
3103 +}
3104 +
3105 +
3106 +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
3107 +{
3108 + struct hydrogen3_buttons *buttons = filp->private_data;
3109 +
3110 + DPRINTK("start\n");
3111 +
3112 + if (--buttons->open_count == 0) {
3113 + cleanup_flag = 1;
3114 + sleep_on(&cleanup_wait_queue);
3115 + }
3116 + MOD_DEC_USE_COUNT;
3117 +
3118 + return 0;
3119 +}
3120 +
3121 +
3122 +
3123 +static struct file_operations hydrogen3_buttons_fops = {
3124 + owner: THIS_MODULE,
3125 + read: hydrogen3_buttons_read,
3126 + poll: hydrogen3_buttons_poll,
3127 + open: hydrogen3_buttons_open,
3128 + release: hydrogen3_buttons_release,
3129 +};
3130 +
3131 +/*
3132 + * The hydrogen3 buttons is a misc device:
3133 + * Major 10 char
3134 + * Minor 22 /dev/buttons
3135 + *
3136 + * This is /dev/misc/buttons if devfs is used.
3137 + */
3138 +
3139 +static struct miscdevice hydrogen3_buttons_dev = {
3140 + minor: 22,
3141 + name: "buttons",
3142 + fops: &hydrogen3_buttons_fops,
3143 +};
3144 +
3145 +static int __init hydrogen3_buttons_init(void)
3146 +{
3147 + struct hydrogen3_buttons *buttons = &buttons_info;
3148 + int ret;
3149 +
3150 + DPRINTK("Initializing buttons driver\n");
3151 + buttons->open_count = 0;
3152 + cleanup_flag = 0;
3153 + init_waitqueue_head(&buttons->read_wait);
3154 +
3155 +
3156 + // yamon configures GPIO pins for the buttons
3157 + // no initialization needed
3158 +
3159 + ret = misc_register(&hydrogen3_buttons_dev);
3160 +
3161 + DPRINTK("Buttons driver fully initialized.\n");
3162 +
3163 + return ret;
3164 +}
3165 +
3166 +
3167 +static void __exit hydrogen3_buttons_exit(void)
3168 +{
3169 + DPRINTK("unloading buttons driver\n");
3170 + misc_deregister(&hydrogen3_buttons_dev);
3171 +}
3172 +
3173 +
3174 +module_init(hydrogen3_buttons_init);
3175 +module_exit(hydrogen3_buttons_exit);
3176 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/Makefile
3177 --- linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/Makefile 2005-01-19 15:09:26.000000000 +0100
3178 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/Makefile 2005-02-11 22:09:55.000000000 +0100
3179 @@ -14,6 +14,11 @@
3180
3181 O_TARGET := hydrogen3.o
3182
3183 -obj-y := init.o board_setup.o irqmap.o
3184 +obj-y := init.o board_setup.o irqmap.o buttons.o
3185 +
3186 +ifdef CONFIG_MMC
3187 +obj-y += mmc_support.o
3188 +export-objs +=mmc_support.o
3189 +endif
3190
3191 include $(TOPDIR)/Rules.make
3192 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/mmc_support.c linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/mmc_support.c
3193 --- linux-2.4.32-rc1/arch/mips/au1000/hydrogen3/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3194 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/hydrogen3/mmc_support.c 2005-02-02 05:27:06.000000000 +0100
3195 @@ -0,0 +1,89 @@
3196 +/*
3197 + * BRIEF MODULE DESCRIPTION
3198 + *
3199 + * MMC support routines for Hydrogen3.
3200 + *
3201 + *
3202 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3203 + * Author: Embedded Edge, LLC.
3204 + * Contact: dan@embeddededge.com
3205 + *
3206 + * This program is free software; you can redistribute it and/or modify it
3207 + * under the terms of the GNU General Public License as published by the
3208 + * Free Software Foundation; either version 2 of the License, or (at your
3209 + * option) any later version.
3210 + *
3211 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3212 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3213 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3214 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3215 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3216 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3217 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3218 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3219 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3220 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3221 + *
3222 + * You should have received a copy of the GNU General Public License along
3223 + * with this program; if not, write to the Free Software Foundation, Inc.,
3224 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3225 + *
3226 + */
3227 +
3228 +
3229 +#include <linux/config.h>
3230 +#include <linux/kernel.h>
3231 +#include <linux/module.h>
3232 +#include <linux/init.h>
3233 +
3234 +#include <asm/irq.h>
3235 +#include <asm/au1000.h>
3236 +#include <asm/au1100_mmc.h>
3237 +
3238 +#define GPIO_17_WP 0x20000
3239 +
3240 +/* SD/MMC controller support functions */
3241 +
3242 +/*
3243 + * Detect card.
3244 + */
3245 +void mmc_card_inserted(int _n_, int *_res_)
3246 +{
3247 + u32 gpios = au_readl(SYS_PINSTATERD);
3248 + u32 emptybit = (1<<16);
3249 + *_res_ = ((gpios & emptybit) == 0);
3250 +}
3251 +
3252 +/*
3253 + * Check card write protection.
3254 + */
3255 +void mmc_card_writable(int _n_, int *_res_)
3256 +{
3257 + unsigned long mmc_wp, board_specific;
3258 + board_specific = au_readl(SYS_OUTPUTSET);
3259 + mmc_wp=GPIO_17_WP;
3260 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3261 + *_res_ = 1;
3262 + } else {
3263 + *_res_ = 0;
3264 + }
3265 +}
3266 +/*
3267 + * Apply power to card slot.
3268 + */
3269 +void mmc_power_on(int _n_)
3270 +{
3271 +}
3272 +
3273 +/*
3274 + * Remove power from card slot.
3275 + */
3276 +void mmc_power_off(int _n_)
3277 +{
3278 +}
3279 +
3280 +EXPORT_SYMBOL(mmc_card_inserted);
3281 +EXPORT_SYMBOL(mmc_card_writable);
3282 +EXPORT_SYMBOL(mmc_power_on);
3283 +EXPORT_SYMBOL(mmc_power_off);
3284 +
3285 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/mtx-1/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/mtx-1/board_setup.c
3286 --- linux-2.4.32-rc1/arch/mips/au1000/mtx-1/board_setup.c 2004-02-18 14:36:30.000000000 +0100
3287 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/mtx-1/board_setup.c 2004-11-26 09:37:16.000000000 +0100
3288 @@ -48,6 +48,12 @@
3289
3290 extern struct rtc_ops no_rtc_ops;
3291
3292 +void board_reset (void)
3293 +{
3294 + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3295 + au_writel(0x00000000, 0xAE00001C);
3296 +}
3297 +
3298 void __init board_setup(void)
3299 {
3300 rtc_ops = &no_rtc_ops;
3301 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/mtx-1/irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/mtx-1/irqmap.c
3302 --- linux-2.4.32-rc1/arch/mips/au1000/mtx-1/irqmap.c 2005-01-19 15:09:26.000000000 +0100
3303 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/mtx-1/irqmap.c 2004-11-26 09:37:16.000000000 +0100
3304 @@ -72,10 +72,10 @@
3305 * A B C D
3306 */
3307 {
3308 - {INTA, INTB, INTC, INTD}, /* IDSEL 0 */
3309 - {INTA, INTB, INTC, INTD}, /* IDSEL 1 */
3310 - {INTA, INTB, INTC, INTD}, /* IDSEL 2 */
3311 - {INTA, INTB, INTC, INTD}, /* IDSEL 3 */
3312 + {INTA, INTB, INTX, INTX}, /* IDSEL 0 */
3313 + {INTB, INTA, INTX, INTX}, /* IDSEL 1 */
3314 + {INTC, INTD, INTX, INTX}, /* IDSEL 2 */
3315 + {INTD, INTC, INTX, INTX}, /* IDSEL 3 */
3316 };
3317 const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
3318 return PCI_IRQ_TABLE_LOOKUP;
3319 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1000/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1000/board_setup.c
3320 --- linux-2.4.32-rc1/arch/mips/au1000/pb1000/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3321 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1000/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3322 @@ -58,6 +58,10 @@
3323 {
3324 }
3325
3326 +void board_power_off (void)
3327 +{
3328 +}
3329 +
3330 void __init board_setup(void)
3331 {
3332 u32 pin_func, static_cfg0;
3333 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1100/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/board_setup.c
3334 --- linux-2.4.32-rc1/arch/mips/au1000/pb1100/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3335 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3336 @@ -62,6 +62,10 @@
3337 au_writel(0x00000000, 0xAE00001C);
3338 }
3339
3340 +void board_power_off (void)
3341 +{
3342 +}
3343 +
3344 void __init board_setup(void)
3345 {
3346 u32 pin_func;
3347 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1100/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/Makefile
3348 --- linux-2.4.32-rc1/arch/mips/au1000/pb1100/Makefile 2003-08-25 13:44:39.000000000 +0200
3349 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/Makefile 2005-01-30 09:10:29.000000000 +0100
3350 @@ -16,4 +16,10 @@
3351
3352 obj-y := init.o board_setup.o irqmap.o
3353
3354 +
3355 +ifdef CONFIG_MMC
3356 +obj-y += mmc_support.o
3357 +export-objs += mmc_support.o
3358 +endif
3359 +
3360 include $(TOPDIR)/Rules.make
3361 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1100/mmc_support.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/mmc_support.c
3362 --- linux-2.4.32-rc1/arch/mips/au1000/pb1100/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3363 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1100/mmc_support.c 2005-01-30 09:10:29.000000000 +0100
3364 @@ -0,0 +1,126 @@
3365 +/*
3366 + * BRIEF MODULE DESCRIPTION
3367 + *
3368 + * MMC support routines for PB1100.
3369 + *
3370 + *
3371 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3372 + * Author: Embedded Edge, LLC.
3373 + * Contact: dan@embeddededge.com
3374 + *
3375 + * This program is free software; you can redistribute it and/or modify it
3376 + * under the terms of the GNU General Public License as published by the
3377 + * Free Software Foundation; either version 2 of the License, or (at your
3378 + * option) any later version.
3379 + *
3380 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3381 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3382 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3383 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3384 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3385 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3386 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3387 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3388 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3389 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3390 + *
3391 + * You should have received a copy of the GNU General Public License along
3392 + * with this program; if not, write to the Free Software Foundation, Inc.,
3393 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3394 + *
3395 + */
3396 +
3397 +
3398 +#include <linux/config.h>
3399 +#include <linux/kernel.h>
3400 +#include <linux/module.h>
3401 +#include <linux/init.h>
3402 +
3403 +#include <asm/irq.h>
3404 +#include <asm/au1000.h>
3405 +#include <asm/au1100_mmc.h>
3406 +#include <asm/pb1100.h>
3407 +
3408 +
3409 +/* SD/MMC controller support functions */
3410 +
3411 +/*
3412 + * Detect card.
3413 + */
3414 +void mmc_card_inserted(int _n_, int *_res_)
3415 +{
3416 + u32 gpios = au_readl(SYS_PINSTATERD);
3417 + u32 emptybit = (_n_) ? (1<<15) : (1<<14);
3418 + *_res_ = ((gpios & emptybit) == 0);
3419 +}
3420 +
3421 +/*
3422 + * Check card write protection.
3423 + */
3424 +void mmc_card_writable(int _n_, int *_res_)
3425 +{
3426 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3427 + unsigned long mmc_wp, board_specific;
3428 +
3429 + if (_n_) {
3430 + mmc_wp = BCSR_PCMCIA_SD1_WP;
3431 + } else {
3432 + mmc_wp = BCSR_PCMCIA_SD0_WP;
3433 + }
3434 +
3435 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3436 +
3437 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3438 + *_res_ = 1;
3439 + } else {
3440 + *_res_ = 0;
3441 + }
3442 +}
3443 +
3444 +/*
3445 + * Apply power to card slot.
3446 + */
3447 +void mmc_power_on(int _n_)
3448 +{
3449 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3450 + unsigned long mmc_pwr, board_specific;
3451 +
3452 + if (_n_) {
3453 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3454 + } else {
3455 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3456 + }
3457 +
3458 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3459 + board_specific |= mmc_pwr;
3460 +
3461 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3462 + au_sync_delay(1);
3463 +}
3464 +
3465 +/*
3466 + * Remove power from card slot.
3467 + */
3468 +void mmc_power_off(int _n_)
3469 +{
3470 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3471 + unsigned long mmc_pwr, board_specific;
3472 +
3473 + if (_n_) {
3474 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3475 + } else {
3476 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3477 + }
3478 +
3479 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3480 + board_specific &= ~mmc_pwr;
3481 +
3482 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3483 + au_sync_delay(1);
3484 +}
3485 +
3486 +EXPORT_SYMBOL(mmc_card_inserted);
3487 +EXPORT_SYMBOL(mmc_card_writable);
3488 +EXPORT_SYMBOL(mmc_power_on);
3489 +EXPORT_SYMBOL(mmc_power_off);
3490 +
3491 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1200/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/board_setup.c
3492 --- linux-2.4.32-rc1/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
3493 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3494 @@ -0,0 +1,221 @@
3495 +/*
3496 + *
3497 + * BRIEF MODULE DESCRIPTION
3498 + * Alchemy Pb1200 board setup.
3499 + *
3500 + * This program is free software; you can redistribute it and/or modify it
3501 + * under the terms of the GNU General Public License as published by the
3502 + * Free Software Foundation; either version 2 of the License, or (at your
3503 + * option) any later version.
3504 + *
3505 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3506 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3507 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3508 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3509 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3510 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3511 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3512 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3513 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3514 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3515 + *
3516 + * You should have received a copy of the GNU General Public License along
3517 + * with this program; if not, write to the Free Software Foundation, Inc.,
3518 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3519 + */
3520 +#include <linux/config.h>
3521 +#include <linux/init.h>
3522 +#include <linux/sched.h>
3523 +#include <linux/ioport.h>
3524 +#include <linux/mm.h>
3525 +#include <linux/console.h>
3526 +#include <linux/mc146818rtc.h>
3527 +#include <linux/delay.h>
3528 +
3529 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3530 +#include <linux/ide.h>
3531 +#endif
3532 +
3533 +#include <asm/cpu.h>
3534 +#include <asm/bootinfo.h>
3535 +#include <asm/irq.h>
3536 +#include <asm/keyboard.h>
3537 +#include <asm/mipsregs.h>
3538 +#include <asm/reboot.h>
3539 +#include <asm/pgtable.h>
3540 +#include <asm/au1000.h>
3541 +#include <asm/au1xxx_dbdma.h>
3542 +
3543 +#ifdef CONFIG_MIPS_PB1200
3544 +#include <asm/pb1200.h>
3545 +#endif
3546 +
3547 +#ifdef CONFIG_MIPS_DB1200
3548 +#include <asm/db1200.h>
3549 +#define PB1200_ETH_INT DB1200_ETH_INT
3550 +#define PB1200_IDE_INT DB1200_IDE_INT
3551 +#endif
3552 +
3553 +extern struct rtc_ops no_rtc_ops;
3554 +
3555 +extern void _board_init_irq(void);
3556 +extern void (*board_init_irq)(void);
3557 +
3558 +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
3559 +extern struct ide_ops *ide_ops;
3560 +extern struct ide_ops au1xxx_ide_ops;
3561 +extern u32 au1xxx_ide_virtbase;
3562 +extern u64 au1xxx_ide_physbase;
3563 +extern int au1xxx_ide_irq;
3564 +
3565 +u32 led_base_addr;
3566 +/* Ddma */
3567 +chan_tab_t *ide_read_ch, *ide_write_ch;
3568 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3569 +
3570 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
3571 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3572 +
3573 +void board_reset (void)
3574 +{
3575 + bcsr->resets = 0;
3576 +}
3577 +
3578 +void board_power_off (void)
3579 +{
3580 + bcsr->resets = 0xC000;
3581 +}
3582 +
3583 +void __init board_setup(void)
3584 +{
3585 + char *argptr = NULL;
3586 + u32 pin_func;
3587 + rtc_ops = &no_rtc_ops;
3588 +
3589 +#if 0
3590 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
3591 + * but it is board specific code, so put it here.
3592 + */
3593 + pin_func = au_readl(SYS_PINFUNC);
3594 + au_sync();
3595 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
3596 + au_writel(pin_func, SYS_PINFUNC);
3597 +
3598 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3599 + au_sync();
3600 +#endif
3601 +
3602 +#if defined( CONFIG_I2C_ALGO_AU1550 )
3603 + {
3604 + u32 freq0, clksrc;
3605 +
3606 + /* Select SMBUS in CPLD */
3607 + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
3608 +
3609 + pin_func = au_readl(SYS_PINFUNC);
3610 + au_sync();
3611 + pin_func &= ~(3<<17 | 1<<4);
3612 + /* Set GPIOs correctly */
3613 + pin_func |= 2<<17;
3614 + au_writel(pin_func, SYS_PINFUNC);
3615 + au_sync();
3616 +
3617 + /* The i2c driver depends on 50Mhz clock */
3618 + freq0 = au_readl(SYS_FREQCTRL0);
3619 + au_sync();
3620 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
3621 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
3622 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
3623 + au_writel(freq0, SYS_FREQCTRL0);
3624 + au_sync();
3625 + freq0 |= SYS_FC_FE1;
3626 + au_writel(freq0, SYS_FREQCTRL0);
3627 + au_sync();
3628 +
3629 + clksrc = au_readl(SYS_CLKSRC);
3630 + au_sync();
3631 + clksrc &= ~0x01f00000;
3632 + /* bit 22 is EXTCLK0 for PSC0 */
3633 + clksrc |= (0x3 << 22);
3634 + au_writel(clksrc, SYS_CLKSRC);
3635 + au_sync();
3636 + }
3637 +#endif
3638 +
3639 +#ifdef CONFIG_FB_AU1200
3640 + argptr = prom_getcmdline();
3641 + strcat(argptr, " video=au1200fb:");
3642 +#endif
3643 +
3644 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3645 + /*
3646 + * Iniz IDE parameters
3647 + */
3648 + ide_ops = &au1xxx_ide_ops;
3649 + au1xxx_ide_irq = PB1200_IDE_INT;
3650 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3651 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3652 + /*
3653 + * change PIO or PIO+Ddma
3654 + * check the GPIO-5 pin condition. pb1200:s18_dot */
3655 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
3656 +#endif
3657 +
3658 + /* The Pb1200 development board uses external MUX for PSC0 to
3659 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
3660 + */
3661 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
3662 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
3663 + Refer to Pb1200/Db1200 documentation.
3664 +#elif defined( CONFIG_AU1550_PSC_SPI )
3665 + bcsr->resets |= BCSR_RESETS_PCS0MUX;
3666 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
3667 + bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
3668 +#endif
3669 + au_sync();
3670 +
3671 +#ifdef CONFIG_MIPS_PB1200
3672 + printk("AMD Alchemy Pb1200 Board\n");
3673 +#endif
3674 +#ifdef CONFIG_MIPS_DB1200
3675 + printk("AMD Alchemy Db1200 Board\n");
3676 +#endif
3677 +
3678 + /* Setup Pb1200 External Interrupt Controller */
3679 + {
3680 + extern void (*board_init_irq)(void);
3681 + extern void _board_init_irq(void);
3682 + board_init_irq = _board_init_irq;
3683 + }
3684 +}
3685 +
3686 +int
3687 +board_au1200fb_panel (void)
3688 +{
3689 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3690 + int p;
3691 +
3692 + p = bcsr->switches;
3693 + p >>= 8;
3694 + p &= 0x0F;
3695 + return p;
3696 +}
3697 +
3698 +int
3699 +board_au1200fb_panel_init (void)
3700 +{
3701 + /* Apply power */
3702 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3703 + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3704 + return 0;
3705 +}
3706 +
3707 +int
3708 +board_au1200fb_panel_shutdown (void)
3709 +{
3710 + /* Remove power */
3711 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3712 + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3713 + return 0;
3714 +}
3715 +
3716 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1200/init.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/init.c
3717 --- linux-2.4.32-rc1/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
3718 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/init.c 2005-01-30 09:01:28.000000000 +0100
3719 @@ -0,0 +1,72 @@
3720 +/*
3721 + *
3722 + * BRIEF MODULE DESCRIPTION
3723 + * PB1200 board setup
3724 + *
3725 + * This program is free software; you can redistribute it and/or modify it
3726 + * under the terms of the GNU General Public License as published by the
3727 + * Free Software Foundation; either version 2 of the License, or (at your
3728 + * option) any later version.
3729 + *
3730 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3731 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3732 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3733 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3734 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3735 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3736 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3737 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3738 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3739 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3740 + *
3741 + * You should have received a copy of the GNU General Public License along
3742 + * with this program; if not, write to the Free Software Foundation, Inc.,
3743 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3744 + */
3745 +
3746 +#include <linux/init.h>
3747 +#include <linux/mm.h>
3748 +#include <linux/sched.h>
3749 +#include <linux/bootmem.h>
3750 +#include <asm/addrspace.h>
3751 +#include <asm/bootinfo.h>
3752 +#include <linux/config.h>
3753 +#include <linux/string.h>
3754 +#include <linux/kernel.h>
3755 +#include <linux/sched.h>
3756 +
3757 +int prom_argc;
3758 +char **prom_argv, **prom_envp;
3759 +extern void __init prom_init_cmdline(void);
3760 +extern char *prom_getenv(char *envname);
3761 +
3762 +const char *get_system_type(void)
3763 +{
3764 + return "AMD Alchemy Au1200/Pb1200";
3765 +}
3766 +
3767 +u32 mae_memsize = 0;
3768 +
3769 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
3770 +{
3771 + unsigned char *memsize_str;
3772 + unsigned long memsize;
3773 +
3774 + prom_argc = argc;
3775 + prom_argv = argv;
3776 + prom_envp = envp;
3777 +
3778 + mips_machgroup = MACH_GROUP_ALCHEMY;
3779 + mips_machtype = MACH_PB1000; /* set the platform # */
3780 + prom_init_cmdline();
3781 +
3782 + memsize_str = prom_getenv("memsize");
3783 + if (!memsize_str) {
3784 + memsize = 0x08000000;
3785 + } else {
3786 + memsize = simple_strtol(memsize_str, NULL, 0);
3787 + }
3788 + add_memory_region(0, memsize, BOOT_MEM_RAM);
3789 + return 0;
3790 +}
3791 +
3792 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1200/irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/irqmap.c
3793 --- linux-2.4.32-rc1/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
3794 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/irqmap.c 2005-01-30 09:01:28.000000000 +0100
3795 @@ -0,0 +1,180 @@
3796 +/*
3797 + * BRIEF MODULE DESCRIPTION
3798 + * Au1xxx irq map table
3799 + *
3800 + * This program is free software; you can redistribute it and/or modify it
3801 + * under the terms of the GNU General Public License as published by the
3802 + * Free Software Foundation; either version 2 of the License, or (at your
3803 + * option) any later version.
3804 + *
3805 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3806 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3807 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3808 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3809 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3810 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3811 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3812 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3813 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3814 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3815 + *
3816 + * You should have received a copy of the GNU General Public License along
3817 + * with this program; if not, write to the Free Software Foundation, Inc.,
3818 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3819 + */
3820 +#include <linux/errno.h>
3821 +#include <linux/init.h>
3822 +#include <linux/irq.h>
3823 +#include <linux/kernel_stat.h>
3824 +#include <linux/module.h>
3825 +#include <linux/signal.h>
3826 +#include <linux/sched.h>
3827 +#include <linux/types.h>
3828 +#include <linux/interrupt.h>
3829 +#include <linux/ioport.h>
3830 +#include <linux/timex.h>
3831 +#include <linux/slab.h>
3832 +#include <linux/random.h>
3833 +#include <linux/delay.h>
3834 +
3835 +#include <asm/bitops.h>
3836 +#include <asm/bootinfo.h>
3837 +#include <asm/io.h>
3838 +#include <asm/mipsregs.h>
3839 +#include <asm/system.h>
3840 +#include <asm/au1000.h>
3841 +
3842 +#ifdef CONFIG_MIPS_PB1200
3843 +#include <asm/pb1200.h>
3844 +#endif
3845 +
3846 +#ifdef CONFIG_MIPS_DB1200
3847 +#include <asm/db1200.h>
3848 +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
3849 +#define PB1200_INT_END DB1200_INT_END
3850 +#endif
3851 +
3852 +au1xxx_irq_map_t au1xxx_irq_map[] = {
3853 + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
3854 +};
3855 +
3856 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3857 +
3858 +/*
3859 + * Support for External interrupts on the PbAu1200 Development platform.
3860 + */
3861 +static volatile int pb1200_cascade_en=0;
3862 +
3863 +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
3864 +{
3865 + unsigned short bisr = bcsr->int_status;
3866 + int extirq_nr = 0;
3867 +
3868 + /* Clear all the edge interrupts. This has no effect on level */
3869 + bcsr->int_status = bisr;
3870 + for( ; bisr; bisr &= (bisr-1) )
3871 + {
3872 + extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
3873 + /* Ack and dispatch IRQ */
3874 + do_IRQ(extirq_nr,regs);
3875 + }
3876 +}
3877 +
3878 +inline void pb1200_enable_irq(unsigned int irq_nr)
3879 +{
3880 + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3881 + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
3882 +}
3883 +
3884 +inline void pb1200_disable_irq(unsigned int irq_nr)
3885 +{
3886 + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3887 + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
3888 +}
3889 +
3890 +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
3891 +{
3892 + if (++pb1200_cascade_en == 1)
3893 + {
3894 + request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
3895 + 0, "Pb1200 Cascade", &pb1200_cascade_handler );
3896 +#ifdef CONFIG_MIPS_PB1200
3897 + /* We have a problem with CPLD rev3. Enable a workaround */
3898 + if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
3899 + {
3900 + printk("\nWARNING!!!\n");
3901 + printk("\nWARNING!!!\n");
3902 + printk("\nWARNING!!!\n");
3903 + printk("\nWARNING!!!\n");
3904 + printk("\nWARNING!!!\n");
3905 + printk("\nWARNING!!!\n");
3906 + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
3907 + printk("updated to latest revision. This software will not\n");
3908 + printk("work on anything less than CPLD rev4\n");
3909 + printk("\nWARNING!!!\n");
3910 + printk("\nWARNING!!!\n");
3911 + printk("\nWARNING!!!\n");
3912 + printk("\nWARNING!!!\n");
3913 + printk("\nWARNING!!!\n");
3914 + printk("\nWARNING!!!\n");
3915 + while(1);
3916 + }
3917 +#endif
3918 + }
3919 + pb1200_enable_irq(irq_nr);
3920 + return 0;
3921 +}
3922 +
3923 +static void pb1200_shutdown_irq( unsigned int irq_nr )
3924 +{
3925 + pb1200_disable_irq(irq_nr);
3926 + if (--pb1200_cascade_en == 0)
3927 + {
3928 + free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
3929 + }
3930 + return;
3931 +}
3932 +
3933 +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
3934 +{
3935 + pb1200_disable_irq( irq_nr );
3936 +}
3937 +
3938 +static void pb1200_end_irq(unsigned int irq_nr)
3939 +{
3940 + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
3941 + pb1200_enable_irq(irq_nr);
3942 + }
3943 +}
3944 +
3945 +static struct hw_interrupt_type external_irq_type =
3946 +{
3947 +#ifdef CONFIG_MIPS_PB1200
3948 + "Pb1200 Ext",
3949 +#endif
3950 +#ifdef CONFIG_MIPS_DB1200
3951 + "Db1200 Ext",
3952 +#endif
3953 + pb1200_startup_irq,
3954 + pb1200_shutdown_irq,
3955 + pb1200_enable_irq,
3956 + pb1200_disable_irq,
3957 + pb1200_mask_and_ack_irq,
3958 + pb1200_end_irq,
3959 + NULL
3960 +};
3961 +
3962 +void _board_init_irq(void)
3963 +{
3964 + int irq_nr;
3965 +
3966 + for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
3967 + {
3968 + irq_desc[irq_nr].handler = &external_irq_type;
3969 + pb1200_disable_irq(irq_nr);
3970 + }
3971 +
3972 + /* GPIO_7 can not be hooked here, so it is hooked upon first
3973 + request of any source attached to the cascade */
3974 +}
3975 +
3976 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1200/Makefile linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/Makefile
3977 --- linux-2.4.32-rc1/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
3978 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/Makefile 2005-01-30 09:01:27.000000000 +0100
3979 @@ -0,0 +1,25 @@
3980 +#
3981 +# Copyright 2000 MontaVista Software Inc.
3982 +# Author: MontaVista Software, Inc.
3983 +# ppopov@mvista.com or source@mvista.com
3984 +#
3985 +# Makefile for the Alchemy Semiconductor PB1000 board.
3986 +#
3987 +# Note! Dependencies are done automagically by 'make dep', which also
3988 +# removes any old dependencies. DON'T put your own dependencies here
3989 +# unless it's something special (ie not a .c file).
3990 +#
3991 +
3992 +USE_STANDARD_AS_RULE := true
3993 +
3994 +O_TARGET := pb1200.o
3995 +
3996 +obj-y := init.o board_setup.o irqmap.o
3997 +
3998 +ifdef CONFIG_MMC
3999 +obj-y += mmc_support.o
4000 +export-objs +=mmc_support.o
4001 +endif
4002 +
4003 +
4004 +include $(TOPDIR)/Rules.make
4005 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1200/mmc_support.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/mmc_support.c
4006 --- linux-2.4.32-rc1/arch/mips/au1000/pb1200/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
4007 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1200/mmc_support.c 2005-01-30 09:01:28.000000000 +0100
4008 @@ -0,0 +1,141 @@
4009 +/*
4010 + * BRIEF MODULE DESCRIPTION
4011 + *
4012 + * MMC support routines for PB1200.
4013 + *
4014 + *
4015 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
4016 + * Author: Embedded Edge, LLC.
4017 + * Contact: dan@embeddededge.com
4018 + *
4019 + * This program is free software; you can redistribute it and/or modify it
4020 + * under the terms of the GNU General Public License as published by the
4021 + * Free Software Foundation; either version 2 of the License, or (at your
4022 + * option) any later version.
4023 + *
4024 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
4025 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
4026 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
4027 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
4028 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
4029 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
4030 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
4031 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4032 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
4033 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4034 + *
4035 + * You should have received a copy of the GNU General Public License along
4036 + * with this program; if not, write to the Free Software Foundation, Inc.,
4037 + * 675 Mass Ave, Cambridge, MA 02139, USA.
4038 + *
4039 + */
4040 +
4041 +
4042 +#include <linux/config.h>
4043 +#include <linux/kernel.h>
4044 +#include <linux/module.h>
4045 +#include <linux/init.h>
4046 +
4047 +#include <asm/irq.h>
4048 +#include <asm/au1000.h>
4049 +#include <asm/au1100_mmc.h>
4050 +
4051 +#ifdef CONFIG_MIPS_PB1200
4052 +#include <asm/pb1200.h>
4053 +#endif
4054 +
4055 +#ifdef CONFIG_MIPS_DB1200
4056 +/* NOTE: DB1200 only has SD0 pinned out and usable */
4057 +#include <asm/db1200.h>
4058 +#endif
4059 +
4060 +/* SD/MMC controller support functions */
4061 +
4062 +/*
4063 + * Detect card.
4064 + */
4065 +void mmc_card_inserted(int socket, int *result)
4066 +{
4067 + u16 mask;
4068 +
4069 + if (socket)
4070 +#ifdef CONFIG_MIPS_DB1200
4071 + mask = 0;
4072 +#else
4073 + mask = BCSR_INT_SD1INSERT;
4074 +#endif
4075 + else
4076 + mask = BCSR_INT_SD0INSERT;
4077 +
4078 + *result = ((bcsr->sig_status & mask) != 0);
4079 +}
4080 +
4081 +/*
4082 + * Check card write protection.
4083 + */
4084 +void mmc_card_writable(int socket, int *result)
4085 +{
4086 + u16 mask;
4087 +
4088 + if (socket)
4089 +#ifdef CONFIG_MIPS_DB1200
4090 + mask = 0;
4091 +#else
4092 + mask = BCSR_STATUS_SD1WP;
4093 +#endif
4094 + else
4095 + mask = BCSR_STATUS_SD0WP;
4096 +
4097 + /* low means card writable */
4098 + if (!(bcsr->status & mask)) {
4099 + *result = 1;
4100 + } else {
4101 + *result = 0;
4102 + }
4103 +}
4104 +
4105 +/*
4106 + * Apply power to card slot.
4107 + */
4108 +void mmc_power_on(int socket)
4109 +{
4110 + u16 mask;
4111 +
4112 + if (socket)
4113 +#ifdef CONFIG_MIPS_DB1200
4114 + mask = 0;
4115 +#else
4116 + mask = BCSR_BOARD_SD1PWR;
4117 +#endif
4118 + else
4119 + mask = BCSR_BOARD_SD0PWR;
4120 +
4121 + bcsr->board |= mask;
4122 + au_sync_delay(1);
4123 +}
4124 +
4125 +/*
4126 + * Remove power from card slot.
4127 + */
4128 +void mmc_power_off(int socket)
4129 +{
4130 + u16 mask;
4131 +
4132 + if (socket)
4133 +#ifdef CONFIG_MIPS_DB1200
4134 + mask = 0;
4135 +#else
4136 + mask = BCSR_BOARD_SD1PWR;
4137 +#endif
4138 + else
4139 + mask = BCSR_BOARD_SD0PWR;
4140 +
4141 + bcsr->board &= ~mask;
4142 + au_sync_delay(1);
4143 +}
4144 +
4145 +EXPORT_SYMBOL(mmc_card_inserted);
4146 +EXPORT_SYMBOL(mmc_card_writable);
4147 +EXPORT_SYMBOL(mmc_power_on);
4148 +EXPORT_SYMBOL(mmc_power_off);
4149 +
4150 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1500/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1500/board_setup.c
4151 --- linux-2.4.32-rc1/arch/mips/au1000/pb1500/board_setup.c 2005-01-19 15:09:26.000000000 +0100
4152 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1500/board_setup.c 2005-03-19 08:17:51.000000000 +0100
4153 @@ -62,6 +62,10 @@
4154 au_writel(0x00000000, 0xAE00001C);
4155 }
4156
4157 +void board_power_off (void)
4158 +{
4159 +}
4160 +
4161 void __init board_setup(void)
4162 {
4163 u32 pin_func;
4164 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1550/board_setup.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1550/board_setup.c
4165 --- linux-2.4.32-rc1/arch/mips/au1000/pb1550/board_setup.c 2005-01-19 15:09:26.000000000 +0100
4166 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1550/board_setup.c 2005-03-19 08:17:51.000000000 +0100
4167 @@ -48,12 +48,31 @@
4168
4169 extern struct rtc_ops no_rtc_ops;
4170
4171 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4172 +extern struct ide_ops *ide_ops;
4173 +extern struct ide_ops au1xxx_ide_ops;
4174 +extern u32 au1xxx_ide_virtbase;
4175 +extern u64 au1xxx_ide_physbase;
4176 +extern unsigned int au1xxx_ide_irq;
4177 +
4178 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
4179 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
4180 +
4181 void board_reset (void)
4182 {
4183 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
4184 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
4185 }
4186
4187 +void board_power_off (void)
4188 +{
4189 + /* power off system */
4190 + printk("\n** Powering off Pb1550\n");
4191 + au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
4192 + au_sync();
4193 + while(1); /* should not get here */
4194 +}
4195 +
4196 void __init board_setup(void)
4197 {
4198 u32 pin_func;
4199 @@ -78,5 +97,36 @@
4200 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
4201 au_sync();
4202
4203 +#if defined(CONFIG_AU1XXX_SMC91111)
4204 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4205 +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
4206 +#else
4207 +#define CPLD_CONTROL (0xAF00000C)
4208 + {
4209 + /* set up the Static Bus timing */
4210 + /* only 396Mhz */
4211 + /* reset the DC */
4212 + au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
4213 + au_writel(0x00010003, MEM_STCFG0);
4214 + au_writel(0x000c00c0, MEM_STCFG2);
4215 + au_writel(0x85E1900D, MEM_STTIME2);
4216 + }
4217 +#endif
4218 +#endif /* end CONFIG_SMC91111 */
4219 +
4220 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4221 + /*
4222 + * Iniz IDE parameters
4223 + */
4224 + ide_ops = &au1xxx_ide_ops;
4225 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
4226 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
4227 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
4228 + /*
4229 + * change PIO or PIO+Ddma
4230 + * check the GPIO-6 pin condition. pb1550:s15_dot
4231 + */
4232 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
4233 +#endif
4234 printk("AMD Alchemy Pb1550 Board\n");
4235 }
4236 diff -Nur linux-2.4.32-rc1/arch/mips/au1000/pb1550/irqmap.c linux-2.4.32-rc1.mips/arch/mips/au1000/pb1550/irqmap.c
4237 --- linux-2.4.32-rc1/arch/mips/au1000/pb1550/irqmap.c 2005-01-19 15:09:26.000000000 +0100
4238 +++ linux-2.4.32-rc1.mips/arch/mips/au1000/pb1550/irqmap.c 2005-01-30 09:01:28.000000000 +0100
4239 @@ -50,6 +50,9 @@
4240 au1xxx_irq_map_t au1xxx_irq_map[] = {
4241 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
4242 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
4243 +#ifdef CONFIG_AU1XXX_SMC91111
4244 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
4245 +#endif
4246 };
4247
4248 int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
4249 diff -Nur linux-2.4.32-rc1/arch/mips/config-shared.in linux-2.4.32-rc1.mips/arch/mips/config-shared.in
4250 --- linux-2.4.32-rc1/arch/mips/config-shared.in 2005-01-19 15:09:27.000000000 +0100
4251 +++ linux-2.4.32-rc1.mips/arch/mips/config-shared.in 2005-01-30 09:01:26.000000000 +0100
4252 @@ -21,16 +21,19 @@
4253 comment 'Machine selection'
4254 dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
4255 dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
4256 +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
4257 dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
4258 dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
4259 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
4260 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
4261 dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
4262 +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
4263 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
4264 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
4265 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
4266 -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4267 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
4268 +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
4269 +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4270 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
4271 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
4272 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
4273 @@ -249,6 +252,12 @@
4274 define_bool CONFIG_PC_KEYB y
4275 define_bool CONFIG_NONCOHERENT_IO y
4276 fi
4277 +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
4278 + define_bool CONFIG_SOC_AU1X00 y
4279 + define_bool CONFIG_SOC_AU1200 y
4280 + define_bool CONFIG_NONCOHERENT_IO y
4281 + define_bool CONFIG_PC_KEYB y
4282 +fi
4283 if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
4284 define_bool CONFIG_SOC_AU1X00 y
4285 define_bool CONFIG_SOC_AU1500 y
4286 @@ -263,6 +272,12 @@
4287 define_bool CONFIG_SWAP_IO_SPACE_W y
4288 define_bool CONFIG_SWAP_IO_SPACE_L y
4289 fi
4290 +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4291 + define_bool CONFIG_SOC_AU1X00 y
4292 + define_bool CONFIG_SOC_AU1500 y
4293 + define_bool CONFIG_NONCOHERENT_IO y
4294 + define_bool CONFIG_PC_KEYB y
4295 +fi
4296 if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
4297 define_bool CONFIG_SOC_AU1X00 y
4298 define_bool CONFIG_SOC_AU1100 y
4299 @@ -271,9 +286,15 @@
4300 define_bool CONFIG_SWAP_IO_SPACE_W y
4301 define_bool CONFIG_SWAP_IO_SPACE_L y
4302 fi
4303 -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4304 +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4305 define_bool CONFIG_SOC_AU1X00 y
4306 - define_bool CONFIG_SOC_AU1500 y
4307 + define_bool CONFIG_SOC_AU1550 y
4308 + define_bool CONFIG_NONCOHERENT_IO n
4309 + define_bool CONFIG_PC_KEYB y
4310 +fi
4311 +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
4312 + define_bool CONFIG_SOC_AU1X00 y
4313 + define_bool CONFIG_SOC_AU1200 y
4314 define_bool CONFIG_NONCOHERENT_IO y
4315 define_bool CONFIG_PC_KEYB y
4316 fi
4317 @@ -290,18 +311,24 @@
4318 define_bool CONFIG_NONCOHERENT_IO y
4319 define_bool CONFIG_PC_KEYB y
4320 fi
4321 +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4322 + define_bool CONFIG_SOC_AU1X00 y
4323 + define_bool CONFIG_SOC_AU1100 y
4324 + define_bool CONFIG_NONCOHERENT_IO y
4325 + define_bool CONFIG_PC_KEYB y
4326 + define_bool CONFIG_SWAP_IO_SPACE y
4327 +fi
4328 if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
4329 define_bool CONFIG_SOC_AU1X00 y
4330 define_bool CONFIG_SOC_AU1550 y
4331 define_bool CONFIG_NONCOHERENT_IO y
4332 define_bool CONFIG_PC_KEYB y
4333 fi
4334 -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4335 +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
4336 define_bool CONFIG_SOC_AU1X00 y
4337 - define_bool CONFIG_SOC_AU1100 y
4338 + define_bool CONFIG_SOC_AU1200 y
4339 define_bool CONFIG_NONCOHERENT_IO y
4340 define_bool CONFIG_PC_KEYB y
4341 - define_bool CONFIG_SWAP_IO_SPACE y
4342 fi
4343 if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
4344 define_bool CONFIG_SOC_AU1X00 y
4345 @@ -327,12 +354,6 @@
4346 define_bool CONFIG_NONCOHERENT_IO y
4347 define_bool CONFIG_PC_KEYB y
4348 fi
4349 -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4350 - define_bool CONFIG_SOC_AU1X00 y
4351 - define_bool CONFIG_SOC_AU1550 y
4352 - define_bool CONFIG_NONCOHERENT_IO n
4353 - define_bool CONFIG_PC_KEYB y
4354 -fi
4355 if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
4356 define_bool CONFIG_BOOT_ELF32 y
4357 define_bool CONFIG_COBALT_LCD y
4358 @@ -729,6 +750,13 @@
4359 "$CONFIG_MIPS_PB1000" = "y" -o \
4360 "$CONFIG_MIPS_PB1100" = "y" -o \
4361 "$CONFIG_MIPS_PB1500" = "y" -o \
4362 + "$CONFIG_MIPS_PB1550" = "y" -o \
4363 + "$CONFIG_MIPS_PB1200" = "y" -o \
4364 + "$CONFIG_MIPS_DB1000" = "y" -o \
4365 + "$CONFIG_MIPS_DB1100" = "y" -o \
4366 + "$CONFIG_MIPS_DB1500" = "y" -o \
4367 + "$CONFIG_MIPS_DB1550" = "y" -o \
4368 + "$CONFIG_MIPS_DB1200" = "y" -o \
4369 "$CONFIG_NEC_OSPREY" = "y" -o \
4370 "$CONFIG_NEC_EAGLE" = "y" -o \
4371 "$CONFIG_NINO" = "y" -o \
4372 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig linux-2.4.32-rc1.mips/arch/mips/defconfig
4373 --- linux-2.4.32-rc1/arch/mips/defconfig 2005-01-19 15:09:27.000000000 +0100
4374 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig 2005-03-18 13:13:21.000000000 +0100
4375 @@ -30,8 +30,8 @@
4376 # CONFIG_MIPS_PB1000 is not set
4377 # CONFIG_MIPS_PB1100 is not set
4378 # CONFIG_MIPS_PB1500 is not set
4379 -# CONFIG_MIPS_HYDROGEN3 is not set
4380 # CONFIG_MIPS_PB1550 is not set
4381 +# CONFIG_MIPS_HYDROGEN3 is not set
4382 # CONFIG_MIPS_XXS1500 is not set
4383 # CONFIG_MIPS_MTX1 is not set
4384 # CONFIG_COGENT_CSB250 is not set
4385 @@ -235,11 +235,6 @@
4386 #
4387 # CONFIG_IPX is not set
4388 # CONFIG_ATALK is not set
4389 -
4390 -#
4391 -# Appletalk devices
4392 -#
4393 -# CONFIG_DEV_APPLETALK is not set
4394 # CONFIG_DECNET is not set
4395 # CONFIG_BRIDGE is not set
4396 # CONFIG_X25 is not set
4397 @@ -319,9 +314,11 @@
4398 # CONFIG_SCSI_MEGARAID is not set
4399 # CONFIG_SCSI_MEGARAID2 is not set
4400 # CONFIG_SCSI_SATA is not set
4401 +# CONFIG_SCSI_SATA_AHCI is not set
4402 # CONFIG_SCSI_SATA_SVW is not set
4403 # CONFIG_SCSI_ATA_PIIX is not set
4404 # CONFIG_SCSI_SATA_NV is not set
4405 +# CONFIG_SCSI_SATA_QSTOR is not set
4406 # CONFIG_SCSI_SATA_PROMISE is not set
4407 # CONFIG_SCSI_SATA_SX4 is not set
4408 # CONFIG_SCSI_SATA_SIL is not set
4409 @@ -465,7 +462,6 @@
4410 # CONFIG_SERIAL is not set
4411 # CONFIG_SERIAL_EXTENDED is not set
4412 # CONFIG_SERIAL_NONSTANDARD is not set
4413 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4414 CONFIG_UNIX98_PTYS=y
4415 CONFIG_UNIX98_PTY_COUNT=256
4416
4417 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-atlas linux-2.4.32-rc1.mips/arch/mips/defconfig-atlas
4418 --- linux-2.4.32-rc1/arch/mips/defconfig-atlas 2005-01-19 15:09:27.000000000 +0100
4419 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-atlas 2005-03-18 13:13:21.000000000 +0100
4420 @@ -28,8 +28,8 @@
4421 # CONFIG_MIPS_PB1000 is not set
4422 # CONFIG_MIPS_PB1100 is not set
4423 # CONFIG_MIPS_PB1500 is not set
4424 -# CONFIG_MIPS_HYDROGEN3 is not set
4425 # CONFIG_MIPS_PB1550 is not set
4426 +# CONFIG_MIPS_HYDROGEN3 is not set
4427 # CONFIG_MIPS_XXS1500 is not set
4428 # CONFIG_MIPS_MTX1 is not set
4429 # CONFIG_COGENT_CSB250 is not set
4430 @@ -235,11 +235,6 @@
4431 #
4432 # CONFIG_IPX is not set
4433 # CONFIG_ATALK is not set
4434 -
4435 -#
4436 -# Appletalk devices
4437 -#
4438 -# CONFIG_DEV_APPLETALK is not set
4439 # CONFIG_DECNET is not set
4440 # CONFIG_BRIDGE is not set
4441 # CONFIG_X25 is not set
4442 @@ -317,9 +312,11 @@
4443 # CONFIG_SCSI_MEGARAID is not set
4444 # CONFIG_SCSI_MEGARAID2 is not set
4445 # CONFIG_SCSI_SATA is not set
4446 +# CONFIG_SCSI_SATA_AHCI is not set
4447 # CONFIG_SCSI_SATA_SVW is not set
4448 # CONFIG_SCSI_ATA_PIIX is not set
4449 # CONFIG_SCSI_SATA_NV is not set
4450 +# CONFIG_SCSI_SATA_QSTOR is not set
4451 # CONFIG_SCSI_SATA_PROMISE is not set
4452 # CONFIG_SCSI_SATA_SX4 is not set
4453 # CONFIG_SCSI_SATA_SIL is not set
4454 @@ -528,7 +525,6 @@
4455 CONFIG_SERIAL_CONSOLE=y
4456 # CONFIG_SERIAL_EXTENDED is not set
4457 # CONFIG_SERIAL_NONSTANDARD is not set
4458 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4459 CONFIG_UNIX98_PTYS=y
4460 CONFIG_UNIX98_PTY_COUNT=256
4461
4462 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-bosporus linux-2.4.32-rc1.mips/arch/mips/defconfig-bosporus
4463 --- linux-2.4.32-rc1/arch/mips/defconfig-bosporus 2005-01-19 15:09:27.000000000 +0100
4464 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-bosporus 2005-03-18 13:13:21.000000000 +0100
4465 @@ -30,8 +30,8 @@
4466 # CONFIG_MIPS_PB1000 is not set
4467 # CONFIG_MIPS_PB1100 is not set
4468 # CONFIG_MIPS_PB1500 is not set
4469 -# CONFIG_MIPS_HYDROGEN3 is not set
4470 # CONFIG_MIPS_PB1550 is not set
4471 +# CONFIG_MIPS_HYDROGEN3 is not set
4472 # CONFIG_MIPS_XXS1500 is not set
4473 # CONFIG_MIPS_MTX1 is not set
4474 # CONFIG_COGENT_CSB250 is not set
4475 @@ -208,9 +208,7 @@
4476 CONFIG_MTD_BOSPORUS=y
4477 # CONFIG_MTD_XXS1500 is not set
4478 # CONFIG_MTD_MTX1 is not set
4479 -# CONFIG_MTD_DB1X00 is not set
4480 # CONFIG_MTD_PB1550 is not set
4481 -# CONFIG_MTD_HYDROGEN3 is not set
4482 # CONFIG_MTD_MIRAGE is not set
4483 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4484 # CONFIG_MTD_OCELOT is not set
4485 @@ -229,7 +227,6 @@
4486 #
4487 # Disk-On-Chip Device Drivers
4488 #
4489 -# CONFIG_MTD_DOC1000 is not set
4490 # CONFIG_MTD_DOC2000 is not set
4491 # CONFIG_MTD_DOC2001 is not set
4492 # CONFIG_MTD_DOCPROBE is not set
4493 @@ -373,11 +370,6 @@
4494 #
4495 # CONFIG_IPX is not set
4496 # CONFIG_ATALK is not set
4497 -
4498 -#
4499 -# Appletalk devices
4500 -#
4501 -# CONFIG_DEV_APPLETALK is not set
4502 # CONFIG_DECNET is not set
4503 # CONFIG_BRIDGE is not set
4504 # CONFIG_X25 is not set
4505 @@ -457,9 +449,11 @@
4506 # CONFIG_SCSI_MEGARAID is not set
4507 # CONFIG_SCSI_MEGARAID2 is not set
4508 # CONFIG_SCSI_SATA is not set
4509 +# CONFIG_SCSI_SATA_AHCI is not set
4510 # CONFIG_SCSI_SATA_SVW is not set
4511 # CONFIG_SCSI_ATA_PIIX is not set
4512 # CONFIG_SCSI_SATA_NV is not set
4513 +# CONFIG_SCSI_SATA_QSTOR is not set
4514 # CONFIG_SCSI_SATA_PROMISE is not set
4515 # CONFIG_SCSI_SATA_SX4 is not set
4516 # CONFIG_SCSI_SATA_SIL is not set
4517 @@ -681,7 +675,6 @@
4518 # CONFIG_AU1X00_USB_TTY is not set
4519 # CONFIG_AU1X00_USB_RAW is not set
4520 # CONFIG_TXX927_SERIAL is not set
4521 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4522 CONFIG_UNIX98_PTYS=y
4523 CONFIG_UNIX98_PTY_COUNT=256
4524
4525 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-capcella linux-2.4.32-rc1.mips/arch/mips/defconfig-capcella
4526 --- linux-2.4.32-rc1/arch/mips/defconfig-capcella 2005-01-19 15:09:27.000000000 +0100
4527 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-capcella 2005-03-18 13:13:21.000000000 +0100
4528 @@ -30,8 +30,8 @@
4529 # CONFIG_MIPS_PB1000 is not set
4530 # CONFIG_MIPS_PB1100 is not set
4531 # CONFIG_MIPS_PB1500 is not set
4532 -# CONFIG_MIPS_HYDROGEN3 is not set
4533 # CONFIG_MIPS_PB1550 is not set
4534 +# CONFIG_MIPS_HYDROGEN3 is not set
4535 # CONFIG_MIPS_XXS1500 is not set
4536 # CONFIG_MIPS_MTX1 is not set
4537 # CONFIG_COGENT_CSB250 is not set
4538 @@ -228,11 +228,6 @@
4539 #
4540 # CONFIG_IPX is not set
4541 # CONFIG_ATALK is not set
4542 -
4543 -#
4544 -# Appletalk devices
4545 -#
4546 -# CONFIG_DEV_APPLETALK is not set
4547 # CONFIG_DECNET is not set
4548 # CONFIG_BRIDGE is not set
4549 # CONFIG_X25 is not set
4550 @@ -472,7 +467,6 @@
4551 CONFIG_SERIAL_CONSOLE=y
4552 # CONFIG_SERIAL_EXTENDED is not set
4553 # CONFIG_SERIAL_NONSTANDARD is not set
4554 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4555 # CONFIG_VR41XX_KIU is not set
4556 CONFIG_UNIX98_PTYS=y
4557 CONFIG_UNIX98_PTY_COUNT=256
4558 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-cobalt linux-2.4.32-rc1.mips/arch/mips/defconfig-cobalt
4559 --- linux-2.4.32-rc1/arch/mips/defconfig-cobalt 2005-01-19 15:09:28.000000000 +0100
4560 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-cobalt 2005-03-18 13:13:21.000000000 +0100
4561 @@ -28,8 +28,8 @@
4562 # CONFIG_MIPS_PB1000 is not set
4563 # CONFIG_MIPS_PB1100 is not set
4564 # CONFIG_MIPS_PB1500 is not set
4565 -# CONFIG_MIPS_HYDROGEN3 is not set
4566 # CONFIG_MIPS_PB1550 is not set
4567 +# CONFIG_MIPS_HYDROGEN3 is not set
4568 # CONFIG_MIPS_XXS1500 is not set
4569 # CONFIG_MIPS_MTX1 is not set
4570 # CONFIG_COGENT_CSB250 is not set
4571 @@ -222,11 +222,6 @@
4572 #
4573 # CONFIG_IPX is not set
4574 # CONFIG_ATALK is not set
4575 -
4576 -#
4577 -# Appletalk devices
4578 -#
4579 -# CONFIG_DEV_APPLETALK is not set
4580 # CONFIG_DECNET is not set
4581 # CONFIG_BRIDGE is not set
4582 # CONFIG_X25 is not set
4583 @@ -505,7 +500,6 @@
4584 CONFIG_SERIAL_CONSOLE=y
4585 # CONFIG_SERIAL_EXTENDED is not set
4586 # CONFIG_SERIAL_NONSTANDARD is not set
4587 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4588 CONFIG_UNIX98_PTYS=y
4589 CONFIG_UNIX98_PTY_COUNT=16
4590
4591 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-csb250 linux-2.4.32-rc1.mips/arch/mips/defconfig-csb250
4592 --- linux-2.4.32-rc1/arch/mips/defconfig-csb250 2005-01-19 15:09:28.000000000 +0100
4593 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-csb250 2005-03-18 13:13:21.000000000 +0100
4594 @@ -30,8 +30,8 @@
4595 # CONFIG_MIPS_PB1000 is not set
4596 # CONFIG_MIPS_PB1100 is not set
4597 # CONFIG_MIPS_PB1500 is not set
4598 -# CONFIG_MIPS_HYDROGEN3 is not set
4599 # CONFIG_MIPS_PB1550 is not set
4600 +# CONFIG_MIPS_HYDROGEN3 is not set
4601 # CONFIG_MIPS_XXS1500 is not set
4602 # CONFIG_MIPS_MTX1 is not set
4603 CONFIG_COGENT_CSB250=y
4604 @@ -268,11 +268,6 @@
4605 #
4606 # CONFIG_IPX is not set
4607 # CONFIG_ATALK is not set
4608 -
4609 -#
4610 -# Appletalk devices
4611 -#
4612 -# CONFIG_DEV_APPLETALK is not set
4613 # CONFIG_DECNET is not set
4614 # CONFIG_BRIDGE is not set
4615 # CONFIG_X25 is not set
4616 @@ -556,7 +551,6 @@
4617 # CONFIG_AU1X00_USB_TTY is not set
4618 # CONFIG_AU1X00_USB_RAW is not set
4619 # CONFIG_TXX927_SERIAL is not set
4620 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4621 CONFIG_UNIX98_PTYS=y
4622 CONFIG_UNIX98_PTY_COUNT=256
4623
4624 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-db1000 linux-2.4.32-rc1.mips/arch/mips/defconfig-db1000
4625 --- linux-2.4.32-rc1/arch/mips/defconfig-db1000 2005-01-19 15:09:28.000000000 +0100
4626 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-db1000 2005-03-18 13:13:21.000000000 +0100
4627 @@ -30,8 +30,8 @@
4628 # CONFIG_MIPS_PB1000 is not set
4629 # CONFIG_MIPS_PB1100 is not set
4630 # CONFIG_MIPS_PB1500 is not set
4631 -# CONFIG_MIPS_HYDROGEN3 is not set
4632 # CONFIG_MIPS_PB1550 is not set
4633 +# CONFIG_MIPS_HYDROGEN3 is not set
4634 # CONFIG_MIPS_XXS1500 is not set
4635 # CONFIG_MIPS_MTX1 is not set
4636 # CONFIG_COGENT_CSB250 is not set
4637 @@ -214,11 +214,7 @@
4638 # CONFIG_MTD_BOSPORUS is not set
4639 # CONFIG_MTD_XXS1500 is not set
4640 # CONFIG_MTD_MTX1 is not set
4641 -CONFIG_MTD_DB1X00=y
4642 -CONFIG_MTD_DB1X00_BOOT=y
4643 -CONFIG_MTD_DB1X00_USER=y
4644 # CONFIG_MTD_PB1550 is not set
4645 -# CONFIG_MTD_HYDROGEN3 is not set
4646 # CONFIG_MTD_MIRAGE is not set
4647 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4648 # CONFIG_MTD_OCELOT is not set
4649 @@ -237,7 +233,6 @@
4650 #
4651 # Disk-On-Chip Device Drivers
4652 #
4653 -# CONFIG_MTD_DOC1000 is not set
4654 # CONFIG_MTD_DOC2000 is not set
4655 # CONFIG_MTD_DOC2001 is not set
4656 # CONFIG_MTD_DOCPROBE is not set
4657 @@ -342,11 +337,6 @@
4658 #
4659 # CONFIG_IPX is not set
4660 # CONFIG_ATALK is not set
4661 -
4662 -#
4663 -# Appletalk devices
4664 -#
4665 -# CONFIG_DEV_APPLETALK is not set
4666 # CONFIG_DECNET is not set
4667 # CONFIG_BRIDGE is not set
4668 # CONFIG_X25 is not set
4669 @@ -636,7 +626,6 @@
4670 # CONFIG_AU1X00_USB_TTY is not set
4671 # CONFIG_AU1X00_USB_RAW is not set
4672 # CONFIG_TXX927_SERIAL is not set
4673 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4674 CONFIG_UNIX98_PTYS=y
4675 CONFIG_UNIX98_PTY_COUNT=256
4676
4677 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-db1100 linux-2.4.32-rc1.mips/arch/mips/defconfig-db1100
4678 --- linux-2.4.32-rc1/arch/mips/defconfig-db1100 2005-01-19 15:09:28.000000000 +0100
4679 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-db1100 2005-03-18 13:13:21.000000000 +0100
4680 @@ -30,8 +30,8 @@
4681 # CONFIG_MIPS_PB1000 is not set
4682 # CONFIG_MIPS_PB1100 is not set
4683 # CONFIG_MIPS_PB1500 is not set
4684 -# CONFIG_MIPS_HYDROGEN3 is not set
4685 # CONFIG_MIPS_PB1550 is not set
4686 +# CONFIG_MIPS_HYDROGEN3 is not set
4687 # CONFIG_MIPS_XXS1500 is not set
4688 # CONFIG_MIPS_MTX1 is not set
4689 # CONFIG_COGENT_CSB250 is not set
4690 @@ -214,11 +214,7 @@
4691 # CONFIG_MTD_BOSPORUS is not set
4692 # CONFIG_MTD_XXS1500 is not set
4693 # CONFIG_MTD_MTX1 is not set
4694 -CONFIG_MTD_DB1X00=y
4695 -# CONFIG_MTD_DB1X00_BOOT is not set
4696 -CONFIG_MTD_DB1X00_USER=y
4697 # CONFIG_MTD_PB1550 is not set
4698 -# CONFIG_MTD_HYDROGEN3 is not set
4699 # CONFIG_MTD_MIRAGE is not set
4700 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4701 # CONFIG_MTD_OCELOT is not set
4702 @@ -237,7 +233,6 @@
4703 #
4704 # Disk-On-Chip Device Drivers
4705 #
4706 -# CONFIG_MTD_DOC1000 is not set
4707 # CONFIG_MTD_DOC2000 is not set
4708 # CONFIG_MTD_DOC2001 is not set
4709 # CONFIG_MTD_DOCPROBE is not set
4710 @@ -342,11 +337,6 @@
4711 #
4712 # CONFIG_IPX is not set
4713 # CONFIG_ATALK is not set
4714 -
4715 -#
4716 -# Appletalk devices
4717 -#
4718 -# CONFIG_DEV_APPLETALK is not set
4719 # CONFIG_DECNET is not set
4720 # CONFIG_BRIDGE is not set
4721 # CONFIG_X25 is not set
4722 @@ -636,7 +626,6 @@
4723 # CONFIG_AU1X00_USB_TTY is not set
4724 # CONFIG_AU1X00_USB_RAW is not set
4725 # CONFIG_TXX927_SERIAL is not set
4726 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4727 CONFIG_UNIX98_PTYS=y
4728 CONFIG_UNIX98_PTY_COUNT=256
4729
4730 @@ -884,6 +873,7 @@
4731 # CONFIG_FB_PM2 is not set
4732 # CONFIG_FB_PM3 is not set
4733 # CONFIG_FB_CYBER2000 is not set
4734 +CONFIG_FB_AU1100=y
4735 # CONFIG_FB_MATROX is not set
4736 # CONFIG_FB_ATY is not set
4737 # CONFIG_FB_RADEON is not set
4738 @@ -895,7 +885,6 @@
4739 # CONFIG_FB_VOODOO1 is not set
4740 # CONFIG_FB_TRIDENT is not set
4741 # CONFIG_FB_E1356 is not set
4742 -CONFIG_FB_AU1100=y
4743 # CONFIG_FB_IT8181 is not set
4744 # CONFIG_FB_VIRTUAL is not set
4745 CONFIG_FBCON_ADVANCED=y
4746 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-db1200 linux-2.4.32-rc1.mips/arch/mips/defconfig-db1200
4747 --- linux-2.4.32-rc1/arch/mips/defconfig-db1200 1970-01-01 01:00:00.000000000 +0100
4748 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-db1200 2005-03-18 13:13:21.000000000 +0100
4749 @@ -0,0 +1,1032 @@
4750 +#
4751 +# Automatically generated make config: don't edit
4752 +#
4753 +CONFIG_MIPS=y
4754 +CONFIG_MIPS32=y
4755 +# CONFIG_MIPS64 is not set
4756 +
4757 +#
4758 +# Code maturity level options
4759 +#
4760 +CONFIG_EXPERIMENTAL=y
4761 +
4762 +#
4763 +# Loadable module support
4764 +#
4765 +CONFIG_MODULES=y
4766 +# CONFIG_MODVERSIONS is not set
4767 +CONFIG_KMOD=y
4768 +
4769 +#
4770 +# Machine selection
4771 +#
4772 +# CONFIG_ACER_PICA_61 is not set
4773 +# CONFIG_MIPS_BOSPORUS is not set
4774 +# CONFIG_MIPS_MIRAGE is not set
4775 +# CONFIG_MIPS_DB1000 is not set
4776 +# CONFIG_MIPS_DB1100 is not set
4777 +# CONFIG_MIPS_DB1500 is not set
4778 +# CONFIG_MIPS_DB1550 is not set
4779 +# CONFIG_MIPS_PB1000 is not set
4780 +# CONFIG_MIPS_PB1100 is not set
4781 +# CONFIG_MIPS_PB1500 is not set
4782 +# CONFIG_MIPS_PB1550 is not set
4783 +# CONFIG_MIPS_HYDROGEN3 is not set
4784 +# CONFIG_MIPS_XXS1500 is not set
4785 +# CONFIG_MIPS_MTX1 is not set
4786 +# CONFIG_COGENT_CSB250 is not set
4787 +# CONFIG_BAGET_MIPS is not set
4788 +# CONFIG_CASIO_E55 is not set
4789 +# CONFIG_MIPS_COBALT is not set
4790 +# CONFIG_DECSTATION is not set
4791 +# CONFIG_MIPS_EV64120 is not set
4792 +# CONFIG_MIPS_EV96100 is not set
4793 +# CONFIG_MIPS_IVR is not set
4794 +# CONFIG_HP_LASERJET is not set
4795 +# CONFIG_IBM_WORKPAD is not set
4796 +# CONFIG_LASAT is not set
4797 +# CONFIG_MIPS_ITE8172 is not set
4798 +# CONFIG_MIPS_ATLAS is not set
4799 +# CONFIG_MIPS_MAGNUM_4000 is not set
4800 +# CONFIG_MIPS_MALTA is not set
4801 +# CONFIG_MIPS_SEAD is not set
4802 +# CONFIG_MOMENCO_OCELOT is not set
4803 +# CONFIG_MOMENCO_OCELOT_G is not set
4804 +# CONFIG_MOMENCO_OCELOT_C is not set
4805 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
4806 +# CONFIG_PMC_BIG_SUR is not set
4807 +# CONFIG_PMC_STRETCH is not set
4808 +# CONFIG_PMC_YOSEMITE is not set
4809 +# CONFIG_DDB5074 is not set
4810 +# CONFIG_DDB5476 is not set
4811 +# CONFIG_DDB5477 is not set
4812 +# CONFIG_NEC_OSPREY is not set
4813 +# CONFIG_NEC_EAGLE is not set
4814 +# CONFIG_OLIVETTI_M700 is not set
4815 +# CONFIG_NINO is not set
4816 +# CONFIG_SGI_IP22 is not set
4817 +# CONFIG_SGI_IP27 is not set
4818 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
4819 +# CONFIG_SNI_RM200_PCI is not set
4820 +# CONFIG_TANBAC_TB0226 is not set
4821 +# CONFIG_TANBAC_TB0229 is not set
4822 +# CONFIG_TOSHIBA_JMR3927 is not set
4823 +# CONFIG_TOSHIBA_RBTX4927 is not set
4824 +# CONFIG_VICTOR_MPC30X is not set
4825 +# CONFIG_ZAO_CAPCELLA is not set
4826 +# CONFIG_HIGHMEM is not set
4827 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4828 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4829 +# CONFIG_MIPS_AU1000 is not set
4830 +
4831 +#
4832 +# CPU selection
4833 +#
4834 +CONFIG_CPU_MIPS32=y
4835 +# CONFIG_CPU_MIPS64 is not set
4836 +# CONFIG_CPU_R3000 is not set
4837 +# CONFIG_CPU_TX39XX is not set
4838 +# CONFIG_CPU_VR41XX is not set
4839 +# CONFIG_CPU_R4300 is not set
4840 +# CONFIG_CPU_R4X00 is not set
4841 +# CONFIG_CPU_TX49XX is not set
4842 +# CONFIG_CPU_R5000 is not set
4843 +# CONFIG_CPU_R5432 is not set
4844 +# CONFIG_CPU_R6000 is not set
4845 +# CONFIG_CPU_NEVADA is not set
4846 +# CONFIG_CPU_R8000 is not set
4847 +# CONFIG_CPU_R10000 is not set
4848 +# CONFIG_CPU_RM7000 is not set
4849 +# CONFIG_CPU_RM9000 is not set
4850 +# CONFIG_CPU_SB1 is not set
4851 +CONFIG_PAGE_SIZE_4KB=y
4852 +# CONFIG_PAGE_SIZE_16KB is not set
4853 +# CONFIG_PAGE_SIZE_64KB is not set
4854 +CONFIG_CPU_HAS_PREFETCH=y
4855 +# CONFIG_VTAG_ICACHE is not set
4856 +CONFIG_64BIT_PHYS_ADDR=y
4857 +# CONFIG_CPU_ADVANCED is not set
4858 +CONFIG_CPU_HAS_LLSC=y
4859 +# CONFIG_CPU_HAS_LLDSCD is not set
4860 +# CONFIG_CPU_HAS_WB is not set
4861 +CONFIG_CPU_HAS_SYNC=y
4862 +
4863 +#
4864 +# General setup
4865 +#
4866 +CONFIG_CPU_LITTLE_ENDIAN=y
4867 +# CONFIG_BUILD_ELF64 is not set
4868 +CONFIG_NET=y
4869 +CONFIG_PCI=y
4870 +CONFIG_PCI_NEW=y
4871 +CONFIG_PCI_AUTO=y
4872 +# CONFIG_PCI_NAMES is not set
4873 +# CONFIG_ISA is not set
4874 +# CONFIG_TC is not set
4875 +# CONFIG_MCA is not set
4876 +# CONFIG_SBUS is not set
4877 +CONFIG_HOTPLUG=y
4878 +
4879 +#
4880 +# PCMCIA/CardBus support
4881 +#
4882 +CONFIG_PCMCIA=m
4883 +# CONFIG_CARDBUS is not set
4884 +# CONFIG_TCIC is not set
4885 +# CONFIG_I82092 is not set
4886 +# CONFIG_I82365 is not set
4887 +
4888 +#
4889 +# PCI Hotplug Support
4890 +#
4891 +# CONFIG_HOTPLUG_PCI is not set
4892 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
4893 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
4894 +# CONFIG_HOTPLUG_PCI_SHPC is not set
4895 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
4896 +# CONFIG_HOTPLUG_PCI_PCIE is not set
4897 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
4898 +CONFIG_SYSVIPC=y
4899 +# CONFIG_BSD_PROCESS_ACCT is not set
4900 +CONFIG_SYSCTL=y
4901 +CONFIG_KCORE_ELF=y
4902 +# CONFIG_KCORE_AOUT is not set
4903 +# CONFIG_BINFMT_AOUT is not set
4904 +CONFIG_BINFMT_ELF=y
4905 +# CONFIG_MIPS32_COMPAT is not set
4906 +# CONFIG_MIPS32_O32 is not set
4907 +# CONFIG_MIPS32_N32 is not set
4908 +# CONFIG_BINFMT_ELF32 is not set
4909 +# CONFIG_BINFMT_MISC is not set
4910 +# CONFIG_OOM_KILLER is not set
4911 +CONFIG_CMDLINE_BOOL=y
4912 +CONFIG_CMDLINE="mem=96M"
4913 +
4914 +#
4915 +# Memory Technology Devices (MTD)
4916 +#
4917 +# CONFIG_MTD is not set
4918 +
4919 +#
4920 +# Parallel port support
4921 +#
4922 +# CONFIG_PARPORT is not set
4923 +
4924 +#
4925 +# Plug and Play configuration
4926 +#
4927 +# CONFIG_PNP is not set
4928 +# CONFIG_ISAPNP is not set
4929 +
4930 +#
4931 +# Block devices
4932 +#
4933 +# CONFIG_BLK_DEV_FD is not set
4934 +# CONFIG_BLK_DEV_XD is not set
4935 +# CONFIG_PARIDE is not set
4936 +# CONFIG_BLK_CPQ_DA is not set
4937 +# CONFIG_BLK_CPQ_CISS_DA is not set
4938 +# CONFIG_CISS_SCSI_TAPE is not set
4939 +# CONFIG_CISS_MONITOR_THREAD is not set
4940 +# CONFIG_BLK_DEV_DAC960 is not set
4941 +# CONFIG_BLK_DEV_UMEM is not set
4942 +# CONFIG_BLK_DEV_SX8 is not set
4943 +CONFIG_BLK_DEV_LOOP=y
4944 +# CONFIG_BLK_DEV_NBD is not set
4945 +# CONFIG_BLK_DEV_RAM is not set
4946 +# CONFIG_BLK_DEV_INITRD is not set
4947 +# CONFIG_BLK_STATS is not set
4948 +
4949 +#
4950 +# Multi-device support (RAID and LVM)
4951 +#
4952 +# CONFIG_MD is not set
4953 +# CONFIG_BLK_DEV_MD is not set
4954 +# CONFIG_MD_LINEAR is not set
4955 +# CONFIG_MD_RAID0 is not set
4956 +# CONFIG_MD_RAID1 is not set
4957 +# CONFIG_MD_RAID5 is not set
4958 +# CONFIG_MD_MULTIPATH is not set
4959 +# CONFIG_BLK_DEV_LVM is not set
4960 +
4961 +#
4962 +# Networking options
4963 +#
4964 +CONFIG_PACKET=y
4965 +# CONFIG_PACKET_MMAP is not set
4966 +# CONFIG_NETLINK_DEV is not set
4967 +CONFIG_NETFILTER=y
4968 +# CONFIG_NETFILTER_DEBUG is not set
4969 +CONFIG_FILTER=y
4970 +CONFIG_UNIX=y
4971 +CONFIG_INET=y
4972 +CONFIG_IP_MULTICAST=y
4973 +# CONFIG_IP_ADVANCED_ROUTER is not set
4974 +CONFIG_IP_PNP=y
4975 +# CONFIG_IP_PNP_DHCP is not set
4976 +CONFIG_IP_PNP_BOOTP=y
4977 +# CONFIG_IP_PNP_RARP is not set
4978 +# CONFIG_NET_IPIP is not set
4979 +# CONFIG_NET_IPGRE is not set
4980 +# CONFIG_IP_MROUTE is not set
4981 +# CONFIG_ARPD is not set
4982 +# CONFIG_INET_ECN is not set
4983 +# CONFIG_SYN_COOKIES is not set
4984 +
4985 +#
4986 +# IP: Netfilter Configuration
4987 +#
4988 +# CONFIG_IP_NF_CONNTRACK is not set
4989 +# CONFIG_IP_NF_QUEUE is not set
4990 +# CONFIG_IP_NF_IPTABLES is not set
4991 +# CONFIG_IP_NF_ARPTABLES is not set
4992 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
4993 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
4994 +
4995 +#
4996 +# IP: Virtual Server Configuration
4997 +#
4998 +# CONFIG_IP_VS is not set
4999 +# CONFIG_IPV6 is not set
5000 +# CONFIG_KHTTPD is not set
5001 +
5002 +#
5003 +# SCTP Configuration (EXPERIMENTAL)
5004 +#
5005 +# CONFIG_IP_SCTP is not set
5006 +# CONFIG_ATM is not set
5007 +# CONFIG_VLAN_8021Q is not set
5008 +
5009 +#
5010 +#
5011 +#
5012 +# CONFIG_IPX is not set
5013 +# CONFIG_ATALK is not set
5014 +# CONFIG_DECNET is not set
5015 +# CONFIG_BRIDGE is not set
5016 +# CONFIG_X25 is not set
5017 +# CONFIG_LAPB is not set
5018 +# CONFIG_LLC is not set
5019 +# CONFIG_NET_DIVERT is not set
5020 +# CONFIG_ECONET is not set
5021 +# CONFIG_WAN_ROUTER is not set
5022 +# CONFIG_NET_FASTROUTE is not set
5023 +# CONFIG_NET_HW_FLOWCONTROL is not set
5024 +
5025 +#
5026 +# QoS and/or fair queueing
5027 +#
5028 +# CONFIG_NET_SCHED is not set
5029 +
5030 +#
5031 +# Network testing
5032 +#
5033 +# CONFIG_NET_PKTGEN is not set
5034 +
5035 +#
5036 +# Telephony Support
5037 +#
5038 +# CONFIG_PHONE is not set
5039 +# CONFIG_PHONE_IXJ is not set
5040 +# CONFIG_PHONE_IXJ_PCMCIA is not set
5041 +
5042 +#
5043 +# ATA/IDE/MFM/RLL support
5044 +#
5045 +CONFIG_IDE=y
5046 +
5047 +#
5048 +# IDE, ATA and ATAPI Block devices
5049 +#
5050 +CONFIG_BLK_DEV_IDE=y
5051 +
5052 +#
5053 +# Please see Documentation/ide.txt for help/info on IDE drives
5054 +#
5055 +# CONFIG_BLK_DEV_HD_IDE is not set
5056 +# CONFIG_BLK_DEV_HD is not set
5057 +# CONFIG_BLK_DEV_IDE_SATA is not set
5058 +CONFIG_BLK_DEV_IDEDISK=y
5059 +CONFIG_IDEDISK_MULTI_MODE=y
5060 +CONFIG_IDEDISK_STROKE=y
5061 +CONFIG_BLK_DEV_IDECS=m
5062 +# CONFIG_BLK_DEV_DELKIN is not set
5063 +# CONFIG_BLK_DEV_IDECD is not set
5064 +# CONFIG_BLK_DEV_IDETAPE is not set
5065 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
5066 +# CONFIG_BLK_DEV_IDESCSI is not set
5067 +# CONFIG_IDE_TASK_IOCTL is not set
5068 +
5069 +#
5070 +# IDE chipset support/bugfixes
5071 +#
5072 +# CONFIG_BLK_DEV_CMD640 is not set
5073 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
5074 +# CONFIG_BLK_DEV_ISAPNP is not set
5075 +# CONFIG_BLK_DEV_IDEPCI is not set
5076 +# CONFIG_IDE_CHIPSETS is not set
5077 +# CONFIG_IDEDMA_AUTO is not set
5078 +# CONFIG_DMA_NONPCI is not set
5079 +# CONFIG_BLK_DEV_ATARAID is not set
5080 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
5081 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
5082 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
5083 +# CONFIG_BLK_DEV_ATARAID_SII is not set
5084 +
5085 +#
5086 +# SCSI support
5087 +#
5088 +CONFIG_SCSI=y
5089 +
5090 +#
5091 +# SCSI support type (disk, tape, CD-ROM)
5092 +#
5093 +CONFIG_BLK_DEV_SD=y
5094 +CONFIG_SD_EXTRA_DEVS=40
5095 +CONFIG_CHR_DEV_ST=y
5096 +# CONFIG_CHR_DEV_OSST is not set
5097 +CONFIG_BLK_DEV_SR=y
5098 +# CONFIG_BLK_DEV_SR_VENDOR is not set
5099 +CONFIG_SR_EXTRA_DEVS=2
5100 +# CONFIG_CHR_DEV_SG is not set
5101 +
5102 +#
5103 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
5104 +#
5105 +# CONFIG_SCSI_DEBUG_QUEUES is not set
5106 +# CONFIG_SCSI_MULTI_LUN is not set
5107 +CONFIG_SCSI_CONSTANTS=y
5108 +# CONFIG_SCSI_LOGGING is not set
5109 +
5110 +#
5111 +# SCSI low-level drivers
5112 +#
5113 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
5114 +# CONFIG_SCSI_7000FASST is not set
5115 +# CONFIG_SCSI_ACARD is not set
5116 +# CONFIG_SCSI_AHA152X is not set
5117 +# CONFIG_SCSI_AHA1542 is not set
5118 +# CONFIG_SCSI_AHA1740 is not set
5119 +# CONFIG_SCSI_AACRAID is not set
5120 +# CONFIG_SCSI_AIC7XXX is not set
5121 +# CONFIG_SCSI_AIC79XX is not set
5122 +# CONFIG_SCSI_AIC7XXX_OLD is not set
5123 +# CONFIG_SCSI_DPT_I2O is not set
5124 +# CONFIG_SCSI_ADVANSYS is not set
5125 +# CONFIG_SCSI_IN2000 is not set
5126 +# CONFIG_SCSI_AM53C974 is not set
5127 +# CONFIG_SCSI_MEGARAID is not set
5128 +# CONFIG_SCSI_MEGARAID2 is not set
5129 +# CONFIG_SCSI_SATA is not set
5130 +# CONFIG_SCSI_SATA_AHCI is not set
5131 +# CONFIG_SCSI_SATA_SVW is not set
5132 +# CONFIG_SCSI_ATA_PIIX is not set
5133 +# CONFIG_SCSI_SATA_NV is not set
5134 +# CONFIG_SCSI_SATA_QSTOR is not set
5135 +# CONFIG_SCSI_SATA_PROMISE is not set
5136 +# CONFIG_SCSI_SATA_SX4 is not set
5137 +# CONFIG_SCSI_SATA_SIL is not set
5138 +# CONFIG_SCSI_SATA_SIS is not set
5139 +# CONFIG_SCSI_SATA_ULI is not set
5140 +# CONFIG_SCSI_SATA_VIA is not set
5141 +# CONFIG_SCSI_SATA_VITESSE is not set
5142 +# CONFIG_SCSI_BUSLOGIC is not set
5143 +# CONFIG_SCSI_CPQFCTS is not set
5144 +# CONFIG_SCSI_DMX3191D is not set
5145 +# CONFIG_SCSI_DTC3280 is not set
5146 +# CONFIG_SCSI_EATA is not set
5147 +# CONFIG_SCSI_EATA_DMA is not set
5148 +# CONFIG_SCSI_EATA_PIO is not set
5149 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
5150 +# CONFIG_SCSI_GDTH is not set
5151 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
5152 +# CONFIG_SCSI_INITIO is not set
5153 +# CONFIG_SCSI_INIA100 is not set
5154 +# CONFIG_SCSI_NCR53C406A is not set
5155 +# CONFIG_SCSI_NCR53C7xx is not set
5156 +# CONFIG_SCSI_SYM53C8XX_2 is not set
5157 +# CONFIG_SCSI_NCR53C8XX is not set
5158 +# CONFIG_SCSI_SYM53C8XX is not set
5159 +# CONFIG_SCSI_PAS16 is not set
5160 +# CONFIG_SCSI_PCI2000 is not set
5161 +# CONFIG_SCSI_PCI2220I is not set
5162 +# CONFIG_SCSI_PSI240I is not set
5163 +# CONFIG_SCSI_QLOGIC_FAS is not set
5164 +# CONFIG_SCSI_QLOGIC_ISP is not set
5165 +# CONFIG_SCSI_QLOGIC_FC is not set
5166 +# CONFIG_SCSI_QLOGIC_1280 is not set
5167 +# CONFIG_SCSI_SIM710 is not set
5168 +# CONFIG_SCSI_SYM53C416 is not set
5169 +# CONFIG_SCSI_DC390T is not set
5170 +# CONFIG_SCSI_T128 is not set
5171 +# CONFIG_SCSI_U14_34F is not set
5172 +# CONFIG_SCSI_NSP32 is not set
5173 +# CONFIG_SCSI_DEBUG is not set
5174 +
5175 +#
5176 +# PCMCIA SCSI adapter support
5177 +#
5178 +# CONFIG_SCSI_PCMCIA is not set
5179 +
5180 +#
5181 +# Fusion MPT device support
5182 +#
5183 +# CONFIG_FUSION is not set
5184 +# CONFIG_FUSION_BOOT is not set
5185 +# CONFIG_FUSION_ISENSE is not set
5186 +# CONFIG_FUSION_CTL is not set
5187 +# CONFIG_FUSION_LAN is not set
5188 +
5189 +#
5190 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
5191 +#
5192 +# CONFIG_IEEE1394 is not set
5193 +
5194 +#
5195 +# I2O device support
5196 +#
5197 +# CONFIG_I2O is not set
5198 +# CONFIG_I2O_PCI is not set
5199 +# CONFIG_I2O_BLOCK is not set
5200 +# CONFIG_I2O_LAN is not set
5201 +# CONFIG_I2O_SCSI is not set
5202 +# CONFIG_I2O_PROC is not set
5203 +
5204 +#
5205 +# Network device support
5206 +#
5207 +CONFIG_NETDEVICES=y
5208 +
5209 +#
5210 +# ARCnet devices
5211 +#
5212 +# CONFIG_ARCNET is not set
5213 +# CONFIG_DUMMY is not set
5214 +# CONFIG_BONDING is not set
5215 +# CONFIG_EQUALIZER is not set
5216 +# CONFIG_TUN is not set
5217 +# CONFIG_ETHERTAP is not set
5218 +
5219 +#
5220 +# Ethernet (10 or 100Mbit)
5221 +#
5222 +CONFIG_NET_ETHERNET=y
5223 +# CONFIG_SUNLANCE is not set
5224 +# CONFIG_HAPPYMEAL is not set
5225 +# CONFIG_SUNBMAC is not set
5226 +# CONFIG_SUNQE is not set
5227 +# CONFIG_SUNGEM is not set
5228 +# CONFIG_NET_VENDOR_3COM is not set
5229 +# CONFIG_LANCE is not set
5230 +# CONFIG_NET_VENDOR_SMC is not set
5231 +# CONFIG_NET_VENDOR_RACAL is not set
5232 +# CONFIG_HP100 is not set
5233 +# CONFIG_NET_ISA is not set
5234 +# CONFIG_NET_PCI is not set
5235 +# CONFIG_NET_POCKET is not set
5236 +
5237 +#
5238 +# Ethernet (1000 Mbit)
5239 +#
5240 +# CONFIG_ACENIC is not set
5241 +# CONFIG_DL2K is not set
5242 +# CONFIG_E1000 is not set
5243 +# CONFIG_MYRI_SBUS is not set
5244 +# CONFIG_NS83820 is not set
5245 +# CONFIG_HAMACHI is not set
5246 +# CONFIG_YELLOWFIN is not set
5247 +# CONFIG_R8169 is not set
5248 +# CONFIG_SK98LIN is not set
5249 +# CONFIG_TIGON3 is not set
5250 +# CONFIG_FDDI is not set
5251 +# CONFIG_HIPPI is not set
5252 +# CONFIG_PLIP is not set
5253 +# CONFIG_PPP is not set
5254 +# CONFIG_SLIP is not set
5255 +
5256 +#
5257 +# Wireless LAN (non-hamradio)
5258 +#
5259 +# CONFIG_NET_RADIO is not set
5260 +
5261 +#
5262 +# Token Ring devices
5263 +#
5264 +# CONFIG_TR is not set
5265 +# CONFIG_NET_FC is not set
5266 +# CONFIG_RCPCI is not set
5267 +# CONFIG_SHAPER is not set
5268 +
5269 +#
5270 +# Wan interfaces
5271 +#
5272 +# CONFIG_WAN is not set
5273 +
5274 +#
5275 +# PCMCIA network device support
5276 +#
5277 +# CONFIG_NET_PCMCIA is not set
5278 +
5279 +#
5280 +# Amateur Radio support
5281 +#
5282 +# CONFIG_HAMRADIO is not set
5283 +
5284 +#
5285 +# IrDA (infrared) support
5286 +#
5287 +# CONFIG_IRDA is not set
5288 +
5289 +#
5290 +# ISDN subsystem
5291 +#
5292 +# CONFIG_ISDN is not set
5293 +
5294 +#
5295 +# Input core support
5296 +#
5297 +CONFIG_INPUT=y
5298 +CONFIG_INPUT_KEYBDEV=y
5299 +CONFIG_INPUT_MOUSEDEV=y
5300 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
5301 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
5302 +# CONFIG_INPUT_JOYDEV is not set
5303 +CONFIG_INPUT_EVDEV=y
5304 +# CONFIG_INPUT_UINPUT is not set
5305 +
5306 +#
5307 +# Character devices
5308 +#
5309 +CONFIG_VT=y
5310 +# CONFIG_VT_CONSOLE is not set
5311 +# CONFIG_SERIAL is not set
5312 +# CONFIG_SERIAL_EXTENDED is not set
5313 +CONFIG_SERIAL_NONSTANDARD=y
5314 +# CONFIG_COMPUTONE is not set
5315 +# CONFIG_ROCKETPORT is not set
5316 +# CONFIG_CYCLADES is not set
5317 +# CONFIG_DIGIEPCA is not set
5318 +# CONFIG_DIGI is not set
5319 +# CONFIG_ESPSERIAL is not set
5320 +# CONFIG_MOXA_INTELLIO is not set
5321 +# CONFIG_MOXA_SMARTIO is not set
5322 +# CONFIG_ISI is not set
5323 +# CONFIG_SYNCLINK is not set
5324 +# CONFIG_SYNCLINKMP is not set
5325 +# CONFIG_N_HDLC is not set
5326 +# CONFIG_RISCOM8 is not set
5327 +# CONFIG_SPECIALIX is not set
5328 +# CONFIG_SX is not set
5329 +# CONFIG_RIO is not set
5330 +# CONFIG_STALDRV is not set
5331 +# CONFIG_SERIAL_TX3912 is not set
5332 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
5333 +# CONFIG_SERIAL_TXX9 is not set
5334 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
5335 +# CONFIG_TXX927_SERIAL is not set
5336 +CONFIG_UNIX98_PTYS=y
5337 +CONFIG_UNIX98_PTY_COUNT=256
5338 +
5339 +#
5340 +# I2C support
5341 +#
5342 +# CONFIG_I2C is not set
5343 +
5344 +#
5345 +# Mice
5346 +#
5347 +# CONFIG_BUSMOUSE is not set
5348 +# CONFIG_MOUSE is not set
5349 +
5350 +#
5351 +# Joysticks
5352 +#
5353 +# CONFIG_INPUT_GAMEPORT is not set
5354 +# CONFIG_INPUT_NS558 is not set
5355 +# CONFIG_INPUT_LIGHTNING is not set
5356 +# CONFIG_INPUT_PCIGAME is not set
5357 +# CONFIG_INPUT_CS461X is not set
5358 +# CONFIG_INPUT_EMU10K1 is not set
5359 +# CONFIG_INPUT_SERIO is not set
5360 +# CONFIG_INPUT_SERPORT is not set
5361 +
5362 +#
5363 +# Joysticks
5364 +#
5365 +# CONFIG_INPUT_ANALOG is not set
5366 +# CONFIG_INPUT_A3D is not set
5367 +# CONFIG_INPUT_ADI is not set
5368 +# CONFIG_INPUT_COBRA is not set
5369 +# CONFIG_INPUT_GF2K is not set
5370 +# CONFIG_INPUT_GRIP is not set
5371 +# CONFIG_INPUT_INTERACT is not set
5372 +# CONFIG_INPUT_TMDC is not set
5373 +# CONFIG_INPUT_SIDEWINDER is not set
5374 +# CONFIG_INPUT_IFORCE_USB is not set
5375 +# CONFIG_INPUT_IFORCE_232 is not set
5376 +# CONFIG_INPUT_WARRIOR is not set
5377 +# CONFIG_INPUT_MAGELLAN is not set
5378 +# CONFIG_INPUT_SPACEORB is not set
5379 +# CONFIG_INPUT_SPACEBALL is not set
5380 +# CONFIG_INPUT_STINGER is not set
5381 +# CONFIG_INPUT_DB9 is not set
5382 +# CONFIG_INPUT_GAMECON is not set
5383 +# CONFIG_INPUT_TURBOGRAFX is not set
5384 +# CONFIG_QIC02_TAPE is not set
5385 +# CONFIG_IPMI_HANDLER is not set
5386 +# CONFIG_IPMI_PANIC_EVENT is not set
5387 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
5388 +# CONFIG_IPMI_KCS is not set
5389 +# CONFIG_IPMI_WATCHDOG is not set
5390 +
5391 +#
5392 +# Watchdog Cards
5393 +#
5394 +# CONFIG_WATCHDOG is not set
5395 +# CONFIG_SCx200 is not set
5396 +# CONFIG_SCx200_GPIO is not set
5397 +# CONFIG_AMD_PM768 is not set
5398 +# CONFIG_NVRAM is not set
5399 +# CONFIG_RTC is not set
5400 +# CONFIG_DTLK is not set
5401 +# CONFIG_R3964 is not set
5402 +# CONFIG_APPLICOM is not set
5403 +
5404 +#
5405 +# Ftape, the floppy tape device driver
5406 +#
5407 +# CONFIG_FTAPE is not set
5408 +# CONFIG_AGP is not set
5409 +
5410 +#
5411 +# Direct Rendering Manager (XFree86 DRI support)
5412 +#
5413 +# CONFIG_DRM is not set
5414 +
5415 +#
5416 +# PCMCIA character devices
5417 +#
5418 +# CONFIG_PCMCIA_SERIAL_CS is not set
5419 +# CONFIG_SYNCLINK_CS is not set
5420 +
5421 +#
5422 +# File systems
5423 +#
5424 +# CONFIG_QUOTA is not set
5425 +# CONFIG_QFMT_V2 is not set
5426 +CONFIG_AUTOFS_FS=y
5427 +# CONFIG_AUTOFS4_FS is not set
5428 +# CONFIG_REISERFS_FS is not set
5429 +# CONFIG_REISERFS_CHECK is not set
5430 +# CONFIG_REISERFS_PROC_INFO is not set
5431 +# CONFIG_ADFS_FS is not set
5432 +# CONFIG_ADFS_FS_RW is not set
5433 +# CONFIG_AFFS_FS is not set
5434 +# CONFIG_HFS_FS is not set
5435 +# CONFIG_HFSPLUS_FS is not set
5436 +# CONFIG_BEFS_FS is not set
5437 +# CONFIG_BEFS_DEBUG is not set
5438 +# CONFIG_BFS_FS is not set
5439 +CONFIG_EXT3_FS=y
5440 +CONFIG_JBD=y
5441 +# CONFIG_JBD_DEBUG is not set
5442 +CONFIG_FAT_FS=y
5443 +CONFIG_MSDOS_FS=y
5444 +# CONFIG_UMSDOS_FS is not set
5445 +CONFIG_VFAT_FS=y
5446 +# CONFIG_EFS_FS is not set
5447 +# CONFIG_JFFS_FS is not set
5448 +# CONFIG_JFFS2_FS is not set
5449 +# CONFIG_CRAMFS is not set
5450 +CONFIG_TMPFS=y
5451 +CONFIG_RAMFS=y
5452 +# CONFIG_ISO9660_FS is not set
5453 +# CONFIG_JOLIET is not set
5454 +# CONFIG_ZISOFS is not set
5455 +# CONFIG_JFS_FS is not set
5456 +# CONFIG_JFS_DEBUG is not set
5457 +# CONFIG_JFS_STATISTICS is not set
5458 +# CONFIG_MINIX_FS is not set
5459 +# CONFIG_VXFS_FS is not set
5460 +# CONFIG_NTFS_FS is not set
5461 +# CONFIG_NTFS_RW is not set
5462 +# CONFIG_HPFS_FS is not set
5463 +CONFIG_PROC_FS=y
5464 +# CONFIG_DEVFS_FS is not set
5465 +# CONFIG_DEVFS_MOUNT is not set
5466 +# CONFIG_DEVFS_DEBUG is not set
5467 +CONFIG_DEVPTS_FS=y
5468 +# CONFIG_QNX4FS_FS is not set
5469 +# CONFIG_QNX4FS_RW is not set
5470 +# CONFIG_ROMFS_FS is not set
5471 +CONFIG_EXT2_FS=y
5472 +# CONFIG_SYSV_FS is not set
5473 +# CONFIG_UDF_FS is not set
5474 +# CONFIG_UDF_RW is not set
5475 +# CONFIG_UFS_FS is not set
5476 +# CONFIG_UFS_FS_WRITE is not set
5477 +# CONFIG_XFS_FS is not set
5478 +# CONFIG_XFS_QUOTA is not set
5479 +# CONFIG_XFS_RT is not set
5480 +# CONFIG_XFS_TRACE is not set
5481 +# CONFIG_XFS_DEBUG is not set
5482 +
5483 +#
5484 +# Network File Systems
5485 +#
5486 +# CONFIG_CODA_FS is not set
5487 +# CONFIG_INTERMEZZO_FS is not set
5488 +CONFIG_NFS_FS=y
5489 +CONFIG_NFS_V3=y
5490 +# CONFIG_NFS_DIRECTIO is not set
5491 +CONFIG_ROOT_NFS=y
5492 +# CONFIG_NFSD is not set
5493 +# CONFIG_NFSD_V3 is not set
5494 +# CONFIG_NFSD_TCP is not set
5495 +CONFIG_SUNRPC=y
5496 +CONFIG_LOCKD=y
5497 +CONFIG_LOCKD_V4=y
5498 +# CONFIG_SMB_FS is not set
5499 +# CONFIG_NCP_FS is not set
5500 +# CONFIG_NCPFS_PACKET_SIGNING is not set
5501 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
5502 +# CONFIG_NCPFS_STRONG is not set
5503 +# CONFIG_NCPFS_NFS_NS is not set
5504 +# CONFIG_NCPFS_OS2_NS is not set
5505 +# CONFIG_NCPFS_SMALLDOS is not set
5506 +# CONFIG_NCPFS_NLS is not set
5507 +# CONFIG_NCPFS_EXTRAS is not set
5508 +# CONFIG_ZISOFS_FS is not set
5509 +
5510 +#
5511 +# Partition Types
5512 +#
5513 +# CONFIG_PARTITION_ADVANCED is not set
5514 +CONFIG_MSDOS_PARTITION=y
5515 +# CONFIG_SMB_NLS is not set
5516 +CONFIG_NLS=y
5517 +
5518 +#
5519 +# Native Language Support
5520 +#
5521 +CONFIG_NLS_DEFAULT="iso8859-1"
5522 +# CONFIG_NLS_CODEPAGE_437 is not set
5523 +# CONFIG_NLS_CODEPAGE_737 is not set
5524 +# CONFIG_NLS_CODEPAGE_775 is not set
5525 +# CONFIG_NLS_CODEPAGE_850 is not set
5526 +# CONFIG_NLS_CODEPAGE_852 is not set
5527 +# CONFIG_NLS_CODEPAGE_855 is not set
5528 +# CONFIG_NLS_CODEPAGE_857 is not set
5529 +# CONFIG_NLS_CODEPAGE_860 is not set
5530 +# CONFIG_NLS_CODEPAGE_861 is not set
5531 +# CONFIG_NLS_CODEPAGE_862 is not set
5532 +# CONFIG_NLS_CODEPAGE_863 is not set
5533 +# CONFIG_NLS_CODEPAGE_864 is not set
5534 +# CONFIG_NLS_CODEPAGE_865 is not set
5535 +# CONFIG_NLS_CODEPAGE_866 is not set
5536 +# CONFIG_NLS_CODEPAGE_869 is not set
5537 +# CONFIG_NLS_CODEPAGE_936 is not set
5538 +# CONFIG_NLS_CODEPAGE_950 is not set
5539 +# CONFIG_NLS_CODEPAGE_932 is not set
5540 +# CONFIG_NLS_CODEPAGE_949 is not set
5541 +# CONFIG_NLS_CODEPAGE_874 is not set
5542 +# CONFIG_NLS_ISO8859_8 is not set
5543 +# CONFIG_NLS_CODEPAGE_1250 is not set
5544 +# CONFIG_NLS_CODEPAGE_1251 is not set
5545 +# CONFIG_NLS_ISO8859_1 is not set
5546 +# CONFIG_NLS_ISO8859_2 is not set
5547 +# CONFIG_NLS_ISO8859_3 is not set
5548 +# CONFIG_NLS_ISO8859_4 is not set
5549 +# CONFIG_NLS_ISO8859_5 is not set
5550 +# CONFIG_NLS_ISO8859_6 is not set
5551 +# CONFIG_NLS_ISO8859_7 is not set
5552 +# CONFIG_NLS_ISO8859_9 is not set
5553 +# CONFIG_NLS_ISO8859_13 is not set
5554 +# CONFIG_NLS_ISO8859_14 is not set
5555 +# CONFIG_NLS_ISO8859_15 is not set
5556 +# CONFIG_NLS_KOI8_R is not set
5557 +# CONFIG_NLS_KOI8_U is not set
5558 +# CONFIG_NLS_UTF8 is not set
5559 +
5560 +#
5561 +# Multimedia devices
5562 +#
5563 +# CONFIG_VIDEO_DEV is not set
5564 +
5565 +#
5566 +# Console drivers
5567 +#
5568 +# CONFIG_VGA_CONSOLE is not set
5569 +# CONFIG_MDA_CONSOLE is not set
5570 +
5571 +#
5572 +# Frame-buffer support
5573 +#
5574 +CONFIG_FB=y
5575 +CONFIG_DUMMY_CONSOLE=y
5576 +# CONFIG_FB_RIVA is not set
5577 +# CONFIG_FB_CLGEN is not set
5578 +# CONFIG_FB_PM2 is not set
5579 +# CONFIG_FB_PM3 is not set
5580 +# CONFIG_FB_CYBER2000 is not set
5581 +# CONFIG_FB_MATROX is not set
5582 +# CONFIG_FB_ATY is not set
5583 +# CONFIG_FB_RADEON is not set
5584 +# CONFIG_FB_ATY128 is not set
5585 +# CONFIG_FB_INTEL is not set
5586 +# CONFIG_FB_SIS is not set
5587 +# CONFIG_FB_NEOMAGIC is not set
5588 +# CONFIG_FB_3DFX is not set
5589 +# CONFIG_FB_VOODOO1 is not set
5590 +# CONFIG_FB_TRIDENT is not set
5591 +# CONFIG_FB_E1356 is not set
5592 +# CONFIG_FB_IT8181 is not set
5593 +# CONFIG_FB_VIRTUAL is not set
5594 +CONFIG_FBCON_ADVANCED=y
5595 +# CONFIG_FBCON_MFB is not set
5596 +# CONFIG_FBCON_CFB2 is not set
5597 +# CONFIG_FBCON_CFB4 is not set
5598 +# CONFIG_FBCON_CFB8 is not set
5599 +CONFIG_FBCON_CFB16=y
5600 +# CONFIG_FBCON_CFB24 is not set
5601 +CONFIG_FBCON_CFB32=y
5602 +# CONFIG_FBCON_AFB is not set
5603 +# CONFIG_FBCON_ILBM is not set
5604 +# CONFIG_FBCON_IPLAN2P2 is not set
5605 +# CONFIG_FBCON_IPLAN2P4 is not set
5606 +# CONFIG_FBCON_IPLAN2P8 is not set
5607 +# CONFIG_FBCON_MAC is not set
5608 +# CONFIG_FBCON_VGA_PLANES is not set
5609 +# CONFIG_FBCON_VGA is not set
5610 +# CONFIG_FBCON_HGA is not set
5611 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
5612 +CONFIG_FBCON_FONTS=y
5613 +CONFIG_FONT_8x8=y
5614 +CONFIG_FONT_8x16=y
5615 +# CONFIG_FONT_SUN8x16 is not set
5616 +# CONFIG_FONT_SUN12x22 is not set
5617 +# CONFIG_FONT_6x11 is not set
5618 +# CONFIG_FONT_PEARL_8x8 is not set
5619 +# CONFIG_FONT_ACORN_8x8 is not set
5620 +
5621 +#
5622 +# Sound
5623 +#
5624 +CONFIG_SOUND=y
5625 +# CONFIG_SOUND_ALI5455 is not set
5626 +# CONFIG_SOUND_BT878 is not set
5627 +# CONFIG_SOUND_CMPCI is not set
5628 +# CONFIG_SOUND_EMU10K1 is not set
5629 +# CONFIG_MIDI_EMU10K1 is not set
5630 +# CONFIG_SOUND_FUSION is not set
5631 +# CONFIG_SOUND_CS4281 is not set
5632 +# CONFIG_SOUND_ES1370 is not set
5633 +# CONFIG_SOUND_ES1371 is not set
5634 +# CONFIG_SOUND_ESSSOLO1 is not set
5635 +# CONFIG_SOUND_MAESTRO is not set
5636 +# CONFIG_SOUND_MAESTRO3 is not set
5637 +# CONFIG_SOUND_FORTE is not set
5638 +# CONFIG_SOUND_ICH is not set
5639 +# CONFIG_SOUND_RME96XX is not set
5640 +# CONFIG_SOUND_SONICVIBES is not set
5641 +# CONFIG_SOUND_TRIDENT is not set
5642 +# CONFIG_SOUND_MSNDCLAS is not set
5643 +# CONFIG_SOUND_MSNDPIN is not set
5644 +# CONFIG_SOUND_VIA82CXXX is not set
5645 +# CONFIG_MIDI_VIA82CXXX is not set
5646 +# CONFIG_SOUND_OSS is not set
5647 +# CONFIG_SOUND_TVMIXER is not set
5648 +# CONFIG_SOUND_AD1980 is not set
5649 +# CONFIG_SOUND_WM97XX is not set
5650 +
5651 +#
5652 +# USB support
5653 +#
5654 +CONFIG_USB=y
5655 +# CONFIG_USB_DEBUG is not set
5656 +
5657 +#
5658 +# Miscellaneous USB options
5659 +#
5660 +CONFIG_USB_DEVICEFS=y
5661 +# CONFIG_USB_BANDWIDTH is not set
5662 +
5663 +#
5664 +# USB Host Controller Drivers
5665 +#
5666 +# CONFIG_USB_EHCI_HCD is not set
5667 +# CONFIG_USB_UHCI is not set
5668 +# CONFIG_USB_UHCI_ALT is not set
5669 +CONFIG_USB_OHCI=y
5670 +
5671 +#
5672 +# USB Device Class drivers
5673 +#
5674 +# CONFIG_USB_AUDIO is not set
5675 +# CONFIG_USB_EMI26 is not set
5676 +# CONFIG_USB_BLUETOOTH is not set
5677 +# CONFIG_USB_MIDI is not set
5678 +CONFIG_USB_STORAGE=y
5679 +# CONFIG_USB_STORAGE_DEBUG is not set
5680 +# CONFIG_USB_STORAGE_DATAFAB is not set
5681 +# CONFIG_USB_STORAGE_FREECOM is not set
5682 +# CONFIG_USB_STORAGE_ISD200 is not set
5683 +# CONFIG_USB_STORAGE_DPCM is not set
5684 +# CONFIG_USB_STORAGE_HP8200e is not set
5685 +# CONFIG_USB_STORAGE_SDDR09 is not set
5686 +# CONFIG_USB_STORAGE_SDDR55 is not set
5687 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
5688 +# CONFIG_USB_ACM is not set
5689 +# CONFIG_USB_PRINTER is not set
5690 +
5691 +#
5692 +# USB Human Interface Devices (HID)
5693 +#
5694 +CONFIG_USB_HID=y
5695 +CONFIG_USB_HIDINPUT=y
5696 +CONFIG_USB_HIDDEV=y
5697 +# CONFIG_USB_AIPTEK is not set
5698 +# CONFIG_USB_WACOM is not set
5699 +# CONFIG_USB_KBTAB is not set
5700 +# CONFIG_USB_POWERMATE is not set
5701 +
5702 +#
5703 +# USB Imaging devices
5704 +#
5705 +# CONFIG_USB_DC2XX is not set
5706 +# CONFIG_USB_MDC800 is not set
5707 +# CONFIG_USB_SCANNER is not set
5708 +# CONFIG_USB_MICROTEK is not set
5709 +# CONFIG_USB_HPUSBSCSI is not set
5710 +
5711 +#
5712 +# USB Multimedia devices
5713 +#
5714 +
5715 +#
5716 +# Video4Linux support is needed for USB Multimedia device support
5717 +#
5718 +
5719 +#
5720 +# USB Network adaptors
5721 +#
5722 +# CONFIG_USB_PEGASUS is not set
5723 +# CONFIG_USB_RTL8150 is not set
5724 +# CONFIG_USB_KAWETH is not set
5725 +# CONFIG_USB_CATC is not set
5726 +# CONFIG_USB_CDCETHER is not set
5727 +# CONFIG_USB_USBNET is not set
5728 +
5729 +#
5730 +# USB port drivers
5731 +#
5732 +# CONFIG_USB_USS720 is not set
5733 +
5734 +#
5735 +# USB Serial Converter support
5736 +#
5737 +# CONFIG_USB_SERIAL is not set
5738 +
5739 +#
5740 +# USB Miscellaneous drivers
5741 +#
5742 +# CONFIG_USB_RIO500 is not set
5743 +# CONFIG_USB_AUERSWALD is not set
5744 +# CONFIG_USB_TIGL is not set
5745 +# CONFIG_USB_BRLVGER is not set
5746 +# CONFIG_USB_LCD is not set
5747 +
5748 +#
5749 +# Support for USB gadgets
5750 +#
5751 +# CONFIG_USB_GADGET is not set
5752 +
5753 +#
5754 +# Bluetooth support
5755 +#
5756 +# CONFIG_BLUEZ is not set
5757 +
5758 +#
5759 +# Kernel hacking
5760 +#
5761 +CONFIG_CROSSCOMPILE=y
5762 +# CONFIG_RUNTIME_DEBUG is not set
5763 +# CONFIG_KGDB is not set
5764 +# CONFIG_GDB_CONSOLE is not set
5765 +# CONFIG_DEBUG_INFO is not set
5766 +# CONFIG_MAGIC_SYSRQ is not set
5767 +# CONFIG_MIPS_UNCACHED is not set
5768 +CONFIG_LOG_BUF_SHIFT=0
5769 +
5770 +#
5771 +# Cryptographic options
5772 +#
5773 +# CONFIG_CRYPTO is not set
5774 +
5775 +#
5776 +# Library routines
5777 +#
5778 +# CONFIG_CRC32 is not set
5779 +CONFIG_ZLIB_INFLATE=m
5780 +CONFIG_ZLIB_DEFLATE=m
5781 +# CONFIG_FW_LOADER is not set
5782 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-db1500 linux-2.4.32-rc1.mips/arch/mips/defconfig-db1500
5783 --- linux-2.4.32-rc1/arch/mips/defconfig-db1500 2005-01-19 15:09:28.000000000 +0100
5784 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-db1500 2005-03-18 13:13:21.000000000 +0100
5785 @@ -30,8 +30,8 @@
5786 # CONFIG_MIPS_PB1000 is not set
5787 # CONFIG_MIPS_PB1100 is not set
5788 # CONFIG_MIPS_PB1500 is not set
5789 -# CONFIG_MIPS_HYDROGEN3 is not set
5790 # CONFIG_MIPS_PB1550 is not set
5791 +# CONFIG_MIPS_HYDROGEN3 is not set
5792 # CONFIG_MIPS_XXS1500 is not set
5793 # CONFIG_MIPS_MTX1 is not set
5794 # CONFIG_COGENT_CSB250 is not set
5795 @@ -267,11 +267,6 @@
5796 #
5797 # CONFIG_IPX is not set
5798 # CONFIG_ATALK is not set
5799 -
5800 -#
5801 -# Appletalk devices
5802 -#
5803 -# CONFIG_DEV_APPLETALK is not set
5804 # CONFIG_DECNET is not set
5805 # CONFIG_BRIDGE is not set
5806 # CONFIG_X25 is not set
5807 @@ -555,7 +550,6 @@
5808 # CONFIG_AU1X00_USB_TTY is not set
5809 # CONFIG_AU1X00_USB_RAW is not set
5810 # CONFIG_TXX927_SERIAL is not set
5811 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5812 CONFIG_UNIX98_PTYS=y
5813 CONFIG_UNIX98_PTY_COUNT=256
5814
5815 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-db1550 linux-2.4.32-rc1.mips/arch/mips/defconfig-db1550
5816 --- linux-2.4.32-rc1/arch/mips/defconfig-db1550 2005-01-19 15:09:28.000000000 +0100
5817 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-db1550 2005-03-18 13:13:21.000000000 +0100
5818 @@ -30,8 +30,8 @@
5819 # CONFIG_MIPS_PB1000 is not set
5820 # CONFIG_MIPS_PB1100 is not set
5821 # CONFIG_MIPS_PB1500 is not set
5822 -# CONFIG_MIPS_HYDROGEN3 is not set
5823 # CONFIG_MIPS_PB1550 is not set
5824 +# CONFIG_MIPS_HYDROGEN3 is not set
5825 # CONFIG_MIPS_XXS1500 is not set
5826 # CONFIG_MIPS_MTX1 is not set
5827 # CONFIG_COGENT_CSB250 is not set
5828 @@ -213,11 +213,9 @@
5829 # CONFIG_MTD_BOSPORUS is not set
5830 # CONFIG_MTD_XXS1500 is not set
5831 # CONFIG_MTD_MTX1 is not set
5832 -# CONFIG_MTD_DB1X00 is not set
5833 CONFIG_MTD_PB1550=y
5834 CONFIG_MTD_PB1550_BOOT=y
5835 CONFIG_MTD_PB1550_USER=y
5836 -# CONFIG_MTD_HYDROGEN3 is not set
5837 # CONFIG_MTD_MIRAGE is not set
5838 # CONFIG_MTD_CSTM_MIPS_IXX is not set
5839 # CONFIG_MTD_OCELOT is not set
5840 @@ -236,7 +234,6 @@
5841 #
5842 # Disk-On-Chip Device Drivers
5843 #
5844 -# CONFIG_MTD_DOC1000 is not set
5845 # CONFIG_MTD_DOC2000 is not set
5846 # CONFIG_MTD_DOC2001 is not set
5847 # CONFIG_MTD_DOCPROBE is not set
5848 @@ -343,11 +340,6 @@
5849 #
5850 # CONFIG_IPX is not set
5851 # CONFIG_ATALK is not set
5852 -
5853 -#
5854 -# Appletalk devices
5855 -#
5856 -# CONFIG_DEV_APPLETALK is not set
5857 # CONFIG_DECNET is not set
5858 # CONFIG_BRIDGE is not set
5859 # CONFIG_X25 is not set
5860 @@ -633,7 +625,6 @@
5861 # CONFIG_AU1X00_USB_TTY is not set
5862 # CONFIG_AU1X00_USB_RAW is not set
5863 # CONFIG_TXX927_SERIAL is not set
5864 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5865 CONFIG_UNIX98_PTYS=y
5866 CONFIG_UNIX98_PTY_COUNT=256
5867
5868 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ddb5476 linux-2.4.32-rc1.mips/arch/mips/defconfig-ddb5476
5869 --- linux-2.4.32-rc1/arch/mips/defconfig-ddb5476 2005-01-19 15:09:28.000000000 +0100
5870 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ddb5476 2005-03-18 13:13:21.000000000 +0100
5871 @@ -28,8 +28,8 @@
5872 # CONFIG_MIPS_PB1000 is not set
5873 # CONFIG_MIPS_PB1100 is not set
5874 # CONFIG_MIPS_PB1500 is not set
5875 -# CONFIG_MIPS_HYDROGEN3 is not set
5876 # CONFIG_MIPS_PB1550 is not set
5877 +# CONFIG_MIPS_HYDROGEN3 is not set
5878 # CONFIG_MIPS_XXS1500 is not set
5879 # CONFIG_MIPS_MTX1 is not set
5880 # CONFIG_COGENT_CSB250 is not set
5881 @@ -226,11 +226,6 @@
5882 #
5883 # CONFIG_IPX is not set
5884 # CONFIG_ATALK is not set
5885 -
5886 -#
5887 -# Appletalk devices
5888 -#
5889 -# CONFIG_DEV_APPLETALK is not set
5890 # CONFIG_DECNET is not set
5891 # CONFIG_BRIDGE is not set
5892 # CONFIG_X25 is not set
5893 @@ -517,7 +512,6 @@
5894 CONFIG_SERIAL_CONSOLE=y
5895 # CONFIG_SERIAL_EXTENDED is not set
5896 # CONFIG_SERIAL_NONSTANDARD is not set
5897 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5898 CONFIG_UNIX98_PTYS=y
5899 CONFIG_UNIX98_PTY_COUNT=256
5900
5901 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ddb5477 linux-2.4.32-rc1.mips/arch/mips/defconfig-ddb5477
5902 --- linux-2.4.32-rc1/arch/mips/defconfig-ddb5477 2005-01-19 15:09:28.000000000 +0100
5903 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ddb5477 2005-03-18 13:13:21.000000000 +0100
5904 @@ -28,8 +28,8 @@
5905 # CONFIG_MIPS_PB1000 is not set
5906 # CONFIG_MIPS_PB1100 is not set
5907 # CONFIG_MIPS_PB1500 is not set
5908 -# CONFIG_MIPS_HYDROGEN3 is not set
5909 # CONFIG_MIPS_PB1550 is not set
5910 +# CONFIG_MIPS_HYDROGEN3 is not set
5911 # CONFIG_MIPS_XXS1500 is not set
5912 # CONFIG_MIPS_MTX1 is not set
5913 # CONFIG_COGENT_CSB250 is not set
5914 @@ -226,11 +226,6 @@
5915 #
5916 # CONFIG_IPX is not set
5917 # CONFIG_ATALK is not set
5918 -
5919 -#
5920 -# Appletalk devices
5921 -#
5922 -# CONFIG_DEV_APPLETALK is not set
5923 # CONFIG_DECNET is not set
5924 # CONFIG_BRIDGE is not set
5925 # CONFIG_X25 is not set
5926 @@ -434,7 +429,6 @@
5927 CONFIG_SERIAL_CONSOLE=y
5928 # CONFIG_SERIAL_EXTENDED is not set
5929 # CONFIG_SERIAL_NONSTANDARD is not set
5930 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5931 CONFIG_UNIX98_PTYS=y
5932 CONFIG_UNIX98_PTY_COUNT=256
5933
5934 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-decstation linux-2.4.32-rc1.mips/arch/mips/defconfig-decstation
5935 --- linux-2.4.32-rc1/arch/mips/defconfig-decstation 2005-01-19 15:09:28.000000000 +0100
5936 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-decstation 2005-03-18 13:13:21.000000000 +0100
5937 @@ -30,8 +30,8 @@
5938 # CONFIG_MIPS_PB1000 is not set
5939 # CONFIG_MIPS_PB1100 is not set
5940 # CONFIG_MIPS_PB1500 is not set
5941 -# CONFIG_MIPS_HYDROGEN3 is not set
5942 # CONFIG_MIPS_PB1550 is not set
5943 +# CONFIG_MIPS_HYDROGEN3 is not set
5944 # CONFIG_MIPS_XXS1500 is not set
5945 # CONFIG_MIPS_MTX1 is not set
5946 # CONFIG_COGENT_CSB250 is not set
5947 @@ -223,11 +223,6 @@
5948 #
5949 # CONFIG_IPX is not set
5950 # CONFIG_ATALK is not set
5951 -
5952 -#
5953 -# Appletalk devices
5954 -#
5955 -# CONFIG_DEV_APPLETALK is not set
5956 # CONFIG_DECNET is not set
5957 # CONFIG_BRIDGE is not set
5958 # CONFIG_X25 is not set
5959 @@ -306,9 +301,11 @@
5960 # CONFIG_SCSI_MEGARAID is not set
5961 # CONFIG_SCSI_MEGARAID2 is not set
5962 # CONFIG_SCSI_SATA is not set
5963 +# CONFIG_SCSI_SATA_AHCI is not set
5964 # CONFIG_SCSI_SATA_SVW is not set
5965 # CONFIG_SCSI_ATA_PIIX is not set
5966 # CONFIG_SCSI_SATA_NV is not set
5967 +# CONFIG_SCSI_SATA_QSTOR is not set
5968 # CONFIG_SCSI_SATA_PROMISE is not set
5969 # CONFIG_SCSI_SATA_SX4 is not set
5970 # CONFIG_SCSI_SATA_SIL is not set
5971 @@ -477,7 +474,6 @@
5972 CONFIG_SERIAL_DEC_CONSOLE=y
5973 CONFIG_DZ=y
5974 CONFIG_ZS=y
5975 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5976 CONFIG_UNIX98_PTYS=y
5977 CONFIG_UNIX98_PTY_COUNT=256
5978
5979 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-e55 linux-2.4.32-rc1.mips/arch/mips/defconfig-e55
5980 --- linux-2.4.32-rc1/arch/mips/defconfig-e55 2005-01-19 15:09:28.000000000 +0100
5981 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-e55 2005-03-18 13:13:21.000000000 +0100
5982 @@ -30,8 +30,8 @@
5983 # CONFIG_MIPS_PB1000 is not set
5984 # CONFIG_MIPS_PB1100 is not set
5985 # CONFIG_MIPS_PB1500 is not set
5986 -# CONFIG_MIPS_HYDROGEN3 is not set
5987 # CONFIG_MIPS_PB1550 is not set
5988 +# CONFIG_MIPS_HYDROGEN3 is not set
5989 # CONFIG_MIPS_XXS1500 is not set
5990 # CONFIG_MIPS_MTX1 is not set
5991 # CONFIG_COGENT_CSB250 is not set
5992 @@ -222,11 +222,6 @@
5993 #
5994 # CONFIG_IPX is not set
5995 # CONFIG_ATALK is not set
5996 -
5997 -#
5998 -# Appletalk devices
5999 -#
6000 -# CONFIG_DEV_APPLETALK is not set
6001 # CONFIG_DECNET is not set
6002 # CONFIG_BRIDGE is not set
6003 # CONFIG_X25 is not set
6004 @@ -426,7 +421,6 @@
6005 # CONFIG_SERIAL_MULTIPORT is not set
6006 # CONFIG_HUB6 is not set
6007 # CONFIG_SERIAL_NONSTANDARD is not set
6008 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6009 # CONFIG_VR41XX_KIU is not set
6010 CONFIG_UNIX98_PTYS=y
6011 CONFIG_UNIX98_PTY_COUNT=256
6012 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-eagle linux-2.4.32-rc1.mips/arch/mips/defconfig-eagle
6013 --- linux-2.4.32-rc1/arch/mips/defconfig-eagle 2005-01-19 15:09:28.000000000 +0100
6014 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-eagle 2005-03-18 13:13:21.000000000 +0100
6015 @@ -30,8 +30,8 @@
6016 # CONFIG_MIPS_PB1000 is not set
6017 # CONFIG_MIPS_PB1100 is not set
6018 # CONFIG_MIPS_PB1500 is not set
6019 -# CONFIG_MIPS_HYDROGEN3 is not set
6020 # CONFIG_MIPS_PB1550 is not set
6021 +# CONFIG_MIPS_HYDROGEN3 is not set
6022 # CONFIG_MIPS_XXS1500 is not set
6023 # CONFIG_MIPS_MTX1 is not set
6024 # CONFIG_COGENT_CSB250 is not set
6025 @@ -208,8 +208,8 @@
6026 # Mapping drivers for chip access
6027 #
6028 CONFIG_MTD_PHYSMAP=y
6029 -CONFIG_MTD_PHYSMAP_START=1c000000
6030 -CONFIG_MTD_PHYSMAP_LEN=2000000
6031 +CONFIG_MTD_PHYSMAP_START=0x1c000000
6032 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
6033 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
6034 # CONFIG_MTD_PB1000 is not set
6035 # CONFIG_MTD_PB1500 is not set
6036 @@ -217,9 +217,7 @@
6037 # CONFIG_MTD_BOSPORUS is not set
6038 # CONFIG_MTD_XXS1500 is not set
6039 # CONFIG_MTD_MTX1 is not set
6040 -# CONFIG_MTD_DB1X00 is not set
6041 # CONFIG_MTD_PB1550 is not set
6042 -# CONFIG_MTD_HYDROGEN3 is not set
6043 # CONFIG_MTD_MIRAGE is not set
6044 # CONFIG_MTD_CSTM_MIPS_IXX is not set
6045 # CONFIG_MTD_OCELOT is not set
6046 @@ -238,7 +236,6 @@
6047 #
6048 # Disk-On-Chip Device Drivers
6049 #
6050 -# CONFIG_MTD_DOC1000 is not set
6051 # CONFIG_MTD_DOC2000 is not set
6052 # CONFIG_MTD_DOC2001 is not set
6053 # CONFIG_MTD_DOCPROBE is not set
6054 @@ -327,11 +324,6 @@
6055 #
6056 # CONFIG_IPX is not set
6057 # CONFIG_ATALK is not set
6058 -
6059 -#
6060 -# Appletalk devices
6061 -#
6062 -# CONFIG_DEV_APPLETALK is not set
6063 # CONFIG_DECNET is not set
6064 # CONFIG_BRIDGE is not set
6065 # CONFIG_X25 is not set
6066 @@ -587,7 +579,6 @@
6067 CONFIG_SERIAL_CONSOLE=y
6068 # CONFIG_SERIAL_EXTENDED is not set
6069 # CONFIG_SERIAL_NONSTANDARD is not set
6070 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6071 # CONFIG_VR41XX_KIU is not set
6072 CONFIG_UNIX98_PTYS=y
6073 CONFIG_UNIX98_PTY_COUNT=256
6074 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ev64120 linux-2.4.32-rc1.mips/arch/mips/defconfig-ev64120
6075 --- linux-2.4.32-rc1/arch/mips/defconfig-ev64120 2005-01-19 15:09:28.000000000 +0100
6076 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ev64120 2005-03-18 13:13:21.000000000 +0100
6077 @@ -30,8 +30,8 @@
6078 # CONFIG_MIPS_PB1000 is not set
6079 # CONFIG_MIPS_PB1100 is not set
6080 # CONFIG_MIPS_PB1500 is not set
6081 -# CONFIG_MIPS_HYDROGEN3 is not set
6082 # CONFIG_MIPS_PB1550 is not set
6083 +# CONFIG_MIPS_HYDROGEN3 is not set
6084 # CONFIG_MIPS_XXS1500 is not set
6085 # CONFIG_MIPS_MTX1 is not set
6086 # CONFIG_COGENT_CSB250 is not set
6087 @@ -230,11 +230,6 @@
6088 #
6089 # CONFIG_IPX is not set
6090 # CONFIG_ATALK is not set
6091 -
6092 -#
6093 -# Appletalk devices
6094 -#
6095 -# CONFIG_DEV_APPLETALK is not set
6096 # CONFIG_DECNET is not set
6097 # CONFIG_BRIDGE is not set
6098 # CONFIG_X25 is not set
6099 @@ -443,7 +438,6 @@
6100 # CONFIG_SERIAL_CONSOLE is not set
6101 # CONFIG_SERIAL_EXTENDED is not set
6102 # CONFIG_SERIAL_NONSTANDARD is not set
6103 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6104 CONFIG_UNIX98_PTYS=y
6105 CONFIG_UNIX98_PTY_COUNT=256
6106
6107 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ev96100 linux-2.4.32-rc1.mips/arch/mips/defconfig-ev96100
6108 --- linux-2.4.32-rc1/arch/mips/defconfig-ev96100 2005-01-19 15:09:28.000000000 +0100
6109 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ev96100 2005-03-18 13:13:21.000000000 +0100
6110 @@ -30,8 +30,8 @@
6111 # CONFIG_MIPS_PB1000 is not set
6112 # CONFIG_MIPS_PB1100 is not set
6113 # CONFIG_MIPS_PB1500 is not set
6114 -# CONFIG_MIPS_HYDROGEN3 is not set
6115 # CONFIG_MIPS_PB1550 is not set
6116 +# CONFIG_MIPS_HYDROGEN3 is not set
6117 # CONFIG_MIPS_XXS1500 is not set
6118 # CONFIG_MIPS_MTX1 is not set
6119 # CONFIG_COGENT_CSB250 is not set
6120 @@ -232,11 +232,6 @@
6121 #
6122 # CONFIG_IPX is not set
6123 # CONFIG_ATALK is not set
6124 -
6125 -#
6126 -# Appletalk devices
6127 -#
6128 -# CONFIG_DEV_APPLETALK is not set
6129 # CONFIG_DECNET is not set
6130 # CONFIG_BRIDGE is not set
6131 # CONFIG_X25 is not set
6132 @@ -441,7 +436,6 @@
6133 CONFIG_SERIAL_CONSOLE=y
6134 # CONFIG_SERIAL_EXTENDED is not set
6135 # CONFIG_SERIAL_NONSTANDARD is not set
6136 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6137 CONFIG_UNIX98_PTYS=y
6138 CONFIG_UNIX98_PTY_COUNT=256
6139
6140 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ficmmp linux-2.4.32-rc1.mips/arch/mips/defconfig-ficmmp
6141 --- linux-2.4.32-rc1/arch/mips/defconfig-ficmmp 1970-01-01 01:00:00.000000000 +0100
6142 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ficmmp 2005-03-18 13:13:21.000000000 +0100
6143 @@ -0,0 +1,862 @@
6144 +#
6145 +# Automatically generated make config: don't edit
6146 +#
6147 +CONFIG_MIPS=y
6148 +CONFIG_MIPS32=y
6149 +# CONFIG_MIPS64 is not set
6150 +
6151 +#
6152 +# Code maturity level options
6153 +#
6154 +CONFIG_EXPERIMENTAL=y
6155 +
6156 +#
6157 +# Loadable module support
6158 +#
6159 +CONFIG_MODULES=y
6160 +# CONFIG_MODVERSIONS is not set
6161 +CONFIG_KMOD=y
6162 +
6163 +#
6164 +# Machine selection
6165 +#
6166 +# CONFIG_ACER_PICA_61 is not set
6167 +# CONFIG_MIPS_BOSPORUS is not set
6168 +# CONFIG_MIPS_MIRAGE is not set
6169 +# CONFIG_MIPS_DB1000 is not set
6170 +# CONFIG_MIPS_DB1100 is not set
6171 +# CONFIG_MIPS_DB1500 is not set
6172 +# CONFIG_MIPS_DB1550 is not set
6173 +# CONFIG_MIPS_PB1000 is not set
6174 +# CONFIG_MIPS_PB1100 is not set
6175 +# CONFIG_MIPS_PB1500 is not set
6176 +# CONFIG_MIPS_PB1550 is not set
6177 +# CONFIG_MIPS_HYDROGEN3 is not set
6178 +# CONFIG_MIPS_XXS1500 is not set
6179 +# CONFIG_MIPS_MTX1 is not set
6180 +# CONFIG_COGENT_CSB250 is not set
6181 +# CONFIG_BAGET_MIPS is not set
6182 +# CONFIG_CASIO_E55 is not set
6183 +# CONFIG_MIPS_COBALT is not set
6184 +# CONFIG_DECSTATION is not set
6185 +# CONFIG_MIPS_EV64120 is not set
6186 +# CONFIG_MIPS_EV96100 is not set
6187 +# CONFIG_MIPS_IVR is not set
6188 +# CONFIG_HP_LASERJET is not set
6189 +# CONFIG_IBM_WORKPAD is not set
6190 +# CONFIG_LASAT is not set
6191 +# CONFIG_MIPS_ITE8172 is not set
6192 +# CONFIG_MIPS_ATLAS is not set
6193 +# CONFIG_MIPS_MAGNUM_4000 is not set
6194 +# CONFIG_MIPS_MALTA is not set
6195 +# CONFIG_MIPS_SEAD is not set
6196 +# CONFIG_MOMENCO_OCELOT is not set
6197 +# CONFIG_MOMENCO_OCELOT_G is not set
6198 +# CONFIG_MOMENCO_OCELOT_C is not set
6199 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
6200 +# CONFIG_PMC_BIG_SUR is not set
6201 +# CONFIG_PMC_STRETCH is not set
6202 +# CONFIG_PMC_YOSEMITE is not set
6203 +# CONFIG_DDB5074 is not set
6204 +# CONFIG_DDB5476 is not set
6205 +# CONFIG_DDB5477 is not set
6206 +# CONFIG_NEC_OSPREY is not set
6207 +# CONFIG_NEC_EAGLE is not set
6208 +# CONFIG_OLIVETTI_M700 is not set
6209 +# CONFIG_NINO is not set
6210 +# CONFIG_SGI_IP22 is not set
6211 +# CONFIG_SGI_IP27 is not set
6212 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
6213 +# CONFIG_SNI_RM200_PCI is not set
6214 +# CONFIG_TANBAC_TB0226 is not set
6215 +# CONFIG_TANBAC_TB0229 is not set
6216 +# CONFIG_TOSHIBA_JMR3927 is not set
6217 +# CONFIG_TOSHIBA_RBTX4927 is not set
6218 +# CONFIG_VICTOR_MPC30X is not set
6219 +# CONFIG_ZAO_CAPCELLA is not set
6220 +# CONFIG_HIGHMEM is not set
6221 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
6222 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
6223 +# CONFIG_MIPS_AU1000 is not set
6224 +
6225 +#
6226 +# CPU selection
6227 +#
6228 +CONFIG_CPU_MIPS32=y
6229 +# CONFIG_CPU_MIPS64 is not set
6230 +# CONFIG_CPU_R3000 is not set
6231 +# CONFIG_CPU_TX39XX is not set
6232 +# CONFIG_CPU_VR41XX is not set
6233 +# CONFIG_CPU_R4300 is not set
6234 +# CONFIG_CPU_R4X00 is not set
6235 +# CONFIG_CPU_TX49XX is not set
6236 +# CONFIG_CPU_R5000 is not set
6237 +# CONFIG_CPU_R5432 is not set
6238 +# CONFIG_CPU_R6000 is not set
6239 +# CONFIG_CPU_NEVADA is not set
6240 +# CONFIG_CPU_R8000 is not set
6241 +# CONFIG_CPU_R10000 is not set
6242 +# CONFIG_CPU_RM7000 is not set
6243 +# CONFIG_CPU_RM9000 is not set
6244 +# CONFIG_CPU_SB1 is not set
6245 +CONFIG_PAGE_SIZE_4KB=y
6246 +# CONFIG_PAGE_SIZE_16KB is not set
6247 +# CONFIG_PAGE_SIZE_64KB is not set
6248 +CONFIG_CPU_HAS_PREFETCH=y
6249 +# CONFIG_VTAG_ICACHE is not set
6250 +CONFIG_64BIT_PHYS_ADDR=y
6251 +# CONFIG_CPU_ADVANCED is not set
6252 +CONFIG_CPU_HAS_LLSC=y
6253 +# CONFIG_CPU_HAS_LLDSCD is not set
6254 +# CONFIG_CPU_HAS_WB is not set
6255 +CONFIG_CPU_HAS_SYNC=y
6256 +
6257 +#
6258 +# General setup
6259 +#
6260 +CONFIG_CPU_LITTLE_ENDIAN=y
6261 +# CONFIG_BUILD_ELF64 is not set
6262 +CONFIG_NET=y
6263 +# CONFIG_PCI is not set
6264 +# CONFIG_PCI_NEW is not set
6265 +CONFIG_PCI_AUTO=y
6266 +# CONFIG_ISA is not set
6267 +# CONFIG_TC is not set
6268 +# CONFIG_MCA is not set
6269 +# CONFIG_SBUS is not set
6270 +# CONFIG_HOTPLUG is not set
6271 +# CONFIG_PCMCIA is not set
6272 +# CONFIG_HOTPLUG_PCI is not set
6273 +CONFIG_SYSVIPC=y
6274 +# CONFIG_BSD_PROCESS_ACCT is not set
6275 +CONFIG_SYSCTL=y
6276 +CONFIG_KCORE_ELF=y
6277 +# CONFIG_KCORE_AOUT is not set
6278 +# CONFIG_BINFMT_AOUT is not set
6279 +CONFIG_BINFMT_ELF=y
6280 +# CONFIG_MIPS32_COMPAT is not set
6281 +# CONFIG_MIPS32_O32 is not set
6282 +# CONFIG_MIPS32_N32 is not set
6283 +# CONFIG_BINFMT_ELF32 is not set
6284 +# CONFIG_BINFMT_MISC is not set
6285 +# CONFIG_OOM_KILLER is not set
6286 +CONFIG_CMDLINE_BOOL=y
6287 +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
6288 +
6289 +#
6290 +# Memory Technology Devices (MTD)
6291 +#
6292 +# CONFIG_MTD is not set
6293 +
6294 +#
6295 +# Parallel port support
6296 +#
6297 +# CONFIG_PARPORT is not set
6298 +
6299 +#
6300 +# Plug and Play configuration
6301 +#
6302 +# CONFIG_PNP is not set
6303 +# CONFIG_ISAPNP is not set
6304 +
6305 +#
6306 +# Block devices
6307 +#
6308 +# CONFIG_BLK_DEV_FD is not set
6309 +# CONFIG_BLK_DEV_XD is not set
6310 +# CONFIG_PARIDE is not set
6311 +# CONFIG_BLK_CPQ_DA is not set
6312 +# CONFIG_BLK_CPQ_CISS_DA is not set
6313 +# CONFIG_CISS_SCSI_TAPE is not set
6314 +# CONFIG_CISS_MONITOR_THREAD is not set
6315 +# CONFIG_BLK_DEV_DAC960 is not set
6316 +# CONFIG_BLK_DEV_UMEM is not set
6317 +# CONFIG_BLK_DEV_SX8 is not set
6318 +CONFIG_BLK_DEV_LOOP=y
6319 +# CONFIG_BLK_DEV_NBD is not set
6320 +# CONFIG_BLK_DEV_RAM is not set
6321 +# CONFIG_BLK_DEV_INITRD is not set
6322 +# CONFIG_BLK_STATS is not set
6323 +
6324 +#
6325 +# Multi-device support (RAID and LVM)
6326 +#
6327 +# CONFIG_MD is not set
6328 +# CONFIG_BLK_DEV_MD is not set
6329 +# CONFIG_MD_LINEAR is not set
6330 +# CONFIG_MD_RAID0 is not set
6331 +# CONFIG_MD_RAID1 is not set
6332 +# CONFIG_MD_RAID5 is not set
6333 +# CONFIG_MD_MULTIPATH is not set
6334 +# CONFIG_BLK_DEV_LVM is not set
6335 +
6336 +#
6337 +# Networking options
6338 +#
6339 +CONFIG_PACKET=y
6340 +# CONFIG_PACKET_MMAP is not set
6341 +# CONFIG_NETLINK_DEV is not set
6342 +CONFIG_NETFILTER=y
6343 +# CONFIG_NETFILTER_DEBUG is not set
6344 +CONFIG_FILTER=y
6345 +CONFIG_UNIX=y
6346 +CONFIG_INET=y
6347 +CONFIG_IP_MULTICAST=y
6348 +# CONFIG_IP_ADVANCED_ROUTER is not set
6349 +# CONFIG_IP_PNP is not set
6350 +# CONFIG_NET_IPIP is not set
6351 +# CONFIG_NET_IPGRE is not set
6352 +# CONFIG_IP_MROUTE is not set
6353 +# CONFIG_ARPD is not set
6354 +# CONFIG_INET_ECN is not set
6355 +# CONFIG_SYN_COOKIES is not set
6356 +
6357 +#
6358 +# IP: Netfilter Configuration
6359 +#
6360 +# CONFIG_IP_NF_CONNTRACK is not set
6361 +# CONFIG_IP_NF_QUEUE is not set
6362 +# CONFIG_IP_NF_IPTABLES is not set
6363 +# CONFIG_IP_NF_ARPTABLES is not set
6364 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
6365 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
6366 +
6367 +#
6368 +# IP: Virtual Server Configuration
6369 +#
6370 +# CONFIG_IP_VS is not set
6371 +# CONFIG_IPV6 is not set
6372 +# CONFIG_KHTTPD is not set
6373 +
6374 +#
6375 +# SCTP Configuration (EXPERIMENTAL)
6376 +#
6377 +# CONFIG_IP_SCTP is not set
6378 +# CONFIG_ATM is not set
6379 +# CONFIG_VLAN_8021Q is not set
6380 +
6381 +#
6382 +#
6383 +#
6384 +# CONFIG_IPX is not set
6385 +# CONFIG_ATALK is not set
6386 +# CONFIG_DECNET is not set
6387 +# CONFIG_BRIDGE is not set
6388 +# CONFIG_X25 is not set
6389 +# CONFIG_LAPB is not set
6390 +# CONFIG_LLC is not set
6391 +# CONFIG_NET_DIVERT is not set
6392 +# CONFIG_ECONET is not set
6393 +# CONFIG_WAN_ROUTER is not set
6394 +# CONFIG_NET_FASTROUTE is not set
6395 +# CONFIG_NET_HW_FLOWCONTROL is not set
6396 +
6397 +#
6398 +# QoS and/or fair queueing
6399 +#
6400 +# CONFIG_NET_SCHED is not set
6401 +
6402 +#
6403 +# Network testing
6404 +#
6405 +# CONFIG_NET_PKTGEN is not set
6406 +
6407 +#
6408 +# Telephony Support
6409 +#
6410 +# CONFIG_PHONE is not set
6411 +# CONFIG_PHONE_IXJ is not set
6412 +# CONFIG_PHONE_IXJ_PCMCIA is not set
6413 +
6414 +#
6415 +# ATA/IDE/MFM/RLL support
6416 +#
6417 +CONFIG_IDE=y
6418 +
6419 +#
6420 +# IDE, ATA and ATAPI Block devices
6421 +#
6422 +CONFIG_BLK_DEV_IDE=y
6423 +
6424 +#
6425 +# Please see Documentation/ide.txt for help/info on IDE drives
6426 +#
6427 +CONFIG_BLK_DEV_HD_IDE=y
6428 +CONFIG_BLK_DEV_HD=y
6429 +# CONFIG_BLK_DEV_IDE_SATA is not set
6430 +CONFIG_BLK_DEV_IDEDISK=y
6431 +CONFIG_IDEDISK_MULTI_MODE=y
6432 +CONFIG_IDEDISK_STROKE=y
6433 +# CONFIG_BLK_DEV_IDECS is not set
6434 +# CONFIG_BLK_DEV_DELKIN is not set
6435 +# CONFIG_BLK_DEV_IDECD is not set
6436 +# CONFIG_BLK_DEV_IDETAPE is not set
6437 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
6438 +# CONFIG_BLK_DEV_IDESCSI is not set
6439 +# CONFIG_IDE_TASK_IOCTL is not set
6440 +
6441 +#
6442 +# IDE chipset support/bugfixes
6443 +#
6444 +# CONFIG_BLK_DEV_CMD640 is not set
6445 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
6446 +# CONFIG_BLK_DEV_ISAPNP is not set
6447 +# CONFIG_IDE_CHIPSETS is not set
6448 +# CONFIG_IDEDMA_AUTO is not set
6449 +# CONFIG_DMA_NONPCI is not set
6450 +# CONFIG_BLK_DEV_ATARAID is not set
6451 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
6452 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
6453 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
6454 +# CONFIG_BLK_DEV_ATARAID_SII is not set
6455 +
6456 +#
6457 +# SCSI support
6458 +#
6459 +CONFIG_SCSI=y
6460 +
6461 +#
6462 +# SCSI support type (disk, tape, CD-ROM)
6463 +#
6464 +CONFIG_BLK_DEV_SD=y
6465 +CONFIG_SD_EXTRA_DEVS=40
6466 +CONFIG_CHR_DEV_ST=y
6467 +# CONFIG_CHR_DEV_OSST is not set
6468 +CONFIG_BLK_DEV_SR=y
6469 +# CONFIG_BLK_DEV_SR_VENDOR is not set
6470 +CONFIG_SR_EXTRA_DEVS=2
6471 +# CONFIG_CHR_DEV_SG is not set
6472 +
6473 +#
6474 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
6475 +#
6476 +# CONFIG_SCSI_DEBUG_QUEUES is not set
6477 +# CONFIG_SCSI_MULTI_LUN is not set
6478 +CONFIG_SCSI_CONSTANTS=y
6479 +# CONFIG_SCSI_LOGGING is not set
6480 +
6481 +#
6482 +# SCSI low-level drivers
6483 +#
6484 +# CONFIG_SCSI_7000FASST is not set
6485 +# CONFIG_SCSI_ACARD is not set
6486 +# CONFIG_SCSI_AHA152X is not set
6487 +# CONFIG_SCSI_AHA1542 is not set
6488 +# CONFIG_SCSI_AHA1740 is not set
6489 +# CONFIG_SCSI_AACRAID is not set
6490 +# CONFIG_SCSI_AIC7XXX is not set
6491 +# CONFIG_SCSI_AIC79XX is not set
6492 +# CONFIG_SCSI_AIC7XXX_OLD is not set
6493 +# CONFIG_SCSI_DPT_I2O is not set
6494 +# CONFIG_SCSI_ADVANSYS is not set
6495 +# CONFIG_SCSI_IN2000 is not set
6496 +# CONFIG_SCSI_AM53C974 is not set
6497 +# CONFIG_SCSI_MEGARAID is not set
6498 +# CONFIG_SCSI_MEGARAID2 is not set
6499 +# CONFIG_SCSI_SATA is not set
6500 +# CONFIG_SCSI_SATA_AHCI is not set
6501 +# CONFIG_SCSI_SATA_SVW is not set
6502 +# CONFIG_SCSI_ATA_PIIX is not set
6503 +# CONFIG_SCSI_SATA_NV is not set
6504 +# CONFIG_SCSI_SATA_QSTOR is not set
6505 +# CONFIG_SCSI_SATA_PROMISE is not set
6506 +# CONFIG_SCSI_SATA_SX4 is not set
6507 +# CONFIG_SCSI_SATA_SIL is not set
6508 +# CONFIG_SCSI_SATA_SIS is not set
6509 +# CONFIG_SCSI_SATA_ULI is not set
6510 +# CONFIG_SCSI_SATA_VIA is not set
6511 +# CONFIG_SCSI_SATA_VITESSE is not set
6512 +# CONFIG_SCSI_BUSLOGIC is not set
6513 +# CONFIG_SCSI_DMX3191D is not set
6514 +# CONFIG_SCSI_DTC3280 is not set
6515 +# CONFIG_SCSI_EATA is not set
6516 +# CONFIG_SCSI_EATA_DMA is not set
6517 +# CONFIG_SCSI_EATA_PIO is not set
6518 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
6519 +# CONFIG_SCSI_GDTH is not set
6520 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
6521 +# CONFIG_SCSI_INITIO is not set
6522 +# CONFIG_SCSI_INIA100 is not set
6523 +# CONFIG_SCSI_NCR53C406A is not set
6524 +# CONFIG_SCSI_NCR53C7xx is not set
6525 +# CONFIG_SCSI_PAS16 is not set
6526 +# CONFIG_SCSI_PCI2000 is not set
6527 +# CONFIG_SCSI_PCI2220I is not set
6528 +# CONFIG_SCSI_PSI240I is not set
6529 +# CONFIG_SCSI_QLOGIC_FAS is not set
6530 +# CONFIG_SCSI_SIM710 is not set
6531 +# CONFIG_SCSI_SYM53C416 is not set
6532 +# CONFIG_SCSI_T128 is not set
6533 +# CONFIG_SCSI_U14_34F is not set
6534 +# CONFIG_SCSI_NSP32 is not set
6535 +# CONFIG_SCSI_DEBUG is not set
6536 +
6537 +#
6538 +# Fusion MPT device support
6539 +#
6540 +# CONFIG_FUSION is not set
6541 +# CONFIG_FUSION_BOOT is not set
6542 +# CONFIG_FUSION_ISENSE is not set
6543 +# CONFIG_FUSION_CTL is not set
6544 +# CONFIG_FUSION_LAN is not set
6545 +
6546 +#
6547 +# Network device support
6548 +#
6549 +CONFIG_NETDEVICES=y
6550 +
6551 +#
6552 +# ARCnet devices
6553 +#
6554 +# CONFIG_ARCNET is not set
6555 +# CONFIG_DUMMY is not set
6556 +# CONFIG_BONDING is not set
6557 +# CONFIG_EQUALIZER is not set
6558 +# CONFIG_TUN is not set
6559 +# CONFIG_ETHERTAP is not set
6560 +
6561 +#
6562 +# Ethernet (10 or 100Mbit)
6563 +#
6564 +CONFIG_NET_ETHERNET=y
6565 +# CONFIG_SUNLANCE is not set
6566 +# CONFIG_SUNBMAC is not set
6567 +# CONFIG_SUNQE is not set
6568 +# CONFIG_SUNGEM is not set
6569 +# CONFIG_NET_VENDOR_3COM is not set
6570 +# CONFIG_LANCE is not set
6571 +# CONFIG_NET_VENDOR_SMC is not set
6572 +# CONFIG_NET_VENDOR_RACAL is not set
6573 +# CONFIG_NET_ISA is not set
6574 +# CONFIG_NET_PCI is not set
6575 +# CONFIG_NET_POCKET is not set
6576 +
6577 +#
6578 +# Ethernet (1000 Mbit)
6579 +#
6580 +# CONFIG_ACENIC is not set
6581 +# CONFIG_DL2K is not set
6582 +# CONFIG_E1000 is not set
6583 +# CONFIG_MYRI_SBUS is not set
6584 +# CONFIG_NS83820 is not set
6585 +# CONFIG_HAMACHI is not set
6586 +# CONFIG_YELLOWFIN is not set
6587 +# CONFIG_R8169 is not set
6588 +# CONFIG_SK98LIN is not set
6589 +# CONFIG_TIGON3 is not set
6590 +# CONFIG_FDDI is not set
6591 +# CONFIG_HIPPI is not set
6592 +# CONFIG_PLIP is not set
6593 +# CONFIG_PPP is not set
6594 +# CONFIG_SLIP is not set
6595 +
6596 +#
6597 +# Wireless LAN (non-hamradio)
6598 +#
6599 +# CONFIG_NET_RADIO is not set
6600 +
6601 +#
6602 +# Token Ring devices
6603 +#
6604 +# CONFIG_TR is not set
6605 +# CONFIG_NET_FC is not set
6606 +# CONFIG_RCPCI is not set
6607 +# CONFIG_SHAPER is not set
6608 +
6609 +#
6610 +# Wan interfaces
6611 +#
6612 +# CONFIG_WAN is not set
6613 +
6614 +#
6615 +# Amateur Radio support
6616 +#
6617 +# CONFIG_HAMRADIO is not set
6618 +
6619 +#
6620 +# IrDA (infrared) support
6621 +#
6622 +# CONFIG_IRDA is not set
6623 +
6624 +#
6625 +# ISDN subsystem
6626 +#
6627 +# CONFIG_ISDN is not set
6628 +
6629 +#
6630 +# Input core support
6631 +#
6632 +CONFIG_INPUT=y
6633 +CONFIG_INPUT_KEYBDEV=y
6634 +CONFIG_INPUT_MOUSEDEV=y
6635 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
6636 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
6637 +# CONFIG_INPUT_JOYDEV is not set
6638 +CONFIG_INPUT_EVDEV=y
6639 +# CONFIG_INPUT_UINPUT is not set
6640 +
6641 +#
6642 +# Character devices
6643 +#
6644 +CONFIG_VT=y
6645 +CONFIG_VT_CONSOLE=y
6646 +# CONFIG_SERIAL is not set
6647 +# CONFIG_SERIAL_EXTENDED is not set
6648 +CONFIG_SERIAL_NONSTANDARD=y
6649 +# CONFIG_COMPUTONE is not set
6650 +# CONFIG_ROCKETPORT is not set
6651 +# CONFIG_CYCLADES is not set
6652 +# CONFIG_DIGIEPCA is not set
6653 +# CONFIG_DIGI is not set
6654 +# CONFIG_ESPSERIAL is not set
6655 +# CONFIG_MOXA_INTELLIO is not set
6656 +# CONFIG_MOXA_SMARTIO is not set
6657 +# CONFIG_ISI is not set
6658 +# CONFIG_SYNCLINK is not set
6659 +# CONFIG_SYNCLINKMP is not set
6660 +# CONFIG_N_HDLC is not set
6661 +# CONFIG_RISCOM8 is not set
6662 +# CONFIG_SPECIALIX is not set
6663 +# CONFIG_SX is not set
6664 +# CONFIG_RIO is not set
6665 +# CONFIG_STALDRV is not set
6666 +# CONFIG_SERIAL_TX3912 is not set
6667 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
6668 +# CONFIG_SERIAL_TXX9 is not set
6669 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
6670 +# CONFIG_TXX927_SERIAL is not set
6671 +CONFIG_UNIX98_PTYS=y
6672 +CONFIG_UNIX98_PTY_COUNT=256
6673 +
6674 +#
6675 +# I2C support
6676 +#
6677 +CONFIG_I2C=y
6678 +# CONFIG_I2C_ALGOBIT is not set
6679 +# CONFIG_SCx200_ACB is not set
6680 +# CONFIG_I2C_ALGOPCF is not set
6681 +# CONFIG_I2C_CHARDEV is not set
6682 +# CONFIG_I2C_PROC is not set
6683 +
6684 +#
6685 +# Mice
6686 +#
6687 +# CONFIG_BUSMOUSE is not set
6688 +# CONFIG_MOUSE is not set
6689 +
6690 +#
6691 +# Joysticks
6692 +#
6693 +# CONFIG_INPUT_GAMEPORT is not set
6694 +# CONFIG_INPUT_NS558 is not set
6695 +# CONFIG_INPUT_LIGHTNING is not set
6696 +# CONFIG_INPUT_PCIGAME is not set
6697 +# CONFIG_INPUT_CS461X is not set
6698 +# CONFIG_INPUT_EMU10K1 is not set
6699 +# CONFIG_INPUT_SERIO is not set
6700 +# CONFIG_INPUT_SERPORT is not set
6701 +
6702 +#
6703 +# Joysticks
6704 +#
6705 +# CONFIG_INPUT_ANALOG is not set
6706 +# CONFIG_INPUT_A3D is not set
6707 +# CONFIG_INPUT_ADI is not set
6708 +# CONFIG_INPUT_COBRA is not set
6709 +# CONFIG_INPUT_GF2K is not set
6710 +# CONFIG_INPUT_GRIP is not set
6711 +# CONFIG_INPUT_INTERACT is not set
6712 +# CONFIG_INPUT_TMDC is not set
6713 +# CONFIG_INPUT_SIDEWINDER is not set
6714 +# CONFIG_INPUT_IFORCE_USB is not set
6715 +# CONFIG_INPUT_IFORCE_232 is not set
6716 +# CONFIG_INPUT_WARRIOR is not set
6717 +# CONFIG_INPUT_MAGELLAN is not set
6718 +# CONFIG_INPUT_SPACEORB is not set
6719 +# CONFIG_INPUT_SPACEBALL is not set
6720 +# CONFIG_INPUT_STINGER is not set
6721 +# CONFIG_INPUT_DB9 is not set
6722 +# CONFIG_INPUT_GAMECON is not set
6723 +# CONFIG_INPUT_TURBOGRAFX is not set
6724 +# CONFIG_QIC02_TAPE is not set
6725 +# CONFIG_IPMI_HANDLER is not set
6726 +# CONFIG_IPMI_PANIC_EVENT is not set
6727 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
6728 +# CONFIG_IPMI_KCS is not set
6729 +# CONFIG_IPMI_WATCHDOG is not set
6730 +
6731 +#
6732 +# Watchdog Cards
6733 +#
6734 +# CONFIG_WATCHDOG is not set
6735 +# CONFIG_SCx200 is not set
6736 +# CONFIG_SCx200_GPIO is not set
6737 +# CONFIG_AMD_PM768 is not set
6738 +# CONFIG_NVRAM is not set
6739 +# CONFIG_RTC is not set
6740 +# CONFIG_DTLK is not set
6741 +# CONFIG_R3964 is not set
6742 +# CONFIG_APPLICOM is not set
6743 +
6744 +#
6745 +# Ftape, the floppy tape device driver
6746 +#
6747 +# CONFIG_FTAPE is not set
6748 +# CONFIG_AGP is not set
6749 +
6750 +#
6751 +# Direct Rendering Manager (XFree86 DRI support)
6752 +#
6753 +# CONFIG_DRM is not set
6754 +
6755 +#
6756 +# File systems
6757 +#
6758 +# CONFIG_QUOTA is not set
6759 +# CONFIG_QFMT_V2 is not set
6760 +CONFIG_AUTOFS_FS=y
6761 +# CONFIG_AUTOFS4_FS is not set
6762 +# CONFIG_REISERFS_FS is not set
6763 +# CONFIG_REISERFS_CHECK is not set
6764 +# CONFIG_REISERFS_PROC_INFO is not set
6765 +# CONFIG_ADFS_FS is not set
6766 +# CONFIG_ADFS_FS_RW is not set
6767 +# CONFIG_AFFS_FS is not set
6768 +# CONFIG_HFS_FS is not set
6769 +# CONFIG_HFSPLUS_FS is not set
6770 +# CONFIG_BEFS_FS is not set
6771 +# CONFIG_BEFS_DEBUG is not set
6772 +# CONFIG_BFS_FS is not set
6773 +CONFIG_EXT3_FS=y
6774 +CONFIG_JBD=y
6775 +# CONFIG_JBD_DEBUG is not set
6776 +CONFIG_FAT_FS=y
6777 +CONFIG_MSDOS_FS=y
6778 +# CONFIG_UMSDOS_FS is not set
6779 +CONFIG_VFAT_FS=y
6780 +# CONFIG_EFS_FS is not set
6781 +# CONFIG_JFFS_FS is not set
6782 +# CONFIG_JFFS2_FS is not set
6783 +# CONFIG_CRAMFS is not set
6784 +# CONFIG_TMPFS is not set
6785 +CONFIG_RAMFS=y
6786 +# CONFIG_ISO9660_FS is not set
6787 +# CONFIG_JOLIET is not set
6788 +# CONFIG_ZISOFS is not set
6789 +# CONFIG_JFS_FS is not set
6790 +# CONFIG_JFS_DEBUG is not set
6791 +# CONFIG_JFS_STATISTICS is not set
6792 +# CONFIG_MINIX_FS is not set
6793 +# CONFIG_VXFS_FS is not set
6794 +# CONFIG_NTFS_FS is not set
6795 +# CONFIG_NTFS_RW is not set
6796 +# CONFIG_HPFS_FS is not set
6797 +CONFIG_PROC_FS=y
6798 +# CONFIG_DEVFS_FS is not set
6799 +# CONFIG_DEVFS_MOUNT is not set
6800 +# CONFIG_DEVFS_DEBUG is not set
6801 +CONFIG_DEVPTS_FS=y
6802 +# CONFIG_QNX4FS_FS is not set
6803 +# CONFIG_QNX4FS_RW is not set
6804 +# CONFIG_ROMFS_FS is not set
6805 +CONFIG_EXT2_FS=y
6806 +# CONFIG_SYSV_FS is not set
6807 +# CONFIG_UDF_FS is not set
6808 +# CONFIG_UDF_RW is not set
6809 +# CONFIG_UFS_FS is not set
6810 +# CONFIG_UFS_FS_WRITE is not set
6811 +# CONFIG_XFS_FS is not set
6812 +# CONFIG_XFS_QUOTA is not set
6813 +# CONFIG_XFS_RT is not set
6814 +# CONFIG_XFS_TRACE is not set
6815 +# CONFIG_XFS_DEBUG is not set
6816 +
6817 +#
6818 +# Network File Systems
6819 +#
6820 +# CONFIG_CODA_FS is not set
6821 +# CONFIG_INTERMEZZO_FS is not set
6822 +# CONFIG_NFS_FS is not set
6823 +# CONFIG_NFS_V3 is not set
6824 +# CONFIG_NFS_DIRECTIO is not set
6825 +# CONFIG_ROOT_NFS is not set
6826 +# CONFIG_NFSD is not set
6827 +# CONFIG_NFSD_V3 is not set
6828 +# CONFIG_NFSD_TCP is not set
6829 +# CONFIG_SUNRPC is not set
6830 +# CONFIG_LOCKD is not set
6831 +# CONFIG_SMB_FS is not set
6832 +# CONFIG_NCP_FS is not set
6833 +# CONFIG_NCPFS_PACKET_SIGNING is not set
6834 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
6835 +# CONFIG_NCPFS_STRONG is not set
6836 +# CONFIG_NCPFS_NFS_NS is not set
6837 +# CONFIG_NCPFS_OS2_NS is not set
6838 +# CONFIG_NCPFS_SMALLDOS is not set
6839 +# CONFIG_NCPFS_NLS is not set
6840 +# CONFIG_NCPFS_EXTRAS is not set
6841 +# CONFIG_ZISOFS_FS is not set
6842 +
6843 +#
6844 +# Partition Types
6845 +#
6846 +# CONFIG_PARTITION_ADVANCED is not set
6847 +CONFIG_MSDOS_PARTITION=y
6848 +# CONFIG_SMB_NLS is not set
6849 +CONFIG_NLS=y
6850 +
6851 +#
6852 +# Native Language Support
6853 +#
6854 +CONFIG_NLS_DEFAULT="iso8859-1"
6855 +# CONFIG_NLS_CODEPAGE_437 is not set
6856 +# CONFIG_NLS_CODEPAGE_737 is not set
6857 +# CONFIG_NLS_CODEPAGE_775 is not set
6858 +# CONFIG_NLS_CODEPAGE_850 is not set
6859 +# CONFIG_NLS_CODEPAGE_852 is not set
6860 +# CONFIG_NLS_CODEPAGE_855 is not set
6861 +# CONFIG_NLS_CODEPAGE_857 is not set
6862 +# CONFIG_NLS_CODEPAGE_860 is not set
6863 +# CONFIG_NLS_CODEPAGE_861 is not set
6864 +# CONFIG_NLS_CODEPAGE_862 is not set
6865 +# CONFIG_NLS_CODEPAGE_863 is not set
6866 +# CONFIG_NLS_CODEPAGE_864 is not set
6867 +# CONFIG_NLS_CODEPAGE_865 is not set
6868 +# CONFIG_NLS_CODEPAGE_866 is not set
6869 +# CONFIG_NLS_CODEPAGE_869 is not set
6870 +# CONFIG_NLS_CODEPAGE_936 is not set
6871 +# CONFIG_NLS_CODEPAGE_950 is not set
6872 +# CONFIG_NLS_CODEPAGE_932 is not set
6873 +# CONFIG_NLS_CODEPAGE_949 is not set
6874 +# CONFIG_NLS_CODEPAGE_874 is not set
6875 +# CONFIG_NLS_ISO8859_8 is not set
6876 +# CONFIG_NLS_CODEPAGE_1250 is not set
6877 +# CONFIG_NLS_CODEPAGE_1251 is not set
6878 +# CONFIG_NLS_ISO8859_1 is not set
6879 +# CONFIG_NLS_ISO8859_2 is not set
6880 +# CONFIG_NLS_ISO8859_3 is not set
6881 +# CONFIG_NLS_ISO8859_4 is not set
6882 +# CONFIG_NLS_ISO8859_5 is not set
6883 +# CONFIG_NLS_ISO8859_6 is not set
6884 +# CONFIG_NLS_ISO8859_7 is not set
6885 +# CONFIG_NLS_ISO8859_9 is not set
6886 +# CONFIG_NLS_ISO8859_13 is not set
6887 +# CONFIG_NLS_ISO8859_14 is not set
6888 +# CONFIG_NLS_ISO8859_15 is not set
6889 +# CONFIG_NLS_KOI8_R is not set
6890 +# CONFIG_NLS_KOI8_U is not set
6891 +# CONFIG_NLS_UTF8 is not set
6892 +
6893 +#
6894 +# Multimedia devices
6895 +#
6896 +# CONFIG_VIDEO_DEV is not set
6897 +
6898 +#
6899 +# Console drivers
6900 +#
6901 +# CONFIG_VGA_CONSOLE is not set
6902 +# CONFIG_MDA_CONSOLE is not set
6903 +
6904 +#
6905 +# Frame-buffer support
6906 +#
6907 +CONFIG_FB=y
6908 +CONFIG_DUMMY_CONSOLE=y
6909 +# CONFIG_FB_CYBER2000 is not set
6910 +# CONFIG_FB_VIRTUAL is not set
6911 +CONFIG_FBCON_ADVANCED=y
6912 +# CONFIG_FBCON_MFB is not set
6913 +# CONFIG_FBCON_CFB2 is not set
6914 +# CONFIG_FBCON_CFB4 is not set
6915 +# CONFIG_FBCON_CFB8 is not set
6916 +CONFIG_FBCON_CFB16=y
6917 +# CONFIG_FBCON_CFB24 is not set
6918 +# CONFIG_FBCON_CFB32 is not set
6919 +# CONFIG_FBCON_AFB is not set
6920 +# CONFIG_FBCON_ILBM is not set
6921 +# CONFIG_FBCON_IPLAN2P2 is not set
6922 +# CONFIG_FBCON_IPLAN2P4 is not set
6923 +# CONFIG_FBCON_IPLAN2P8 is not set
6924 +# CONFIG_FBCON_MAC is not set
6925 +# CONFIG_FBCON_VGA_PLANES is not set
6926 +# CONFIG_FBCON_VGA is not set
6927 +# CONFIG_FBCON_HGA is not set
6928 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
6929 +CONFIG_FBCON_FONTS=y
6930 +CONFIG_FONT_8x8=y
6931 +CONFIG_FONT_8x16=y
6932 +# CONFIG_FONT_SUN8x16 is not set
6933 +# CONFIG_FONT_SUN12x22 is not set
6934 +# CONFIG_FONT_6x11 is not set
6935 +# CONFIG_FONT_PEARL_8x8 is not set
6936 +# CONFIG_FONT_ACORN_8x8 is not set
6937 +
6938 +#
6939 +# Sound
6940 +#
6941 +CONFIG_SOUND=y
6942 +# CONFIG_SOUND_ALI5455 is not set
6943 +# CONFIG_SOUND_BT878 is not set
6944 +# CONFIG_SOUND_CMPCI is not set
6945 +# CONFIG_SOUND_EMU10K1 is not set
6946 +# CONFIG_MIDI_EMU10K1 is not set
6947 +# CONFIG_SOUND_FUSION is not set
6948 +# CONFIG_SOUND_CS4281 is not set
6949 +# CONFIG_SOUND_ES1370 is not set
6950 +# CONFIG_SOUND_ES1371 is not set
6951 +# CONFIG_SOUND_ESSSOLO1 is not set
6952 +# CONFIG_SOUND_MAESTRO is not set
6953 +# CONFIG_SOUND_MAESTRO3 is not set
6954 +# CONFIG_SOUND_FORTE is not set
6955 +# CONFIG_SOUND_ICH is not set
6956 +# CONFIG_SOUND_RME96XX is not set
6957 +# CONFIG_SOUND_SONICVIBES is not set
6958 +# CONFIG_SOUND_TRIDENT is not set
6959 +# CONFIG_SOUND_MSNDCLAS is not set
6960 +# CONFIG_SOUND_MSNDPIN is not set
6961 +# CONFIG_SOUND_VIA82CXXX is not set
6962 +# CONFIG_MIDI_VIA82CXXX is not set
6963 +# CONFIG_SOUND_OSS is not set
6964 +# CONFIG_SOUND_TVMIXER is not set
6965 +# CONFIG_SOUND_AD1980 is not set
6966 +# CONFIG_SOUND_WM97XX is not set
6967 +
6968 +#
6969 +# USB support
6970 +#
6971 +# CONFIG_USB is not set
6972 +
6973 +#
6974 +# Support for USB gadgets
6975 +#
6976 +# CONFIG_USB_GADGET is not set
6977 +
6978 +#
6979 +# Bluetooth support
6980 +#
6981 +# CONFIG_BLUEZ is not set
6982 +
6983 +#
6984 +# Kernel hacking
6985 +#
6986 +CONFIG_CROSSCOMPILE=y
6987 +# CONFIG_RUNTIME_DEBUG is not set
6988 +# CONFIG_KGDB is not set
6989 +# CONFIG_GDB_CONSOLE is not set
6990 +# CONFIG_DEBUG_INFO is not set
6991 +# CONFIG_MAGIC_SYSRQ is not set
6992 +# CONFIG_MIPS_UNCACHED is not set
6993 +CONFIG_LOG_BUF_SHIFT=0
6994 +
6995 +#
6996 +# Cryptographic options
6997 +#
6998 +# CONFIG_CRYPTO is not set
6999 +
7000 +#
7001 +# Library routines
7002 +#
7003 +# CONFIG_CRC32 is not set
7004 +CONFIG_ZLIB_INFLATE=m
7005 +CONFIG_ZLIB_DEFLATE=m
7006 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-hp-lj linux-2.4.32-rc1.mips/arch/mips/defconfig-hp-lj
7007 --- linux-2.4.32-rc1/arch/mips/defconfig-hp-lj 2005-01-19 15:09:28.000000000 +0100
7008 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-hp-lj 2005-03-18 13:13:21.000000000 +0100
7009 @@ -30,8 +30,8 @@
7010 # CONFIG_MIPS_PB1000 is not set
7011 # CONFIG_MIPS_PB1100 is not set
7012 # CONFIG_MIPS_PB1500 is not set
7013 -# CONFIG_MIPS_HYDROGEN3 is not set
7014 # CONFIG_MIPS_PB1550 is not set
7015 +# CONFIG_MIPS_HYDROGEN3 is not set
7016 # CONFIG_MIPS_XXS1500 is not set
7017 # CONFIG_MIPS_MTX1 is not set
7018 # CONFIG_COGENT_CSB250 is not set
7019 @@ -184,8 +184,8 @@
7020 # Mapping drivers for chip access
7021 #
7022 CONFIG_MTD_PHYSMAP=y
7023 -CONFIG_MTD_PHYSMAP_START=10040000
7024 -CONFIG_MTD_PHYSMAP_LEN=00fc0000
7025 +CONFIG_MTD_PHYSMAP_START=0x10040000
7026 +CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
7027 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7028 # CONFIG_MTD_PB1000 is not set
7029 # CONFIG_MTD_PB1500 is not set
7030 @@ -193,9 +193,7 @@
7031 # CONFIG_MTD_BOSPORUS is not set
7032 # CONFIG_MTD_XXS1500 is not set
7033 # CONFIG_MTD_MTX1 is not set
7034 -# CONFIG_MTD_DB1X00 is not set
7035 # CONFIG_MTD_PB1550 is not set
7036 -# CONFIG_MTD_HYDROGEN3 is not set
7037 # CONFIG_MTD_MIRAGE is not set
7038 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7039 # CONFIG_MTD_OCELOT is not set
7040 @@ -214,7 +212,6 @@
7041 #
7042 # Disk-On-Chip Device Drivers
7043 #
7044 -# CONFIG_MTD_DOC1000 is not set
7045 # CONFIG_MTD_DOC2000 is not set
7046 # CONFIG_MTD_DOC2001 is not set
7047 # CONFIG_MTD_DOCPROBE is not set
7048 @@ -304,11 +301,6 @@
7049 #
7050 # CONFIG_IPX is not set
7051 # CONFIG_ATALK is not set
7052 -
7053 -#
7054 -# Appletalk devices
7055 -#
7056 -# CONFIG_DEV_APPLETALK is not set
7057 # CONFIG_DECNET is not set
7058 # CONFIG_BRIDGE is not set
7059 # CONFIG_X25 is not set
7060 @@ -604,7 +596,6 @@
7061 CONFIG_SERIAL_CONSOLE=y
7062 # CONFIG_SERIAL_EXTENDED is not set
7063 # CONFIG_SERIAL_NONSTANDARD is not set
7064 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7065 # CONFIG_UNIX98_PTYS is not set
7066
7067 #
7068 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-hydrogen3 linux-2.4.32-rc1.mips/arch/mips/defconfig-hydrogen3
7069 --- linux-2.4.32-rc1/arch/mips/defconfig-hydrogen3 2005-01-19 15:09:28.000000000 +0100
7070 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-hydrogen3 2005-03-18 13:13:21.000000000 +0100
7071 @@ -30,8 +30,8 @@
7072 # CONFIG_MIPS_PB1000 is not set
7073 # CONFIG_MIPS_PB1100 is not set
7074 # CONFIG_MIPS_PB1500 is not set
7075 -CONFIG_MIPS_HYDROGEN3=y
7076 # CONFIG_MIPS_PB1550 is not set
7077 +CONFIG_MIPS_HYDROGEN3=y
7078 # CONFIG_MIPS_XXS1500 is not set
7079 # CONFIG_MIPS_MTX1 is not set
7080 # CONFIG_COGENT_CSB250 is not set
7081 @@ -214,9 +214,7 @@
7082 # CONFIG_MTD_BOSPORUS is not set
7083 # CONFIG_MTD_XXS1500 is not set
7084 # CONFIG_MTD_MTX1 is not set
7085 -# CONFIG_MTD_DB1X00 is not set
7086 # CONFIG_MTD_PB1550 is not set
7087 -CONFIG_MTD_HYDROGEN3=y
7088 # CONFIG_MTD_MIRAGE is not set
7089 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7090 # CONFIG_MTD_OCELOT is not set
7091 @@ -235,7 +233,6 @@
7092 #
7093 # Disk-On-Chip Device Drivers
7094 #
7095 -# CONFIG_MTD_DOC1000 is not set
7096 # CONFIG_MTD_DOC2000 is not set
7097 # CONFIG_MTD_DOC2001 is not set
7098 # CONFIG_MTD_DOCPROBE is not set
7099 @@ -340,11 +337,6 @@
7100 #
7101 # CONFIG_IPX is not set
7102 # CONFIG_ATALK is not set
7103 -
7104 -#
7105 -# Appletalk devices
7106 -#
7107 -# CONFIG_DEV_APPLETALK is not set
7108 # CONFIG_DECNET is not set
7109 # CONFIG_BRIDGE is not set
7110 # CONFIG_X25 is not set
7111 @@ -590,7 +582,6 @@
7112 # CONFIG_AU1X00_USB_TTY is not set
7113 # CONFIG_AU1X00_USB_RAW is not set
7114 # CONFIG_TXX927_SERIAL is not set
7115 -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
7116 CONFIG_UNIX98_PTYS=y
7117 CONFIG_UNIX98_PTY_COUNT=256
7118
7119 @@ -838,6 +829,7 @@
7120 # CONFIG_FB_PM2 is not set
7121 # CONFIG_FB_PM3 is not set
7122 # CONFIG_FB_CYBER2000 is not set
7123 +CONFIG_FB_AU1100=y
7124 # CONFIG_FB_MATROX is not set
7125 # CONFIG_FB_ATY is not set
7126 # CONFIG_FB_RADEON is not set
7127 @@ -849,7 +841,6 @@
7128 # CONFIG_FB_VOODOO1 is not set
7129 # CONFIG_FB_TRIDENT is not set
7130 # CONFIG_FB_E1356 is not set
7131 -CONFIG_FB_AU1100=y
7132 # CONFIG_FB_IT8181 is not set
7133 # CONFIG_FB_VIRTUAL is not set
7134 CONFIG_FBCON_ADVANCED=y
7135 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ip22 linux-2.4.32-rc1.mips/arch/mips/defconfig-ip22
7136 --- linux-2.4.32-rc1/arch/mips/defconfig-ip22 2005-01-19 15:09:28.000000000 +0100
7137 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ip22 2005-03-18 13:13:21.000000000 +0100
7138 @@ -30,8 +30,8 @@
7139 # CONFIG_MIPS_PB1000 is not set
7140 # CONFIG_MIPS_PB1100 is not set
7141 # CONFIG_MIPS_PB1500 is not set
7142 -# CONFIG_MIPS_HYDROGEN3 is not set
7143 # CONFIG_MIPS_PB1550 is not set
7144 +# CONFIG_MIPS_HYDROGEN3 is not set
7145 # CONFIG_MIPS_XXS1500 is not set
7146 # CONFIG_MIPS_MTX1 is not set
7147 # CONFIG_COGENT_CSB250 is not set
7148 @@ -235,11 +235,6 @@
7149 #
7150 # CONFIG_IPX is not set
7151 # CONFIG_ATALK is not set
7152 -
7153 -#
7154 -# Appletalk devices
7155 -#
7156 -# CONFIG_DEV_APPLETALK is not set
7157 # CONFIG_DECNET is not set
7158 # CONFIG_BRIDGE is not set
7159 # CONFIG_X25 is not set
7160 @@ -319,9 +314,11 @@
7161 # CONFIG_SCSI_MEGARAID is not set
7162 # CONFIG_SCSI_MEGARAID2 is not set
7163 # CONFIG_SCSI_SATA is not set
7164 +# CONFIG_SCSI_SATA_AHCI is not set
7165 # CONFIG_SCSI_SATA_SVW is not set
7166 # CONFIG_SCSI_ATA_PIIX is not set
7167 # CONFIG_SCSI_SATA_NV is not set
7168 +# CONFIG_SCSI_SATA_QSTOR is not set
7169 # CONFIG_SCSI_SATA_PROMISE is not set
7170 # CONFIG_SCSI_SATA_SX4 is not set
7171 # CONFIG_SCSI_SATA_SIL is not set
7172 @@ -465,7 +462,6 @@
7173 # CONFIG_SERIAL is not set
7174 # CONFIG_SERIAL_EXTENDED is not set
7175 # CONFIG_SERIAL_NONSTANDARD is not set
7176 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7177 CONFIG_UNIX98_PTYS=y
7178 CONFIG_UNIX98_PTY_COUNT=256
7179
7180 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-it8172 linux-2.4.32-rc1.mips/arch/mips/defconfig-it8172
7181 --- linux-2.4.32-rc1/arch/mips/defconfig-it8172 2005-01-19 15:09:28.000000000 +0100
7182 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-it8172 2005-03-18 13:13:21.000000000 +0100
7183 @@ -30,8 +30,8 @@
7184 # CONFIG_MIPS_PB1000 is not set
7185 # CONFIG_MIPS_PB1100 is not set
7186 # CONFIG_MIPS_PB1500 is not set
7187 -# CONFIG_MIPS_HYDROGEN3 is not set
7188 # CONFIG_MIPS_PB1550 is not set
7189 +# CONFIG_MIPS_HYDROGEN3 is not set
7190 # CONFIG_MIPS_XXS1500 is not set
7191 # CONFIG_MIPS_MTX1 is not set
7192 # CONFIG_COGENT_CSB250 is not set
7193 @@ -186,8 +186,8 @@
7194 # Mapping drivers for chip access
7195 #
7196 CONFIG_MTD_PHYSMAP=y
7197 -CONFIG_MTD_PHYSMAP_START=8000000
7198 -CONFIG_MTD_PHYSMAP_LEN=2000000
7199 +CONFIG_MTD_PHYSMAP_START=0x8000000
7200 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
7201 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7202 # CONFIG_MTD_PB1000 is not set
7203 # CONFIG_MTD_PB1500 is not set
7204 @@ -195,9 +195,7 @@
7205 # CONFIG_MTD_BOSPORUS is not set
7206 # CONFIG_MTD_XXS1500 is not set
7207 # CONFIG_MTD_MTX1 is not set
7208 -# CONFIG_MTD_DB1X00 is not set
7209 # CONFIG_MTD_PB1550 is not set
7210 -# CONFIG_MTD_HYDROGEN3 is not set
7211 # CONFIG_MTD_MIRAGE is not set
7212 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7213 # CONFIG_MTD_OCELOT is not set
7214 @@ -216,7 +214,6 @@
7215 #
7216 # Disk-On-Chip Device Drivers
7217 #
7218 -# CONFIG_MTD_DOC1000 is not set
7219 # CONFIG_MTD_DOC2000 is not set
7220 # CONFIG_MTD_DOC2001 is not set
7221 # CONFIG_MTD_DOCPROBE is not set
7222 @@ -304,11 +301,6 @@
7223 #
7224 # CONFIG_IPX is not set
7225 # CONFIG_ATALK is not set
7226 -
7227 -#
7228 -# Appletalk devices
7229 -#
7230 -# CONFIG_DEV_APPLETALK is not set
7231 # CONFIG_DECNET is not set
7232 # CONFIG_BRIDGE is not set
7233 # CONFIG_X25 is not set
7234 @@ -592,7 +584,6 @@
7235 CONFIG_PC_KEYB=y
7236 # CONFIG_IT8172_SCR0 is not set
7237 # CONFIG_IT8172_SCR1 is not set
7238 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7239 CONFIG_UNIX98_PTYS=y
7240 CONFIG_UNIX98_PTY_COUNT=256
7241
7242 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ivr linux-2.4.32-rc1.mips/arch/mips/defconfig-ivr
7243 --- linux-2.4.32-rc1/arch/mips/defconfig-ivr 2005-01-19 15:09:28.000000000 +0100
7244 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ivr 2005-03-18 13:13:21.000000000 +0100
7245 @@ -30,8 +30,8 @@
7246 # CONFIG_MIPS_PB1000 is not set
7247 # CONFIG_MIPS_PB1100 is not set
7248 # CONFIG_MIPS_PB1500 is not set
7249 -# CONFIG_MIPS_HYDROGEN3 is not set
7250 # CONFIG_MIPS_PB1550 is not set
7251 +# CONFIG_MIPS_HYDROGEN3 is not set
7252 # CONFIG_MIPS_XXS1500 is not set
7253 # CONFIG_MIPS_MTX1 is not set
7254 # CONFIG_COGENT_CSB250 is not set
7255 @@ -226,11 +226,6 @@
7256 #
7257 # CONFIG_IPX is not set
7258 # CONFIG_ATALK is not set
7259 -
7260 -#
7261 -# Appletalk devices
7262 -#
7263 -# CONFIG_DEV_APPLETALK is not set
7264 # CONFIG_DECNET is not set
7265 # CONFIG_BRIDGE is not set
7266 # CONFIG_X25 is not set
7267 @@ -516,7 +511,6 @@
7268 CONFIG_QTRONIX_KEYBOARD=y
7269 CONFIG_IT8172_CIR=y
7270 # CONFIG_IT8172_SCR0 is not set
7271 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7272 CONFIG_UNIX98_PTYS=y
7273 CONFIG_UNIX98_PTY_COUNT=256
7274
7275 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-jmr3927 linux-2.4.32-rc1.mips/arch/mips/defconfig-jmr3927
7276 --- linux-2.4.32-rc1/arch/mips/defconfig-jmr3927 2005-01-19 15:09:28.000000000 +0100
7277 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-jmr3927 2005-03-18 13:13:21.000000000 +0100
7278 @@ -28,8 +28,8 @@
7279 # CONFIG_MIPS_PB1000 is not set
7280 # CONFIG_MIPS_PB1100 is not set
7281 # CONFIG_MIPS_PB1500 is not set
7282 -# CONFIG_MIPS_HYDROGEN3 is not set
7283 # CONFIG_MIPS_PB1550 is not set
7284 +# CONFIG_MIPS_HYDROGEN3 is not set
7285 # CONFIG_MIPS_XXS1500 is not set
7286 # CONFIG_MIPS_MTX1 is not set
7287 # CONFIG_COGENT_CSB250 is not set
7288 @@ -225,11 +225,6 @@
7289 #
7290 # CONFIG_IPX is not set
7291 # CONFIG_ATALK is not set
7292 -
7293 -#
7294 -# Appletalk devices
7295 -#
7296 -# CONFIG_DEV_APPLETALK is not set
7297 # CONFIG_DECNET is not set
7298 # CONFIG_BRIDGE is not set
7299 # CONFIG_X25 is not set
7300 @@ -454,7 +449,6 @@
7301 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7302 CONFIG_TXX927_SERIAL=y
7303 CONFIG_TXX927_SERIAL_CONSOLE=y
7304 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7305 # CONFIG_UNIX98_PTYS is not set
7306
7307 #
7308 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-lasat linux-2.4.32-rc1.mips/arch/mips/defconfig-lasat
7309 --- linux-2.4.32-rc1/arch/mips/defconfig-lasat 2005-01-19 15:09:28.000000000 +0100
7310 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-lasat 2005-03-18 13:13:21.000000000 +0100
7311 @@ -30,8 +30,8 @@
7312 # CONFIG_MIPS_PB1000 is not set
7313 # CONFIG_MIPS_PB1100 is not set
7314 # CONFIG_MIPS_PB1500 is not set
7315 -# CONFIG_MIPS_HYDROGEN3 is not set
7316 # CONFIG_MIPS_PB1550 is not set
7317 +# CONFIG_MIPS_HYDROGEN3 is not set
7318 # CONFIG_MIPS_XXS1500 is not set
7319 # CONFIG_MIPS_MTX1 is not set
7320 # CONFIG_COGENT_CSB250 is not set
7321 @@ -198,9 +198,7 @@
7322 # CONFIG_MTD_BOSPORUS is not set
7323 # CONFIG_MTD_XXS1500 is not set
7324 # CONFIG_MTD_MTX1 is not set
7325 -# CONFIG_MTD_DB1X00 is not set
7326 # CONFIG_MTD_PB1550 is not set
7327 -# CONFIG_MTD_HYDROGEN3 is not set
7328 # CONFIG_MTD_MIRAGE is not set
7329 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7330 # CONFIG_MTD_OCELOT is not set
7331 @@ -219,7 +217,6 @@
7332 #
7333 # Disk-On-Chip Device Drivers
7334 #
7335 -# CONFIG_MTD_DOC1000 is not set
7336 # CONFIG_MTD_DOC2000 is not set
7337 # CONFIG_MTD_DOC2001 is not set
7338 # CONFIG_MTD_DOCPROBE is not set
7339 @@ -303,11 +300,6 @@
7340 #
7341 # CONFIG_IPX is not set
7342 # CONFIG_ATALK is not set
7343 -
7344 -#
7345 -# Appletalk devices
7346 -#
7347 -# CONFIG_DEV_APPLETALK is not set
7348 # CONFIG_DECNET is not set
7349 # CONFIG_BRIDGE is not set
7350 # CONFIG_X25 is not set
7351 @@ -584,7 +576,6 @@
7352 CONFIG_SERIAL_CONSOLE=y
7353 # CONFIG_SERIAL_EXTENDED is not set
7354 # CONFIG_SERIAL_NONSTANDARD is not set
7355 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7356 CONFIG_UNIX98_PTYS=y
7357 CONFIG_UNIX98_PTY_COUNT=256
7358
7359 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-malta linux-2.4.32-rc1.mips/arch/mips/defconfig-malta
7360 --- linux-2.4.32-rc1/arch/mips/defconfig-malta 2005-01-19 15:09:28.000000000 +0100
7361 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-malta 2005-04-19 14:19:34.000000000 +0200
7362 @@ -22,16 +22,19 @@
7363 #
7364 # CONFIG_ACER_PICA_61 is not set
7365 # CONFIG_MIPS_BOSPORUS is not set
7366 +# CONFIG_MIPS_FICMMP is not set
7367 # CONFIG_MIPS_MIRAGE is not set
7368 # CONFIG_MIPS_DB1000 is not set
7369 # CONFIG_MIPS_DB1100 is not set
7370 # CONFIG_MIPS_DB1500 is not set
7371 # CONFIG_MIPS_DB1550 is not set
7372 +# CONFIG_MIPS_DB1200 is not set
7373 # CONFIG_MIPS_PB1000 is not set
7374 # CONFIG_MIPS_PB1100 is not set
7375 # CONFIG_MIPS_PB1500 is not set
7376 -# CONFIG_MIPS_HYDROGEN3 is not set
7377 # CONFIG_MIPS_PB1550 is not set
7378 +# CONFIG_MIPS_PB1200 is not set
7379 +# CONFIG_MIPS_HYDROGEN3 is not set
7380 # CONFIG_MIPS_XXS1500 is not set
7381 # CONFIG_MIPS_MTX1 is not set
7382 # CONFIG_COGENT_CSB250 is not set
7383 @@ -237,11 +240,6 @@
7384 #
7385 # CONFIG_IPX is not set
7386 # CONFIG_ATALK is not set
7387 -
7388 -#
7389 -# Appletalk devices
7390 -#
7391 -# CONFIG_DEV_APPLETALK is not set
7392 # CONFIG_DECNET is not set
7393 # CONFIG_BRIDGE is not set
7394 # CONFIG_X25 is not set
7395 @@ -273,8 +271,83 @@
7396 #
7397 # ATA/IDE/MFM/RLL support
7398 #
7399 -# CONFIG_IDE is not set
7400 +CONFIG_IDE=y
7401 +
7402 +#
7403 +# IDE, ATA and ATAPI Block devices
7404 +#
7405 +CONFIG_BLK_DEV_IDE=y
7406 +
7407 +#
7408 +# Please see Documentation/ide.txt for help/info on IDE drives
7409 +#
7410 +# CONFIG_BLK_DEV_HD_IDE is not set
7411 # CONFIG_BLK_DEV_HD is not set
7412 +# CONFIG_BLK_DEV_IDE_SATA is not set
7413 +CONFIG_BLK_DEV_IDEDISK=y
7414 +# CONFIG_IDEDISK_MULTI_MODE is not set
7415 +# CONFIG_IDEDISK_STROKE is not set
7416 +# CONFIG_BLK_DEV_IDECS is not set
7417 +# CONFIG_BLK_DEV_DELKIN is not set
7418 +CONFIG_BLK_DEV_IDECD=y
7419 +CONFIG_BLK_DEV_IDETAPE=y
7420 +CONFIG_BLK_DEV_IDEFLOPPY=y
7421 +CONFIG_BLK_DEV_IDESCSI=y
7422 +# CONFIG_IDE_TASK_IOCTL is not set
7423 +
7424 +#
7425 +# IDE chipset support/bugfixes
7426 +#
7427 +# CONFIG_BLK_DEV_CMD640 is not set
7428 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
7429 +# CONFIG_BLK_DEV_ISAPNP is not set
7430 +CONFIG_BLK_DEV_IDEPCI=y
7431 +CONFIG_BLK_DEV_GENERIC=y
7432 +CONFIG_IDEPCI_SHARE_IRQ=y
7433 +CONFIG_BLK_DEV_IDEDMA_PCI=y
7434 +# CONFIG_BLK_DEV_OFFBOARD is not set
7435 +CONFIG_BLK_DEV_IDEDMA_FORCED=y
7436 +CONFIG_IDEDMA_PCI_AUTO=y
7437 +# CONFIG_IDEDMA_ONLYDISK is not set
7438 +CONFIG_BLK_DEV_IDEDMA=y
7439 +# CONFIG_IDEDMA_PCI_WIP is not set
7440 +# CONFIG_BLK_DEV_ADMA100 is not set
7441 +# CONFIG_BLK_DEV_AEC62XX is not set
7442 +# CONFIG_BLK_DEV_ALI15X3 is not set
7443 +# CONFIG_WDC_ALI15X3 is not set
7444 +# CONFIG_BLK_DEV_AMD74XX is not set
7445 +# CONFIG_AMD74XX_OVERRIDE is not set
7446 +# CONFIG_BLK_DEV_ATIIXP is not set
7447 +# CONFIG_BLK_DEV_CMD64X is not set
7448 +# CONFIG_BLK_DEV_TRIFLEX is not set
7449 +# CONFIG_BLK_DEV_CY82C693 is not set
7450 +# CONFIG_BLK_DEV_CS5530 is not set
7451 +# CONFIG_BLK_DEV_HPT34X is not set
7452 +# CONFIG_HPT34X_AUTODMA is not set
7453 +# CONFIG_BLK_DEV_HPT366 is not set
7454 +CONFIG_BLK_DEV_PIIX=y
7455 +# CONFIG_BLK_DEV_NS87415 is not set
7456 +# CONFIG_BLK_DEV_OPTI621 is not set
7457 +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
7458 +# CONFIG_PDC202XX_BURST is not set
7459 +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
7460 +# CONFIG_BLK_DEV_RZ1000 is not set
7461 +# CONFIG_BLK_DEV_SC1200 is not set
7462 +# CONFIG_BLK_DEV_SVWKS is not set
7463 +# CONFIG_BLK_DEV_SIIMAGE is not set
7464 +# CONFIG_BLK_DEV_SIS5513 is not set
7465 +# CONFIG_BLK_DEV_SLC90E66 is not set
7466 +# CONFIG_BLK_DEV_TRM290 is not set
7467 +# CONFIG_BLK_DEV_VIA82CXXX is not set
7468 +# CONFIG_IDE_CHIPSETS is not set
7469 +CONFIG_IDEDMA_AUTO=y
7470 +# CONFIG_IDEDMA_IVB is not set
7471 +# CONFIG_DMA_NONPCI is not set
7472 +# CONFIG_BLK_DEV_ATARAID is not set
7473 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
7474 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
7475 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
7476 +# CONFIG_BLK_DEV_ATARAID_SII is not set
7477
7478 #
7479 # SCSI support
7480 @@ -319,9 +392,11 @@
7481 # CONFIG_SCSI_MEGARAID is not set
7482 # CONFIG_SCSI_MEGARAID2 is not set
7483 # CONFIG_SCSI_SATA is not set
7484 +# CONFIG_SCSI_SATA_AHCI is not set
7485 # CONFIG_SCSI_SATA_SVW is not set
7486 # CONFIG_SCSI_ATA_PIIX is not set
7487 # CONFIG_SCSI_SATA_NV is not set
7488 +# CONFIG_SCSI_SATA_QSTOR is not set
7489 # CONFIG_SCSI_SATA_PROMISE is not set
7490 # CONFIG_SCSI_SATA_SX4 is not set
7491 # CONFIG_SCSI_SATA_SIL is not set
7492 @@ -524,7 +599,6 @@
7493 CONFIG_SERIAL_CONSOLE=y
7494 # CONFIG_SERIAL_EXTENDED is not set
7495 # CONFIG_SERIAL_NONSTANDARD is not set
7496 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7497 CONFIG_UNIX98_PTYS=y
7498 CONFIG_UNIX98_PTY_COUNT=256
7499
7500 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-mirage linux-2.4.32-rc1.mips/arch/mips/defconfig-mirage
7501 --- linux-2.4.32-rc1/arch/mips/defconfig-mirage 2005-01-19 15:09:28.000000000 +0100
7502 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-mirage 2005-03-18 13:13:21.000000000 +0100
7503 @@ -30,8 +30,8 @@
7504 # CONFIG_MIPS_PB1000 is not set
7505 # CONFIG_MIPS_PB1100 is not set
7506 # CONFIG_MIPS_PB1500 is not set
7507 -# CONFIG_MIPS_HYDROGEN3 is not set
7508 # CONFIG_MIPS_PB1550 is not set
7509 +# CONFIG_MIPS_HYDROGEN3 is not set
7510 # CONFIG_MIPS_XXS1500 is not set
7511 # CONFIG_MIPS_MTX1 is not set
7512 # CONFIG_COGENT_CSB250 is not set
7513 @@ -209,9 +209,7 @@
7514 # CONFIG_MTD_BOSPORUS is not set
7515 # CONFIG_MTD_XXS1500 is not set
7516 # CONFIG_MTD_MTX1 is not set
7517 -# CONFIG_MTD_DB1X00 is not set
7518 # CONFIG_MTD_PB1550 is not set
7519 -# CONFIG_MTD_HYDROGEN3 is not set
7520 CONFIG_MTD_MIRAGE=y
7521 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7522 # CONFIG_MTD_OCELOT is not set
7523 @@ -230,7 +228,6 @@
7524 #
7525 # Disk-On-Chip Device Drivers
7526 #
7527 -# CONFIG_MTD_DOC1000 is not set
7528 # CONFIG_MTD_DOC2000 is not set
7529 # CONFIG_MTD_DOC2001 is not set
7530 # CONFIG_MTD_DOCPROBE is not set
7531 @@ -335,11 +332,6 @@
7532 #
7533 # CONFIG_IPX is not set
7534 # CONFIG_ATALK is not set
7535 -
7536 -#
7537 -# Appletalk devices
7538 -#
7539 -# CONFIG_DEV_APPLETALK is not set
7540 # CONFIG_DECNET is not set
7541 # CONFIG_BRIDGE is not set
7542 # CONFIG_X25 is not set
7543 @@ -560,7 +552,6 @@
7544 # CONFIG_AU1X00_USB_TTY is not set
7545 # CONFIG_AU1X00_USB_RAW is not set
7546 # CONFIG_TXX927_SERIAL is not set
7547 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7548 CONFIG_UNIX98_PTYS=y
7549 CONFIG_UNIX98_PTY_COUNT=256
7550
7551 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-mpc30x linux-2.4.32-rc1.mips/arch/mips/defconfig-mpc30x
7552 --- linux-2.4.32-rc1/arch/mips/defconfig-mpc30x 2005-01-19 15:09:28.000000000 +0100
7553 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-mpc30x 2005-03-18 13:13:21.000000000 +0100
7554 @@ -30,8 +30,8 @@
7555 # CONFIG_MIPS_PB1000 is not set
7556 # CONFIG_MIPS_PB1100 is not set
7557 # CONFIG_MIPS_PB1500 is not set
7558 -# CONFIG_MIPS_HYDROGEN3 is not set
7559 # CONFIG_MIPS_PB1550 is not set
7560 +# CONFIG_MIPS_HYDROGEN3 is not set
7561 # CONFIG_MIPS_XXS1500 is not set
7562 # CONFIG_MIPS_MTX1 is not set
7563 # CONFIG_COGENT_CSB250 is not set
7564 @@ -228,11 +228,6 @@
7565 #
7566 # CONFIG_IPX is not set
7567 # CONFIG_ATALK is not set
7568 -
7569 -#
7570 -# Appletalk devices
7571 -#
7572 -# CONFIG_DEV_APPLETALK is not set
7573 # CONFIG_DECNET is not set
7574 # CONFIG_BRIDGE is not set
7575 # CONFIG_X25 is not set
7576 @@ -400,7 +395,6 @@
7577 CONFIG_SERIAL_CONSOLE=y
7578 # CONFIG_SERIAL_EXTENDED is not set
7579 # CONFIG_SERIAL_NONSTANDARD is not set
7580 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7581 # CONFIG_VR41XX_KIU is not set
7582 CONFIG_UNIX98_PTYS=y
7583 CONFIG_UNIX98_PTY_COUNT=256
7584 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-mtx-1 linux-2.4.32-rc1.mips/arch/mips/defconfig-mtx-1
7585 --- linux-2.4.32-rc1/arch/mips/defconfig-mtx-1 2005-01-19 15:09:28.000000000 +0100
7586 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-mtx-1 2005-03-18 13:13:21.000000000 +0100
7587 @@ -30,8 +30,8 @@
7588 # CONFIG_MIPS_PB1000 is not set
7589 # CONFIG_MIPS_PB1100 is not set
7590 # CONFIG_MIPS_PB1500 is not set
7591 -# CONFIG_MIPS_HYDROGEN3 is not set
7592 # CONFIG_MIPS_PB1550 is not set
7593 +# CONFIG_MIPS_HYDROGEN3 is not set
7594 # CONFIG_MIPS_XXS1500 is not set
7595 CONFIG_MIPS_MTX1=y
7596 # CONFIG_COGENT_CSB250 is not set
7597 @@ -193,9 +193,7 @@
7598 # CONFIG_MTD_BOSPORUS is not set
7599 # CONFIG_MTD_XXS1500 is not set
7600 CONFIG_MTD_MTX1=y
7601 -# CONFIG_MTD_DB1X00 is not set
7602 # CONFIG_MTD_PB1550 is not set
7603 -# CONFIG_MTD_HYDROGEN3 is not set
7604 # CONFIG_MTD_MIRAGE is not set
7605 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7606 # CONFIG_MTD_OCELOT is not set
7607 @@ -214,7 +212,6 @@
7608 #
7609 # Disk-On-Chip Device Drivers
7610 #
7611 -# CONFIG_MTD_DOC1000 is not set
7612 # CONFIG_MTD_DOC2000 is not set
7613 # CONFIG_MTD_DOC2001 is not set
7614 # CONFIG_MTD_DOCPROBE is not set
7615 @@ -371,11 +368,6 @@
7616 #
7617 # CONFIG_IPX is not set
7618 # CONFIG_ATALK is not set
7619 -
7620 -#
7621 -# Appletalk devices
7622 -#
7623 -# CONFIG_DEV_APPLETALK is not set
7624 # CONFIG_DECNET is not set
7625 CONFIG_BRIDGE=m
7626 # CONFIG_X25 is not set
7627 @@ -479,9 +471,11 @@
7628 # CONFIG_SCSI_MEGARAID is not set
7629 # CONFIG_SCSI_MEGARAID2 is not set
7630 # CONFIG_SCSI_SATA is not set
7631 +# CONFIG_SCSI_SATA_AHCI is not set
7632 # CONFIG_SCSI_SATA_SVW is not set
7633 # CONFIG_SCSI_ATA_PIIX is not set
7634 # CONFIG_SCSI_SATA_NV is not set
7635 +# CONFIG_SCSI_SATA_QSTOR is not set
7636 # CONFIG_SCSI_SATA_PROMISE is not set
7637 # CONFIG_SCSI_SATA_SX4 is not set
7638 # CONFIG_SCSI_SATA_SIL is not set
7639 @@ -700,7 +694,6 @@
7640 # CONFIG_AU1X00_USB_TTY is not set
7641 # CONFIG_AU1X00_USB_RAW is not set
7642 # CONFIG_TXX927_SERIAL is not set
7643 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7644 CONFIG_UNIX98_PTYS=y
7645 CONFIG_UNIX98_PTY_COUNT=256
7646
7647 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-nino linux-2.4.32-rc1.mips/arch/mips/defconfig-nino
7648 --- linux-2.4.32-rc1/arch/mips/defconfig-nino 2005-01-19 15:09:28.000000000 +0100
7649 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-nino 2005-03-18 13:13:21.000000000 +0100
7650 @@ -30,8 +30,8 @@
7651 # CONFIG_MIPS_PB1000 is not set
7652 # CONFIG_MIPS_PB1100 is not set
7653 # CONFIG_MIPS_PB1500 is not set
7654 -# CONFIG_MIPS_HYDROGEN3 is not set
7655 # CONFIG_MIPS_PB1550 is not set
7656 +# CONFIG_MIPS_HYDROGEN3 is not set
7657 # CONFIG_MIPS_XXS1500 is not set
7658 # CONFIG_MIPS_MTX1 is not set
7659 # CONFIG_COGENT_CSB250 is not set
7660 @@ -226,11 +226,6 @@
7661 #
7662 # CONFIG_IPX is not set
7663 # CONFIG_ATALK is not set
7664 -
7665 -#
7666 -# Appletalk devices
7667 -#
7668 -# CONFIG_DEV_APPLETALK is not set
7669 # CONFIG_DECNET is not set
7670 # CONFIG_BRIDGE is not set
7671 # CONFIG_X25 is not set
7672 @@ -339,7 +334,6 @@
7673 # CONFIG_SERIAL_TXX9 is not set
7674 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7675 # CONFIG_TXX927_SERIAL is not set
7676 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7677 # CONFIG_UNIX98_PTYS is not set
7678
7679 #
7680 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ocelot linux-2.4.32-rc1.mips/arch/mips/defconfig-ocelot
7681 --- linux-2.4.32-rc1/arch/mips/defconfig-ocelot 2005-01-19 15:09:28.000000000 +0100
7682 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ocelot 2005-03-18 13:13:21.000000000 +0100
7683 @@ -28,8 +28,8 @@
7684 # CONFIG_MIPS_PB1000 is not set
7685 # CONFIG_MIPS_PB1100 is not set
7686 # CONFIG_MIPS_PB1500 is not set
7687 -# CONFIG_MIPS_HYDROGEN3 is not set
7688 # CONFIG_MIPS_PB1550 is not set
7689 +# CONFIG_MIPS_HYDROGEN3 is not set
7690 # CONFIG_MIPS_XXS1500 is not set
7691 # CONFIG_MIPS_MTX1 is not set
7692 # CONFIG_COGENT_CSB250 is not set
7693 @@ -194,9 +194,7 @@
7694 # CONFIG_MTD_BOSPORUS is not set
7695 # CONFIG_MTD_XXS1500 is not set
7696 # CONFIG_MTD_MTX1 is not set
7697 -# CONFIG_MTD_DB1X00 is not set
7698 # CONFIG_MTD_PB1550 is not set
7699 -# CONFIG_MTD_HYDROGEN3 is not set
7700 # CONFIG_MTD_MIRAGE is not set
7701 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7702 CONFIG_MTD_OCELOT=y
7703 @@ -215,7 +213,6 @@
7704 #
7705 # Disk-On-Chip Device Drivers
7706 #
7707 -# CONFIG_MTD_DOC1000 is not set
7708 CONFIG_MTD_DOC2000=y
7709 # CONFIG_MTD_DOC2001 is not set
7710 CONFIG_MTD_DOCPROBE=y
7711 @@ -307,11 +304,6 @@
7712 #
7713 # CONFIG_IPX is not set
7714 # CONFIG_ATALK is not set
7715 -
7716 -#
7717 -# Appletalk devices
7718 -#
7719 -# CONFIG_DEV_APPLETALK is not set
7720 # CONFIG_DECNET is not set
7721 # CONFIG_BRIDGE is not set
7722 # CONFIG_X25 is not set
7723 @@ -513,7 +505,6 @@
7724 CONFIG_SERIAL_CONSOLE=y
7725 # CONFIG_SERIAL_EXTENDED is not set
7726 # CONFIG_SERIAL_NONSTANDARD is not set
7727 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7728 CONFIG_UNIX98_PTYS=y
7729 CONFIG_UNIX98_PTY_COUNT=256
7730
7731 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-osprey linux-2.4.32-rc1.mips/arch/mips/defconfig-osprey
7732 --- linux-2.4.32-rc1/arch/mips/defconfig-osprey 2005-01-19 15:09:28.000000000 +0100
7733 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-osprey 2005-03-18 13:13:21.000000000 +0100
7734 @@ -30,8 +30,8 @@
7735 # CONFIG_MIPS_PB1000 is not set
7736 # CONFIG_MIPS_PB1100 is not set
7737 # CONFIG_MIPS_PB1500 is not set
7738 -# CONFIG_MIPS_HYDROGEN3 is not set
7739 # CONFIG_MIPS_PB1550 is not set
7740 +# CONFIG_MIPS_HYDROGEN3 is not set
7741 # CONFIG_MIPS_XXS1500 is not set
7742 # CONFIG_MIPS_MTX1 is not set
7743 # CONFIG_COGENT_CSB250 is not set
7744 @@ -227,11 +227,6 @@
7745 #
7746 # CONFIG_IPX is not set
7747 # CONFIG_ATALK is not set
7748 -
7749 -#
7750 -# Appletalk devices
7751 -#
7752 -# CONFIG_DEV_APPLETALK is not set
7753 # CONFIG_DECNET is not set
7754 # CONFIG_BRIDGE is not set
7755 # CONFIG_X25 is not set
7756 @@ -388,7 +383,6 @@
7757 # CONFIG_SERIAL_MULTIPORT is not set
7758 # CONFIG_HUB6 is not set
7759 # CONFIG_SERIAL_NONSTANDARD is not set
7760 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7761 # CONFIG_VR41XX_KIU is not set
7762 CONFIG_UNIX98_PTYS=y
7763 CONFIG_UNIX98_PTY_COUNT=256
7764 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-pb1000 linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1000
7765 --- linux-2.4.32-rc1/arch/mips/defconfig-pb1000 2005-01-19 15:09:28.000000000 +0100
7766 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1000 2005-03-18 13:13:21.000000000 +0100
7767 @@ -30,8 +30,8 @@
7768 CONFIG_MIPS_PB1000=y
7769 # CONFIG_MIPS_PB1100 is not set
7770 # CONFIG_MIPS_PB1500 is not set
7771 -# CONFIG_MIPS_HYDROGEN3 is not set
7772 # CONFIG_MIPS_PB1550 is not set
7773 +# CONFIG_MIPS_HYDROGEN3 is not set
7774 # CONFIG_MIPS_XXS1500 is not set
7775 # CONFIG_MIPS_MTX1 is not set
7776 # CONFIG_COGENT_CSB250 is not set
7777 @@ -215,9 +215,7 @@
7778 # CONFIG_MTD_BOSPORUS is not set
7779 # CONFIG_MTD_XXS1500 is not set
7780 # CONFIG_MTD_MTX1 is not set
7781 -# CONFIG_MTD_DB1X00 is not set
7782 # CONFIG_MTD_PB1550 is not set
7783 -# CONFIG_MTD_HYDROGEN3 is not set
7784 # CONFIG_MTD_MIRAGE is not set
7785 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7786 # CONFIG_MTD_OCELOT is not set
7787 @@ -236,7 +234,6 @@
7788 #
7789 # Disk-On-Chip Device Drivers
7790 #
7791 -# CONFIG_MTD_DOC1000 is not set
7792 # CONFIG_MTD_DOC2000 is not set
7793 # CONFIG_MTD_DOC2001 is not set
7794 # CONFIG_MTD_DOCPROBE is not set
7795 @@ -324,11 +321,6 @@
7796 #
7797 # CONFIG_IPX is not set
7798 # CONFIG_ATALK is not set
7799 -
7800 -#
7801 -# Appletalk devices
7802 -#
7803 -# CONFIG_DEV_APPLETALK is not set
7804 # CONFIG_DECNET is not set
7805 # CONFIG_BRIDGE is not set
7806 # CONFIG_X25 is not set
7807 @@ -622,7 +614,6 @@
7808 # CONFIG_AU1X00_USB_TTY is not set
7809 # CONFIG_AU1X00_USB_RAW is not set
7810 # CONFIG_TXX927_SERIAL is not set
7811 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7812 CONFIG_UNIX98_PTYS=y
7813 CONFIG_UNIX98_PTY_COUNT=256
7814
7815 @@ -707,7 +698,7 @@
7816 #
7817 # CONFIG_PCMCIA_SERIAL_CS is not set
7818 # CONFIG_SYNCLINK_CS is not set
7819 -CONFIG_AU1X00_GPIO=m
7820 +CONFIG_AU1X00_GPIO=y
7821 # CONFIG_TS_AU1X00_ADS7846 is not set
7822
7823 #
7824 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-pb1100 linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1100
7825 --- linux-2.4.32-rc1/arch/mips/defconfig-pb1100 2005-01-19 15:09:28.000000000 +0100
7826 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1100 2005-03-18 13:13:21.000000000 +0100
7827 @@ -30,8 +30,8 @@
7828 # CONFIG_MIPS_PB1000 is not set
7829 CONFIG_MIPS_PB1100=y
7830 # CONFIG_MIPS_PB1500 is not set
7831 -# CONFIG_MIPS_HYDROGEN3 is not set
7832 # CONFIG_MIPS_PB1550 is not set
7833 +# CONFIG_MIPS_HYDROGEN3 is not set
7834 # CONFIG_MIPS_XXS1500 is not set
7835 # CONFIG_MIPS_MTX1 is not set
7836 # CONFIG_COGENT_CSB250 is not set
7837 @@ -198,9 +198,7 @@
7838 # CONFIG_MTD_MTX1 is not set
7839 CONFIG_MTD_PB1500_BOOT=y
7840 CONFIG_MTD_PB1500_USER=y
7841 -# CONFIG_MTD_DB1X00 is not set
7842 # CONFIG_MTD_PB1550 is not set
7843 -# CONFIG_MTD_HYDROGEN3 is not set
7844 # CONFIG_MTD_MIRAGE is not set
7845 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7846 # CONFIG_MTD_OCELOT is not set
7847 @@ -219,7 +217,6 @@
7848 #
7849 # Disk-On-Chip Device Drivers
7850 #
7851 -# CONFIG_MTD_DOC1000 is not set
7852 # CONFIG_MTD_DOC2000 is not set
7853 # CONFIG_MTD_DOC2001 is not set
7854 # CONFIG_MTD_DOCPROBE is not set
7855 @@ -324,11 +321,6 @@
7856 #
7857 # CONFIG_IPX is not set
7858 # CONFIG_ATALK is not set
7859 -
7860 -#
7861 -# Appletalk devices
7862 -#
7863 -# CONFIG_DEV_APPLETALK is not set
7864 # CONFIG_DECNET is not set
7865 # CONFIG_BRIDGE is not set
7866 # CONFIG_X25 is not set
7867 @@ -613,7 +605,6 @@
7868 # CONFIG_AU1X00_USB_TTY is not set
7869 # CONFIG_AU1X00_USB_RAW is not set
7870 # CONFIG_TXX927_SERIAL is not set
7871 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7872 CONFIG_UNIX98_PTYS=y
7873 CONFIG_UNIX98_PTY_COUNT=256
7874
7875 @@ -859,6 +850,7 @@
7876 # CONFIG_FB_PM2 is not set
7877 # CONFIG_FB_PM3 is not set
7878 # CONFIG_FB_CYBER2000 is not set
7879 +CONFIG_FB_AU1100=y
7880 # CONFIG_FB_MATROX is not set
7881 # CONFIG_FB_ATY is not set
7882 # CONFIG_FB_RADEON is not set
7883 @@ -870,7 +862,6 @@
7884 # CONFIG_FB_VOODOO1 is not set
7885 # CONFIG_FB_TRIDENT is not set
7886 # CONFIG_FB_E1356 is not set
7887 -CONFIG_FB_AU1100=y
7888 # CONFIG_FB_IT8181 is not set
7889 # CONFIG_FB_VIRTUAL is not set
7890 CONFIG_FBCON_ADVANCED=y
7891 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-pb1200 linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1200
7892 --- linux-2.4.32-rc1/arch/mips/defconfig-pb1200 1970-01-01 01:00:00.000000000 +0100
7893 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1200 2005-03-18 13:13:21.000000000 +0100
7894 @@ -0,0 +1,1060 @@
7895 +#
7896 +# Automatically generated make config: don't edit
7897 +#
7898 +CONFIG_MIPS=y
7899 +CONFIG_MIPS32=y
7900 +# CONFIG_MIPS64 is not set
7901 +
7902 +#
7903 +# Code maturity level options
7904 +#
7905 +CONFIG_EXPERIMENTAL=y
7906 +
7907 +#
7908 +# Loadable module support
7909 +#
7910 +CONFIG_MODULES=y
7911 +# CONFIG_MODVERSIONS is not set
7912 +CONFIG_KMOD=y
7913 +
7914 +#
7915 +# Machine selection
7916 +#
7917 +# CONFIG_ACER_PICA_61 is not set
7918 +# CONFIG_MIPS_BOSPORUS is not set
7919 +# CONFIG_MIPS_MIRAGE is not set
7920 +# CONFIG_MIPS_DB1000 is not set
7921 +# CONFIG_MIPS_DB1100 is not set
7922 +# CONFIG_MIPS_DB1500 is not set
7923 +# CONFIG_MIPS_DB1550 is not set
7924 +# CONFIG_MIPS_PB1000 is not set
7925 +# CONFIG_MIPS_PB1100 is not set
7926 +# CONFIG_MIPS_PB1500 is not set
7927 +# CONFIG_MIPS_PB1550 is not set
7928 +# CONFIG_MIPS_HYDROGEN3 is not set
7929 +# CONFIG_MIPS_XXS1500 is not set
7930 +# CONFIG_MIPS_MTX1 is not set
7931 +# CONFIG_COGENT_CSB250 is not set
7932 +# CONFIG_BAGET_MIPS is not set
7933 +# CONFIG_CASIO_E55 is not set
7934 +# CONFIG_MIPS_COBALT is not set
7935 +# CONFIG_DECSTATION is not set
7936 +# CONFIG_MIPS_EV64120 is not set
7937 +# CONFIG_MIPS_EV96100 is not set
7938 +# CONFIG_MIPS_IVR is not set
7939 +# CONFIG_HP_LASERJET is not set
7940 +# CONFIG_IBM_WORKPAD is not set
7941 +# CONFIG_LASAT is not set
7942 +# CONFIG_MIPS_ITE8172 is not set
7943 +# CONFIG_MIPS_ATLAS is not set
7944 +# CONFIG_MIPS_MAGNUM_4000 is not set
7945 +# CONFIG_MIPS_MALTA is not set
7946 +# CONFIG_MIPS_SEAD is not set
7947 +# CONFIG_MOMENCO_OCELOT is not set
7948 +# CONFIG_MOMENCO_OCELOT_G is not set
7949 +# CONFIG_MOMENCO_OCELOT_C is not set
7950 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
7951 +# CONFIG_PMC_BIG_SUR is not set
7952 +# CONFIG_PMC_STRETCH is not set
7953 +# CONFIG_PMC_YOSEMITE is not set
7954 +# CONFIG_DDB5074 is not set
7955 +# CONFIG_DDB5476 is not set
7956 +# CONFIG_DDB5477 is not set
7957 +# CONFIG_NEC_OSPREY is not set
7958 +# CONFIG_NEC_EAGLE is not set
7959 +# CONFIG_OLIVETTI_M700 is not set
7960 +# CONFIG_NINO is not set
7961 +# CONFIG_SGI_IP22 is not set
7962 +# CONFIG_SGI_IP27 is not set
7963 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
7964 +# CONFIG_SNI_RM200_PCI is not set
7965 +# CONFIG_TANBAC_TB0226 is not set
7966 +# CONFIG_TANBAC_TB0229 is not set
7967 +# CONFIG_TOSHIBA_JMR3927 is not set
7968 +# CONFIG_TOSHIBA_RBTX4927 is not set
7969 +# CONFIG_VICTOR_MPC30X is not set
7970 +# CONFIG_ZAO_CAPCELLA is not set
7971 +# CONFIG_HIGHMEM is not set
7972 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
7973 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
7974 +CONFIG_SOC_AU1X00=y
7975 +CONFIG_SOC_AU1200=y
7976 +CONFIG_NONCOHERENT_IO=y
7977 +CONFIG_PC_KEYB=y
7978 +# CONFIG_MIPS_AU1000 is not set
7979 +
7980 +#
7981 +# CPU selection
7982 +#
7983 +CONFIG_CPU_MIPS32=y
7984 +# CONFIG_CPU_MIPS64 is not set
7985 +# CONFIG_CPU_R3000 is not set
7986 +# CONFIG_CPU_TX39XX is not set
7987 +# CONFIG_CPU_VR41XX is not set
7988 +# CONFIG_CPU_R4300 is not set
7989 +# CONFIG_CPU_R4X00 is not set
7990 +# CONFIG_CPU_TX49XX is not set
7991 +# CONFIG_CPU_R5000 is not set
7992 +# CONFIG_CPU_R5432 is not set
7993 +# CONFIG_CPU_R6000 is not set
7994 +# CONFIG_CPU_NEVADA is not set
7995 +# CONFIG_CPU_R8000 is not set
7996 +# CONFIG_CPU_R10000 is not set
7997 +# CONFIG_CPU_RM7000 is not set
7998 +# CONFIG_CPU_RM9000 is not set
7999 +# CONFIG_CPU_SB1 is not set
8000 +CONFIG_PAGE_SIZE_4KB=y
8001 +# CONFIG_PAGE_SIZE_16KB is not set
8002 +# CONFIG_PAGE_SIZE_64KB is not set
8003 +CONFIG_CPU_HAS_PREFETCH=y
8004 +# CONFIG_VTAG_ICACHE is not set
8005 +CONFIG_64BIT_PHYS_ADDR=y
8006 +# CONFIG_CPU_ADVANCED is not set
8007 +CONFIG_CPU_HAS_LLSC=y
8008 +# CONFIG_CPU_HAS_LLDSCD is not set
8009 +# CONFIG_CPU_HAS_WB is not set
8010 +CONFIG_CPU_HAS_SYNC=y
8011 +
8012 +#
8013 +# General setup
8014 +#
8015 +CONFIG_CPU_LITTLE_ENDIAN=y
8016 +# CONFIG_BUILD_ELF64 is not set
8017 +CONFIG_NET=y
8018 +CONFIG_PCI=y
8019 +CONFIG_PCI_NEW=y
8020 +CONFIG_PCI_AUTO=y
8021 +# CONFIG_PCI_NAMES is not set
8022 +# CONFIG_ISA is not set
8023 +# CONFIG_TC is not set
8024 +# CONFIG_MCA is not set
8025 +# CONFIG_SBUS is not set
8026 +CONFIG_HOTPLUG=y
8027 +
8028 +#
8029 +# PCMCIA/CardBus support
8030 +#
8031 +CONFIG_PCMCIA=m
8032 +# CONFIG_CARDBUS is not set
8033 +# CONFIG_TCIC is not set
8034 +# CONFIG_I82092 is not set
8035 +# CONFIG_I82365 is not set
8036 +CONFIG_PCMCIA_AU1X00=m
8037 +
8038 +#
8039 +# PCI Hotplug Support
8040 +#
8041 +# CONFIG_HOTPLUG_PCI is not set
8042 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
8043 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
8044 +# CONFIG_HOTPLUG_PCI_SHPC is not set
8045 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
8046 +# CONFIG_HOTPLUG_PCI_PCIE is not set
8047 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
8048 +CONFIG_SYSVIPC=y
8049 +# CONFIG_BSD_PROCESS_ACCT is not set
8050 +CONFIG_SYSCTL=y
8051 +CONFIG_KCORE_ELF=y
8052 +# CONFIG_KCORE_AOUT is not set
8053 +# CONFIG_BINFMT_AOUT is not set
8054 +CONFIG_BINFMT_ELF=y
8055 +# CONFIG_MIPS32_COMPAT is not set
8056 +# CONFIG_MIPS32_O32 is not set
8057 +# CONFIG_MIPS32_N32 is not set
8058 +# CONFIG_BINFMT_ELF32 is not set
8059 +# CONFIG_BINFMT_MISC is not set
8060 +# CONFIG_OOM_KILLER is not set
8061 +CONFIG_CMDLINE_BOOL=y
8062 +CONFIG_CMDLINE="mem=96M"
8063 +# CONFIG_PM is not set
8064 +
8065 +#
8066 +# Memory Technology Devices (MTD)
8067 +#
8068 +# CONFIG_MTD is not set
8069 +
8070 +#
8071 +# Parallel port support
8072 +#
8073 +# CONFIG_PARPORT is not set
8074 +
8075 +#
8076 +# Plug and Play configuration
8077 +#
8078 +# CONFIG_PNP is not set
8079 +# CONFIG_ISAPNP is not set
8080 +
8081 +#
8082 +# Block devices
8083 +#
8084 +# CONFIG_BLK_DEV_FD is not set
8085 +# CONFIG_BLK_DEV_XD is not set
8086 +# CONFIG_PARIDE is not set
8087 +# CONFIG_BLK_CPQ_DA is not set
8088 +# CONFIG_BLK_CPQ_CISS_DA is not set
8089 +# CONFIG_CISS_SCSI_TAPE is not set
8090 +# CONFIG_CISS_MONITOR_THREAD is not set
8091 +# CONFIG_BLK_DEV_DAC960 is not set
8092 +# CONFIG_BLK_DEV_UMEM is not set
8093 +# CONFIG_BLK_DEV_SX8 is not set
8094 +CONFIG_BLK_DEV_LOOP=y
8095 +# CONFIG_BLK_DEV_NBD is not set
8096 +# CONFIG_BLK_DEV_RAM is not set
8097 +# CONFIG_BLK_DEV_INITRD is not set
8098 +# CONFIG_BLK_STATS is not set
8099 +
8100 +#
8101 +# Multi-device support (RAID and LVM)
8102 +#
8103 +# CONFIG_MD is not set
8104 +# CONFIG_BLK_DEV_MD is not set
8105 +# CONFIG_MD_LINEAR is not set
8106 +# CONFIG_MD_RAID0 is not set
8107 +# CONFIG_MD_RAID1 is not set
8108 +# CONFIG_MD_RAID5 is not set
8109 +# CONFIG_MD_MULTIPATH is not set
8110 +# CONFIG_BLK_DEV_LVM is not set
8111 +
8112 +#
8113 +# Networking options
8114 +#
8115 +CONFIG_PACKET=y
8116 +# CONFIG_PACKET_MMAP is not set
8117 +# CONFIG_NETLINK_DEV is not set
8118 +CONFIG_NETFILTER=y
8119 +# CONFIG_NETFILTER_DEBUG is not set
8120 +CONFIG_FILTER=y
8121 +CONFIG_UNIX=y
8122 +CONFIG_INET=y
8123 +CONFIG_IP_MULTICAST=y
8124 +# CONFIG_IP_ADVANCED_ROUTER is not set
8125 +CONFIG_IP_PNP=y
8126 +# CONFIG_IP_PNP_DHCP is not set
8127 +CONFIG_IP_PNP_BOOTP=y
8128 +# CONFIG_IP_PNP_RARP is not set
8129 +# CONFIG_NET_IPIP is not set
8130 +# CONFIG_NET_IPGRE is not set
8131 +# CONFIG_IP_MROUTE is not set
8132 +# CONFIG_ARPD is not set
8133 +# CONFIG_INET_ECN is not set
8134 +# CONFIG_SYN_COOKIES is not set
8135 +
8136 +#
8137 +# IP: Netfilter Configuration
8138 +#
8139 +# CONFIG_IP_NF_CONNTRACK is not set
8140 +# CONFIG_IP_NF_QUEUE is not set
8141 +# CONFIG_IP_NF_IPTABLES is not set
8142 +# CONFIG_IP_NF_ARPTABLES is not set
8143 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
8144 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
8145 +
8146 +#
8147 +# IP: Virtual Server Configuration
8148 +#
8149 +# CONFIG_IP_VS is not set
8150 +# CONFIG_IPV6 is not set
8151 +# CONFIG_KHTTPD is not set
8152 +
8153 +#
8154 +# SCTP Configuration (EXPERIMENTAL)
8155 +#
8156 +# CONFIG_IP_SCTP is not set
8157 +# CONFIG_ATM is not set
8158 +# CONFIG_VLAN_8021Q is not set
8159 +
8160 +#
8161 +#
8162 +#
8163 +# CONFIG_IPX is not set
8164 +# CONFIG_ATALK is not set
8165 +# CONFIG_DECNET is not set
8166 +# CONFIG_BRIDGE is not set
8167 +# CONFIG_X25 is not set
8168 +# CONFIG_LAPB is not set
8169 +# CONFIG_LLC is not set
8170 +# CONFIG_NET_DIVERT is not set
8171 +# CONFIG_ECONET is not set
8172 +# CONFIG_WAN_ROUTER is not set
8173 +# CONFIG_NET_FASTROUTE is not set
8174 +# CONFIG_NET_HW_FLOWCONTROL is not set
8175 +
8176 +#
8177 +# QoS and/or fair queueing
8178 +#
8179 +# CONFIG_NET_SCHED is not set
8180 +
8181 +#
8182 +# Network testing
8183 +#
8184 +# CONFIG_NET_PKTGEN is not set
8185 +
8186 +#
8187 +# Telephony Support
8188 +#
8189 +# CONFIG_PHONE is not set
8190 +# CONFIG_PHONE_IXJ is not set
8191 +# CONFIG_PHONE_IXJ_PCMCIA is not set
8192 +
8193 +#
8194 +# ATA/IDE/MFM/RLL support
8195 +#
8196 +CONFIG_IDE=y
8197 +
8198 +#
8199 +# IDE, ATA and ATAPI Block devices
8200 +#
8201 +CONFIG_BLK_DEV_IDE=y
8202 +
8203 +#
8204 +# Please see Documentation/ide.txt for help/info on IDE drives
8205 +#
8206 +# CONFIG_BLK_DEV_HD_IDE is not set
8207 +# CONFIG_BLK_DEV_HD is not set
8208 +# CONFIG_BLK_DEV_IDE_SATA is not set
8209 +CONFIG_BLK_DEV_IDEDISK=y
8210 +CONFIG_IDEDISK_MULTI_MODE=y
8211 +CONFIG_IDEDISK_STROKE=y
8212 +CONFIG_BLK_DEV_IDECS=m
8213 +# CONFIG_BLK_DEV_DELKIN is not set
8214 +# CONFIG_BLK_DEV_IDECD is not set
8215 +# CONFIG_BLK_DEV_IDETAPE is not set
8216 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
8217 +# CONFIG_BLK_DEV_IDESCSI is not set
8218 +# CONFIG_IDE_TASK_IOCTL is not set
8219 +
8220 +#
8221 +# IDE chipset support/bugfixes
8222 +#
8223 +# CONFIG_BLK_DEV_CMD640 is not set
8224 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
8225 +# CONFIG_BLK_DEV_ISAPNP is not set
8226 +# CONFIG_BLK_DEV_IDEPCI is not set
8227 +# CONFIG_IDE_CHIPSETS is not set
8228 +# CONFIG_IDEDMA_AUTO is not set
8229 +# CONFIG_DMA_NONPCI is not set
8230 +# CONFIG_BLK_DEV_ATARAID is not set
8231 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
8232 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
8233 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
8234 +# CONFIG_BLK_DEV_ATARAID_SII is not set
8235 +
8236 +#
8237 +# SCSI support
8238 +#
8239 +CONFIG_SCSI=y
8240 +
8241 +#
8242 +# SCSI support type (disk, tape, CD-ROM)
8243 +#
8244 +CONFIG_BLK_DEV_SD=y
8245 +CONFIG_SD_EXTRA_DEVS=40
8246 +CONFIG_CHR_DEV_ST=y
8247 +# CONFIG_CHR_DEV_OSST is not set
8248 +CONFIG_BLK_DEV_SR=y
8249 +# CONFIG_BLK_DEV_SR_VENDOR is not set
8250 +CONFIG_SR_EXTRA_DEVS=2
8251 +# CONFIG_CHR_DEV_SG is not set
8252 +
8253 +#
8254 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
8255 +#
8256 +# CONFIG_SCSI_DEBUG_QUEUES is not set
8257 +# CONFIG_SCSI_MULTI_LUN is not set
8258 +CONFIG_SCSI_CONSTANTS=y
8259 +# CONFIG_SCSI_LOGGING is not set
8260 +
8261 +#
8262 +# SCSI low-level drivers
8263 +#
8264 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
8265 +# CONFIG_SCSI_7000FASST is not set
8266 +# CONFIG_SCSI_ACARD is not set
8267 +# CONFIG_SCSI_AHA152X is not set
8268 +# CONFIG_SCSI_AHA1542 is not set
8269 +# CONFIG_SCSI_AHA1740 is not set
8270 +# CONFIG_SCSI_AACRAID is not set
8271 +# CONFIG_SCSI_AIC7XXX is not set
8272 +# CONFIG_SCSI_AIC79XX is not set
8273 +# CONFIG_SCSI_AIC7XXX_OLD is not set
8274 +# CONFIG_SCSI_DPT_I2O is not set
8275 +# CONFIG_SCSI_ADVANSYS is not set
8276 +# CONFIG_SCSI_IN2000 is not set
8277 +# CONFIG_SCSI_AM53C974 is not set
8278 +# CONFIG_SCSI_MEGARAID is not set
8279 +# CONFIG_SCSI_MEGARAID2 is not set
8280 +# CONFIG_SCSI_SATA is not set
8281 +# CONFIG_SCSI_SATA_AHCI is not set
8282 +# CONFIG_SCSI_SATA_SVW is not set
8283 +# CONFIG_SCSI_ATA_PIIX is not set
8284 +# CONFIG_SCSI_SATA_NV is not set
8285 +# CONFIG_SCSI_SATA_QSTOR is not set
8286 +# CONFIG_SCSI_SATA_PROMISE is not set
8287 +# CONFIG_SCSI_SATA_SX4 is not set
8288 +# CONFIG_SCSI_SATA_SIL is not set
8289 +# CONFIG_SCSI_SATA_SIS is not set
8290 +# CONFIG_SCSI_SATA_ULI is not set
8291 +# CONFIG_SCSI_SATA_VIA is not set
8292 +# CONFIG_SCSI_SATA_VITESSE is not set
8293 +# CONFIG_SCSI_BUSLOGIC is not set
8294 +# CONFIG_SCSI_CPQFCTS is not set
8295 +# CONFIG_SCSI_DMX3191D is not set
8296 +# CONFIG_SCSI_DTC3280 is not set
8297 +# CONFIG_SCSI_EATA is not set
8298 +# CONFIG_SCSI_EATA_DMA is not set
8299 +# CONFIG_SCSI_EATA_PIO is not set
8300 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
8301 +# CONFIG_SCSI_GDTH is not set
8302 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
8303 +# CONFIG_SCSI_INITIO is not set
8304 +# CONFIG_SCSI_INIA100 is not set
8305 +# CONFIG_SCSI_NCR53C406A is not set
8306 +# CONFIG_SCSI_NCR53C7xx is not set
8307 +# CONFIG_SCSI_SYM53C8XX_2 is not set
8308 +# CONFIG_SCSI_NCR53C8XX is not set
8309 +# CONFIG_SCSI_SYM53C8XX is not set
8310 +# CONFIG_SCSI_PAS16 is not set
8311 +# CONFIG_SCSI_PCI2000 is not set
8312 +# CONFIG_SCSI_PCI2220I is not set
8313 +# CONFIG_SCSI_PSI240I is not set
8314 +# CONFIG_SCSI_QLOGIC_FAS is not set
8315 +# CONFIG_SCSI_QLOGIC_ISP is not set
8316 +# CONFIG_SCSI_QLOGIC_FC is not set
8317 +# CONFIG_SCSI_QLOGIC_1280 is not set
8318 +# CONFIG_SCSI_SIM710 is not set
8319 +# CONFIG_SCSI_SYM53C416 is not set
8320 +# CONFIG_SCSI_DC390T is not set
8321 +# CONFIG_SCSI_T128 is not set
8322 +# CONFIG_SCSI_U14_34F is not set
8323 +# CONFIG_SCSI_NSP32 is not set
8324 +# CONFIG_SCSI_DEBUG is not set
8325 +
8326 +#
8327 +# PCMCIA SCSI adapter support
8328 +#
8329 +# CONFIG_SCSI_PCMCIA is not set
8330 +
8331 +#
8332 +# Fusion MPT device support
8333 +#
8334 +# CONFIG_FUSION is not set
8335 +# CONFIG_FUSION_BOOT is not set
8336 +# CONFIG_FUSION_ISENSE is not set
8337 +# CONFIG_FUSION_CTL is not set
8338 +# CONFIG_FUSION_LAN is not set
8339 +
8340 +#
8341 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
8342 +#
8343 +# CONFIG_IEEE1394 is not set
8344 +
8345 +#
8346 +# I2O device support
8347 +#
8348 +# CONFIG_I2O is not set
8349 +# CONFIG_I2O_PCI is not set
8350 +# CONFIG_I2O_BLOCK is not set
8351 +# CONFIG_I2O_LAN is not set
8352 +# CONFIG_I2O_SCSI is not set
8353 +# CONFIG_I2O_PROC is not set
8354 +
8355 +#
8356 +# Network device support
8357 +#
8358 +CONFIG_NETDEVICES=y
8359 +
8360 +#
8361 +# ARCnet devices
8362 +#
8363 +# CONFIG_ARCNET is not set
8364 +# CONFIG_DUMMY is not set
8365 +# CONFIG_BONDING is not set
8366 +# CONFIG_EQUALIZER is not set
8367 +# CONFIG_TUN is not set
8368 +# CONFIG_ETHERTAP is not set
8369 +
8370 +#
8371 +# Ethernet (10 or 100Mbit)
8372 +#
8373 +CONFIG_NET_ETHERNET=y
8374 +# CONFIG_MIPS_AU1X00_ENET is not set
8375 +# CONFIG_SUNLANCE is not set
8376 +# CONFIG_HAPPYMEAL is not set
8377 +# CONFIG_SUNBMAC is not set
8378 +# CONFIG_SUNQE is not set
8379 +# CONFIG_SUNGEM is not set
8380 +# CONFIG_NET_VENDOR_3COM is not set
8381 +# CONFIG_LANCE is not set
8382 +# CONFIG_NET_VENDOR_SMC is not set
8383 +# CONFIG_NET_VENDOR_RACAL is not set
8384 +# CONFIG_HP100 is not set
8385 +# CONFIG_NET_ISA is not set
8386 +# CONFIG_NET_PCI is not set
8387 +# CONFIG_NET_POCKET is not set
8388 +
8389 +#
8390 +# Ethernet (1000 Mbit)
8391 +#
8392 +# CONFIG_ACENIC is not set
8393 +# CONFIG_DL2K is not set
8394 +# CONFIG_E1000 is not set
8395 +# CONFIG_MYRI_SBUS is not set
8396 +# CONFIG_NS83820 is not set
8397 +# CONFIG_HAMACHI is not set
8398 +# CONFIG_YELLOWFIN is not set
8399 +# CONFIG_R8169 is not set
8400 +# CONFIG_SK98LIN is not set
8401 +# CONFIG_TIGON3 is not set
8402 +# CONFIG_FDDI is not set
8403 +# CONFIG_HIPPI is not set
8404 +# CONFIG_PLIP is not set
8405 +CONFIG_PPP=m
8406 +CONFIG_PPP_MULTILINK=y
8407 +# CONFIG_PPP_FILTER is not set
8408 +CONFIG_PPP_ASYNC=m
8409 +# CONFIG_PPP_SYNC_TTY is not set
8410 +CONFIG_PPP_DEFLATE=m
8411 +# CONFIG_PPP_BSDCOMP is not set
8412 +CONFIG_PPPOE=m
8413 +# CONFIG_SLIP is not set
8414 +
8415 +#
8416 +# Wireless LAN (non-hamradio)
8417 +#
8418 +# CONFIG_NET_RADIO is not set
8419 +
8420 +#
8421 +# Token Ring devices
8422 +#
8423 +# CONFIG_TR is not set
8424 +# CONFIG_NET_FC is not set
8425 +# CONFIG_RCPCI is not set
8426 +# CONFIG_SHAPER is not set
8427 +
8428 +#
8429 +# Wan interfaces
8430 +#
8431 +# CONFIG_WAN is not set
8432 +
8433 +#
8434 +# PCMCIA network device support
8435 +#
8436 +# CONFIG_NET_PCMCIA is not set
8437 +
8438 +#
8439 +# Amateur Radio support
8440 +#
8441 +# CONFIG_HAMRADIO is not set
8442 +
8443 +#
8444 +# IrDA (infrared) support
8445 +#
8446 +# CONFIG_IRDA is not set
8447 +
8448 +#
8449 +# ISDN subsystem
8450 +#
8451 +# CONFIG_ISDN is not set
8452 +
8453 +#
8454 +# Input core support
8455 +#
8456 +CONFIG_INPUT=y
8457 +CONFIG_INPUT_KEYBDEV=y
8458 +CONFIG_INPUT_MOUSEDEV=y
8459 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
8460 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
8461 +# CONFIG_INPUT_JOYDEV is not set
8462 +CONFIG_INPUT_EVDEV=y
8463 +# CONFIG_INPUT_UINPUT is not set
8464 +
8465 +#
8466 +# Character devices
8467 +#
8468 +CONFIG_VT=y
8469 +# CONFIG_VT_CONSOLE is not set
8470 +# CONFIG_SERIAL is not set
8471 +# CONFIG_SERIAL_EXTENDED is not set
8472 +CONFIG_SERIAL_NONSTANDARD=y
8473 +# CONFIG_COMPUTONE is not set
8474 +# CONFIG_ROCKETPORT is not set
8475 +# CONFIG_CYCLADES is not set
8476 +# CONFIG_DIGIEPCA is not set
8477 +# CONFIG_DIGI is not set
8478 +# CONFIG_ESPSERIAL is not set
8479 +# CONFIG_MOXA_INTELLIO is not set
8480 +# CONFIG_MOXA_SMARTIO is not set
8481 +# CONFIG_ISI is not set
8482 +# CONFIG_SYNCLINK is not set
8483 +# CONFIG_SYNCLINKMP is not set
8484 +# CONFIG_N_HDLC is not set
8485 +# CONFIG_RISCOM8 is not set
8486 +# CONFIG_SPECIALIX is not set
8487 +# CONFIG_SX is not set
8488 +# CONFIG_RIO is not set
8489 +# CONFIG_STALDRV is not set
8490 +# CONFIG_SERIAL_TX3912 is not set
8491 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
8492 +# CONFIG_SERIAL_TXX9 is not set
8493 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
8494 +CONFIG_AU1X00_UART=y
8495 +CONFIG_AU1X00_SERIAL_CONSOLE=y
8496 +# CONFIG_AU1X00_USB_TTY is not set
8497 +# CONFIG_AU1X00_USB_RAW is not set
8498 +# CONFIG_TXX927_SERIAL is not set
8499 +CONFIG_UNIX98_PTYS=y
8500 +CONFIG_UNIX98_PTY_COUNT=256
8501 +
8502 +#
8503 +# I2C support
8504 +#
8505 +CONFIG_I2C=y
8506 +# CONFIG_I2C_ALGOBIT is not set
8507 +# CONFIG_SCx200_ACB is not set
8508 +# CONFIG_I2C_ALGOPCF is not set
8509 +# CONFIG_I2C_CHARDEV is not set
8510 +CONFIG_I2C_PROC=y
8511 +
8512 +#
8513 +# Mice
8514 +#
8515 +# CONFIG_BUSMOUSE is not set
8516 +# CONFIG_MOUSE is not set
8517 +
8518 +#
8519 +# Joysticks
8520 +#
8521 +# CONFIG_INPUT_GAMEPORT is not set
8522 +# CONFIG_INPUT_NS558 is not set
8523 +# CONFIG_INPUT_LIGHTNING is not set
8524 +# CONFIG_INPUT_PCIGAME is not set
8525 +# CONFIG_INPUT_CS461X is not set
8526 +# CONFIG_INPUT_EMU10K1 is not set
8527 +# CONFIG_INPUT_SERIO is not set
8528 +# CONFIG_INPUT_SERPORT is not set
8529 +
8530 +#
8531 +# Joysticks
8532 +#
8533 +# CONFIG_INPUT_ANALOG is not set
8534 +# CONFIG_INPUT_A3D is not set
8535 +# CONFIG_INPUT_ADI is not set
8536 +# CONFIG_INPUT_COBRA is not set
8537 +# CONFIG_INPUT_GF2K is not set
8538 +# CONFIG_INPUT_GRIP is not set
8539 +# CONFIG_INPUT_INTERACT is not set
8540 +# CONFIG_INPUT_TMDC is not set
8541 +# CONFIG_INPUT_SIDEWINDER is not set
8542 +# CONFIG_INPUT_IFORCE_USB is not set
8543 +# CONFIG_INPUT_IFORCE_232 is not set
8544 +# CONFIG_INPUT_WARRIOR is not set
8545 +# CONFIG_INPUT_MAGELLAN is not set
8546 +# CONFIG_INPUT_SPACEORB is not set
8547 +# CONFIG_INPUT_SPACEBALL is not set
8548 +# CONFIG_INPUT_STINGER is not set
8549 +# CONFIG_INPUT_DB9 is not set
8550 +# CONFIG_INPUT_GAMECON is not set
8551 +# CONFIG_INPUT_TURBOGRAFX is not set
8552 +# CONFIG_QIC02_TAPE is not set
8553 +# CONFIG_IPMI_HANDLER is not set
8554 +# CONFIG_IPMI_PANIC_EVENT is not set
8555 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
8556 +# CONFIG_IPMI_KCS is not set
8557 +# CONFIG_IPMI_WATCHDOG is not set
8558 +
8559 +#
8560 +# Watchdog Cards
8561 +#
8562 +# CONFIG_WATCHDOG is not set
8563 +# CONFIG_SCx200 is not set
8564 +# CONFIG_SCx200_GPIO is not set
8565 +# CONFIG_AMD_PM768 is not set
8566 +# CONFIG_NVRAM is not set
8567 +# CONFIG_RTC is not set
8568 +# CONFIG_DTLK is not set
8569 +# CONFIG_R3964 is not set
8570 +# CONFIG_APPLICOM is not set
8571 +
8572 +#
8573 +# Ftape, the floppy tape device driver
8574 +#
8575 +# CONFIG_FTAPE is not set
8576 +# CONFIG_AGP is not set
8577 +
8578 +#
8579 +# Direct Rendering Manager (XFree86 DRI support)
8580 +#
8581 +# CONFIG_DRM is not set
8582 +
8583 +#
8584 +# PCMCIA character devices
8585 +#
8586 +# CONFIG_PCMCIA_SERIAL_CS is not set
8587 +# CONFIG_SYNCLINK_CS is not set
8588 +# CONFIG_AU1X00_GPIO is not set
8589 +# CONFIG_TS_AU1X00_ADS7846 is not set
8590 +
8591 +#
8592 +# File systems
8593 +#
8594 +# CONFIG_QUOTA is not set
8595 +# CONFIG_QFMT_V2 is not set
8596 +CONFIG_AUTOFS_FS=y
8597 +# CONFIG_AUTOFS4_FS is not set
8598 +# CONFIG_REISERFS_FS is not set
8599 +# CONFIG_REISERFS_CHECK is not set
8600 +# CONFIG_REISERFS_PROC_INFO is not set
8601 +# CONFIG_ADFS_FS is not set
8602 +# CONFIG_ADFS_FS_RW is not set
8603 +# CONFIG_AFFS_FS is not set
8604 +# CONFIG_HFS_FS is not set
8605 +# CONFIG_HFSPLUS_FS is not set
8606 +# CONFIG_BEFS_FS is not set
8607 +# CONFIG_BEFS_DEBUG is not set
8608 +# CONFIG_BFS_FS is not set
8609 +CONFIG_EXT3_FS=y
8610 +CONFIG_JBD=y
8611 +# CONFIG_JBD_DEBUG is not set
8612 +CONFIG_FAT_FS=y
8613 +CONFIG_MSDOS_FS=y
8614 +# CONFIG_UMSDOS_FS is not set
8615 +CONFIG_VFAT_FS=y
8616 +# CONFIG_EFS_FS is not set
8617 +# CONFIG_JFFS_FS is not set
8618 +# CONFIG_JFFS2_FS is not set
8619 +# CONFIG_CRAMFS is not set
8620 +CONFIG_TMPFS=y
8621 +CONFIG_RAMFS=y
8622 +# CONFIG_ISO9660_FS is not set
8623 +# CONFIG_JOLIET is not set
8624 +# CONFIG_ZISOFS is not set
8625 +# CONFIG_JFS_FS is not set
8626 +# CONFIG_JFS_DEBUG is not set
8627 +# CONFIG_JFS_STATISTICS is not set
8628 +# CONFIG_MINIX_FS is not set
8629 +# CONFIG_VXFS_FS is not set
8630 +# CONFIG_NTFS_FS is not set
8631 +# CONFIG_NTFS_RW is not set
8632 +# CONFIG_HPFS_FS is not set
8633 +CONFIG_PROC_FS=y
8634 +# CONFIG_DEVFS_FS is not set
8635 +# CONFIG_DEVFS_MOUNT is not set
8636 +# CONFIG_DEVFS_DEBUG is not set
8637 +CONFIG_DEVPTS_FS=y
8638 +# CONFIG_QNX4FS_FS is not set
8639 +# CONFIG_QNX4FS_RW is not set
8640 +# CONFIG_ROMFS_FS is not set
8641 +CONFIG_EXT2_FS=y
8642 +# CONFIG_SYSV_FS is not set
8643 +# CONFIG_UDF_FS is not set
8644 +# CONFIG_UDF_RW is not set
8645 +# CONFIG_UFS_FS is not set
8646 +# CONFIG_UFS_FS_WRITE is not set
8647 +# CONFIG_XFS_FS is not set
8648 +# CONFIG_XFS_QUOTA is not set
8649 +# CONFIG_XFS_RT is not set
8650 +# CONFIG_XFS_TRACE is not set
8651 +# CONFIG_XFS_DEBUG is not set
8652 +
8653 +#
8654 +# Network File Systems
8655 +#
8656 +# CONFIG_CODA_FS is not set
8657 +# CONFIG_INTERMEZZO_FS is not set
8658 +CONFIG_NFS_FS=y
8659 +CONFIG_NFS_V3=y
8660 +# CONFIG_NFS_DIRECTIO is not set
8661 +CONFIG_ROOT_NFS=y
8662 +# CONFIG_NFSD is not set
8663 +# CONFIG_NFSD_V3 is not set
8664 +# CONFIG_NFSD_TCP is not set
8665 +CONFIG_SUNRPC=y
8666 +CONFIG_LOCKD=y
8667 +CONFIG_LOCKD_V4=y
8668 +# CONFIG_SMB_FS is not set
8669 +# CONFIG_NCP_FS is not set
8670 +# CONFIG_NCPFS_PACKET_SIGNING is not set
8671 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
8672 +# CONFIG_NCPFS_STRONG is not set
8673 +# CONFIG_NCPFS_NFS_NS is not set
8674 +# CONFIG_NCPFS_OS2_NS is not set
8675 +# CONFIG_NCPFS_SMALLDOS is not set
8676 +# CONFIG_NCPFS_NLS is not set
8677 +# CONFIG_NCPFS_EXTRAS is not set
8678 +# CONFIG_ZISOFS_FS is not set
8679 +
8680 +#
8681 +# Partition Types
8682 +#
8683 +# CONFIG_PARTITION_ADVANCED is not set
8684 +CONFIG_MSDOS_PARTITION=y
8685 +# CONFIG_SMB_NLS is not set
8686 +CONFIG_NLS=y
8687 +
8688 +#
8689 +# Native Language Support
8690 +#
8691 +CONFIG_NLS_DEFAULT="iso8859-1"
8692 +# CONFIG_NLS_CODEPAGE_437 is not set
8693 +# CONFIG_NLS_CODEPAGE_737 is not set
8694 +# CONFIG_NLS_CODEPAGE_775 is not set
8695 +# CONFIG_NLS_CODEPAGE_850 is not set
8696 +# CONFIG_NLS_CODEPAGE_852 is not set
8697 +# CONFIG_NLS_CODEPAGE_855 is not set
8698 +# CONFIG_NLS_CODEPAGE_857 is not set
8699 +# CONFIG_NLS_CODEPAGE_860 is not set
8700 +# CONFIG_NLS_CODEPAGE_861 is not set
8701 +# CONFIG_NLS_CODEPAGE_862 is not set
8702 +# CONFIG_NLS_CODEPAGE_863 is not set
8703 +# CONFIG_NLS_CODEPAGE_864 is not set
8704 +# CONFIG_NLS_CODEPAGE_865 is not set
8705 +# CONFIG_NLS_CODEPAGE_866 is not set
8706 +# CONFIG_NLS_CODEPAGE_869 is not set
8707 +# CONFIG_NLS_CODEPAGE_936 is not set
8708 +# CONFIG_NLS_CODEPAGE_950 is not set
8709 +# CONFIG_NLS_CODEPAGE_932 is not set
8710 +# CONFIG_NLS_CODEPAGE_949 is not set
8711 +# CONFIG_NLS_CODEPAGE_874 is not set
8712 +# CONFIG_NLS_ISO8859_8 is not set
8713 +# CONFIG_NLS_CODEPAGE_1250 is not set
8714 +# CONFIG_NLS_CODEPAGE_1251 is not set
8715 +# CONFIG_NLS_ISO8859_1 is not set
8716 +# CONFIG_NLS_ISO8859_2 is not set
8717 +# CONFIG_NLS_ISO8859_3 is not set
8718 +# CONFIG_NLS_ISO8859_4 is not set
8719 +# CONFIG_NLS_ISO8859_5 is not set
8720 +# CONFIG_NLS_ISO8859_6 is not set
8721 +# CONFIG_NLS_ISO8859_7 is not set
8722 +# CONFIG_NLS_ISO8859_9 is not set
8723 +# CONFIG_NLS_ISO8859_13 is not set
8724 +# CONFIG_NLS_ISO8859_14 is not set
8725 +# CONFIG_NLS_ISO8859_15 is not set
8726 +# CONFIG_NLS_KOI8_R is not set
8727 +# CONFIG_NLS_KOI8_U is not set
8728 +# CONFIG_NLS_UTF8 is not set
8729 +
8730 +#
8731 +# Multimedia devices
8732 +#
8733 +# CONFIG_VIDEO_DEV is not set
8734 +
8735 +#
8736 +# Console drivers
8737 +#
8738 +# CONFIG_VGA_CONSOLE is not set
8739 +# CONFIG_MDA_CONSOLE is not set
8740 +
8741 +#
8742 +# Frame-buffer support
8743 +#
8744 +CONFIG_FB=y
8745 +CONFIG_DUMMY_CONSOLE=y
8746 +# CONFIG_FB_RIVA is not set
8747 +# CONFIG_FB_CLGEN is not set
8748 +# CONFIG_FB_PM2 is not set
8749 +# CONFIG_FB_PM3 is not set
8750 +# CONFIG_FB_CYBER2000 is not set
8751 +# CONFIG_FB_MATROX is not set
8752 +# CONFIG_FB_ATY is not set
8753 +# CONFIG_FB_RADEON is not set
8754 +# CONFIG_FB_ATY128 is not set
8755 +# CONFIG_FB_INTEL is not set
8756 +# CONFIG_FB_SIS is not set
8757 +# CONFIG_FB_NEOMAGIC is not set
8758 +# CONFIG_FB_3DFX is not set
8759 +# CONFIG_FB_VOODOO1 is not set
8760 +# CONFIG_FB_TRIDENT is not set
8761 +# CONFIG_FB_E1356 is not set
8762 +# CONFIG_FB_IT8181 is not set
8763 +# CONFIG_FB_VIRTUAL is not set
8764 +CONFIG_FBCON_ADVANCED=y
8765 +# CONFIG_FBCON_MFB is not set
8766 +# CONFIG_FBCON_CFB2 is not set
8767 +# CONFIG_FBCON_CFB4 is not set
8768 +# CONFIG_FBCON_CFB8 is not set
8769 +CONFIG_FBCON_CFB16=y
8770 +# CONFIG_FBCON_CFB24 is not set
8771 +CONFIG_FBCON_CFB32=y
8772 +# CONFIG_FBCON_AFB is not set
8773 +# CONFIG_FBCON_ILBM is not set
8774 +# CONFIG_FBCON_IPLAN2P2 is not set
8775 +# CONFIG_FBCON_IPLAN2P4 is not set
8776 +# CONFIG_FBCON_IPLAN2P8 is not set
8777 +# CONFIG_FBCON_MAC is not set
8778 +# CONFIG_FBCON_VGA_PLANES is not set
8779 +# CONFIG_FBCON_VGA is not set
8780 +# CONFIG_FBCON_HGA is not set
8781 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
8782 +CONFIG_FBCON_FONTS=y
8783 +CONFIG_FONT_8x8=y
8784 +CONFIG_FONT_8x16=y
8785 +# CONFIG_FONT_SUN8x16 is not set
8786 +# CONFIG_FONT_SUN12x22 is not set
8787 +# CONFIG_FONT_6x11 is not set
8788 +# CONFIG_FONT_PEARL_8x8 is not set
8789 +# CONFIG_FONT_ACORN_8x8 is not set
8790 +
8791 +#
8792 +# Sound
8793 +#
8794 +CONFIG_SOUND=y
8795 +# CONFIG_SOUND_ALI5455 is not set
8796 +# CONFIG_SOUND_BT878 is not set
8797 +# CONFIG_SOUND_CMPCI is not set
8798 +# CONFIG_SOUND_EMU10K1 is not set
8799 +# CONFIG_MIDI_EMU10K1 is not set
8800 +# CONFIG_SOUND_FUSION is not set
8801 +# CONFIG_SOUND_CS4281 is not set
8802 +# CONFIG_SOUND_ES1370 is not set
8803 +# CONFIG_SOUND_ES1371 is not set
8804 +# CONFIG_SOUND_ESSSOLO1 is not set
8805 +# CONFIG_SOUND_MAESTRO is not set
8806 +# CONFIG_SOUND_MAESTRO3 is not set
8807 +# CONFIG_SOUND_FORTE is not set
8808 +# CONFIG_SOUND_ICH is not set
8809 +# CONFIG_SOUND_RME96XX is not set
8810 +# CONFIG_SOUND_SONICVIBES is not set
8811 +# CONFIG_SOUND_AU1X00 is not set
8812 +CONFIG_SOUND_AU1550_PSC=y
8813 +# CONFIG_SOUND_AU1550_I2S is not set
8814 +# CONFIG_SOUND_TRIDENT is not set
8815 +# CONFIG_SOUND_MSNDCLAS is not set
8816 +# CONFIG_SOUND_MSNDPIN is not set
8817 +# CONFIG_SOUND_VIA82CXXX is not set
8818 +# CONFIG_MIDI_VIA82CXXX is not set
8819 +# CONFIG_SOUND_OSS is not set
8820 +# CONFIG_SOUND_TVMIXER is not set
8821 +# CONFIG_SOUND_AD1980 is not set
8822 +# CONFIG_SOUND_WM97XX is not set
8823 +
8824 +#
8825 +# USB support
8826 +#
8827 +CONFIG_USB=y
8828 +# CONFIG_USB_DEBUG is not set
8829 +
8830 +#
8831 +# Miscellaneous USB options
8832 +#
8833 +CONFIG_USB_DEVICEFS=y
8834 +# CONFIG_USB_BANDWIDTH is not set
8835 +
8836 +#
8837 +# USB Host Controller Drivers
8838 +#
8839 +# CONFIG_USB_EHCI_HCD is not set
8840 +# CONFIG_USB_UHCI is not set
8841 +# CONFIG_USB_UHCI_ALT is not set
8842 +CONFIG_USB_OHCI=y
8843 +
8844 +#
8845 +# USB Device Class drivers
8846 +#
8847 +# CONFIG_USB_AUDIO is not set
8848 +# CONFIG_USB_EMI26 is not set
8849 +# CONFIG_USB_BLUETOOTH is not set
8850 +# CONFIG_USB_MIDI is not set
8851 +CONFIG_USB_STORAGE=y
8852 +# CONFIG_USB_STORAGE_DEBUG is not set
8853 +# CONFIG_USB_STORAGE_DATAFAB is not set
8854 +# CONFIG_USB_STORAGE_FREECOM is not set
8855 +# CONFIG_USB_STORAGE_ISD200 is not set
8856 +# CONFIG_USB_STORAGE_DPCM is not set
8857 +# CONFIG_USB_STORAGE_HP8200e is not set
8858 +# CONFIG_USB_STORAGE_SDDR09 is not set
8859 +# CONFIG_USB_STORAGE_SDDR55 is not set
8860 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
8861 +# CONFIG_USB_ACM is not set
8862 +# CONFIG_USB_PRINTER is not set
8863 +
8864 +#
8865 +# USB Human Interface Devices (HID)
8866 +#
8867 +CONFIG_USB_HID=y
8868 +CONFIG_USB_HIDINPUT=y
8869 +CONFIG_USB_HIDDEV=y
8870 +# CONFIG_USB_AIPTEK is not set
8871 +# CONFIG_USB_WACOM is not set
8872 +# CONFIG_USB_KBTAB is not set
8873 +# CONFIG_USB_POWERMATE is not set
8874 +
8875 +#
8876 +# USB Imaging devices
8877 +#
8878 +# CONFIG_USB_DC2XX is not set
8879 +# CONFIG_USB_MDC800 is not set
8880 +# CONFIG_USB_SCANNER is not set
8881 +# CONFIG_USB_MICROTEK is not set
8882 +# CONFIG_USB_HPUSBSCSI is not set
8883 +
8884 +#
8885 +# USB Multimedia devices
8886 +#
8887 +
8888 +#
8889 +# Video4Linux support is needed for USB Multimedia device support
8890 +#
8891 +
8892 +#
8893 +# USB Network adaptors
8894 +#
8895 +# CONFIG_USB_PEGASUS is not set
8896 +# CONFIG_USB_RTL8150 is not set
8897 +# CONFIG_USB_KAWETH is not set
8898 +# CONFIG_USB_CATC is not set
8899 +# CONFIG_USB_CDCETHER is not set
8900 +# CONFIG_USB_USBNET is not set
8901 +
8902 +#
8903 +# USB port drivers
8904 +#
8905 +# CONFIG_USB_USS720 is not set
8906 +
8907 +#
8908 +# USB Serial Converter support
8909 +#
8910 +# CONFIG_USB_SERIAL is not set
8911 +
8912 +#
8913 +# USB Miscellaneous drivers
8914 +#
8915 +# CONFIG_USB_RIO500 is not set
8916 +# CONFIG_USB_AUERSWALD is not set
8917 +# CONFIG_USB_TIGL is not set
8918 +# CONFIG_USB_BRLVGER is not set
8919 +# CONFIG_USB_LCD is not set
8920 +
8921 +#
8922 +# Support for USB gadgets
8923 +#
8924 +# CONFIG_USB_GADGET is not set
8925 +
8926 +#
8927 +# Bluetooth support
8928 +#
8929 +# CONFIG_BLUEZ is not set
8930 +
8931 +#
8932 +# Kernel hacking
8933 +#
8934 +CONFIG_CROSSCOMPILE=y
8935 +# CONFIG_RUNTIME_DEBUG is not set
8936 +# CONFIG_KGDB is not set
8937 +# CONFIG_GDB_CONSOLE is not set
8938 +# CONFIG_DEBUG_INFO is not set
8939 +# CONFIG_MAGIC_SYSRQ is not set
8940 +# CONFIG_MIPS_UNCACHED is not set
8941 +CONFIG_LOG_BUF_SHIFT=0
8942 +
8943 +#
8944 +# Cryptographic options
8945 +#
8946 +# CONFIG_CRYPTO is not set
8947 +
8948 +#
8949 +# Library routines
8950 +#
8951 +# CONFIG_CRC32 is not set
8952 +CONFIG_ZLIB_INFLATE=m
8953 +CONFIG_ZLIB_DEFLATE=m
8954 +# CONFIG_FW_LOADER is not set
8955 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-pb1500 linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1500
8956 --- linux-2.4.32-rc1/arch/mips/defconfig-pb1500 2005-01-19 15:09:28.000000000 +0100
8957 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1500 2005-03-18 13:13:21.000000000 +0100
8958 @@ -30,8 +30,8 @@
8959 # CONFIG_MIPS_PB1000 is not set
8960 # CONFIG_MIPS_PB1100 is not set
8961 CONFIG_MIPS_PB1500=y
8962 -# CONFIG_MIPS_HYDROGEN3 is not set
8963 # CONFIG_MIPS_PB1550 is not set
8964 +# CONFIG_MIPS_HYDROGEN3 is not set
8965 # CONFIG_MIPS_XXS1500 is not set
8966 # CONFIG_MIPS_MTX1 is not set
8967 # CONFIG_COGENT_CSB250 is not set
8968 @@ -215,9 +215,7 @@
8969 # CONFIG_MTD_MTX1 is not set
8970 CONFIG_MTD_PB1500_BOOT=y
8971 # CONFIG_MTD_PB1500_USER is not set
8972 -# CONFIG_MTD_DB1X00 is not set
8973 # CONFIG_MTD_PB1550 is not set
8974 -# CONFIG_MTD_HYDROGEN3 is not set
8975 # CONFIG_MTD_MIRAGE is not set
8976 # CONFIG_MTD_CSTM_MIPS_IXX is not set
8977 # CONFIG_MTD_OCELOT is not set
8978 @@ -236,7 +234,6 @@
8979 #
8980 # Disk-On-Chip Device Drivers
8981 #
8982 -# CONFIG_MTD_DOC1000 is not set
8983 # CONFIG_MTD_DOC2000 is not set
8984 # CONFIG_MTD_DOC2001 is not set
8985 # CONFIG_MTD_DOCPROBE is not set
8986 @@ -341,11 +338,6 @@
8987 #
8988 # CONFIG_IPX is not set
8989 # CONFIG_ATALK is not set
8990 -
8991 -#
8992 -# Appletalk devices
8993 -#
8994 -# CONFIG_DEV_APPLETALK is not set
8995 # CONFIG_DECNET is not set
8996 # CONFIG_BRIDGE is not set
8997 # CONFIG_X25 is not set
8998 @@ -675,7 +667,6 @@
8999 # CONFIG_AU1X00_USB_TTY is not set
9000 # CONFIG_AU1X00_USB_RAW is not set
9001 # CONFIG_TXX927_SERIAL is not set
9002 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9003 CONFIG_UNIX98_PTYS=y
9004 CONFIG_UNIX98_PTY_COUNT=256
9005
9006 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-pb1550 linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1550
9007 --- linux-2.4.32-rc1/arch/mips/defconfig-pb1550 2005-01-19 15:09:29.000000000 +0100
9008 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-pb1550 2005-03-18 13:13:21.000000000 +0100
9009 @@ -30,8 +30,8 @@
9010 # CONFIG_MIPS_PB1000 is not set
9011 # CONFIG_MIPS_PB1100 is not set
9012 # CONFIG_MIPS_PB1500 is not set
9013 -# CONFIG_MIPS_HYDROGEN3 is not set
9014 CONFIG_MIPS_PB1550=y
9015 +# CONFIG_MIPS_HYDROGEN3 is not set
9016 # CONFIG_MIPS_XXS1500 is not set
9017 # CONFIG_MIPS_MTX1 is not set
9018 # CONFIG_COGENT_CSB250 is not set
9019 @@ -213,11 +213,9 @@
9020 # CONFIG_MTD_BOSPORUS is not set
9021 # CONFIG_MTD_XXS1500 is not set
9022 # CONFIG_MTD_MTX1 is not set
9023 -# CONFIG_MTD_DB1X00 is not set
9024 CONFIG_MTD_PB1550=y
9025 CONFIG_MTD_PB1550_BOOT=y
9026 CONFIG_MTD_PB1550_USER=y
9027 -# CONFIG_MTD_HYDROGEN3 is not set
9028 # CONFIG_MTD_MIRAGE is not set
9029 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9030 # CONFIG_MTD_OCELOT is not set
9031 @@ -236,7 +234,6 @@
9032 #
9033 # Disk-On-Chip Device Drivers
9034 #
9035 -# CONFIG_MTD_DOC1000 is not set
9036 # CONFIG_MTD_DOC2000 is not set
9037 # CONFIG_MTD_DOC2001 is not set
9038 # CONFIG_MTD_DOCPROBE is not set
9039 @@ -343,11 +340,6 @@
9040 #
9041 # CONFIG_IPX is not set
9042 # CONFIG_ATALK is not set
9043 -
9044 -#
9045 -# Appletalk devices
9046 -#
9047 -# CONFIG_DEV_APPLETALK is not set
9048 # CONFIG_DECNET is not set
9049 # CONFIG_BRIDGE is not set
9050 # CONFIG_X25 is not set
9051 @@ -633,7 +625,6 @@
9052 # CONFIG_AU1X00_USB_TTY is not set
9053 # CONFIG_AU1X00_USB_RAW is not set
9054 # CONFIG_TXX927_SERIAL is not set
9055 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9056 CONFIG_UNIX98_PTYS=y
9057 CONFIG_UNIX98_PTY_COUNT=256
9058
9059 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-rbtx4927 linux-2.4.32-rc1.mips/arch/mips/defconfig-rbtx4927
9060 --- linux-2.4.32-rc1/arch/mips/defconfig-rbtx4927 2005-01-19 15:09:29.000000000 +0100
9061 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-rbtx4927 2005-03-18 13:13:21.000000000 +0100
9062 @@ -28,8 +28,8 @@
9063 # CONFIG_MIPS_PB1000 is not set
9064 # CONFIG_MIPS_PB1100 is not set
9065 # CONFIG_MIPS_PB1500 is not set
9066 -# CONFIG_MIPS_HYDROGEN3 is not set
9067 # CONFIG_MIPS_PB1550 is not set
9068 +# CONFIG_MIPS_HYDROGEN3 is not set
9069 # CONFIG_MIPS_XXS1500 is not set
9070 # CONFIG_MIPS_MTX1 is not set
9071 # CONFIG_COGENT_CSB250 is not set
9072 @@ -223,11 +223,6 @@
9073 #
9074 # CONFIG_IPX is not set
9075 # CONFIG_ATALK is not set
9076 -
9077 -#
9078 -# Appletalk devices
9079 -#
9080 -# CONFIG_DEV_APPLETALK is not set
9081 # CONFIG_DECNET is not set
9082 # CONFIG_BRIDGE is not set
9083 # CONFIG_X25 is not set
9084 @@ -466,7 +461,6 @@
9085 CONFIG_SERIAL_TXX9=y
9086 CONFIG_SERIAL_TXX9_CONSOLE=y
9087 # CONFIG_TXX927_SERIAL is not set
9088 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9089 # CONFIG_UNIX98_PTYS is not set
9090
9091 #
9092 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-rm200 linux-2.4.32-rc1.mips/arch/mips/defconfig-rm200
9093 --- linux-2.4.32-rc1/arch/mips/defconfig-rm200 2005-01-19 15:09:29.000000000 +0100
9094 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-rm200 2005-03-18 13:13:21.000000000 +0100
9095 @@ -30,8 +30,8 @@
9096 # CONFIG_MIPS_PB1000 is not set
9097 # CONFIG_MIPS_PB1100 is not set
9098 # CONFIG_MIPS_PB1500 is not set
9099 -# CONFIG_MIPS_HYDROGEN3 is not set
9100 # CONFIG_MIPS_PB1550 is not set
9101 +# CONFIG_MIPS_HYDROGEN3 is not set
9102 # CONFIG_MIPS_XXS1500 is not set
9103 # CONFIG_MIPS_MTX1 is not set
9104 # CONFIG_COGENT_CSB250 is not set
9105 @@ -229,11 +229,6 @@
9106 #
9107 # CONFIG_IPX is not set
9108 # CONFIG_ATALK is not set
9109 -
9110 -#
9111 -# Appletalk devices
9112 -#
9113 -# CONFIG_DEV_APPLETALK is not set
9114 # CONFIG_DECNET is not set
9115 # CONFIG_BRIDGE is not set
9116 # CONFIG_X25 is not set
9117 @@ -340,7 +335,6 @@
9118 # CONFIG_SERIAL is not set
9119 # CONFIG_SERIAL_EXTENDED is not set
9120 # CONFIG_SERIAL_NONSTANDARD is not set
9121 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9122 CONFIG_UNIX98_PTYS=y
9123 CONFIG_UNIX98_PTY_COUNT=256
9124
9125 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-sb1250-swarm linux-2.4.32-rc1.mips/arch/mips/defconfig-sb1250-swarm
9126 --- linux-2.4.32-rc1/arch/mips/defconfig-sb1250-swarm 2005-01-19 15:09:29.000000000 +0100
9127 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-sb1250-swarm 2005-03-18 13:13:21.000000000 +0100
9128 @@ -30,8 +30,8 @@
9129 # CONFIG_MIPS_PB1000 is not set
9130 # CONFIG_MIPS_PB1100 is not set
9131 # CONFIG_MIPS_PB1500 is not set
9132 -# CONFIG_MIPS_HYDROGEN3 is not set
9133 # CONFIG_MIPS_PB1550 is not set
9134 +# CONFIG_MIPS_HYDROGEN3 is not set
9135 # CONFIG_MIPS_XXS1500 is not set
9136 # CONFIG_MIPS_MTX1 is not set
9137 # CONFIG_COGENT_CSB250 is not set
9138 @@ -90,6 +90,7 @@
9139 # CONFIG_SIBYTE_TBPROF is not set
9140 CONFIG_SIBYTE_GENBUS_IDE=y
9141 CONFIG_SMP_CAPABLE=y
9142 +CONFIG_MIPS_RTC=y
9143 # CONFIG_SNI_RM200_PCI is not set
9144 # CONFIG_TANBAC_TB0226 is not set
9145 # CONFIG_TANBAC_TB0229 is not set
9146 @@ -253,11 +254,6 @@
9147 #
9148 # CONFIG_IPX is not set
9149 # CONFIG_ATALK is not set
9150 -
9151 -#
9152 -# Appletalk devices
9153 -#
9154 -# CONFIG_DEV_APPLETALK is not set
9155 # CONFIG_DECNET is not set
9156 # CONFIG_BRIDGE is not set
9157 # CONFIG_X25 is not set
9158 @@ -469,7 +465,6 @@
9159 CONFIG_SIBYTE_SB1250_DUART=y
9160 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
9161 CONFIG_SERIAL_CONSOLE=y
9162 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9163 CONFIG_UNIX98_PTYS=y
9164 CONFIG_UNIX98_PTY_COUNT=256
9165
9166 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-sead linux-2.4.32-rc1.mips/arch/mips/defconfig-sead
9167 --- linux-2.4.32-rc1/arch/mips/defconfig-sead 2005-01-19 15:09:29.000000000 +0100
9168 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-sead 2005-03-18 13:13:21.000000000 +0100
9169 @@ -28,8 +28,8 @@
9170 # CONFIG_MIPS_PB1000 is not set
9171 # CONFIG_MIPS_PB1100 is not set
9172 # CONFIG_MIPS_PB1500 is not set
9173 -# CONFIG_MIPS_HYDROGEN3 is not set
9174 # CONFIG_MIPS_PB1550 is not set
9175 +# CONFIG_MIPS_HYDROGEN3 is not set
9176 # CONFIG_MIPS_XXS1500 is not set
9177 # CONFIG_MIPS_MTX1 is not set
9178 # CONFIG_COGENT_CSB250 is not set
9179 @@ -244,7 +244,6 @@
9180 CONFIG_SERIAL_CONSOLE=y
9181 # CONFIG_SERIAL_EXTENDED is not set
9182 # CONFIG_SERIAL_NONSTANDARD is not set
9183 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9184 # CONFIG_UNIX98_PTYS is not set
9185
9186 #
9187 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-stretch linux-2.4.32-rc1.mips/arch/mips/defconfig-stretch
9188 --- linux-2.4.32-rc1/arch/mips/defconfig-stretch 2005-01-19 15:09:29.000000000 +0100
9189 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-stretch 2005-03-18 13:13:21.000000000 +0100
9190 @@ -30,8 +30,8 @@
9191 # CONFIG_MIPS_PB1000 is not set
9192 # CONFIG_MIPS_PB1100 is not set
9193 # CONFIG_MIPS_PB1500 is not set
9194 -# CONFIG_MIPS_HYDROGEN3 is not set
9195 # CONFIG_MIPS_PB1550 is not set
9196 +# CONFIG_MIPS_HYDROGEN3 is not set
9197 # CONFIG_MIPS_XXS1500 is not set
9198 # CONFIG_MIPS_MTX1 is not set
9199 # CONFIG_COGENT_CSB250 is not set
9200 @@ -240,11 +240,6 @@
9201 #
9202 # CONFIG_IPX is not set
9203 # CONFIG_ATALK is not set
9204 -
9205 -#
9206 -# Appletalk devices
9207 -#
9208 -# CONFIG_DEV_APPLETALK is not set
9209 # CONFIG_DECNET is not set
9210 # CONFIG_BRIDGE is not set
9211 # CONFIG_X25 is not set
9212 @@ -324,9 +319,11 @@
9213 # CONFIG_SCSI_MEGARAID is not set
9214 # CONFIG_SCSI_MEGARAID2 is not set
9215 # CONFIG_SCSI_SATA is not set
9216 +# CONFIG_SCSI_SATA_AHCI is not set
9217 # CONFIG_SCSI_SATA_SVW is not set
9218 # CONFIG_SCSI_ATA_PIIX is not set
9219 # CONFIG_SCSI_SATA_NV is not set
9220 +# CONFIG_SCSI_SATA_QSTOR is not set
9221 # CONFIG_SCSI_SATA_PROMISE is not set
9222 # CONFIG_SCSI_SATA_SX4 is not set
9223 # CONFIG_SCSI_SATA_SIL is not set
9224 @@ -516,7 +513,6 @@
9225 # CONFIG_SERIAL_TXX9 is not set
9226 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9227 # CONFIG_TXX927_SERIAL is not set
9228 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9229 CONFIG_UNIX98_PTYS=y
9230 CONFIG_UNIX98_PTY_COUNT=256
9231
9232 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-tb0226 linux-2.4.32-rc1.mips/arch/mips/defconfig-tb0226
9233 --- linux-2.4.32-rc1/arch/mips/defconfig-tb0226 2005-01-19 15:09:29.000000000 +0100
9234 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-tb0226 2005-03-18 13:13:21.000000000 +0100
9235 @@ -30,8 +30,8 @@
9236 # CONFIG_MIPS_PB1000 is not set
9237 # CONFIG_MIPS_PB1100 is not set
9238 # CONFIG_MIPS_PB1500 is not set
9239 -# CONFIG_MIPS_HYDROGEN3 is not set
9240 # CONFIG_MIPS_PB1550 is not set
9241 +# CONFIG_MIPS_HYDROGEN3 is not set
9242 # CONFIG_MIPS_XXS1500 is not set
9243 # CONFIG_MIPS_MTX1 is not set
9244 # CONFIG_COGENT_CSB250 is not set
9245 @@ -228,11 +228,6 @@
9246 #
9247 # CONFIG_IPX is not set
9248 # CONFIG_ATALK is not set
9249 -
9250 -#
9251 -# Appletalk devices
9252 -#
9253 -# CONFIG_DEV_APPLETALK is not set
9254 # CONFIG_DECNET is not set
9255 # CONFIG_BRIDGE is not set
9256 # CONFIG_X25 is not set
9257 @@ -312,9 +307,11 @@
9258 # CONFIG_SCSI_MEGARAID is not set
9259 # CONFIG_SCSI_MEGARAID2 is not set
9260 # CONFIG_SCSI_SATA is not set
9261 +# CONFIG_SCSI_SATA_AHCI is not set
9262 # CONFIG_SCSI_SATA_SVW is not set
9263 # CONFIG_SCSI_ATA_PIIX is not set
9264 # CONFIG_SCSI_SATA_NV is not set
9265 +# CONFIG_SCSI_SATA_QSTOR is not set
9266 # CONFIG_SCSI_SATA_PROMISE is not set
9267 # CONFIG_SCSI_SATA_SX4 is not set
9268 # CONFIG_SCSI_SATA_SIL is not set
9269 @@ -518,7 +515,6 @@
9270 CONFIG_SERIAL_CONSOLE=y
9271 # CONFIG_SERIAL_EXTENDED is not set
9272 # CONFIG_SERIAL_NONSTANDARD is not set
9273 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9274 # CONFIG_VR41XX_KIU is not set
9275 CONFIG_UNIX98_PTYS=y
9276 CONFIG_UNIX98_PTY_COUNT=256
9277 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-tb0229 linux-2.4.32-rc1.mips/arch/mips/defconfig-tb0229
9278 --- linux-2.4.32-rc1/arch/mips/defconfig-tb0229 2005-01-19 15:09:29.000000000 +0100
9279 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-tb0229 2005-03-18 13:13:21.000000000 +0100
9280 @@ -30,8 +30,8 @@
9281 # CONFIG_MIPS_PB1000 is not set
9282 # CONFIG_MIPS_PB1100 is not set
9283 # CONFIG_MIPS_PB1500 is not set
9284 -# CONFIG_MIPS_HYDROGEN3 is not set
9285 # CONFIG_MIPS_PB1550 is not set
9286 +# CONFIG_MIPS_HYDROGEN3 is not set
9287 # CONFIG_MIPS_XXS1500 is not set
9288 # CONFIG_MIPS_MTX1 is not set
9289 # CONFIG_COGENT_CSB250 is not set
9290 @@ -230,11 +230,6 @@
9291 #
9292 # CONFIG_IPX is not set
9293 # CONFIG_ATALK is not set
9294 -
9295 -#
9296 -# Appletalk devices
9297 -#
9298 -# CONFIG_DEV_APPLETALK is not set
9299 # CONFIG_DECNET is not set
9300 # CONFIG_BRIDGE is not set
9301 # CONFIG_X25 is not set
9302 @@ -445,7 +440,6 @@
9303 CONFIG_SERIAL_CONSOLE=y
9304 # CONFIG_SERIAL_EXTENDED is not set
9305 # CONFIG_SERIAL_NONSTANDARD is not set
9306 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9307 # CONFIG_VR41XX_KIU is not set
9308 CONFIG_UNIX98_PTYS=y
9309 CONFIG_UNIX98_PTY_COUNT=256
9310 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-ti1500 linux-2.4.32-rc1.mips/arch/mips/defconfig-ti1500
9311 --- linux-2.4.32-rc1/arch/mips/defconfig-ti1500 2005-01-19 15:09:29.000000000 +0100
9312 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-ti1500 2005-03-18 13:13:21.000000000 +0100
9313 @@ -30,8 +30,8 @@
9314 # CONFIG_MIPS_PB1000 is not set
9315 # CONFIG_MIPS_PB1100 is not set
9316 # CONFIG_MIPS_PB1500 is not set
9317 -# CONFIG_MIPS_HYDROGEN3 is not set
9318 # CONFIG_MIPS_PB1550 is not set
9319 +# CONFIG_MIPS_HYDROGEN3 is not set
9320 CONFIG_MIPS_XXS1500=y
9321 # CONFIG_MIPS_MTX1 is not set
9322 # CONFIG_COGENT_CSB250 is not set
9323 @@ -213,9 +213,7 @@
9324 # CONFIG_MTD_BOSPORUS is not set
9325 CONFIG_MTD_XXS1500=y
9326 # CONFIG_MTD_MTX1 is not set
9327 -# CONFIG_MTD_DB1X00 is not set
9328 # CONFIG_MTD_PB1550 is not set
9329 -# CONFIG_MTD_HYDROGEN3 is not set
9330 # CONFIG_MTD_MIRAGE is not set
9331 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9332 # CONFIG_MTD_OCELOT is not set
9333 @@ -234,7 +232,6 @@
9334 #
9335 # Disk-On-Chip Device Drivers
9336 #
9337 -# CONFIG_MTD_DOC1000 is not set
9338 # CONFIG_MTD_DOC2000 is not set
9339 # CONFIG_MTD_DOC2001 is not set
9340 # CONFIG_MTD_DOCPROBE is not set
9341 @@ -339,11 +336,6 @@
9342 #
9343 # CONFIG_IPX is not set
9344 # CONFIG_ATALK is not set
9345 -
9346 -#
9347 -# Appletalk devices
9348 -#
9349 -# CONFIG_DEV_APPLETALK is not set
9350 # CONFIG_DECNET is not set
9351 # CONFIG_BRIDGE is not set
9352 # CONFIG_X25 is not set
9353 @@ -600,7 +592,6 @@
9354 # CONFIG_AU1X00_USB_TTY is not set
9355 # CONFIG_AU1X00_USB_RAW is not set
9356 # CONFIG_TXX927_SERIAL is not set
9357 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9358 CONFIG_UNIX98_PTYS=y
9359 CONFIG_UNIX98_PTY_COUNT=256
9360
9361 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-workpad linux-2.4.32-rc1.mips/arch/mips/defconfig-workpad
9362 --- linux-2.4.32-rc1/arch/mips/defconfig-workpad 2005-01-19 15:09:29.000000000 +0100
9363 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-workpad 2005-03-18 13:13:21.000000000 +0100
9364 @@ -30,8 +30,8 @@
9365 # CONFIG_MIPS_PB1000 is not set
9366 # CONFIG_MIPS_PB1100 is not set
9367 # CONFIG_MIPS_PB1500 is not set
9368 -# CONFIG_MIPS_HYDROGEN3 is not set
9369 # CONFIG_MIPS_PB1550 is not set
9370 +# CONFIG_MIPS_HYDROGEN3 is not set
9371 # CONFIG_MIPS_XXS1500 is not set
9372 # CONFIG_MIPS_MTX1 is not set
9373 # CONFIG_COGENT_CSB250 is not set
9374 @@ -222,11 +222,6 @@
9375 #
9376 # CONFIG_IPX is not set
9377 # CONFIG_ATALK is not set
9378 -
9379 -#
9380 -# Appletalk devices
9381 -#
9382 -# CONFIG_DEV_APPLETALK is not set
9383 # CONFIG_DECNET is not set
9384 # CONFIG_BRIDGE is not set
9385 # CONFIG_X25 is not set
9386 @@ -426,7 +421,6 @@
9387 # CONFIG_SERIAL_MULTIPORT is not set
9388 # CONFIG_HUB6 is not set
9389 # CONFIG_SERIAL_NONSTANDARD is not set
9390 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9391 # CONFIG_VR41XX_KIU is not set
9392 CONFIG_UNIX98_PTYS=y
9393 CONFIG_UNIX98_PTY_COUNT=256
9394 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-xxs1500 linux-2.4.32-rc1.mips/arch/mips/defconfig-xxs1500
9395 --- linux-2.4.32-rc1/arch/mips/defconfig-xxs1500 2005-01-19 15:09:29.000000000 +0100
9396 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-xxs1500 2005-03-18 13:13:21.000000000 +0100
9397 @@ -30,8 +30,8 @@
9398 # CONFIG_MIPS_PB1000 is not set
9399 # CONFIG_MIPS_PB1100 is not set
9400 # CONFIG_MIPS_PB1500 is not set
9401 -# CONFIG_MIPS_HYDROGEN3 is not set
9402 # CONFIG_MIPS_PB1550 is not set
9403 +# CONFIG_MIPS_HYDROGEN3 is not set
9404 CONFIG_MIPS_XXS1500=y
9405 # CONFIG_MIPS_MTX1 is not set
9406 # CONFIG_COGENT_CSB250 is not set
9407 @@ -213,9 +213,7 @@
9408 # CONFIG_MTD_BOSPORUS is not set
9409 CONFIG_MTD_XXS1500=y
9410 # CONFIG_MTD_MTX1 is not set
9411 -# CONFIG_MTD_DB1X00 is not set
9412 # CONFIG_MTD_PB1550 is not set
9413 -# CONFIG_MTD_HYDROGEN3 is not set
9414 # CONFIG_MTD_MIRAGE is not set
9415 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9416 # CONFIG_MTD_OCELOT is not set
9417 @@ -234,7 +232,6 @@
9418 #
9419 # Disk-On-Chip Device Drivers
9420 #
9421 -# CONFIG_MTD_DOC1000 is not set
9422 # CONFIG_MTD_DOC2000 is not set
9423 # CONFIG_MTD_DOC2001 is not set
9424 # CONFIG_MTD_DOCPROBE is not set
9425 @@ -339,11 +336,6 @@
9426 #
9427 # CONFIG_IPX is not set
9428 # CONFIG_ATALK is not set
9429 -
9430 -#
9431 -# Appletalk devices
9432 -#
9433 -# CONFIG_DEV_APPLETALK is not set
9434 # CONFIG_DECNET is not set
9435 # CONFIG_BRIDGE is not set
9436 # CONFIG_X25 is not set
9437 @@ -671,7 +663,6 @@
9438 # CONFIG_AU1X00_USB_TTY is not set
9439 # CONFIG_AU1X00_USB_RAW is not set
9440 # CONFIG_TXX927_SERIAL is not set
9441 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9442 CONFIG_UNIX98_PTYS=y
9443 CONFIG_UNIX98_PTY_COUNT=256
9444
9445 diff -Nur linux-2.4.32-rc1/arch/mips/defconfig-yosemite linux-2.4.32-rc1.mips/arch/mips/defconfig-yosemite
9446 --- linux-2.4.32-rc1/arch/mips/defconfig-yosemite 2005-01-19 15:09:29.000000000 +0100
9447 +++ linux-2.4.32-rc1.mips/arch/mips/defconfig-yosemite 2005-03-18 13:13:21.000000000 +0100
9448 @@ -30,8 +30,8 @@
9449 # CONFIG_MIPS_PB1000 is not set
9450 # CONFIG_MIPS_PB1100 is not set
9451 # CONFIG_MIPS_PB1500 is not set
9452 -# CONFIG_MIPS_HYDROGEN3 is not set
9453 # CONFIG_MIPS_PB1550 is not set
9454 +# CONFIG_MIPS_HYDROGEN3 is not set
9455 # CONFIG_MIPS_XXS1500 is not set
9456 # CONFIG_MIPS_MTX1 is not set
9457 # CONFIG_COGENT_CSB250 is not set
9458 @@ -227,11 +227,6 @@
9459 #
9460 # CONFIG_IPX is not set
9461 # CONFIG_ATALK is not set
9462 -
9463 -#
9464 -# Appletalk devices
9465 -#
9466 -# CONFIG_DEV_APPLETALK is not set
9467 # CONFIG_DECNET is not set
9468 # CONFIG_BRIDGE is not set
9469 # CONFIG_X25 is not set
9470 @@ -310,9 +305,11 @@
9471 # CONFIG_SCSI_MEGARAID is not set
9472 # CONFIG_SCSI_MEGARAID2 is not set
9473 # CONFIG_SCSI_SATA is not set
9474 +# CONFIG_SCSI_SATA_AHCI is not set
9475 # CONFIG_SCSI_SATA_SVW is not set
9476 # CONFIG_SCSI_ATA_PIIX is not set
9477 # CONFIG_SCSI_SATA_NV is not set
9478 +# CONFIG_SCSI_SATA_QSTOR is not set
9479 # CONFIG_SCSI_SATA_PROMISE is not set
9480 # CONFIG_SCSI_SATA_SX4 is not set
9481 # CONFIG_SCSI_SATA_SIL is not set
9482 @@ -477,7 +474,6 @@
9483 # CONFIG_SERIAL_TXX9 is not set
9484 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9485 # CONFIG_TXX927_SERIAL is not set
9486 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9487 CONFIG_UNIX98_PTYS=y
9488 CONFIG_UNIX98_PTY_COUNT=256
9489
9490 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/cpu-probe.c linux-2.4.32-rc1.mips/arch/mips/kernel/cpu-probe.c
9491 --- linux-2.4.32-rc1/arch/mips/kernel/cpu-probe.c 2005-01-19 15:09:29.000000000 +0100
9492 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/cpu-probe.c 2005-05-25 15:33:22.000000000 +0200
9493 @@ -34,21 +34,16 @@
9494 ".set\tmips0");
9495 }
9496
9497 -/* The Au1xxx wait is available only if we run CONFIG_PM and
9498 - * the timer setup found we had a 32KHz counter available.
9499 - * There are still problems with functions that may call au1k_wait
9500 - * directly, but that will be discovered pretty quickly.
9501 - */
9502 -extern void (*au1k_wait_ptr)(void);
9503 -void au1k_wait(void)
9504 +/* The Au1xxx wait is available only if using 32khz counter or
9505 + * external timer source, but specifically not CP0 Counter. */
9506 +int allow_au1k_wait;
9507 +
9508 +static void au1k_wait(void)
9509 {
9510 -#ifdef CONFIG_PM
9511 - unsigned long addr;
9512 /* using the wait instruction makes CP0 counter unusable */
9513 - __asm__("la %0,au1k_wait\n\t"
9514 - ".set mips3\n\t"
9515 - "cache 0x14,0(%0)\n\t"
9516 - "cache 0x14,32(%0)\n\t"
9517 + __asm__(".set mips3\n\t"
9518 + "cache 0x14, 0(%0)\n\t"
9519 + "cache 0x14, 32(%0)\n\t"
9520 "sync\n\t"
9521 "nop\n\t"
9522 "wait\n\t"
9523 @@ -57,11 +52,7 @@
9524 "nop\n\t"
9525 "nop\n\t"
9526 ".set mips0\n\t"
9527 - : : "r" (addr));
9528 -#else
9529 - __asm__("nop\n\t"
9530 - "nop");
9531 -#endif
9532 + : : "r" (au1k_wait));
9533 }
9534
9535 static inline void check_wait(void)
9536 @@ -100,20 +91,17 @@
9537 cpu_wait = r4k_wait;
9538 printk(" available.\n");
9539 break;
9540 -#ifdef CONFIG_PM
9541 case CPU_AU1000:
9542 case CPU_AU1100:
9543 case CPU_AU1500:
9544 case CPU_AU1550:
9545 - if (au1k_wait_ptr != NULL) {
9546 - cpu_wait = au1k_wait_ptr;
9547 + case CPU_AU1200:
9548 + if (allow_au1k_wait) {
9549 + cpu_wait = au1k_wait;
9550 printk(" available.\n");
9551 - }
9552 - else {
9553 + } else
9554 printk(" unavailable.\n");
9555 - }
9556 break;
9557 -#endif
9558 default:
9559 printk(" unavailable.\n");
9560 break;
9561 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/head.S linux-2.4.32-rc1.mips/arch/mips/kernel/head.S
9562 --- linux-2.4.32-rc1/arch/mips/kernel/head.S 2005-01-19 15:09:29.000000000 +0100
9563 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/head.S 2004-11-22 14:38:23.000000000 +0100
9564 @@ -43,9 +43,9 @@
9565
9566 /* Cache Error */
9567 LEAF(except_vec2_generic)
9568 + .set push
9569 .set noreorder
9570 .set noat
9571 - .set mips0
9572 /*
9573 * This is a very bad place to be. Our cache error
9574 * detection has triggered. If we have write-back data
9575 @@ -64,10 +64,9 @@
9576
9577 j cache_parity_error
9578 nop
9579 + .set pop
9580 END(except_vec2_generic)
9581
9582 - .set at
9583 -
9584 /*
9585 * Special interrupt vector for embedded MIPS. This is a
9586 * dedicated interrupt vector which reduces interrupt processing
9587 @@ -76,8 +75,11 @@
9588 * size!
9589 */
9590 NESTED(except_vec4, 0, sp)
9591 + .set push
9592 + .set noreorder
9593 1: j 1b /* Dummy, will be replaced */
9594 nop
9595 + .set pop
9596 END(except_vec4)
9597
9598 /*
9599 @@ -87,8 +89,11 @@
9600 * unconditional jump to this vector.
9601 */
9602 NESTED(except_vec_ejtag_debug, 0, sp)
9603 + .set push
9604 + .set noreorder
9605 j ejtag_debug_handler
9606 nop
9607 + .set pop
9608 END(except_vec_ejtag_debug)
9609
9610 __FINIT
9611 @@ -97,6 +102,7 @@
9612 * EJTAG debug exception handler.
9613 */
9614 NESTED(ejtag_debug_handler, PT_SIZE, sp)
9615 + .set push
9616 .set noat
9617 .set noreorder
9618 mtc0 k0, CP0_DESAVE
9619 @@ -120,7 +126,7 @@
9620 deret
9621 .set mips0
9622 nop
9623 - .set at
9624 + .set pop
9625 END(ejtag_debug_handler)
9626
9627 __INIT
9628 @@ -132,13 +138,17 @@
9629 * unconditional jump to this vector.
9630 */
9631 NESTED(except_vec_nmi, 0, sp)
9632 + .set push
9633 + .set noreorder
9634 j nmi_handler
9635 nop
9636 + .set pop
9637 END(except_vec_nmi)
9638
9639 __FINIT
9640
9641 NESTED(nmi_handler, PT_SIZE, sp)
9642 + .set push
9643 .set noat
9644 .set noreorder
9645 .set mips3
9646 @@ -147,8 +157,7 @@
9647 move a0, sp
9648 RESTORE_ALL
9649 eret
9650 - .set at
9651 - .set mips0
9652 + .set pop
9653 END(nmi_handler)
9654
9655 __INIT
9656 @@ -157,7 +166,20 @@
9657 * Kernel entry point
9658 */
9659 NESTED(kernel_entry, 16, sp)
9660 + .set push
9661 + /*
9662 + * For the moment disable interrupts and mark the kernel mode.
9663 + * A full initialization of the CPU's status register is done
9664 + * later in per_cpu_trap_init().
9665 + */
9666 + mfc0 t0, CP0_STATUS
9667 + or t0, ST0_CU0|0x1f
9668 + xor t0, 0x1f
9669 + mtc0 t0, CP0_STATUS
9670 +
9671 .set noreorder
9672 + sll zero,3 # ehb
9673 + .set reorder
9674
9675 /*
9676 * The firmware/bootloader passes argc/argp/envp
9677 @@ -170,8 +192,8 @@
9678 la t1, (_end - 4)
9679 1:
9680 addiu t0, 4
9681 + sw zero, (t0)
9682 bne t0, t1, 1b
9683 - sw zero, (t0)
9684
9685 /*
9686 * Stack for kernel and init, current variable
9687 @@ -182,7 +204,7 @@
9688 sw t0, kernelsp
9689
9690 jal init_arch
9691 - nop
9692 + .set pop
9693 END(kernel_entry)
9694
9695
9696 @@ -193,17 +215,26 @@
9697 * function after setting up the stack and gp registers.
9698 */
9699 LEAF(smp_bootstrap)
9700 - .set push
9701 - .set noreorder
9702 - mtc0 zero, CP0_WIRED
9703 - CLI
9704 + .set push
9705 + /*
9706 + * For the moment disable interrupts and bootstrap exception
9707 + * vectors and mark the kernel mode. A full initialization of
9708 + * the CPU's status register is done later in
9709 + * per_cpu_trap_init().
9710 + */
9711 mfc0 t0, CP0_STATUS
9712 - li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
9713 - and t0, t1
9714 - or t0, (ST0_CU0);
9715 + or t0, ST0_CU0|ST0_BEV|0x1f
9716 + xor t0, ST0_BEV|0x1f
9717 + mtc0 t0, CP0_STATUS
9718 +
9719 + .set noreorder
9720 + sll zero,3 # ehb
9721 + .set reorder
9722 +
9723 + mtc0 zero, CP0_WIRED
9724 +
9725 jal start_secondary
9726 - mtc0 t0, CP0_STATUS
9727 - .set pop
9728 + .set pop
9729 END(smp_bootstrap)
9730 #endif
9731
9732 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/process.c linux-2.4.32-rc1.mips/arch/mips/kernel/process.c
9733 --- linux-2.4.32-rc1/arch/mips/kernel/process.c 2003-08-25 13:44:40.000000000 +0200
9734 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/process.c 2005-04-14 12:41:44.000000000 +0200
9735 @@ -128,6 +128,26 @@
9736 return 1;
9737 }
9738
9739 +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
9740 +{
9741 + int i;
9742 +
9743 + for (i = 0; i < EF_REG0; i++)
9744 + gp[i] = 0;
9745 + gp[EF_REG0] = 0;
9746 + for (i = 1; i <= 31; i++)
9747 + gp[EF_REG0 + i] = regs->regs[i];
9748 + gp[EF_REG26] = 0;
9749 + gp[EF_REG27] = 0;
9750 + gp[EF_LO] = regs->lo;
9751 + gp[EF_HI] = regs->hi;
9752 + gp[EF_CP0_EPC] = regs->cp0_epc;
9753 + gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
9754 + gp[EF_CP0_STATUS] = regs->cp0_status;
9755 + gp[EF_CP0_CAUSE] = regs->cp0_cause;
9756 + gp[EF_UNUSED0] = 0;
9757 +}
9758 +
9759 /*
9760 * Create a kernel thread
9761 */
9762 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/scall_o32.S linux-2.4.32-rc1.mips/arch/mips/kernel/scall_o32.S
9763 --- linux-2.4.32-rc1/arch/mips/kernel/scall_o32.S 2005-01-19 15:09:29.000000000 +0100
9764 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/scall_o32.S 2005-02-07 22:21:53.000000000 +0100
9765 @@ -121,15 +121,14 @@
9766
9767 trace_a_syscall:
9768 SAVE_STATIC
9769 - sw t2, PT_R1(sp)
9770 + move s0, t2
9771 jal syscall_trace
9772 - lw t2, PT_R1(sp)
9773
9774 lw a0, PT_R4(sp) # Restore argument registers
9775 lw a1, PT_R5(sp)
9776 lw a2, PT_R6(sp)
9777 lw a3, PT_R7(sp)
9778 - jalr t2
9779 + jalr s0
9780
9781 li t0, -EMAXERRNO - 1 # error?
9782 sltu t0, t0, v0
9783 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/setup.c linux-2.4.32-rc1.mips/arch/mips/kernel/setup.c
9784 --- linux-2.4.32-rc1/arch/mips/kernel/setup.c 2005-01-19 15:09:29.000000000 +0100
9785 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/setup.c 2005-01-13 22:15:57.000000000 +0100
9786 @@ -5,7 +5,7 @@
9787 *
9788 * Copyright (C) 1995 Linus Torvalds
9789 * Copyright (C) 1995 Waldorf Electronics
9790 - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
9791 + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05 Ralf Baechle
9792 * Copyright (C) 1996 Stoned Elipot
9793 * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
9794 */
9795 @@ -71,6 +71,8 @@
9796 extern struct rtc_ops no_rtc_ops;
9797 struct rtc_ops *rtc_ops;
9798
9799 +EXPORT_SYMBOL(rtc_ops);
9800 +
9801 #ifdef CONFIG_PC_KEYB
9802 struct kbd_ops *kbd_ops;
9803 #endif
9804 @@ -132,10 +134,6 @@
9805 */
9806 load_mmu();
9807
9808 - /* Disable coprocessors and set FPU for 16/32 FPR register model */
9809 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
9810 - set_c0_status(ST0_CU0);
9811 -
9812 start_kernel();
9813 }
9814
9815 diff -Nur linux-2.4.32-rc1/arch/mips/kernel/traps.c linux-2.4.32-rc1.mips/arch/mips/kernel/traps.c
9816 --- linux-2.4.32-rc1/arch/mips/kernel/traps.c 2005-01-19 15:09:29.000000000 +0100
9817 +++ linux-2.4.32-rc1.mips/arch/mips/kernel/traps.c 2005-04-12 22:25:34.000000000 +0200
9818 @@ -452,9 +452,10 @@
9819 }
9820 ll_task = current;
9821
9822 + compute_return_epc(regs);
9823 +
9824 regs->regs[(opcode & RT) >> 16] = value;
9825
9826 - compute_return_epc(regs);
9827 return;
9828
9829 sig:
9830 @@ -485,8 +486,8 @@
9831 goto sig;
9832 }
9833 if (ll_bit == 0 || ll_task != current) {
9834 - regs->regs[reg] = 0;
9835 compute_return_epc(regs);
9836 + regs->regs[reg] = 0;
9837 return;
9838 }
9839
9840 @@ -495,9 +496,9 @@
9841 goto sig;
9842 }
9843
9844 + compute_return_epc(regs);
9845 regs->regs[reg] = 1;
9846
9847 - compute_return_epc(regs);
9848 return;
9849
9850 sig:
9851 @@ -887,12 +888,18 @@
9852 void __init per_cpu_trap_init(void)
9853 {
9854 unsigned int cpu = smp_processor_id();
9855 + unsigned int status_set = ST0_CU0;
9856
9857 - /* Some firmware leaves the BEV flag set, clear it. */
9858 - clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
9859 -
9860 + /*
9861 + * Disable coprocessors and 64-bit addressing and set FPU for
9862 + * the 16/32 FPR register model. Reset the BEV flag that some
9863 + * firmware may have left set and the TS bit (for IP27). Set
9864 + * XX for ISA IV code to work.
9865 + */
9866 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
9867 - set_c0_status(ST0_XX);
9868 + status_set |= ST0_XX;
9869 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
9870 + status_set);
9871
9872 /*
9873 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
9874 @@ -902,7 +909,7 @@
9875 set_c0_cause(CAUSEF_IV);
9876
9877 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
9878 - write_c0_context(cpu << 23);
9879 + TLBMISS_HANDLER_SETUP();
9880
9881 atomic_inc(&init_mm.mm_count);
9882 current->active_mm = &init_mm;
9883 @@ -918,8 +925,6 @@
9884 extern char except_vec4;
9885 unsigned long i;
9886
9887 - per_cpu_trap_init();
9888 -
9889 /* Copy the generic exception handler code to it's final destination. */
9890 memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
9891
9892 @@ -1020,10 +1025,5 @@
9893
9894 flush_icache_range(KSEG0, KSEG0 + 0x400);
9895
9896 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
9897 - current->active_mm = &init_mm;
9898 -
9899 - /* XXX Must be done for all CPUs */
9900 - current_cpu_data.asid_cache = ASID_FIRST_VERSION;
9901 - TLBMISS_HANDLER_SETUP();
9902 + per_cpu_trap_init();
9903 }
9904 diff -Nur linux-2.4.32-rc1/arch/mips/lib/rtc-no.c linux-2.4.32-rc1.mips/arch/mips/lib/rtc-no.c
9905 --- linux-2.4.32-rc1/arch/mips/lib/rtc-no.c 2004-02-18 14:36:30.000000000 +0100
9906 +++ linux-2.4.32-rc1.mips/arch/mips/lib/rtc-no.c 2005-01-13 22:15:57.000000000 +0100
9907 @@ -6,10 +6,9 @@
9908 * Stub RTC routines to keep Linux from crashing on machine which don't
9909 * have a RTC chip.
9910 *
9911 - * Copyright (C) 1998, 2001 by Ralf Baechle
9912 + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
9913 */
9914 #include <linux/kernel.h>
9915 -#include <linux/module.h>
9916 #include <linux/mc146818rtc.h>
9917
9918 static unsigned int shouldnt_happen(void)
9919 @@ -29,5 +28,3 @@
9920 .rtc_write_data = (void *) &shouldnt_happen,
9921 .rtc_bcd_mode = (void *) &shouldnt_happen
9922 };
9923 -
9924 -EXPORT_SYMBOL(rtc_ops);
9925 diff -Nur linux-2.4.32-rc1/arch/mips/lib/rtc-std.c linux-2.4.32-rc1.mips/arch/mips/lib/rtc-std.c
9926 --- linux-2.4.32-rc1/arch/mips/lib/rtc-std.c 2004-02-18 14:36:30.000000000 +0100
9927 +++ linux-2.4.32-rc1.mips/arch/mips/lib/rtc-std.c 2005-01-13 22:15:57.000000000 +0100
9928 @@ -5,9 +5,8 @@
9929 *
9930 * RTC routines for PC style attached Dallas chip.
9931 *
9932 - * Copyright (C) 1998, 2001 by Ralf Baechle
9933 + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
9934 */
9935 -#include <linux/module.h>
9936 #include <linux/mc146818rtc.h>
9937 #include <asm/io.h>
9938
9939 @@ -33,5 +32,3 @@
9940 &std_rtc_write_data,
9941 &std_rtc_bcd_mode
9942 };
9943 -
9944 -EXPORT_SYMBOL(rtc_ops);
9945 diff -Nur linux-2.4.32-rc1/arch/mips/Makefile linux-2.4.32-rc1.mips/arch/mips/Makefile
9946 --- linux-2.4.32-rc1/arch/mips/Makefile 2005-01-19 15:09:26.000000000 +0100
9947 +++ linux-2.4.32-rc1.mips/arch/mips/Makefile 2005-01-30 09:01:26.000000000 +0100
9948 @@ -211,7 +211,7 @@
9949 endif
9950
9951 #
9952 -# Au1000 (Alchemy Semi PB1000) eval board
9953 +# Au1x AMD Alchemy eval boards
9954 #
9955 ifdef CONFIG_MIPS_PB1000
9956 LIBS += arch/mips/au1000/pb1000/pb1000.o \
9957 @@ -220,9 +220,6 @@
9958 LOADADDR := 0x80100000
9959 endif
9960
9961 -#
9962 -# Au1100 (Alchemy Semi PB1100) eval board
9963 -#
9964 ifdef CONFIG_MIPS_PB1100
9965 LIBS += arch/mips/au1000/pb1100/pb1100.o \
9966 arch/mips/au1000/common/au1000.o
9967 @@ -230,9 +227,6 @@
9968 LOADADDR += 0x80100000
9969 endif
9970
9971 -#
9972 -# Au1500 (Alchemy Semi PB1500) eval board
9973 -#
9974 ifdef CONFIG_MIPS_PB1500
9975 LIBS += arch/mips/au1000/pb1500/pb1500.o \
9976 arch/mips/au1000/common/au1000.o
9977 @@ -240,9 +234,6 @@
9978 LOADADDR := 0x80100000
9979 endif
9980
9981 -#
9982 -# Au1x00 (AMD/Alchemy) eval boards
9983 -#
9984 ifdef CONFIG_MIPS_DB1000
9985 LIBS += arch/mips/au1000/db1x00/db1x00.o \
9986 arch/mips/au1000/common/au1000.o
9987 @@ -313,6 +304,27 @@
9988 LOADADDR += 0x80100000
9989 endif
9990
9991 +ifdef CONFIG_MIPS_PB1200
9992 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
9993 + arch/mips/au1000/common/au1000.o
9994 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
9995 +LOADADDR += 0x80100000
9996 +endif
9997 +
9998 +ifdef CONFIG_MIPS_DB1200
9999 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
10000 + arch/mips/au1000/common/au1000.o
10001 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
10002 +LOADADDR += 0x80100000
10003 +endif
10004 +
10005 +ifdef CONFIG_MIPS_FICMMP
10006 +LIBS += arch/mips/au1000/ficmmp/ficmmp.o \
10007 + arch/mips/au1000/common/au1000.o
10008 +SUBDIRS += arch/mips/au1000/ficmmp arch/mips/au1000/common
10009 +LOADADDR += 0x80100000
10010 +endif
10011 +
10012
10013 #
10014 # Cogent CSB250
10015 diff -Nur linux-2.4.32-rc1/arch/mips/mm/cerr-sb1.c linux-2.4.32-rc1.mips/arch/mips/mm/cerr-sb1.c
10016 --- linux-2.4.32-rc1/arch/mips/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
10017 +++ linux-2.4.32-rc1.mips/arch/mips/mm/cerr-sb1.c 2004-12-13 18:37:23.000000000 +0100
10018 @@ -252,14 +252,14 @@
10019
10020 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
10021 static const uint64_t mask_72_64[8] = {
10022 - 0x0738C808099264FFL,
10023 - 0x38C808099264FF07L,
10024 - 0xC808099264FF0738L,
10025 - 0x08099264FF0738C8L,
10026 - 0x099264FF0738C808L,
10027 - 0x9264FF0738C80809L,
10028 - 0x64FF0738C8080992L,
10029 - 0xFF0738C808099264L
10030 + 0x0738C808099264FFULL,
10031 + 0x38C808099264FF07ULL,
10032 + 0xC808099264FF0738ULL,
10033 + 0x08099264FF0738C8ULL,
10034 + 0x099264FF0738C808ULL,
10035 + 0x9264FF0738C80809ULL,
10036 + 0x64FF0738C8080992ULL,
10037 + 0xFF0738C808099264ULL
10038 };
10039
10040 /* Calculate the parity on a range of bits */
10041 @@ -331,9 +331,9 @@
10042 ((lru >> 4) & 0x3),
10043 ((lru >> 6) & 0x3));
10044 }
10045 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
10046 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
10047 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
10048 - va |= 0x3FFFF00000000000;
10049 + va |= 0x3FFFF00000000000ULL;
10050 valid = ((taghi >> 29) & 1);
10051 if (valid) {
10052 tlo_tmp = taglo & 0xfff3ff;
10053 @@ -474,7 +474,7 @@
10054 : "r" ((way << 13) | addr));
10055
10056 taglo = ((unsigned long long)taglohi << 32) | taglolo;
10057 - pa = (taglo & 0xFFFFFFE000) | addr;
10058 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
10059 if (way == 0) {
10060 lru = (taghi >> 14) & 0xff;
10061 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
10062 diff -Nur linux-2.4.32-rc1/arch/mips/mm/c-r4k.c linux-2.4.32-rc1.mips/arch/mips/mm/c-r4k.c
10063 --- linux-2.4.32-rc1/arch/mips/mm/c-r4k.c 2005-01-19 15:09:29.000000000 +0100
10064 +++ linux-2.4.32-rc1.mips/arch/mips/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
10065 @@ -867,9 +867,16 @@
10066 * normally they'd suffer from aliases but magic in the hardware deals
10067 * with that for us so we don't need to take care ourselves.
10068 */
10069 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
10070 - if (c->dcache.waysize > PAGE_SIZE)
10071 - c->dcache.flags |= MIPS_CACHE_ALIASES;
10072 + switch (c->cputype) {
10073 + case CPU_R10000:
10074 + case CPU_R12000:
10075 + break;
10076 + case CPU_24K:
10077 + if (!(read_c0_config7() & (1 << 16)))
10078 + default:
10079 + if (c->dcache.waysize > PAGE_SIZE)
10080 + c->dcache.flags |= MIPS_CACHE_ALIASES;
10081 + }
10082
10083 switch (c->cputype) {
10084 case CPU_20KC:
10085 @@ -1069,9 +1076,6 @@
10086 probe_pcache();
10087 setup_scache();
10088
10089 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
10090 - c->dcache.flags |= MIPS_CACHE_ALIASES;
10091 -
10092 r4k_blast_dcache_page_setup();
10093 r4k_blast_dcache_page_indexed_setup();
10094 r4k_blast_dcache_setup();
10095 diff -Nur linux-2.4.32-rc1/arch/mips/mm/tlbex-mips32.S linux-2.4.32-rc1.mips/arch/mips/mm/tlbex-mips32.S
10096 --- linux-2.4.32-rc1/arch/mips/mm/tlbex-mips32.S 2004-02-18 14:36:30.000000000 +0100
10097 +++ linux-2.4.32-rc1.mips/arch/mips/mm/tlbex-mips32.S 2004-11-29 00:33:15.000000000 +0100
10098 @@ -196,7 +196,7 @@
10099 .set noat; \
10100 SAVE_ALL; \
10101 mfc0 a2, CP0_BADVADDR; \
10102 - STI; \
10103 + KMODE; \
10104 .set at; \
10105 move a0, sp; \
10106 jal do_page_fault; \
10107 diff -Nur linux-2.4.32-rc1/arch/mips/mm/tlbex-r4k.S linux-2.4.32-rc1.mips/arch/mips/mm/tlbex-r4k.S
10108 --- linux-2.4.32-rc1/arch/mips/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
10109 +++ linux-2.4.32-rc1.mips/arch/mips/mm/tlbex-r4k.S 2005-06-06 16:46:22.000000000 +0200
10110 @@ -184,13 +184,10 @@
10111 P_MTC0 k0, CP0_ENTRYLO0 # load it
10112 PTE_SRL k1, k1, 6 # convert to entrylo1
10113 P_MTC0 k1, CP0_ENTRYLO1 # load it
10114 - b 1f
10115 - rm9000_tlb_hazard
10116 + mtc0_tlbw_hazard
10117 tlbwr # write random tlb entry
10118 -1:
10119 - nop
10120 - rm9000_tlb_hazard
10121 - eret # return from trap
10122 + tlbw_eret_hazard
10123 + eret
10124 END(except_vec0_r4000)
10125
10126 /* TLB refill, EXL == 0, R4600 version */
10127 @@ -468,13 +465,9 @@
10128 PTE_PRESENT(k0, k1, nopage_tlbl)
10129 PTE_MAKEVALID(k0, k1)
10130 PTE_RELOAD(k1, k0)
10131 - rm9000_tlb_hazard
10132 - nop
10133 - b 1f
10134 - tlbwi
10135 -1:
10136 - nop
10137 - rm9000_tlb_hazard
10138 + mtc0_tlbw_hazard
10139 + tlbwi
10140 + tlbw_eret_hazard
10141 .set mips3
10142 eret
10143 .set mips0
10144 @@ -496,13 +489,9 @@
10145 PTE_WRITABLE(k0, k1, nopage_tlbs)
10146 PTE_MAKEWRITE(k0, k1)
10147 PTE_RELOAD(k1, k0)
10148 - rm9000_tlb_hazard
10149 - nop
10150 - b 1f
10151 - tlbwi
10152 -1:
10153 - nop
10154 - rm9000_tlb_hazard
10155 + mtc0_tlbw_hazard
10156 + tlbwi
10157 + tlbw_eret_hazard
10158 .set mips3
10159 eret
10160 .set mips0
10161 @@ -529,13 +518,9 @@
10162
10163 /* Now reload the entry into the tlb. */
10164 PTE_RELOAD(k1, k0)
10165 - rm9000_tlb_hazard
10166 - nop
10167 - b 1f
10168 - tlbwi
10169 -1:
10170 - rm9000_tlb_hazard
10171 - nop
10172 + mtc0_tlbw_hazard
10173 + tlbwi
10174 + tlbw_eret_hazard
10175 .set mips3
10176 eret
10177 .set mips0
10178 diff -Nur linux-2.4.32-rc1/arch/mips/mm/tlb-r4k.c linux-2.4.32-rc1.mips/arch/mips/mm/tlb-r4k.c
10179 --- linux-2.4.32-rc1/arch/mips/mm/tlb-r4k.c 2005-01-19 15:09:29.000000000 +0100
10180 +++ linux-2.4.32-rc1.mips/arch/mips/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
10181 @@ -3,17 +3,12 @@
10182 * License. See the file "COPYING" in the main directory of this archive
10183 * for more details.
10184 *
10185 - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
10186 - *
10187 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
10188 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
10189 - *
10190 - * To do:
10191 - *
10192 - * - this code is a overbloated pig
10193 - * - many of the bug workarounds are not efficient at all, but at
10194 - * least they are functional ...
10195 + * Carsten Langgaard, carstenl@mips.com
10196 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
10197 */
10198 +#include <linux/config.h>
10199 #include <linux/init.h>
10200 #include <linux/sched.h>
10201 #include <linux/mm.h>
10202 @@ -25,9 +20,6 @@
10203 #include <asm/pgtable.h>
10204 #include <asm/system.h>
10205
10206 -#undef DEBUG_TLB
10207 -#undef DEBUG_TLBUPDATE
10208 -
10209 extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
10210
10211 /* CP0 hazard avoidance. */
10212 @@ -41,33 +33,23 @@
10213 unsigned long old_ctx;
10214 int entry;
10215
10216 -#ifdef DEBUG_TLB
10217 - printk("[tlball]");
10218 -#endif
10219 -
10220 local_irq_save(flags);
10221 /* Save old context and create impossible VPN2 value */
10222 old_ctx = read_c0_entryhi();
10223 write_c0_entrylo0(0);
10224 write_c0_entrylo1(0);
10225 - BARRIER;
10226
10227 entry = read_c0_wired();
10228
10229 /* Blast 'em all away. */
10230 while (entry < current_cpu_data.tlbsize) {
10231 - /*
10232 - * Make sure all entries differ. If they're not different
10233 - * MIPS32 will take revenge ...
10234 - */
10235 write_c0_entryhi(KSEG0 + entry*0x2000);
10236 write_c0_index(entry);
10237 - BARRIER;
10238 + mtc0_tlbw_hazard();
10239 tlb_write_indexed();
10240 - BARRIER;
10241 entry++;
10242 }
10243 - BARRIER;
10244 + tlbw_use_hazard();
10245 write_c0_entryhi(old_ctx);
10246 local_irq_restore(flags);
10247 }
10248 @@ -76,12 +58,8 @@
10249 {
10250 int cpu = smp_processor_id();
10251
10252 - if (cpu_context(cpu, mm) != 0) {
10253 -#ifdef DEBUG_TLB
10254 - printk("[tlbmm<%d>]", cpu_context(cpu, mm));
10255 -#endif
10256 + if (cpu_context(cpu, mm) != 0)
10257 drop_mmu_context(mm,cpu);
10258 - }
10259 }
10260
10261 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
10262 @@ -93,10 +71,6 @@
10263 unsigned long flags;
10264 int size;
10265
10266 -#ifdef DEBUG_TLB
10267 - printk("[tlbrange<%02x,%08lx,%08lx>]",
10268 - cpu_asid(cpu, mm), start, end);
10269 -#endif
10270 local_irq_save(flags);
10271 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
10272 size = (size + 1) >> 1;
10273 @@ -112,7 +86,7 @@
10274
10275 write_c0_entryhi(start | newpid);
10276 start += (PAGE_SIZE << 1);
10277 - BARRIER;
10278 + mtc0_tlbw_hazard();
10279 tlb_probe();
10280 BARRIER;
10281 idx = read_c0_index();
10282 @@ -122,10 +96,10 @@
10283 continue;
10284 /* Make sure all entries differ. */
10285 write_c0_entryhi(KSEG0 + idx*0x2000);
10286 - BARRIER;
10287 + mtc0_tlbw_hazard();
10288 tlb_write_indexed();
10289 - BARRIER;
10290 }
10291 + tlbw_use_hazard();
10292 write_c0_entryhi(oldpid);
10293 } else {
10294 drop_mmu_context(mm, cpu);
10295 @@ -138,34 +112,30 @@
10296 {
10297 int cpu = smp_processor_id();
10298
10299 - if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
10300 + if (cpu_context(cpu, vma->vm_mm) != 0) {
10301 unsigned long flags;
10302 - int oldpid, newpid, idx;
10303 + unsigned long oldpid, newpid, idx;
10304
10305 -#ifdef DEBUG_TLB
10306 - printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
10307 - page);
10308 -#endif
10309 newpid = cpu_asid(cpu, vma->vm_mm);
10310 page &= (PAGE_MASK << 1);
10311 local_irq_save(flags);
10312 oldpid = read_c0_entryhi();
10313 write_c0_entryhi(page | newpid);
10314 - BARRIER;
10315 + mtc0_tlbw_hazard();
10316 tlb_probe();
10317 BARRIER;
10318 idx = read_c0_index();
10319 write_c0_entrylo0(0);
10320 write_c0_entrylo1(0);
10321 - if(idx < 0)
10322 + if (idx < 0)
10323 goto finish;
10324 /* Make sure all entries differ. */
10325 write_c0_entryhi(KSEG0+idx*0x2000);
10326 - BARRIER;
10327 + mtc0_tlbw_hazard();
10328 tlb_write_indexed();
10329 + tlbw_use_hazard();
10330
10331 finish:
10332 - BARRIER;
10333 write_c0_entryhi(oldpid);
10334 local_irq_restore(flags);
10335 }
10336 @@ -185,7 +155,7 @@
10337
10338 local_irq_save(flags);
10339 write_c0_entryhi(page);
10340 - BARRIER;
10341 + mtc0_tlbw_hazard();
10342 tlb_probe();
10343 BARRIER;
10344 idx = read_c0_index();
10345 @@ -194,18 +164,19 @@
10346 if (idx >= 0) {
10347 /* Make sure all entries differ. */
10348 write_c0_entryhi(KSEG0+idx*0x2000);
10349 + mtc0_tlbw_hazard();
10350 tlb_write_indexed();
10351 + tlbw_use_hazard();
10352 }
10353 - BARRIER;
10354 write_c0_entryhi(oldpid);
10355 +
10356 local_irq_restore(flags);
10357 }
10358
10359 EXPORT_SYMBOL(local_flush_tlb_one);
10360
10361 -/* We will need multiple versions of update_mmu_cache(), one that just
10362 - * updates the TLB with the new pte(s), and another which also checks
10363 - * for the R4k "end of page" hardware bug and does the needy.
10364 +/*
10365 + * Updates the TLB with the new pte(s).
10366 */
10367 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
10368 {
10369 @@ -223,25 +194,16 @@
10370
10371 pid = read_c0_entryhi() & ASID_MASK;
10372
10373 -#ifdef DEBUG_TLB
10374 - if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
10375 - (cpu_context(vma->vm_mm) == 0)) {
10376 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
10377 - "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
10378 - }
10379 -#endif
10380 -
10381 local_irq_save(flags);
10382 address &= (PAGE_MASK << 1);
10383 write_c0_entryhi(address | pid);
10384 pgdp = pgd_offset(vma->vm_mm, address);
10385 - BARRIER;
10386 + mtc0_tlbw_hazard();
10387 tlb_probe();
10388 BARRIER;
10389 pmdp = pmd_offset(pgdp, address);
10390 idx = read_c0_index();
10391 ptep = pte_offset(pmdp, address);
10392 - BARRIER;
10393 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
10394 write_c0_entrylo0(ptep->pte_high);
10395 ptep++;
10396 @@ -251,15 +213,13 @@
10397 write_c0_entrylo1(pte_val(*ptep) >> 6);
10398 #endif
10399 write_c0_entryhi(address | pid);
10400 - BARRIER;
10401 - if (idx < 0) {
10402 + mtc0_tlbw_hazard();
10403 + if (idx < 0)
10404 tlb_write_random();
10405 - } else {
10406 + else
10407 tlb_write_indexed();
10408 - }
10409 - BARRIER;
10410 + tlbw_use_hazard();
10411 write_c0_entryhi(pid);
10412 - BARRIER;
10413 local_irq_restore(flags);
10414 }
10415
10416 @@ -279,24 +239,26 @@
10417 asid = read_c0_entryhi() & ASID_MASK;
10418 write_c0_entryhi(address | asid);
10419 pgdp = pgd_offset(vma->vm_mm, address);
10420 + mtc0_tlbw_hazard();
10421 tlb_probe();
10422 + BARRIER;
10423 pmdp = pmd_offset(pgdp, address);
10424 idx = read_c0_index();
10425 ptep = pte_offset(pmdp, address);
10426 write_c0_entrylo0(pte_val(*ptep++) >> 6);
10427 write_c0_entrylo1(pte_val(*ptep) >> 6);
10428 - BARRIER;
10429 + mtc0_tlbw_hazard();
10430 if (idx < 0)
10431 tlb_write_random();
10432 else
10433 tlb_write_indexed();
10434 - BARRIER;
10435 + tlbw_use_hazard();
10436 local_irq_restore(flags);
10437 }
10438 #endif
10439
10440 void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
10441 - unsigned long entryhi, unsigned long pagemask)
10442 + unsigned long entryhi, unsigned long pagemask)
10443 {
10444 unsigned long flags;
10445 unsigned long wired;
10446 @@ -315,9 +277,9 @@
10447 write_c0_entryhi(entryhi);
10448 write_c0_entrylo0(entrylo0);
10449 write_c0_entrylo1(entrylo1);
10450 - BARRIER;
10451 + mtc0_tlbw_hazard();
10452 tlb_write_indexed();
10453 - BARRIER;
10454 + tlbw_use_hazard();
10455
10456 write_c0_entryhi(old_ctx);
10457 BARRIER;
10458 @@ -355,17 +317,15 @@
10459 }
10460
10461 write_c0_index(temp_tlb_entry);
10462 - BARRIER;
10463 write_c0_pagemask(pagemask);
10464 write_c0_entryhi(entryhi);
10465 write_c0_entrylo0(entrylo0);
10466 write_c0_entrylo1(entrylo1);
10467 - BARRIER;
10468 + mtc0_tlbw_hazard();
10469 tlb_write_indexed();
10470 - BARRIER;
10471 + tlbw_use_hazard();
10472
10473 write_c0_entryhi(old_ctx);
10474 - BARRIER;
10475 write_c0_pagemask(old_pagemask);
10476 out:
10477 local_irq_restore(flags);
10478 @@ -375,7 +335,7 @@
10479 static void __init probe_tlb(unsigned long config)
10480 {
10481 struct cpuinfo_mips *c = &current_cpu_data;
10482 - unsigned int reg;
10483 + unsigned int config1;
10484
10485 /*
10486 * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
10487 @@ -385,16 +345,16 @@
10488 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
10489 return;
10490
10491 - reg = read_c0_config1();
10492 + config1 = read_c0_config1();
10493 if (!((config >> 7) & 3))
10494 panic("No TLB present");
10495
10496 - c->tlbsize = ((reg >> 25) & 0x3f) + 1;
10497 + c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
10498 }
10499
10500 void __init r4k_tlb_init(void)
10501 {
10502 - u32 config = read_c0_config();
10503 + unsigned int config = read_c0_config();
10504
10505 /*
10506 * You should never change this register:
10507 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig linux-2.4.32-rc1.mips/arch/mips64/defconfig
10508 --- linux-2.4.32-rc1/arch/mips64/defconfig 2005-01-19 15:09:30.000000000 +0100
10509 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig 2005-03-18 13:13:23.000000000 +0100
10510 @@ -30,8 +30,8 @@
10511 # CONFIG_MIPS_PB1000 is not set
10512 # CONFIG_MIPS_PB1100 is not set
10513 # CONFIG_MIPS_PB1500 is not set
10514 -# CONFIG_MIPS_HYDROGEN3 is not set
10515 # CONFIG_MIPS_PB1550 is not set
10516 +# CONFIG_MIPS_HYDROGEN3 is not set
10517 # CONFIG_MIPS_XXS1500 is not set
10518 # CONFIG_MIPS_MTX1 is not set
10519 # CONFIG_COGENT_CSB250 is not set
10520 @@ -470,9 +470,11 @@
10521 # CONFIG_SCSI_MEGARAID is not set
10522 # CONFIG_SCSI_MEGARAID2 is not set
10523 # CONFIG_SCSI_SATA is not set
10524 +# CONFIG_SCSI_SATA_AHCI is not set
10525 # CONFIG_SCSI_SATA_SVW is not set
10526 # CONFIG_SCSI_ATA_PIIX is not set
10527 # CONFIG_SCSI_SATA_NV is not set
10528 +# CONFIG_SCSI_SATA_QSTOR is not set
10529 # CONFIG_SCSI_SATA_PROMISE is not set
10530 # CONFIG_SCSI_SATA_SX4 is not set
10531 # CONFIG_SCSI_SATA_SIL is not set
10532 @@ -658,7 +660,6 @@
10533 CONFIG_SERIAL_CONSOLE=y
10534 # CONFIG_SERIAL_EXTENDED is not set
10535 # CONFIG_SERIAL_NONSTANDARD is not set
10536 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10537 CONFIG_UNIX98_PTYS=y
10538 CONFIG_UNIX98_PTY_COUNT=256
10539
10540 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-atlas linux-2.4.32-rc1.mips/arch/mips64/defconfig-atlas
10541 --- linux-2.4.32-rc1/arch/mips64/defconfig-atlas 2005-01-19 15:09:30.000000000 +0100
10542 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-atlas 2005-03-18 13:13:23.000000000 +0100
10543 @@ -28,8 +28,8 @@
10544 # CONFIG_MIPS_PB1000 is not set
10545 # CONFIG_MIPS_PB1100 is not set
10546 # CONFIG_MIPS_PB1500 is not set
10547 -# CONFIG_MIPS_HYDROGEN3 is not set
10548 # CONFIG_MIPS_PB1550 is not set
10549 +# CONFIG_MIPS_HYDROGEN3 is not set
10550 # CONFIG_MIPS_XXS1500 is not set
10551 # CONFIG_MIPS_MTX1 is not set
10552 # CONFIG_COGENT_CSB250 is not set
10553 @@ -232,11 +232,6 @@
10554 #
10555 # CONFIG_IPX is not set
10556 # CONFIG_ATALK is not set
10557 -
10558 -#
10559 -# Appletalk devices
10560 -#
10561 -# CONFIG_DEV_APPLETALK is not set
10562 # CONFIG_DECNET is not set
10563 # CONFIG_BRIDGE is not set
10564 # CONFIG_X25 is not set
10565 @@ -314,9 +309,11 @@
10566 # CONFIG_SCSI_MEGARAID is not set
10567 # CONFIG_SCSI_MEGARAID2 is not set
10568 # CONFIG_SCSI_SATA is not set
10569 +# CONFIG_SCSI_SATA_AHCI is not set
10570 # CONFIG_SCSI_SATA_SVW is not set
10571 # CONFIG_SCSI_ATA_PIIX is not set
10572 # CONFIG_SCSI_SATA_NV is not set
10573 +# CONFIG_SCSI_SATA_QSTOR is not set
10574 # CONFIG_SCSI_SATA_PROMISE is not set
10575 # CONFIG_SCSI_SATA_SX4 is not set
10576 # CONFIG_SCSI_SATA_SIL is not set
10577 @@ -474,7 +471,6 @@
10578 CONFIG_SERIAL_CONSOLE=y
10579 # CONFIG_SERIAL_EXTENDED is not set
10580 # CONFIG_SERIAL_NONSTANDARD is not set
10581 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10582 CONFIG_UNIX98_PTYS=y
10583 CONFIG_UNIX98_PTY_COUNT=256
10584
10585 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-decstation linux-2.4.32-rc1.mips/arch/mips64/defconfig-decstation
10586 --- linux-2.4.32-rc1/arch/mips64/defconfig-decstation 2005-01-19 15:09:30.000000000 +0100
10587 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-decstation 2005-03-18 13:13:23.000000000 +0100
10588 @@ -28,8 +28,8 @@
10589 # CONFIG_MIPS_PB1000 is not set
10590 # CONFIG_MIPS_PB1100 is not set
10591 # CONFIG_MIPS_PB1500 is not set
10592 -# CONFIG_MIPS_HYDROGEN3 is not set
10593 # CONFIG_MIPS_PB1550 is not set
10594 +# CONFIG_MIPS_HYDROGEN3 is not set
10595 # CONFIG_MIPS_XXS1500 is not set
10596 # CONFIG_MIPS_MTX1 is not set
10597 # CONFIG_COGENT_CSB250 is not set
10598 @@ -224,11 +224,6 @@
10599 #
10600 # CONFIG_IPX is not set
10601 # CONFIG_ATALK is not set
10602 -
10603 -#
10604 -# Appletalk devices
10605 -#
10606 -# CONFIG_DEV_APPLETALK is not set
10607 # CONFIG_DECNET is not set
10608 # CONFIG_BRIDGE is not set
10609 # CONFIG_X25 is not set
10610 @@ -307,9 +302,11 @@
10611 # CONFIG_SCSI_MEGARAID is not set
10612 # CONFIG_SCSI_MEGARAID2 is not set
10613 # CONFIG_SCSI_SATA is not set
10614 +# CONFIG_SCSI_SATA_AHCI is not set
10615 # CONFIG_SCSI_SATA_SVW is not set
10616 # CONFIG_SCSI_ATA_PIIX is not set
10617 # CONFIG_SCSI_SATA_NV is not set
10618 +# CONFIG_SCSI_SATA_QSTOR is not set
10619 # CONFIG_SCSI_SATA_PROMISE is not set
10620 # CONFIG_SCSI_SATA_SX4 is not set
10621 # CONFIG_SCSI_SATA_SIL is not set
10622 @@ -477,7 +474,6 @@
10623 CONFIG_SERIAL_DEC_CONSOLE=y
10624 # CONFIG_DZ is not set
10625 CONFIG_ZS=y
10626 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10627 CONFIG_UNIX98_PTYS=y
10628 CONFIG_UNIX98_PTY_COUNT=256
10629
10630 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-ip22 linux-2.4.32-rc1.mips/arch/mips64/defconfig-ip22
10631 --- linux-2.4.32-rc1/arch/mips64/defconfig-ip22 2005-01-19 15:09:31.000000000 +0100
10632 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-ip22 2005-03-18 13:13:23.000000000 +0100
10633 @@ -30,8 +30,8 @@
10634 # CONFIG_MIPS_PB1000 is not set
10635 # CONFIG_MIPS_PB1100 is not set
10636 # CONFIG_MIPS_PB1500 is not set
10637 -# CONFIG_MIPS_HYDROGEN3 is not set
10638 # CONFIG_MIPS_PB1550 is not set
10639 +# CONFIG_MIPS_HYDROGEN3 is not set
10640 # CONFIG_MIPS_XXS1500 is not set
10641 # CONFIG_MIPS_MTX1 is not set
10642 # CONFIG_COGENT_CSB250 is not set
10643 @@ -235,11 +235,6 @@
10644 #
10645 # CONFIG_IPX is not set
10646 # CONFIG_ATALK is not set
10647 -
10648 -#
10649 -# Appletalk devices
10650 -#
10651 -# CONFIG_DEV_APPLETALK is not set
10652 # CONFIG_DECNET is not set
10653 # CONFIG_BRIDGE is not set
10654 # CONFIG_X25 is not set
10655 @@ -319,9 +314,11 @@
10656 # CONFIG_SCSI_MEGARAID is not set
10657 # CONFIG_SCSI_MEGARAID2 is not set
10658 # CONFIG_SCSI_SATA is not set
10659 +# CONFIG_SCSI_SATA_AHCI is not set
10660 # CONFIG_SCSI_SATA_SVW is not set
10661 # CONFIG_SCSI_ATA_PIIX is not set
10662 # CONFIG_SCSI_SATA_NV is not set
10663 +# CONFIG_SCSI_SATA_QSTOR is not set
10664 # CONFIG_SCSI_SATA_PROMISE is not set
10665 # CONFIG_SCSI_SATA_SX4 is not set
10666 # CONFIG_SCSI_SATA_SIL is not set
10667 @@ -488,7 +485,6 @@
10668 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10669 # CONFIG_TXX927_SERIAL is not set
10670 CONFIG_IP22_SERIAL=y
10671 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10672 CONFIG_UNIX98_PTYS=y
10673 CONFIG_UNIX98_PTY_COUNT=256
10674
10675 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-ip27 linux-2.4.32-rc1.mips/arch/mips64/defconfig-ip27
10676 --- linux-2.4.32-rc1/arch/mips64/defconfig-ip27 2005-01-19 15:09:31.000000000 +0100
10677 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-ip27 2005-03-18 13:13:23.000000000 +0100
10678 @@ -30,8 +30,8 @@
10679 # CONFIG_MIPS_PB1000 is not set
10680 # CONFIG_MIPS_PB1100 is not set
10681 # CONFIG_MIPS_PB1500 is not set
10682 -# CONFIG_MIPS_HYDROGEN3 is not set
10683 # CONFIG_MIPS_PB1550 is not set
10684 +# CONFIG_MIPS_HYDROGEN3 is not set
10685 # CONFIG_MIPS_XXS1500 is not set
10686 # CONFIG_MIPS_MTX1 is not set
10687 # CONFIG_COGENT_CSB250 is not set
10688 @@ -470,9 +470,11 @@
10689 # CONFIG_SCSI_MEGARAID is not set
10690 # CONFIG_SCSI_MEGARAID2 is not set
10691 # CONFIG_SCSI_SATA is not set
10692 +# CONFIG_SCSI_SATA_AHCI is not set
10693 # CONFIG_SCSI_SATA_SVW is not set
10694 # CONFIG_SCSI_ATA_PIIX is not set
10695 # CONFIG_SCSI_SATA_NV is not set
10696 +# CONFIG_SCSI_SATA_QSTOR is not set
10697 # CONFIG_SCSI_SATA_PROMISE is not set
10698 # CONFIG_SCSI_SATA_SX4 is not set
10699 # CONFIG_SCSI_SATA_SIL is not set
10700 @@ -658,7 +660,6 @@
10701 CONFIG_SERIAL_CONSOLE=y
10702 # CONFIG_SERIAL_EXTENDED is not set
10703 # CONFIG_SERIAL_NONSTANDARD is not set
10704 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10705 CONFIG_UNIX98_PTYS=y
10706 CONFIG_UNIX98_PTY_COUNT=256
10707
10708 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-jaguar linux-2.4.32-rc1.mips/arch/mips64/defconfig-jaguar
10709 --- linux-2.4.32-rc1/arch/mips64/defconfig-jaguar 2005-01-19 15:09:31.000000000 +0100
10710 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-jaguar 2005-03-18 13:13:23.000000000 +0100
10711 @@ -30,8 +30,8 @@
10712 # CONFIG_MIPS_PB1000 is not set
10713 # CONFIG_MIPS_PB1100 is not set
10714 # CONFIG_MIPS_PB1500 is not set
10715 -# CONFIG_MIPS_HYDROGEN3 is not set
10716 # CONFIG_MIPS_PB1550 is not set
10717 +# CONFIG_MIPS_HYDROGEN3 is not set
10718 # CONFIG_MIPS_XXS1500 is not set
10719 # CONFIG_MIPS_MTX1 is not set
10720 # CONFIG_COGENT_CSB250 is not set
10721 @@ -227,11 +227,6 @@
10722 #
10723 # CONFIG_IPX is not set
10724 # CONFIG_ATALK is not set
10725 -
10726 -#
10727 -# Appletalk devices
10728 -#
10729 -# CONFIG_DEV_APPLETALK is not set
10730 # CONFIG_DECNET is not set
10731 # CONFIG_BRIDGE is not set
10732 # CONFIG_X25 is not set
10733 @@ -403,7 +398,6 @@
10734 # CONFIG_SERIAL_TXX9 is not set
10735 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10736 # CONFIG_TXX927_SERIAL is not set
10737 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10738 CONFIG_UNIX98_PTYS=y
10739 CONFIG_UNIX98_PTY_COUNT=256
10740
10741 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-malta linux-2.4.32-rc1.mips/arch/mips64/defconfig-malta
10742 --- linux-2.4.32-rc1/arch/mips64/defconfig-malta 2005-01-19 15:09:31.000000000 +0100
10743 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-malta 2005-04-19 14:19:34.000000000 +0200
10744 @@ -22,16 +22,19 @@
10745 #
10746 # CONFIG_ACER_PICA_61 is not set
10747 # CONFIG_MIPS_BOSPORUS is not set
10748 +# CONFIG_MIPS_FICMMP is not set
10749 # CONFIG_MIPS_MIRAGE is not set
10750 # CONFIG_MIPS_DB1000 is not set
10751 # CONFIG_MIPS_DB1100 is not set
10752 # CONFIG_MIPS_DB1500 is not set
10753 # CONFIG_MIPS_DB1550 is not set
10754 +# CONFIG_MIPS_DB1200 is not set
10755 # CONFIG_MIPS_PB1000 is not set
10756 # CONFIG_MIPS_PB1100 is not set
10757 # CONFIG_MIPS_PB1500 is not set
10758 -# CONFIG_MIPS_HYDROGEN3 is not set
10759 # CONFIG_MIPS_PB1550 is not set
10760 +# CONFIG_MIPS_PB1200 is not set
10761 +# CONFIG_MIPS_HYDROGEN3 is not set
10762 # CONFIG_MIPS_XXS1500 is not set
10763 # CONFIG_MIPS_MTX1 is not set
10764 # CONFIG_COGENT_CSB250 is not set
10765 @@ -146,9 +149,9 @@
10766 CONFIG_BINFMT_ELF=y
10767 CONFIG_MIPS32_COMPAT=y
10768 CONFIG_MIPS32_O32=y
10769 -# CONFIG_MIPS32_N32 is not set
10770 +CONFIG_MIPS32_N32=y
10771 CONFIG_BINFMT_ELF32=y
10772 -# CONFIG_BINFMT_MISC is not set
10773 +CONFIG_BINFMT_MISC=y
10774 # CONFIG_OOM_KILLER is not set
10775 # CONFIG_CMDLINE_BOOL is not set
10776
10777 @@ -235,11 +238,6 @@
10778 #
10779 # CONFIG_IPX is not set
10780 # CONFIG_ATALK is not set
10781 -
10782 -#
10783 -# Appletalk devices
10784 -#
10785 -# CONFIG_DEV_APPLETALK is not set
10786 # CONFIG_DECNET is not set
10787 # CONFIG_BRIDGE is not set
10788 # CONFIG_X25 is not set
10789 @@ -271,8 +269,83 @@
10790 #
10791 # ATA/IDE/MFM/RLL support
10792 #
10793 -# CONFIG_IDE is not set
10794 +CONFIG_IDE=y
10795 +
10796 +#
10797 +# IDE, ATA and ATAPI Block devices
10798 +#
10799 +CONFIG_BLK_DEV_IDE=y
10800 +
10801 +#
10802 +# Please see Documentation/ide.txt for help/info on IDE drives
10803 +#
10804 +# CONFIG_BLK_DEV_HD_IDE is not set
10805 # CONFIG_BLK_DEV_HD is not set
10806 +# CONFIG_BLK_DEV_IDE_SATA is not set
10807 +CONFIG_BLK_DEV_IDEDISK=y
10808 +# CONFIG_IDEDISK_MULTI_MODE is not set
10809 +# CONFIG_IDEDISK_STROKE is not set
10810 +# CONFIG_BLK_DEV_IDECS is not set
10811 +# CONFIG_BLK_DEV_DELKIN is not set
10812 +CONFIG_BLK_DEV_IDECD=y
10813 +CONFIG_BLK_DEV_IDETAPE=y
10814 +CONFIG_BLK_DEV_IDEFLOPPY=y
10815 +# CONFIG_BLK_DEV_IDESCSI is not set
10816 +# CONFIG_IDE_TASK_IOCTL is not set
10817 +
10818 +#
10819 +# IDE chipset support/bugfixes
10820 +#
10821 +# CONFIG_BLK_DEV_CMD640 is not set
10822 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
10823 +# CONFIG_BLK_DEV_ISAPNP is not set
10824 +CONFIG_BLK_DEV_IDEPCI=y
10825 +CONFIG_BLK_DEV_GENERIC=y
10826 +CONFIG_IDEPCI_SHARE_IRQ=y
10827 +CONFIG_BLK_DEV_IDEDMA_PCI=y
10828 +# CONFIG_BLK_DEV_OFFBOARD is not set
10829 +CONFIG_BLK_DEV_IDEDMA_FORCED=y
10830 +CONFIG_IDEDMA_PCI_AUTO=y
10831 +# CONFIG_IDEDMA_ONLYDISK is not set
10832 +CONFIG_BLK_DEV_IDEDMA=y
10833 +# CONFIG_IDEDMA_PCI_WIP is not set
10834 +# CONFIG_BLK_DEV_ADMA100 is not set
10835 +# CONFIG_BLK_DEV_AEC62XX is not set
10836 +# CONFIG_BLK_DEV_ALI15X3 is not set
10837 +# CONFIG_WDC_ALI15X3 is not set
10838 +# CONFIG_BLK_DEV_AMD74XX is not set
10839 +# CONFIG_AMD74XX_OVERRIDE is not set
10840 +# CONFIG_BLK_DEV_ATIIXP is not set
10841 +# CONFIG_BLK_DEV_CMD64X is not set
10842 +# CONFIG_BLK_DEV_TRIFLEX is not set
10843 +# CONFIG_BLK_DEV_CY82C693 is not set
10844 +# CONFIG_BLK_DEV_CS5530 is not set
10845 +# CONFIG_BLK_DEV_HPT34X is not set
10846 +# CONFIG_HPT34X_AUTODMA is not set
10847 +# CONFIG_BLK_DEV_HPT366 is not set
10848 +CONFIG_BLK_DEV_PIIX=y
10849 +# CONFIG_BLK_DEV_NS87415 is not set
10850 +# CONFIG_BLK_DEV_OPTI621 is not set
10851 +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
10852 +# CONFIG_PDC202XX_BURST is not set
10853 +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
10854 +# CONFIG_BLK_DEV_RZ1000 is not set
10855 +# CONFIG_BLK_DEV_SC1200 is not set
10856 +# CONFIG_BLK_DEV_SVWKS is not set
10857 +# CONFIG_BLK_DEV_SIIMAGE is not set
10858 +# CONFIG_BLK_DEV_SIS5513 is not set
10859 +# CONFIG_BLK_DEV_SLC90E66 is not set
10860 +# CONFIG_BLK_DEV_TRM290 is not set
10861 +# CONFIG_BLK_DEV_VIA82CXXX is not set
10862 +# CONFIG_IDE_CHIPSETS is not set
10863 +CONFIG_IDEDMA_AUTO=y
10864 +# CONFIG_IDEDMA_IVB is not set
10865 +# CONFIG_DMA_NONPCI is not set
10866 +# CONFIG_BLK_DEV_ATARAID is not set
10867 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
10868 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
10869 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
10870 +# CONFIG_BLK_DEV_ATARAID_SII is not set
10871
10872 #
10873 # SCSI support
10874 @@ -317,9 +390,11 @@
10875 # CONFIG_SCSI_MEGARAID is not set
10876 # CONFIG_SCSI_MEGARAID2 is not set
10877 # CONFIG_SCSI_SATA is not set
10878 +# CONFIG_SCSI_SATA_AHCI is not set
10879 # CONFIG_SCSI_SATA_SVW is not set
10880 # CONFIG_SCSI_ATA_PIIX is not set
10881 # CONFIG_SCSI_SATA_NV is not set
10882 +# CONFIG_SCSI_SATA_QSTOR is not set
10883 # CONFIG_SCSI_SATA_PROMISE is not set
10884 # CONFIG_SCSI_SATA_SX4 is not set
10885 # CONFIG_SCSI_SATA_SIL is not set
10886 @@ -477,7 +552,6 @@
10887 CONFIG_SERIAL_CONSOLE=y
10888 # CONFIG_SERIAL_EXTENDED is not set
10889 # CONFIG_SERIAL_NONSTANDARD is not set
10890 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10891 CONFIG_UNIX98_PTYS=y
10892 CONFIG_UNIX98_PTY_COUNT=256
10893
10894 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-ocelotc linux-2.4.32-rc1.mips/arch/mips64/defconfig-ocelotc
10895 --- linux-2.4.32-rc1/arch/mips64/defconfig-ocelotc 2005-01-19 15:09:31.000000000 +0100
10896 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-ocelotc 2005-03-18 13:13:23.000000000 +0100
10897 @@ -30,8 +30,8 @@
10898 # CONFIG_MIPS_PB1000 is not set
10899 # CONFIG_MIPS_PB1100 is not set
10900 # CONFIG_MIPS_PB1500 is not set
10901 -# CONFIG_MIPS_HYDROGEN3 is not set
10902 # CONFIG_MIPS_PB1550 is not set
10903 +# CONFIG_MIPS_HYDROGEN3 is not set
10904 # CONFIG_MIPS_XXS1500 is not set
10905 # CONFIG_MIPS_MTX1 is not set
10906 # CONFIG_COGENT_CSB250 is not set
10907 @@ -231,11 +231,6 @@
10908 #
10909 # CONFIG_IPX is not set
10910 # CONFIG_ATALK is not set
10911 -
10912 -#
10913 -# Appletalk devices
10914 -#
10915 -# CONFIG_DEV_APPLETALK is not set
10916 # CONFIG_DECNET is not set
10917 # CONFIG_BRIDGE is not set
10918 # CONFIG_X25 is not set
10919 @@ -453,7 +448,6 @@
10920 # CONFIG_SERIAL_TXX9 is not set
10921 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10922 # CONFIG_TXX927_SERIAL is not set
10923 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10924 CONFIG_UNIX98_PTYS=y
10925 CONFIG_UNIX98_PTY_COUNT=256
10926
10927 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-sb1250-swarm linux-2.4.32-rc1.mips/arch/mips64/defconfig-sb1250-swarm
10928 --- linux-2.4.32-rc1/arch/mips64/defconfig-sb1250-swarm 2005-01-19 15:09:31.000000000 +0100
10929 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-sb1250-swarm 2005-03-18 13:13:23.000000000 +0100
10930 @@ -30,8 +30,8 @@
10931 # CONFIG_MIPS_PB1000 is not set
10932 # CONFIG_MIPS_PB1100 is not set
10933 # CONFIG_MIPS_PB1500 is not set
10934 -# CONFIG_MIPS_HYDROGEN3 is not set
10935 # CONFIG_MIPS_PB1550 is not set
10936 +# CONFIG_MIPS_HYDROGEN3 is not set
10937 # CONFIG_MIPS_XXS1500 is not set
10938 # CONFIG_MIPS_MTX1 is not set
10939 # CONFIG_COGENT_CSB250 is not set
10940 @@ -90,6 +90,7 @@
10941 # CONFIG_SIBYTE_TBPROF is not set
10942 CONFIG_SIBYTE_GENBUS_IDE=y
10943 CONFIG_SMP_CAPABLE=y
10944 +CONFIG_MIPS_RTC=y
10945 # CONFIG_SNI_RM200_PCI is not set
10946 # CONFIG_TANBAC_TB0226 is not set
10947 # CONFIG_TANBAC_TB0229 is not set
10948 @@ -253,11 +254,6 @@
10949 #
10950 # CONFIG_IPX is not set
10951 # CONFIG_ATALK is not set
10952 -
10953 -#
10954 -# Appletalk devices
10955 -#
10956 -# CONFIG_DEV_APPLETALK is not set
10957 # CONFIG_DECNET is not set
10958 # CONFIG_BRIDGE is not set
10959 # CONFIG_X25 is not set
10960 @@ -432,7 +428,6 @@
10961 CONFIG_SIBYTE_SB1250_DUART=y
10962 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
10963 CONFIG_SERIAL_CONSOLE=y
10964 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10965 CONFIG_UNIX98_PTYS=y
10966 CONFIG_UNIX98_PTY_COUNT=256
10967
10968 diff -Nur linux-2.4.32-rc1/arch/mips64/defconfig-sead linux-2.4.32-rc1.mips/arch/mips64/defconfig-sead
10969 --- linux-2.4.32-rc1/arch/mips64/defconfig-sead 2005-01-19 15:09:31.000000000 +0100
10970 +++ linux-2.4.32-rc1.mips/arch/mips64/defconfig-sead 2005-03-18 13:13:23.000000000 +0100
10971 @@ -28,8 +28,8 @@
10972 # CONFIG_MIPS_PB1000 is not set
10973 # CONFIG_MIPS_PB1100 is not set
10974 # CONFIG_MIPS_PB1500 is not set
10975 -# CONFIG_MIPS_HYDROGEN3 is not set
10976 # CONFIG_MIPS_PB1550 is not set
10977 +# CONFIG_MIPS_HYDROGEN3 is not set
10978 # CONFIG_MIPS_XXS1500 is not set
10979 # CONFIG_MIPS_MTX1 is not set
10980 # CONFIG_COGENT_CSB250 is not set
10981 @@ -242,7 +242,6 @@
10982 CONFIG_SERIAL_CONSOLE=y
10983 # CONFIG_SERIAL_EXTENDED is not set
10984 # CONFIG_SERIAL_NONSTANDARD is not set
10985 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10986 # CONFIG_UNIX98_PTYS is not set
10987
10988 #
10989 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/binfmt_elfn32.c linux-2.4.32-rc1.mips/arch/mips64/kernel/binfmt_elfn32.c
10990 --- linux-2.4.32-rc1/arch/mips64/kernel/binfmt_elfn32.c 2003-08-25 13:44:40.000000000 +0200
10991 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/binfmt_elfn32.c 2005-01-26 03:40:47.000000000 +0100
10992 @@ -116,4 +116,7 @@
10993 #undef MODULE_DESCRIPTION
10994 #undef MODULE_AUTHOR
10995
10996 +#undef TASK_SIZE
10997 +#define TASK_SIZE TASK_SIZE32
10998 +
10999 #include "../../../fs/binfmt_elf.c"
11000 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/binfmt_elfo32.c linux-2.4.32-rc1.mips/arch/mips64/kernel/binfmt_elfo32.c
11001 --- linux-2.4.32-rc1/arch/mips64/kernel/binfmt_elfo32.c 2003-08-25 13:44:40.000000000 +0200
11002 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/binfmt_elfo32.c 2005-01-26 03:40:47.000000000 +0100
11003 @@ -137,4 +137,7 @@
11004 #undef MODULE_DESCRIPTION
11005 #undef MODULE_AUTHOR
11006
11007 +#undef TASK_SIZE
11008 +#define TASK_SIZE TASK_SIZE32
11009 +
11010 #include "../../../fs/binfmt_elf.c"
11011 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/head.S linux-2.4.32-rc1.mips/arch/mips64/kernel/head.S
11012 --- linux-2.4.32-rc1/arch/mips64/kernel/head.S 2004-02-18 14:36:30.000000000 +0100
11013 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/head.S 2004-11-22 14:38:26.000000000 +0100
11014 @@ -91,6 +91,21 @@
11015 __INIT
11016
11017 NESTED(kernel_entry, 16, sp) # kernel entry point
11018 + .set push
11019 + /*
11020 + * For the moment disable interrupts, mark the kernel mode and
11021 + * set ST0_KX so that the CPU does not spit fire when using
11022 + * 64-bit addresses. A full initialization of the CPU's status
11023 + * register is done later in per_cpu_trap_init().
11024 + */
11025 + mfc0 t0, CP0_STATUS
11026 + or t0, ST0_CU0|ST0_KX|0x1f
11027 + xor t0, 0x1f
11028 + mtc0 t0, CP0_STATUS
11029 +
11030 + .set noreorder
11031 + sll zero,3 # ehb
11032 + .set reorder
11033
11034 ori sp, 0xf # align stack on 16 byte.
11035 xori sp, 0xf
11036 @@ -103,8 +118,6 @@
11037
11038 ARC64_TWIDDLE_PC
11039
11040 - CLI # disable interrupts
11041 -
11042 /*
11043 * The firmware/bootloader passes argc/argp/envp
11044 * to us as arguments. But clear bss first because
11045 @@ -125,6 +138,7 @@
11046 dsubu sp, 4*SZREG # init stack pointer
11047
11048 j init_arch
11049 + .set pop
11050 END(kernel_entry)
11051
11052 #ifdef CONFIG_SMP
11053 @@ -133,6 +147,23 @@
11054 * function after setting up the stack and gp registers.
11055 */
11056 NESTED(smp_bootstrap, 16, sp)
11057 + .set push
11058 + /*
11059 + * For the moment disable interrupts and bootstrap exception
11060 + * vectors, mark the kernel mode and set ST0_KX so that the CPU
11061 + * does not spit fire when using 64-bit addresses. A full
11062 + * initialization of the CPU's status register is done later in
11063 + * per_cpu_trap_init().
11064 + */
11065 + mfc0 t0, CP0_STATUS
11066 + or t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
11067 + xor t0, ST0_BEV|0x1f
11068 + mtc0 t0, CP0_STATUS
11069 +
11070 + .set noreorder
11071 + sll zero,3 # ehb
11072 + .set reorder
11073 +
11074 #ifdef CONFIG_SGI_IP27
11075 GET_NASID_ASM t1
11076 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
11077 @@ -146,19 +177,8 @@
11078 ARC64_TWIDDLE_PC
11079 #endif /* CONFIG_SGI_IP27 */
11080
11081 - CLI
11082 -
11083 - /*
11084 - * For the moment set ST0_KU so the CPU will not spit fire when
11085 - * executing 64-bit instructions. The full initialization of the
11086 - * CPU's status register is done later in per_cpu_trap_init().
11087 - */
11088 - mfc0 t0, CP0_STATUS
11089 - or t0, ST0_KX
11090 - mtc0 t0, CP0_STATUS
11091 -
11092 jal start_secondary # XXX: IP27: cboot
11093 -
11094 + .set pop
11095 END(smp_bootstrap)
11096 #endif /* CONFIG_SMP */
11097
11098 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/ioctl32.c linux-2.4.32-rc1.mips/arch/mips64/kernel/ioctl32.c
11099 --- linux-2.4.32-rc1/arch/mips64/kernel/ioctl32.c 2005-01-19 15:09:31.000000000 +0100
11100 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/ioctl32.c 2005-01-26 03:36:17.000000000 +0100
11101 @@ -2352,7 +2352,7 @@
11102 IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
11103 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
11104 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
11105 - IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
11106 + IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
11107 IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
11108 IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
11109 IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
11110 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/linux32.c linux-2.4.32-rc1.mips/arch/mips64/kernel/linux32.c
11111 --- linux-2.4.32-rc1/arch/mips64/kernel/linux32.c 2005-04-04 03:42:19.000000000 +0200
11112 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/linux32.c 2005-04-22 15:01:00.000000000 +0200
11113 @@ -1101,6 +1101,7 @@
11114 * specially as they have atomicity guarantees and can handle
11115 * iovec's natively
11116 */
11117 + inode = file->f_dentry->d_inode;
11118 if (inode->i_sock) {
11119 int err;
11120 err = sock_readv_writev(type, inode, file, iov, count, tot_len);
11121 @@ -1187,72 +1188,19 @@
11122 lseek back to original location. They fail just like lseek does on
11123 non-seekable files. */
11124
11125 -asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
11126 - size_t count, u32 unused, u64 a4, u64 a5)
11127 +asmlinkage ssize_t sys32_pread(unsigned int fd, char *buf,
11128 + size_t count, u32 unused, u64 a4, u64 a5)
11129 {
11130 - ssize_t ret;
11131 - struct file * file;
11132 - ssize_t (*read)(struct file *, char *, size_t, loff_t *);
11133 - loff_t pos;
11134 -
11135 - ret = -EBADF;
11136 - file = fget(fd);
11137 - if (!file)
11138 - goto bad_file;
11139 - if (!(file->f_mode & FMODE_READ))
11140 - goto out;
11141 - pos = merge_64(a4, a5);
11142 - ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
11143 - file, pos, count);
11144 - if (ret)
11145 - goto out;
11146 - ret = -EINVAL;
11147 - if (!file->f_op || !(read = file->f_op->read))
11148 - goto out;
11149 - if (pos < 0)
11150 - goto out;
11151 - ret = read(file, buf, count, &pos);
11152 - if (ret > 0)
11153 - dnotify_parent(file->f_dentry, DN_ACCESS);
11154 -out:
11155 - fput(file);
11156 -bad_file:
11157 - return ret;
11158 + return sys_pread(fd, buf, count, merge_64(a4, a5));
11159 }
11160
11161 asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
11162 size_t count, u32 unused, u64 a4, u64 a5)
11163 {
11164 - ssize_t ret;
11165 - struct file * file;
11166 - ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
11167 - loff_t pos;
11168 + return sys_pwrite(fd, buf, count, merge_64(a4, a5));
11169 +}
11170
11171 - ret = -EBADF;
11172 - file = fget(fd);
11173 - if (!file)
11174 - goto bad_file;
11175 - if (!(file->f_mode & FMODE_WRITE))
11176 - goto out;
11177 - pos = merge_64(a4, a5);
11178 - ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
11179 - file, pos, count);
11180 - if (ret)
11181 - goto out;
11182 - ret = -EINVAL;
11183 - if (!file->f_op || !(write = file->f_op->write))
11184 - goto out;
11185 - if (pos < 0)
11186 - goto out;
11187
11188 - ret = write(file, buf, count, &pos);
11189 - if (ret > 0)
11190 - dnotify_parent(file->f_dentry, DN_MODIFY);
11191 -out:
11192 - fput(file);
11193 -bad_file:
11194 - return ret;
11195 -}
11196 /*
11197 * Ooo, nasty. We need here to frob 32-bit unsigned longs to
11198 * 64-bit unsigned longs.
11199 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/process.c linux-2.4.32-rc1.mips/arch/mips64/kernel/process.c
11200 --- linux-2.4.32-rc1/arch/mips64/kernel/process.c 2003-08-25 13:44:40.000000000 +0200
11201 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/process.c 2005-04-14 12:41:44.000000000 +0200
11202 @@ -125,6 +125,25 @@
11203 return 1;
11204 }
11205
11206 +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
11207 +{
11208 + int i;
11209 +
11210 + for (i = 0; i < EF_REG0; i++)
11211 + gp[i] = 0;
11212 + gp[EF_REG0] = 0;
11213 + for (i = 1; i <= 31; i++)
11214 + gp[EF_REG0 + i] = regs->regs[i];
11215 + gp[EF_REG26] = 0;
11216 + gp[EF_REG27] = 0;
11217 + gp[EF_LO] = regs->lo;
11218 + gp[EF_HI] = regs->hi;
11219 + gp[EF_CP0_EPC] = regs->cp0_epc;
11220 + gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
11221 + gp[EF_CP0_STATUS] = regs->cp0_status;
11222 + gp[EF_CP0_CAUSE] = regs->cp0_cause;
11223 +}
11224 +
11225 /*
11226 * Create a kernel thread
11227 */
11228 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/scall_64.S linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_64.S
11229 --- linux-2.4.32-rc1/arch/mips64/kernel/scall_64.S 2005-01-19 15:09:32.000000000 +0100
11230 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_64.S 2005-02-07 22:21:54.000000000 +0100
11231 @@ -102,15 +102,14 @@
11232
11233 trace_a_syscall:
11234 SAVE_STATIC
11235 - sd t2,PT_R1(sp)
11236 + move s0, t2
11237 jal syscall_trace
11238 - ld t2,PT_R1(sp)
11239
11240 ld a0, PT_R4(sp) # Restore argument registers
11241 ld a1, PT_R5(sp)
11242 ld a2, PT_R6(sp)
11243 ld a3, PT_R7(sp)
11244 - jalr t2
11245 + jalr s0
11246
11247 li t0, -EMAXERRNO - 1 # error?
11248 sltu t0, t0, v0
11249 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/scall_n32.S linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_n32.S
11250 --- linux-2.4.32-rc1/arch/mips64/kernel/scall_n32.S 2005-01-19 15:09:32.000000000 +0100
11251 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_n32.S 2005-02-07 22:21:54.000000000 +0100
11252 @@ -106,15 +106,14 @@
11253
11254 trace_a_syscall:
11255 SAVE_STATIC
11256 - sd t2,PT_R1(sp)
11257 + move s0, t2
11258 jal syscall_trace
11259 - ld t2,PT_R1(sp)
11260
11261 ld a0, PT_R4(sp) # Restore argument registers
11262 ld a1, PT_R5(sp)
11263 ld a2, PT_R6(sp)
11264 ld a3, PT_R7(sp)
11265 - jalr t2
11266 + jalr s0
11267
11268 li t0, -EMAXERRNO - 1 # error?
11269 sltu t0, t0, v0
11270 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/scall_o32.S linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_o32.S
11271 --- linux-2.4.32-rc1/arch/mips64/kernel/scall_o32.S 2005-01-19 15:09:32.000000000 +0100
11272 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/scall_o32.S 2005-02-14 04:52:57.000000000 +0100
11273 @@ -118,9 +118,8 @@
11274 sd a6, PT_R10(sp)
11275 sd a7, PT_R11(sp)
11276
11277 - sd t2,PT_R1(sp)
11278 + move s0, t2
11279 jal syscall_trace
11280 - ld t2,PT_R1(sp)
11281
11282 ld a0, PT_R4(sp) # Restore argument registers
11283 ld a1, PT_R5(sp)
11284 @@ -129,7 +128,7 @@
11285 ld a4, PT_R8(sp)
11286 ld a5, PT_R9(sp)
11287
11288 - jalr t2
11289 + jalr s0
11290
11291 li t0, -EMAXERRNO - 1 # error?
11292 sltu t0, t0, v0
11293 @@ -576,6 +575,8 @@
11294 sys_call_table:
11295 syscalltable
11296
11297 + .purgem sys
11298 +
11299 .macro sys function, nargs
11300 .byte \nargs
11301 .endm
11302 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/setup.c linux-2.4.32-rc1.mips/arch/mips64/kernel/setup.c
11303 --- linux-2.4.32-rc1/arch/mips64/kernel/setup.c 2005-01-19 15:09:32.000000000 +0100
11304 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/setup.c 2004-11-22 14:38:26.000000000 +0100
11305 @@ -129,14 +129,6 @@
11306 */
11307 load_mmu();
11308
11309 - /*
11310 - * On IP27, I am seeing the TS bit set when the kernel is loaded.
11311 - * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
11312 - * anyway ...
11313 - */
11314 - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
11315 - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
11316 -
11317 start_kernel();
11318 }
11319
11320 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/signal_n32.c linux-2.4.32-rc1.mips/arch/mips64/kernel/signal_n32.c
11321 --- linux-2.4.32-rc1/arch/mips64/kernel/signal_n32.c 2005-01-19 15:09:33.000000000 +0100
11322 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/signal_n32.c 2005-02-07 22:10:53.000000000 +0100
11323 @@ -68,7 +68,7 @@
11324 };
11325
11326 extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11327 -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11328 +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11329
11330 asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
11331 {
11332 diff -Nur linux-2.4.32-rc1/arch/mips64/kernel/traps.c linux-2.4.32-rc1.mips/arch/mips64/kernel/traps.c
11333 --- linux-2.4.32-rc1/arch/mips64/kernel/traps.c 2005-01-19 15:09:33.000000000 +0100
11334 +++ linux-2.4.32-rc1.mips/arch/mips64/kernel/traps.c 2005-04-12 22:25:34.000000000 +0200
11335 @@ -462,9 +462,10 @@
11336 }
11337 ll_task = current;
11338
11339 + compute_return_epc(regs);
11340 +
11341 regs->regs[(opcode & RT) >> 16] = value;
11342
11343 - compute_return_epc(regs);
11344 return;
11345
11346 sig:
11347 @@ -495,8 +496,8 @@
11348 goto sig;
11349 }
11350 if (ll_bit == 0 || ll_task != current) {
11351 - regs->regs[reg] = 0;
11352 compute_return_epc(regs);
11353 + regs->regs[reg] = 0;
11354 return;
11355 }
11356
11357 @@ -505,9 +506,9 @@
11358 goto sig;
11359 }
11360
11361 + compute_return_epc(regs);
11362 regs->regs[reg] = 1;
11363
11364 - compute_return_epc(regs);
11365 return;
11366
11367 sig:
11368 @@ -809,13 +810,18 @@
11369 void __init per_cpu_trap_init(void)
11370 {
11371 unsigned int cpu = smp_processor_id();
11372 + unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
11373
11374 - /* Some firmware leaves the BEV flag set, clear it. */
11375 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
11376 - set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
11377 -
11378 + /*
11379 + * Disable coprocessors, enable 64-bit addressing and set FPU
11380 + * for the 32/32 FPR register model. Reset the BEV flag that
11381 + * some firmware may have left set and the TS bit (for IP27).
11382 + * Set XX for ISA IV code to work.
11383 + */
11384 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
11385 - set_c0_status(ST0_XX);
11386 + status_set |= ST0_XX;
11387 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
11388 + status_set);
11389
11390 /*
11391 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
11392 @@ -825,13 +831,11 @@
11393 set_c0_cause(CAUSEF_IV);
11394
11395 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
11396 - write_c0_context(((long)(&pgd_current[cpu])) << 23);
11397 - write_c0_wired(0);
11398 + TLBMISS_HANDLER_SETUP();
11399
11400 atomic_inc(&init_mm.mm_count);
11401 current->active_mm = &init_mm;
11402 - if (current->mm)
11403 - BUG();
11404 + BUG_ON(current->mm);
11405 enter_lazy_tlb(&init_mm, current, cpu);
11406 }
11407
11408 @@ -842,8 +846,6 @@
11409 extern char except_vec4;
11410 unsigned long i;
11411
11412 - per_cpu_trap_init();
11413 -
11414 /* Copy the generic exception handlers to their final destination. */
11415 memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
11416 memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
11417 @@ -933,6 +935,5 @@
11418
11419 flush_icache_range(KSEG0, KSEG0 + 0x400);
11420
11421 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
11422 - current->active_mm = &init_mm;
11423 + per_cpu_trap_init();
11424 }
11425 diff -Nur linux-2.4.32-rc1/arch/mips64/mm/cerr-sb1.c linux-2.4.32-rc1.mips/arch/mips64/mm/cerr-sb1.c
11426 --- linux-2.4.32-rc1/arch/mips64/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
11427 +++ linux-2.4.32-rc1.mips/arch/mips64/mm/cerr-sb1.c 2004-12-13 18:37:26.000000000 +0100
11428 @@ -252,14 +252,14 @@
11429
11430 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
11431 static const uint64_t mask_72_64[8] = {
11432 - 0x0738C808099264FFL,
11433 - 0x38C808099264FF07L,
11434 - 0xC808099264FF0738L,
11435 - 0x08099264FF0738C8L,
11436 - 0x099264FF0738C808L,
11437 - 0x9264FF0738C80809L,
11438 - 0x64FF0738C8080992L,
11439 - 0xFF0738C808099264L
11440 + 0x0738C808099264FFULL,
11441 + 0x38C808099264FF07ULL,
11442 + 0xC808099264FF0738ULL,
11443 + 0x08099264FF0738C8ULL,
11444 + 0x099264FF0738C808ULL,
11445 + 0x9264FF0738C80809ULL,
11446 + 0x64FF0738C8080992ULL,
11447 + 0xFF0738C808099264ULL
11448 };
11449
11450 /* Calculate the parity on a range of bits */
11451 @@ -331,9 +331,9 @@
11452 ((lru >> 4) & 0x3),
11453 ((lru >> 6) & 0x3));
11454 }
11455 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
11456 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
11457 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
11458 - va |= 0x3FFFF00000000000;
11459 + va |= 0x3FFFF00000000000ULL;
11460 valid = ((taghi >> 29) & 1);
11461 if (valid) {
11462 tlo_tmp = taglo & 0xfff3ff;
11463 @@ -474,7 +474,7 @@
11464 : "r" ((way << 13) | addr));
11465
11466 taglo = ((unsigned long long)taglohi << 32) | taglolo;
11467 - pa = (taglo & 0xFFFFFFE000) | addr;
11468 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
11469 if (way == 0) {
11470 lru = (taghi >> 14) & 0xff;
11471 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
11472 diff -Nur linux-2.4.32-rc1/arch/mips64/mm/c-r4k.c linux-2.4.32-rc1.mips/arch/mips64/mm/c-r4k.c
11473 --- linux-2.4.32-rc1/arch/mips64/mm/c-r4k.c 2005-01-19 15:09:33.000000000 +0100
11474 +++ linux-2.4.32-rc1.mips/arch/mips64/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
11475 @@ -867,9 +867,16 @@
11476 * normally they'd suffer from aliases but magic in the hardware deals
11477 * with that for us so we don't need to take care ourselves.
11478 */
11479 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
11480 - if (c->dcache.waysize > PAGE_SIZE)
11481 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11482 + switch (c->cputype) {
11483 + case CPU_R10000:
11484 + case CPU_R12000:
11485 + break;
11486 + case CPU_24K:
11487 + if (!(read_c0_config7() & (1 << 16)))
11488 + default:
11489 + if (c->dcache.waysize > PAGE_SIZE)
11490 + c->dcache.flags |= MIPS_CACHE_ALIASES;
11491 + }
11492
11493 switch (c->cputype) {
11494 case CPU_20KC:
11495 @@ -1070,9 +1077,6 @@
11496 setup_scache();
11497 coherency_setup();
11498
11499 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
11500 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11501 -
11502 r4k_blast_dcache_page_setup();
11503 r4k_blast_dcache_page_indexed_setup();
11504 r4k_blast_dcache_setup();
11505 diff -Nur linux-2.4.32-rc1/arch/mips64/mm/tlbex-r4k.S linux-2.4.32-rc1.mips/arch/mips64/mm/tlbex-r4k.S
11506 --- linux-2.4.32-rc1/arch/mips64/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
11507 +++ linux-2.4.32-rc1.mips/arch/mips64/mm/tlbex-r4k.S 2005-06-06 16:46:22.000000000 +0200
11508 @@ -125,6 +125,33 @@
11509 nop
11510 END(except_vec1_r4k)
11511
11512 + __FINIT
11513 +
11514 + .align 5
11515 +LEAF(handle_vec1_r4k)
11516 + .set noat
11517 + LOAD_PTE2 k1 k0 9f
11518 + ld k0, 0(k1) # get even pte
11519 + ld k1, 8(k1) # get odd pte
11520 + PTE_RELOAD k0 k1
11521 + mtc0_tlbw_hazard
11522 + tlbwr
11523 + tlbw_eret_hazard
11524 + eret
11525 +
11526 +9: # handle the vmalloc range
11527 + LOAD_KPTE2 k1 k0 invalid_vmalloc_address
11528 + ld k0, 0(k1) # get even pte
11529 + ld k1, 8(k1) # get odd pte
11530 + PTE_RELOAD k0 k1
11531 + mtc0_tlbw_hazard
11532 + tlbwr
11533 + tlbw_eret_hazard
11534 + eret
11535 +END(handle_vec1_r4k)
11536 +
11537 + __INIT
11538 +
11539 LEAF(except_vec1_sb1)
11540 #if BCM1250_M3_WAR
11541 dmfc0 k0, CP0_BADVADDR
11542 @@ -134,28 +161,24 @@
11543 bnez k0, 1f
11544 #endif
11545 .set noat
11546 - dla k0, handle_vec1_r4k
11547 + dla k0, handle_vec1_sb1
11548 jr k0
11549 nop
11550
11551 1: eret
11552 - nop
11553 END(except_vec1_sb1)
11554
11555 __FINIT
11556
11557 .align 5
11558 -LEAF(handle_vec1_r4k)
11559 +LEAF(handle_vec1_sb1)
11560 .set noat
11561 LOAD_PTE2 k1 k0 9f
11562 ld k0, 0(k1) # get even pte
11563 ld k1, 8(k1) # get odd pte
11564 PTE_RELOAD k0 k1
11565 - rm9000_tlb_hazard
11566 - b 1f
11567 - tlbwr
11568 -1: nop
11569 - rm9000_tlb_hazard
11570 + mtc0_tlbw_hazard
11571 + tlbwr
11572 eret
11573
11574 9: # handle the vmalloc range
11575 @@ -163,13 +186,10 @@
11576 ld k0, 0(k1) # get even pte
11577 ld k1, 8(k1) # get odd pte
11578 PTE_RELOAD k0 k1
11579 - rm9000_tlb_hazard
11580 - b 1f
11581 - tlbwr
11582 -1: nop
11583 - rm9000_tlb_hazard
11584 + mtc0_tlbw_hazard
11585 + tlbwr
11586 eret
11587 -END(handle_vec1_r4k)
11588 +END(handle_vec1_sb1)
11589
11590
11591 __INIT
11592 @@ -195,10 +215,8 @@
11593 ld k0, 0(k1) # get even pte
11594 ld k1, 8(k1) # get odd pte
11595 PTE_RELOAD k0 k1
11596 - rm9000_tlb_hazard
11597 - nop
11598 + mtc0_tlbw_hazard
11599 tlbwr
11600 - rm9000_tlb_hazard
11601 eret
11602
11603 9: # handle the vmalloc range
11604 @@ -206,10 +224,8 @@
11605 ld k0, 0(k1) # get even pte
11606 ld k1, 8(k1) # get odd pte
11607 PTE_RELOAD k0 k1
11608 - rm9000_tlb_hazard
11609 - nop
11610 + mtc0_tlbw_hazard
11611 tlbwr
11612 - rm9000_tlb_hazard
11613 eret
11614 END(handle_vec1_r10k)
11615
11616 diff -Nur linux-2.4.32-rc1/arch/mips64/mm/tlb-r4k.c linux-2.4.32-rc1.mips/arch/mips64/mm/tlb-r4k.c
11617 --- linux-2.4.32-rc1/arch/mips64/mm/tlb-r4k.c 2005-01-19 15:09:33.000000000 +0100
11618 +++ linux-2.4.32-rc1.mips/arch/mips64/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
11619 @@ -1,24 +1,12 @@
11620 /*
11621 - * Carsten Langgaard, carstenl@mips.com
11622 - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11623 - *
11624 - * This program is free software; you can distribute it and/or modify it
11625 - * under the terms of the GNU General Public License (Version 2) as
11626 - * published by the Free Software Foundation.
11627 - *
11628 - * This program is distributed in the hope it will be useful, but WITHOUT
11629 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11630 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11631 + * This file is subject to the terms and conditions of the GNU General Public
11632 + * License. See the file "COPYING" in the main directory of this archive
11633 * for more details.
11634 *
11635 - * You should have received a copy of the GNU General Public License along
11636 - * with this program; if not, write to the Free Software Foundation, Inc.,
11637 - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
11638 - *
11639 - * MIPS64 CPU variant specific MMU routines.
11640 - * These routine are not optimized in any way, they are done in a generic way
11641 - * so they can be used on all MIPS64 compliant CPUs, and also done in an
11642 - * attempt not to break anything for the R4xx0 style CPUs.
11643 + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
11644 + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
11645 + * Carsten Langgaard, carstenl@mips.com
11646 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11647 */
11648 #include <linux/init.h>
11649 #include <linux/sched.h>
11650 @@ -30,9 +18,6 @@
11651 #include <asm/pgtable.h>
11652 #include <asm/system.h>
11653
11654 -#undef DEBUG_TLB
11655 -#undef DEBUG_TLBUPDATE
11656 -
11657 extern void except_vec1_r4k(void);
11658
11659 /* CP0 hazard avoidance. */
11660 @@ -46,31 +31,23 @@
11661 unsigned long old_ctx;
11662 int entry;
11663
11664 -#ifdef DEBUG_TLB
11665 - printk("[tlball]");
11666 -#endif
11667 -
11668 local_irq_save(flags);
11669 /* Save old context and create impossible VPN2 value */
11670 old_ctx = read_c0_entryhi();
11671 - write_c0_entryhi(XKPHYS);
11672 write_c0_entrylo0(0);
11673 write_c0_entrylo1(0);
11674 - BARRIER;
11675
11676 entry = read_c0_wired();
11677
11678 /* Blast 'em all away. */
11679 - while(entry < current_cpu_data.tlbsize) {
11680 - /* Make sure all entries differ. */
11681 - write_c0_entryhi(XKPHYS+entry*0x2000);
11682 + while (entry < current_cpu_data.tlbsize) {
11683 + write_c0_entryhi(XKPHYS + entry*0x2000);
11684 write_c0_index(entry);
11685 - BARRIER;
11686 + mtc0_tlbw_hazard();
11687 tlb_write_indexed();
11688 - BARRIER;
11689 entry++;
11690 }
11691 - BARRIER;
11692 + tlbw_use_hazard();
11693 write_c0_entryhi(old_ctx);
11694 local_irq_restore(flags);
11695 }
11696 @@ -79,12 +56,8 @@
11697 {
11698 int cpu = smp_processor_id();
11699
11700 - if (cpu_context(cpu, mm) != 0) {
11701 -#ifdef DEBUG_TLB
11702 - printk("[tlbmm<%d>]", mm->context);
11703 -#endif
11704 + if (cpu_context(cpu, mm) != 0)
11705 drop_mmu_context(mm,cpu);
11706 - }
11707 }
11708
11709 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
11710 @@ -96,10 +69,6 @@
11711 unsigned long flags;
11712 int size;
11713
11714 -#ifdef DEBUG_TLB
11715 - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
11716 - start, end);
11717 -#endif
11718 local_irq_save(flags);
11719 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
11720 size = (size + 1) >> 1;
11721 @@ -110,25 +79,25 @@
11722 start &= (PAGE_MASK << 1);
11723 end += ((PAGE_SIZE << 1) - 1);
11724 end &= (PAGE_MASK << 1);
11725 - while(start < end) {
11726 + while (start < end) {
11727 int idx;
11728
11729 write_c0_entryhi(start | newpid);
11730 start += (PAGE_SIZE << 1);
11731 - BARRIER;
11732 + mtc0_tlbw_hazard();
11733 tlb_probe();
11734 BARRIER;
11735 idx = read_c0_index();
11736 write_c0_entrylo0(0);
11737 write_c0_entrylo1(0);
11738 - if(idx < 0)
11739 + if (idx < 0)
11740 continue;
11741 /* Make sure all entries differ. */
11742 write_c0_entryhi(XKPHYS+idx*0x2000);
11743 - BARRIER;
11744 + mtc0_tlbw_hazard();
11745 tlb_write_indexed();
11746 - BARRIER;
11747 }
11748 + tlbw_use_hazard();
11749 write_c0_entryhi(oldpid);
11750 } else {
11751 drop_mmu_context(mm, cpu);
11752 @@ -145,28 +114,26 @@
11753 unsigned long flags;
11754 unsigned long oldpid, newpid, idx;
11755
11756 -#ifdef DEBUG_TLB
11757 - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
11758 -#endif
11759 newpid = cpu_asid(cpu, vma->vm_mm);
11760 page &= (PAGE_MASK << 1);
11761 local_irq_save(flags);
11762 oldpid = read_c0_entryhi();
11763 write_c0_entryhi(page | newpid);
11764 - BARRIER;
11765 + mtc0_tlbw_hazard();
11766 tlb_probe();
11767 BARRIER;
11768 idx = read_c0_index();
11769 write_c0_entrylo0(0);
11770 write_c0_entrylo1(0);
11771 - if(idx < 0)
11772 + if (idx < 0)
11773 goto finish;
11774 /* Make sure all entries differ. */
11775 write_c0_entryhi(XKPHYS+idx*0x2000);
11776 - BARRIER;
11777 + mtc0_tlbw_hazard();
11778 tlb_write_indexed();
11779 + tlbw_use_hazard();
11780 +
11781 finish:
11782 - BARRIER;
11783 write_c0_entryhi(oldpid);
11784 local_irq_restore(flags);
11785 }
11786 @@ -186,7 +153,7 @@
11787
11788 local_irq_save(flags);
11789 write_c0_entryhi(page);
11790 - BARRIER;
11791 + mtc0_tlbw_hazard();
11792 tlb_probe();
11793 BARRIER;
11794 idx = read_c0_index();
11795 @@ -195,10 +162,12 @@
11796 if (idx >= 0) {
11797 /* Make sure all entries differ. */
11798 write_c0_entryhi(KSEG0+idx*0x2000);
11799 + mtc0_tlbw_hazard();
11800 tlb_write_indexed();
11801 + tlbw_use_hazard();
11802 }
11803 - BARRIER;
11804 write_c0_entryhi(oldpid);
11805 +
11806 local_irq_restore(flags);
11807 }
11808
11809 @@ -208,7 +177,6 @@
11810 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
11811 {
11812 unsigned long flags;
11813 - unsigned int asid;
11814 pgd_t *pgdp;
11815 pmd_t *pmdp;
11816 pte_t *ptep;
11817 @@ -222,70 +190,58 @@
11818
11819 pid = read_c0_entryhi() & ASID_MASK;
11820
11821 -#ifdef DEBUG_TLB
11822 - if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
11823 - (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
11824 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
11825 - "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
11826 - vma->vm_mm) & ASID_MASK), pid);
11827 - }
11828 -#endif
11829 -
11830 local_irq_save(flags);
11831 address &= (PAGE_MASK << 1);
11832 - write_c0_entryhi(address | (pid));
11833 + write_c0_entryhi(address | pid);
11834 pgdp = pgd_offset(vma->vm_mm, address);
11835 - BARRIER;
11836 + mtc0_tlbw_hazard();
11837 tlb_probe();
11838 BARRIER;
11839 pmdp = pmd_offset(pgdp, address);
11840 idx = read_c0_index();
11841 ptep = pte_offset(pmdp, address);
11842 - BARRIER;
11843 write_c0_entrylo0(pte_val(*ptep++) >> 6);
11844 write_c0_entrylo1(pte_val(*ptep) >> 6);
11845 - write_c0_entryhi(address | (pid));
11846 - BARRIER;
11847 - if(idx < 0) {
11848 + write_c0_entryhi(address | pid);
11849 + mtc0_tlbw_hazard();
11850 + if (idx < 0)
11851 tlb_write_random();
11852 - } else {
11853 + else
11854 tlb_write_indexed();
11855 - }
11856 - BARRIER;
11857 + tlbw_use_hazard();
11858 write_c0_entryhi(pid);
11859 - BARRIER;
11860 local_irq_restore(flags);
11861 }
11862
11863 -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11864 - unsigned long entryhi, unsigned long pagemask)
11865 +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11866 + unsigned long entryhi, unsigned long pagemask)
11867 {
11868 - unsigned long flags;
11869 - unsigned long wired;
11870 - unsigned long old_pagemask;
11871 - unsigned long old_ctx;
11872 -
11873 - local_irq_save(flags);
11874 - /* Save old context and create impossible VPN2 value */
11875 - old_ctx = (read_c0_entryhi() & ASID_MASK);
11876 - old_pagemask = read_c0_pagemask();
11877 - wired = read_c0_wired();
11878 - write_c0_wired(wired + 1);
11879 - write_c0_index(wired);
11880 - BARRIER;
11881 - write_c0_pagemask(pagemask);
11882 - write_c0_entryhi(entryhi);
11883 - write_c0_entrylo0(entrylo0);
11884 - write_c0_entrylo1(entrylo1);
11885 - BARRIER;
11886 - tlb_write_indexed();
11887 - BARRIER;
11888 -
11889 - write_c0_entryhi(old_ctx);
11890 - BARRIER;
11891 - write_c0_pagemask(old_pagemask);
11892 - local_flush_tlb_all();
11893 - local_irq_restore(flags);
11894 + unsigned long flags;
11895 + unsigned long wired;
11896 + unsigned long old_pagemask;
11897 + unsigned long old_ctx;
11898 +
11899 + local_irq_save(flags);
11900 + /* Save old context and create impossible VPN2 value */
11901 + old_ctx = read_c0_entryhi() & ASID_MASK;
11902 + old_pagemask = read_c0_pagemask();
11903 + wired = read_c0_wired();
11904 + write_c0_wired(wired + 1);
11905 + write_c0_index(wired);
11906 + BARRIER;
11907 + write_c0_pagemask(pagemask);
11908 + write_c0_entryhi(entryhi);
11909 + write_c0_entrylo0(entrylo0);
11910 + write_c0_entrylo1(entrylo1);
11911 + mtc0_tlbw_hazard();
11912 + tlb_write_indexed();
11913 + tlbw_use_hazard();
11914 +
11915 + write_c0_entryhi(old_ctx);
11916 + BARRIER;
11917 + write_c0_pagemask(old_pagemask);
11918 + local_flush_tlb_all();
11919 + local_irq_restore(flags);
11920 }
11921
11922 /*
11923 @@ -317,17 +273,15 @@
11924 }
11925
11926 write_c0_index(temp_tlb_entry);
11927 - BARRIER;
11928 write_c0_pagemask(pagemask);
11929 write_c0_entryhi(entryhi);
11930 write_c0_entrylo0(entrylo0);
11931 write_c0_entrylo1(entrylo1);
11932 - BARRIER;
11933 + mtc0_tlbw_hazard();
11934 tlb_write_indexed();
11935 - BARRIER;
11936 + tlbw_use_hazard();
11937
11938 write_c0_entryhi(old_ctx);
11939 - BARRIER;
11940 write_c0_pagemask(old_pagemask);
11941 out:
11942 local_irq_restore(flags);
11943 @@ -348,15 +302,23 @@
11944 return;
11945
11946 config1 = read_c0_config1();
11947 - if (!((config1 >> 7) & 3))
11948 - panic("No MMU present");
11949 + if (!((config >> 7) & 3))
11950 + panic("No TLB present");
11951
11952 c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
11953 }
11954
11955 void __init r4k_tlb_init(void)
11956 {
11957 - unsigned long config = read_c0_config();
11958 + unsigned int config = read_c0_config();
11959 +
11960 + /*
11961 + * You should never change this register:
11962 + * - On R4600 1.7 the tlbp never hits for pages smaller than
11963 + * the value in the c0_pagemask register.
11964 + * - The entire mm handling assumes the c0_pagemask register to
11965 + * be set for 4kb pages.
11966 + */
11967 probe_tlb(config);
11968 write_c0_pagemask(PM_DEFAULT_MASK);
11969 write_c0_wired(0);
11970 diff -Nur linux-2.4.32-rc1/drivers/char/au1000_gpio.c linux-2.4.32-rc1.mips/drivers/char/au1000_gpio.c
11971 --- linux-2.4.32-rc1/drivers/char/au1000_gpio.c 2003-08-25 13:44:41.000000000 +0200
11972 +++ linux-2.4.32-rc1.mips/drivers/char/au1000_gpio.c 2003-12-20 14:18:51.000000000 +0100
11973 @@ -246,7 +246,7 @@
11974
11975 static struct miscdevice au1000gpio_miscdev =
11976 {
11977 - GPIO_MINOR,
11978 + MISC_DYNAMIC_MINOR,
11979 "au1000_gpio",
11980 &au1000gpio_fops
11981 };
11982 diff -Nur linux-2.4.32-rc1/drivers/char/au1550_psc_spi.c linux-2.4.32-rc1.mips/drivers/char/au1550_psc_spi.c
11983 --- linux-2.4.32-rc1/drivers/char/au1550_psc_spi.c 1970-01-01 01:00:00.000000000 +0100
11984 +++ linux-2.4.32-rc1.mips/drivers/char/au1550_psc_spi.c 2005-02-11 21:37:24.000000000 +0100
11985 @@ -0,0 +1,466 @@
11986 +/*
11987 + * Driver for Alchemy Au1550 SPI on the PSC.
11988 + *
11989 + * Copyright 2004 Embedded Edge, LLC.
11990 + * dan@embeddededge.com
11991 + *
11992 + * This program is free software; you can redistribute it and/or modify it
11993 + * under the terms of the GNU General Public License as published by the
11994 + * Free Software Foundation; either version 2 of the License, or (at your
11995 + * option) any later version.
11996 + *
11997 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11998 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11999 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12000 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
12001 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12002 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
12003 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
12004 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
12005 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
12006 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12007 + *
12008 + * You should have received a copy of the GNU General Public License along
12009 + * with this program; if not, write to the Free Software Foundation, Inc.,
12010 + * 675 Mass Ave, Cambridge, MA 02139, USA.
12011 + */
12012 +
12013 +#include <linux/module.h>
12014 +#include <linux/config.h>
12015 +#include <linux/types.h>
12016 +#include <linux/kernel.h>
12017 +#include <linux/miscdevice.h>
12018 +#include <linux/init.h>
12019 +#include <asm/uaccess.h>
12020 +#include <asm/io.h>
12021 +#include <asm/au1000.h>
12022 +#include <asm/au1550_spi.h>
12023 +#include <asm/au1xxx_psc.h>
12024 +
12025 +#ifdef CONFIG_MIPS_PB1550
12026 +#include <asm/pb1550.h>
12027 +#endif
12028 +
12029 +#ifdef CONFIG_MIPS_DB1550
12030 +#include <asm/db1x00.h>
12031 +#endif
12032 +
12033 +#ifdef CONFIG_MIPS_PB1200
12034 +#include <asm/pb1200.h>
12035 +#endif
12036 +
12037 +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
12038 + * We support open, close, write, and ioctl. The SPI is a full duplex
12039 + * interface, you can't read without writing. So, the write system call
12040 + * copies the bytes out to the SPI, and whatever is returned is placed
12041 + * in the same buffer. Kinda weird, maybe we'll change it, but for now
12042 + * it works OK.
12043 + * I didn't implement any DMA yet, and it's a debate about the necessity.
12044 + * The SPI clocks are usually quite fast, so data is sent/received as
12045 + * quickly as you can stuff the FIFO. The overhead of DMA and interrupts
12046 + * are usually far greater than the data transfer itself. If, however,
12047 + * we find applications that move large amounts of data, we may choose
12048 + * use the overhead of buffering and DMA to do the work.
12049 + */
12050 +
12051 +/* The maximum clock rate specified in the manual is 2mHz.
12052 +*/
12053 +#define MAX_BAUD_RATE (2 * 1000000)
12054 +#define PSC_INTCLK_RATE (32 * 1000000)
12055 +
12056 +static int inuse;
12057 +
12058 +/* We have to know what the user requested for the data length
12059 + * so we know how to stuff the fifo. The FIFO is 32 bits wide,
12060 + * and we have to load it with the bits to go in a single transfer.
12061 + */
12062 +static uint spi_datalen;
12063 +
12064 +static int
12065 +au1550spi_master_done( int ms )
12066 +{
12067 + int timeout=ms;
12068 + volatile psc_spi_t *sp;
12069 +
12070 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12071 +
12072 + /* Loop until MD is set or timeout has expired */
12073 + while(!(sp->psc_spievent & PSC_SPIEVNT_MD) && timeout--) udelay(1000);
12074 +
12075 + if ( !timeout )
12076 + return 0;
12077 + else
12078 + sp->psc_spievent |= PSC_SPIEVNT_MD;
12079 +
12080 + return 1;
12081 +}
12082 +
12083 +static int
12084 +au1550spi_open(struct inode *inode, struct file *file)
12085 +{
12086 + if (inuse)
12087 + return -EBUSY;
12088 +
12089 + inuse = 1;
12090 +
12091 + MOD_INC_USE_COUNT;
12092 +
12093 + return 0;
12094 +}
12095 +
12096 +static ssize_t
12097 +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
12098 +{
12099 + int bytelen, i;
12100 + size_t rcount, retval;
12101 + unsigned char sb, *rp, *wp;
12102 + uint fifoword, pcr, stat;
12103 + volatile psc_spi_t *sp;
12104 +
12105 + /* Get the number of bytes per transfer.
12106 + */
12107 + bytelen = ((spi_datalen - 1) / 8) + 1;
12108 +
12109 + /* User needs to send us multiple of this count.
12110 + */
12111 + if ((count % bytelen) != 0)
12112 + return -EINVAL;
12113 +
12114 + rp = wp = (unsigned char *)bp;
12115 + retval = rcount = count;
12116 +
12117 + /* Reset the FIFO.
12118 + */
12119 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12120 + sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
12121 + au_sync();
12122 + do {
12123 + pcr = sp->psc_spipcr;
12124 + au_sync();
12125 + } while (pcr != 0);
12126 +
12127 + /* Prime the transmit FIFO.
12128 + */
12129 + while (count > 0) {
12130 + fifoword = 0;
12131 + for (i=0; i<bytelen; i++) {
12132 + fifoword <<= 8;
12133 + if (get_user(sb, wp) < 0)
12134 + return -EFAULT;
12135 + fifoword |= sb;
12136 + wp++;
12137 + }
12138 + count -= bytelen;
12139 + if (count <= 0)
12140 + fifoword |= PSC_SPITXRX_LC;
12141 + sp->psc_spitxrx = fifoword;
12142 + au_sync();
12143 + stat = sp->psc_spistat;
12144 + au_sync();
12145 + if (stat & PSC_SPISTAT_TF)
12146 + break;
12147 + }
12148 +
12149 + /* Start the transfer.
12150 + */
12151 + sp->psc_spipcr = PSC_SPIPCR_MS;
12152 + au_sync();
12153 +
12154 + /* Now, just keep the transmit fifo full and empty the receive.
12155 + */
12156 + while (count > 0) {
12157 + stat = sp->psc_spistat;
12158 + au_sync();
12159 + while ((stat & PSC_SPISTAT_RE) == 0) {
12160 + fifoword = sp->psc_spitxrx;
12161 + au_sync();
12162 + for (i=0; i<bytelen; i++) {
12163 + sb = fifoword & 0xff;
12164 + if (put_user(sb, rp) < 0)
12165 + return -EFAULT;
12166 + fifoword >>= 8;
12167 + rp++;
12168 + }
12169 + rcount -= bytelen;
12170 + stat = sp->psc_spistat;
12171 + au_sync();
12172 + }
12173 + if ((stat & PSC_SPISTAT_TF) == 0) {
12174 + fifoword = 0;
12175 + for (i=0; i<bytelen; i++) {
12176 + fifoword <<= 8;
12177 + if (get_user(sb, wp) < 0)
12178 + return -EFAULT;
12179 + fifoword |= sb;
12180 + wp++;
12181 + }
12182 + count -= bytelen;
12183 + if (count <= 0)
12184 + fifoword |= PSC_SPITXRX_LC;
12185 + sp->psc_spitxrx = fifoword;
12186 + au_sync();
12187 + }
12188 + }
12189 +
12190 + /* All of the bytes for transmit have been written. Hang
12191 + * out waiting for any residual bytes that are yet to be
12192 + * read from the fifo.
12193 + */
12194 + while (rcount > 0) {
12195 + stat = sp->psc_spistat;
12196 + au_sync();
12197 + if ((stat & PSC_SPISTAT_RE) == 0) {
12198 + fifoword = sp->psc_spitxrx;
12199 + au_sync();
12200 + for (i=0; i<bytelen; i++) {
12201 + sb = fifoword & 0xff;
12202 + if (put_user(sb, rp) < 0)
12203 + return -EFAULT;
12204 + fifoword >>= 8;
12205 + rp++;
12206 + }
12207 + rcount -= bytelen;
12208 + }
12209 + }
12210 +
12211 + /* Wait for MasterDone event. 30ms timeout */
12212 + if (!au1550spi_master_done(30) ) retval = -EFAULT;
12213 + return retval;
12214 +}
12215 +
12216 +static int
12217 +au1550spi_release(struct inode *inode, struct file *file)
12218 +{
12219 + MOD_DEC_USE_COUNT;
12220 +
12221 + inuse = 0;
12222 +
12223 + return 0;
12224 +}
12225 +
12226 +/* Set the baud rate closest to the request, then return the actual
12227 + * value we are using.
12228 + */
12229 +static uint
12230 +set_baud_rate(uint baud)
12231 +{
12232 + uint rate, tmpclk, brg, ctl, stat;
12233 + volatile psc_spi_t *sp;
12234 +
12235 + /* For starters, the input clock is divided by two.
12236 + */
12237 + tmpclk = PSC_INTCLK_RATE/2;
12238 +
12239 + rate = tmpclk / baud;
12240 +
12241 + /* The dividers work as follows:
12242 + * baud = tmpclk / (2 * (brg + 1))
12243 + */
12244 + brg = (rate/2) - 1;
12245 +
12246 + /* Test BRG to ensure it will fit into the 6 bits allocated.
12247 + */
12248 +
12249 + /* Make sure the device is disabled while we make the change.
12250 + */
12251 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12252 + ctl = sp->psc_spicfg;
12253 + au_sync();
12254 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12255 + au_sync();
12256 + ctl = PSC_SPICFG_CLR_BAUD(ctl);
12257 + ctl |= PSC_SPICFG_SET_BAUD(brg);
12258 + sp->psc_spicfg = ctl;
12259 + au_sync();
12260 +
12261 + /* If the device was running prior to getting here, wait for
12262 + * it to restart.
12263 + */
12264 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12265 + do {
12266 + stat = sp->psc_spistat;
12267 + au_sync();
12268 + } while ((stat & PSC_SPISTAT_DR) == 0);
12269 + }
12270 +
12271 + /* Return the actual value.
12272 + */
12273 + rate = tmpclk / (2 * (brg + 1));
12274 +
12275 + return(rate);
12276 +}
12277 +
12278 +static uint
12279 +set_word_len(uint len)
12280 +{
12281 + uint ctl, stat;
12282 + volatile psc_spi_t *sp;
12283 +
12284 + if ((len < 4) || (len > 24))
12285 + return -EINVAL;
12286 +
12287 + /* Make sure the device is disabled while we make the change.
12288 + */
12289 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12290 + ctl = sp->psc_spicfg;
12291 + au_sync();
12292 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12293 + au_sync();
12294 + ctl = PSC_SPICFG_CLR_LEN(ctl);
12295 + ctl |= PSC_SPICFG_SET_LEN(len);
12296 + sp->psc_spicfg = ctl;
12297 + au_sync();
12298 +
12299 + /* If the device was running prior to getting here, wait for
12300 + * it to restart.
12301 + */
12302 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12303 + do {
12304 + stat = sp->psc_spistat;
12305 + au_sync();
12306 + } while ((stat & PSC_SPISTAT_DR) == 0);
12307 + }
12308 +
12309 + return 0;
12310 +}
12311 +
12312 +static int
12313 +au1550spi_ioctl(struct inode *inode, struct file *file,
12314 + unsigned int cmd, unsigned long arg)
12315 +{
12316 + int status;
12317 + u32 val;
12318 +
12319 + status = 0;
12320 +
12321 + switch(cmd) {
12322 + case AU1550SPI_WORD_LEN:
12323 + status = set_word_len(arg);
12324 + break;
12325 +
12326 + case AU1550SPI_SET_BAUD:
12327 + if (get_user(val, (u32 *)arg))
12328 + return -EFAULT;
12329 +
12330 + val = set_baud_rate(val);
12331 + if (put_user(val, (u32 *)arg))
12332 + return -EFAULT;
12333 + break;
12334 +
12335 + default:
12336 + status = -ENOIOCTLCMD;
12337 +
12338 + }
12339 +
12340 + return status;
12341 +}
12342 +
12343 +
12344 +static struct file_operations au1550spi_fops =
12345 +{
12346 + owner: THIS_MODULE,
12347 + write: au1550spi_write,
12348 + ioctl: au1550spi_ioctl,
12349 + open: au1550spi_open,
12350 + release: au1550spi_release,
12351 +};
12352 +
12353 +
12354 +static struct miscdevice au1550spi_miscdev =
12355 +{
12356 + MISC_DYNAMIC_MINOR,
12357 + "au1550_spi",
12358 + &au1550spi_fops
12359 +};
12360 +
12361 +
12362 +int __init
12363 +au1550spi_init(void)
12364 +{
12365 + uint clk, rate, stat;
12366 + volatile psc_spi_t *sp;
12367 +
12368 + /* Wire up Freq3 as a clock for the SPI. The PSC does
12369 + * factor of 2 divisor, so run a higher rate so we can
12370 + * get some granularity to the clock speeds.
12371 + * We can't do this in board set up because the frequency
12372 + * is computed too late.
12373 + */
12374 + rate = get_au1x00_speed();
12375 + rate /= PSC_INTCLK_RATE;
12376 +
12377 + /* The FRDIV in the frequency control is (FRDIV + 1) * 2
12378 + */
12379 + rate /=2;
12380 + rate--;
12381 + clk = au_readl(SYS_FREQCTRL1);
12382 + au_sync();
12383 + clk &= ~SYS_FC_FRDIV3_MASK;
12384 + clk |= (rate << SYS_FC_FRDIV3_BIT);
12385 + clk |= SYS_FC_FE3;
12386 + au_writel(clk, SYS_FREQCTRL1);
12387 + au_sync();
12388 +
12389 + /* Set up the clock source routing to get Freq3 to PSC0_intclk.
12390 + */
12391 + clk = au_readl(SYS_CLKSRC);
12392 + au_sync();
12393 + clk &= ~0x03e0;
12394 + clk |= (5 << 7);
12395 + au_writel(clk, SYS_CLKSRC);
12396 + au_sync();
12397 +
12398 + /* Set up GPIO pin function to drive PSC0_SYNC1, which is
12399 + * the SPI Select.
12400 + */
12401 + clk = au_readl(SYS_PINFUNC);
12402 + au_sync();
12403 + clk |= 1;
12404 + au_writel(clk, SYS_PINFUNC);
12405 + au_sync();
12406 +
12407 + /* Now, set up the PSC for SPI PIO mode.
12408 + */
12409 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12410 + sp->psc_ctrl = PSC_CTRL_DISABLE;
12411 + au_sync();
12412 + sp->psc_sel = PSC_SEL_PS_SPIMODE;
12413 + sp->psc_spicfg = 0;
12414 + au_sync();
12415 + sp->psc_ctrl = PSC_CTRL_ENABLE;
12416 + au_sync();
12417 + do {
12418 + stat = sp->psc_spistat;
12419 + au_sync();
12420 + } while ((stat & PSC_SPISTAT_SR) == 0);
12421 +
12422 + sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
12423 + PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
12424 + sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
12425 + spi_datalen = 8;
12426 + sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
12427 + au_sync();
12428 +
12429 + set_baud_rate(1000000);
12430 +
12431 + sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
12432 + do {
12433 + stat = sp->psc_spistat;
12434 + au_sync();
12435 + } while ((stat & PSC_SPISTAT_DR) == 0);
12436 +
12437 + misc_register(&au1550spi_miscdev);
12438 + printk("Au1550 SPI driver\n");
12439 + return 0;
12440 +}
12441 +
12442 +
12443 +void __exit
12444 +au1550spi_exit(void)
12445 +{
12446 + misc_deregister(&au1550spi_miscdev);
12447 +}
12448 +
12449 +
12450 +module_init(au1550spi_init);
12451 +module_exit(au1550spi_exit);
12452 diff -Nur linux-2.4.32-rc1/drivers/char/Config.in linux-2.4.32-rc1.mips/drivers/char/Config.in
12453 --- linux-2.4.32-rc1/drivers/char/Config.in 2004-08-08 01:26:04.000000000 +0200
12454 +++ linux-2.4.32-rc1.mips/drivers/char/Config.in 2005-02-11 22:09:56.000000000 +0100
12455 @@ -313,14 +313,11 @@
12456 if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
12457 bool 'Tadpole ANA H8 Support (OBSOLETE)' CONFIG_H8
12458 fi
12459 -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
12460 - tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
12461 -fi
12462 if [ "$CONFIG_SGI_IP22" = "y" ]; then
12463 - bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
12464 + tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
12465 fi
12466 if [ "$CONFIG_SGI_IP27" = "y" ]; then
12467 - bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
12468 + tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
12469 fi
12470 if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
12471 tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
12472 @@ -383,6 +380,11 @@
12473 source drivers/char/drm/Config.in
12474 fi
12475 fi
12476 +
12477 +if [ "$CONFIG_X86" = "y" ]; then
12478 + tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
12479 +fi
12480 +
12481 endmenu
12482
12483 if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
12484 @@ -391,6 +393,7 @@
12485 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
12486 tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
12487 tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
12488 + #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
12489 fi
12490 if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
12491 tristate ' ITE GPIO' CONFIG_ITE_GPIO
12492 diff -Nur linux-2.4.32-rc1/drivers/char/decserial.c linux-2.4.32-rc1.mips/drivers/char/decserial.c
12493 --- linux-2.4.32-rc1/drivers/char/decserial.c 2003-08-25 13:44:41.000000000 +0200
12494 +++ linux-2.4.32-rc1.mips/drivers/char/decserial.c 2004-09-28 02:53:01.000000000 +0200
12495 @@ -3,95 +3,105 @@
12496 * choose the right serial device at boot time
12497 *
12498 * triemer 6-SEP-1998
12499 - * sercons.c is designed to allow the three different kinds
12500 + * sercons.c is designed to allow the three different kinds
12501 * of serial devices under the decstation world to co-exist
12502 - * in the same kernel. The idea here is to abstract
12503 + * in the same kernel. The idea here is to abstract
12504 * the pieces of the drivers that are common to this file
12505 * so that they do not clash at compile time and runtime.
12506 *
12507 * HK 16-SEP-1998 v0.002
12508 * removed the PROM console as this is not a real serial
12509 * device. Added support for PROM console in drivers/char/tty_io.c
12510 - * instead. Although it may work to enable more than one
12511 + * instead. Although it may work to enable more than one
12512 * console device I strongly recommend to use only one.
12513 + *
12514 + * Copyright (C) 2004 Maciej W. Rozycki
12515 */
12516
12517 #include <linux/config.h>
12518 +#include <linux/errno.h>
12519 #include <linux/init.h>
12520 +
12521 #include <asm/dec/machtype.h>
12522 +#include <asm/dec/serial.h>
12523 +
12524 +extern int register_zs_hook(unsigned int channel,
12525 + struct dec_serial_hook *hook);
12526 +extern int unregister_zs_hook(unsigned int channel);
12527 +
12528 +extern int register_dz_hook(unsigned int channel,
12529 + struct dec_serial_hook *hook);
12530 +extern int unregister_dz_hook(unsigned int channel);
12531
12532 +int register_dec_serial_hook(unsigned int channel,
12533 + struct dec_serial_hook *hook)
12534 +{
12535 #ifdef CONFIG_ZS
12536 -extern int zs_init(void);
12537 + if (IOASIC)
12538 + return register_zs_hook(channel, hook);
12539 #endif
12540 -
12541 #ifdef CONFIG_DZ
12542 -extern int dz_init(void);
12543 + if (!IOASIC)
12544 + return register_dz_hook(channel, hook);
12545 #endif
12546 + return 0;
12547 +}
12548
12549 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
12550 -
12551 +int unregister_dec_serial_hook(unsigned int channel)
12552 +{
12553 #ifdef CONFIG_ZS
12554 -extern void zs_serial_console_init(void);
12555 + if (IOASIC)
12556 + return unregister_zs_hook(channel);
12557 #endif
12558 -
12559 #ifdef CONFIG_DZ
12560 -extern void dz_serial_console_init(void);
12561 -#endif
12562 -
12563 + if (!IOASIC)
12564 + return unregister_dz_hook(channel);
12565 #endif
12566 + return 0;
12567 +}
12568
12569 -/* rs_init - starts up the serial interface -
12570 - handle normal case of starting up the serial interface */
12571
12572 -#ifdef CONFIG_SERIAL_DEC
12573 +extern int zs_init(void);
12574 +extern int dz_init(void);
12575
12576 +/*
12577 + * rs_init - starts up the serial interface -
12578 + * handle normal case of starting up the serial interface
12579 + */
12580 int __init rs_init(void)
12581 {
12582 -
12583 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12584 - if (IOASIC)
12585 - return zs_init();
12586 - else
12587 - return dz_init();
12588 -#else
12589 -
12590 #ifdef CONFIG_ZS
12591 - return zs_init();
12592 + if (IOASIC)
12593 + return zs_init();
12594 #endif
12595 -
12596 #ifdef CONFIG_DZ
12597 - return dz_init();
12598 -#endif
12599 -
12600 + if (!IOASIC)
12601 + return dz_init();
12602 #endif
12603 + return -ENXIO;
12604 }
12605
12606 __initcall(rs_init);
12607
12608 -#endif
12609
12610 #ifdef CONFIG_SERIAL_DEC_CONSOLE
12611
12612 -/* dec_serial_console_init handles the special case of starting
12613 - * up the console on the serial port
12614 +extern void zs_serial_console_init(void);
12615 +extern void dz_serial_console_init(void);
12616 +
12617 +/*
12618 + * dec_serial_console_init handles the special case of starting
12619 + * up the console on the serial port
12620 */
12621 void __init dec_serial_console_init(void)
12622 {
12623 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12624 - if (IOASIC)
12625 - zs_serial_console_init();
12626 - else
12627 - dz_serial_console_init();
12628 -#else
12629 -
12630 #ifdef CONFIG_ZS
12631 - zs_serial_console_init();
12632 + if (IOASIC)
12633 + zs_serial_console_init();
12634 #endif
12635 -
12636 #ifdef CONFIG_DZ
12637 - dz_serial_console_init();
12638 -#endif
12639 -
12640 + if (!IOASIC)
12641 + dz_serial_console_init();
12642 #endif
12643 }
12644
12645 diff -Nur linux-2.4.32-rc1/drivers/char/ds1286.c linux-2.4.32-rc1.mips/drivers/char/ds1286.c
12646 --- linux-2.4.32-rc1/drivers/char/ds1286.c 2004-02-18 14:36:31.000000000 +0100
12647 +++ linux-2.4.32-rc1.mips/drivers/char/ds1286.c 2004-01-10 06:21:39.000000000 +0100
12648 @@ -1,6 +1,10 @@
12649 /*
12650 * DS1286 Real Time Clock interface for Linux
12651 *
12652 + * Copyright (C) 2003 TimeSys Corp.
12653 + * S. James Hill (James.Hill@timesys.com)
12654 + * (sjhill@realitydiluted.com)
12655 + *
12656 * Copyright (C) 1998, 1999, 2000 Ralf Baechle
12657 *
12658 * Based on code written by Paul Gortmaker.
12659 @@ -29,6 +33,7 @@
12660 #include <linux/types.h>
12661 #include <linux/errno.h>
12662 #include <linux/miscdevice.h>
12663 +#include <linux/module.h>
12664 #include <linux/slab.h>
12665 #include <linux/ioport.h>
12666 #include <linux/fcntl.h>
12667 @@ -95,6 +100,12 @@
12668 return -EIO;
12669 }
12670
12671 +void rtc_ds1286_wait(void)
12672 +{
12673 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12674 + while (sec == CMOS_READ(RTC_SECONDS));
12675 +}
12676 +
12677 static int ds1286_ioctl(struct inode *inode, struct file *file,
12678 unsigned int cmd, unsigned long arg)
12679 {
12680 @@ -249,23 +260,22 @@
12681 {
12682 spin_lock_irq(&ds1286_lock);
12683
12684 - if (ds1286_status & RTC_IS_OPEN)
12685 - goto out_busy;
12686 + if (ds1286_status & RTC_IS_OPEN) {
12687 + spin_unlock_irq(&ds1286_lock);
12688 + return -EBUSY;
12689 + }
12690
12691 ds1286_status |= RTC_IS_OPEN;
12692
12693 - spin_lock_irq(&ds1286_lock);
12694 + spin_unlock_irq(&ds1286_lock);
12695 return 0;
12696 -
12697 -out_busy:
12698 - spin_lock_irq(&ds1286_lock);
12699 - return -EBUSY;
12700 }
12701
12702 static int ds1286_release(struct inode *inode, struct file *file)
12703 {
12704 + spin_lock_irq(&ds1286_lock);
12705 ds1286_status &= ~RTC_IS_OPEN;
12706 -
12707 + spin_unlock_irq(&ds1286_lock);
12708 return 0;
12709 }
12710
12711 @@ -276,32 +286,6 @@
12712 return 0;
12713 }
12714
12715 -/*
12716 - * The various file operations we support.
12717 - */
12718 -
12719 -static struct file_operations ds1286_fops = {
12720 - .llseek = no_llseek,
12721 - .read = ds1286_read,
12722 - .poll = ds1286_poll,
12723 - .ioctl = ds1286_ioctl,
12724 - .open = ds1286_open,
12725 - .release = ds1286_release,
12726 -};
12727 -
12728 -static struct miscdevice ds1286_dev=
12729 -{
12730 - .minor = RTC_MINOR,
12731 - .name = "rtc",
12732 - .fops = &ds1286_fops,
12733 -};
12734 -
12735 -int __init ds1286_init(void)
12736 -{
12737 - printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12738 - return misc_register(&ds1286_dev);
12739 -}
12740 -
12741 static char *days[] = {
12742 "***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
12743 };
12744 @@ -528,3 +512,38 @@
12745 BCD_TO_BIN(alm_tm->tm_hour);
12746 alm_tm->tm_sec = 0;
12747 }
12748 +
12749 +static struct file_operations ds1286_fops = {
12750 + .owner = THIS_MODULE,
12751 + .llseek = no_llseek,
12752 + .read = ds1286_read,
12753 + .poll = ds1286_poll,
12754 + .ioctl = ds1286_ioctl,
12755 + .open = ds1286_open,
12756 + .release = ds1286_release,
12757 +};
12758 +
12759 +static struct miscdevice ds1286_dev =
12760 +{
12761 + .minor = RTC_MINOR,
12762 + .name = "rtc",
12763 + .fops = &ds1286_fops,
12764 +};
12765 +
12766 +static int __init ds1286_init(void)
12767 +{
12768 + printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12769 + return misc_register(&ds1286_dev);
12770 +}
12771 +
12772 +static void __exit ds1286_exit(void)
12773 +{
12774 + misc_deregister(&ds1286_dev);
12775 +}
12776 +
12777 +module_init(ds1286_init);
12778 +module_exit(ds1286_exit);
12779 +EXPORT_NO_SYMBOLS;
12780 +
12781 +MODULE_AUTHOR("Ralf Baechle");
12782 +MODULE_LICENSE("GPL");
12783 diff -Nur linux-2.4.32-rc1/drivers/char/ds1742.c linux-2.4.32-rc1.mips/drivers/char/ds1742.c
12784 --- linux-2.4.32-rc1/drivers/char/ds1742.c 2004-02-18 14:36:31.000000000 +0100
12785 +++ linux-2.4.32-rc1.mips/drivers/char/ds1742.c 2004-01-09 20:27:16.000000000 +0100
12786 @@ -142,6 +142,7 @@
12787 CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
12788
12789 /* convert */
12790 + memset(&tm, 0, sizeof(struct rtc_time));
12791 to_tm(t, &tm);
12792
12793 /* check each field one by one */
12794 @@ -216,6 +217,7 @@
12795 unsigned long curr_time;
12796
12797 curr_time = rtc_ds1742_get_time();
12798 + memset(&tm, 0, sizeof(struct rtc_time));
12799 to_tm(curr_time, &tm);
12800
12801 p = buf;
12802 @@ -251,8 +253,8 @@
12803
12804 void rtc_ds1742_wait(void)
12805 {
12806 - while (CMOS_READ(RTC_SECONDS) & 1);
12807 - while (!(CMOS_READ(RTC_SECONDS) & 1));
12808 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12809 + while (sec == CMOS_READ(RTC_SECONDS));
12810 }
12811
12812 static int ds1742_ioctl(struct inode *inode, struct file *file,
12813 @@ -264,6 +266,7 @@
12814 switch (cmd) {
12815 case RTC_RD_TIME: /* Read the time/date from RTC */
12816 curr_time = rtc_ds1742_get_time();
12817 + memset(&rtc_tm, 0, sizeof(struct rtc_time));
12818 to_tm(curr_time, &rtc_tm);
12819 rtc_tm.tm_year -= 1900;
12820 return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ?
12821 diff -Nur linux-2.4.32-rc1/drivers/char/dummy_keyb.c linux-2.4.32-rc1.mips/drivers/char/dummy_keyb.c
12822 --- linux-2.4.32-rc1/drivers/char/dummy_keyb.c 2003-08-25 13:44:41.000000000 +0200
12823 +++ linux-2.4.32-rc1.mips/drivers/char/dummy_keyb.c 2004-01-09 09:53:08.000000000 +0100
12824 @@ -140,3 +140,7 @@
12825 {
12826 printk("Dummy keyboard driver installed.\n");
12827 }
12828 +#ifdef CONFIG_MAGIC_SYSRQ
12829 +unsigned char kbd_sysrq_key;
12830 +unsigned char kbd_sysrq_xlate[128];
12831 +#endif
12832 diff -Nur linux-2.4.32-rc1/drivers/char/dz.c linux-2.4.32-rc1.mips/drivers/char/dz.c
12833 --- linux-2.4.32-rc1/drivers/char/dz.c 2005-01-19 15:09:44.000000000 +0100
12834 +++ linux-2.4.32-rc1.mips/drivers/char/dz.c 2004-12-27 05:13:42.000000000 +0100
12835 @@ -1,11 +1,13 @@
12836 /*
12837 - * dz.c: Serial port driver for DECStations equiped
12838 + * dz.c: Serial port driver for DECstations equipped
12839 * with the DZ chipset.
12840 *
12841 * Copyright (C) 1998 Olivier A. D. Lebaillif
12842 *
12843 * Email: olivier.lebaillif@ifrsys.com
12844 *
12845 + * Copyright (C) 2004 Maciej W. Rozycki
12846 + *
12847 * [31-AUG-98] triemer
12848 * Changed IRQ to use Harald's dec internals interrupts.h
12849 * removed base_addr code - moving address assignment to setup.c
12850 @@ -24,6 +26,7 @@
12851 #undef DEBUG_DZ
12852
12853 #include <linux/config.h>
12854 +#include <linux/delay.h>
12855 #include <linux/version.h>
12856 #include <linux/kernel.h>
12857 #include <linux/sched.h>
12858 @@ -54,33 +57,56 @@
12859 #include <asm/system.h>
12860 #include <asm/uaccess.h>
12861
12862 -#define CONSOLE_LINE (3) /* for definition of struct console */
12863 +#ifdef CONFIG_MAGIC_SYSRQ
12864 +#include <linux/sysrq.h>
12865 +#endif
12866
12867 #include "dz.h"
12868
12869 -#define DZ_INTR_DEBUG 1
12870 -
12871 DECLARE_TASK_QUEUE(tq_serial);
12872
12873 -static struct dz_serial *lines[4];
12874 -static unsigned char tmp_buffer[256];
12875 +static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
12876 +static struct tty_driver serial_driver, callout_driver;
12877 +
12878 +static struct tty_struct *serial_table[DZ_NB_PORT];
12879 +static struct termios *serial_termios[DZ_NB_PORT];
12880 +static struct termios *serial_termios_locked[DZ_NB_PORT];
12881 +
12882 +static int serial_refcount;
12883
12884 -#ifdef DEBUG_DZ
12885 /*
12886 - * debugging code to send out chars via prom
12887 + * tmp_buf is used as a temporary buffer by serial_write. We need to
12888 + * lock it in case the copy_from_user blocks while swapping in a page,
12889 + * and some other program tries to do a serial write at the same time.
12890 + * Since the lock will only come under contention when the system is
12891 + * swapping and available memory is low, it makes sense to share one
12892 + * buffer across all the serial ports, since it significantly saves
12893 + * memory if large numbers of serial ports are open.
12894 */
12895 -static void debug_console(const char *s, int count)
12896 -{
12897 - unsigned i;
12898 +static unsigned char *tmp_buf;
12899 +static DECLARE_MUTEX(tmp_buf_sem);
12900
12901 - for (i = 0; i < count; i++) {
12902 - if (*s == 10)
12903 - prom_printf("%c", 13);
12904 - prom_printf("%c", *s++);
12905 - }
12906 -}
12907 +static char *dz_name __initdata = "DECstation DZ serial driver version ";
12908 +static char *dz_version __initdata = "1.03";
12909 +
12910 +static struct dz_serial *lines[DZ_NB_PORT];
12911 +static unsigned char tmp_buffer[256];
12912 +
12913 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
12914 +static struct console dz_sercons;
12915 +#endif
12916 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
12917 + !defined(MODULE)
12918 +static unsigned long break_pressed; /* break, really ... */
12919 #endif
12920
12921 +static void change_speed (struct dz_serial *);
12922 +
12923 +static int baud_table[] = {
12924 + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
12925 + 9600, 0
12926 +};
12927 +
12928 /*
12929 * ------------------------------------------------------------
12930 * dz_in () and dz_out ()
12931 @@ -94,15 +120,16 @@
12932 {
12933 volatile unsigned short *addr =
12934 (volatile unsigned short *) (info->port + offset);
12935 +
12936 return *addr;
12937 }
12938
12939 static inline void dz_out(struct dz_serial *info, unsigned offset,
12940 unsigned short value)
12941 {
12942 -
12943 volatile unsigned short *addr =
12944 (volatile unsigned short *) (info->port + offset);
12945 +
12946 *addr = value;
12947 }
12948
12949 @@ -143,25 +170,24 @@
12950
12951 tmp |= mask; /* set the TX flag */
12952 dz_out(info, DZ_TCR, tmp);
12953 -
12954 }
12955
12956 /*
12957 * ------------------------------------------------------------
12958 - * Here starts the interrupt handling routines. All of the
12959 - * following subroutines are declared as inline and are folded
12960 - * into dz_interrupt. They were separated out for readability's
12961 - * sake.
12962 *
12963 - * Note: rs_interrupt() is a "fast" interrupt, which means that it
12964 + * Here starts the interrupt handling routines. All of the following
12965 + * subroutines are declared as inline and are folded into
12966 + * dz_interrupt(). They were separated out for readability's sake.
12967 + *
12968 + * Note: dz_interrupt() is a "fast" interrupt, which means that it
12969 * runs with interrupts turned off. People who may want to modify
12970 - * rs_interrupt() should try to keep the interrupt handler as fast as
12971 + * dz_interrupt() should try to keep the interrupt handler as fast as
12972 * possible. After you are done making modifications, it is not a bad
12973 * idea to do:
12974 *
12975 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
12976 *
12977 - * and look at the resulting assemble code in serial.s.
12978 + * and look at the resulting assemble code in dz.s.
12979 *
12980 * ------------------------------------------------------------
12981 */
12982 @@ -188,101 +214,97 @@
12983 * This routine deals with inputs from any lines.
12984 * ------------------------------------------------------------
12985 */
12986 -static inline void receive_chars(struct dz_serial *info_in)
12987 +static inline void receive_chars(struct dz_serial *info_in,
12988 + struct pt_regs *regs)
12989 {
12990 -
12991 struct dz_serial *info;
12992 - struct tty_struct *tty = 0;
12993 + struct tty_struct *tty;
12994 struct async_icount *icount;
12995 - int ignore = 0;
12996 - unsigned short status, tmp;
12997 - unsigned char ch;
12998 -
12999 - /* this code is going to be a problem...
13000 - the call to tty_flip_buffer is going to need
13001 - to be rethought...
13002 - */
13003 - do {
13004 - status = dz_in(info_in, DZ_RBUF);
13005 - info = lines[LINE(status)];
13006 + int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
13007 + unsigned short status;
13008 + unsigned char ch, flag;
13009 + int i;
13010
13011 - /* punt so we don't get duplicate characters */
13012 - if (!(status & DZ_DVAL))
13013 - goto ignore_char;
13014 -
13015 - ch = UCHAR(status); /* grab the char */
13016 -
13017 -#if 0
13018 - if (info->is_console) {
13019 - if (ch == 0)
13020 - return; /* it's a break ... */
13021 - }
13022 -#endif
13023 + while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
13024 + info = lines[LINE(status)];
13025 + tty = info->tty; /* point to the proper dev */
13026
13027 - tty = info->tty; /* now tty points to the proper dev */
13028 - icount = &info->icount;
13029 + ch = UCHAR(status); /* grab the char */
13030
13031 - if (!tty)
13032 - break;
13033 - if (tty->flip.count >= TTY_FLIPBUF_SIZE)
13034 - break;
13035 + if (!tty && (!info->hook || !info->hook->rx_char))
13036 + continue;
13037
13038 - *tty->flip.char_buf_ptr = ch;
13039 - *tty->flip.flag_buf_ptr = 0;
13040 + icount = &info->icount;
13041 icount->rx++;
13042
13043 - /* keep track of the statistics */
13044 - if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
13045 - if (status & DZ_PERR) /* parity error */
13046 - icount->parity++;
13047 - else if (status & DZ_FERR) /* frame error */
13048 - icount->frame++;
13049 - if (status & DZ_OERR) /* overrun error */
13050 - icount->overrun++;
13051 -
13052 - /* check to see if we should ignore the character
13053 - and mask off conditions that should be ignored
13054 + flag = 0;
13055 + if (status & DZ_FERR) { /* frame error */
13056 + /*
13057 + * There is no separate BREAK status bit, so
13058 + * treat framing errors as BREAKs for Magic SysRq
13059 + * and SAK; normally, otherwise.
13060 */
13061 -
13062 - if (status & info->ignore_status_mask) {
13063 - if (++ignore > 100)
13064 - break;
13065 - goto ignore_char;
13066 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
13067 + !defined(MODULE)
13068 + if (info->line == dz_sercons.index) {
13069 + if (!break_pressed)
13070 + break_pressed = jiffies;
13071 + continue;
13072 }
13073 - /* mask off the error conditions we want to ignore */
13074 - tmp = status & info->read_status_mask;
13075 -
13076 - if (tmp & DZ_PERR) {
13077 - *tty->flip.flag_buf_ptr = TTY_PARITY;
13078 -#ifdef DEBUG_DZ
13079 - debug_console("PERR\n", 5);
13080 -#endif
13081 - } else if (tmp & DZ_FERR) {
13082 - *tty->flip.flag_buf_ptr = TTY_FRAME;
13083 -#ifdef DEBUG_DZ
13084 - debug_console("FERR\n", 5);
13085 #endif
13086 + flag = TTY_BREAK;
13087 + if (info->flags & DZ_SAK)
13088 + do_SAK(tty);
13089 + else
13090 + flag = TTY_FRAME;
13091 + } else if (status & DZ_OERR) /* overrun error */
13092 + flag = TTY_OVERRUN;
13093 + else if (status & DZ_PERR) /* parity error */
13094 + flag = TTY_PARITY;
13095 +
13096 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
13097 + !defined(MODULE)
13098 + if (break_pressed && info->line == dz_sercons.index) {
13099 + if (time_before(jiffies, break_pressed + HZ * 5)) {
13100 + handle_sysrq(ch, regs, NULL, NULL);
13101 + break_pressed = 0;
13102 + continue;
13103 }
13104 - if (tmp & DZ_OERR) {
13105 -#ifdef DEBUG_DZ
13106 - debug_console("OERR\n", 5);
13107 + break_pressed = 0;
13108 + }
13109 #endif
13110 - if (tty->flip.count < TTY_FLIPBUF_SIZE) {
13111 - tty->flip.count++;
13112 - tty->flip.flag_buf_ptr++;
13113 - tty->flip.char_buf_ptr++;
13114 - *tty->flip.flag_buf_ptr = TTY_OVERRUN;
13115 - }
13116 - }
13117 +
13118 + if (info->hook && info->hook->rx_char) {
13119 + (*info->hook->rx_char)(ch, flag);
13120 + return;
13121 }
13122 - tty->flip.flag_buf_ptr++;
13123 - tty->flip.char_buf_ptr++;
13124 - tty->flip.count++;
13125 - ignore_char:
13126 - } while (status & DZ_DVAL);
13127
13128 - if (tty)
13129 - tty_flip_buffer_push(tty);
13130 + /* keep track of the statistics */
13131 + switch (flag) {
13132 + case TTY_FRAME:
13133 + icount->frame++;
13134 + break;
13135 + case TTY_PARITY:
13136 + icount->parity++;
13137 + break;
13138 + case TTY_OVERRUN:
13139 + icount->overrun++;
13140 + break;
13141 + case TTY_BREAK:
13142 + icount->brk++;
13143 + break;
13144 + default:
13145 + break;
13146 + }
13147 +
13148 + if ((status & info->ignore_status_mask) == 0) {
13149 + tty_insert_flip_char(tty, ch, flag);
13150 + lines_rx[LINE(status)] = 1;
13151 + }
13152 + }
13153 + for (i = 0; i < DZ_NB_PORT; i++)
13154 + if (lines_rx[i])
13155 + tty_flip_buffer_push(lines[i]->tty);
13156 }
13157
13158 /*
13159 @@ -292,20 +314,34 @@
13160 * This routine deals with outputs to any lines.
13161 * ------------------------------------------------------------
13162 */
13163 -static inline void transmit_chars(struct dz_serial *info)
13164 +static inline void transmit_chars(struct dz_serial *info_in)
13165 {
13166 + struct dz_serial *info;
13167 + unsigned short status;
13168 unsigned char tmp;
13169
13170 + status = dz_in(info_in, DZ_CSR);
13171 + info = lines[LINE(status)];
13172
13173 + if (info->hook || !info->tty) {
13174 + unsigned short mask, tmp;
13175
13176 - if (info->x_char) { /* XON/XOFF chars */
13177 + mask = 1 << info->line;
13178 + tmp = dz_in(info, DZ_TCR); /* read the TX flag */
13179 + tmp &= ~mask; /* clear the TX flag */
13180 + dz_out(info, DZ_TCR, tmp);
13181 + return;
13182 + }
13183 +
13184 + if (info->x_char) { /* XON/XOFF chars */
13185 dz_out(info, DZ_TDR, info->x_char);
13186 info->icount.tx++;
13187 info->x_char = 0;
13188 return;
13189 }
13190 /* if nothing to do or stopped or hardware stopped */
13191 - if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
13192 + if (info->xmit_cnt <= 0 ||
13193 + info->tty->stopped || info->tty->hw_stopped) {
13194 dz_stop(info->tty);
13195 return;
13196 }
13197 @@ -359,15 +395,14 @@
13198 */
13199 static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
13200 {
13201 - struct dz_serial *info;
13202 + struct dz_serial *info = (struct dz_serial *)dev;
13203 unsigned short status;
13204
13205 /* get the reason why we just got an irq */
13206 - status = dz_in((struct dz_serial *) dev, DZ_CSR);
13207 - info = lines[LINE(status)]; /* re-arrange info the proper port */
13208 + status = dz_in(info, DZ_CSR);
13209
13210 if (status & DZ_RDONE)
13211 - receive_chars(info); /* the receive function */
13212 + receive_chars(info, regs);
13213
13214 if (status & DZ_TRDY)
13215 transmit_chars(info);
13216 @@ -514,7 +549,7 @@
13217
13218
13219 info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
13220 - dz_out(info, DZ_LPR, info->cflags);
13221 + dz_out(info, DZ_LPR, info->cflags | info->line);
13222
13223 if (info->xmit_buf) { /* free Tx buffer */
13224 free_page((unsigned long) info->xmit_buf);
13225 @@ -545,18 +580,21 @@
13226 {
13227 unsigned long flags;
13228 unsigned cflag;
13229 - int baud;
13230 + int baud, i;
13231
13232 - if (!info->tty || !info->tty->termios)
13233 - return;
13234 + if (!info->hook) {
13235 + if (!info->tty || !info->tty->termios)
13236 + return;
13237 + cflag = info->tty->termios->c_cflag;
13238 + } else {
13239 + cflag = info->hook->cflags;
13240 + }
13241
13242 save_flags(flags);
13243 cli();
13244
13245 info->cflags = info->line;
13246
13247 - cflag = info->tty->termios->c_cflag;
13248 -
13249 switch (cflag & CSIZE) {
13250 case CS5:
13251 info->cflags |= DZ_CS5;
13252 @@ -579,7 +617,16 @@
13253 if (cflag & PARODD)
13254 info->cflags |= DZ_PARODD;
13255
13256 - baud = tty_get_baud_rate(info->tty);
13257 + i = cflag & CBAUD;
13258 + if (i & CBAUDEX) {
13259 + i &= ~CBAUDEX;
13260 + if (!info->hook)
13261 + info->tty->termios->c_cflag &= ~CBAUDEX;
13262 + else
13263 + info->hook->cflags &= ~CBAUDEX;
13264 + }
13265 + baud = baud_table[i];
13266 +
13267 switch (baud) {
13268 case 50:
13269 info->cflags |= DZ_B50;
13270 @@ -629,16 +676,16 @@
13271 }
13272
13273 info->cflags |= DZ_RXENAB;
13274 - dz_out(info, DZ_LPR, info->cflags);
13275 + dz_out(info, DZ_LPR, info->cflags | info->line);
13276
13277 /* setup accept flag */
13278 info->read_status_mask = DZ_OERR;
13279 - if (I_INPCK(info->tty))
13280 + if (info->tty && I_INPCK(info->tty))
13281 info->read_status_mask |= (DZ_FERR | DZ_PERR);
13282
13283 /* characters to ignore */
13284 info->ignore_status_mask = 0;
13285 - if (I_IGNPAR(info->tty))
13286 + if (info->tty && I_IGNPAR(info->tty))
13287 info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
13288
13289 restore_flags(flags);
13290 @@ -694,7 +741,7 @@
13291
13292 down(&tmp_buf_sem);
13293 while (1) {
13294 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13295 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13296 if (c <= 0)
13297 break;
13298
13299 @@ -707,7 +754,7 @@
13300 save_flags(flags);
13301 cli();
13302
13303 - c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13304 + c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13305 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
13306 info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
13307 info->xmit_cnt += c;
13308 @@ -727,7 +774,7 @@
13309 save_flags(flags);
13310 cli();
13311
13312 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13313 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13314 if (c <= 0) {
13315 restore_flags(flags);
13316 break;
13317 @@ -845,7 +892,7 @@
13318
13319 /*
13320 * ------------------------------------------------------------
13321 - * rs_ioctl () and friends
13322 + * dz_ioctl () and friends
13323 * ------------------------------------------------------------
13324 */
13325 static int get_serial_info(struct dz_serial *info,
13326 @@ -958,6 +1005,9 @@
13327 struct dz_serial *info = (struct dz_serial *) tty->driver_data;
13328 int retval;
13329
13330 + if (info->hook)
13331 + return -ENODEV;
13332 +
13333 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
13334 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
13335 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
13336 @@ -1252,19 +1302,14 @@
13337 int retval, line;
13338
13339 line = MINOR(tty->device) - tty->driver.minor_start;
13340 -
13341 - /* The dz lines for the mouse/keyboard must be
13342 - * opened using their respective drivers.
13343 - */
13344 if ((line < 0) || (line >= DZ_NB_PORT))
13345 return -ENODEV;
13346 + info = lines[line];
13347
13348 - if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
13349 + if (info->hook)
13350 return -ENODEV;
13351
13352 - info = lines[line];
13353 info->count++;
13354 -
13355 tty->driver_data = info;
13356 info->tty = tty;
13357
13358 @@ -1285,14 +1330,21 @@
13359 else
13360 *tty->termios = info->callout_termios;
13361 change_speed(info);
13362 -
13363 }
13364 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13365 + if (dz_sercons.cflag && dz_sercons.index == line) {
13366 + tty->termios->c_cflag = dz_sercons.cflag;
13367 + dz_sercons.cflag = 0;
13368 + change_speed(info);
13369 + }
13370 +#endif
13371 +
13372 info->session = current->session;
13373 info->pgrp = current->pgrp;
13374 return 0;
13375 }
13376
13377 -static void show_serial_version(void)
13378 +static void __init show_serial_version(void)
13379 {
13380 printk("%s%s\n", dz_name, dz_version);
13381 }
13382 @@ -1300,7 +1352,6 @@
13383 int __init dz_init(void)
13384 {
13385 int i;
13386 - long flags;
13387 struct dz_serial *info;
13388
13389 /* Setup base handler, and timer table. */
13390 @@ -1311,9 +1362,9 @@
13391 memset(&serial_driver, 0, sizeof(struct tty_driver));
13392 serial_driver.magic = TTY_DRIVER_MAGIC;
13393 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13394 - serial_driver.name = "ttyS";
13395 -#else
13396 serial_driver.name = "tts/%d";
13397 +#else
13398 + serial_driver.name = "ttyS";
13399 #endif
13400 serial_driver.major = TTY_MAJOR;
13401 serial_driver.minor_start = 64;
13402 @@ -1352,9 +1403,9 @@
13403 */
13404 callout_driver = serial_driver;
13405 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13406 - callout_driver.name = "cua";
13407 -#else
13408 callout_driver.name = "cua/%d";
13409 +#else
13410 + callout_driver.name = "cua";
13411 #endif
13412 callout_driver.major = TTYAUX_MAJOR;
13413 callout_driver.subtype = SERIAL_TYPE_CALLOUT;
13414 @@ -1363,25 +1414,27 @@
13415 panic("Couldn't register serial driver");
13416 if (tty_register_driver(&callout_driver))
13417 panic("Couldn't register callout driver");
13418 - save_flags(flags);
13419 - cli();
13420
13421 for (i = 0; i < DZ_NB_PORT; i++) {
13422 info = &multi[i];
13423 lines[i] = info;
13424 - info->magic = SERIAL_MAGIC;
13425 -
13426 + info->tty = 0;
13427 + info->x_char = 0;
13428 if (mips_machtype == MACH_DS23100 ||
13429 mips_machtype == MACH_DS5100)
13430 info->port = (unsigned long) KN01_DZ11_BASE;
13431 else
13432 info->port = (unsigned long) KN02_DZ11_BASE;
13433 -
13434 info->line = i;
13435 - info->tty = 0;
13436 +
13437 + if (info->hook && info->hook->init_info) {
13438 + (*info->hook->init_info)(info);
13439 + continue;
13440 + }
13441 +
13442 + info->magic = SERIAL_MAGIC;
13443 info->close_delay = 50;
13444 info->closing_wait = 3000;
13445 - info->x_char = 0;
13446 info->event = 0;
13447 info->count = 0;
13448 info->blocked_open = 0;
13449 @@ -1393,25 +1446,16 @@
13450 info->normal_termios = serial_driver.init_termios;
13451 init_waitqueue_head(&info->open_wait);
13452 init_waitqueue_head(&info->close_wait);
13453 -
13454 - /*
13455 - * If we are pointing to address zero then punt - not correctly
13456 - * set up in setup.c to handle this.
13457 - */
13458 - if (!info->port)
13459 - return 0;
13460 -
13461 - printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
13462 - info->port, dec_interrupt[DEC_IRQ_DZ11]);
13463 -
13464 + printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
13465 + info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
13466 tty_register_devfs(&serial_driver, 0,
13467 - serial_driver.minor_start + info->line);
13468 + serial_driver.minor_start + info->line);
13469 tty_register_devfs(&callout_driver, 0,
13470 - callout_driver.minor_start + info->line);
13471 + callout_driver.minor_start + info->line);
13472 }
13473
13474 - /* reset the chip */
13475 #ifndef CONFIG_SERIAL_DEC_CONSOLE
13476 + /* reset the chip */
13477 dz_out(info, DZ_CSR, DZ_CLR);
13478 while (dz_in(info, DZ_CSR) & DZ_CLR);
13479 iob();
13480 @@ -1420,43 +1464,104 @@
13481 dz_out(info, DZ_CSR, DZ_MSE);
13482 #endif
13483
13484 - /* order matters here... the trick is that flags
13485 - is updated... in request_irq - to immediatedly obliterate
13486 - it is unwise. */
13487 - restore_flags(flags);
13488 -
13489 -
13490 if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
13491 - SA_INTERRUPT, "DZ", lines[0]))
13492 + 0, "DZ", lines[0]))
13493 panic("Unable to register DZ interrupt");
13494
13495 + for (i = 0; i < DZ_NB_PORT; i++)
13496 + if (lines[i]->hook) {
13497 + startup(lines[i]);
13498 + if (lines[i]->hook->init_channel)
13499 + (*lines[i]->hook->init_channel)(lines[i]);
13500 + }
13501 +
13502 return 0;
13503 }
13504
13505 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
13506 -static void dz_console_put_char(unsigned char ch)
13507 +/*
13508 + * polling I/O routines
13509 + */
13510 +static int dz_poll_tx_char(void *handle, unsigned char ch)
13511 {
13512 unsigned long flags;
13513 - int loops = 2500;
13514 - unsigned short tmp = ch;
13515 - /* this code sends stuff out to serial device - spinning its
13516 - wheels and waiting. */
13517 + struct dz_serial *info = handle;
13518 + unsigned short csr, tcr, trdy, mask;
13519 + int loops = 10000;
13520 + int ret;
13521
13522 - /* force the issue - point it at lines[3] */
13523 - dz_console = &multi[CONSOLE_LINE];
13524 + local_irq_save(flags);
13525 + csr = dz_in(info, DZ_CSR);
13526 + dz_out(info, DZ_CSR, csr & ~DZ_TIE);
13527 + tcr = dz_in(info, DZ_TCR);
13528 + tcr |= 1 << info->line;
13529 + mask = tcr;
13530 + dz_out(info, DZ_TCR, mask);
13531 + iob();
13532 + local_irq_restore(flags);
13533
13534 - save_flags(flags);
13535 - cli();
13536 + while (loops--) {
13537 + trdy = dz_in(info, DZ_CSR);
13538 + if (!(trdy & DZ_TRDY))
13539 + continue;
13540 + trdy = (trdy & DZ_TLINE) >> 8;
13541 + if (trdy == info->line)
13542 + break;
13543 + mask &= ~(1 << trdy);
13544 + dz_out(info, DZ_TCR, mask);
13545 + iob();
13546 + udelay(2);
13547 + }
13548
13549 + if (loops) {
13550 + dz_out(info, DZ_TDR, ch);
13551 + ret = 0;
13552 + } else
13553 + ret = -EAGAIN;
13554
13555 - /* spin our wheels */
13556 - while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
13557 + dz_out(info, DZ_TCR, tcr);
13558 + dz_out(info, DZ_CSR, csr);
13559
13560 - /* Actually transmit the character. */
13561 - dz_out(dz_console, DZ_TDR, tmp);
13562 + return ret;
13563 +}
13564
13565 - restore_flags(flags);
13566 +static int dz_poll_rx_char(void *handle)
13567 +{
13568 + return -ENODEV;
13569 +}
13570 +
13571 +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
13572 +{
13573 + struct dz_serial *info = multi + channel;
13574 +
13575 + if (info->hook) {
13576 + printk("%s: line %d has already a hook registered\n",
13577 + __FUNCTION__, channel);
13578 +
13579 + return 0;
13580 + } else {
13581 + hook->poll_rx_char = dz_poll_rx_char;
13582 + hook->poll_tx_char = dz_poll_tx_char;
13583 + info->hook = hook;
13584 +
13585 + return 1;
13586 + }
13587 +}
13588 +
13589 +int unregister_dz_hook(unsigned int channel)
13590 +{
13591 + struct dz_serial *info = &multi[channel];
13592 +
13593 + if (info->hook) {
13594 + info->hook = NULL;
13595 + return 1;
13596 + } else {
13597 + printk("%s: trying to unregister hook on line %d,"
13598 + " but none is registered\n", __FUNCTION__, channel);
13599 + return 0;
13600 + }
13601 }
13602 +
13603 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13604 /*
13605 * -------------------------------------------------------------------
13606 * dz_console_print ()
13607 @@ -1465,17 +1570,19 @@
13608 * The console must be locked when we get here.
13609 * -------------------------------------------------------------------
13610 */
13611 -static void dz_console_print(struct console *cons,
13612 +static void dz_console_print(struct console *co,
13613 const char *str,
13614 unsigned int count)
13615 {
13616 + struct dz_serial *info = multi + co->index;
13617 +
13618 #ifdef DEBUG_DZ
13619 prom_printf((char *) str);
13620 #endif
13621 while (count--) {
13622 if (*str == '\n')
13623 - dz_console_put_char('\r');
13624 - dz_console_put_char(*str++);
13625 + dz_poll_tx_char(info, '\r');
13626 + dz_poll_tx_char(info, *str++);
13627 }
13628 }
13629
13630 @@ -1486,12 +1593,12 @@
13631
13632 static int __init dz_console_setup(struct console *co, char *options)
13633 {
13634 + struct dz_serial *info = multi + co->index;
13635 int baud = 9600;
13636 int bits = 8;
13637 int parity = 'n';
13638 int cflag = CREAD | HUPCL | CLOCAL;
13639 char *s;
13640 - unsigned short mask, tmp;
13641
13642 if (options) {
13643 baud = simple_strtoul(options, NULL, 10);
13644 @@ -1542,44 +1649,31 @@
13645 }
13646 co->cflag = cflag;
13647
13648 - /* TOFIX: force to console line */
13649 - dz_console = &multi[CONSOLE_LINE];
13650 if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
13651 - dz_console->port = KN01_DZ11_BASE;
13652 + info->port = KN01_DZ11_BASE;
13653 else
13654 - dz_console->port = KN02_DZ11_BASE;
13655 - dz_console->line = CONSOLE_LINE;
13656 + info->port = KN02_DZ11_BASE;
13657 + info->line = co->index;
13658
13659 - dz_out(dz_console, DZ_CSR, DZ_CLR);
13660 - while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
13661 + dz_out(info, DZ_CSR, DZ_CLR);
13662 + while (dz_in(info, DZ_CSR) & DZ_CLR);
13663
13664 /* enable scanning */
13665 - dz_out(dz_console, DZ_CSR, DZ_MSE);
13666 + dz_out(info, DZ_CSR, DZ_MSE);
13667
13668 /* Set up flags... */
13669 - dz_console->cflags = 0;
13670 - dz_console->cflags |= DZ_B9600;
13671 - dz_console->cflags |= DZ_CS8;
13672 - dz_console->cflags |= DZ_PARENB;
13673 - dz_out(dz_console, DZ_LPR, dz_console->cflags);
13674 -
13675 - mask = 1 << dz_console->line;
13676 - tmp = dz_in(dz_console, DZ_TCR); /* read the TX flag */
13677 - if (!(tmp & mask)) {
13678 - tmp |= mask; /* set the TX flag */
13679 - dz_out(dz_console, DZ_TCR, tmp);
13680 - }
13681 + dz_out(info, DZ_LPR, cflag | info->line);
13682 +
13683 return 0;
13684 }
13685
13686 -static struct console dz_sercons =
13687 -{
13688 - .name = "ttyS",
13689 - .write = dz_console_print,
13690 - .device = dz_console_device,
13691 - .setup = dz_console_setup,
13692 - .flags = CON_CONSDEV | CON_PRINTBUFFER,
13693 - .index = CONSOLE_LINE,
13694 +static struct console dz_sercons = {
13695 + .name = "ttyS",
13696 + .write = dz_console_print,
13697 + .device = dz_console_device,
13698 + .setup = dz_console_setup,
13699 + .flags = CON_PRINTBUFFER,
13700 + .index = -1,
13701 };
13702
13703 void __init dz_serial_console_init(void)
13704 diff -Nur linux-2.4.32-rc1/drivers/char/dz.h linux-2.4.32-rc1.mips/drivers/char/dz.h
13705 --- linux-2.4.32-rc1/drivers/char/dz.h 2002-08-03 02:39:43.000000000 +0200
13706 +++ linux-2.4.32-rc1.mips/drivers/char/dz.h 2004-09-28 02:53:01.000000000 +0200
13707 @@ -10,6 +10,8 @@
13708 #ifndef DZ_SERIAL_H
13709 #define DZ_SERIAL_H
13710
13711 +#include <asm/dec/serial.h>
13712 +
13713 #define SERIAL_MAGIC 0x5301
13714
13715 /*
13716 @@ -17,6 +19,7 @@
13717 */
13718 #define DZ_TRDY 0x8000 /* Transmitter empty */
13719 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
13720 +#define DZ_TLINE 0x0300 /* Transmitter Line Number */
13721 #define DZ_RDONE 0x0080 /* Receiver data ready */
13722 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
13723 #define DZ_MSE 0x0020 /* Master Scan Enable */
13724 @@ -37,19 +40,30 @@
13725 #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
13726
13727 /*
13728 - * Definitions for the Transmit Register.
13729 + * Definitions for the Transmit Control Register.
13730 */
13731 #define DZ_LINE_KEYBOARD 0x0001
13732 #define DZ_LINE_MOUSE 0x0002
13733 #define DZ_LINE_MODEM 0x0004
13734 #define DZ_LINE_PRINTER 0x0008
13735
13736 +#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
13737 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
13738 +#define DZ_PRINT_RTS 0x0200 /* RTS for the printer line (3) */
13739 +#define DZ_PRINT_DTR 0x0100 /* DTR for the printer line (3) */
13740 +#define DZ_LNENB 0x000f /* Transmitter Line Enable */
13741
13742 /*
13743 * Definitions for the Modem Status Register.
13744 */
13745 +#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
13746 +#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
13747 #define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
13748 +#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
13749 +#define DZ_PRINT_RI 0x0008 /* RI for the printer line (2) */
13750 +#define DZ_PRINT_CD 0x0004 /* CD for the printer line (2) */
13751 +#define DZ_PRINT_DSR 0x0002 /* DSR for the printer line (2) */
13752 +#define DZ_PRINT_CTS 0x0001 /* CTS for the printer line (2) */
13753
13754 /*
13755 * Definitions for the Transmit Data Register.
13756 @@ -115,9 +129,6 @@
13757
13758 #define DZ_EVENT_WRITE_WAKEUP 0
13759
13760 -#ifndef MIN
13761 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
13762 -
13763 #define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
13764 #define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
13765 #define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
13766 @@ -129,6 +140,7 @@
13767 #define DZ_CLOSING_WAIT_INF 0
13768 #define DZ_CLOSING_WAIT_NONE 65535
13769
13770 +#define DZ_SAK 0x0004 /* Secure Attention Key (Orange book) */
13771 #define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
13772 #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
13773 #define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
13774 @@ -166,79 +178,9 @@
13775 long session; /* Session of opening process */
13776 long pgrp; /* pgrp of opening process */
13777
13778 + struct dec_serial_hook *hook; /* Hook on this channel. */
13779 unsigned char is_console; /* flag indicating a serial console */
13780 unsigned char is_initialized;
13781 };
13782
13783 -static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
13784 -static struct dz_serial *dz_console;
13785 -static struct tty_driver serial_driver, callout_driver;
13786 -
13787 -static struct tty_struct *serial_table[DZ_NB_PORT];
13788 -static struct termios *serial_termios[DZ_NB_PORT];
13789 -static struct termios *serial_termios_locked[DZ_NB_PORT];
13790 -
13791 -static int serial_refcount;
13792 -
13793 -/*
13794 - * tmp_buf is used as a temporary buffer by serial_write. We need to
13795 - * lock it in case the copy_from_user blocks while swapping in a page,
13796 - * and some other program tries to do a serial write at the same time.
13797 - * Since the lock will only come under contention when the system is
13798 - * swapping and available memory is low, it makes sense to share one
13799 - * buffer across all the serial ports, since it significantly saves
13800 - * memory if large numbers of serial ports are open.
13801 - */
13802 -static unsigned char *tmp_buf;
13803 -static DECLARE_MUTEX(tmp_buf_sem);
13804 -
13805 -static char *dz_name = "DECstation DZ serial driver version ";
13806 -static char *dz_version = "1.02";
13807 -
13808 -static inline unsigned short dz_in (struct dz_serial *, unsigned);
13809 -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
13810 -
13811 -static inline void dz_sched_event (struct dz_serial *, int);
13812 -static inline void receive_chars (struct dz_serial *);
13813 -static inline void transmit_chars (struct dz_serial *);
13814 -static inline void check_modem_status (struct dz_serial *);
13815 -
13816 -static void dz_stop (struct tty_struct *);
13817 -static void dz_start (struct tty_struct *);
13818 -static void dz_interrupt (int, void *, struct pt_regs *);
13819 -static void do_serial_bh (void);
13820 -static void do_softint (void *);
13821 -static void do_serial_hangup (void *);
13822 -static void change_speed (struct dz_serial *);
13823 -static void dz_flush_chars (struct tty_struct *);
13824 -static void dz_console_print (struct console *, const char *, unsigned int);
13825 -static void dz_flush_buffer (struct tty_struct *);
13826 -static void dz_throttle (struct tty_struct *);
13827 -static void dz_unthrottle (struct tty_struct *);
13828 -static void dz_send_xchar (struct tty_struct *, char);
13829 -static void shutdown (struct dz_serial *);
13830 -static void send_break (struct dz_serial *, int);
13831 -static void dz_set_termios (struct tty_struct *, struct termios *);
13832 -static void dz_close (struct tty_struct *, struct file *);
13833 -static void dz_hangup (struct tty_struct *);
13834 -static void show_serial_version (void);
13835 -
13836 -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
13837 -static int dz_write_room (struct tty_struct *);
13838 -static int dz_chars_in_buffer (struct tty_struct *);
13839 -static int startup (struct dz_serial *);
13840 -static int get_serial_info (struct dz_serial *, struct serial_struct *);
13841 -static int set_serial_info (struct dz_serial *, struct serial_struct *);
13842 -static int get_lsr_info (struct dz_serial *, unsigned int *);
13843 -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
13844 -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
13845 -static int dz_open (struct tty_struct *, struct file *);
13846 -
13847 -#ifdef MODULE
13848 -int init_module (void)
13849 -void cleanup_module (void)
13850 -#endif
13851 -
13852 -#endif
13853 -
13854 #endif /* DZ_SERIAL_H */
13855 diff -Nur linux-2.4.32-rc1/drivers/char/ibm_workpad_keymap.map linux-2.4.32-rc1.mips/drivers/char/ibm_workpad_keymap.map
13856 --- linux-2.4.32-rc1/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
13857 +++ linux-2.4.32-rc1.mips/drivers/char/ibm_workpad_keymap.map 2003-12-20 15:20:44.000000000 +0100
13858 @@ -0,0 +1,343 @@
13859 +# Keymap for IBM Workpad z50
13860 +# US Mapping
13861 +#
13862 +# by Michael Klar <wyldfier@iname.com>
13863 +#
13864 +# This is a great big mess on account of how the Caps Lock key is handled as
13865 +# LeftShift-RightShift. Right shift key had to be broken out, so don't use
13866 +# use this map file as a basis for other keyboards that don't do the same
13867 +# thing with Caps Lock.
13868 +#
13869 +# This file is subject to the terms and conditions of the GNU General Public
13870 +# License. See the file "COPYING" in the main directory of this archive
13871 +# for more details.
13872 +
13873 +keymaps 0-2,4-5,8,12,32-33,36-37
13874 +strings as usual
13875 +
13876 +keycode 0 = F1 F11 Console_13
13877 + shiftr keycode 0 = F11
13878 + shift shiftr keycode 0 = F11
13879 + control keycode 0 = F1
13880 + alt keycode 0 = Console_1
13881 + control alt keycode 0 = Console_1
13882 +keycode 1 = F3 F13 Console_15
13883 + shiftr keycode 1 = F13
13884 + shift shiftr keycode 1 = F13
13885 + control keycode 1 = F3
13886 + alt keycode 1 = Console_3
13887 + control alt keycode 1 = Console_3
13888 +keycode 2 = F5 F15 Console_17
13889 + shiftr keycode 2 = F15
13890 + shift shiftr keycode 2 = F15
13891 + control keycode 2 = F5
13892 + alt keycode 2 = Console_5
13893 + control alt keycode 2 = Console_5
13894 +keycode 3 = F7 F17 Console_19
13895 + shiftr keycode 3 = F17
13896 + shift shiftr keycode 3 = F17
13897 + control keycode 3 = F7
13898 + alt keycode 3 = Console_7
13899 + control alt keycode 3 = Console_7
13900 +keycode 4 = F9 F19 Console_21
13901 + shiftr keycode 4 = F19
13902 + shift shiftr keycode 4 = F19
13903 + control keycode 4 = F9
13904 + alt keycode 4 = Console_9
13905 + control alt keycode 4 = Console_9
13906 +#keycode 5 is contrast down
13907 +#keycode 6 is contrast up
13908 +keycode 7 = F11 F11 Console_23
13909 + shiftr keycode 7 = F11
13910 + shift shiftr keycode 7 = F11
13911 + control keycode 7 = F11
13912 + alt keycode 7 = Console_11
13913 + control alt keycode 7 = Console_11
13914 +keycode 8 = F2 F12 Console_14
13915 + shiftr keycode 8 = F12
13916 + shift shiftr keycode 8 = F12
13917 + control keycode 8 = F2
13918 + alt keycode 8 = Console_2
13919 + control alt keycode 8 = Console_2
13920 +keycode 9 = F4 F14 Console_16
13921 + shiftr keycode 9 = F14
13922 + shift shiftr keycode 9 = F14
13923 + control keycode 9 = F4
13924 + alt keycode 9 = Console_4
13925 + control alt keycode 9 = Console_4
13926 +keycode 10 = F6 F16 Console_18
13927 + shiftr keycode 10 = F16
13928 + shift shiftr keycode 10 = F16
13929 + control keycode 10 = F6
13930 + alt keycode 10 = Console_6
13931 + control alt keycode 10 = Console_6
13932 +keycode 11 = F8 F18 Console_20
13933 + shiftr keycode 11 = F18
13934 + shift shiftr keycode 11 = F18
13935 + control keycode 11 = F8
13936 + alt keycode 11 = Console_8
13937 + control alt keycode 11 = Console_8
13938 +keycode 12 = F10 F20 Console_22
13939 + shiftr keycode 12 = F20
13940 + shift shiftr keycode 12 = F20
13941 + control keycode 12 = F10
13942 + alt keycode 12 = Console_10
13943 + control alt keycode 12 = Console_10
13944 +#keycode 13 is brightness down
13945 +#keycode 14 is brightness up
13946 +keycode 15 = F12 F12 Console_24
13947 + shiftr keycode 15 = F12
13948 + shift shiftr keycode 15 = F12
13949 + control keycode 15 = F12
13950 + alt keycode 15 = Console_12
13951 + control alt keycode 15 = Console_12
13952 +keycode 16 = apostrophe quotedbl
13953 + shiftr keycode 16 = quotedbl
13954 + shift shiftr keycode 16 = quotedbl
13955 + control keycode 16 = Control_g
13956 + alt keycode 16 = Meta_apostrophe
13957 +keycode 17 = bracketleft braceleft
13958 + shiftr keycode 17 = braceleft
13959 + shift shiftr keycode 17 = braceleft
13960 + control keycode 17 = Escape
13961 + alt keycode 17 = Meta_bracketleft
13962 +keycode 18 = minus underscore backslash
13963 + shiftr keycode 18 = underscore
13964 + shift shiftr keycode 18 = underscore
13965 + control keycode 18 = Control_underscore
13966 + shift control keycode 18 = Control_underscore
13967 + shiftr control keycode 18 = Control_underscore
13968 + shift shiftr control keycode 18 = Control_underscore
13969 + alt keycode 18 = Meta_minus
13970 +keycode 19 = zero parenright braceright
13971 + shiftr keycode 19 = parenright
13972 + shift shiftr keycode 19 = parenright
13973 + alt keycode 19 = Meta_zero
13974 +keycode 20 = p
13975 + shiftr keycode 20 = +P
13976 + shift shiftr keycode 20 = +p
13977 +keycode 21 = semicolon colon
13978 + shiftr keycode 21 = colon
13979 + shift shiftr keycode 21 = colon
13980 + alt keycode 21 = Meta_semicolon
13981 +keycode 22 = Up Scroll_Backward
13982 + shiftr keycode 22 = Scroll_Backward
13983 + shift shiftr keycode 22 = Scroll_Backward
13984 + alt keycode 22 = Prior
13985 +keycode 23 = slash question
13986 + shiftr keycode 23 = question
13987 + shift shiftr keycode 23 = question
13988 + control keycode 23 = Delete
13989 + alt keycode 23 = Meta_slash
13990 +
13991 +keycode 27 = nine parenleft bracketright
13992 + shiftr keycode 27 = parenleft
13993 + shift shiftr keycode 27 = parenleft
13994 + alt keycode 27 = Meta_nine
13995 +keycode 28 = o
13996 + shiftr keycode 28 = +O
13997 + shift shiftr keycode 28 = +o
13998 +keycode 29 = l
13999 + shiftr keycode 29 = +L
14000 + shift shiftr keycode 29 = +l
14001 +keycode 30 = period greater
14002 + shiftr keycode 30 = greater
14003 + shift shiftr keycode 30 = greater
14004 + control keycode 30 = Compose
14005 + alt keycode 30 = Meta_period
14006 +
14007 +keycode 32 = Left Decr_Console
14008 + shiftr keycode 32 = Decr_Console
14009 + shift shiftr keycode 32 = Decr_Console
14010 + alt keycode 32 = Home
14011 +keycode 33 = bracketright braceright asciitilde
14012 + shiftr keycode 33 = braceright
14013 + shift shiftr keycode 33 = braceright
14014 + control keycode 33 = Control_bracketright
14015 + alt keycode 33 = Meta_bracketright
14016 +keycode 34 = equal plus
14017 + shiftr keycode 34 = plus
14018 + shift shiftr keycode 34 = plus
14019 + alt keycode 34 = Meta_equal
14020 +keycode 35 = eight asterisk bracketleft
14021 + shiftr keycode 35 = asterisk
14022 + shift shiftr keycode 35 = asterisk
14023 + control keycode 35 = Delete
14024 + alt keycode 35 = Meta_eight
14025 +keycode 36 = i
14026 + shiftr keycode 36 = +I
14027 + shift shiftr keycode 36 = +i
14028 +keycode 37 = k
14029 + shiftr keycode 37 = +K
14030 + shift shiftr keycode 37 = +k
14031 +keycode 38 = comma less
14032 + shiftr keycode 38 = less
14033 + shift shiftr keycode 38 = less
14034 + alt keycode 38 = Meta_comma
14035 +
14036 +keycode 40 = h
14037 + shiftr keycode 40 = +H
14038 + shift shiftr keycode 40 = +h
14039 +keycode 41 = y
14040 + shiftr keycode 41 = +Y
14041 + shift shiftr keycode 41 = +y
14042 +keycode 42 = six asciicircum
14043 + shiftr keycode 42 = asciicircum
14044 + shift shiftr keycode 42 = asciicircum
14045 + control keycode 42 = Control_asciicircum
14046 + alt keycode 42 = Meta_six
14047 +keycode 43 = seven ampersand braceleft
14048 + shiftr keycode 43 = ampersand
14049 + shift shiftr keycode 43 = ampersand
14050 + control keycode 43 = Control_underscore
14051 + alt keycode 43 = Meta_seven
14052 +keycode 44 = u
14053 + shiftr keycode 44 = +U
14054 + shift shiftr keycode 44 = +u
14055 +keycode 45 = j
14056 + shiftr keycode 45 = +J
14057 + shift shiftr keycode 45 = +j
14058 +keycode 46 = m
14059 + shiftr keycode 46 = +M
14060 + shift shiftr keycode 46 = +m
14061 +keycode 47 = n
14062 + shiftr keycode 47 = +N
14063 + shift shiftr keycode 47 = +n
14064 +
14065 +# This is the "Backspace" key:
14066 +keycode 49 = Delete Delete
14067 + shiftr keycode 49 = Delete
14068 + shift shiftr keycode 49 = Delete
14069 + control keycode 49 = BackSpace
14070 + alt keycode 49 = Meta_Delete
14071 +keycode 50 = Num_Lock
14072 + shift keycode 50 = Bare_Num_Lock
14073 + shiftr keycode 50 = Bare_Num_Lock
14074 + shift shiftr keycode 50 = Bare_Num_Lock
14075 +# This is the "Delete" key:
14076 +keycode 51 = Remove
14077 + control alt keycode 51 = Boot
14078 +
14079 +keycode 53 = backslash bar
14080 + shiftr keycode 53 = bar
14081 + shift shiftr keycode 53 = bar
14082 + control keycode 53 = Control_backslash
14083 + alt keycode 53 = Meta_backslash
14084 +keycode 54 = Return
14085 + alt keycode 54 = Meta_Control_m
14086 +keycode 55 = space space
14087 + shiftr keycode 55 = space
14088 + shift shiftr keycode 55 = space
14089 + control keycode 55 = nul
14090 + alt keycode 55 = Meta_space
14091 +keycode 56 = g
14092 + shiftr keycode 56 = +G
14093 + shift shiftr keycode 56 = +g
14094 +keycode 57 = t
14095 + shiftr keycode 57 = +T
14096 + shift shiftr keycode 57 = +t
14097 +keycode 58 = five percent
14098 + shiftr keycode 58 = percent
14099 + shift shiftr keycode 58 = percent
14100 + control keycode 58 = Control_bracketright
14101 + alt keycode 58 = Meta_five
14102 +keycode 59 = four dollar dollar
14103 + shiftr keycode 59 = dollar
14104 + shift shiftr keycode 59 = dollar
14105 + control keycode 59 = Control_backslash
14106 + alt keycode 59 = Meta_four
14107 +keycode 60 = r
14108 + shiftr keycode 60 = +R
14109 + shift shiftr keycode 60 = +r
14110 +keycode 61 = f
14111 + shiftr keycode 61 = +F
14112 + shift shiftr keycode 61 = +f
14113 + altgr keycode 61 = Hex_F
14114 +keycode 62 = v
14115 + shiftr keycode 62 = +V
14116 + shift shiftr keycode 62 = +v
14117 +keycode 63 = b
14118 + shiftr keycode 63 = +B
14119 + shift shiftr keycode 63 = +b
14120 + altgr keycode 63 = Hex_B
14121 +
14122 +keycode 67 = three numbersign
14123 + shiftr keycode 67 = numbersign
14124 + shift shiftr keycode 67 = numbersign
14125 + control keycode 67 = Escape
14126 + alt keycode 67 = Meta_three
14127 +keycode 68 = e
14128 + shiftr keycode 68 = +E
14129 + shift shiftr keycode 68 = +e
14130 + altgr keycode 68 = Hex_E
14131 +keycode 69 = d
14132 + shiftr keycode 69 = +D
14133 + shift shiftr keycode 69 = +d
14134 + altgr keycode 69 = Hex_D
14135 +keycode 70 = c
14136 + shiftr keycode 70 = +C
14137 + shift shiftr keycode 70 = +c
14138 + altgr keycode 70 = Hex_C
14139 +keycode 71 = Right Incr_Console
14140 + shiftr keycode 71 = Incr_Console
14141 + shift shiftr keycode 71 = Incr_Console
14142 + alt keycode 71 = End
14143 +
14144 +keycode 75 = two at at
14145 + shiftr keycode 75 = at
14146 + shift shiftr keycode 75 = at
14147 + control keycode 75 = nul
14148 + shift control keycode 75 = nul
14149 + shiftr control keycode 75 = nul
14150 + shift shiftr control keycode 75 = nul
14151 + alt keycode 75 = Meta_two
14152 +keycode 76 = w
14153 + shiftr keycode 76 = +W
14154 + shift shiftr keycode 76 = +w
14155 +keycode 77 = s
14156 + shiftr keycode 77 = +S
14157 + shift shiftr keycode 77 = +s
14158 +keycode 78 = x
14159 + shiftr keycode 78 = +X
14160 + shift shiftr keycode 78 = +x
14161 +keycode 79 = Down Scroll_Forward
14162 + shiftr keycode 79 = Scroll_Forward
14163 + shift shiftr keycode 79 = Scroll_Forward
14164 + alt keycode 79 = Next
14165 +keycode 80 = Escape Escape
14166 + shiftr keycode 80 = Escape
14167 + shift shiftr keycode 80 = Escape
14168 + alt keycode 80 = Meta_Escape
14169 +keycode 81 = Tab Tab
14170 + shiftr keycode 81 = Tab
14171 + shift shiftr keycode 81 = Tab
14172 + alt keycode 81 = Meta_Tab
14173 +keycode 82 = grave asciitilde
14174 + shiftr keycode 82 = asciitilde
14175 + shift shiftr keycode 82 = asciitilde
14176 + control keycode 82 = nul
14177 + alt keycode 82 = Meta_grave
14178 +keycode 83 = one exclam
14179 + shiftr keycode 83 = exclam
14180 + shift shiftr keycode 83 = exclam
14181 + alt keycode 83 = Meta_one
14182 +keycode 84 = q
14183 + shiftr keycode 84 = +Q
14184 + shift shiftr keycode 84 = +q
14185 +keycode 85 = a
14186 + shiftr keycode 85 = +A
14187 + shift shiftr keycode 85 = +a
14188 + altgr keycode 85 = Hex_A
14189 +keycode 86 = z
14190 + shiftr keycode 86 = +Z
14191 + shift shiftr keycode 86 = +z
14192 +
14193 +# This is the windows key:
14194 +keycode 88 = Decr_Console
14195 +keycode 89 = Shift
14196 +keycode 90 = Control
14197 +keycode 91 = Control
14198 +keycode 92 = Alt
14199 +keycode 93 = AltGr
14200 +keycode 94 = ShiftR
14201 + shift keycode 94 = Caps_Lock
14202 diff -Nur linux-2.4.32-rc1/drivers/char/indydog.c linux-2.4.32-rc1.mips/drivers/char/indydog.c
14203 --- linux-2.4.32-rc1/drivers/char/indydog.c 2003-08-25 13:44:41.000000000 +0200
14204 +++ linux-2.4.32-rc1.mips/drivers/char/indydog.c 2004-06-22 17:32:07.000000000 +0200
14205 @@ -1,5 +1,5 @@
14206 /*
14207 - * IndyDog 0.2 A Hardware Watchdog Device for SGI IP22
14208 + * IndyDog 0.3 A Hardware Watchdog Device for SGI IP22
14209 *
14210 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
14211 *
14212 @@ -7,10 +7,10 @@
14213 * modify it under the terms of the GNU General Public License
14214 * as published by the Free Software Foundation; either version
14215 * 2 of the License, or (at your option) any later version.
14216 - *
14217 + *
14218 * based on softdog.c by Alan Cox <alan@redhat.com>
14219 */
14220 -
14221 +
14222 #include <linux/module.h>
14223 #include <linux/config.h>
14224 #include <linux/types.h>
14225 @@ -19,13 +19,12 @@
14226 #include <linux/mm.h>
14227 #include <linux/miscdevice.h>
14228 #include <linux/watchdog.h>
14229 -#include <linux/smp_lock.h>
14230 #include <linux/init.h>
14231 #include <asm/uaccess.h>
14232 #include <asm/sgi/mc.h>
14233
14234 -static unsigned long indydog_alive;
14235 -static int expect_close = 0;
14236 +#define PFX "indydog: "
14237 +static int indydog_alive;
14238
14239 #ifdef CONFIG_WATCHDOG_NOWAYOUT
14240 static int nowayout = 1;
14241 @@ -33,10 +32,30 @@
14242 static int nowayout = 0;
14243 #endif
14244
14245 +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
14246 +
14247 MODULE_PARM(nowayout,"i");
14248 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
14249
14250 -static inline void indydog_ping(void)
14251 +static void indydog_start(void)
14252 +{
14253 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14254 +
14255 + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14256 + sgimc->cpuctrl0 = mc_ctrl0;
14257 +}
14258 +
14259 +static void indydog_stop(void)
14260 +{
14261 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14262 +
14263 + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14264 + sgimc->cpuctrl0 = mc_ctrl0;
14265 +
14266 + printk(KERN_INFO PFX "Stopped watchdog timer.\n");
14267 +}
14268 +
14269 +static void indydog_ping(void)
14270 {
14271 sgimc->watchdogt = 0;
14272 }
14273 @@ -46,18 +65,14 @@
14274 */
14275 static int indydog_open(struct inode *inode, struct file *file)
14276 {
14277 - u32 mc_ctrl0;
14278 -
14279 - if (test_and_set_bit(0,&indydog_alive))
14280 + if (indydog_alive)
14281 return -EBUSY;
14282
14283 - if (nowayout) {
14284 + if (nowayout)
14285 MOD_INC_USE_COUNT;
14286 - }
14287
14288 /* Activate timer */
14289 - mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14290 - sgimc->cpuctrl0 = mc_ctrl0;
14291 + indydog_start();
14292 indydog_ping();
14293
14294 indydog_alive = 1;
14295 @@ -69,63 +84,48 @@
14296 static int indydog_release(struct inode *inode, struct file *file)
14297 {
14298 /* Shut off the timer.
14299 - * Lock it in if it's a module and we set nowayout. */
14300 - lock_kernel();
14301 - if (expect_close) {
14302 - u32 mc_ctrl0 = sgimc->cpuctrl0;
14303 + * Lock it in if it's a module and we defined ...NOWAYOUT */
14304 + if (!nowayout) {
14305 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14306 mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14307 sgimc->cpuctrl0 = mc_ctrl0;
14308 printk(KERN_INFO "Stopped watchdog timer.\n");
14309 - } else
14310 - printk(KERN_CRIT "WDT device closed unexpectedly. WDT will not stop!\n");
14311 - clear_bit(0, &indydog_alive);
14312 - unlock_kernel();
14313 + }
14314 + indydog_alive = 0;
14315
14316 return 0;
14317 }
14318
14319 static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
14320 {
14321 - /* Can't seek (pwrite) on this device */
14322 + /* Can't seek (pwrite) on this device */
14323 if (ppos != &file->f_pos)
14324 return -ESPIPE;
14325
14326 - /*
14327 - * Refresh the timer.
14328 - */
14329 + /* Refresh the timer. */
14330 if (len) {
14331 - if (!nowayout) {
14332 - size_t i;
14333 -
14334 - /* In case it was set long ago */
14335 - expect_close = 0;
14336 -
14337 - for (i = 0; i != len; i++) {
14338 - char c;
14339 - if (get_user(c, data + i))
14340 - return -EFAULT;
14341 - if (c == 'V')
14342 - expect_close = 1;
14343 - }
14344 - }
14345 indydog_ping();
14346 - return 1;
14347 }
14348 - return 0;
14349 + return len;
14350 }
14351
14352 static int indydog_ioctl(struct inode *inode, struct file *file,
14353 unsigned int cmd, unsigned long arg)
14354 {
14355 + int options, retval = -EINVAL;
14356 static struct watchdog_info ident = {
14357 - options: WDIOF_MAGICCLOSE,
14358 - identity: "Hardware Watchdog for SGI IP22",
14359 + .options = WDIOF_KEEPALIVEPING |
14360 + WDIOF_MAGICCLOSE,
14361 + .firmware_version = 0,
14362 + .identity = "Hardware Watchdog for SGI IP22",
14363 };
14364 +
14365 switch (cmd) {
14366 default:
14367 return -ENOIOCTLCMD;
14368 case WDIOC_GETSUPPORT:
14369 - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
14370 + if (copy_to_user((struct watchdog_info *)arg,
14371 + &ident, sizeof(ident)))
14372 return -EFAULT;
14373 return 0;
14374 case WDIOC_GETSTATUS:
14375 @@ -134,31 +134,53 @@
14376 case WDIOC_KEEPALIVE:
14377 indydog_ping();
14378 return 0;
14379 + case WDIOC_GETTIMEOUT:
14380 + return put_user(WATCHDOG_TIMEOUT,(int *)arg);
14381 + case WDIOC_SETOPTIONS:
14382 + {
14383 + if (get_user(options, (int *)arg))
14384 + return -EFAULT;
14385 +
14386 + if (options & WDIOS_DISABLECARD) {
14387 + indydog_stop();
14388 + retval = 0;
14389 + }
14390 +
14391 + if (options & WDIOS_ENABLECARD) {
14392 + indydog_start();
14393 + retval = 0;
14394 + }
14395 +
14396 + return retval;
14397 + }
14398 }
14399 }
14400
14401 static struct file_operations indydog_fops = {
14402 - owner: THIS_MODULE,
14403 - write: indydog_write,
14404 - ioctl: indydog_ioctl,
14405 - open: indydog_open,
14406 - release: indydog_release,
14407 + .owner = THIS_MODULE,
14408 + .write = indydog_write,
14409 + .ioctl = indydog_ioctl,
14410 + .open = indydog_open,
14411 + .release = indydog_release,
14412 };
14413
14414 static struct miscdevice indydog_miscdev = {
14415 - minor: WATCHDOG_MINOR,
14416 - name: "watchdog",
14417 - fops: &indydog_fops,
14418 + .minor = WATCHDOG_MINOR,
14419 + .name = "watchdog",
14420 + .fops = &indydog_fops,
14421 };
14422
14423 -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
14424 +static char banner[] __initdata =
14425 + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
14426
14427 static int __init watchdog_init(void)
14428 {
14429 int ret = misc_register(&indydog_miscdev);
14430 -
14431 - if (ret)
14432 + if (ret) {
14433 + printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
14434 + WATCHDOG_MINOR, ret);
14435 return ret;
14436 + }
14437
14438 printk(banner);
14439
14440 @@ -172,4 +194,7 @@
14441
14442 module_init(watchdog_init);
14443 module_exit(watchdog_exit);
14444 +
14445 +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
14446 +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
14447 MODULE_LICENSE("GPL");
14448 diff -Nur linux-2.4.32-rc1/drivers/char/ip27-rtc.c linux-2.4.32-rc1.mips/drivers/char/ip27-rtc.c
14449 --- linux-2.4.32-rc1/drivers/char/ip27-rtc.c 2004-02-18 14:36:31.000000000 +0100
14450 +++ linux-2.4.32-rc1.mips/drivers/char/ip27-rtc.c 2004-04-06 03:35:30.000000000 +0200
14451 @@ -44,6 +44,7 @@
14452 #include <asm/sn/klconfig.h>
14453 #include <asm/sn/sn0/ip27.h>
14454 #include <asm/sn/sn0/hub.h>
14455 +#include <asm/sn/sn_private.h>
14456
14457 static int rtc_ioctl(struct inode *inode, struct file *file,
14458 unsigned int cmd, unsigned long arg);
14459 @@ -209,11 +210,8 @@
14460
14461 static int __init rtc_init(void)
14462 {
14463 - nasid_t nid;
14464 -
14465 - nid = get_nasid();
14466 rtc = (struct m48t35_rtc *)
14467 - (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
14468 + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
14469
14470 printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
14471 if (misc_register(&rtc_dev)) {
14472 @@ -325,3 +323,7 @@
14473
14474 rtc_tm->tm_mon--;
14475 }
14476 +
14477 +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
14478 +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
14479 +MODULE_LICENSE("GPL");
14480 diff -Nur linux-2.4.32-rc1/drivers/char/Makefile linux-2.4.32-rc1.mips/drivers/char/Makefile
14481 --- linux-2.4.32-rc1/drivers/char/Makefile 2004-08-08 01:26:04.000000000 +0200
14482 +++ linux-2.4.32-rc1.mips/drivers/char/Makefile 2005-02-11 22:09:56.000000000 +0100
14483 @@ -48,7 +48,12 @@
14484 KEYBD =
14485 endif
14486 ifeq ($(CONFIG_VR41XX_KIU),y)
14487 - KEYMAP =
14488 + ifeq ($(CONFIG_IBM_WORKPAD),y)
14489 + KEYMAP = ibm_workpad_keymap.o
14490 + endif
14491 + ifeq ($(CONFIG_VICTOR_MPC30X),y)
14492 + KEYMAP = victor_mpc30x_keymap.o
14493 + endif
14494 KEYBD = vr41xx_keyb.o
14495 endif
14496 endif
14497 @@ -251,7 +256,6 @@
14498 obj-$(CONFIG_RTC) += rtc.o
14499 obj-$(CONFIG_GEN_RTC) += genrtc.o
14500 obj-$(CONFIG_EFI_RTC) += efirtc.o
14501 -obj-$(CONFIG_SGI_DS1286) += ds1286.o
14502 obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
14503 obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
14504 ifeq ($(CONFIG_PPC),)
14505 @@ -259,6 +263,7 @@
14506 endif
14507 obj-$(CONFIG_TOSHIBA) += toshiba.o
14508 obj-$(CONFIG_I8K) += i8k.o
14509 +obj-$(CONFIG_DS1286) += ds1286.o
14510 obj-$(CONFIG_DS1620) += ds1620.o
14511 obj-$(CONFIG_DS1742) += ds1742.o
14512 obj-$(CONFIG_INTEL_RNG) += i810_rng.o
14513 @@ -269,6 +274,7 @@
14514
14515 obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
14516 obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
14517 +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
14518 obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
14519 obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
14520 obj-$(CONFIG_COBALT_LCD) += lcd.o
14521 @@ -353,3 +359,9 @@
14522
14523 qtronixmap.c: qtronixmap.map
14524 set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14525 +
14526 +ibm_workpad_keymap.c: ibm_workpad_keymap.map
14527 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14528 +
14529 +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
14530 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14531 diff -Nur linux-2.4.32-rc1/drivers/char/mips_rtc.c linux-2.4.32-rc1.mips/drivers/char/mips_rtc.c
14532 --- linux-2.4.32-rc1/drivers/char/mips_rtc.c 2004-01-05 14:53:56.000000000 +0100
14533 +++ linux-2.4.32-rc1.mips/drivers/char/mips_rtc.c 2004-06-28 14:54:53.000000000 +0200
14534 @@ -53,14 +53,6 @@
14535 #include <asm/io.h>
14536 #include <asm/uaccess.h>
14537 #include <asm/system.h>
14538 -
14539 -/*
14540 - * Check machine
14541 - */
14542 -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
14543 -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
14544 -#endif
14545 -
14546 #include <asm/time.h>
14547
14548 static unsigned long rtc_status = 0; /* bitmapped status byte. */
14549 diff -Nur linux-2.4.32-rc1/drivers/char/sb1250_duart.c linux-2.4.32-rc1.mips/drivers/char/sb1250_duart.c
14550 --- linux-2.4.32-rc1/drivers/char/sb1250_duart.c 2004-02-18 14:36:31.000000000 +0100
14551 +++ linux-2.4.32-rc1.mips/drivers/char/sb1250_duart.c 2004-09-17 01:25:44.000000000 +0200
14552 @@ -328,10 +328,11 @@
14553 if (c <= 0) break;
14554
14555 if (from_user) {
14556 + spin_unlock_irqrestore(&us->outp_lock, flags);
14557 if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
14558 - spin_unlock_irqrestore(&us->outp_lock, flags);
14559 return -EFAULT;
14560 }
14561 + spin_lock_irqsave(&us->outp_lock, flags);
14562 } else {
14563 memcpy(us->outp_buf + us->outp_tail, buf, c);
14564 }
14565 @@ -498,9 +499,31 @@
14566 duart_set_cflag(us->line, tty->termios->c_cflag);
14567 }
14568
14569 +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
14570 +
14571 + struct serial_struct tmp;
14572 +
14573 + memset(&tmp, 0, sizeof(tmp));
14574 +
14575 + tmp.type=PORT_SB1250;
14576 + tmp.line=us->line;
14577 + tmp.port=A_DUART_CHANREG(tmp.line,0);
14578 + tmp.irq=K_INT_UART_0 + tmp.line;
14579 + tmp.xmit_fifo_size=16; /* fixed by hw */
14580 + tmp.baud_base=5000000;
14581 + tmp.io_type=SERIAL_IO_MEM;
14582 +
14583 + if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
14584 + return -EFAULT;
14585 +
14586 + return 0;
14587 +}
14588 +
14589 static int duart_ioctl(struct tty_struct *tty, struct file * file,
14590 unsigned int cmd, unsigned long arg)
14591 {
14592 + uart_state_t *us = (uart_state_t *) tty->driver_data;
14593 +
14594 /* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
14595 return -ENODEV;*/
14596 switch (cmd) {
14597 @@ -517,7 +540,7 @@
14598 printk("Ignoring TIOCMSET\n");
14599 break;
14600 case TIOCGSERIAL:
14601 - printk("Ignoring TIOCGSERIAL\n");
14602 + return get_serial_info(us,(struct serial_struct *) arg);
14603 break;
14604 case TIOCSSERIAL:
14605 printk("Ignoring TIOCSSERIAL\n");
14606 diff -Nur linux-2.4.32-rc1/drivers/char/serial.c linux-2.4.32-rc1.mips/drivers/char/serial.c
14607 --- linux-2.4.32-rc1/drivers/char/serial.c 2005-10-24 11:33:29.000000000 +0200
14608 +++ linux-2.4.32-rc1.mips/drivers/char/serial.c 2005-09-23 22:41:22.000000000 +0200
14609 @@ -62,6 +62,12 @@
14610 * Robert Schwebel <robert@schwebel.de>,
14611 * Juergen Beisert <jbeisert@eurodsn.de>,
14612 * Theodore Ts'o <tytso@mit.edu>
14613 + *
14614 + * 10/00: Added suport for MIPS Atlas board.
14615 + * 11/00: Hooks for serial kernel debug port support added.
14616 + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
14617 + * carstenl@mips.com
14618 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
14619 */
14620
14621 static char *serial_version = "5.05c";
14622 @@ -413,6 +419,22 @@
14623 return 0;
14624 }
14625
14626 +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
14627 +
14628 +#include <asm/mips-boards/atlas.h>
14629 +
14630 +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14631 +{
14632 + return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
14633 +}
14634 +
14635 +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
14636 +{
14637 + *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
14638 +}
14639 +
14640 +#else
14641 +
14642 static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14643 {
14644 switch (info->io_type) {
14645 @@ -447,6 +469,8 @@
14646 outb(value, info->port+offset);
14647 }
14648 }
14649 +#endif
14650 +
14651
14652 /*
14653 * We used to support using pause I/O for certain machines. We
14654 diff -Nur linux-2.4.32-rc1/drivers/char/victor_mpc30x_keymap.map linux-2.4.32-rc1.mips/drivers/char/victor_mpc30x_keymap.map
14655 --- linux-2.4.32-rc1/drivers/char/victor_mpc30x_keymap.map 1970-01-01 01:00:00.000000000 +0100
14656 +++ linux-2.4.32-rc1.mips/drivers/char/victor_mpc30x_keymap.map 2004-02-05 18:04:42.000000000 +0100
14657 @@ -0,0 +1,102 @@
14658 +# Victor Interlink MP-C303/304 keyboard keymap
14659 +#
14660 +# Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
14661 +#
14662 +# This file is subject to the terms and conditions of the GNU General Public
14663 +# License. See the file "COPYING" in the main directory of this archive
14664 +# for more details.
14665 +keymaps 0-1,4-5,8-9,12
14666 +alt_is_meta
14667 +strings as usual
14668 +compose as usual for "iso-8859-1"
14669 +
14670 +# First line
14671 +keycode 89 = Escape
14672 +keycode 9 = Delete
14673 +
14674 +# 2nd line
14675 +keycode 73 = one exclam
14676 +keycode 18 = two quotedbl
14677 +keycode 92 = three numbersign
14678 + control keycode 92 = Escape
14679 +keycode 53 = four dollar
14680 + control keycode 53 = Control_backslash
14681 +keycode 21 = five percent
14682 + control keycode 21 = Control_bracketright
14683 +keycode 50 = six ampersand
14684 + control keycode 50 = Control_underscore
14685 +keycode 48 = seven apostrophe
14686 +keycode 51 = eight parenleft
14687 +keycode 16 = nine parenright
14688 +keycode 80 = zero asciitilde
14689 + control keycode 80 = nul
14690 +keycode 49 = minus equal
14691 +keycode 30 = asciicircum asciitilde
14692 + control keycode 30 = Control_asciicircum
14693 +keycode 5 = backslash bar
14694 + control keycode 5 = Control_backslash
14695 +keycode 13 = BackSpace
14696 +# 3rd line
14697 +keycode 57 = Tab
14698 +keycode 74 = q
14699 +keycode 26 = w
14700 +keycode 81 = e
14701 +keycode 29 = r
14702 +keycode 37 = t
14703 +keycode 45 = y
14704 +keycode 72 = u
14705 +keycode 24 = i
14706 +keycode 32 = o
14707 +keycode 41 = p
14708 +keycode 1 = at grave
14709 + control keycode 1 = nul
14710 +keycode 54 = bracketleft braceleft
14711 +keycode 63 = Return
14712 + alt keycode 63 = Meta_Control_m
14713 +# 4th line
14714 +keycode 23 = Caps_Lock
14715 +keycode 34 = a
14716 +keycode 66 = s
14717 +keycode 52 = d
14718 +keycode 20 = f
14719 +keycode 84 = g
14720 +keycode 67 = h
14721 +keycode 64 = j
14722 +keycode 17 = k
14723 +keycode 83 = l
14724 +keycode 22 = semicolon plus
14725 +keycode 61 = colon asterisk
14726 + control keycode 61 = Control_g
14727 +keycode 65 = bracketright braceright
14728 + control keycode 65 = Control_bracketright
14729 +# 5th line
14730 +keycode 91 = Shift
14731 +keycode 76 = z
14732 +keycode 68 = x
14733 +keycode 28 = c
14734 +keycode 36 = v
14735 +keycode 44 = b
14736 +keycode 19 = n
14737 +keycode 27 = m
14738 +keycode 35 = comma less
14739 +keycode 3 = period greater
14740 + control keycode 3 = Compose
14741 +keycode 38 = slash question
14742 + control keycode 38 = Delete
14743 + shift control keycode 38 = Delete
14744 +keycode 6 = backslash underscore
14745 + control keycode 6 = Control_backslash
14746 +keycode 55 = Up
14747 + alt keycode 55 = PageUp
14748 +keycode 14 = Shift
14749 +# 6th line
14750 +keycode 56 = Control
14751 +keycode 42 = Alt
14752 +keycode 33 = space
14753 + control keycode 33 = nul
14754 +keycode 7 = Left
14755 + alt keycode 7 = Home
14756 +keycode 31 = Down
14757 + alt keycode 31 = PageDown
14758 +keycode 47 = Right
14759 + alt keycode 47 = End
14760 diff -Nur linux-2.4.32-rc1/drivers/char/vr41xx_keyb.c linux-2.4.32-rc1.mips/drivers/char/vr41xx_keyb.c
14761 --- linux-2.4.32-rc1/drivers/char/vr41xx_keyb.c 2004-02-18 14:36:31.000000000 +0100
14762 +++ linux-2.4.32-rc1.mips/drivers/char/vr41xx_keyb.c 2004-02-17 13:08:55.000000000 +0100
14763 @@ -308,7 +308,7 @@
14764 if (found != 0) {
14765 kiu_base = VRC4173_KIU_OFFSET;
14766 mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
14767 - vrc4173_clock_supply(VRC4173_KIU_CLOCK);
14768 + vrc4173_supply_clock(VRC4173_KIU_CLOCK);
14769 }
14770 }
14771 #endif
14772 @@ -325,7 +325,7 @@
14773
14774 if (current_cpu_data.cputype == CPU_VR4111 ||
14775 current_cpu_data.cputype == CPU_VR4121)
14776 - vr41xx_clock_supply(KIU_CLOCK);
14777 + vr41xx_supply_clock(KIU_CLOCK);
14778
14779 kiu_writew(KIURST_KIURST, KIURST);
14780
14781 diff -Nur linux-2.4.32-rc1/drivers/i2c/Config.in linux-2.4.32-rc1.mips/drivers/i2c/Config.in
14782 --- linux-2.4.32-rc1/drivers/i2c/Config.in 2004-04-14 15:05:29.000000000 +0200
14783 +++ linux-2.4.32-rc1.mips/drivers/i2c/Config.in 2005-02-11 20:49:04.000000000 +0100
14784 @@ -57,6 +57,10 @@
14785 if [ "$CONFIG_SGI_IP22" = "y" ]; then
14786 dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
14787 fi
14788 +
14789 + if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
14790 + dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
14791 + fi
14792
14793 # This is needed for automatic patch generation: sensors code starts here
14794 # This is needed for automatic patch generation: sensors code ends here
14795 diff -Nur linux-2.4.32-rc1/drivers/i2c/i2c-algo-au1550.c linux-2.4.32-rc1.mips/drivers/i2c/i2c-algo-au1550.c
14796 --- linux-2.4.32-rc1/drivers/i2c/i2c-algo-au1550.c 1970-01-01 01:00:00.000000000 +0100
14797 +++ linux-2.4.32-rc1.mips/drivers/i2c/i2c-algo-au1550.c 2005-02-11 20:49:04.000000000 +0100
14798 @@ -0,0 +1,340 @@
14799 +/*
14800 + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
14801 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
14802 + *
14803 + * The documentation describes this as an SMBus controller, but it doesn't
14804 + * understand any of the SMBus protocol in hardware. It's really an I2C
14805 + * controller that could emulate most of the SMBus in software.
14806 + */
14807 +
14808 +#include <linux/kernel.h>
14809 +#include <linux/module.h>
14810 +#include <linux/init.h>
14811 +#include <linux/errno.h>
14812 +#include <linux/delay.h>
14813 +
14814 +#include <asm/au1000.h>
14815 +#include <asm/au1xxx_psc.h>
14816 +
14817 +#include <linux/i2c.h>
14818 +#include <linux/i2c-algo-au1550.h>
14819 +
14820 +static int
14821 +wait_xfer_done(struct i2c_algo_au1550_data *adap)
14822 +{
14823 + u32 stat;
14824 + int i;
14825 + volatile psc_smb_t *sp;
14826 +
14827 + sp = (volatile psc_smb_t *)(adap->psc_base);
14828 +
14829 + /* Wait for Tx FIFO Underflow.
14830 + */
14831 + for (i = 0; i < adap->xfer_timeout; i++) {
14832 + stat = sp->psc_smbevnt;
14833 + au_sync();
14834 + if ((stat & PSC_SMBEVNT_TU) != 0) {
14835 + /* Clear it. */
14836 + sp->psc_smbevnt = PSC_SMBEVNT_TU;
14837 + au_sync();
14838 + return 0;
14839 + }
14840 + udelay(1);
14841 + }
14842 +
14843 + return -ETIMEDOUT;
14844 +}
14845 +
14846 +static int
14847 +wait_ack(struct i2c_algo_au1550_data *adap)
14848 +{
14849 + u32 stat;
14850 + volatile psc_smb_t *sp;
14851 +
14852 + if (wait_xfer_done(adap))
14853 + return -ETIMEDOUT;
14854 +
14855 + sp = (volatile psc_smb_t *)(adap->psc_base);
14856 +
14857 + stat = sp->psc_smbevnt;
14858 + au_sync();
14859 +
14860 + if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
14861 + return -ETIMEDOUT;
14862 +
14863 + return 0;
14864 +}
14865 +
14866 +static int
14867 +wait_master_done(struct i2c_algo_au1550_data *adap)
14868 +{
14869 + u32 stat;
14870 + int i;
14871 + volatile psc_smb_t *sp;
14872 +
14873 + sp = (volatile psc_smb_t *)(adap->psc_base);
14874 +
14875 + /* Wait for Master Done.
14876 + */
14877 + for (i = 0; i < adap->xfer_timeout; i++) {
14878 + stat = sp->psc_smbevnt;
14879 + au_sync();
14880 + if ((stat & PSC_SMBEVNT_MD) != 0)
14881 + return 0;
14882 + udelay(1);
14883 + }
14884 +
14885 + return -ETIMEDOUT;
14886 +}
14887 +
14888 +static int
14889 +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
14890 +{
14891 + volatile psc_smb_t *sp;
14892 + u32 stat;
14893 +
14894 + sp = (volatile psc_smb_t *)(adap->psc_base);
14895 +
14896 + /* Reset the FIFOs, clear events.
14897 + */
14898 + sp->psc_smbpcr = PSC_SMBPCR_DC;
14899 + sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
14900 + au_sync();
14901 + do {
14902 + stat = sp->psc_smbpcr;
14903 + au_sync();
14904 + } while ((stat & PSC_SMBPCR_DC) != 0);
14905 +
14906 + /* Write out the i2c chip address and specify operation
14907 + */
14908 + addr <<= 1;
14909 + if (rd)
14910 + addr |= 1;
14911 +
14912 + /* Put byte into fifo, start up master.
14913 + */
14914 + sp->psc_smbtxrx = addr;
14915 + au_sync();
14916 + sp->psc_smbpcr = PSC_SMBPCR_MS;
14917 + au_sync();
14918 + if (wait_ack(adap))
14919 + return -EIO;
14920 + return 0;
14921 +}
14922 +
14923 +static u32
14924 +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
14925 +{
14926 + int j;
14927 + u32 data, stat;
14928 + volatile psc_smb_t *sp;
14929 +
14930 + if (wait_xfer_done(adap))
14931 + return -EIO;
14932 +
14933 + sp = (volatile psc_smb_t *)(adap->psc_base);
14934 +
14935 + j = adap->xfer_timeout * 100;
14936 + do {
14937 + j--;
14938 + if (j <= 0)
14939 + return -EIO;
14940 +
14941 + stat = sp->psc_smbstat;
14942 + au_sync();
14943 + if ((stat & PSC_SMBSTAT_RE) == 0)
14944 + j = 0;
14945 + else
14946 + udelay(1);
14947 + } while (j > 0);
14948 + data = sp->psc_smbtxrx;
14949 + au_sync();
14950 + *ret_data = data;
14951 +
14952 + return 0;
14953 +}
14954 +
14955 +static int
14956 +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
14957 + unsigned int len)
14958 +{
14959 + int i;
14960 + u32 data;
14961 + volatile psc_smb_t *sp;
14962 +
14963 + if (len == 0)
14964 + return 0;
14965 +
14966 + /* A read is performed by stuffing the transmit fifo with
14967 + * zero bytes for timing, waiting for bytes to appear in the
14968 + * receive fifo, then reading the bytes.
14969 + */
14970 +
14971 + sp = (volatile psc_smb_t *)(adap->psc_base);
14972 +
14973 + i = 0;
14974 + while (i < (len-1)) {
14975 + sp->psc_smbtxrx = 0;
14976 + au_sync();
14977 + if (wait_for_rx_byte(adap, &data))
14978 + return -EIO;
14979 +
14980 + buf[i] = data;
14981 + i++;
14982 + }
14983 +
14984 + /* The last byte has to indicate transfer done.
14985 + */
14986 + sp->psc_smbtxrx = PSC_SMBTXRX_STP;
14987 + au_sync();
14988 + if (wait_master_done(adap))
14989 + return -EIO;
14990 +
14991 + data = sp->psc_smbtxrx;
14992 + au_sync();
14993 + buf[i] = data;
14994 + return 0;
14995 +}
14996 +
14997 +static int
14998 +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
14999 + unsigned int len)
15000 +{
15001 + int i;
15002 + u32 data;
15003 + volatile psc_smb_t *sp;
15004 +
15005 + if (len == 0)
15006 + return 0;
15007 +
15008 + sp = (volatile psc_smb_t *)(adap->psc_base);
15009 +
15010 + i = 0;
15011 + while (i < (len-1)) {
15012 + data = buf[i];
15013 + sp->psc_smbtxrx = data;
15014 + au_sync();
15015 + if (wait_ack(adap))
15016 + return -EIO;
15017 + i++;
15018 + }
15019 +
15020 + /* The last byte has to indicate transfer done.
15021 + */
15022 + data = buf[i];
15023 + data |= PSC_SMBTXRX_STP;
15024 + sp->psc_smbtxrx = data;
15025 + au_sync();
15026 + if (wait_master_done(adap))
15027 + return -EIO;
15028 + return 0;
15029 +}
15030 +
15031 +static int
15032 +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
15033 +{
15034 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
15035 + struct i2c_msg *p;
15036 + int i, err = 0;
15037 +
15038 + for (i = 0; !err && i < num; i++) {
15039 + p = &msgs[i];
15040 + err = do_address(adap, p->addr, p->flags & I2C_M_RD);
15041 + if (err || !p->len)
15042 + continue;
15043 + if (p->flags & I2C_M_RD)
15044 + err = i2c_read(adap, p->buf, p->len);
15045 + else
15046 + err = i2c_write(adap, p->buf, p->len);
15047 + }
15048 +
15049 + /* Return the number of messages processed, or the error code.
15050 + */
15051 + if (err == 0)
15052 + err = num;
15053 + return err;
15054 +}
15055 +
15056 +static u32
15057 +au1550_func(struct i2c_adapter *adap)
15058 +{
15059 + return I2C_FUNC_I2C;
15060 +}
15061 +
15062 +static struct i2c_algorithm au1550_algo = {
15063 + .name = "Au1550 algorithm",
15064 + .id = I2C_ALGO_AU1550,
15065 + .master_xfer = au1550_xfer,
15066 + .functionality = au1550_func,
15067 +};
15068 +
15069 +/*
15070 + * registering functions to load algorithms at runtime
15071 + * Prior to calling us, the 50MHz clock frequency and routing
15072 + * must have been set up for the PSC indicated by the adapter.
15073 + */
15074 +int
15075 +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
15076 +{
15077 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
15078 + volatile psc_smb_t *sp;
15079 + u32 stat;
15080 +
15081 + i2c_adap->algo = &au1550_algo;
15082 +
15083 + /* Now, set up the PSC for SMBus PIO mode.
15084 + */
15085 + sp = (volatile psc_smb_t *)(adap->psc_base);
15086 + sp->psc_ctrl = PSC_CTRL_DISABLE;
15087 + au_sync();
15088 + sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
15089 + sp->psc_smbcfg = 0;
15090 + au_sync();
15091 + sp->psc_ctrl = PSC_CTRL_ENABLE;
15092 + au_sync();
15093 + do {
15094 + stat = sp->psc_smbstat;
15095 + au_sync();
15096 + } while ((stat & PSC_SMBSTAT_SR) == 0);
15097 +
15098 + sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
15099 + PSC_SMBCFG_DD_DISABLE);
15100 +
15101 + /* Divide by 8 to get a 6.25 MHz clock. The later protocol
15102 + * timings are based on this clock.
15103 + */
15104 + sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
15105 + sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
15106 + au_sync();
15107 +
15108 + /* Set the protocol timer values. See Table 71 in the
15109 + * Au1550 Data Book for standard timing values.
15110 + */
15111 + sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
15112 + PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
15113 + PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
15114 + PSC_SMBTMR_SET_CH(11);
15115 + au_sync();
15116 +
15117 + sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
15118 + do {
15119 + stat = sp->psc_smbstat;
15120 + au_sync();
15121 + } while ((stat & PSC_SMBSTAT_DR) == 0);
15122 +
15123 + return i2c_add_adapter(i2c_adap);
15124 +}
15125 +
15126 +
15127 +int
15128 +i2c_au1550_del_bus(struct i2c_adapter *adap)
15129 +{
15130 + return i2c_del_adapter(adap);
15131 +}
15132 +
15133 +EXPORT_SYMBOL(i2c_au1550_add_bus);
15134 +EXPORT_SYMBOL(i2c_au1550_del_bus);
15135 +
15136 +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
15137 +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
15138 +MODULE_LICENSE("GPL");
15139 diff -Nur linux-2.4.32-rc1/drivers/i2c/i2c-au1550.c linux-2.4.32-rc1.mips/drivers/i2c/i2c-au1550.c
15140 --- linux-2.4.32-rc1/drivers/i2c/i2c-au1550.c 1970-01-01 01:00:00.000000000 +0100
15141 +++ linux-2.4.32-rc1.mips/drivers/i2c/i2c-au1550.c 2005-02-11 20:49:04.000000000 +0100
15142 @@ -0,0 +1,154 @@
15143 +/*
15144 + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
15145 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
15146 + *
15147 + * This is just a skeleton adapter to use with the Au1550 PSC
15148 + * algorithm. It was developed for the Pb1550, but will work with
15149 + * any Au1550 board that has a similar PSC configuration.
15150 + *
15151 + * This program is free software; you can redistribute it and/or
15152 + * modify it under the terms of the GNU General Public License
15153 + * as published by the Free Software Foundation; either version 2
15154 + * of the License, or (at your option) any later version.
15155 + *
15156 + * This program is distributed in the hope that it will be useful,
15157 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
15158 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15159 + * GNU General Public License for more details.
15160 + *
15161 + * You should have received a copy of the GNU General Public License
15162 + * along with this program; if not, write to the Free Software
15163 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15164 + */
15165 +
15166 +#include <linux/config.h>
15167 +#include <linux/kernel.h>
15168 +#include <linux/module.h>
15169 +#include <linux/init.h>
15170 +#include <linux/errno.h>
15171 +
15172 +#include <asm/au1000.h>
15173 +#include <asm/au1xxx_psc.h>
15174 +#if defined( CONFIG_MIPS_PB1550 )
15175 + #include <asm/pb1550.h>
15176 +#endif
15177 +#if defined( CONFIG_MIPS_PB1200 )
15178 + #include <asm/pb1200.h>
15179 +#endif
15180 +#if defined( CONFIG_MIPS_DB1200 )
15181 + #include <asm/db1200.h>
15182 +#endif
15183 +#if defined( CONFIG_MIPS_FICMMP )
15184 + #include <asm/ficmmp.h>
15185 +#endif
15186 +
15187 +#include <linux/i2c.h>
15188 +#include <linux/i2c-algo-au1550.h>
15189 +
15190 +
15191 +
15192 +static int
15193 +pb1550_reg(struct i2c_client *client)
15194 +{
15195 + return 0;
15196 +}
15197 +
15198 +static int
15199 +pb1550_unreg(struct i2c_client *client)
15200 +{
15201 + return 0;
15202 +}
15203 +
15204 +static void
15205 +pb1550_inc_use(struct i2c_adapter *adap)
15206 +{
15207 +#ifdef MODULE
15208 + MOD_INC_USE_COUNT;
15209 +#endif
15210 +}
15211 +
15212 +static void
15213 +pb1550_dec_use(struct i2c_adapter *adap)
15214 +{
15215 +#ifdef MODULE
15216 + MOD_DEC_USE_COUNT;
15217 +#endif
15218 +}
15219 +
15220 +static struct i2c_algo_au1550_data pb1550_i2c_info = {
15221 + SMBUS_PSC_BASE, 200, 200
15222 +};
15223 +
15224 +static struct i2c_adapter pb1550_board_adapter = {
15225 + name: "pb1550 adapter",
15226 + id: I2C_HW_AU1550_PSC,
15227 + algo: NULL,
15228 + algo_data: &pb1550_i2c_info,
15229 + inc_use: pb1550_inc_use,
15230 + dec_use: pb1550_dec_use,
15231 + client_register: pb1550_reg,
15232 + client_unregister: pb1550_unreg,
15233 + client_count: 0,
15234 +};
15235 +
15236 +int __init
15237 +i2c_pb1550_init(void)
15238 +{
15239 + /* This is where we would set up a 50MHz clock source
15240 + * and routing. On the Pb1550, the SMBus is PSC2, which
15241 + * uses a shared clock with USB. This has been already
15242 + * configured by Yamon as a 48MHz clock, close enough
15243 + * for our work.
15244 + */
15245 + if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
15246 + return -ENODEV;
15247 +
15248 + return 0;
15249 +}
15250 +
15251 +/* BIG hack to support the control interface on the Wolfson WM8731
15252 + * audio codec on the Pb1550 board. We get an address and two data
15253 + * bytes to write, create an i2c message, and send it across the
15254 + * i2c transfer function. We do this here because we have access to
15255 + * the i2c adapter structure.
15256 + */
15257 +static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */
15258 +static u8 i2cbuf[2];
15259 +
15260 +int
15261 +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
15262 +{
15263 + wm_i2c_msg.addr = addr;
15264 + wm_i2c_msg.flags = 0;
15265 + wm_i2c_msg.buf = i2cbuf;
15266 + wm_i2c_msg.len = 2;
15267 + i2cbuf[0] = reg;
15268 + i2cbuf[1] = val;
15269 +
15270 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
15271 +}
15272 +
15273 +/* the next function is needed by DVB driver. */
15274 +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
15275 +{
15276 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
15277 +}
15278 +
15279 +EXPORT_SYMBOL(pb1550_wm_codec_write);
15280 +EXPORT_SYMBOL(pb1550_i2c_xfer);
15281 +
15282 +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
15283 +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
15284 +MODULE_LICENSE("GPL");
15285 +
15286 +int
15287 +init_module(void)
15288 +{
15289 + return i2c_pb1550_init();
15290 +}
15291 +
15292 +void
15293 +cleanup_module(void)
15294 +{
15295 + i2c_au1550_del_bus(&pb1550_board_adapter);
15296 +}
15297 diff -Nur linux-2.4.32-rc1/drivers/i2c/i2c-core.c linux-2.4.32-rc1.mips/drivers/i2c/i2c-core.c
15298 --- linux-2.4.32-rc1/drivers/i2c/i2c-core.c 2005-06-01 02:56:56.000000000 +0200
15299 +++ linux-2.4.32-rc1.mips/drivers/i2c/i2c-core.c 2005-05-23 14:12:30.000000000 +0200
15300 @@ -1280,6 +1280,9 @@
15301 #ifdef CONFIG_I2C_MAX1617
15302 extern int i2c_max1617_init(void);
15303 #endif
15304 +#ifdef CONFIG_I2C_ALGO_AU1550
15305 + extern int i2c_pb1550_init(void);
15306 +#endif
15307
15308 #ifdef CONFIG_I2C_PROC
15309 extern int sensors_init(void);
15310 @@ -1335,6 +1338,10 @@
15311 i2c_max1617_init();
15312 #endif
15313
15314 +#ifdef CONFIG_I2C_ALGO_AU1550
15315 + i2c_pb1550_init();
15316 +#endif
15317 +
15318 /* -------------- proc interface ---- */
15319 #ifdef CONFIG_I2C_PROC
15320 sensors_init();
15321 diff -Nur linux-2.4.32-rc1/drivers/i2c/Makefile linux-2.4.32-rc1.mips/drivers/i2c/Makefile
15322 --- linux-2.4.32-rc1/drivers/i2c/Makefile 2004-02-18 14:36:31.000000000 +0100
15323 +++ linux-2.4.32-rc1.mips/drivers/i2c/Makefile 2005-02-11 20:49:04.000000000 +0100
15324 @@ -6,7 +6,7 @@
15325
15326 export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
15327 i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
15328 - i2c-proc.o
15329 + i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
15330
15331 obj-$(CONFIG_I2C) += i2c-core.o
15332 obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
15333 @@ -25,6 +25,7 @@
15334 obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
15335 obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
15336 obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
15337 +obj-$(CONFIG_I2C_ALGO_AU1550) += i2c-algo-au1550.o i2c-au1550.o
15338
15339 # This is needed for automatic patch generation: sensors code starts here
15340 # This is needed for automatic patch generation: sensors code ends here
15341 diff -Nur linux-2.4.32-rc1/drivers/media/video/indycam.c linux-2.4.32-rc1.mips/drivers/media/video/indycam.c
15342 --- linux-2.4.32-rc1/drivers/media/video/indycam.c 2004-02-18 14:36:31.000000000 +0100
15343 +++ linux-2.4.32-rc1.mips/drivers/media/video/indycam.c 2004-12-09 21:32:05.000000000 +0100
15344 @@ -50,13 +50,14 @@
15345 0x80, /* INDYCAM_GAMMA */
15346 };
15347
15348 - int err = 0;
15349 struct indycam *camera;
15350 struct i2c_client *client;
15351 + int err = 0;
15352
15353 client = kmalloc(sizeof(*client), GFP_KERNEL);
15354 - if (!client)
15355 + if (!client)
15356 return -ENOMEM;
15357 +
15358 camera = kmalloc(sizeof(*camera), GFP_KERNEL);
15359 if (!camera) {
15360 err = -ENOMEM;
15361 @@ -67,7 +68,7 @@
15362 client->adapter = adap;
15363 client->addr = addr;
15364 client->driver = &i2c_driver_indycam;
15365 - strcpy(client->name, "IndyCam client");
15366 + strcpy(client->name, "IndyCam client");
15367 camera->client = client;
15368
15369 err = i2c_attach_client(client);
15370 @@ -75,18 +76,18 @@
15371 goto out_free_camera;
15372
15373 camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
15374 - if (camera->version != CAMERA_VERSION_INDY &&
15375 - camera->version != CAMERA_VERSION_MOOSE) {
15376 + if ((camera->version != CAMERA_VERSION_INDY) &&
15377 + (camera->version != CAMERA_VERSION_MOOSE)) {
15378 err = -ENODEV;
15379 goto out_detach_client;
15380 }
15381 - printk(KERN_INFO "Indycam v%d.%d detected.\n",
15382 + printk(KERN_INFO "IndyCam v%d.%d detected.\n",
15383 INDYCAM_VERSION_MAJOR(camera->version),
15384 INDYCAM_VERSION_MINOR(camera->version));
15385
15386 err = i2c_master_send(client, initseq, sizeof(initseq));
15387 if (err)
15388 - printk(KERN_INFO "IndyCam initalization failed\n");
15389 + printk(KERN_ERR "IndyCam initalization failed.\n");
15390
15391 MOD_INC_USE_COUNT;
15392 return 0;
15393 diff -Nur linux-2.4.32-rc1/drivers/media/video/vino.c linux-2.4.32-rc1.mips/drivers/media/video/vino.c
15394 --- linux-2.4.32-rc1/drivers/media/video/vino.c 2004-02-18 14:36:31.000000000 +0100
15395 +++ linux-2.4.32-rc1.mips/drivers/media/video/vino.c 2004-12-10 05:02:54.000000000 +0100
15396 @@ -5,6 +5,8 @@
15397 * License version 2 as published by the Free Software Foundation.
15398 *
15399 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
15400 + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
15401 + *
15402 */
15403
15404 #include <linux/module.h>
15405 @@ -37,13 +39,23 @@
15406 #define DEBUG(x...)
15407 #endif
15408
15409 +/* Channels (who could have guessed) */
15410 +#define VINO_CHAN_NONE 0
15411 +#define VINO_CHAN_A 1
15412 +#define VINO_CHAN_B 2
15413 +
15414 /* VINO video size */
15415 #define VINO_PAL_WIDTH 768
15416 #define VINO_PAL_HEIGHT 576
15417 #define VINO_NTSC_WIDTH 646
15418 #define VINO_NTSC_HEIGHT 486
15419
15420 -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
15421 +/* Minimum value for Y-clipping (for smaller values the images
15422 + * will be corrupted) */
15423 +#define VINO_MIN_Y_CLIPPING 2
15424 +
15425 +/* Set these to some sensible values.
15426 + * Note: the picture width has to be divisible by 8 */
15427 #define VINO_MIN_WIDTH 32
15428 #define VINO_MIN_HEIGHT 32
15429
15430 @@ -64,9 +76,7 @@
15431
15432 struct vino_device {
15433 struct video_device vdev;
15434 -#define VINO_CHAN_A 1
15435 -#define VINO_CHAN_B 2
15436 - int chan;
15437 + int chan; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15438 int alpha;
15439 /* clipping... */
15440 unsigned int left, right, top, bottom;
15441 @@ -106,7 +116,7 @@
15442
15443 struct vino_client {
15444 struct i2c_client *driver;
15445 - int owner;
15446 + int owner; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15447 };
15448
15449 struct vino_video {
15450 @@ -362,6 +372,7 @@
15451 static int dma_setup(struct vino_device *v)
15452 {
15453 u32 ctrl, intr;
15454 + int ofs;
15455 struct sgi_vino_channel *ch;
15456
15457 ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
15458 @@ -377,14 +388,24 @@
15459 ch->line_size = v->line_size - 8;
15460 /* set the alpha register */
15461 ch->alpha = v->alpha;
15462 - /* set cliping registers */
15463 - ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
15464 + /* Set the clipping registers, this is the constant source of fun :)
15465 + * Y clipping start has to be >= 2 and end has to be start + height/2
15466 + * The values of top and bottom are even so dividing is not a problem
15467 + *
15468 + * The docs say that clipping values for the even field should be
15469 + * odd_end + something_to_skip_vertical_blanking + some_lines and
15470 + * even_start + height/2, though the image is good this way also
15471 + *
15472 + * TODO: for analog sources (SAA7191), the clipping values are a bit
15473 + * different and that case isn't yet handled
15474 + */
15475 + ofs = VINO_MIN_Y_CLIPPING; /* Should depend on input source */
15476 + ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
15477 + VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
15478 VINO_CLIP_X(v->left);
15479 - ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
15480 + ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
15481 + VINO_CLIP_EVEN(ofs + v->bottom / 2) |
15482 VINO_CLIP_X(v->right);
15483 - /* FIXME: end-of-field bug workaround
15484 - VINO_CLIP_X(VINO_PAL_WIDTH);
15485 - */
15486 /* init the frame rate and norm (full frame rate only for now...) */
15487 ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
15488 (get_capture_norm(v) == VIDEO_MODE_PAL ?
15489 @@ -510,6 +531,7 @@
15490 static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
15491 {
15492 u32 intr, ctrl;
15493 + int a_eof, b_eof;
15494
15495 spin_lock(&Vino->vino_lock);
15496 ctrl = vino->control;
15497 @@ -525,12 +547,14 @@
15498 vino->control = ctrl;
15499 clear_eod(&Vino->chB);
15500 }
15501 + a_eof = intr & VINO_INTSTAT_A_EOF;
15502 + b_eof = intr & VINO_INTSTAT_B_EOF;
15503 vino->intr_status = ~intr;
15504 spin_unlock(&Vino->vino_lock);
15505 - /* FIXME: For now we are assuming that interrupt means that frame is
15506 - * done. That's not true, but we can live with such brokeness for
15507 - * a while ;-) */
15508 - field_done(&Vino->chA);
15509 + if (a_eof)
15510 + field_done(&Vino->chA);
15511 + if (b_eof)
15512 + field_done(&Vino->chB);
15513 }
15514
15515 static int vino_grab(struct vino_device *v, int frame)
15516 diff -Nur linux-2.4.32-rc1/drivers/mtd/devices/docprobe.c linux-2.4.32-rc1.mips/drivers/mtd/devices/docprobe.c
15517 --- linux-2.4.32-rc1/drivers/mtd/devices/docprobe.c 2003-06-13 16:51:34.000000000 +0200
15518 +++ linux-2.4.32-rc1.mips/drivers/mtd/devices/docprobe.c 2003-06-16 01:42:21.000000000 +0200
15519 @@ -89,10 +89,10 @@
15520 0xe4000000,
15521 #elif defined(CONFIG_MOMENCO_OCELOT)
15522 0x2f000000,
15523 - 0xff000000,
15524 + 0xff000000,
15525 #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
15526 - 0xff000000,
15527 -##else
15528 + 0xff000000,
15529 +#else
15530 #warning Unknown architecture for DiskOnChip. No default probe locations defined
15531 #endif
15532 0 };
15533 diff -Nur linux-2.4.32-rc1/drivers/mtd/devices/ms02-nv.c linux-2.4.32-rc1.mips/drivers/mtd/devices/ms02-nv.c
15534 --- linux-2.4.32-rc1/drivers/mtd/devices/ms02-nv.c 2003-06-13 16:51:34.000000000 +0200
15535 +++ linux-2.4.32-rc1.mips/drivers/mtd/devices/ms02-nv.c 2004-07-30 12:22:40.000000000 +0200
15536 @@ -1,10 +1,10 @@
15537 /*
15538 - * Copyright (c) 2001 Maciej W. Rozycki
15539 + * Copyright (c) 2001 Maciej W. Rozycki
15540 *
15541 - * This program is free software; you can redistribute it and/or
15542 - * modify it under the terms of the GNU General Public License
15543 - * as published by the Free Software Foundation; either version
15544 - * 2 of the License, or (at your option) any later version.
15545 + * This program is free software; you can redistribute it and/or
15546 + * modify it under the terms of the GNU General Public License
15547 + * as published by the Free Software Foundation; either version
15548 + * 2 of the License, or (at your option) any later version.
15549 *
15550 * $Id: ms02-nv.c,v 1.2 2003/01/24 14:05:17 dwmw2 Exp $
15551 */
15552 @@ -29,18 +29,18 @@
15553
15554
15555 static char version[] __initdata =
15556 - "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15557 + "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15558
15559 -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
15560 +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
15561 MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
15562 MODULE_LICENSE("GPL");
15563
15564
15565 /*
15566 * Addresses we probe for an MS02-NV at. Modules may be located
15567 - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
15568 - * boundary within a 0MB up to 448MB range. We don't support a module
15569 - * at 0MB, though.
15570 + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
15571 + * boundary within a 0MiB up to 448MiB range. We don't support a module
15572 + * at 0MiB, though.
15573 */
15574 static ulong ms02nv_addrs[] __initdata = {
15575 0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
15576 @@ -130,7 +130,7 @@
15577
15578 int ret = -ENODEV;
15579
15580 - /* The module decodes 8MB of address space. */
15581 + /* The module decodes 8MiB of address space. */
15582 mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
15583 if (!mod_res)
15584 return -ENOMEM;
15585 @@ -233,7 +233,7 @@
15586 goto err_out_csr_res;
15587 }
15588
15589 - printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
15590 + printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
15591 mtd->index, ms02nv_name, addr, size >> 20);
15592
15593 mp->next = root_ms02nv_mtd;
15594 @@ -293,12 +293,12 @@
15595
15596 switch (mips_machtype) {
15597 case MACH_DS5000_200:
15598 - csr = (volatile u32 *)KN02_CSR_ADDR;
15599 + csr = (volatile u32 *)KN02_CSR_BASE;
15600 if (*csr & KN02_CSR_BNK32M)
15601 stride = 2;
15602 break;
15603 case MACH_DS5000_2X0:
15604 - case MACH_DS5000:
15605 + case MACH_DS5900:
15606 csr = (volatile u32 *)KN03_MCR_BASE;
15607 if (*csr & KN03_MCR_BNK32M)
15608 stride = 2;
15609 diff -Nur linux-2.4.32-rc1/drivers/mtd/devices/ms02-nv.h linux-2.4.32-rc1.mips/drivers/mtd/devices/ms02-nv.h
15610 --- linux-2.4.32-rc1/drivers/mtd/devices/ms02-nv.h 2002-11-29 00:53:13.000000000 +0100
15611 +++ linux-2.4.32-rc1.mips/drivers/mtd/devices/ms02-nv.h 2004-07-30 12:22:40.000000000 +0200
15612 @@ -1,32 +1,96 @@
15613 /*
15614 - * Copyright (c) 2001 Maciej W. Rozycki
15615 + * Copyright (c) 2001, 2003 Maciej W. Rozycki
15616 *
15617 - * This program is free software; you can redistribute it and/or
15618 - * modify it under the terms of the GNU General Public License
15619 - * as published by the Free Software Foundation; either version
15620 - * 2 of the License, or (at your option) any later version.
15621 + * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
15622 + * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
15623 + * systems.
15624 + *
15625 + * This program is free software; you can redistribute it and/or
15626 + * modify it under the terms of the GNU General Public License
15627 + * as published by the Free Software Foundation; either version
15628 + * 2 of the License, or (at your option) any later version.
15629 + *
15630 + * $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
15631 */
15632
15633 #include <linux/ioport.h>
15634 #include <linux/mtd/mtd.h>
15635
15636 +/*
15637 + * Addresses are decoded as follows:
15638 + *
15639 + * 0x000000 - 0x3fffff SRAM
15640 + * 0x400000 - 0x7fffff CSR
15641 + *
15642 + * Within the SRAM area the following ranges are forced by the system
15643 + * firmware:
15644 + *
15645 + * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
15646 + * 0x000400 - ENDofRAM storage area, available to operating systems
15647 + *
15648 + * but we can't really use the available area right from 0x000400 as
15649 + * the first word is used by the firmware as a status flag passed
15650 + * from an operating system. If anything but the valid data magic
15651 + * ID value is found, the firmware considers the SRAM clean, i.e.
15652 + * containing no valid data, and disables the battery resulting in
15653 + * data being erased as soon as power is switched off. So the choice
15654 + * for the start address of the user-available is 0x001000 which is
15655 + * nicely page aligned. The area between 0x000404 and 0x000fff may
15656 + * be used by the driver for own needs.
15657 + *
15658 + * The diagnostic area defines two status words to be read by an
15659 + * operating system, a magic ID to distinguish a MS02-NV board from
15660 + * anything else and a status information providing results of tests
15661 + * as well as the size of SRAM available, which can be 1MiB or 2MiB
15662 + * (that's what the firmware handles; no idea if 2MiB modules ever
15663 + * existed).
15664 + *
15665 + * The firmware only handles the MS02-NV board if installed in the
15666 + * last (15th) slot, so for any other location the status information
15667 + * stored in the SRAM cannot be relied upon. But from the hardware
15668 + * point of view there is no problem using up to 14 such boards in a
15669 + * system -- only the 1st slot needs to be filled with a DRAM module.
15670 + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
15671 + *
15672 + * The state of the battery as provided by the CSR is reflected on
15673 + * the two onboard LEDs. When facing the battery side of the board,
15674 + * with the LEDs at the top left and the battery at the bottom right
15675 + * (i.e. looking from the back side of the system box), their meaning
15676 + * is as follows (the system has to be powered on):
15677 + *
15678 + * left LED battery disable status: lit = enabled
15679 + * right LED battery condition status: lit = OK
15680 + */
15681 +
15682 /* MS02-NV iomem register offsets. */
15683 #define MS02NV_CSR 0x400000 /* control & status register */
15684
15685 +/* MS02-NV CSR status bits. */
15686 +#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
15687 +#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
15688 +
15689 +
15690 /* MS02-NV memory offsets. */
15691 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */
15692 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
15693 -#define MS02NV_RAM 0x000400 /* general-purpose RAM start */
15694 +#define MS02NV_VALID 0x000400 /* valid data magic ID */
15695 +#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
15696
15697 -/* MS02-NV diagnostic status constants. */
15698 -#define MS02NV_DIAG_SIZE_MASK 0xf0 /* RAM size mask */
15699 -#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* RAM size shift (left) */
15700 +/* MS02-NV diagnostic status bits. */
15701 +#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
15702 +#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
15703 +#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
15704 +#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
15705 +#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
15706 +#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
15707
15708 /* MS02-NV general constants. */
15709 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
15710 +#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
15711 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
15712 decoded by the module */
15713
15714 +
15715 typedef volatile u32 ms02nv_uint;
15716
15717 struct ms02nv_private {
15718 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/Config.in linux-2.4.32-rc1.mips/drivers/mtd/maps/Config.in
15719 --- linux-2.4.32-rc1/drivers/mtd/maps/Config.in 2003-06-13 16:51:34.000000000 +0200
15720 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/Config.in 2004-02-26 01:46:35.000000000 +0100
15721 @@ -51,11 +51,26 @@
15722 dep_tristate ' Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
15723 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
15724 dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
15725 + dep_tristate ' Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
15726 + dep_tristate ' XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
15727 + dep_tristate ' MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
15728 if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
15729 -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
15730 bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT
15731 bool ' Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
15732 fi
15733 + tristate ' Db1x00 MTD support' CONFIG_MTD_DB1X00
15734 + if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
15735 + bool ' Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT
15736 + bool ' Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
15737 + fi
15738 + tristate ' Pb1550 MTD support' CONFIG_MTD_PB1550
15739 + if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
15740 + bool ' Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
15741 + bool ' Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
15742 + fi
15743 + dep_tristate ' Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
15744 + dep_tristate ' Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
15745 dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
15746 if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
15747 hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
15748 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/db1x00-flash.c linux-2.4.32-rc1.mips/drivers/mtd/maps/db1x00-flash.c
15749 --- linux-2.4.32-rc1/drivers/mtd/maps/db1x00-flash.c 1970-01-01 01:00:00.000000000 +0100
15750 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/db1x00-flash.c 2005-02-03 07:35:29.000000000 +0100
15751 @@ -0,0 +1,283 @@
15752 +/*
15753 + * Flash memory access on Alchemy Db1xxx boards
15754 + *
15755 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
15756 + *
15757 + */
15758 +
15759 +#include <linux/config.h>
15760 +#include <linux/module.h>
15761 +#include <linux/types.h>
15762 +#include <linux/kernel.h>
15763 +
15764 +#include <linux/mtd/mtd.h>
15765 +#include <linux/mtd/map.h>
15766 +#include <linux/mtd/partitions.h>
15767 +
15768 +#include <asm/io.h>
15769 +#include <asm/au1000.h>
15770 +#include <asm/db1x00.h>
15771 +
15772 +#ifdef DEBUG_RW
15773 +#define DBG(x...) printk(x)
15774 +#else
15775 +#define DBG(x...)
15776 +#endif
15777 +
15778 +static unsigned long window_addr;
15779 +static unsigned long window_size;
15780 +static unsigned long flash_size;
15781 +
15782 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15783 +{
15784 + __u8 ret;
15785 + ret = __raw_readb(map->map_priv_1 + ofs);
15786 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15787 + return ret;
15788 +}
15789 +
15790 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15791 +{
15792 + __u16 ret;
15793 + ret = __raw_readw(map->map_priv_1 + ofs);
15794 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15795 + return ret;
15796 +}
15797 +
15798 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15799 +{
15800 + __u32 ret;
15801 + ret = __raw_readl(map->map_priv_1 + ofs);
15802 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15803 + return ret;
15804 +}
15805 +
15806 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15807 +{
15808 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15809 + memcpy_fromio(to, map->map_priv_1 + from, len);
15810 +}
15811 +
15812 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15813 +{
15814 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15815 + __raw_writeb(d, map->map_priv_1 + adr);
15816 + mb();
15817 +}
15818 +
15819 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15820 +{
15821 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15822 + __raw_writew(d, map->map_priv_1 + adr);
15823 + mb();
15824 +}
15825 +
15826 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15827 +{
15828 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15829 + __raw_writel(d, map->map_priv_1 + adr);
15830 + mb();
15831 +}
15832 +
15833 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15834 +{
15835 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15836 + memcpy_toio(map->map_priv_1 + to, from, len);
15837 +}
15838 +
15839 +static struct map_info db1x00_map = {
15840 + name: "Db1x00 flash",
15841 + read8: physmap_read8,
15842 + read16: physmap_read16,
15843 + read32: physmap_read32,
15844 + copy_from: physmap_copy_from,
15845 + write8: physmap_write8,
15846 + write16: physmap_write16,
15847 + write32: physmap_write32,
15848 + copy_to: physmap_copy_to,
15849 +};
15850 +
15851 +static unsigned char flash_buswidth = 4;
15852 +
15853 +/*
15854 + * The Db1x boards support different flash densities. We setup
15855 + * the mtd_partition structures below for default of 64Mbit
15856 + * flash densities, and override the partitions sizes, if
15857 + * necessary, after we check the board status register.
15858 + */
15859 +
15860 +#ifdef DB1X00_BOTH_BANKS
15861 +/* both banks will be used. Combine the first bank and the first
15862 + * part of the second bank together into a single jffs/jffs2
15863 + * partition.
15864 + */
15865 +static struct mtd_partition db1x00_partitions[] = {
15866 + {
15867 + name: "User FS",
15868 + size: 0x1c00000,
15869 + offset: 0x0000000
15870 + },{
15871 + name: "yamon",
15872 + size: 0x0100000,
15873 + offset: MTDPART_OFS_APPEND,
15874 + mask_flags: MTD_WRITEABLE
15875 + },{
15876 + name: "raw kernel",
15877 + size: (0x300000-0x40000), /* last 256KB is yamon env */
15878 + offset: MTDPART_OFS_APPEND,
15879 + }
15880 +};
15881 +#elif defined(DB1X00_BOOT_ONLY)
15882 +static struct mtd_partition db1x00_partitions[] = {
15883 + {
15884 + name: "User FS",
15885 + size: 0x00c00000,
15886 + offset: 0x0000000
15887 + },{
15888 + name: "yamon",
15889 + size: 0x0100000,
15890 + offset: MTDPART_OFS_APPEND,
15891 + mask_flags: MTD_WRITEABLE
15892 + },{
15893 + name: "raw kernel",
15894 + size: (0x300000-0x40000), /* last 256KB is yamon env */
15895 + offset: MTDPART_OFS_APPEND,
15896 + }
15897 +};
15898 +#elif defined(DB1X00_USER_ONLY)
15899 +static struct mtd_partition db1x00_partitions[] = {
15900 + {
15901 + name: "User FS",
15902 + size: 0x0e00000,
15903 + offset: 0x0000000
15904 + },{
15905 + name: "raw kernel",
15906 + size: MTDPART_SIZ_FULL,
15907 + offset: MTDPART_OFS_APPEND,
15908 + }
15909 +};
15910 +#else
15911 +#error MTD_DB1X00 define combo error /* should never happen */
15912 +#endif
15913 +
15914 +
15915 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15916 +
15917 +static struct mtd_partition *parsed_parts;
15918 +static struct mtd_info *mymtd;
15919 +
15920 +/*
15921 + * Probe the flash density and setup window address and size
15922 + * based on user CONFIG options. There are times when we don't
15923 + * want the MTD driver to be probing the boot or user flash,
15924 + * so having the option to enable only one bank is important.
15925 + */
15926 +int setup_flash_params()
15927 +{
15928 + switch ((bcsr->status >> 14) & 0x3) {
15929 + case 0: /* 64Mbit devices */
15930 + flash_size = 0x800000; /* 8MB per part */
15931 +#if defined(DB1X00_BOTH_BANKS)
15932 + window_addr = 0x1E000000;
15933 + window_size = 0x2000000;
15934 +#elif defined(DB1X00_BOOT_ONLY)
15935 + window_addr = 0x1F000000;
15936 + window_size = 0x1000000;
15937 +#else /* USER ONLY */
15938 + window_addr = 0x1E000000;
15939 + window_size = 0x1000000;
15940 +#endif
15941 + break;
15942 + case 1:
15943 + /* 128 Mbit devices */
15944 + flash_size = 0x1000000; /* 16MB per part */
15945 +#if defined(DB1X00_BOTH_BANKS)
15946 + window_addr = 0x1C000000;
15947 + window_size = 0x4000000;
15948 + /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
15949 + db1x00_partitions[0].size = 0x3C00000;
15950 +#elif defined(DB1X00_BOOT_ONLY)
15951 + window_addr = 0x1E000000;
15952 + window_size = 0x2000000;
15953 + /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
15954 + db1x00_partitions[0].size = 0x1C00000;
15955 +#else /* USER ONLY */
15956 + window_addr = 0x1C000000;
15957 + window_size = 0x2000000;
15958 + /* USERFS from 0x1C00 0000 to 0x1DE00000 */
15959 + db1x00_partitions[0].size = 0x1DE0000;
15960 +#endif
15961 + break;
15962 + case 2:
15963 + /* 256 Mbit devices */
15964 + flash_size = 0x4000000; /* 64MB per part */
15965 +#if defined(DB1X00_BOTH_BANKS)
15966 + return 1;
15967 +#elif defined(DB1X00_BOOT_ONLY)
15968 + /* Boot ROM flash bank only; no user bank */
15969 + window_addr = 0x1C000000;
15970 + window_size = 0x4000000;
15971 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
15972 + db1x00_partitions[0].size = 0x3C00000;
15973 +#else /* USER ONLY */
15974 + return 1;
15975 +#endif
15976 + break;
15977 + default:
15978 + return 1;
15979 + }
15980 + return 0;
15981 +}
15982 +
15983 +int __init db1x00_mtd_init(void)
15984 +{
15985 + struct mtd_partition *parts;
15986 + int nb_parts = 0;
15987 + char *part_type;
15988 +
15989 + /* Default flash buswidth */
15990 + db1x00_map.buswidth = flash_buswidth;
15991 +
15992 + if (setup_flash_params())
15993 + return -ENXIO;
15994 +
15995 + /*
15996 + * Static partition definition selection
15997 + */
15998 + part_type = "static";
15999 + parts = db1x00_partitions;
16000 + nb_parts = NB_OF(db1x00_partitions);
16001 + db1x00_map.size = window_size;
16002 +
16003 + /*
16004 + * Now let's probe for the actual flash. Do it here since
16005 + * specific machine settings might have been set above.
16006 + */
16007 + printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
16008 + db1x00_map.buswidth*8);
16009 + db1x00_map.map_priv_1 =
16010 + (unsigned long)ioremap(window_addr, window_size);
16011 + mymtd = do_map_probe("cfi_probe", &db1x00_map);
16012 + if (!mymtd) return -ENXIO;
16013 + mymtd->module = THIS_MODULE;
16014 +
16015 + add_mtd_partitions(mymtd, parts, nb_parts);
16016 + return 0;
16017 +}
16018 +
16019 +static void __exit db1x00_mtd_cleanup(void)
16020 +{
16021 + if (mymtd) {
16022 + del_mtd_partitions(mymtd);
16023 + map_destroy(mymtd);
16024 + if (parsed_parts)
16025 + kfree(parsed_parts);
16026 + }
16027 +}
16028 +
16029 +module_init(db1x00_mtd_init);
16030 +module_exit(db1x00_mtd_cleanup);
16031 +
16032 +MODULE_AUTHOR("Pete Popov");
16033 +MODULE_DESCRIPTION("Db1x00 mtd map driver");
16034 +MODULE_LICENSE("GPL");
16035 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/hydrogen3-flash.c linux-2.4.32-rc1.mips/drivers/mtd/maps/hydrogen3-flash.c
16036 --- linux-2.4.32-rc1/drivers/mtd/maps/hydrogen3-flash.c 1970-01-01 01:00:00.000000000 +0100
16037 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/hydrogen3-flash.c 2004-01-10 23:40:18.000000000 +0100
16038 @@ -0,0 +1,189 @@
16039 +/*
16040 + * Flash memory access on Alchemy HydrogenIII boards
16041 + *
16042 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16043 + *
16044 + */
16045 +
16046 +#include <linux/config.h>
16047 +#include <linux/module.h>
16048 +#include <linux/types.h>
16049 +#include <linux/kernel.h>
16050 +
16051 +#include <linux/mtd/mtd.h>
16052 +#include <linux/mtd/map.h>
16053 +#include <linux/mtd/partitions.h>
16054 +
16055 +#include <asm/io.h>
16056 +#include <asm/au1000.h>
16057 +
16058 +#ifdef DEBUG_RW
16059 +#define DBG(x...) printk(x)
16060 +#else
16061 +#define DBG(x...)
16062 +#endif
16063 +
16064 +#define WINDOW_ADDR 0x1E000000
16065 +#define WINDOW_SIZE 0x02000000
16066 +
16067 +
16068 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16069 +{
16070 + __u8 ret;
16071 + ret = __raw_readb(map->map_priv_1 + ofs);
16072 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16073 + return ret;
16074 +}
16075 +
16076 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16077 +{
16078 + __u16 ret;
16079 + ret = __raw_readw(map->map_priv_1 + ofs);
16080 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16081 + return ret;
16082 +}
16083 +
16084 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16085 +{
16086 + __u32 ret;
16087 + ret = __raw_readl(map->map_priv_1 + ofs);
16088 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16089 + return ret;
16090 +}
16091 +
16092 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16093 +{
16094 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16095 + memcpy_fromio(to, map->map_priv_1 + from, len);
16096 +}
16097 +
16098 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16099 +{
16100 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16101 + __raw_writeb(d, map->map_priv_1 + adr);
16102 + mb();
16103 +}
16104 +
16105 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16106 +{
16107 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16108 + __raw_writew(d, map->map_priv_1 + adr);
16109 + mb();
16110 +}
16111 +
16112 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16113 +{
16114 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16115 + __raw_writel(d, map->map_priv_1 + adr);
16116 + mb();
16117 +}
16118 +
16119 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16120 +{
16121 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16122 + memcpy_toio(map->map_priv_1 + to, from, len);
16123 +}
16124 +
16125 +static struct map_info hydrogen3_map = {
16126 + name: "HydrogenIII flash",
16127 + read8: physmap_read8,
16128 + read16: physmap_read16,
16129 + read32: physmap_read32,
16130 + copy_from: physmap_copy_from,
16131 + write8: physmap_write8,
16132 + write16: physmap_write16,
16133 + write32: physmap_write32,
16134 + copy_to: physmap_copy_to,
16135 +};
16136 +
16137 +static unsigned char flash_buswidth = 4;
16138 +
16139 +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
16140 + * up the offsets. */
16141 +static struct mtd_partition hydrogen3_partitions[] = {
16142 + {
16143 + name: "User FS",
16144 + size: 0x1c00000,
16145 + offset: 0x0000000
16146 + },{
16147 + name: "yamon",
16148 + size: 0x0100000,
16149 + offset: MTDPART_OFS_APPEND,
16150 + mask_flags: MTD_WRITEABLE
16151 + },{
16152 + name: "raw kernel",
16153 + size: 0x02c0000,
16154 + offset: MTDPART_OFS_APPEND
16155 + }
16156 +};
16157 +
16158 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16159 +
16160 +static struct mtd_partition *parsed_parts;
16161 +static struct mtd_info *mymtd;
16162 +
16163 +int __init hydrogen3_mtd_init(void)
16164 +{
16165 + struct mtd_partition *parts;
16166 + int nb_parts = 0;
16167 + char *part_type;
16168 +
16169 + /* Default flash buswidth */
16170 + hydrogen3_map.buswidth = flash_buswidth;
16171 +
16172 + /*
16173 + * Static partition definition selection
16174 + */
16175 + part_type = "static";
16176 + parts = hydrogen3_partitions;
16177 + nb_parts = NB_OF(hydrogen3_partitions);
16178 + hydrogen3_map.size = WINDOW_SIZE;
16179 +
16180 + /*
16181 + * Now let's probe for the actual flash. Do it here since
16182 + * specific machine settings might have been set above.
16183 + */
16184 + printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n",
16185 + hydrogen3_map.buswidth*8);
16186 + hydrogen3_map.map_priv_1 =
16187 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16188 + mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
16189 + if (!mymtd) return -ENXIO;
16190 + mymtd->module = THIS_MODULE;
16191 +
16192 + add_mtd_partitions(mymtd, parts, nb_parts);
16193 + return 0;
16194 +}
16195 +
16196 +static void __exit hydrogen3_mtd_cleanup(void)
16197 +{
16198 + if (mymtd) {
16199 + del_mtd_partitions(mymtd);
16200 + map_destroy(mymtd);
16201 + if (parsed_parts)
16202 + kfree(parsed_parts);
16203 + }
16204 +}
16205 +
16206 +/*#ifndef MODULE
16207 +
16208 +static int __init _bootflashonly(char *str)
16209 +{
16210 + bootflashonly = simple_strtol(str, NULL, 0);
16211 + return 1;
16212 +}
16213 +
16214 +
16215 +__setup("bootflashonly=", _bootflashonly);
16216 +
16217 +#endif*/
16218 +
16219 +
16220 +module_init(hydrogen3_mtd_init);
16221 +module_exit(hydrogen3_mtd_cleanup);
16222 +
16223 +MODULE_PARM(bootflashonly, "i");
16224 +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
16225 +MODULE_AUTHOR("Pete Popov");
16226 +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
16227 +MODULE_LICENSE("GPL");
16228 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/lasat.c linux-2.4.32-rc1.mips/drivers/mtd/maps/lasat.c
16229 --- linux-2.4.32-rc1/drivers/mtd/maps/lasat.c 2003-06-13 16:51:34.000000000 +0200
16230 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/lasat.c 2003-08-18 04:59:02.000000000 +0200
16231 @@ -1,15 +1,6 @@
16232 /*
16233 * Flash device on lasat 100 and 200 boards
16234 *
16235 - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
16236 - * works for.
16237 - *
16238 - * This program is free software; you can redistribute it and/or
16239 - * modify it under the terms of the GNU General Public License version
16240 - * 2 as published by the Free Software Foundation.
16241 - *
16242 - * $Id: lasat.c,v 1.1 2003/01/24 14:26:38 dwmw2 Exp $
16243 - *
16244 */
16245
16246 #include <linux/module.h>
16247 @@ -21,7 +12,6 @@
16248 #include <linux/mtd/partitions.h>
16249 #include <linux/config.h>
16250 #include <asm/lasat/lasat.h>
16251 -#include <asm/lasat/lasat_mtd.h>
16252
16253 static struct mtd_info *mymtd;
16254
16255 @@ -69,30 +59,33 @@
16256 }
16257
16258 static struct map_info sp_map = {
16259 - .name = "SP flash",
16260 - .buswidth = 4,
16261 - .read8 = sp_read8,
16262 - .read16 = sp_read16,
16263 - .read32 = sp_read32,
16264 - .copy_from = sp_copy_from,
16265 - .write8 = sp_write8,
16266 - .write16 = sp_write16,
16267 - .write32 = sp_write32,
16268 - .copy_to = sp_copy_to
16269 + name: "SP flash",
16270 + buswidth: 4,
16271 + read8: sp_read8,
16272 + read16: sp_read16,
16273 + read32: sp_read32,
16274 + copy_from: sp_copy_from,
16275 + write8: sp_write8,
16276 + write16: sp_write16,
16277 + write32: sp_write32,
16278 + copy_to: sp_copy_to
16279 };
16280
16281 static struct mtd_partition partition_info[LASAT_MTD_LAST];
16282 -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
16283 +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
16284
16285 static int __init init_sp(void)
16286 {
16287 int i;
16288 + int nparts = 0;
16289 /* this does not play well with the old flash code which
16290 * protects and uprotects the flash when necessary */
16291 printk(KERN_NOTICE "Unprotecting flash\n");
16292 *lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
16293
16294 - sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
16295 + sp_map.map_priv_1 = ioremap_nocache(
16296 + lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
16297 + lasat_board_info.li_flash_size);
16298 sp_map.size = lasat_board_info.li_flash_size;
16299
16300 printk(KERN_NOTICE "sp flash device: %lx at %lx\n",
16301 @@ -109,12 +102,15 @@
16302
16303 for (i=0; i < LASAT_MTD_LAST; i++) {
16304 size = lasat_flash_partition_size(i);
16305 - partition_info[i].size = size;
16306 - partition_info[i].offset = offset;
16307 - offset += size;
16308 + if (size != 0) {
16309 + nparts++;
16310 + partition_info[i].size = size;
16311 + partition_info[i].offset = offset;
16312 + offset += size;
16313 + }
16314 }
16315
16316 - add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
16317 + add_mtd_partitions( mymtd, partition_info, nparts );
16318 return 0;
16319 }
16320
16321 @@ -124,11 +120,11 @@
16322 static void __exit cleanup_sp(void)
16323 {
16324 if (mymtd) {
16325 - del_mtd_partitions(mymtd);
16326 - map_destroy(mymtd);
16327 + del_mtd_partitions(mymtd);
16328 + map_destroy(mymtd);
16329 }
16330 if (sp_map.map_priv_1) {
16331 - sp_map.map_priv_1 = 0;
16332 + sp_map.map_priv_1 = 0;
16333 }
16334 }
16335
16336 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/Makefile linux-2.4.32-rc1.mips/drivers/mtd/maps/Makefile
16337 --- linux-2.4.32-rc1/drivers/mtd/maps/Makefile 2003-06-13 16:51:34.000000000 +0200
16338 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/Makefile 2004-02-26 01:46:35.000000000 +0100
16339 @@ -52,7 +52,13 @@
16340 obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
16341 obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
16342 obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
16343 +obj-$(CONFIG_MTD_XXS1500) += xxs1500.o
16344 +obj-$(CONFIG_MTD_MTX1) += mtx-1.o
16345 obj-$(CONFIG_MTD_LASAT) += lasat.o
16346 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
16347 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
16348 +obj-$(CONFIG_MTD_HYDROGEN3) += hydrogen3-flash.o
16349 +obj-$(CONFIG_MTD_BOSPORUS) += pb1xxx-flash.o
16350 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
16351 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
16352 obj-$(CONFIG_MTD_IMPA7) += impa7.o
16353 @@ -61,5 +67,6 @@
16354 obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
16355 obj-$(CONFIG_MTD_NETtel) += nettel.o
16356 obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
16357 +obj-$(CONFIG_MTD_MIRAGE) += mirage-flash.o
16358
16359 include $(TOPDIR)/Rules.make
16360 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/mirage-flash.c linux-2.4.32-rc1.mips/drivers/mtd/maps/mirage-flash.c
16361 --- linux-2.4.32-rc1/drivers/mtd/maps/mirage-flash.c 1970-01-01 01:00:00.000000000 +0100
16362 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/mirage-flash.c 2003-12-22 04:37:22.000000000 +0100
16363 @@ -0,0 +1,194 @@
16364 +/*
16365 + * Flash memory access on AMD Mirage board.
16366 + *
16367 + * (C) 2003 Embedded Edge
16368 + * based on mirage-flash.c:
16369 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16370 + *
16371 + */
16372 +
16373 +#include <linux/config.h>
16374 +#include <linux/module.h>
16375 +#include <linux/types.h>
16376 +#include <linux/kernel.h>
16377 +
16378 +#include <linux/mtd/mtd.h>
16379 +#include <linux/mtd/map.h>
16380 +#include <linux/mtd/partitions.h>
16381 +
16382 +#include <asm/io.h>
16383 +#include <asm/au1000.h>
16384 +//#include <asm/mirage.h>
16385 +
16386 +#ifdef DEBUG_RW
16387 +#define DBG(x...) printk(x)
16388 +#else
16389 +#define DBG(x...)
16390 +#endif
16391 +
16392 +static unsigned long window_addr;
16393 +static unsigned long window_size;
16394 +static unsigned long flash_size;
16395 +
16396 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16397 +{
16398 + __u8 ret;
16399 + ret = __raw_readb(map->map_priv_1 + ofs);
16400 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16401 + return ret;
16402 +}
16403 +
16404 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16405 +{
16406 + __u16 ret;
16407 + ret = __raw_readw(map->map_priv_1 + ofs);
16408 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16409 + return ret;
16410 +}
16411 +
16412 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16413 +{
16414 + __u32 ret;
16415 + ret = __raw_readl(map->map_priv_1 + ofs);
16416 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16417 + return ret;
16418 +}
16419 +
16420 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16421 +{
16422 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16423 + memcpy_fromio(to, map->map_priv_1 + from, len);
16424 +}
16425 +
16426 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16427 +{
16428 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16429 + __raw_writeb(d, map->map_priv_1 + adr);
16430 + mb();
16431 +}
16432 +
16433 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16434 +{
16435 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16436 + __raw_writew(d, map->map_priv_1 + adr);
16437 + mb();
16438 +}
16439 +
16440 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16441 +{
16442 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16443 + __raw_writel(d, map->map_priv_1 + adr);
16444 + mb();
16445 +}
16446 +
16447 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16448 +{
16449 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16450 + memcpy_toio(map->map_priv_1 + to, from, len);
16451 +}
16452 +
16453 +static struct map_info mirage_map = {
16454 + name: "Mirage flash",
16455 + read8: physmap_read8,
16456 + read16: physmap_read16,
16457 + read32: physmap_read32,
16458 + copy_from: physmap_copy_from,
16459 + write8: physmap_write8,
16460 + write16: physmap_write16,
16461 + write32: physmap_write32,
16462 + copy_to: physmap_copy_to,
16463 +};
16464 +
16465 +static unsigned char flash_buswidth = 4;
16466 +
16467 +static struct mtd_partition mirage_partitions[] = {
16468 + {
16469 + name: "User FS",
16470 + size: 0x1c00000,
16471 + offset: 0x0000000
16472 + },{
16473 + name: "yamon",
16474 + size: 0x0100000,
16475 + offset: MTDPART_OFS_APPEND,
16476 + mask_flags: MTD_WRITEABLE
16477 + },{
16478 + name: "raw kernel",
16479 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16480 + offset: MTDPART_OFS_APPEND,
16481 + }
16482 +};
16483 +
16484 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16485 +
16486 +static struct mtd_partition *parsed_parts;
16487 +static struct mtd_info *mymtd;
16488 +
16489 +/*
16490 + * Probe the flash density and setup window address and size
16491 + * based on user CONFIG options. There are times when we don't
16492 + * want the MTD driver to be probing the boot or user flash,
16493 + * so having the option to enable only one bank is important.
16494 + */
16495 +int setup_flash_params()
16496 +{
16497 + flash_size = 0x4000000; /* 64MB per part */
16498 + /* Boot ROM flash bank only; no user bank */
16499 + window_addr = 0x1C000000;
16500 + window_size = 0x4000000;
16501 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
16502 + mirage_partitions[0].size = 0x3C00000;
16503 + return 0;
16504 +}
16505 +
16506 +int __init mirage_mtd_init(void)
16507 +{
16508 + struct mtd_partition *parts;
16509 + int nb_parts = 0;
16510 + char *part_type;
16511 +
16512 + /* Default flash buswidth */
16513 + mirage_map.buswidth = flash_buswidth;
16514 +
16515 + if (setup_flash_params())
16516 + return -ENXIO;
16517 +
16518 + /*
16519 + * Static partition definition selection
16520 + */
16521 + part_type = "static";
16522 + parts = mirage_partitions;
16523 + nb_parts = NB_OF(mirage_partitions);
16524 + mirage_map.size = window_size;
16525 +
16526 + /*
16527 + * Now let's probe for the actual flash. Do it here since
16528 + * specific machine settings might have been set above.
16529 + */
16530 + printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n",
16531 + mirage_map.buswidth*8);
16532 + mirage_map.map_priv_1 =
16533 + (unsigned long)ioremap(window_addr, window_size);
16534 + mymtd = do_map_probe("cfi_probe", &mirage_map);
16535 + if (!mymtd) return -ENXIO;
16536 + mymtd->module = THIS_MODULE;
16537 +
16538 + add_mtd_partitions(mymtd, parts, nb_parts);
16539 + return 0;
16540 +}
16541 +
16542 +static void __exit mirage_mtd_cleanup(void)
16543 +{
16544 + if (mymtd) {
16545 + del_mtd_partitions(mymtd);
16546 + map_destroy(mymtd);
16547 + if (parsed_parts)
16548 + kfree(parsed_parts);
16549 + }
16550 +}
16551 +
16552 +module_init(mirage_mtd_init);
16553 +module_exit(mirage_mtd_cleanup);
16554 +
16555 +MODULE_AUTHOR("Embedded Edge");
16556 +MODULE_DESCRIPTION("Mirage mtd map driver");
16557 +MODULE_LICENSE("GPL");
16558 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/mtx-1.c linux-2.4.32-rc1.mips/drivers/mtd/maps/mtx-1.c
16559 --- linux-2.4.32-rc1/drivers/mtd/maps/mtx-1.c 1970-01-01 01:00:00.000000000 +0100
16560 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/mtx-1.c 2003-06-27 02:04:35.000000000 +0200
16561 @@ -0,0 +1,181 @@
16562 +/*
16563 + * Flash memory access on 4G Systems MTX-1 board
16564 + *
16565 + * (C) 2003 Pete Popov <ppopov@mvista.com>
16566 + * Bruno Randolf <bruno.randolf@4g-systems.de>
16567 + */
16568 +
16569 +#include <linux/config.h>
16570 +#include <linux/module.h>
16571 +#include <linux/types.h>
16572 +#include <linux/kernel.h>
16573 +
16574 +#include <linux/mtd/mtd.h>
16575 +#include <linux/mtd/map.h>
16576 +#include <linux/mtd/partitions.h>
16577 +
16578 +#include <asm/io.h>
16579 +#include <asm/au1000.h>
16580 +
16581 +#ifdef DEBUG_RW
16582 +#define DBG(x...) printk(x)
16583 +#else
16584 +#define DBG(x...)
16585 +#endif
16586 +
16587 +#ifdef CONFIG_MIPS_MTX1
16588 +#define WINDOW_ADDR 0x1E000000
16589 +#define WINDOW_SIZE 0x2000000
16590 +#endif
16591 +
16592 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16593 +{
16594 + __u8 ret;
16595 + ret = __raw_readb(map->map_priv_1 + ofs);
16596 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16597 + return ret;
16598 +}
16599 +
16600 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16601 +{
16602 + __u16 ret;
16603 + ret = __raw_readw(map->map_priv_1 + ofs);
16604 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16605 + return ret;
16606 +}
16607 +
16608 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16609 +{
16610 + __u32 ret;
16611 + ret = __raw_readl(map->map_priv_1 + ofs);
16612 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16613 + return ret;
16614 +}
16615 +
16616 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16617 +{
16618 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16619 + memcpy_fromio(to, map->map_priv_1 + from, len);
16620 +}
16621 +
16622 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16623 +{
16624 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16625 + __raw_writeb(d, map->map_priv_1 + adr);
16626 + mb();
16627 +}
16628 +
16629 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16630 +{
16631 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16632 + __raw_writew(d, map->map_priv_1 + adr);
16633 + mb();
16634 +}
16635 +
16636 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16637 +{
16638 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16639 + __raw_writel(d, map->map_priv_1 + adr);
16640 + mb();
16641 +}
16642 +
16643 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16644 +{
16645 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16646 + memcpy_toio(map->map_priv_1 + to, from, len);
16647 +}
16648 +
16649 +
16650 +
16651 +static struct map_info mtx1_map = {
16652 + name: "MTX-1 flash",
16653 + read8: physmap_read8,
16654 + read16: physmap_read16,
16655 + read32: physmap_read32,
16656 + copy_from: physmap_copy_from,
16657 + write8: physmap_write8,
16658 + write16: physmap_write16,
16659 + write32: physmap_write32,
16660 + copy_to: physmap_copy_to,
16661 +};
16662 +
16663 +
16664 +static unsigned long flash_size = 0x01000000;
16665 +static unsigned char flash_buswidth = 4;
16666 +static struct mtd_partition mtx1_partitions[] = {
16667 + {
16668 + name: "user fs",
16669 + size: 0x1c00000,
16670 + offset: 0,
16671 + },{
16672 + name: "yamon",
16673 + size: 0x0100000,
16674 + offset: MTDPART_OFS_APPEND,
16675 + mask_flags: MTD_WRITEABLE
16676 + },{
16677 + name: "raw kernel",
16678 + size: 0x02c0000,
16679 + offset: MTDPART_OFS_APPEND,
16680 + },{
16681 + name: "yamon env vars",
16682 + size: 0x0040000,
16683 + offset: MTDPART_OFS_APPEND,
16684 + mask_flags: MTD_WRITEABLE
16685 + }
16686 +};
16687 +
16688 +
16689 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16690 +
16691 +static struct mtd_partition *parsed_parts;
16692 +static struct mtd_info *mymtd;
16693 +
16694 +int __init mtx1_mtd_init(void)
16695 +{
16696 + struct mtd_partition *parts;
16697 + int nb_parts = 0;
16698 + char *part_type;
16699 +
16700 + /* Default flash buswidth */
16701 + mtx1_map.buswidth = flash_buswidth;
16702 +
16703 + /*
16704 + * Static partition definition selection
16705 + */
16706 + part_type = "static";
16707 + parts = mtx1_partitions;
16708 + nb_parts = NB_OF(mtx1_partitions);
16709 + mtx1_map.size = flash_size;
16710 +
16711 + /*
16712 + * Now let's probe for the actual flash. Do it here since
16713 + * specific machine settings might have been set above.
16714 + */
16715 + printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
16716 + mtx1_map.buswidth*8);
16717 + mtx1_map.map_priv_1 =
16718 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16719 + mymtd = do_map_probe("cfi_probe", &mtx1_map);
16720 + if (!mymtd) return -ENXIO;
16721 + mymtd->module = THIS_MODULE;
16722 +
16723 + add_mtd_partitions(mymtd, parts, nb_parts);
16724 + return 0;
16725 +}
16726 +
16727 +static void __exit mtx1_mtd_cleanup(void)
16728 +{
16729 + if (mymtd) {
16730 + del_mtd_partitions(mymtd);
16731 + map_destroy(mymtd);
16732 + if (parsed_parts)
16733 + kfree(parsed_parts);
16734 + }
16735 +}
16736 +
16737 +module_init(mtx1_mtd_init);
16738 +module_exit(mtx1_mtd_cleanup);
16739 +
16740 +MODULE_AUTHOR("Pete Popov");
16741 +MODULE_DESCRIPTION("MTX-1 CFI map driver");
16742 +MODULE_LICENSE("GPL");
16743 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/pb1550-flash.c linux-2.4.32-rc1.mips/drivers/mtd/maps/pb1550-flash.c
16744 --- linux-2.4.32-rc1/drivers/mtd/maps/pb1550-flash.c 1970-01-01 01:00:00.000000000 +0100
16745 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/pb1550-flash.c 2004-02-26 01:48:48.000000000 +0100
16746 @@ -0,0 +1,270 @@
16747 +/*
16748 + * Flash memory access on Alchemy Pb1550 board
16749 + *
16750 + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
16751 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16752 + *
16753 + */
16754 +
16755 +#include <linux/config.h>
16756 +#include <linux/module.h>
16757 +#include <linux/types.h>
16758 +#include <linux/kernel.h>
16759 +
16760 +#include <linux/mtd/mtd.h>
16761 +#include <linux/mtd/map.h>
16762 +#include <linux/mtd/partitions.h>
16763 +
16764 +#include <asm/io.h>
16765 +#include <asm/au1000.h>
16766 +#include <asm/pb1550.h>
16767 +
16768 +#ifdef DEBUG_RW
16769 +#define DBG(x...) printk(x)
16770 +#else
16771 +#define DBG(x...)
16772 +#endif
16773 +
16774 +static unsigned long window_addr;
16775 +static unsigned long window_size;
16776 +
16777 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16778 +{
16779 + __u8 ret;
16780 + ret = __raw_readb(map->map_priv_1 + ofs);
16781 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16782 + return ret;
16783 +}
16784 +
16785 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16786 +{
16787 + __u16 ret;
16788 + ret = __raw_readw(map->map_priv_1 + ofs);
16789 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16790 + return ret;
16791 +}
16792 +
16793 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16794 +{
16795 + __u32 ret;
16796 + ret = __raw_readl(map->map_priv_1 + ofs);
16797 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16798 + return ret;
16799 +}
16800 +
16801 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16802 +{
16803 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16804 + memcpy_fromio(to, map->map_priv_1 + from, len);
16805 +}
16806 +
16807 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16808 +{
16809 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16810 + __raw_writeb(d, map->map_priv_1 + adr);
16811 + mb();
16812 +}
16813 +
16814 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16815 +{
16816 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16817 + __raw_writew(d, map->map_priv_1 + adr);
16818 + mb();
16819 +}
16820 +
16821 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16822 +{
16823 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16824 + __raw_writel(d, map->map_priv_1 + adr);
16825 + mb();
16826 +}
16827 +
16828 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16829 +{
16830 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16831 + memcpy_toio(map->map_priv_1 + to, from, len);
16832 +}
16833 +
16834 +static struct map_info pb1550_map = {
16835 + name: "Pb1550 flash",
16836 + read8: physmap_read8,
16837 + read16: physmap_read16,
16838 + read32: physmap_read32,
16839 + copy_from: physmap_copy_from,
16840 + write8: physmap_write8,
16841 + write16: physmap_write16,
16842 + write32: physmap_write32,
16843 + copy_to: physmap_copy_to,
16844 +};
16845 +
16846 +static unsigned char flash_buswidth = 4;
16847 +
16848 +/*
16849 + * Support only 64MB NOR Flash parts
16850 + */
16851 +
16852 +#ifdef PB1550_BOTH_BANKS
16853 +/* both banks will be used. Combine the first bank and the first
16854 + * part of the second bank together into a single jffs/jffs2
16855 + * partition.
16856 + */
16857 +static struct mtd_partition pb1550_partitions[] = {
16858 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16859 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
16860 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
16861 + */
16862 + {
16863 + name: "User FS",
16864 + size: (0x1FC00000 - 0x18000000),
16865 + offset: 0x0000000
16866 + },{
16867 + name: "yamon",
16868 + size: 0x0100000,
16869 + offset: MTDPART_OFS_APPEND,
16870 + mask_flags: MTD_WRITEABLE
16871 + },{
16872 + name: "raw kernel",
16873 + size: (0x300000 - 0x40000), /* last 256KB is yamon env */
16874 + offset: MTDPART_OFS_APPEND,
16875 + }
16876 +};
16877 +#elif defined(PB1550_BOOT_ONLY)
16878 +static struct mtd_partition pb1550_partitions[] = {
16879 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16880 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
16881 + */
16882 + {
16883 + name: "User FS",
16884 + size: 0x03c00000,
16885 + offset: 0x0000000
16886 + },{
16887 + name: "yamon",
16888 + size: 0x0100000,
16889 + offset: MTDPART_OFS_APPEND,
16890 + mask_flags: MTD_WRITEABLE
16891 + },{
16892 + name: "raw kernel",
16893 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16894 + offset: MTDPART_OFS_APPEND,
16895 + }
16896 +};
16897 +#elif defined(PB1550_USER_ONLY)
16898 +static struct mtd_partition pb1550_partitions[] = {
16899 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16900 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
16901 + */
16902 + {
16903 + name: "User FS",
16904 + size: (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
16905 + offset: 0x0000000
16906 + },{
16907 + name: "raw kernel",
16908 + size: MTDPART_SIZ_FULL,
16909 + offset: MTDPART_OFS_APPEND,
16910 + }
16911 +};
16912 +#else
16913 +#error MTD_PB1550 define combo error /* should never happen */
16914 +#endif
16915 +
16916 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16917 +
16918 +static struct mtd_partition *parsed_parts;
16919 +static struct mtd_info *mymtd;
16920 +
16921 +/*
16922 + * Probe the flash density and setup window address and size
16923 + * based on user CONFIG options. There are times when we don't
16924 + * want the MTD driver to be probing the boot or user flash,
16925 + * so having the option to enable only one bank is important.
16926 + */
16927 +int setup_flash_params()
16928 +{
16929 + u16 boot_swapboot;
16930 + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
16931 + ((bcsr->status >> 6) & 0x1);
16932 + printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
16933 +
16934 + switch (boot_swapboot) {
16935 + case 0: /* 512Mbit devices, both enabled */
16936 + case 1:
16937 + case 8:
16938 + case 9:
16939 +#if defined(PB1550_BOTH_BANKS)
16940 + window_addr = 0x18000000;
16941 + window_size = 0x8000000;
16942 +#elif defined(PB1550_BOOT_ONLY)
16943 + window_addr = 0x1C000000;
16944 + window_size = 0x4000000;
16945 +#else /* USER ONLY */
16946 + window_addr = 0x1E000000;
16947 + window_size = 0x1000000;
16948 +#endif
16949 + break;
16950 + case 0xC:
16951 + case 0xD:
16952 + case 0xE:
16953 + case 0xF:
16954 + /* 64 MB Boot NOR Flash is disabled */
16955 + /* and the start address is moved to 0x0C00000 */
16956 + window_addr = 0x0C000000;
16957 + window_size = 0x4000000;
16958 + default:
16959 + printk("Pb1550 MTD: unsupported boot:swap setting\n");
16960 + return 1;
16961 + }
16962 + return 0;
16963 +}
16964 +
16965 +int __init pb1550_mtd_init(void)
16966 +{
16967 + struct mtd_partition *parts;
16968 + int nb_parts = 0;
16969 + char *part_type;
16970 +
16971 + /* Default flash buswidth */
16972 + pb1550_map.buswidth = flash_buswidth;
16973 +
16974 + if (setup_flash_params())
16975 + return -ENXIO;
16976 +
16977 + /*
16978 + * Static partition definition selection
16979 + */
16980 + part_type = "static";
16981 + parts = pb1550_partitions;
16982 + nb_parts = NB_OF(pb1550_partitions);
16983 + pb1550_map.size = window_size;
16984 +
16985 + /*
16986 + * Now let's probe for the actual flash. Do it here since
16987 + * specific machine settings might have been set above.
16988 + */
16989 + printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
16990 + pb1550_map.buswidth*8);
16991 + pb1550_map.map_priv_1 =
16992 + (unsigned long)ioremap(window_addr, window_size);
16993 + mymtd = do_map_probe("cfi_probe", &pb1550_map);
16994 + if (!mymtd) return -ENXIO;
16995 + mymtd->module = THIS_MODULE;
16996 +
16997 + add_mtd_partitions(mymtd, parts, nb_parts);
16998 + return 0;
16999 +}
17000 +
17001 +static void __exit pb1550_mtd_cleanup(void)
17002 +{
17003 + if (mymtd) {
17004 + del_mtd_partitions(mymtd);
17005 + map_destroy(mymtd);
17006 + if (parsed_parts)
17007 + kfree(parsed_parts);
17008 + }
17009 +}
17010 +
17011 +module_init(pb1550_mtd_init);
17012 +module_exit(pb1550_mtd_cleanup);
17013 +
17014 +MODULE_AUTHOR("Embedded Edge, LLC");
17015 +MODULE_DESCRIPTION("Pb1550 mtd map driver");
17016 +MODULE_LICENSE("GPL");
17017 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/pb1xxx-flash.c linux-2.4.32-rc1.mips/drivers/mtd/maps/pb1xxx-flash.c
17018 --- linux-2.4.32-rc1/drivers/mtd/maps/pb1xxx-flash.c 2003-06-13 16:51:34.000000000 +0200
17019 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/pb1xxx-flash.c 2003-05-19 08:27:22.000000000 +0200
17020 @@ -192,6 +192,34 @@
17021 #else
17022 #error MTD_PB1500 define combo error /* should never happen */
17023 #endif
17024 +#elif defined(CONFIG_MTD_BOSPORUS)
17025 +static unsigned char flash_buswidth = 2;
17026 +static unsigned long flash_size = 0x02000000;
17027 +#define WINDOW_ADDR 0x1F000000
17028 +#define WINDOW_SIZE 0x2000000
17029 +static struct mtd_partition pb1xxx_partitions[] = {
17030 + {
17031 + name: "User FS",
17032 + size: 0x00400000,
17033 + offset: 0x00000000,
17034 + },{
17035 + name: "Yamon-2",
17036 + size: 0x00100000,
17037 + offset: 0x00400000,
17038 + },{
17039 + name: "Root FS",
17040 + size: 0x00700000,
17041 + offset: 0x00500000,
17042 + },{
17043 + name: "Yamon-1",
17044 + size: 0x00100000,
17045 + offset: 0x00C00000,
17046 + },{
17047 + name: "Kernel",
17048 + size: 0x00300000,
17049 + offset: 0x00D00000,
17050 + }
17051 +};
17052 #else
17053 #error Unsupported board
17054 #endif
17055 diff -Nur linux-2.4.32-rc1/drivers/mtd/maps/xxs1500.c linux-2.4.32-rc1.mips/drivers/mtd/maps/xxs1500.c
17056 --- linux-2.4.32-rc1/drivers/mtd/maps/xxs1500.c 1970-01-01 01:00:00.000000000 +0100
17057 +++ linux-2.4.32-rc1.mips/drivers/mtd/maps/xxs1500.c 2003-08-02 04:06:01.000000000 +0200
17058 @@ -0,0 +1,186 @@
17059 +/*
17060 + * Flash memory access on MyCable XXS1500 board
17061 + *
17062 + * (C) 2003 Pete Popov <ppopov@mvista.com>
17063 + *
17064 + * $Id: xxs1500.c,v 1.1.2.1 2003/06/13 21:15:46 ppopov Exp $
17065 + */
17066 +
17067 +#include <linux/config.h>
17068 +#include <linux/module.h>
17069 +#include <linux/types.h>
17070 +#include <linux/kernel.h>
17071 +
17072 +#include <linux/mtd/mtd.h>
17073 +#include <linux/mtd/map.h>
17074 +#include <linux/mtd/partitions.h>
17075 +
17076 +#include <asm/io.h>
17077 +#include <asm/au1000.h>
17078 +
17079 +#ifdef DEBUG_RW
17080 +#define DBG(x...) printk(x)
17081 +#else
17082 +#define DBG(x...)
17083 +#endif
17084 +
17085 +#ifdef CONFIG_MIPS_XXS1500
17086 +#define WINDOW_ADDR 0x1F000000
17087 +#define WINDOW_SIZE 0x1000000
17088 +#endif
17089 +
17090 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
17091 +{
17092 + __u8 ret;
17093 + ret = __raw_readb(map->map_priv_1 + ofs);
17094 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17095 + return ret;
17096 +}
17097 +
17098 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
17099 +{
17100 + __u16 ret;
17101 + ret = __raw_readw(map->map_priv_1 + ofs);
17102 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17103 + return ret;
17104 +}
17105 +
17106 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
17107 +{
17108 + __u32 ret;
17109 + ret = __raw_readl(map->map_priv_1 + ofs);
17110 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17111 + return ret;
17112 +}
17113 +
17114 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
17115 +{
17116 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
17117 + memcpy_fromio(to, map->map_priv_1 + from, len);
17118 +}
17119 +
17120 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
17121 +{
17122 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17123 + __raw_writeb(d, map->map_priv_1 + adr);
17124 + mb();
17125 +}
17126 +
17127 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
17128 +{
17129 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17130 + __raw_writew(d, map->map_priv_1 + adr);
17131 + mb();
17132 +}
17133 +
17134 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
17135 +{
17136 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17137 + __raw_writel(d, map->map_priv_1 + adr);
17138 + mb();
17139 +}
17140 +
17141 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
17142 +{
17143 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
17144 + memcpy_toio(map->map_priv_1 + to, from, len);
17145 +}
17146 +
17147 +
17148 +
17149 +static struct map_info xxs1500_map = {
17150 + name: "XXS1500 flash",
17151 + read8: physmap_read8,
17152 + read16: physmap_read16,
17153 + read32: physmap_read32,
17154 + copy_from: physmap_copy_from,
17155 + write8: physmap_write8,
17156 + write16: physmap_write16,
17157 + write32: physmap_write32,
17158 + copy_to: physmap_copy_to,
17159 +};
17160 +
17161 +
17162 +static unsigned long flash_size = 0x00800000;
17163 +static unsigned char flash_buswidth = 4;
17164 +static struct mtd_partition xxs1500_partitions[] = {
17165 + {
17166 + name: "kernel image",
17167 + size: 0x00200000,
17168 + offset: 0,
17169 + },{
17170 + name: "user fs 0",
17171 + size: (0x00C00000-0x200000),
17172 + offset: MTDPART_OFS_APPEND,
17173 + },{
17174 + name: "yamon",
17175 + size: 0x00100000,
17176 + offset: MTDPART_OFS_APPEND,
17177 + mask_flags: MTD_WRITEABLE
17178 + },{
17179 + name: "user fs 1",
17180 + size: 0x2c0000,
17181 + offset: MTDPART_OFS_APPEND,
17182 + },{
17183 + name: "yamon env vars",
17184 + size: 0x040000,
17185 + offset: MTDPART_OFS_APPEND,
17186 + mask_flags: MTD_WRITEABLE
17187 + }
17188 +};
17189 +
17190 +
17191 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
17192 +
17193 +static struct mtd_partition *parsed_parts;
17194 +static struct mtd_info *mymtd;
17195 +
17196 +int __init xxs1500_mtd_init(void)
17197 +{
17198 + struct mtd_partition *parts;
17199 + int nb_parts = 0;
17200 + char *part_type;
17201 +
17202 + /* Default flash buswidth */
17203 + xxs1500_map.buswidth = flash_buswidth;
17204 +
17205 + /*
17206 + * Static partition definition selection
17207 + */
17208 + part_type = "static";
17209 + parts = xxs1500_partitions;
17210 + nb_parts = NB_OF(xxs1500_partitions);
17211 + xxs1500_map.size = flash_size;
17212 +
17213 + /*
17214 + * Now let's probe for the actual flash. Do it here since
17215 + * specific machine settings might have been set above.
17216 + */
17217 + printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n",
17218 + xxs1500_map.buswidth*8);
17219 + xxs1500_map.map_priv_1 =
17220 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
17221 + mymtd = do_map_probe("cfi_probe", &xxs1500_map);
17222 + if (!mymtd) return -ENXIO;
17223 + mymtd->module = THIS_MODULE;
17224 +
17225 + add_mtd_partitions(mymtd, parts, nb_parts);
17226 + return 0;
17227 +}
17228 +
17229 +static void __exit xxs1500_mtd_cleanup(void)
17230 +{
17231 + if (mymtd) {
17232 + del_mtd_partitions(mymtd);
17233 + map_destroy(mymtd);
17234 + if (parsed_parts)
17235 + kfree(parsed_parts);
17236 + }
17237 +}
17238 +
17239 +module_init(xxs1500_mtd_init);
17240 +module_exit(xxs1500_mtd_cleanup);
17241 +
17242 +MODULE_AUTHOR("Pete Popov");
17243 +MODULE_DESCRIPTION("XXS1500 CFI map driver");
17244 +MODULE_LICENSE("GPL");
17245 diff -Nur linux-2.4.32-rc1/drivers/net/defxx.c linux-2.4.32-rc1.mips/drivers/net/defxx.c
17246 --- linux-2.4.32-rc1/drivers/net/defxx.c 2004-11-17 12:54:21.000000000 +0100
17247 +++ linux-2.4.32-rc1.mips/drivers/net/defxx.c 2004-11-19 01:28:39.000000000 +0100
17248 @@ -10,24 +10,18 @@
17249 *
17250 * Abstract:
17251 * A Linux device driver supporting the Digital Equipment Corporation
17252 - * FDDI EISA and PCI controller families. Supported adapters include:
17253 + * FDDI TURBOchannel, EISA and PCI controller families. Supported
17254 + * adapters include:
17255 *
17256 - * DEC FDDIcontroller/EISA (DEFEA)
17257 - * DEC FDDIcontroller/PCI (DEFPA)
17258 + * DEC FDDIcontroller/TURBOchannel (DEFTA)
17259 + * DEC FDDIcontroller/EISA (DEFEA)
17260 + * DEC FDDIcontroller/PCI (DEFPA)
17261 *
17262 - * Maintainers:
17263 - * LVS Lawrence V. Stefani
17264 - *
17265 - * Contact:
17266 - * The author may be reached at:
17267 + * The original author:
17268 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
17269 *
17270 - * Inet: stefani@lkg.dec.com
17271 - * (NOTE! this address no longer works -jgarzik)
17272 - *
17273 - * Mail: Digital Equipment Corporation
17274 - * 550 King Street
17275 - * M/S: LKG1-3/M07
17276 - * Littleton, MA 01460
17277 + * Maintainers:
17278 + * macro Maciej W. Rozycki <macro@linux-mips.org>
17279 *
17280 * Credits:
17281 * I'd like to thank Patricia Cross for helping me get started with
17282 @@ -197,16 +191,16 @@
17283 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
17284 * Feb 2001 Skb allocation fixes
17285 * Feb 2001 davej PCI enable cleanups.
17286 + * 04 Aug 2003 macro Converted to the DMA API.
17287 + * 14 Aug 2004 macro Fix device names reported.
17288 + * 26 Sep 2004 macro TURBOchannel support.
17289 */
17290
17291 /* Include files */
17292
17293 #include <linux/module.h>
17294 -
17295 #include <linux/kernel.h>
17296 -#include <linux/sched.h>
17297 #include <linux/string.h>
17298 -#include <linux/ptrace.h>
17299 #include <linux/errno.h>
17300 #include <linux/ioport.h>
17301 #include <linux/slab.h>
17302 @@ -215,19 +209,33 @@
17303 #include <linux/delay.h>
17304 #include <linux/init.h>
17305 #include <linux/netdevice.h>
17306 +#include <linux/fddidevice.h>
17307 +#include <linux/skbuff.h>
17308 +
17309 #include <asm/byteorder.h>
17310 #include <asm/bitops.h>
17311 #include <asm/io.h>
17312
17313 -#include <linux/fddidevice.h>
17314 -#include <linux/skbuff.h>
17315 +#ifdef CONFIG_TC
17316 +#include <asm/dec/tc.h>
17317 +#else
17318 +static int search_tc_card(const char *name) { return -ENODEV; }
17319 +static void claim_tc_card(int slot) { }
17320 +static void release_tc_card(int slot) { }
17321 +static unsigned long get_tc_base_addr(int slot) { return 0; }
17322 +static unsigned long get_tc_irq_nr(int slot) { return -1; }
17323 +#endif
17324
17325 #include "defxx.h"
17326
17327 -/* Version information string - should be updated prior to each new release!!! */
17328 +/* Version information string should be updated prior to each new release! */
17329 +#define DRV_NAME "defxx"
17330 +#define DRV_VERSION "v1.07T"
17331 +#define DRV_RELDATE "2004/09/26"
17332
17333 static char version[] __devinitdata =
17334 - "defxx.c:v1.05e 2001/02/03 Lawrence V. Stefani and others\n";
17335 + DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
17336 + " Lawrence V. Stefani and others\n";
17337
17338 #define DYNAMIC_BUFFERS 1
17339
17340 @@ -243,7 +251,7 @@
17341 static void dfx_bus_init(struct net_device *dev);
17342 static void dfx_bus_config_check(DFX_board_t *bp);
17343
17344 -static int dfx_driver_init(struct net_device *dev);
17345 +static int dfx_driver_init(struct net_device *dev, const char *print_name);
17346 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
17347
17348 static int dfx_open(struct net_device *dev);
17349 @@ -337,48 +345,84 @@
17350 int offset,
17351 u8 data
17352 )
17353 +{
17354 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17355 + {
17356 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17357
17358 + *addr = data;
17359 + mb();
17360 + }
17361 + else
17362 {
17363 u16 port = bp->base_addr + offset;
17364
17365 outb(data, port);
17366 }
17367 +}
17368
17369 static inline void dfx_port_read_byte(
17370 DFX_board_t *bp,
17371 int offset,
17372 u8 *data
17373 )
17374 +{
17375 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17376 + {
17377 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17378
17379 + mb();
17380 + *data = *addr;
17381 + }
17382 + else
17383 {
17384 u16 port = bp->base_addr + offset;
17385
17386 *data = inb(port);
17387 }
17388 +}
17389
17390 static inline void dfx_port_write_long(
17391 DFX_board_t *bp,
17392 int offset,
17393 u32 data
17394 )
17395 +{
17396 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17397 + {
17398 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17399
17400 + *addr = data;
17401 + mb();
17402 + }
17403 + else
17404 {
17405 u16 port = bp->base_addr + offset;
17406
17407 outl(data, port);
17408 }
17409 +}
17410
17411 static inline void dfx_port_read_long(
17412 DFX_board_t *bp,
17413 int offset,
17414 u32 *data
17415 )
17416 +{
17417 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17418 + {
17419 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17420
17421 + mb();
17422 + *data = *addr;
17423 + }
17424 + else
17425 {
17426 u16 port = bp->base_addr + offset;
17427
17428 *data = inl(port);
17429 }
17430 +}
17431
17432 \f
17433 /*
17434 @@ -393,8 +437,9 @@
17435 * Condition code
17436 *
17437 * Arguments:
17438 - * pdev - pointer to pci device information (NULL for EISA)
17439 - * ioaddr - pointer to port (NULL for PCI)
17440 + * pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
17441 + * bus_type - bus type (one of DFX_BUS_TYPE_*)
17442 + * handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
17443 *
17444 * Functional Description:
17445 *
17446 @@ -410,54 +455,68 @@
17447 * initialized and the board resources are read and stored in
17448 * the device structure.
17449 */
17450 -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
17451 +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
17452 {
17453 + static int version_disp;
17454 + char *print_name = DRV_NAME;
17455 struct net_device *dev;
17456 DFX_board_t *bp; /* board pointer */
17457 + long ioaddr; /* pointer to port */
17458 + unsigned long len; /* resource length */
17459 + int alloc_size; /* total buffer size used */
17460 int err;
17461
17462 -#ifndef MODULE
17463 - static int version_disp;
17464 -
17465 - if (!version_disp) /* display version info if adapter is found */
17466 - {
17467 + if (!version_disp) { /* display version info if adapter is found */
17468 version_disp = 1; /* set display flag to TRUE so that */
17469 printk(version); /* we only display this string ONCE */
17470 }
17471 -#endif
17472
17473 - /*
17474 - * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
17475 - * and calls fddi_setup() and register_netdev(). Not much left to do for us here.
17476 - */
17477 - dev = init_fddidev(NULL, sizeof(*bp));
17478 + if (pdev != NULL)
17479 + print_name = pdev->slot_name;
17480 +
17481 + dev = alloc_fddidev(sizeof(*bp));
17482 if (!dev) {
17483 - printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
17484 + printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
17485 + print_name);
17486 return -ENOMEM;
17487 }
17488
17489 /* Enable PCI device. */
17490 - if (pdev != NULL) {
17491 + if (bus_type == DFX_BUS_TYPE_PCI) {
17492 err = pci_enable_device (pdev);
17493 if (err) goto err_out;
17494 ioaddr = pci_resource_start (pdev, 1);
17495 }
17496
17497 SET_MODULE_OWNER(dev);
17498 + SET_NETDEV_DEV(dev, &pdev->dev);
17499
17500 bp = dev->priv;
17501
17502 - if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
17503 - printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
17504 - dev->name, PFI_K_CSR_IO_LEN, ioaddr);
17505 + if (bus_type == DFX_BUS_TYPE_TC) {
17506 + /* TURBOchannel board */
17507 + bp->slot = handle;
17508 + claim_tc_card(bp->slot);
17509 + ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
17510 + len = PI_TC_K_CSR_LEN;
17511 + } else if (bus_type == DFX_BUS_TYPE_EISA) {
17512 + /* EISA board */
17513 + ioaddr = handle;
17514 + len = PI_ESIC_K_CSR_IO_LEN;
17515 + } else
17516 + /* PCI board */
17517 + len = PFI_K_CSR_IO_LEN;
17518 + dev->base_addr = ioaddr; /* save port (I/O) base address */
17519 +
17520 + if (!request_region(ioaddr, len, print_name)) {
17521 + printk(KERN_ERR "%s: Cannot reserve I/O resource "
17522 + "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
17523 err = -EBUSY;
17524 goto err_out;
17525 }
17526
17527 /* Initialize new device structure */
17528
17529 - dev->base_addr = ioaddr; /* save port (I/O) base address */
17530 -
17531 dev->get_stats = dfx_ctl_get_stats;
17532 dev->open = dfx_open;
17533 dev->stop = dfx_close;
17534 @@ -465,37 +524,54 @@
17535 dev->set_multicast_list = dfx_ctl_set_multicast_list;
17536 dev->set_mac_address = dfx_ctl_set_mac_address;
17537
17538 - if (pdev == NULL) {
17539 - /* EISA board */
17540 - bp->bus_type = DFX_BUS_TYPE_EISA;
17541 + bp->bus_type = bus_type;
17542 + if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
17543 + /* TURBOchannel or EISA board */
17544 bp->next = root_dfx_eisa_dev;
17545 root_dfx_eisa_dev = dev;
17546 } else {
17547 /* PCI board */
17548 - bp->bus_type = DFX_BUS_TYPE_PCI;
17549 bp->pci_dev = pdev;
17550 pci_set_drvdata (pdev, dev);
17551 pci_set_master (pdev);
17552 }
17553
17554 - if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
17555 +
17556 + if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
17557 err = -ENODEV;
17558 goto err_out_region;
17559 }
17560
17561 + err = register_netdev(dev);
17562 + if (err)
17563 + goto err_out_kfree;
17564 +
17565 + printk("%s: registered as %s\n", print_name, dev->name);
17566 return 0;
17567
17568 +err_out_kfree:
17569 + alloc_size = sizeof(PI_DESCR_BLOCK) +
17570 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
17571 +#ifndef DYNAMIC_BUFFERS
17572 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
17573 +#endif
17574 + sizeof(PI_CONSUMER_BLOCK) +
17575 + (PI_ALIGN_K_DESC_BLK - 1);
17576 + if (bp->kmalloced)
17577 + pci_free_consistent(pdev, alloc_size,
17578 + bp->kmalloced, bp->kmalloced_dma);
17579 err_out_region:
17580 - release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
17581 + release_region(ioaddr, len);
17582 err_out:
17583 - unregister_netdev(dev);
17584 - kfree(dev);
17585 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17586 + release_tc_card(bp->slot);
17587 + free_netdev(dev);
17588 return err;
17589 }
17590
17591 static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
17592 {
17593 - return dfx_init_one_pci_or_eisa(pdev, 0);
17594 + return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
17595 }
17596
17597 static int __init dfx_eisa_init(void)
17598 @@ -507,6 +583,7 @@
17599
17600 DBG_printk("In dfx_eisa_init...\n");
17601
17602 +#ifdef CONFIG_EISA
17603 /* Scan for FDDI EISA controllers */
17604
17605 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
17606 @@ -517,9 +594,27 @@
17607 {
17608 port = (i << 12); /* recalc base addr */
17609
17610 - if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
17611 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
17612 }
17613 }
17614 +#endif
17615 + return rc;
17616 +}
17617 +
17618 +static int __init dfx_tc_init(void)
17619 +{
17620 + int rc = -ENODEV;
17621 + int slot; /* TC slot number */
17622 +
17623 + DBG_printk("In dfx_tc_init...\n");
17624 +
17625 + /* Scan for FDDI TC controllers */
17626 + while ((slot = search_tc_card("PMAF-F")) >= 0) {
17627 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
17628 + rc = 0;
17629 + else
17630 + break;
17631 + }
17632 return rc;
17633 }
17634 \f
17635 @@ -583,8 +678,9 @@
17636
17637 /* Initialize adapter based on bus type */
17638
17639 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17640 - {
17641 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
17642 + dev->irq = get_tc_irq_nr(bp->slot);
17643 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
17644 /* Get the interrupt level from the ESIC chip */
17645
17646 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
17647 @@ -766,6 +862,7 @@
17648 *
17649 * Arguments:
17650 * dev - pointer to device information
17651 + * print_name - printable device name
17652 *
17653 * Functional Description:
17654 * This function allocates additional resources such as the host memory
17655 @@ -780,20 +877,21 @@
17656 * or read adapter MAC address
17657 *
17658 * Assumptions:
17659 - * Memory allocated from kmalloc() call is physically contiguous, locked
17660 - * memory whose physical address equals its virtual address.
17661 + * Memory allocated from pci_alloc_consistent() call is physically
17662 + * contiguous, locked memory.
17663 *
17664 * Side Effects:
17665 * Adapter is reset and should be in DMA_UNAVAILABLE state before
17666 * returning from this routine.
17667 */
17668
17669 -static int __devinit dfx_driver_init(struct net_device *dev)
17670 +static int __devinit dfx_driver_init(struct net_device *dev,
17671 + const char *print_name)
17672 {
17673 DFX_board_t *bp = dev->priv;
17674 int alloc_size; /* total buffer size needed */
17675 char *top_v, *curr_v; /* virtual addrs into memory block */
17676 - u32 top_p, curr_p; /* physical addrs into memory block */
17677 + dma_addr_t top_p, curr_p; /* physical addrs into memory block */
17678 u32 data; /* host data register value */
17679
17680 DBG_printk("In dfx_driver_init...\n");
17681 @@ -837,26 +935,20 @@
17682
17683 /* Read the factory MAC address from the adapter then save it */
17684
17685 - if (dfx_hw_port_ctrl_req(bp,
17686 - PI_PCTRL_M_MLA,
17687 - PI_PDATA_A_MLA_K_LO,
17688 - 0,
17689 - &data) != DFX_K_SUCCESS)
17690 - {
17691 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17692 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
17693 + &data) != DFX_K_SUCCESS) {
17694 + printk("%s: Could not read adapter factory MAC address!\n",
17695 + print_name);
17696 return(DFX_K_FAILURE);
17697 - }
17698 + }
17699 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
17700
17701 - if (dfx_hw_port_ctrl_req(bp,
17702 - PI_PCTRL_M_MLA,
17703 - PI_PDATA_A_MLA_K_HI,
17704 - 0,
17705 - &data) != DFX_K_SUCCESS)
17706 - {
17707 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17708 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
17709 + &data) != DFX_K_SUCCESS) {
17710 + printk("%s: Could not read adapter factory MAC address!\n",
17711 + print_name);
17712 return(DFX_K_FAILURE);
17713 - }
17714 + }
17715 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
17716
17717 /*
17718 @@ -867,28 +959,27 @@
17719 */
17720
17721 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
17722 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17723 - printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17724 - dev->name,
17725 - dev->base_addr,
17726 - dev->irq,
17727 - dev->dev_addr[0],
17728 - dev->dev_addr[1],
17729 - dev->dev_addr[2],
17730 - dev->dev_addr[3],
17731 - dev->dev_addr[4],
17732 - dev->dev_addr[5]);
17733 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17734 + printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
17735 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17736 + print_name, dev->base_addr, dev->irq,
17737 + dev->dev_addr[0], dev->dev_addr[1],
17738 + dev->dev_addr[2], dev->dev_addr[3],
17739 + dev->dev_addr[4], dev->dev_addr[5]);
17740 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
17741 + printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
17742 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17743 + print_name, dev->base_addr, dev->irq,
17744 + dev->dev_addr[0], dev->dev_addr[1],
17745 + dev->dev_addr[2], dev->dev_addr[3],
17746 + dev->dev_addr[4], dev->dev_addr[5]);
17747 else
17748 - printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17749 - dev->name,
17750 - dev->base_addr,
17751 - dev->irq,
17752 - dev->dev_addr[0],
17753 - dev->dev_addr[1],
17754 - dev->dev_addr[2],
17755 - dev->dev_addr[3],
17756 - dev->dev_addr[4],
17757 - dev->dev_addr[5]);
17758 + printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
17759 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17760 + print_name, dev->base_addr, dev->irq,
17761 + dev->dev_addr[0], dev->dev_addr[1],
17762 + dev->dev_addr[2], dev->dev_addr[3],
17763 + dev->dev_addr[4], dev->dev_addr[5]);
17764
17765 /*
17766 * Get memory for descriptor block, consumer block, and other buffers
17767 @@ -903,14 +994,15 @@
17768 #endif
17769 sizeof(PI_CONSUMER_BLOCK) +
17770 (PI_ALIGN_K_DESC_BLK - 1);
17771 - bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
17772 - if (top_v == NULL)
17773 - {
17774 - printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
17775 + bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
17776 + &bp->kmalloced_dma);
17777 + if (top_v == NULL) {
17778 + printk("%s: Could not allocate memory for host buffers "
17779 + "and structures!\n", print_name);
17780 return(DFX_K_FAILURE);
17781 - }
17782 + }
17783 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
17784 - top_p = virt_to_bus(top_v); /* get physical address of buffer */
17785 + top_p = bp->kmalloced_dma; /* get physical address of buffer */
17786
17787 /*
17788 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
17789 @@ -924,7 +1016,7 @@
17790 * for allocating the needed memory.
17791 */
17792
17793 - curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
17794 + curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
17795 curr_v = top_v + (curr_p - top_p);
17796
17797 /* Reserve space for descriptor block */
17798 @@ -965,14 +1057,20 @@
17799
17800 /* Display virtual and physical addresses if debug driver */
17801
17802 - DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", dev->name, (long)bp->descr_block_virt, bp->descr_block_phys);
17803 - DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17804 - DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17805 - DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17806 - DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->cons_block_virt, bp->cons_block_phys);
17807 + DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
17808 + print_name,
17809 + (long)bp->descr_block_virt, bp->descr_block_phys);
17810 + DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
17811 + print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17812 + DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
17813 + print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17814 + DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
17815 + print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17816 + DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
17817 + print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
17818
17819 return(DFX_K_SUCCESS);
17820 - }
17821 +}
17822
17823 \f
17824 /*
17825 @@ -1218,7 +1316,9 @@
17826
17827 /* Register IRQ - support shared interrupts by passing device ptr */
17828
17829 - ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
17830 + ret = request_irq(dev->irq, (void *)dfx_interrupt,
17831 + (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
17832 + dev->name, dev);
17833 if (ret) {
17834 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
17835 return ret;
17836 @@ -1737,7 +1837,7 @@
17837 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
17838 (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
17839 }
17840 - else
17841 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
17842 {
17843 /* Disable interrupts at the ESIC */
17844
17845 @@ -1755,6 +1855,13 @@
17846 tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
17847 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
17848 }
17849 + else {
17850 + /* TC doesn't share interrupts so no need to disable them */
17851 +
17852 + /* Call interrupt service routine for this adapter */
17853 +
17854 + dfx_int_common(dev);
17855 + }
17856
17857 spin_unlock(&bp->lock);
17858 }
17859 @@ -2663,12 +2770,12 @@
17860
17861 static void my_skb_align(struct sk_buff *skb, int n)
17862 {
17863 - u32 x=(u32)skb->data; /* We only want the low bits .. */
17864 - u32 v;
17865 + unsigned long x = (unsigned long)skb->data;
17866 + unsigned long v;
17867
17868 - v=(x+n-1)&~(n-1); /* Where we want to be */
17869 + v = ALIGN(x, n); /* Where we want to be */
17870
17871 - skb_reserve(skb, v-x);
17872 + skb_reserve(skb, v - x);
17873 }
17874
17875 \f
17876 @@ -2745,7 +2852,10 @@
17877 */
17878
17879 my_skb_align(newskb, 128);
17880 - bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
17881 + bp->descr_block_virt->rcv_data[i + j].long_1 =
17882 + (u32)pci_map_single(bp->pci_dev, newskb->data,
17883 + NEW_SKB_SIZE,
17884 + PCI_DMA_FROMDEVICE);
17885 /*
17886 * p_rcv_buff_va is only used inside the
17887 * kernel so we put the skb pointer here.
17888 @@ -2859,9 +2969,17 @@
17889
17890 my_skb_align(newskb, 128);
17891 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
17892 + pci_unmap_single(bp->pci_dev,
17893 + bp->descr_block_virt->rcv_data[entry].long_1,
17894 + NEW_SKB_SIZE,
17895 + PCI_DMA_FROMDEVICE);
17896 skb_reserve(skb, RCV_BUFF_K_PADDING);
17897 bp->p_rcv_buff_va[entry] = (char *)newskb;
17898 - bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
17899 + bp->descr_block_virt->rcv_data[entry].long_1 =
17900 + (u32)pci_map_single(bp->pci_dev,
17901 + newskb->data,
17902 + NEW_SKB_SIZE,
17903 + PCI_DMA_FROMDEVICE);
17904 } else
17905 skb = NULL;
17906 } else
17907 @@ -2934,7 +3052,7 @@
17908 * is contained in a single physically contiguous buffer
17909 * in which the virtual address of the start of packet
17910 * (skb->data) can be converted to a physical address
17911 - * by using virt_to_bus().
17912 + * by using pci_map_single().
17913 *
17914 * Since the adapter architecture requires a three byte
17915 * packet request header to prepend the start of packet,
17916 @@ -3082,12 +3200,13 @@
17917 * skb->data.
17918 * 6. The physical address of the start of packet
17919 * can be determined from the virtual address
17920 - * by using virt_to_bus() and is only 32-bits
17921 + * by using pci_map_single() and is only 32-bits
17922 * wide.
17923 */
17924
17925 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
17926 - p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
17927 + p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
17928 + skb->len, PCI_DMA_TODEVICE);
17929
17930 /*
17931 * Verify that descriptor is actually available
17932 @@ -3171,6 +3290,7 @@
17933 {
17934 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
17935 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
17936 + u8 comp; /* local transmit completion index */
17937 int freed = 0; /* buffers freed */
17938
17939 /* Service all consumed transmit frames */
17940 @@ -3188,7 +3308,11 @@
17941 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
17942
17943 /* Return skb to operating system */
17944 -
17945 + comp = bp->rcv_xmt_reg.index.xmt_comp;
17946 + pci_unmap_single(bp->pci_dev,
17947 + bp->descr_block_virt->xmt_data[comp].long_1,
17948 + p_xmt_drv_descr->p_skb->len,
17949 + PCI_DMA_TODEVICE);
17950 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
17951
17952 /*
17953 @@ -3297,6 +3421,7 @@
17954 {
17955 u32 prod_cons; /* rcv/xmt consumer block longword */
17956 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
17957 + u8 comp; /* local transmit completion index */
17958
17959 /* Flush all outstanding transmit frames */
17960
17961 @@ -3307,7 +3432,11 @@
17962 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
17963
17964 /* Return skb to operating system */
17965 -
17966 + comp = bp->rcv_xmt_reg.index.xmt_comp;
17967 + pci_unmap_single(bp->pci_dev,
17968 + bp->descr_block_virt->xmt_data[comp].long_1,
17969 + p_xmt_drv_descr->p_skb->len,
17970 + PCI_DMA_TODEVICE);
17971 dev_kfree_skb(p_xmt_drv_descr->p_skb);
17972
17973 /* Increment transmit error counter */
17974 @@ -3337,12 +3466,36 @@
17975
17976 static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
17977 {
17978 - DFX_board_t *bp = dev->priv;
17979 + DFX_board_t *bp = dev->priv;
17980 + unsigned long len; /* resource length */
17981 + int alloc_size; /* total buffer size used */
17982
17983 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
17984 + /* TURBOchannel board */
17985 + len = PI_TC_K_CSR_LEN;
17986 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
17987 + /* EISA board */
17988 + len = PI_ESIC_K_CSR_IO_LEN;
17989 + } else {
17990 + len = PFI_K_CSR_IO_LEN;
17991 + }
17992 unregister_netdev(dev);
17993 - release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
17994 - if (bp->kmalloced) kfree(bp->kmalloced);
17995 - kfree(dev);
17996 + release_region(dev->base_addr, len);
17997 +
17998 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17999 + release_tc_card(bp->slot);
18000 +
18001 + alloc_size = sizeof(PI_DESCR_BLOCK) +
18002 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
18003 +#ifndef DYNAMIC_BUFFERS
18004 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
18005 +#endif
18006 + sizeof(PI_CONSUMER_BLOCK) +
18007 + (PI_ALIGN_K_DESC_BLK - 1);
18008 + if (bp->kmalloced)
18009 + pci_free_consistent(pdev, alloc_size, bp->kmalloced,
18010 + bp->kmalloced_dma);
18011 + free_netdev(dev);
18012 }
18013
18014 static void __devexit dfx_remove_one (struct pci_dev *pdev)
18015 @@ -3353,21 +3506,22 @@
18016 pci_set_drvdata(pdev, NULL);
18017 }
18018
18019 -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
18020 +static struct pci_device_id dfx_pci_tbl[] = {
18021 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
18022 { 0, }
18023 };
18024 MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
18025
18026 static struct pci_driver dfx_driver = {
18027 - name: "defxx",
18028 - probe: dfx_init_one,
18029 - remove: __devexit_p(dfx_remove_one),
18030 - id_table: dfx_pci_tbl,
18031 + .name = "defxx",
18032 + .probe = dfx_init_one,
18033 + .remove = __devexit_p(dfx_remove_one),
18034 + .id_table = dfx_pci_tbl,
18035 };
18036
18037 static int dfx_have_pci;
18038 static int dfx_have_eisa;
18039 +static int dfx_have_tc;
18040
18041
18042 static void __exit dfx_eisa_cleanup(void)
18043 @@ -3388,12 +3542,7 @@
18044
18045 static int __init dfx_init(void)
18046 {
18047 - int rc_pci, rc_eisa;
18048 -
18049 -/* when a module, this is printed whether or not devices are found in probe */
18050 -#ifdef MODULE
18051 - printk(version);
18052 -#endif
18053 + int rc_pci, rc_eisa, rc_tc;
18054
18055 rc_pci = pci_module_init(&dfx_driver);
18056 if (rc_pci >= 0) dfx_have_pci = 1;
18057 @@ -3401,20 +3550,27 @@
18058 rc_eisa = dfx_eisa_init();
18059 if (rc_eisa >= 0) dfx_have_eisa = 1;
18060
18061 - return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci);
18062 + rc_tc = dfx_tc_init();
18063 + if (rc_tc >= 0) dfx_have_tc = 1;
18064 +
18065 + return ((rc_tc < 0) ? 0 : rc_tc) +
18066 + ((rc_eisa < 0) ? 0 : rc_eisa) +
18067 + ((rc_pci < 0) ? 0 : rc_pci);
18068 }
18069
18070 static void __exit dfx_cleanup(void)
18071 {
18072 if (dfx_have_pci)
18073 pci_unregister_driver(&dfx_driver);
18074 - if (dfx_have_eisa)
18075 + if (dfx_have_eisa || dfx_have_tc)
18076 dfx_eisa_cleanup();
18077 -
18078 }
18079
18080 module_init(dfx_init);
18081 module_exit(dfx_cleanup);
18082 +MODULE_AUTHOR("Lawrence V. Stefani");
18083 +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
18084 + DRV_VERSION " " DRV_RELDATE);
18085 MODULE_LICENSE("GPL");
18086
18087 \f
18088 diff -Nur linux-2.4.32-rc1/drivers/net/defxx.h linux-2.4.32-rc1.mips/drivers/net/defxx.h
18089 --- linux-2.4.32-rc1/drivers/net/defxx.h 2001-02-13 22:15:05.000000000 +0100
18090 +++ linux-2.4.32-rc1.mips/drivers/net/defxx.h 2004-10-03 20:06:48.000000000 +0200
18091 @@ -12,17 +12,11 @@
18092 * Contains all definitions specified by port specification and required
18093 * by the defxx.c driver.
18094 *
18095 - * Maintainers:
18096 - * LVS Lawrence V. Stefani
18097 - *
18098 - * Contact:
18099 - * The author may be reached at:
18100 + * The original author:
18101 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
18102 *
18103 - * Inet: stefani@lkg.dec.com
18104 - * Mail: Digital Equipment Corporation
18105 - * 550 King Street
18106 - * M/S: LKG1-3/M07
18107 - * Littleton, MA 01460
18108 + * Maintainers:
18109 + * macro Maciej W. Rozycki <macro@linux-mips.org>
18110 *
18111 * Modification History:
18112 * Date Name Description
18113 @@ -30,6 +24,7 @@
18114 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
18115 * macros to DEFXX.C.
18116 * 12-Sep-96 LVS Removed packet request header pointers.
18117 + * 04 Aug 2003 macro Converted to the DMA API.
18118 */
18119
18120 #ifndef _DEFXX_H_
18121 @@ -1467,6 +1462,11 @@
18122
18123 #endif /* #ifndef BIG_ENDIAN */
18124
18125 +/* Define TC PDQ CSR offset and length */
18126 +
18127 +#define PI_TC_K_CSR_OFFSET 0x100000
18128 +#define PI_TC_K_CSR_LEN 0x80 /* 128 bytes */
18129 +
18130 /* Define EISA controller register offsets */
18131
18132 #define PI_ESIC_K_BURST_HOLDOFF 0x040
18133 @@ -1634,6 +1634,7 @@
18134
18135 #define DFX_BUS_TYPE_PCI 0 /* type code for DEC FDDIcontroller/PCI */
18136 #define DFX_BUS_TYPE_EISA 1 /* type code for DEC FDDIcontroller/EISA */
18137 +#define DFX_BUS_TYPE_TC 2 /* type code for DEC FDDIcontroller/TURBOchannel */
18138
18139 #define DFX_FC_PRH2_PRH1_PRH0 0x54003820 /* Packet Request Header bytes + FC */
18140 #define DFX_PRH0_BYTE 0x20 /* Packet Request Header byte 0 */
18141 @@ -1704,17 +1705,19 @@
18142 {
18143 /* Keep virtual and physical pointers to locked, physically contiguous memory */
18144
18145 - char *kmalloced; /* kfree this on unload */
18146 + char *kmalloced; /* pci_free_consistent this on unload */
18147 + dma_addr_t kmalloced_dma;
18148 + /* DMA handle for the above */
18149 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
18150 - u32 descr_block_phys; /* PDQ descriptor block phys address */
18151 + dma_addr_t descr_block_phys; /* PDQ descriptor block phys address */
18152 PI_DMA_CMD_REQ *cmd_req_virt; /* Command request buffer virt address */
18153 - u32 cmd_req_phys; /* Command request buffer phys address */
18154 + dma_addr_t cmd_req_phys; /* Command request buffer phys address */
18155 PI_DMA_CMD_RSP *cmd_rsp_virt; /* Command response buffer virt address */
18156 - u32 cmd_rsp_phys; /* Command response buffer phys address */
18157 + dma_addr_t cmd_rsp_phys; /* Command response buffer phys address */
18158 char *rcv_block_virt; /* LLC host receive queue buf blk virt */
18159 - u32 rcv_block_phys; /* LLC host receive queue buf blk phys */
18160 + dma_addr_t rcv_block_phys; /* LLC host receive queue buf blk phys */
18161 PI_CONSUMER_BLOCK *cons_block_virt; /* PDQ consumer block virt address */
18162 - u32 cons_block_phys; /* PDQ consumer block phys address */
18163 + dma_addr_t cons_block_phys; /* PDQ consumer block phys address */
18164
18165 /* Keep local copies of Type 1 and Type 2 register data */
18166
18167 @@ -1758,8 +1761,9 @@
18168
18169 struct net_device *dev; /* pointer to device structure */
18170 struct net_device *next;
18171 - u32 bus_type; /* bus type (0 == PCI, 1 == EISA) */
18172 - u16 base_addr; /* base I/O address (same as dev->base_addr) */
18173 + u32 bus_type; /* bus type (0 == PCI, 1 == EISA, 2 == TC) */
18174 + long base_addr; /* base I/O address (same as dev->base_addr) */
18175 + int slot; /* TC slot number */
18176 struct pci_dev * pci_dev;
18177 u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
18178 u32 req_ttrt; /* requested TTRT value (in 80ns units) */
18179 diff -Nur linux-2.4.32-rc1/drivers/net/hamradio/hdlcdrv.c linux-2.4.32-rc1.mips/drivers/net/hamradio/hdlcdrv.c
18180 --- linux-2.4.32-rc1/drivers/net/hamradio/hdlcdrv.c 2002-02-25 20:37:59.000000000 +0100
18181 +++ linux-2.4.32-rc1.mips/drivers/net/hamradio/hdlcdrv.c 2004-05-04 14:04:27.000000000 +0200
18182 @@ -587,6 +587,8 @@
18183 return -EINVAL;
18184 s = (struct hdlcdrv_state *)dev->priv;
18185
18186 + netif_stop_queue(dev);
18187 +
18188 if (s->ops && s->ops->close)
18189 i = s->ops->close(dev);
18190 if (s->skb)
18191 diff -Nur linux-2.4.32-rc1/drivers/net/irda/au1k_ir.c linux-2.4.32-rc1.mips/drivers/net/irda/au1k_ir.c
18192 --- linux-2.4.32-rc1/drivers/net/irda/au1k_ir.c 2004-02-18 14:36:31.000000000 +0100
18193 +++ linux-2.4.32-rc1.mips/drivers/net/irda/au1k_ir.c 2005-02-03 07:35:29.000000000 +0100
18194 @@ -81,10 +81,6 @@
18195
18196 #define RUN_AT(x) (jiffies + (x))
18197
18198 -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
18199 -static BCSR * const bcsr = (BCSR *)0xAE000000;
18200 -#endif
18201 -
18202 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
18203
18204 /*
18205 diff -Nur linux-2.4.32-rc1/drivers/net/sgiseeq.c linux-2.4.32-rc1.mips/drivers/net/sgiseeq.c
18206 --- linux-2.4.32-rc1/drivers/net/sgiseeq.c 2005-01-19 15:09:56.000000000 +0100
18207 +++ linux-2.4.32-rc1.mips/drivers/net/sgiseeq.c 2005-09-23 16:35:27.000000000 +0200
18208 @@ -24,16 +24,16 @@
18209 #include <asm/io.h>
18210 #include <asm/system.h>
18211 #include <asm/bitops.h>
18212 +#include <asm/paccess.h>
18213 #include <asm/page.h>
18214 #include <asm/pgtable.h>
18215 +#include <asm/sgi/mc.h>
18216 #include <asm/sgi/hpc3.h>
18217 #include <asm/sgi/ip22.h>
18218 #include <asm/sgialib.h>
18219
18220 #include "sgiseeq.h"
18221
18222 -static char *version = "sgiseeq.c: David S. Miller (dm@engr.sgi.com)\n";
18223 -
18224 static char *sgiseeqstr = "SGI Seeq8003";
18225
18226 /*
18227 @@ -113,9 +113,9 @@
18228
18229 static inline void hpc3_eth_reset(struct hpc3_ethregs *hregs)
18230 {
18231 - hregs->rx_reset = HPC3_ERXRST_CRESET | HPC3_ERXRST_CLRIRQ;
18232 + hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ;
18233 udelay(20);
18234 - hregs->rx_reset = 0;
18235 + hregs->reset = 0;
18236 }
18237
18238 static inline void reset_hpc3_and_seeq(struct hpc3_ethregs *hregs,
18239 @@ -238,7 +238,6 @@
18240
18241 #define TSTAT_INIT_SEEQ (SEEQ_TCMD_IPT|SEEQ_TCMD_I16|SEEQ_TCMD_IC|SEEQ_TCMD_IUF)
18242 #define TSTAT_INIT_EDLC ((TSTAT_INIT_SEEQ) | SEEQ_TCMD_RB2)
18243 -#define RDMACFG_INIT (HPC3_ERXDCFG_FRXDC | HPC3_ERXDCFG_FEOP | HPC3_ERXDCFG_FIRQ)
18244
18245 static int init_seeq(struct net_device *dev, struct sgiseeq_private *sp,
18246 struct sgiseeq_regs *sregs)
18247 @@ -260,8 +259,6 @@
18248 sregs->tstat = TSTAT_INIT_SEEQ;
18249 }
18250
18251 - hregs->rx_dconfig |= RDMACFG_INIT;
18252 -
18253 hregs->rx_ndptr = PHYSADDR(&sp->srings.rx_desc[0]);
18254 hregs->tx_ndptr = PHYSADDR(&sp->srings.tx_desc[0]);
18255
18256 @@ -432,7 +429,7 @@
18257 spin_lock(&sp->tx_lock);
18258
18259 /* Ack the IRQ and set software state. */
18260 - hregs->rx_reset = HPC3_ERXRST_CLRIRQ;
18261 + hregs->reset = HPC3_ERST_CLRIRQ;
18262
18263 /* Always check for received packets. */
18264 sgiseeq_rx(dev, sp, hregs, sregs);
18265 @@ -616,7 +613,7 @@
18266
18267 #define ALIGNED(x) ((((unsigned long)(x)) + 0xf) & ~(0xf))
18268
18269 -int sgiseeq_init(struct hpc3_regs* regs, int irq)
18270 +int sgiseeq_init(struct hpc3_regs* hpcregs, int irq, int has_eeprom)
18271 {
18272 struct net_device *dev;
18273 struct sgiseeq_private *sp;
18274 @@ -629,7 +626,7 @@
18275 goto err_out;
18276 }
18277 /* Make private data page aligned */
18278 - sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL);
18279 + sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL);
18280 if (!sp) {
18281 printk(KERN_ERR "Sgiseeq: Page alloc failed, aborting.\n");
18282 err = -ENOMEM;
18283 @@ -644,7 +641,9 @@
18284
18285 #define EADDR_NVOFS 250
18286 for (i = 0; i < 3; i++) {
18287 - unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
18288 + unsigned short tmp = has_eeprom ?
18289 + ip22_eeprom_read(&hpcregs->eeprom, EADDR_NVOFS / 2+i) :
18290 + ip22_nvram_read(EADDR_NVOFS / 2+i);
18291
18292 dev->dev_addr[2 * i] = tmp >> 8;
18293 dev->dev_addr[2 * i + 1] = tmp & 0xff;
18294 @@ -654,8 +653,8 @@
18295 gpriv = sp;
18296 gdev = dev;
18297 #endif
18298 - sp->sregs = (struct sgiseeq_regs *) &hpc3c0->eth_ext[0];
18299 - sp->hregs = &hpc3c0->ethregs;
18300 + sp->sregs = (struct sgiseeq_regs *) &hpcregs->eth_ext[0];
18301 + sp->hregs = &hpcregs->ethregs;
18302 sp->name = sgiseeqstr;
18303 sp->mode = SEEQ_RCMD_RBCAST;
18304
18305 @@ -672,6 +671,11 @@
18306 setup_rx_ring(sp->srings.rx_desc, SEEQ_RX_BUFFERS);
18307 setup_tx_ring(sp->srings.tx_desc, SEEQ_TX_BUFFERS);
18308
18309 + /* Setup PIO and DMA transfer timing */
18310 + sp->hregs->pconfig = 0x161;
18311 + sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
18312 + HPC3_EDCFG_FRXDC | HPC3_EDCFG_PTO | 0x026;
18313 +
18314 /* Reset the chip. */
18315 hpc3_eth_reset(sp->hregs);
18316
18317 @@ -699,7 +703,7 @@
18318 goto err_out_free_irq;
18319 }
18320
18321 - printk(KERN_INFO "%s: SGI Seeq8003 ", dev->name);
18322 + printk(KERN_INFO "%s: %s ", dev->name, sgiseeqstr);
18323 for (i = 0; i < 6; i++)
18324 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? '\n' : ':');
18325
18326 @@ -721,10 +725,22 @@
18327
18328 static int __init sgiseeq_probe(void)
18329 {
18330 - printk(version);
18331 + unsigned int tmp, ret1, ret2 = 0;
18332
18333 /* On board adapter on 1st HPC is always present */
18334 - return sgiseeq_init(hpc3c0, SGI_ENET_IRQ);
18335 + ret1 = sgiseeq_init(hpc3c0, SGI_ENET_IRQ, 0);
18336 + /* Let's see if second HPC is there */
18337 + if (!(ip22_is_fullhouse()) &&
18338 + get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]) == 0) {
18339 + sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 |
18340 + SGIMC_GIOPAR_EXP164 |
18341 + SGIMC_GIOPAR_HPC264;
18342 + hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
18343 + /* interrupt/config register on Challenge S Mezz board */
18344 + hpc3c1->pbus_extregs[0][0] = 0x30;
18345 + ret2 = sgiseeq_init(hpc3c1, SGI_GIO_0_IRQ, 1);
18346 + }
18347 + return (ret1 & ret2) ? ret1 : 0;
18348 }
18349
18350 static void __exit sgiseeq_exit(void)
18351 @@ -747,4 +763,6 @@
18352 module_init(sgiseeq_probe);
18353 module_exit(sgiseeq_exit);
18354
18355 +MODULE_DESCRIPTION("SGI Seeq 8003 driver");
18356 +MODULE_AUTHOR("David S. Miller");
18357 MODULE_LICENSE("GPL");
18358 diff -Nur linux-2.4.32-rc1/drivers/pci/pci.c linux-2.4.32-rc1.mips/drivers/pci/pci.c
18359 --- linux-2.4.32-rc1/drivers/pci/pci.c 2004-11-17 12:54:21.000000000 +0100
18360 +++ linux-2.4.32-rc1.mips/drivers/pci/pci.c 2004-11-19 01:28:41.000000000 +0100
18361 @@ -1281,11 +1281,17 @@
18362 {
18363 unsigned int buses;
18364 unsigned short cr;
18365 + unsigned short bctl;
18366 struct pci_bus *child;
18367 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
18368
18369 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
18370 DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
18371 + /* Disable MasterAbortMode during probing to avoid reporting
18372 + of bus errors (in some architectures) */
18373 + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
18374 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
18375 + bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
18376 if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
18377 /*
18378 * Bus already configured by firmware, process it in the first
18379 @@ -1351,6 +1357,7 @@
18380 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
18381 pci_write_config_word(dev, PCI_COMMAND, cr);
18382 }
18383 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
18384 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
18385 return max;
18386 }
18387 diff -Nur linux-2.4.32-rc1/drivers/pcmcia/au1000_db1x00.c linux-2.4.32-rc1.mips/drivers/pcmcia/au1000_db1x00.c
18388 --- linux-2.4.32-rc1/drivers/pcmcia/au1000_db1x00.c 2005-01-19 15:09:57.000000000 +0100
18389 +++ linux-2.4.32-rc1.mips/drivers/pcmcia/au1000_db1x00.c 2005-02-03 07:35:30.000000000 +0100
18390 @@ -1,6 +1,6 @@
18391 /*
18392 *
18393 - * Alchemy Semi Db1x00 boards specific pcmcia routines.
18394 + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
18395 *
18396 * Copyright 2002 MontaVista Software Inc.
18397 * Author: MontaVista Software, Inc.
18398 @@ -54,9 +54,20 @@
18399 #include <asm/au1000.h>
18400 #include <asm/au1000_pcmcia.h>
18401
18402 +#if defined(CONFIG_MIPS_PB1200)
18403 +#include <asm/pb1200.h>
18404 +#elif defined(CONFIG_MIPS_DB1200)
18405 +#include <asm/db1200.h>
18406 +#else
18407 #include <asm/db1x00.h>
18408 +#endif
18409
18410 -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
18411 +#define PCMCIA_MAX_SOCK 1
18412 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
18413 +
18414 +/* VPP/VCC */
18415 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
18416 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
18417
18418 static int db1x00_pcmcia_init(struct pcmcia_init *init)
18419 {
18420 @@ -76,7 +87,7 @@
18421 db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
18422 {
18423 u32 inserted;
18424 - unsigned char vs;
18425 + u16 vs;
18426
18427 if(sock > PCMCIA_MAX_SOCK) return -1;
18428
18429 @@ -87,11 +98,11 @@
18430
18431 if (sock == 0) {
18432 vs = bcsr->status & 0x3;
18433 - inserted = !(bcsr->status & (1<<4));
18434 + inserted = BOARD_CARD_INSERTED(0);
18435 }
18436 else {
18437 vs = (bcsr->status & 0xC)>>2;
18438 - inserted = !(bcsr->status & (1<<5));
18439 + inserted = BOARD_CARD_INSERTED(1);
18440 }
18441
18442 DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n",
18443 @@ -144,16 +155,9 @@
18444 if(info->sock > PCMCIA_MAX_SOCK) return -1;
18445
18446 if(info->sock == 0)
18447 -#ifdef CONFIG_MIPS_DB1550
18448 - info->irq = AU1000_GPIO_3;
18449 + info->irq = BOARD_PC0_INT;
18450 else
18451 - info->irq = AU1000_GPIO_5;
18452 -#else
18453 - info->irq = AU1000_GPIO_2;
18454 - else
18455 - info->irq = AU1000_GPIO_5;
18456 -#endif
18457 -
18458 + info->irq = BOARD_PC1_INT;
18459 return 0;
18460 }
18461
18462 diff -Nur linux-2.4.32-rc1/drivers/pcmcia/Config.in linux-2.4.32-rc1.mips/drivers/pcmcia/Config.in
18463 --- linux-2.4.32-rc1/drivers/pcmcia/Config.in 2004-02-18 14:36:31.000000000 +0100
18464 +++ linux-2.4.32-rc1.mips/drivers/pcmcia/Config.in 2004-02-22 06:21:34.000000000 +0100
18465 @@ -30,16 +30,14 @@
18466 dep_tristate ' M8xx support' CONFIG_PCMCIA_M8XX $CONFIG_PCMCIA
18467 fi
18468 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
18469 - dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
18470 - if [ "$CONFIG_PCMCIA_AU1X00" != "n" ]; then
18471 - bool ' Pb1x00 board support' CONFIG_PCMCIA_PB1X00
18472 - bool ' Db1x00 board support' CONFIG_PCMCIA_DB1X00
18473 - bool ' XXS1500 board support' CONFIG_PCMCIA_XXS1500
18474 - fi
18475 + dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
18476 fi
18477 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
18478 dep_bool ' SiByte PCMCIA support' CONFIG_PCMCIA_SIBYTE $CONFIG_PCMCIA $CONFIG_BLK_DEV_IDE_SIBYTE
18479 fi
18480 + if [ "$CONFIG_VRC4171" = "y" -o "$CONFIG_VRC4171" = "m" ]; then
18481 + dep_tristate ' NEC VRC4171 Card Controllers support' CONFIG_PCMCIA_VRC4171 $CONFIG_PCMCIA
18482 + fi
18483 if [ "$CONFIG_VRC4173" = "y" -o "$CONFIG_VRC4173" = "m" ]; then
18484 dep_tristate ' NEC VRC4173 CARDU support' CONFIG_PCMCIA_VRC4173 $CONFIG_PCMCIA
18485 fi
18486 diff -Nur linux-2.4.32-rc1/drivers/pcmcia/Makefile linux-2.4.32-rc1.mips/drivers/pcmcia/Makefile
18487 --- linux-2.4.32-rc1/drivers/pcmcia/Makefile 2004-02-18 14:36:31.000000000 +0100
18488 +++ linux-2.4.32-rc1.mips/drivers/pcmcia/Makefile 2005-02-03 07:35:30.000000000 +0100
18489 @@ -61,9 +61,18 @@
18490
18491 obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o
18492 au1000_ss-objs-y := au1000_generic.o
18493 -au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00) += au1000_pb1x00.o
18494 -au1000_ss-objs-$(CONFIG_PCMCIA_DB1X00) += au1000_db1x00.o
18495 -au1000_ss-objs-$(CONFIG_PCMCIA_XXS1500) += au1000_xxs1500.o
18496 +au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
18497 +au1000_ss-objs-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
18498 +au1000_ss-objs-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
18499 +au1000_ss-objs-$(CONFIG_MIPS_PB1550) += au1000_pb1550.o
18500 +au1000_ss-objs-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
18501 +au1000_ss-objs-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
18502 +au1000_ss-objs-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
18503 +au1000_ss-objs-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
18504 +au1000_ss-objs-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
18505 +au1000_ss-objs-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
18506 +au1000_ss-objs-$(CONFIG_MIPS_HYDROGEN3) += au1000_hydrogen3.o
18507 +au1000_ss-objs-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
18508
18509 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
18510 obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
18511 @@ -89,6 +98,7 @@
18512 sa1100_cs-objs-$(CONFIG_SA1100_XP860) += sa1100_xp860.o sa1111_generic.o
18513 sa1100_cs-objs-$(CONFIG_SA1100_YOPY) += sa1100_yopy.o
18514
18515 +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o
18516 obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
18517
18518 include $(TOPDIR)/Rules.make
18519 diff -Nur linux-2.4.32-rc1/drivers/pcmcia/vrc4171_card.c linux-2.4.32-rc1.mips/drivers/pcmcia/vrc4171_card.c
18520 --- linux-2.4.32-rc1/drivers/pcmcia/vrc4171_card.c 1970-01-01 01:00:00.000000000 +0100
18521 +++ linux-2.4.32-rc1.mips/drivers/pcmcia/vrc4171_card.c 2004-01-19 16:54:58.000000000 +0100
18522 @@ -0,0 +1,886 @@
18523 +/*
18524 + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
18525 + *
18526 + * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
18527 + *
18528 + * This program is free software; you can redistribute it and/or modify
18529 + * it under the terms of the GNU General Public License as published by
18530 + * the Free Software Foundation; either version 2 of the License, or
18531 + * (at your option) any later version.
18532 + *
18533 + * This program is distributed in the hope that it will be useful,
18534 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
18535 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18536 + * GNU General Public License for more details.
18537 + *
18538 + * You should have received a copy of the GNU General Public License
18539 + * along with this program; if not, write to the Free Software
18540 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18541 + */
18542 +#include <linux/init.h>
18543 +#include <linux/ioport.h>
18544 +#include <linux/irq.h>
18545 +#include <linux/module.h>
18546 +#include <linux/spinlock.h>
18547 +#include <linux/sched.h>
18548 +#include <linux/types.h>
18549 +
18550 +#include <asm/io.h>
18551 +#include <asm/vr41xx/vrc4171.h>
18552 +
18553 +#include <pcmcia/ss.h>
18554 +
18555 +#include "i82365.h"
18556 +
18557 +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
18558 +MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
18559 +MODULE_LICENSE("GPL");
18560 +
18561 +#define CARD_MAX_SLOTS 2
18562 +#define CARD_SLOTA 0
18563 +#define CARD_SLOTB 1
18564 +#define CARD_SLOTB_OFFSET 0x40
18565 +
18566 +#define CARD_MEM_START 0x10000000
18567 +#define CARD_MEM_END 0x13ffffff
18568 +#define CARD_MAX_MEM_OFFSET 0x3ffffff
18569 +#define CARD_MAX_MEM_SPEED 1000
18570 +
18571 +#define CARD_CONTROLLER_INDEX 0x03e0
18572 +#define CARD_CONTROLLER_DATA 0x03e1
18573 +#define CARD_CONTROLLER_SIZE 2
18574 + /* Power register */
18575 + #define VPP_GET_VCC 0x01
18576 + #define POWER_ENABLE 0x10
18577 + #define CARD_VOLTAGE_SENSE 0x1f
18578 + #define VCC_3VORXV_CAPABLE 0x00
18579 + #define VCC_XV_ONLY 0x01
18580 + #define VCC_3V_CAPABLE 0x02
18581 + #define VCC_5V_ONLY 0x03
18582 + #define CARD_VOLTAGE_SELECT 0x2f
18583 + #define VCC_3V 0x01
18584 + #define VCC_5V 0x00
18585 + #define VCC_XV 0x02
18586 + #define VCC_STATUS_3V 0x02
18587 + #define VCC_STATUS_5V 0x01
18588 + #define VCC_STATUS_XV 0x03
18589 + #define GLOBAL_CONTROL 0x1e
18590 + #define EXWRBK 0x04
18591 + #define IRQPM_EN 0x08
18592 + #define CLRPMIRQ 0x10
18593 +
18594 +#define IO_MAX_MAPS 2
18595 +#define MEM_MAX_MAPS 5
18596 +
18597 +enum {
18598 + SLOTB_PROBE = 0,
18599 + SLOTB_NOPROBE_IO,
18600 + SLOTB_NOPROBE_MEM,
18601 + SLOTB_NOPROBE_ALL
18602 +};
18603 +
18604 +typedef struct vrc4171_socket {
18605 + int noprobe;
18606 + void (*handler)(void *, unsigned int);
18607 + void *info;
18608 + socket_cap_t cap;
18609 + spinlock_t event_lock;
18610 + uint16_t events;
18611 + struct socket_info_t *pcmcia_socket;
18612 + struct tq_struct tq_task;
18613 + char name[24];
18614 + int csc_irq;
18615 + int io_irq;
18616 +} vrc4171_socket_t;
18617 +
18618 +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
18619 +static int vrc4171_slotb = SLOTB_IS_NONE;
18620 +static unsigned int vrc4171_irq;
18621 +static uint16_t vrc4171_irq_mask = 0xdeb8;
18622 +
18623 +extern struct socket_info_t *pcmcia_register_socket(int slot,
18624 + struct pccard_operations *vtable,
18625 + int use_bus_pm);
18626 +extern void pcmcia_unregister_socket(struct socket_info_t *s);
18627 +
18628 +static inline uint8_t exca_read_byte(int slot, uint8_t index)
18629 +{
18630 + if (slot == CARD_SLOTB)
18631 + index += CARD_SLOTB_OFFSET;
18632 +
18633 + outb(index, CARD_CONTROLLER_INDEX);
18634 + return inb(CARD_CONTROLLER_DATA);
18635 +}
18636 +
18637 +static inline uint16_t exca_read_word(int slot, uint8_t index)
18638 +{
18639 + uint16_t data;
18640 +
18641 + if (slot == CARD_SLOTB)
18642 + index += CARD_SLOTB_OFFSET;
18643 +
18644 + outb(index++, CARD_CONTROLLER_INDEX);
18645 + data = inb(CARD_CONTROLLER_DATA);
18646 +
18647 + outb(index, CARD_CONTROLLER_INDEX);
18648 + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
18649 +
18650 + return data;
18651 +}
18652 +
18653 +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
18654 +{
18655 + if (slot == CARD_SLOTB)
18656 + index += CARD_SLOTB_OFFSET;
18657 +
18658 + outb(index, CARD_CONTROLLER_INDEX);
18659 + outb(data, CARD_CONTROLLER_DATA);
18660 +
18661 + return data;
18662 +}
18663 +
18664 +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
18665 +{
18666 + if (slot == CARD_SLOTB)
18667 + index += CARD_SLOTB_OFFSET;
18668 +
18669 + outb(index++, CARD_CONTROLLER_INDEX);
18670 + outb(data, CARD_CONTROLLER_DATA);
18671 +
18672 + outb(index, CARD_CONTROLLER_INDEX);
18673 + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
18674 +
18675 + return data;
18676 +}
18677 +
18678 +static inline int search_nonuse_irq(void)
18679 +{
18680 + int i;
18681 +
18682 + for (i = 0; i < 16; i++) {
18683 + if (vrc4171_irq_mask & (1 << i)) {
18684 + vrc4171_irq_mask &= ~(1 << i);
18685 + return i;
18686 + }
18687 + }
18688 +
18689 + return -1;
18690 +}
18691 +
18692 +static int pccard_init(unsigned int slot)
18693 +{
18694 + vrc4171_socket_t *socket = &vrc4171_sockets[slot];
18695 +
18696 + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
18697 + socket->cap.irq_mask = 0;
18698 + socket->cap.pci_irq = vrc4171_irq;
18699 + socket->cap.map_size = 0x1000;
18700 + socket->events = 0;
18701 + spin_lock_init(socket->event_lock);
18702 + socket->csc_irq = search_nonuse_irq();
18703 + socket->io_irq = search_nonuse_irq();
18704 +
18705 + return 0;
18706 +}
18707 +
18708 +static int pccard_suspend(unsigned int slot)
18709 +{
18710 + return -EINVAL;
18711 +}
18712 +
18713 +static int pccard_register_callback(unsigned int slot,
18714 + void (*handler)(void *, unsigned int),
18715 + void *info)
18716 +{
18717 + vrc4171_socket_t *socket;
18718 +
18719 + if (slot >= CARD_MAX_SLOTS)
18720 + return -EINVAL;
18721 +
18722 + socket = &vrc4171_sockets[slot];
18723 +
18724 + socket->handler = handler;
18725 + socket->info = info;
18726 +
18727 + if (handler)
18728 + MOD_INC_USE_COUNT;
18729 + else
18730 + MOD_DEC_USE_COUNT;
18731 +
18732 + return 0;
18733 +}
18734 +
18735 +static int pccard_inquire_socket(unsigned int slot, socket_cap_t *cap)
18736 +{
18737 + vrc4171_socket_t *socket;
18738 +
18739 + if (slot >= CARD_MAX_SLOTS || cap == NULL)
18740 + return -EINVAL;
18741 +
18742 + socket = &vrc4171_sockets[slot];
18743 +
18744 + *cap = socket->cap;
18745 +
18746 + return 0;
18747 +}
18748 +
18749 +static int pccard_get_status(unsigned int slot, u_int *value)
18750 +{
18751 + uint8_t status, sense;
18752 + u_int val = 0;
18753 +
18754 + if (slot >= CARD_MAX_SLOTS || value == NULL)
18755 + return -EINVAL;
18756 +
18757 + status = exca_read_byte(slot, I365_STATUS);
18758 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
18759 + if (status & I365_CS_STSCHG)
18760 + val |= SS_STSCHG;
18761 + } else {
18762 + if (!(status & I365_CS_BVD1))
18763 + val |= SS_BATDEAD;
18764 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
18765 + val |= SS_BATWARN;
18766 + }
18767 + if ((status & I365_CS_DETECT) == I365_CS_DETECT)
18768 + val |= SS_DETECT;
18769 + if (status & I365_CS_WRPROT)
18770 + val |= SS_WRPROT;
18771 + if (status & I365_CS_READY)
18772 + val |= SS_READY;
18773 + if (status & I365_CS_POWERON)
18774 + val |= SS_POWERON;
18775 +
18776 + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
18777 + switch (sense) {
18778 + case VCC_3VORXV_CAPABLE:
18779 + val |= SS_3VCARD | SS_XVCARD;
18780 + break;
18781 + case VCC_XV_ONLY:
18782 + val |= SS_XVCARD;
18783 + break;
18784 + case VCC_3V_CAPABLE:
18785 + val |= SS_3VCARD;
18786 + break;
18787 + default:
18788 + /* 5V only */
18789 + break;
18790 + }
18791 +
18792 + *value = val;
18793 +
18794 + return 0;
18795 +}
18796 +
18797 +static inline u_char get_Vcc_value(uint8_t voltage)
18798 +{
18799 + switch (voltage) {
18800 + case VCC_STATUS_3V:
18801 + return 33;
18802 + case VCC_STATUS_5V:
18803 + return 50;
18804 + default:
18805 + break;
18806 + }
18807 +
18808 + return 0;
18809 +}
18810 +
18811 +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc)
18812 +{
18813 + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02)
18814 + return Vcc;
18815 +
18816 + return 0;
18817 +}
18818 +
18819 +static int pccard_get_socket(unsigned int slot, socket_state_t *state)
18820 +{
18821 + vrc4171_socket_t *socket;
18822 + uint8_t power, voltage, control, cscint;
18823 +
18824 + if (slot >= CARD_MAX_SLOTS || state == NULL)
18825 + return -EINVAL;
18826 +
18827 + socket = &vrc4171_sockets[slot];
18828 +
18829 + power = exca_read_byte(slot, I365_POWER);
18830 + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT);
18831 +
18832 + state->Vcc = get_Vcc_value(voltage);
18833 + state->Vpp = get_Vpp_value(power, state->Vcc);
18834 +
18835 + state->flags = 0;
18836 + if (power & POWER_ENABLE)
18837 + state->flags |= SS_PWR_AUTO;
18838 + if (power & I365_PWR_OUT)
18839 + state->flags |= SS_OUTPUT_ENA;
18840 +
18841 + control = exca_read_byte(slot, I365_INTCTL);
18842 + if (control & I365_PC_IOCARD)
18843 + state->flags |= SS_IOCARD;
18844 + if (!(control & I365_PC_RESET))
18845 + state->flags |= SS_RESET;
18846 +
18847 + cscint = exca_read_byte(slot, I365_CSCINT);
18848 + state->csc_mask = 0;
18849 + if (state->flags & SS_IOCARD) {
18850 + if (cscint & I365_CSC_STSCHG)
18851 + state->flags |= SS_STSCHG;
18852 + } else {
18853 + if (cscint & I365_CSC_BVD1)
18854 + state->csc_mask |= SS_BATDEAD;
18855 + if (cscint & I365_CSC_BVD2)
18856 + state->csc_mask |= SS_BATWARN;
18857 + }
18858 + if (cscint & I365_CSC_READY)
18859 + state->csc_mask |= SS_READY;
18860 + if (cscint & I365_CSC_DETECT)
18861 + state->csc_mask |= SS_DETECT;
18862 +
18863 + return 0;
18864 +}
18865 +
18866 +static inline uint8_t set_Vcc_value(u_char Vcc)
18867 +{
18868 + switch (Vcc) {
18869 + case 33:
18870 + return VCC_3V;
18871 + case 50:
18872 + return VCC_5V;
18873 + }
18874 +
18875 + /* Small voltage is chosen for safety. */
18876 + return VCC_3V;
18877 +}
18878 +
18879 +static int pccard_set_socket(unsigned int slot, socket_state_t *state)
18880 +{
18881 + vrc4171_socket_t *socket;
18882 + uint8_t voltage, power, control, cscint;
18883 +
18884 + if (slot >= CARD_MAX_SLOTS ||
18885 + (state->Vpp != state->Vcc && state->Vpp != 0) ||
18886 + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
18887 + return -EINVAL;
18888 +
18889 + socket = &vrc4171_sockets[slot];
18890 +
18891 + spin_lock_irq(&socket->event_lock);
18892 +
18893 + voltage = set_Vcc_value(state->Vcc);
18894 + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
18895 +
18896 + power = POWER_ENABLE;
18897 + if (state->Vpp == state->Vcc)
18898 + power |= VPP_GET_VCC;
18899 + if (state->flags & SS_OUTPUT_ENA)
18900 + power |= I365_PWR_OUT;
18901 + exca_write_byte(slot, I365_POWER, power);
18902 +
18903 + control = 0;
18904 + if (state->io_irq != 0)
18905 + control |= socket->io_irq;
18906 + if (state->flags & SS_IOCARD)
18907 + control |= I365_PC_IOCARD;
18908 + if (state->flags & SS_RESET)
18909 + control &= ~I365_PC_RESET;
18910 + else
18911 + control |= I365_PC_RESET;
18912 + exca_write_byte(slot, I365_INTCTL, control);
18913 +
18914 + cscint = 0;
18915 + exca_write_byte(slot, I365_CSCINT, cscint);
18916 + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
18917 + if (state->csc_mask != 0)
18918 + cscint |= socket->csc_irq << 8;
18919 + if (state->flags & SS_IOCARD) {
18920 + if (state->csc_mask & SS_STSCHG)
18921 + cscint |= I365_CSC_STSCHG;
18922 + } else {
18923 + if (state->csc_mask & SS_BATDEAD)
18924 + cscint |= I365_CSC_BVD1;
18925 + if (state->csc_mask & SS_BATWARN)
18926 + cscint |= I365_CSC_BVD2;
18927 + }
18928 + if (state->csc_mask & SS_READY)
18929 + cscint |= I365_CSC_READY;
18930 + if (state->csc_mask & SS_DETECT)
18931 + cscint |= I365_CSC_DETECT;
18932 + exca_write_byte(slot, I365_CSCINT, cscint);
18933 +
18934 + spin_unlock_irq(&socket->event_lock);
18935 +
18936 + return 0;
18937 +}
18938 +
18939 +static int pccard_get_io_map(unsigned int slot, struct pccard_io_map *io)
18940 +{
18941 + vrc4171_socket_t *socket;
18942 + uint8_t ioctl, addrwin;
18943 + u_char map;
18944 +
18945 + if (slot >= CARD_MAX_SLOTS || io == NULL ||
18946 + io->map >= IO_MAX_MAPS)
18947 + return -EINVAL;
18948 +
18949 + socket = &vrc4171_sockets[slot];
18950 + map = io->map;
18951 +
18952 + io->start = exca_read_word(slot, I365_IO(map)+I365_W_START);
18953 + io->stop = exca_read_word(slot, I365_IO(map)+I365_W_STOP);
18954 +
18955 + ioctl = exca_read_byte(slot, I365_IOCTL);
18956 + if (io->flags & I365_IOCTL_WAIT(map))
18957 + io->speed = 1;
18958 + else
18959 + io->speed = 0;
18960 +
18961 + io->flags = 0;
18962 + if (ioctl & I365_IOCTL_16BIT(map))
18963 + io->flags |= MAP_16BIT;
18964 + if (ioctl & I365_IOCTL_IOCS16(map))
18965 + io->flags |= MAP_AUTOSZ;
18966 + if (ioctl & I365_IOCTL_0WS(map))
18967 + io->flags |= MAP_0WS;
18968 +
18969 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18970 + if (addrwin & I365_ENA_IO(map))
18971 + io->flags |= MAP_ACTIVE;
18972 +
18973 + return 0;
18974 +}
18975 +
18976 +static int pccard_set_io_map(unsigned int slot, struct pccard_io_map *io)
18977 +{
18978 + vrc4171_socket_t *socket;
18979 + uint8_t ioctl, addrwin;
18980 + u_char map;
18981 +
18982 + if (slot >= CARD_MAX_SLOTS ||
18983 + io == NULL || io->map >= IO_MAX_MAPS ||
18984 + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
18985 + return -EINVAL;
18986 +
18987 + socket = &vrc4171_sockets[slot];
18988 + map = io->map;
18989 +
18990 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18991 + if (addrwin & I365_ENA_IO(map)) {
18992 + addrwin &= ~I365_ENA_IO(map);
18993 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18994 + }
18995 +
18996 + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
18997 + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
18998 +
18999 + ioctl = 0;
19000 + if (io->speed > 0)
19001 + ioctl |= I365_IOCTL_WAIT(map);
19002 + if (io->flags & MAP_16BIT)
19003 + ioctl |= I365_IOCTL_16BIT(map);
19004 + if (io->flags & MAP_AUTOSZ)
19005 + ioctl |= I365_IOCTL_IOCS16(map);
19006 + if (io->flags & MAP_0WS)
19007 + ioctl |= I365_IOCTL_0WS(map);
19008 + exca_write_byte(slot, I365_IOCTL, ioctl);
19009 +
19010 + if (io->flags & MAP_ACTIVE) {
19011 + addrwin |= I365_ENA_IO(map);
19012 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19013 + }
19014 +
19015 + return 0;
19016 +}
19017 +
19018 +static int pccard_get_mem_map(unsigned int slot, struct pccard_mem_map *mem)
19019 +{
19020 + vrc4171_socket_t *socket;
19021 + uint8_t addrwin;
19022 + u_long start, stop;
19023 + u_int offset;
19024 + u_char map;
19025 +
19026 + if (slot >= CARD_MAX_SLOTS || mem == NULL || mem->map >= MEM_MAX_MAPS)
19027 + return -EINVAL;
19028 +
19029 + socket = &vrc4171_sockets[slot];
19030 + map = mem->map;
19031 +
19032 + mem->flags = 0;
19033 + mem->speed = 0;
19034 +
19035 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19036 + if (addrwin & I365_ENA_MEM(map))
19037 + mem->flags |= MAP_ACTIVE;
19038 +
19039 + start = exca_read_word(slot, I365_MEM(map)+I365_W_START);
19040 + if (start & I365_MEM_16BIT)
19041 + mem->flags |= MAP_16BIT;
19042 + mem->sys_start = (start & 0x3fffUL) << 12;
19043 +
19044 + stop = exca_read_word(slot, I365_MEM(map)+I365_W_STOP);
19045 + if (start & I365_MEM_WS0)
19046 + mem->speed += 1;
19047 + if (start & I365_MEM_WS1)
19048 + mem->speed += 2;
19049 + mem->sys_stop = ((stop & 0x3fffUL) << 12) + 0xfffUL;
19050 +
19051 + offset = exca_read_word(slot, I365_MEM(map)+I365_W_OFF);
19052 + if (offset & I365_MEM_REG)
19053 + mem->flags |= MAP_ATTRIB;
19054 + if (offset & I365_MEM_WRPROT)
19055 + mem->flags |= MAP_WRPROT;
19056 + mem->card_start = (offset & 0x3fffUL) << 12;
19057 +
19058 + mem->sys_start += CARD_MEM_START;
19059 + mem->sys_stop += CARD_MEM_START;
19060 +
19061 + return 0;
19062 +}
19063 +
19064 +static int pccard_set_mem_map(unsigned int slot, struct pccard_mem_map *mem)
19065 +{
19066 + vrc4171_socket_t *socket;
19067 + uint16_t start, stop, offset;
19068 + uint8_t addrwin;
19069 + u_char map;
19070 +
19071 + if (slot >= CARD_MAX_SLOTS ||
19072 + mem == NULL || mem->map >= MEM_MAX_MAPS ||
19073 + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
19074 + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
19075 + mem->sys_start > mem->sys_stop ||
19076 + mem->card_start > CARD_MAX_MEM_OFFSET ||
19077 + mem->speed > CARD_MAX_MEM_SPEED)
19078 + return -EINVAL;
19079 +
19080 + socket = &vrc4171_sockets[slot];
19081 + map = mem->map;
19082 +
19083 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19084 + if (addrwin & I365_ENA_MEM(map)) {
19085 + addrwin &= ~I365_ENA_MEM(map);
19086 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19087 + }
19088 +
19089 + start = (mem->sys_start >> 12) & 0x3fff;
19090 + if (mem->flags & MAP_16BIT)
19091 + start |= I365_MEM_16BIT;
19092 + exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
19093 +
19094 + stop = (mem->sys_stop >> 12) & 0x3fff;
19095 + switch (mem->speed) {
19096 + case 0:
19097 + break;
19098 + case 1:
19099 + stop |= I365_MEM_WS0;
19100 + break;
19101 + case 2:
19102 + stop |= I365_MEM_WS1;
19103 + break;
19104 + default:
19105 + stop |= I365_MEM_WS0 | I365_MEM_WS1;
19106 + break;
19107 + }
19108 + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
19109 +
19110 + offset = (mem->card_start >> 12) & 0x3fff;
19111 + if (mem->flags & MAP_ATTRIB)
19112 + offset |= I365_MEM_REG;
19113 + if (mem->flags & MAP_WRPROT)
19114 + offset |= I365_MEM_WRPROT;
19115 + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
19116 +
19117 + if (mem->flags & MAP_ACTIVE) {
19118 + addrwin |= I365_ENA_MEM(map);
19119 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19120 + }
19121 +
19122 + return 0;
19123 +}
19124 +
19125 +static void pccard_proc_setup(unsigned int slot, struct proc_dir_entry *base)
19126 +{
19127 +}
19128 +
19129 +static struct pccard_operations vrc4171_pccard_operations = {
19130 + .init = pccard_init,
19131 + .suspend = pccard_suspend,
19132 + .register_callback = pccard_register_callback,
19133 + .inquire_socket = pccard_inquire_socket,
19134 + .get_status = pccard_get_status,
19135 + .get_socket = pccard_get_socket,
19136 + .set_socket = pccard_set_socket,
19137 + .get_io_map = pccard_get_io_map,
19138 + .set_io_map = pccard_set_io_map,
19139 + .get_mem_map = pccard_get_mem_map,
19140 + .set_mem_map = pccard_set_mem_map,
19141 + .proc_setup = pccard_proc_setup,
19142 +};
19143 +
19144 +static void pccard_bh(void *data)
19145 +{
19146 + vrc4171_socket_t *socket = (vrc4171_socket_t *)data;
19147 + uint16_t events;
19148 +
19149 + spin_lock_irq(&socket->event_lock);
19150 + events = socket->events;
19151 + socket->events = 0;
19152 + spin_unlock_irq(&socket->event_lock);
19153 +
19154 + if (socket->handler)
19155 + socket->handler(socket->info, events);
19156 +}
19157 +
19158 +static inline uint16_t get_events(int slot)
19159 +{
19160 + uint16_t events = 0;
19161 + uint8_t status, csc;
19162 +
19163 + status = exca_read_byte(slot, I365_STATUS);
19164 + csc = exca_read_byte(slot, I365_CSC);
19165 +
19166 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
19167 + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
19168 + events |= SS_STSCHG;
19169 + } else {
19170 + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
19171 + if (!(status & I365_CS_BVD1))
19172 + events |= SS_BATDEAD;
19173 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
19174 + events |= SS_BATWARN;
19175 + }
19176 + }
19177 + if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
19178 + events |= SS_READY;
19179 + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
19180 + events |= SS_DETECT;
19181 +
19182 + return events;
19183 +}
19184 +
19185 +static void pccard_status_change(int slot, vrc4171_socket_t *socket)
19186 +{
19187 + uint16_t events;
19188 +
19189 + socket->tq_task.routine = pccard_bh;
19190 + socket->tq_task.data = socket;
19191 +
19192 + events = get_events(slot);
19193 + if (events) {
19194 + spin_lock(&socket->event_lock);
19195 + socket->events |= events;
19196 + spin_unlock(&socket->event_lock);
19197 + schedule_task(&socket->tq_task);
19198 + }
19199 +}
19200 +
19201 +static void pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
19202 +{
19203 + vrc4171_socket_t *socket;
19204 + uint16_t status;
19205 +
19206 + status = vrc4171_get_irq_status();
19207 + if (status & IRQ_A) {
19208 + socket = &vrc4171_sockets[CARD_SLOTA];
19209 + if (socket->noprobe == SLOTB_PROBE) {
19210 + if (status & (1 << socket->csc_irq))
19211 + pccard_status_change(CARD_SLOTA, socket);
19212 + }
19213 + }
19214 +
19215 + if (status & IRQ_B) {
19216 + socket = &vrc4171_sockets[CARD_SLOTB];
19217 + if (socket->noprobe == SLOTB_PROBE) {
19218 + if (status & (1 << socket->csc_irq))
19219 + pccard_status_change(CARD_SLOTB, socket);
19220 + }
19221 + }
19222 +}
19223 +
19224 +static inline void reserve_using_irq(int slot)
19225 +{
19226 + unsigned int irq;
19227 +
19228 + irq = exca_read_byte(slot, I365_INTCTL);
19229 + irq &= 0x0f;
19230 + vrc4171_irq_mask &= ~(1 << irq);
19231 +
19232 + irq = exca_read_byte(slot, I365_CSCINT);
19233 + irq = (irq & 0xf0) >> 4;
19234 + vrc4171_irq_mask &= ~(1 << irq);
19235 +}
19236 +
19237 +static int __devinit vrc4171_add_socket(int slot)
19238 +{
19239 + vrc4171_socket_t *socket;
19240 +
19241 + if (slot >= CARD_MAX_SLOTS)
19242 + return -EINVAL;
19243 +
19244 + socket = &vrc4171_sockets[slot];
19245 + if (socket->noprobe != SLOTB_PROBE) {
19246 + uint8_t addrwin;
19247 +
19248 + switch (socket->noprobe) {
19249 + case SLOTB_NOPROBE_MEM:
19250 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19251 + addrwin &= 0x1f;
19252 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19253 + break;
19254 + case SLOTB_NOPROBE_IO:
19255 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19256 + addrwin &= 0xc0;
19257 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19258 + break;
19259 + default:
19260 + break;
19261 + }
19262 +
19263 + reserve_using_irq(slot);
19264 +
19265 + return 0;
19266 + }
19267 +
19268 + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
19269 +
19270 + socket->pcmcia_socket = pcmcia_register_socket(slot, &vrc4171_pccard_operations, 1);
19271 + if (socket->pcmcia_socket == NULL)
19272 + return -ENOMEM;
19273 +
19274 + exca_write_byte(slot, I365_ADDRWIN, 0);
19275 +
19276 + exca_write_byte(slot, GLOBAL_CONTROL, 0);
19277 +
19278 + return 0;
19279 +}
19280 +
19281 +static void vrc4171_remove_socket(int slot)
19282 +{
19283 + vrc4171_socket_t *socket;
19284 +
19285 + if (slot >= CARD_MAX_SLOTS)
19286 + return;
19287 +
19288 + socket = &vrc4171_sockets[slot];
19289 +
19290 + if (socket->pcmcia_socket != NULL) {
19291 + pcmcia_unregister_socket(socket->pcmcia_socket);
19292 + socket->pcmcia_socket = NULL;
19293 + }
19294 +}
19295 +
19296 +static int __devinit vrc4171_card_setup(char *options)
19297 +{
19298 + if (options == NULL || *options == '\0')
19299 + return 0;
19300 +
19301 + if (strncmp(options, "irq:", 4) == 0) {
19302 + int irq;
19303 + options += 4;
19304 + irq = simple_strtoul(options, &options, 0);
19305 + if (irq >= 0 && irq < NR_IRQS)
19306 + vrc4171_irq = irq;
19307 +
19308 + if (*options != ',')
19309 + return 0;
19310 + options++;
19311 + }
19312 +
19313 + if (strncmp(options, "slota:", 6) == 0) {
19314 + options += 6;
19315 + if (*options != '\0') {
19316 + if (strncmp(options, "noprobe", 7) == 0) {
19317 + vrc4171_sockets[CARD_SLOTA].noprobe = 1;
19318 + options += 7;
19319 + }
19320 +
19321 + if (*options != ',')
19322 + return 0;
19323 + options++;
19324 + } else
19325 + return 0;
19326 +
19327 + }
19328 +
19329 + if (strncmp(options, "slotb:", 6) == 0) {
19330 + options += 6;
19331 + if (*options != '\0') {
19332 + if (strncmp(options, "pccard", 6) == 0) {
19333 + vrc4171_slotb = SLOTB_IS_PCCARD;
19334 + options += 6;
19335 + } else if (strncmp(options, "cf", 2) == 0) {
19336 + vrc4171_slotb = SLOTB_IS_CF;
19337 + options += 2;
19338 + } else if (strncmp(options, "flashrom", 8) == 0) {
19339 + vrc4171_slotb = SLOTB_IS_FLASHROM;
19340 + options += 8;
19341 + } else if (strncmp(options, "none", 4) == 0) {
19342 + vrc4171_slotb = SLOTB_IS_NONE;
19343 + options += 4;
19344 + }
19345 +
19346 + if (*options != ',')
19347 + return 0;
19348 + options++;
19349 +
19350 + if ( strncmp(options, "memnoprobe", 10) == 0)
19351 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_MEM;
19352 + if ( strncmp(options, "ionoprobe", 9) == 0)
19353 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_IO;
19354 + if ( strncmp(options, "noprobe", 7) == 0)
19355 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_ALL;
19356 + }
19357 + }
19358 +
19359 + return 0;
19360 +}
19361 +
19362 +__setup("vrc4171_card=", vrc4171_card_setup);
19363 +
19364 +static int __devinit vrc4171_card_init(void)
19365 +{
19366 + int retval, slot;
19367 +
19368 + vrc4171_set_multifunction_pin(vrc4171_slotb);
19369 +
19370 + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
19371 + "NEC VRC4171 Card Controller") == NULL)
19372 + return -EBUSY;
19373 +
19374 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
19375 + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
19376 + break;
19377 +
19378 + retval = vrc4171_add_socket(slot);
19379 + if (retval != 0)
19380 + return retval;
19381 + }
19382 +
19383 + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
19384 + "NEC VRC4171 Card Controller", vrc4171_sockets);
19385 + if (retval < 0) {
19386 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
19387 + vrc4171_remove_socket(slot);
19388 +
19389 + return retval;
19390 + }
19391 +
19392 + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
19393 +
19394 + return 0;
19395 +}
19396 +
19397 +static void __devexit vrc4171_card_exit(void)
19398 +{
19399 + int slot;
19400 +
19401 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
19402 + vrc4171_remove_socket(slot);
19403 +
19404 + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
19405 +}
19406 +
19407 +module_init(vrc4171_card_init);
19408 +module_exit(vrc4171_card_exit);
19409 diff -Nur linux-2.4.32-rc1/drivers/scsi/NCR53C9x.h linux-2.4.32-rc1.mips/drivers/scsi/NCR53C9x.h
19410 --- linux-2.4.32-rc1/drivers/scsi/NCR53C9x.h 2004-02-18 14:36:31.000000000 +0100
19411 +++ linux-2.4.32-rc1.mips/drivers/scsi/NCR53C9x.h 2003-12-15 19:19:51.000000000 +0100
19412 @@ -144,12 +144,7 @@
19413
19414 #ifndef MULTIPLE_PAD_SIZES
19415
19416 -#ifdef CONFIG_CPU_HAS_WB
19417 -#include <asm/wbflush.h>
19418 -#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
19419 -#else
19420 -#define esp_write(__reg, __val) ((__reg) = (__val))
19421 -#endif
19422 +#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
19423 #define esp_read(__reg) (__reg)
19424
19425 struct ESP_regs {
19426 diff -Nur linux-2.4.32-rc1/drivers/sound/au1550_i2s.c linux-2.4.32-rc1.mips/drivers/sound/au1550_i2s.c
19427 --- linux-2.4.32-rc1/drivers/sound/au1550_i2s.c 2005-01-19 15:10:04.000000000 +0100
19428 +++ linux-2.4.32-rc1.mips/drivers/sound/au1550_i2s.c 2005-02-08 08:07:50.000000000 +0100
19429 @@ -41,6 +41,7 @@
19430 * 675 Mass Ave, Cambridge, MA 02139, USA.
19431 *
19432 */
19433 +
19434 #include <linux/version.h>
19435 #include <linux/module.h>
19436 #include <linux/string.h>
19437 @@ -62,7 +63,45 @@
19438 #include <asm/uaccess.h>
19439 #include <asm/hardirq.h>
19440 #include <asm/au1000.h>
19441 +
19442 +#if defined(CONFIG_SOC_AU1550)
19443 #include <asm/pb1550.h>
19444 +#endif
19445 +
19446 +#if defined(CONFIG_MIPS_PB1200)
19447 +#define WM8731
19448 +#define WM_MODE_USB
19449 +#include <asm/pb1200.h>
19450 +#endif
19451 +
19452 +#if defined(CONFIG_MIPS_FICMMP)
19453 +#define WM8721
19454 +#define WM_MODE_NORMAL
19455 +#include <asm/ficmmp.h>
19456 +#endif
19457 +
19458 +
19459 +#define WM_VOLUME_MIN 47
19460 +#define WM_VOLUME_SCALE 80
19461 +
19462 +#if defined(WM8731)
19463 + /* OSS interface to the wm i2s.. */
19464 + #define CODEC_NAME "Wolfson WM8731 I2S"
19465 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM | SOUND_MASK_LINE)
19466 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK | SOUND_MASK_MIC)
19467 + #define WM_I2S_RECORD_MASK (SOUND_MASK_MIC | SOUND_MASK_LINE1 | SOUND_MASK_LINE)
19468 +#elif defined(WM8721)
19469 + #define CODEC_NAME "Wolfson WM8721 I2S"
19470 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM)
19471 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK)
19472 + #define WM_I2S_RECORD_MASK (0)
19473 +#endif
19474 +
19475 +
19476 +#define supported_mixer(FOO) ((FOO >= 0) && \
19477 + (FOO < SOUND_MIXER_NRDEVICES) && \
19478 + WM_I2S_SUPPORTED_MASK & (1<<FOO) )
19479 +
19480 #include <asm/au1xxx_psc.h>
19481 #include <asm/au1xxx_dbdma.h>
19482
19483 @@ -98,13 +137,51 @@
19484 * 0 = no VRA, 1 = use VRA if codec supports it
19485 * The framework is here, but we currently force no VRA.
19486 */
19487 +#if defined(CONFIG_MIPS_PB1200) | defined(CONFIG_MIPS_PB1550)
19488 static int vra = 0;
19489 +#elif defined(CONFIG_MIPS_FICMMP)
19490 +static int vra = 1;
19491 +#endif
19492 +
19493 +#define WM_REG_L_HEADPHONE_OUT 0x02
19494 +#define WM_REG_R_HEADPHONE_OUT 0x03
19495 +#define WM_REG_ANALOGUE_AUDIO_PATH_CTRL 0x04
19496 +#define WM_REG_DIGITAL_AUDIO_PATH_CTRL 0x05
19497 +#define WM_REG_POWER_DOWN_CTRL 0x06
19498 +#define WM_REG_DIGITAL_AUDIO_IF 0x07
19499 +#define WM_REG_SAMPLING_CONTROL 0x08
19500 +#define WM_REG_ACTIVE_CTRL 0x09
19501 +#define WM_REG_RESET 0x0F
19502 +#define WM_SC_SR_96000 (0x7<<2)
19503 +#define WM_SC_SR_88200 (0xF<<2)
19504 +#define WM_SC_SR_48000 (0x0<<2)
19505 +#define WM_SC_SR_44100 (0x8<<2)
19506 +#define WM_SC_SR_32000 (0x6<<2)
19507 +#define WM_SC_SR_8018 (0x9<<2)
19508 +#define WM_SC_SR_8000 (0x1<<2)
19509 +#define WM_SC_MODE_USB 1
19510 +#define WM_SC_MODE_NORMAL 0
19511 +#define WM_SC_BOSR_250FS (0<<1)
19512 +#define WM_SC_BOSR_272FS (1<<1)
19513 +#define WM_SC_BOSR_256FS (0<<1)
19514 +#define WM_SC_BOSR_128FS (0<<1)
19515 +#define WM_SC_BOSR_384FS (1<<1)
19516 +#define WM_SC_BOSR_192FS (1<<1)
19517 +
19518 +#define WS_64FS 31
19519 +#define WS_96FS 47
19520 +#define WS_128FS 63
19521 +#define WS_192FS 95
19522 +
19523 +#define MIN_Q_COUNT 2
19524 +
19525 MODULE_PARM(vra, "i");
19526 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
19527
19528 static struct au1550_state {
19529 /* soundcore stuff */
19530 int dev_audio;
19531 + int dev_mixer;
19532
19533 spinlock_t lock;
19534 struct semaphore open_sem;
19535 @@ -114,6 +191,11 @@
19536 int no_vra;
19537 volatile psc_i2s_t *psc_addr;
19538
19539 + int level_line;
19540 + int level_mic;
19541 + int level_left;
19542 + int level_right;
19543 +
19544 struct dmabuf {
19545 u32 dmanr;
19546 unsigned sample_rate;
19547 @@ -195,60 +277,224 @@
19548 }
19549 }
19550
19551 -/* Just a place holder. The Wolfson codec is a write only device,
19552 - * so we would have to keep a local copy of the data.
19553 - */
19554 -#if 0
19555 -static u8
19556 -rdcodec(u8 addr)
19557 -{
19558 - return 0 /* data */;
19559 -}
19560 -#endif
19561 -
19562 -
19563 static void
19564 -wrcodec(u8 ctlreg, u8 val)
19565 +wrcodec(u8 ctlreg, u16 val)
19566 {
19567 int rcnt;
19568 extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val);
19569 -
19570 /* The codec is a write only device, with a 16-bit control/data
19571 * word. Although it is written as two bytes on the I2C, the
19572 * format is actually 7 bits of register and 9 bits of data.
19573 * The ls bit of the first byte is the ms bit of the data.
19574 */
19575 rcnt = 0;
19576 - while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1)
19577 - && (rcnt < 50)) {
19578 + while ((pb1550_wm_codec_write((0x36 >> 1),
19579 + (ctlreg << 1) | ((val >> 8) & 0x01),
19580 + (u8) (val & 0x00FF)) != 1) &&
19581 + (rcnt < 50)) {
19582 rcnt++;
19583 -#if 0
19584 - printk("Codec write retry %02x %02x\n", ctlreg, val);
19585 -#endif
19586 }
19587 +
19588 + au1550_delay(10);
19589 +}
19590 +
19591 +static int
19592 +au1550_open_mixdev(struct inode *inode, struct file *file)
19593 +{
19594 + file->private_data = &au1550_state;
19595 + return 0;
19596 +}
19597 +
19598 +static int
19599 +au1550_release_mixdev(struct inode *inode, struct file *file)
19600 +{
19601 + return 0;
19602 +}
19603 +
19604 +static int wm_i2s_read_mixer(struct au1550_state *s, int oss_channel)
19605 +{
19606 + int ret = 0;
19607 +
19608 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19609 + /* nice stereo mixers .. */
19610 +
19611 + ret = s->level_left | (s->level_right << 8);
19612 + } else if (oss_channel == SOUND_MIXER_MIC) {
19613 + ret = 0;
19614 + /* TODO: Implement read mixer for input/output codecs */
19615 + }
19616 +
19617 + return ret;
19618 }
19619
19620 +static void wm_i2s_write_mixer(struct au1550_state *s, int oss_channel, unsigned int left, unsigned int right)
19621 +{
19622 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19623 + /* stereo mixers */
19624 + s->level_left = left;
19625 + s->level_right = right;
19626 +
19627 + right = (right * WM_VOLUME_SCALE) / 100;
19628 + left = (left * WM_VOLUME_SCALE) / 100;
19629 + if (right > WM_VOLUME_SCALE)
19630 + right = WM_VOLUME_SCALE;
19631 + if (left > WM_VOLUME_SCALE)
19632 + left = WM_VOLUME_SCALE;
19633 +
19634 + right += WM_VOLUME_MIN;
19635 + left += WM_VOLUME_MIN;
19636 +
19637 + wrcodec(WM_REG_L_HEADPHONE_OUT, left);
19638 + wrcodec(WM_REG_R_HEADPHONE_OUT, right);
19639 +
19640 + }else if (oss_channel == SOUND_MIXER_MIC) {
19641 + /* TODO: implement write mixer for input/output codecs */
19642 + }
19643 +}
19644 +
19645 +/* a thin wrapper for write_mixer */
19646 +static void wm_i2s_set_mixer(struct au1550_state *s, unsigned int oss_mixer, unsigned int val )
19647 +{
19648 + unsigned int left,right;
19649 +
19650 + /* cleanse input a little */
19651 + right = ((val >> 8) & 0xff) ;
19652 + left = (val & 0xff) ;
19653 +
19654 + if (right > 100) right = 100;
19655 + if (left > 100) left = 100;
19656 +
19657 + wm_i2s_write_mixer(s, oss_mixer, left, right);
19658 +}
19659 +
19660 +static int
19661 +au1550_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
19662 +{
19663 + struct au1550_state *s = (struct au1550_state *)file->private_data;
19664 +
19665 + int i, val = 0;
19666 +
19667 + if (cmd == SOUND_MIXER_INFO) {
19668 + mixer_info info;
19669 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19670 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19671 + info.modify_counter = 0;
19672 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19673 + return -EFAULT;
19674 + return 0;
19675 + }
19676 + if (cmd == SOUND_OLD_MIXER_INFO) {
19677 + _old_mixer_info info;
19678 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19679 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19680 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19681 + return -EFAULT;
19682 + return 0;
19683 + }
19684 +
19685 + if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
19686 + return -EINVAL;
19687 +
19688 + if (cmd == OSS_GETVERSION)
19689 + return put_user(SOUND_VERSION, (int *)arg);
19690 +
19691 + if (_SIOC_DIR(cmd) == _SIOC_READ) {
19692 + switch (_IOC_NR(cmd)) {
19693 + case SOUND_MIXER_RECSRC: /* give them the current record src */
19694 + val = 0;
19695 + /*
19696 + if (!codec->recmask_io) {
19697 + val = 0;
19698 + } else {
19699 + val = codec->recmask_io(codec, 1, 0);
19700 + }*/
19701 + break;
19702 +
19703 + case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
19704 + val = WM_I2S_SUPPORTED_MASK;
19705 + break;
19706 +
19707 + case SOUND_MIXER_RECMASK:
19708 + /* Arg contains a bit for each supported recording
19709 + * source */
19710 + val = WM_I2S_RECORD_MASK;
19711 + break;
19712 +
19713 + case SOUND_MIXER_STEREODEVS:
19714 + /* Mixer channels supporting stereo */
19715 + val = WM_I2S_STEREO_MASK;
19716 + break;
19717 +
19718 + case SOUND_MIXER_CAPS:
19719 + val = SOUND_CAP_EXCL_INPUT;
19720 + break;
19721 +
19722 + default: /* read a specific mixer */
19723 + i = _IOC_NR(cmd);
19724 +
19725 + if (!supported_mixer(i))
19726 + return -EINVAL;
19727 +
19728 + val = wm_i2s_read_mixer(s, i);
19729 + break;
19730 + }
19731 + return put_user(val, (int *)arg);
19732 + }
19733 +
19734 + if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
19735 + if (get_user(val, (int *)arg))
19736 + return -EFAULT;
19737 +
19738 + switch (_IOC_NR(cmd)) {
19739 + case SOUND_MIXER_RECSRC:
19740 + /* Arg contains a bit for each recording source */
19741 + if (!WM_I2S_RECORD_MASK)
19742 + return -EINVAL;
19743 + if (!val)
19744 + return 0;
19745 + if (!(val &= WM_I2S_RECORD_MASK))
19746 + return -EINVAL;
19747 +
19748 + return 0;
19749 + default: /* write a specific mixer */
19750 + i = _IOC_NR(cmd);
19751 +
19752 + if (!supported_mixer(i))
19753 + return -EINVAL;
19754 +
19755 + wm_i2s_set_mixer(s, i, val);
19756 +
19757 + return 0;
19758 + }
19759 +}
19760 + return -EINVAL;
19761 +}
19762 +
19763 +static loff_t
19764 +au1550_llseek(struct file *file, loff_t offset, int origin)
19765 +{
19766 + return -ESPIPE;
19767 +}
19768 +
19769 +static /*const */ struct file_operations au1550_mixer_fops = {
19770 + owner:THIS_MODULE,
19771 + llseek:au1550_llseek,
19772 + ioctl:au1550_ioctl_mixdev,
19773 + open:au1550_open_mixdev,
19774 + release:au1550_release_mixdev,
19775 +};
19776 +
19777 void
19778 -codec_init(void)
19779 +codec_init(struct au1550_state *s)
19780 {
19781 - wrcodec(0x1e, 0x00); /* Reset */
19782 - au1550_delay(200);
19783 - wrcodec(0x0c, 0x00); /* Power up everything */
19784 - au1550_delay(10);
19785 - wrcodec(0x12, 0x00); /* Deactivate codec */
19786 - au1550_delay(10);
19787 - wrcodec(0x08, 0x10); /* Select DAC outputs to line out */
19788 - au1550_delay(10);
19789 - wrcodec(0x0a, 0x00); /* Disable output mute */
19790 - au1550_delay(10);
19791 - wrcodec(0x05, 0x70); /* lower output volume on headphone */
19792 - au1550_delay(10);
19793 - wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */
19794 - au1550_delay(10);
19795 - wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */
19796 - au1550_delay(10);
19797 - wrcodec(0x12, 0x01); /* Activate codec */
19798 - au1550_delay(10);
19799 + wrcodec(WM_REG_RESET, 0x00); /* Reset */
19800 + wrcodec(WM_REG_POWER_DOWN_CTRL, 0x00); /* Power up everything */
19801 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00); /* Deactivate codec */
19802 + wrcodec(WM_REG_ANALOGUE_AUDIO_PATH_CTRL, 0x10); /* Select DAC outputs to line out */
19803 + wrcodec(WM_REG_DIGITAL_AUDIO_PATH_CTRL, 0x00); /* Disable output mute */
19804 + wm_i2s_write_mixer(s, SOUND_MIXER_PCM, 74, 74);
19805 + wrcodec(WM_REG_DIGITAL_AUDIO_IF, 0x02); /* Set slave, 16-bit, I2S modes */
19806 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01); /* Activate codec */
19807 }
19808
19809 /* stop the ADC before calling */
19810 @@ -256,27 +502,16 @@
19811 set_adc_rate(struct au1550_state *s, unsigned rate)
19812 {
19813 struct dmabuf *adc = &s->dma_adc;
19814 - struct dmabuf *dac = &s->dma_dac;
19815
19816 - if (s->no_vra) {
19817 - /* calc SRC factor
19818 - */
19819 + #if defined(WM_MODE_USB)
19820 adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
19821 adc->sample_rate = SAMP_RATE / adc->src_factor;
19822 return;
19823 - }
19824 + #else
19825 + //TODO: Need code for normal mode
19826 + #endif
19827
19828 adc->src_factor = 1;
19829 -
19830 -
19831 -#if 0
19832 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
19833 -
19834 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
19835 -
19836 - adc->sample_rate = rate;
19837 - dac->sample_rate = rate;
19838 -#endif
19839 }
19840
19841 /* stop the DAC before calling */
19842 @@ -284,26 +519,89 @@
19843 set_dac_rate(struct au1550_state *s, unsigned rate)
19844 {
19845 struct dmabuf *dac = &s->dma_dac;
19846 - struct dmabuf *adc = &s->dma_adc;
19847
19848 - if (s->no_vra) {
19849 - /* calc SRC factor
19850 - */
19851 - dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
19852 - dac->sample_rate = SAMP_RATE / dac->src_factor;
19853 - return;
19854 + u16 sr, ws, div, bosr, mode;
19855 + volatile psc_i2s_t* ip = (volatile psc_i2s_t *)I2S_PSC_BASE;
19856 + u32 cfg;
19857 +
19858 + #if defined(CONFIG_MIPS_FICMMP)
19859 + rate = ficmmp_set_i2s_sample_rate(rate);
19860 + #endif
19861 +
19862 + switch(rate)
19863 + {
19864 + case 96000:
19865 + sr = WM_SC_SR_96000;
19866 + ws = WS_64FS;
19867 + div = PSC_I2SCFG_DIV2;
19868 + break;
19869 + case 88200:
19870 + sr = WM_SC_SR_88200;
19871 + ws = WS_64FS;
19872 + div = PSC_I2SCFG_DIV2;
19873 + break;
19874 + case 44100:
19875 + sr = WM_SC_SR_44100;
19876 + ws = WS_128FS;
19877 + div = PSC_I2SCFG_DIV2;
19878 + break;
19879 + case 48000:
19880 + sr = WM_SC_SR_48000;
19881 + ws = WS_128FS;
19882 + div = PSC_I2SCFG_DIV2;
19883 + break;
19884 + case 32000:
19885 + sr = WM_SC_SR_32000;
19886 + ws = WS_96FS;
19887 + div = PSC_I2SCFG_DIV4;
19888 + break;
19889 + case 8018:
19890 + sr = WM_SC_SR_8018;
19891 + ws = WS_128FS;
19892 + div = PSC_I2SCFG_DIV2;
19893 + break;
19894 + case 8000:
19895 + default:
19896 + sr = WM_SC_SR_8000;
19897 + ws = WS_96FS;
19898 + div = PSC_I2SCFG_DIV16;
19899 + break;
19900 }
19901
19902 + #if defined(WM_MODE_USB)
19903 + mode = WM_SC_MODE_USB;
19904 + #else
19905 + mode = WM_SC_MODE_NORMAL;
19906 + #endif
19907 +
19908 + bosr = 0;
19909 +
19910 dac->src_factor = 1;
19911 + dac->sample_rate = rate;
19912
19913 -#if 0
19914 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
19915 + /* Deactivate codec */
19916 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00);
19917
19918 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
19919 + /* Disable I2S controller */
19920 + ip->psc_i2scfg &= ~PSC_I2SCFG_DE_ENABLE;
19921 + /* Wait for device disabled */
19922 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 1);
19923 +
19924 + cfg = ip->psc_i2scfg;
19925 + /* Clear WS and DIVIDER values */
19926 + cfg &= ~(PSC_I2SCFG_WS_MASK | PSC_I2SCFG_DIV_MASK);
19927 + cfg |= PSC_I2SCFG_WS(ws) | div;
19928 + /* Reconfigure and enable */
19929 + ip->psc_i2scfg = cfg | PSC_I2SCFG_DE_ENABLE;
19930
19931 - adc->sample_rate = rate;
19932 - dac->sample_rate = rate;
19933 -#endif
19934 + /* Wait for device enabled */
19935 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 0);
19936 +
19937 + /* Set appropriate sampling rate */
19938 + wrcodec(WM_REG_SAMPLING_CONTROL, bosr | mode | sr);
19939 +
19940 + /* Activate codec */
19941 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01);
19942 }
19943
19944 static void
19945 @@ -354,8 +652,7 @@
19946 ip->psc_i2spcr = PSC_I2SPCR_RP;
19947 au_sync();
19948
19949 - /* Wait for Receive Busy to show disabled.
19950 - */
19951 + /* Wait for Receive Busy to show disabled. */
19952 do {
19953 stat = ip->psc_i2sstat;
19954 au_sync();
19955 @@ -463,7 +760,6 @@
19956 if (db->num_channels == 1)
19957 db->cnt_factor *= 2;
19958 db->cnt_factor *= db->src_factor;
19959 -
19960 db->count = 0;
19961 db->dma_qcount = 0;
19962 db->nextIn = db->nextOut = db->rawbuf;
19963 @@ -546,12 +842,13 @@
19964 if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF))
19965 dbg("I2S status = 0x%08x", i2s_stat);
19966 #endif
19967 +
19968 db->dma_qcount--;
19969
19970 if (db->count >= db->fragsize) {
19971 - if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
19972 - db->fragsize) == 0) {
19973 - err("qcount < 2 and no ring room!");
19974 + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, db->fragsize) == 0)
19975 + {
19976 + err("qcount < MIN_Q_COUNT and no ring room!");
19977 }
19978 db->nextOut += db->fragsize;
19979 if (db->nextOut >= db->rawbuf + db->dmasize)
19980 @@ -606,65 +903,43 @@
19981
19982 }
19983
19984 -static loff_t
19985 -au1550_llseek(struct file *file, loff_t offset, int origin)
19986 -{
19987 - return -ESPIPE;
19988 -}
19989 -
19990 -
19991 -#if 0
19992 -static int
19993 -au1550_open_mixdev(struct inode *inode, struct file *file)
19994 -{
19995 - file->private_data = &au1550_state;
19996 - return 0;
19997 -}
19998 -
19999 -static int
20000 -au1550_release_mixdev(struct inode *inode, struct file *file)
20001 -{
20002 - return 0;
20003 -}
20004 -
20005 -static int
20006 -mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
20007 - unsigned long arg)
20008 -{
20009 - return codec->mixer_ioctl(codec, cmd, arg);
20010 -}
20011 -
20012 -static int
20013 -au1550_ioctl_mixdev(struct inode *inode, struct file *file,
20014 - unsigned int cmd, unsigned long arg)
20015 -{
20016 - struct au1550_state *s = (struct au1550_state *)file->private_data;
20017 - struct ac97_codec *codec = s->codec;
20018 -
20019 - return mixdev_ioctl(codec, cmd, arg);
20020 -}
20021 -
20022 -static /*const */ struct file_operations au1550_mixer_fops = {
20023 - owner:THIS_MODULE,
20024 - llseek:au1550_llseek,
20025 - ioctl:au1550_ioctl_mixdev,
20026 - open:au1550_open_mixdev,
20027 - release:au1550_release_mixdev,
20028 -};
20029 -#endif
20030 -
20031 static int
20032 drain_dac(struct au1550_state *s, int nonblock)
20033 {
20034 unsigned long flags;
20035 int count, tmo;
20036
20037 + struct dmabuf *db = &s->dma_dac;
20038 +
20039 + //DPRINTF();
20040 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
20041 return 0;
20042
20043 for (;;) {
20044 spin_lock_irqsave(&s->lock, flags);
20045 - count = s->dma_dac.count;
20046 + count = db->count;
20047 +
20048 + /* Pad the ddma buffer with zeros if the amount remaining
20049 + * is not a multiple of fragsize */
20050 + if(count % db->fragsize != 0)
20051 + {
20052 + int pad = db->fragsize - (count % db->fragsize);
20053 + char* bufptr = db->nextIn;
20054 + char* bufend = db->rawbuf + db->dmasize;
20055 +
20056 + if((bufend - bufptr) < pad)
20057 + printk("Error! ddma padding is bigger than available ring space!\n");
20058 + else
20059 + {
20060 + memset((void*)bufptr, 0, pad);
20061 + count += pad;
20062 + db->nextIn += pad;
20063 + db->count += pad;
20064 + if (db->dma_qcount == 0)
20065 + start_dac(s);
20066 + db->dma_qcount++;
20067 + }
20068 + }
20069 spin_unlock_irqrestore(&s->lock, flags);
20070 if (count <= 0)
20071 break;
20072 @@ -672,9 +947,9 @@
20073 break;
20074 if (nonblock)
20075 return -EBUSY;
20076 - tmo = 1000 * count / (s->no_vra ?
20077 - SAMP_RATE : s->dma_dac.sample_rate);
20078 + tmo = 1000 * count / s->dma_dac.sample_rate;
20079 tmo /= s->dma_dac.dma_bytes_per_sample;
20080 +
20081 au1550_delay(tmo);
20082 }
20083 if (signal_pending(current))
20084 @@ -698,8 +973,7 @@
20085 * If interpolating (no VRA), duplicate every audio frame src_factor times.
20086 */
20087 static int
20088 -translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
20089 - int dmacount)
20090 +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, int dmacount)
20091 {
20092 int sample, i;
20093 int interp_bytes_per_sample;
20094 @@ -737,11 +1011,12 @@
20095
20096 /* duplicate every audio frame src_factor times
20097 */
20098 - for (i = 0; i < db->src_factor; i++)
20099 + for (i = 0; i < db->src_factor; i++) {
20100 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
20101 + dmabuf += interp_bytes_per_sample;
20102 + }
20103
20104 userbuf += db->user_bytes_per_sample;
20105 - dmabuf += interp_bytes_per_sample;
20106 }
20107
20108 return num_samples * interp_bytes_per_sample;
20109 @@ -996,15 +1271,14 @@
20110 * on the dma queue. If the queue count reaches zero,
20111 * we know the dma has stopped.
20112 */
20113 - while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
20114 + while ((db->dma_qcount < MIN_Q_COUNT) && (db->count >= db->fragsize)) {
20115 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20116 db->fragsize) == 0) {
20117 - err("qcount < 2 and no ring room!");
20118 + err("qcount < MIN_Q_COUNT and no ring room!");
20119 }
20120 db->nextOut += db->fragsize;
20121 if (db->nextOut >= db->rawbuf + db->dmasize)
20122 db->nextOut -= db->dmasize;
20123 - db->count -= db->fragsize;
20124 db->total_bytes += db->dma_fragsize;
20125 if (db->dma_qcount == 0)
20126 start_dac(s);
20127 @@ -1017,7 +1291,6 @@
20128 buffer += usercnt;
20129 ret += usercnt;
20130 } /* while (count > 0) */
20131 -
20132 out:
20133 up(&s->sem);
20134 out2:
20135 @@ -1371,9 +1644,6 @@
20136 s->dma_dac.cnt_factor;
20137 abinfo.fragstotal = s->dma_dac.numfrag;
20138 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
20139 -#ifdef AU1000_VERBOSE_DEBUG
20140 - dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
20141 -#endif
20142 return copy_to_user((void *) arg, &abinfo,
20143 sizeof(abinfo)) ? -EFAULT : 0;
20144
20145 @@ -1536,13 +1806,9 @@
20146 case SNDCTL_DSP_SETSYNCRO:
20147 case SOUND_PCM_READ_FILTER:
20148 return -EINVAL;
20149 + default: break;
20150 }
20151 -
20152 -#if 0
20153 - return mixdev_ioctl(s->codec, cmd, arg);
20154 -#else
20155 return 0;
20156 -#endif
20157 }
20158
20159
20160 @@ -1664,15 +1930,15 @@
20161 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
20162 MODULE_DESCRIPTION("Au1550 Audio Driver");
20163
20164 +#if defined(WM_MODE_USB)
20165 /* Set up an internal clock for the PSC3. This will then get
20166 * driven out of the Au1550 as the master.
20167 */
20168 static void
20169 intclk_setup(void)
20170 {
20171 - uint clk, rate, stat;
20172 -
20173 - /* Wire up Freq4 as a clock for the PSC3.
20174 + uint clk, rate;
20175 + /* Wire up Freq4 as a clock for the PSC.
20176 * We know SMBus uses Freq3.
20177 * By making changes to this rate, plus the word strobe
20178 * size, we can make fine adjustments to the actual data rate.
20179 @@ -1700,11 +1966,17 @@
20180 */
20181 clk = au_readl(SYS_CLKSRC);
20182 au_sync();
20183 +#if defined(CONFIG_SOC_AU1550)
20184 clk &= ~0x01f00000;
20185 clk |= (6 << 22);
20186 +#elif defined(CONFIG_SOC_AU1200)
20187 + clk &= ~0x3e000000;
20188 + clk |= (6 << 27);
20189 +#endif
20190 au_writel(clk, SYS_CLKSRC);
20191 au_sync();
20192 }
20193 +#endif
20194
20195 static int __devinit
20196 au1550_probe(void)
20197 @@ -1724,6 +1996,11 @@
20198 init_MUTEX(&s->open_sem);
20199 spin_lock_init(&s->lock);
20200
20201 + /* CPLD Mux for I2s */
20202 +
20203 +#if defined(CONFIG_MIPS_PB1200)
20204 + bcsr->resets |= BCSR_RESETS_PCS1MUX;
20205 +#endif
20206
20207 s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE;
20208 ip = s->psc_addr;
20209 @@ -1765,9 +2042,8 @@
20210
20211 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
20212 goto err_dev1;
20213 -#if 0
20214 - if ((s->codec->dev_mixer =
20215 - register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
20216 +#if 1
20217 + if ((s->dev_mixer = register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
20218 goto err_dev2;
20219 #endif
20220
20221 @@ -1777,7 +2053,6 @@
20222 proc_au1550_dump, NULL);
20223 #endif /* AU1550_DEBUG */
20224
20225 - intclk_setup();
20226
20227 /* The GPIO for the appropriate PSC was configured by the
20228 * board specific start up.
20229 @@ -1786,7 +2061,12 @@
20230 */
20231 ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */
20232 au_sync();
20233 +#if defined(WM_MODE_USB)
20234 + intclk_setup();
20235 ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE);
20236 +#else
20237 + ip->psc_sel = (PSC_SEL_CLK_EXTCLK | PSC_SEL_PS_I2SMODE);
20238 +#endif
20239 au_sync();
20240
20241 /* Enable PSC
20242 @@ -1806,42 +2086,18 @@
20243 * Actual I2S mode (first bit delayed by one clock).
20244 * Master mode (We provide the clock from the PSC).
20245 */
20246 - val = PSC_I2SCFG_SET_LEN(16);
20247 -#ifdef TRY_441KHz
20248 - /* This really should be 250, but it appears that all of the
20249 - * PLLs, dividers and so on in the chain shift it. That's the
20250 - * problem with sourceing the clock instead of letting the very
20251 - * stable codec provide it. But, the PSC doesn't appear to want
20252 - * to work in slave mode, so this is what we get. It's not
20253 - * studio quality timing, but it's good enough for listening
20254 - * to mp3s.
20255 - */
20256 - val |= PSC_I2SCFG_SET_WS(252);
20257 -#else
20258 - val |= PSC_I2SCFG_SET_WS(250);
20259 -#endif
20260 - val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
20261 +
20262 + val = PSC_I2SCFG_SET_LEN(16) | PSC_I2SCFG_WS(WS_128FS) | PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
20263 PSC_I2SCFG_BI | PSC_I2SCFG_XM;
20264
20265 - ip->psc_i2scfg = val;
20266 - au_sync();
20267 - val |= PSC_I2SCFG_DE_ENABLE;
20268 - ip->psc_i2scfg = val;
20269 - au_sync();
20270 + ip->psc_i2scfg = val | PSC_I2SCFG_DE_ENABLE;
20271
20272 - /* Wait for Device ready.
20273 - */
20274 - do {
20275 - val = ip->psc_i2sstat;
20276 - au_sync();
20277 - } while ((val & PSC_I2SSTAT_DR) == 0);
20278 + set_dac_rate(s, 8000); //Set default rate
20279
20280 - val = ip->psc_i2scfg;
20281 - au_sync();
20282 + codec_init(s);
20283
20284 - codec_init();
20285 + s->no_vra = vra ? 0 : 1;
20286
20287 - s->no_vra = 1;
20288 if (s->no_vra)
20289 info("no VRA, interpolating and decimating");
20290
20291 @@ -1866,6 +2122,8 @@
20292 err_dev2:
20293 unregister_sound_dsp(s->dev_audio);
20294 #endif
20295 + err_dev2:
20296 + unregister_sound_dsp(s->dev_audio);
20297 err_dev1:
20298 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
20299 err_dma2:
20300 diff -Nur linux-2.4.32-rc1/drivers/sound/au1550_psc.c linux-2.4.32-rc1.mips/drivers/sound/au1550_psc.c
20301 --- linux-2.4.32-rc1/drivers/sound/au1550_psc.c 2005-01-19 15:10:04.000000000 +0100
20302 +++ linux-2.4.32-rc1.mips/drivers/sound/au1550_psc.c 2005-01-30 09:01:28.000000000 +0100
20303 @@ -30,6 +30,7 @@
20304 * 675 Mass Ave, Cambridge, MA 02139, USA.
20305 *
20306 */
20307 +
20308 #include <linux/version.h>
20309 #include <linux/module.h>
20310 #include <linux/string.h>
20311 @@ -63,6 +64,14 @@
20312 #include <asm/db1x00.h>
20313 #endif
20314
20315 +#ifdef CONFIG_MIPS_PB1200
20316 +#include <asm/pb1200.h>
20317 +#endif
20318 +
20319 +#ifdef CONFIG_MIPS_DB1200
20320 +#include <asm/db1200.h>
20321 +#endif
20322 +
20323 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
20324
20325 #define AU1550_MODULE_NAME "Au1550 psc audio"
20326 @@ -521,7 +530,14 @@
20327 spin_unlock_irqrestore(&s->lock, flags);
20328 }
20329
20330 -
20331 +/*
20332 + NOTE: The xmit slots cannot be changed on the fly when in full-duplex
20333 + because the AC'97 block must be stopped/started. When using this driver
20334 + in full-duplex (in & out at the same time), the DMA engine will stop if
20335 + you disable the block.
20336 + TODO: change implementation to properly restart adc/dac after setting
20337 + xmit slots.
20338 +*/
20339 static void
20340 set_xmit_slots(int num_channels)
20341 {
20342 @@ -565,6 +581,14 @@
20343 } while ((stat & PSC_AC97STAT_DR) == 0);
20344 }
20345
20346 +/*
20347 + NOTE: The recv slots cannot be changed on the fly when in full-duplex
20348 + because the AC'97 block must be stopped/started. When using this driver
20349 + in full-duplex (in & out at the same time), the DMA engine will stop if
20350 + you disable the block.
20351 + TODO: change implementation to properly restart adc/dac after setting
20352 + recv slots.
20353 +*/
20354 static void
20355 set_recv_slots(int num_channels)
20356 {
20357 @@ -608,7 +632,6 @@
20358
20359 spin_lock_irqsave(&s->lock, flags);
20360
20361 - set_xmit_slots(db->num_channels);
20362 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
20363 au_sync();
20364 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
20365 @@ -640,7 +663,6 @@
20366 db->nextIn -= db->dmasize;
20367 }
20368
20369 - set_recv_slots(db->num_channels);
20370 au1xxx_dbdma_start(db->dmanr);
20371 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
20372 au_sync();
20373 @@ -752,12 +774,16 @@
20374 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
20375 dbg("AC97C status = 0x%08x", ac97c_stat);
20376 #endif
20377 + /* There is a possiblity that we are getting 1 interrupt for
20378 + multiple descriptors. Use ddma api to find out how many
20379 + completed.
20380 + */
20381 db->dma_qcount--;
20382
20383 if (db->count >= db->fragsize) {
20384 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20385 db->fragsize) == 0) {
20386 - err("qcount < 2 and no ring room!");
20387 + err("qcount < 2 and no ring room1!");
20388 }
20389 db->nextOut += db->fragsize;
20390 if (db->nextOut >= db->rawbuf + db->dmasize)
20391 @@ -941,11 +967,12 @@
20392
20393 /* duplicate every audio frame src_factor times
20394 */
20395 - for (i = 0; i < db->src_factor; i++)
20396 + for (i = 0; i < db->src_factor; i++) {
20397 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
20398 + dmabuf += interp_bytes_per_sample;
20399 + }
20400
20401 userbuf += db->user_bytes_per_sample;
20402 - dmabuf += interp_bytes_per_sample;
20403 }
20404
20405 return num_samples * interp_bytes_per_sample;
20406 @@ -1203,7 +1230,7 @@
20407 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
20408 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20409 db->fragsize) == 0) {
20410 - err("qcount < 2 and no ring room!");
20411 + err("qcount < 2 and no ring room!0");
20412 }
20413 db->nextOut += db->fragsize;
20414 if (db->nextOut >= db->rawbuf + db->dmasize)
20415 @@ -1481,6 +1508,7 @@
20416 return -EINVAL;
20417 stop_adc(s);
20418 s->dma_adc.num_channels = val;
20419 + set_recv_slots(val);
20420 if ((ret = prog_dmabuf_adc(s)))
20421 return ret;
20422 }
20423 @@ -1538,6 +1566,7 @@
20424 }
20425
20426 s->dma_dac.num_channels = val;
20427 + set_xmit_slots(val);
20428 if ((ret = prog_dmabuf_dac(s)))
20429 return ret;
20430 }
20431 @@ -1832,10 +1861,8 @@
20432 down(&s->open_sem);
20433 }
20434
20435 - stop_dac(s);
20436 - stop_adc(s);
20437 -
20438 if (file->f_mode & FMODE_READ) {
20439 + stop_adc(s);
20440 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
20441 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
20442 s->dma_adc.num_channels = 1;
20443 @@ -1846,6 +1873,7 @@
20444 }
20445
20446 if (file->f_mode & FMODE_WRITE) {
20447 + stop_dac(s);
20448 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
20449 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
20450 s->dma_dac.num_channels = 1;
20451 @@ -2091,6 +2119,9 @@
20452 ac97_read_proc, &s->codec);
20453 #endif
20454
20455 + set_xmit_slots(1);
20456 + set_recv_slots(1);
20457 +
20458 return 0;
20459
20460 err_dev3:
20461 diff -Nur linux-2.4.32-rc1/drivers/sound/Config.in linux-2.4.32-rc1.mips/drivers/sound/Config.in
20462 --- linux-2.4.32-rc1/drivers/sound/Config.in 2005-01-19 15:10:04.000000000 +0100
20463 +++ linux-2.4.32-rc1.mips/drivers/sound/Config.in 2005-04-21 07:53:07.000000000 +0200
20464 @@ -72,10 +72,15 @@
20465 if [ "$CONFIG_DDB5477" = "y" ]; then
20466 dep_tristate ' NEC Vrc5477 AC97 sound' CONFIG_SOUND_VRC5477 $CONFIG_SOUND
20467 fi
20468 -if [ "$CONFIG_SOC_AU1X00" = "y" -o "$CONFIG_SOC_AU1500" = "y" ]; then
20469 - dep_tristate ' Au1x00 Sound' CONFIG_SOUND_AU1X00 $CONFIG_SOUND
20470 - dep_tristate ' Au1550 PSC Sound' CONFIG_SOUND_AU1550_PSC $CONFIG_SOUND
20471 - dep_tristate ' Au1550 I2S Sound' CONFIG_SOUND_AU1550_I2S $CONFIG_SOUND
20472 +if [ "$CONFIG_SOC_AU1000" = "y" -o \
20473 + "$CONFIG_SOC_AU1500" = "y" -o \
20474 + "$CONFIG_SOC_AU1100" = "y" ]; then
20475 + dep_tristate ' Au1x00 AC97 Sound' CONFIG_SOUND_AU1X00 $CONFIG_SOUND
20476 +fi
20477 +if [ "$CONFIG_SOC_AU1550" = "y" -o \
20478 + "$CONFIG_SOC_AU1200" = "y" ]; then
20479 + dep_tristate ' Au1550/Au1200 PSC AC97 Sound' CONFIG_SOUND_AU1550_PSC $CONFIG_SOUND
20480 + dep_tristate ' Au1550/Au1200 PSC I2S Sound' CONFIG_SOUND_AU1550_I2S $CONFIG_SOUND
20481 fi
20482
20483 dep_tristate ' Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core' CONFIG_SOUND_TRIDENT $CONFIG_SOUND $CONFIG_PCI
20484 diff -Nur linux-2.4.32-rc1/drivers/tc/lk201.c linux-2.4.32-rc1.mips/drivers/tc/lk201.c
20485 --- linux-2.4.32-rc1/drivers/tc/lk201.c 2004-02-18 14:36:31.000000000 +0100
20486 +++ linux-2.4.32-rc1.mips/drivers/tc/lk201.c 2004-09-28 02:53:04.000000000 +0200
20487 @@ -5,7 +5,7 @@
20488 * for more details.
20489 *
20490 * Copyright (C) 1999-2002 Harald Koerfgen <hkoerfg@web.de>
20491 - * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
20492 + * Copyright (C) 2001, 2002, 2003, 2004 Maciej W. Rozycki
20493 */
20494
20495 #include <linux/config.h>
20496 @@ -23,8 +23,8 @@
20497 #include <asm/keyboard.h>
20498 #include <asm/dec/tc.h>
20499 #include <asm/dec/machtype.h>
20500 +#include <asm/dec/serial.h>
20501
20502 -#include "zs.h"
20503 #include "lk201.h"
20504
20505 /*
20506 @@ -55,19 +55,20 @@
20507 unsigned char kbd_sysrq_key = -1;
20508 #endif
20509
20510 -#define KEYB_LINE 3
20511 +#define KEYB_LINE_ZS 3
20512 +#define KEYB_LINE_DZ 0
20513
20514 -static int __init lk201_init(struct dec_serial *);
20515 -static void __init lk201_info(struct dec_serial *);
20516 -static void lk201_kbd_rx_char(unsigned char, unsigned char);
20517 +static int __init lk201_init(void *);
20518 +static void __init lk201_info(void *);
20519 +static void lk201_rx_char(unsigned char, unsigned char);
20520
20521 -struct zs_hook lk201_kbdhook = {
20522 +static struct dec_serial_hook lk201_hook = {
20523 .init_channel = lk201_init,
20524 .init_info = lk201_info,
20525 .rx_char = NULL,
20526 .poll_rx_char = NULL,
20527 .poll_tx_char = NULL,
20528 - .cflags = B4800 | CS8 | CSTOPB | CLOCAL
20529 + .cflags = B4800 | CS8 | CSTOPB | CLOCAL,
20530 };
20531
20532 /*
20533 @@ -93,28 +94,28 @@
20534 LK_CMD_ENB_BELL, LK_PARAM_VOLUME(4),
20535 };
20536
20537 -static struct dec_serial* lk201kbd_info;
20538 +static void *lk201_handle;
20539
20540 -static int lk201_send(struct dec_serial *info, unsigned char ch)
20541 +static int lk201_send(unsigned char ch)
20542 {
20543 - if (info->hook->poll_tx_char(info, ch)) {
20544 + if (lk201_hook.poll_tx_char(lk201_handle, ch)) {
20545 printk(KERN_ERR "lk201: transmit timeout\n");
20546 return -EIO;
20547 }
20548 return 0;
20549 }
20550
20551 -static inline int lk201_get_id(struct dec_serial *info)
20552 +static inline int lk201_get_id(void)
20553 {
20554 - return lk201_send(info, LK_CMD_REQ_ID);
20555 + return lk201_send(LK_CMD_REQ_ID);
20556 }
20557
20558 -static int lk201_reset(struct dec_serial *info)
20559 +static int lk201_reset(void)
20560 {
20561 int i, r;
20562
20563 for (i = 0; i < sizeof(lk201_reset_string); i++) {
20564 - r = lk201_send(info, lk201_reset_string[i]);
20565 + r = lk201_send(lk201_reset_string[i]);
20566 if (r < 0)
20567 return r;
20568 }
20569 @@ -203,24 +204,26 @@
20570
20571 static int write_kbd_rate(struct kbd_repeat *rep)
20572 {
20573 - struct dec_serial* info = lk201kbd_info;
20574 int delay, rate;
20575 int i;
20576
20577 delay = rep->delay / 5;
20578 rate = rep->rate;
20579 for (i = 0; i < 4; i++) {
20580 - if (info->hook->poll_tx_char(info, LK_CMD_RPT_RATE(i)))
20581 + if (lk201_hook.poll_tx_char(lk201_handle,
20582 + LK_CMD_RPT_RATE(i)))
20583 return 1;
20584 - if (info->hook->poll_tx_char(info, LK_PARAM_DELAY(delay)))
20585 + if (lk201_hook.poll_tx_char(lk201_handle,
20586 + LK_PARAM_DELAY(delay)))
20587 return 1;
20588 - if (info->hook->poll_tx_char(info, LK_PARAM_RATE(rate)))
20589 + if (lk201_hook.poll_tx_char(lk201_handle,
20590 + LK_PARAM_RATE(rate)))
20591 return 1;
20592 }
20593 return 0;
20594 }
20595
20596 -static int lk201kbd_rate(struct kbd_repeat *rep)
20597 +static int lk201_kbd_rate(struct kbd_repeat *rep)
20598 {
20599 if (rep == NULL)
20600 return -EINVAL;
20601 @@ -237,10 +240,8 @@
20602 return 0;
20603 }
20604
20605 -static void lk201kd_mksound(unsigned int hz, unsigned int ticks)
20606 +static void lk201_kd_mksound(unsigned int hz, unsigned int ticks)
20607 {
20608 - struct dec_serial* info = lk201kbd_info;
20609 -
20610 if (!ticks)
20611 return;
20612
20613 @@ -253,20 +254,19 @@
20614 ticks = 7;
20615 ticks = 7 - ticks;
20616
20617 - if (info->hook->poll_tx_char(info, LK_CMD_ENB_BELL))
20618 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_ENB_BELL))
20619 return;
20620 - if (info->hook->poll_tx_char(info, LK_PARAM_VOLUME(ticks)))
20621 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_VOLUME(ticks)))
20622 return;
20623 - if (info->hook->poll_tx_char(info, LK_CMD_BELL))
20624 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_BELL))
20625 return;
20626 }
20627
20628 void kbd_leds(unsigned char leds)
20629 {
20630 - struct dec_serial* info = lk201kbd_info;
20631 unsigned char l = 0;
20632
20633 - if (!info) /* FIXME */
20634 + if (!lk201_handle) /* FIXME */
20635 return;
20636
20637 /* FIXME -- Only Hold and Lock LEDs for now. --macro */
20638 @@ -275,13 +275,13 @@
20639 if (leds & LED_CAP)
20640 l |= LK_LED_LOCK;
20641
20642 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_ON))
20643 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_ON))
20644 return;
20645 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(l)))
20646 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(l)))
20647 return;
20648 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_OFF))
20649 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_OFF))
20650 return;
20651 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(~l)))
20652 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(~l)))
20653 return;
20654 }
20655
20656 @@ -307,7 +307,7 @@
20657 return 0x80;
20658 }
20659
20660 -static void lk201_kbd_rx_char(unsigned char ch, unsigned char stat)
20661 +static void lk201_rx_char(unsigned char ch, unsigned char fl)
20662 {
20663 static unsigned char id[6];
20664 static int id_i;
20665 @@ -316,9 +316,8 @@
20666 static int prev_scancode;
20667 unsigned char c = scancodeRemap[ch];
20668
20669 - if (stat && stat != TTY_OVERRUN) {
20670 - printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n",
20671 - stat);
20672 + if (fl != TTY_NORMAL && fl != TTY_OVERRUN) {
20673 + printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n", fl);
20674 return;
20675 }
20676
20677 @@ -335,7 +334,7 @@
20678 /* OK, the power-up concluded. */
20679 lk201_report(id);
20680 if (id[2] == LK_STAT_PWRUP_OK)
20681 - lk201_get_id(lk201kbd_info);
20682 + lk201_get_id();
20683 else {
20684 id_i = 0;
20685 printk(KERN_ERR "lk201: keyboard power-up "
20686 @@ -345,7 +344,7 @@
20687 /* We got the ID; report it and start operation. */
20688 id_i = 0;
20689 lk201_id(id);
20690 - lk201_reset(lk201kbd_info);
20691 + lk201_reset();
20692 }
20693 return;
20694 }
20695 @@ -398,29 +397,28 @@
20696 tasklet_schedule(&keyboard_tasklet);
20697 }
20698
20699 -static void __init lk201_info(struct dec_serial *info)
20700 +static void __init lk201_info(void *handle)
20701 {
20702 }
20703
20704 -static int __init lk201_init(struct dec_serial *info)
20705 +static int __init lk201_init(void *handle)
20706 {
20707 /* First install handlers. */
20708 - lk201kbd_info = info;
20709 - kbd_rate = lk201kbd_rate;
20710 - kd_mksound = lk201kd_mksound;
20711 + lk201_handle = handle;
20712 + kbd_rate = lk201_kbd_rate;
20713 + kd_mksound = lk201_kd_mksound;
20714
20715 - info->hook->rx_char = lk201_kbd_rx_char;
20716 + lk201_hook.rx_char = lk201_rx_char;
20717
20718 /* Then just issue a reset -- the handlers will do the rest. */
20719 - lk201_send(info, LK_CMD_POWER_UP);
20720 + lk201_send(LK_CMD_POWER_UP);
20721
20722 return 0;
20723 }
20724
20725 void __init kbd_init_hw(void)
20726 {
20727 - extern int register_zs_hook(unsigned int, struct zs_hook *);
20728 - extern int unregister_zs_hook(unsigned int);
20729 + int keyb_line;
20730
20731 /* Maxine uses LK501 at the Access.Bus. */
20732 if (!LK_IFACE)
20733 @@ -428,19 +426,15 @@
20734
20735 printk(KERN_INFO "lk201: DECstation LK keyboard driver v0.05.\n");
20736
20737 - if (LK_IFACE_ZS) {
20738 - /*
20739 - * kbd_init_hw() is being called before
20740 - * rs_init() so just register the kbd hook
20741 - * and let zs_init do the rest :-)
20742 - */
20743 - if(!register_zs_hook(KEYB_LINE, &lk201_kbdhook))
20744 - unregister_zs_hook(KEYB_LINE);
20745 - } else {
20746 - /*
20747 - * TODO: modify dz.c to allow similar hooks
20748 - * for LK201 handling on DS2100, DS3100, and DS5000/200
20749 - */
20750 - printk(KERN_ERR "lk201: support for DZ11 not yet ready.\n");
20751 - }
20752 + /*
20753 + * kbd_init_hw() is being called before
20754 + * rs_init() so just register the kbd hook
20755 + * and let zs_init do the rest :-)
20756 + */
20757 + if (LK_IFACE_ZS)
20758 + keyb_line = KEYB_LINE_ZS;
20759 + else
20760 + keyb_line = KEYB_LINE_DZ;
20761 + if (!register_dec_serial_hook(keyb_line, &lk201_hook))
20762 + unregister_dec_serial_hook(keyb_line);
20763 }
20764 diff -Nur linux-2.4.32-rc1/drivers/tc/zs.c linux-2.4.32-rc1.mips/drivers/tc/zs.c
20765 --- linux-2.4.32-rc1/drivers/tc/zs.c 2005-01-19 15:10:05.000000000 +0100
20766 +++ linux-2.4.32-rc1.mips/drivers/tc/zs.c 2004-12-27 05:13:50.000000000 +0100
20767 @@ -68,6 +68,8 @@
20768 #include <asm/bitops.h>
20769 #include <asm/uaccess.h>
20770 #include <asm/bootinfo.h>
20771 +#include <asm/dec/serial.h>
20772 +
20773 #ifdef CONFIG_DECSTATION
20774 #include <asm/dec/interrupts.h>
20775 #include <asm/dec/machtype.h>
20776 @@ -160,8 +162,8 @@
20777 #ifdef CONFIG_SERIAL_DEC_CONSOLE
20778 static struct console sercons;
20779 #endif
20780 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) \
20781 - && !defined(MODULE)
20782 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20783 + !defined(MODULE)
20784 static unsigned long break_pressed; /* break, really ... */
20785 #endif
20786
20787 @@ -196,7 +198,6 @@
20788 /*
20789 * Debugging.
20790 */
20791 -#undef SERIAL_DEBUG_INTR
20792 #undef SERIAL_DEBUG_OPEN
20793 #undef SERIAL_DEBUG_FLOW
20794 #undef SERIAL_DEBUG_THROTTLE
20795 @@ -221,10 +222,6 @@
20796 static struct termios *serial_termios[NUM_CHANNELS];
20797 static struct termios *serial_termios_locked[NUM_CHANNELS];
20798
20799 -#ifndef MIN
20800 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
20801 -#endif
20802 -
20803 /*
20804 * tmp_buf is used as a temporary buffer by serial_write. We need to
20805 * lock it in case the copy_from_user blocks while swapping in a page,
20806 @@ -386,8 +383,6 @@
20807 * -----------------------------------------------------------------------
20808 */
20809
20810 -static int tty_break; /* Set whenever BREAK condition is detected. */
20811 -
20812 /*
20813 * This routine is used by the interrupt handler to schedule
20814 * processing in the software interrupt portion of the driver.
20815 @@ -414,20 +409,15 @@
20816 if (!tty && (!info->hook || !info->hook->rx_char))
20817 continue;
20818
20819 - if (tty_break) {
20820 - tty_break = 0;
20821 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20822 - if (info->line == sercons.index) {
20823 - if (!break_pressed) {
20824 - break_pressed = jiffies;
20825 - goto ignore_char;
20826 - }
20827 - break_pressed = 0;
20828 - }
20829 -#endif
20830 + flag = TTY_NORMAL;
20831 + if (info->tty_break) {
20832 + info->tty_break = 0;
20833 flag = TTY_BREAK;
20834 if (info->flags & ZILOG_SAK)
20835 do_SAK(tty);
20836 + /* Ignore the null char got when BREAK is removed. */
20837 + if (ch == 0)
20838 + continue;
20839 } else {
20840 if (stat & Rx_OVR) {
20841 flag = TTY_OVERRUN;
20842 @@ -435,20 +425,22 @@
20843 flag = TTY_FRAME;
20844 } else if (stat & PAR_ERR) {
20845 flag = TTY_PARITY;
20846 - } else
20847 - flag = 0;
20848 - if (flag)
20849 + }
20850 + if (flag != TTY_NORMAL)
20851 /* reset the error indication */
20852 write_zsreg(info->zs_channel, R0, ERR_RES);
20853 }
20854
20855 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20856 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20857 + !defined(MODULE)
20858 if (break_pressed && info->line == sercons.index) {
20859 - if (ch != 0 &&
20860 - time_before(jiffies, break_pressed + HZ*5)) {
20861 + /* Ignore the null char got when BREAK is removed. */
20862 + if (ch == 0)
20863 + continue;
20864 + if (time_before(jiffies, break_pressed + HZ * 5)) {
20865 handle_sysrq(ch, regs, NULL, NULL);
20866 break_pressed = 0;
20867 - goto ignore_char;
20868 + continue;
20869 }
20870 break_pressed = 0;
20871 }
20872 @@ -459,23 +451,7 @@
20873 return;
20874 }
20875
20876 - if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
20877 - static int flip_buf_ovf;
20878 - ++flip_buf_ovf;
20879 - continue;
20880 - }
20881 - tty->flip.count++;
20882 - {
20883 - static int flip_max_cnt;
20884 - if (flip_max_cnt < tty->flip.count)
20885 - flip_max_cnt = tty->flip.count;
20886 - }
20887 -
20888 - *tty->flip.flag_buf_ptr++ = flag;
20889 - *tty->flip.char_buf_ptr++ = ch;
20890 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20891 - ignore_char:
20892 -#endif
20893 + tty_insert_flip_char(tty, ch, flag);
20894 }
20895 if (tty)
20896 tty_flip_buffer_push(tty);
20897 @@ -517,11 +493,15 @@
20898 /* Get status from Read Register 0 */
20899 stat = read_zsreg(info->zs_channel, R0);
20900
20901 - if (stat & BRK_ABRT) {
20902 -#ifdef SERIAL_DEBUG_INTR
20903 - printk("handling break....");
20904 + if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
20905 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20906 + !defined(MODULE)
20907 + if (info->line == sercons.index) {
20908 + if (!break_pressed)
20909 + break_pressed = jiffies;
20910 + } else
20911 #endif
20912 - tty_break = 1;
20913 + info->tty_break = 1;
20914 }
20915
20916 if (info->zs_channel != info->zs_chan_a) {
20917 @@ -957,7 +937,7 @@
20918 save_flags(flags);
20919 while (1) {
20920 cli();
20921 - c = MIN(count, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20922 + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20923 SERIAL_XMIT_SIZE - info->xmit_head));
20924 if (c <= 0)
20925 break;
20926 @@ -965,7 +945,7 @@
20927 if (from_user) {
20928 down(&tmp_buf_sem);
20929 copy_from_user(tmp_buf, buf, c);
20930 - c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20931 + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20932 SERIAL_XMIT_SIZE - info->xmit_head));
20933 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
20934 up(&tmp_buf_sem);
20935 @@ -1282,46 +1262,48 @@
20936 }
20937
20938 switch (cmd) {
20939 - case TIOCMGET:
20940 - error = verify_area(VERIFY_WRITE, (void *) arg,
20941 - sizeof(unsigned int));
20942 - if (error)
20943 - return error;
20944 - return get_modem_info(info, (unsigned int *) arg);
20945 - case TIOCMBIS:
20946 - case TIOCMBIC:
20947 - case TIOCMSET:
20948 - return set_modem_info(info, cmd, (unsigned int *) arg);
20949 - case TIOCGSERIAL:
20950 - error = verify_area(VERIFY_WRITE, (void *) arg,
20951 - sizeof(struct serial_struct));
20952 - if (error)
20953 - return error;
20954 - return get_serial_info(info,
20955 - (struct serial_struct *) arg);
20956 - case TIOCSSERIAL:
20957 - return set_serial_info(info,
20958 - (struct serial_struct *) arg);
20959 - case TIOCSERGETLSR: /* Get line status register */
20960 - error = verify_area(VERIFY_WRITE, (void *) arg,
20961 - sizeof(unsigned int));
20962 - if (error)
20963 - return error;
20964 - else
20965 - return get_lsr_info(info, (unsigned int *) arg);
20966 + case TIOCMGET:
20967 + error = verify_area(VERIFY_WRITE, (void *)arg,
20968 + sizeof(unsigned int));
20969 + if (error)
20970 + return error;
20971 + return get_modem_info(info, (unsigned int *)arg);
20972
20973 - case TIOCSERGSTRUCT:
20974 - error = verify_area(VERIFY_WRITE, (void *) arg,
20975 - sizeof(struct dec_serial));
20976 - if (error)
20977 - return error;
20978 - copy_from_user((struct dec_serial *) arg,
20979 - info, sizeof(struct dec_serial));
20980 - return 0;
20981 + case TIOCMBIS:
20982 + case TIOCMBIC:
20983 + case TIOCMSET:
20984 + return set_modem_info(info, cmd, (unsigned int *)arg);
20985
20986 - default:
20987 - return -ENOIOCTLCMD;
20988 - }
20989 + case TIOCGSERIAL:
20990 + error = verify_area(VERIFY_WRITE, (void *)arg,
20991 + sizeof(struct serial_struct));
20992 + if (error)
20993 + return error;
20994 + return get_serial_info(info, (struct serial_struct *)arg);
20995 +
20996 + case TIOCSSERIAL:
20997 + return set_serial_info(info, (struct serial_struct *)arg);
20998 +
20999 + case TIOCSERGETLSR: /* Get line status register */
21000 + error = verify_area(VERIFY_WRITE, (void *)arg,
21001 + sizeof(unsigned int));
21002 + if (error)
21003 + return error;
21004 + else
21005 + return get_lsr_info(info, (unsigned int *)arg);
21006 +
21007 + case TIOCSERGSTRUCT:
21008 + error = verify_area(VERIFY_WRITE, (void *)arg,
21009 + sizeof(struct dec_serial));
21010 + if (error)
21011 + return error;
21012 + copy_from_user((struct dec_serial *)arg, info,
21013 + sizeof(struct dec_serial));
21014 + return 0;
21015 +
21016 + default:
21017 + return -ENOIOCTLCMD;
21018 + }
21019 return 0;
21020 }
21021
21022 @@ -1446,7 +1428,8 @@
21023 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
21024 {
21025 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
21026 - unsigned long orig_jiffies, char_time;
21027 + unsigned long orig_jiffies;
21028 + int char_time;
21029
21030 if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
21031 return;
21032 @@ -1462,7 +1445,7 @@
21033 if (char_time == 0)
21034 char_time = 1;
21035 if (timeout)
21036 - char_time = MIN(char_time, timeout);
21037 + char_time = min(char_time, timeout);
21038 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
21039 current->state = TASK_INTERRUPTIBLE;
21040 schedule_timeout(char_time);
21041 @@ -1714,7 +1697,7 @@
21042
21043 static void __init show_serial_version(void)
21044 {
21045 - printk("DECstation Z8530 serial driver version 0.08\n");
21046 + printk("DECstation Z8530 serial driver version 0.09\n");
21047 }
21048
21049 /* Initialize Z8530s zs_channels
21050 @@ -1994,8 +1977,9 @@
21051 * polling I/O routines
21052 */
21053 static int
21054 -zs_poll_tx_char(struct dec_serial *info, unsigned char ch)
21055 +zs_poll_tx_char(void *handle, unsigned char ch)
21056 {
21057 + struct dec_serial *info = handle;
21058 struct dec_zschannel *chan = info->zs_channel;
21059 int ret;
21060
21061 @@ -2017,8 +2001,9 @@
21062 }
21063
21064 static int
21065 -zs_poll_rx_char(struct dec_serial *info)
21066 +zs_poll_rx_char(void *handle)
21067 {
21068 + struct dec_serial *info = handle;
21069 struct dec_zschannel *chan = info->zs_channel;
21070 int ret;
21071
21072 @@ -2038,12 +2023,13 @@
21073 return -ENODEV;
21074 }
21075
21076 -unsigned int register_zs_hook(unsigned int channel, struct zs_hook *hook)
21077 +int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
21078 {
21079 struct dec_serial *info = &zs_soft[channel];
21080
21081 if (info->hook) {
21082 - printk(__FUNCTION__": line %d has already a hook registered\n", channel);
21083 + printk("%s: line %d has already a hook registered\n",
21084 + __FUNCTION__, channel);
21085
21086 return 0;
21087 } else {
21088 @@ -2055,7 +2041,7 @@
21089 }
21090 }
21091
21092 -unsigned int unregister_zs_hook(unsigned int channel)
21093 +int unregister_zs_hook(unsigned int channel)
21094 {
21095 struct dec_serial *info = &zs_soft[channel];
21096
21097 @@ -2063,8 +2049,8 @@
21098 info->hook = NULL;
21099 return 1;
21100 } else {
21101 - printk(__FUNCTION__": trying to unregister hook on line %d,"
21102 - " but none is registered\n", channel);
21103 + printk("%s: trying to unregister hook on line %d,"
21104 + " but none is registered\n", __FUNCTION__, channel);
21105 return 0;
21106 }
21107 }
21108 @@ -2319,22 +2305,23 @@
21109 write_zsreg(chan, 9, nine);
21110 }
21111
21112 -static int kgdbhook_init_channel(struct dec_serial* info)
21113 +static int kgdbhook_init_channel(void *handle)
21114 {
21115 return 0;
21116 }
21117
21118 -static void kgdbhook_init_info(struct dec_serial* info)
21119 +static void kgdbhook_init_info(void *handle)
21120 {
21121 }
21122
21123 -static void kgdbhook_rx_char(struct dec_serial* info,
21124 - unsigned char ch, unsigned char stat)
21125 +static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
21126 {
21127 + struct dec_serial *info = handle;
21128 +
21129 + if (fl != TTY_NORMAL)
21130 + return;
21131 if (ch == 0x03 || ch == '$')
21132 breakpoint();
21133 - if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
21134 - write_zsreg(info->zs_channel, 0, ERR_RES);
21135 }
21136
21137 /* This sets up the serial port we're using, and turns on
21138 @@ -2360,11 +2347,11 @@
21139 * for /dev/ttyb which is determined in setup_arch() from the
21140 * boot command line flags.
21141 */
21142 -struct zs_hook zs_kgdbhook = {
21143 - init_channel : kgdbhook_init_channel,
21144 - init_info : kgdbhook_init_info,
21145 - cflags : B38400|CS8|CLOCAL,
21146 - rx_char : kgdbhook_rx_char,
21147 +struct dec_serial_hook zs_kgdbhook = {
21148 + .init_channel = kgdbhook_init_channel,
21149 + .init_info = kgdbhook_init_info,
21150 + .rx_char = kgdbhook_rx_char,
21151 + .cflags = B38400 | CS8 | CLOCAL,
21152 }
21153
21154 void __init zs_kgdb_hook(int tty_num)
21155 diff -Nur linux-2.4.32-rc1/drivers/tc/zs.h linux-2.4.32-rc1.mips/drivers/tc/zs.h
21156 --- linux-2.4.32-rc1/drivers/tc/zs.h 2004-02-18 14:36:31.000000000 +0100
21157 +++ linux-2.4.32-rc1.mips/drivers/tc/zs.h 2004-07-01 15:28:54.000000000 +0200
21158 @@ -1,14 +1,18 @@
21159 /*
21160 - * macserial.h: Definitions for the Macintosh Z8530 serial driver.
21161 + * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
21162 *
21163 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
21164 + * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
21165 *
21166 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
21167 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
21168 + * Copyright (C) 2004 Maciej W. Rozycki
21169 */
21170 #ifndef _DECSERIAL_H
21171 #define _DECSERIAL_H
21172
21173 +#include <asm/dec/serial.h>
21174 +
21175 #define NUM_ZSREGS 16
21176
21177 struct serial_struct {
21178 @@ -89,63 +93,50 @@
21179 unsigned char curregs[NUM_ZSREGS];
21180 };
21181
21182 -struct dec_serial;
21183 -
21184 -struct zs_hook {
21185 - int (*init_channel)(struct dec_serial* info);
21186 - void (*init_info)(struct dec_serial* info);
21187 - void (*rx_char)(unsigned char ch, unsigned char stat);
21188 - int (*poll_rx_char)(struct dec_serial* info);
21189 - int (*poll_tx_char)(struct dec_serial* info,
21190 - unsigned char ch);
21191 - unsigned cflags;
21192 -};
21193 -
21194 struct dec_serial {
21195 - struct dec_serial *zs_next; /* For IRQ servicing chain */
21196 - struct dec_zschannel *zs_channel; /* Channel registers */
21197 - struct dec_zschannel *zs_chan_a; /* A side registers */
21198 - unsigned char read_reg_zero;
21199 -
21200 - char soft_carrier; /* Use soft carrier on this channel */
21201 - char break_abort; /* Is serial console in, so process brk/abrt */
21202 - struct zs_hook *hook; /* Hook on this channel */
21203 - char is_cons; /* Is this our console. */
21204 - unsigned char tx_active; /* character is being xmitted */
21205 - unsigned char tx_stopped; /* output is suspended */
21206 -
21207 - /* We need to know the current clock divisor
21208 - * to read the bps rate the chip has currently
21209 - * loaded.
21210 + struct dec_serial *zs_next; /* For IRQ servicing chain. */
21211 + struct dec_zschannel *zs_channel; /* Channel registers. */
21212 + struct dec_zschannel *zs_chan_a; /* A side registers. */
21213 + unsigned char read_reg_zero;
21214 +
21215 + struct dec_serial_hook *hook; /* Hook on this channel. */
21216 + int tty_break; /* Set on BREAK condition. */
21217 + int is_cons; /* Is this our console. */
21218 + int tx_active; /* Char is being xmitted. */
21219 + int tx_stopped; /* Output is suspended. */
21220 +
21221 + /*
21222 + * We need to know the current clock divisor
21223 + * to read the bps rate the chip has currently loaded.
21224 */
21225 - unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
21226 - int zs_baud;
21227 + int clk_divisor; /* May be 1, 16, 32, or 64. */
21228 + int zs_baud;
21229
21230 - char change_needed;
21231 + char change_needed;
21232
21233 int magic;
21234 int baud_base;
21235 int port;
21236 int irq;
21237 - int flags; /* defined in tty.h */
21238 - int type; /* UART type */
21239 + int flags; /* Defined in tty.h. */
21240 + int type; /* UART type. */
21241 struct tty_struct *tty;
21242 int read_status_mask;
21243 int ignore_status_mask;
21244 int timeout;
21245 int xmit_fifo_size;
21246 int custom_divisor;
21247 - int x_char; /* xon/xoff character */
21248 + int x_char; /* XON/XOFF character. */
21249 int close_delay;
21250 unsigned short closing_wait;
21251 unsigned short closing_wait2;
21252 unsigned long event;
21253 unsigned long last_active;
21254 int line;
21255 - int count; /* # of fd on device */
21256 - int blocked_open; /* # of blocked opens */
21257 - long session; /* Session of opening process */
21258 - long pgrp; /* pgrp of opening process */
21259 + int count; /* # of fds on device. */
21260 + int blocked_open; /* # of blocked opens. */
21261 + long session; /* Sess of opening process. */
21262 + long pgrp; /* Pgrp of opening process. */
21263 unsigned char *xmit_buf;
21264 int xmit_head;
21265 int xmit_tail;
21266 diff -Nur linux-2.4.32-rc1/drivers/video/au1200fb.c linux-2.4.32-rc1.mips/drivers/video/au1200fb.c
21267 --- linux-2.4.32-rc1/drivers/video/au1200fb.c 1970-01-01 01:00:00.000000000 +0100
21268 +++ linux-2.4.32-rc1.mips/drivers/video/au1200fb.c 2005-03-13 09:04:16.000000000 +0100
21269 @@ -0,0 +1,1564 @@
21270 +/*
21271 + * BRIEF MODULE DESCRIPTION
21272 + * Au1200 LCD Driver.
21273 + *
21274 + * Copyright 2004 AMD
21275 + * Author: AMD
21276 + *
21277 + * Based on:
21278 + * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
21279 + * Created 28 Dec 1997 by Geert Uytterhoeven
21280 + *
21281 + * This program is free software; you can redistribute it and/or modify it
21282 + * under the terms of the GNU General Public License as published by the
21283 + * Free Software Foundation; either version 2 of the License, or (at your
21284 + * option) any later version.
21285 + *
21286 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21287 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21288 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21289 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21290 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21291 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21292 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21293 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21294 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21295 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21296 + *
21297 + * You should have received a copy of the GNU General Public License along
21298 + * with this program; if not, write to the Free Software Foundation, Inc.,
21299 + * 675 Mass Ave, Cambridge, MA 02139, USA.
21300 + */
21301 +
21302 +#include <linux/module.h>
21303 +#include <linux/kernel.h>
21304 +#include <linux/errno.h>
21305 +#include <linux/string.h>
21306 +#include <linux/mm.h>
21307 +#include <linux/tty.h>
21308 +#include <linux/slab.h>
21309 +#include <linux/delay.h>
21310 +#include <linux/fb.h>
21311 +#include <linux/init.h>
21312 +#include <asm/uaccess.h>
21313 +
21314 +#include <asm/au1000.h>
21315 +#include <asm/au1xxx_gpio.h>
21316 +#include "au1200fb.h"
21317 +
21318 +#include <video/fbcon.h>
21319 +#include <video/fbcon-cfb16.h>
21320 +#include <video/fbcon-cfb32.h>
21321 +#define CMAPSIZE 16
21322 +
21323 +#define AU1200_LCD_GET_WINENABLE 1
21324 +#define AU1200_LCD_SET_WINENABLE 2
21325 +#define AU1200_LCD_GET_WINLOCATION 3
21326 +#define AU1200_LCD_SET_WINLOCATION 4
21327 +#define AU1200_LCD_GET_WINSIZE 5
21328 +#define AU1200_LCD_SET_WINSIZE 6
21329 +#define AU1200_LCD_GET_BACKCOLOR 7
21330 +#define AU1200_LCD_SET_BACKCOLOR 8
21331 +#define AU1200_LCD_GET_COLORKEY 9
21332 +#define AU1200_LCD_SET_COLORKEY 10
21333 +#define AU1200_LCD_GET_PANEL 11
21334 +#define AU1200_LCD_SET_PANEL 12
21335 +
21336 +typedef struct au1200_lcd_getset_t
21337 +{
21338 + unsigned int subcmd;
21339 + union {
21340 + struct {
21341 + int enable;
21342 + } winenable;
21343 + struct {
21344 + int x, y;
21345 + } winlocation;
21346 + struct {
21347 + int hsz, vsz;
21348 + } winsize;
21349 + struct {
21350 + unsigned int color;
21351 + } backcolor;
21352 + struct {
21353 + unsigned int key;
21354 + unsigned int mask;
21355 + } colorkey;
21356 + struct {
21357 + int panel;
21358 + char desc[80];
21359 + } panel;
21360 + };
21361 +} au1200_lcd_getset_t;
21362 +
21363 +AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;
21364 +static int window_index = 0; /* default is zero */
21365 +static int panel_index = -1; /* default is call board_au1200fb_panel */
21366 +
21367 +struct window_settings
21368 +{
21369 + unsigned char name[64];
21370 + uint32 mode_backcolor;
21371 + uint32 mode_colorkey;
21372 + uint32 mode_colorkeymsk;
21373 + struct
21374 + {
21375 + int xres;
21376 + int yres;
21377 + int xpos;
21378 + int ypos;
21379 + uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
21380 + uint32 mode_winenable;
21381 + } w[4];
21382 +};
21383 +
21384 +struct panel_settings
21385 +{
21386 + unsigned char name[64];
21387 + /* panel physical dimensions */
21388 + uint32 Xres;
21389 + uint32 Yres;
21390 + /* panel timings */
21391 + uint32 mode_screen;
21392 + uint32 mode_horztiming;
21393 + uint32 mode_verttiming;
21394 + uint32 mode_clkcontrol;
21395 + uint32 mode_pwmdiv;
21396 + uint32 mode_pwmhi;
21397 + uint32 mode_outmask;
21398 + uint32 mode_fifoctrl;
21399 + uint32 mode_toyclksrc;
21400 + uint32 mode_backlight;
21401 + uint32 mode_auxpll;
21402 + int (*device_init)(void);
21403 + int (*device_shutdown)(void);
21404 +};
21405 +
21406 +#if defined(__BIG_ENDIAN)
21407 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
21408 +#else
21409 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
21410 +#endif
21411 +
21412 +extern int board_au1200fb_panel (void);
21413 +extern int board_au1200fb_panel_init (void);
21414 +extern int board_au1200fb_panel_shutdown (void);
21415 +
21416 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
21417 +extern int board_au1200fb_focus_init_hdtv(void);
21418 +extern int board_au1200fb_focus_init_component(void);
21419 +extern int board_au1200fb_focus_init_cvsv(void);
21420 +extern int board_au1200fb_focus_shutdown(void);
21421 +#endif
21422 +
21423 +/*
21424 + * Default window configurations
21425 + */
21426 +static struct window_settings windows[] =
21427 +{
21428 + { /* Index 0 */
21429 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21430 + /* mode_backcolor */ 0x006600ff,
21431 + /* mode_colorkey,msk*/ 0, 0,
21432 + {
21433 + {
21434 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21435 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21436 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21437 + },
21438 + {
21439 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21440 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21441 + /* mode_winenable*/ 0,
21442 + },
21443 + {
21444 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21445 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21446 + /* mode_winenable*/ 0,
21447 + },
21448 + {
21449 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21450 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21451 + /* mode_winenable*/ 0,
21452 + },
21453 + },
21454 + },
21455 +
21456 + { /* Index 1 */
21457 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21458 + /* mode_backcolor */ 0x006600ff,
21459 + /* mode_colorkey,msk*/ 0, 0,
21460 + {
21461 + {
21462 + /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
21463 +#if 0
21464 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21465 +#endif
21466 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00,
21467 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21468 + },
21469 + {
21470 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21471 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21472 + /* mode_winenable*/ 0,
21473 + },
21474 + {
21475 + /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
21476 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21477 + /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
21478 + },
21479 + {
21480 + /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
21481 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21482 + /* mode_winenable*/ 0,
21483 + },
21484 + },
21485 + },
21486 + /* Need VGA 640 @ 24bpp, @ 32bpp */
21487 + /* Need VGA 800 @ 24bpp, @ 32bpp */
21488 + /* Need VGA 1024 @ 24bpp, @ 32bpp */
21489 +} ;
21490 +
21491 +/*
21492 + * Controller configurations for various panels.
21493 + */
21494 +static struct panel_settings panels[] =
21495 +{
21496 + { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */
21497 + "VGA_320x240",
21498 + 320, 240,
21499 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21500 + /* mode_horztiming */ 0x00c4623b,
21501 + /* mode_verttiming */ 0x00502814,
21502 + /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */
21503 + /* mode_pwmdiv */ 0x00000000,
21504 + /* mode_pwmhi */ 0x00000000,
21505 + /* mode_outmask */ 0x00FFFFFF,
21506 + /* mode_fifoctrl */ 0x2f2f2f2f,
21507 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21508 + /* mode_backlight */ 0x00000000,
21509 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21510 + /* device_init */ NULL,
21511 + /* device_shutdown */ NULL,
21512 + },
21513 +
21514 + { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */
21515 + "VGA_640x480",
21516 + 640, 480,
21517 + /* mode_screen */ 0x13f9df80,
21518 + /* mode_horztiming */ 0x003c5859,
21519 + /* mode_verttiming */ 0x00741201,
21520 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21521 + /* mode_pwmdiv */ 0x00000000,
21522 + /* mode_pwmhi */ 0x00000000,
21523 + /* mode_outmask */ 0x00FFFFFF,
21524 + /* mode_fifoctrl */ 0x2f2f2f2f,
21525 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21526 + /* mode_backlight */ 0x00000000,
21527 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21528 + /* device_init */ NULL,
21529 + /* device_shutdown */ NULL,
21530 + },
21531 +
21532 + { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */
21533 + "SVGA_800x600",
21534 + 800, 600,
21535 + /* mode_screen */ 0x18fa5780,
21536 + /* mode_horztiming */ 0x00dc7e77,
21537 + /* mode_verttiming */ 0x00584805,
21538 + /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */
21539 + /* mode_pwmdiv */ 0x00000000,
21540 + /* mode_pwmhi */ 0x00000000,
21541 + /* mode_outmask */ 0x00FFFFFF,
21542 + /* mode_fifoctrl */ 0x2f2f2f2f,
21543 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21544 + /* mode_backlight */ 0x00000000,
21545 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21546 + /* device_init */ NULL,
21547 + /* device_shutdown */ NULL,
21548 + },
21549 +
21550 + { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */
21551 + "XVGA_1024x768",
21552 + 1024, 768,
21553 + /* mode_screen */ 0x1ffaff80,
21554 + /* mode_horztiming */ 0x007d0e57,
21555 + /* mode_verttiming */ 0x00740a01,
21556 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21557 + /* mode_pwmdiv */ 0x00000000,
21558 + /* mode_pwmhi */ 0x00000000,
21559 + /* mode_outmask */ 0x00FFFFFF,
21560 + /* mode_fifoctrl */ 0x2f2f2f2f,
21561 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21562 + /* mode_backlight */ 0x00000000,
21563 + /* mode_auxpll */ 6, /* 72MHz AUXPLL */
21564 + /* device_init */ NULL,
21565 + /* device_shutdown */ NULL,
21566 + },
21567 +
21568 + { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */
21569 + "XVGA_1280x1024",
21570 + 1280, 1024,
21571 + /* mode_screen */ 0x27fbff80,
21572 + /* mode_horztiming */ 0x00cdb2c7,
21573 + /* mode_verttiming */ 0x00600002,
21574 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21575 + /* mode_pwmdiv */ 0x00000000,
21576 + /* mode_pwmhi */ 0x00000000,
21577 + /* mode_outmask */ 0x00FFFFFF,
21578 + /* mode_fifoctrl */ 0x2f2f2f2f,
21579 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21580 + /* mode_backlight */ 0x00000000,
21581 + /* mode_auxpll */ 10, /* 120MHz AUXPLL */
21582 + /* device_init */ NULL,
21583 + /* device_shutdown */ NULL,
21584 + },
21585 +
21586 + { /* Index 5: Samsung 1024x768 TFT */
21587 + "Samsung_1024x768_TFT",
21588 + 1024, 768,
21589 + /* mode_screen */ 0x1ffaff80,
21590 + /* mode_horztiming */ 0x018cc677,
21591 + /* mode_verttiming */ 0x00241217,
21592 + /* mode_clkcontrol */ 0x00000000, /* SCB 0x1 /4=24Mhz */
21593 + /* mode_pwmdiv */ 0x8000063f, /* SCB 0x0 */
21594 + /* mode_pwmhi */ 0x03400000, /* SCB 0x0 */
21595 + /* mode_outmask */ 0x00fcfcfc,
21596 + /* mode_fifoctrl */ 0x2f2f2f2f,
21597 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21598 + /* mode_backlight */ 0x00000000,
21599 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21600 + /* device_init */ board_au1200fb_panel_init,
21601 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21602 + },
21603 +
21604 + { /* Index 6: Toshiba 640x480 TFT */
21605 + "Toshiba_640x480_TFT",
21606 + 640, 480,
21607 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21608 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
21609 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) ,
21610 + /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */
21611 + /* mode_pwmdiv */ 0x8000063f,
21612 + /* mode_pwmhi */ 0x03400000,
21613 + /* mode_outmask */ 0x00fcfcfc,
21614 + /* mode_fifoctrl */ 0x2f2f2f2f,
21615 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21616 + /* mode_backlight */ 0x00000000,
21617 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21618 + /* device_init */ board_au1200fb_panel_init,
21619 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21620 + },
21621 +
21622 + { /* Index 7: Sharp 320x240 TFT */
21623 + "Sharp_320x240_TFT",
21624 + 320, 240,
21625 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21626 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
21627 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) ,
21628 + /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */
21629 + /* mode_pwmdiv */ 0x8000063f,
21630 + /* mode_pwmhi */ 0x03400000,
21631 + /* mode_outmask */ 0x00fcfcfc,
21632 + /* mode_fifoctrl */ 0x2f2f2f2f,
21633 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21634 + /* mode_backlight */ 0x00000000,
21635 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21636 + /* device_init */ board_au1200fb_panel_init,
21637 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21638 + },
21639 + { /* Index 8: Toppoly TD070WGCB2 7" 854x480 TFT */
21640 + "Toppoly_TD070WGCB2",
21641 + 854, 480,
21642 + /* mode_screen */ LCD_SCREEN_SX_N(854) | LCD_SCREEN_SY_N(480),
21643 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(44) | LCD_HORZTIMING_HND1_N(44) | LCD_HORZTIMING_HPW_N(114),
21644 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(20) | LCD_VERTTIMING_VND1_N(21) | LCD_VERTTIMING_VPW_N(4),
21645 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21646 + /* mode_pwmdiv */ 0x8000063f,
21647 + /* mode_pwmhi */ 0x03400000,
21648 + /* mode_outmask */ 0x00FCFCFC,
21649 + /* mode_fifoctrl */ 0x2f2f2f2f,
21650 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21651 + /* mode_backlight */ 0x00000000,
21652 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21653 + /* device_init */ board_au1200fb_panel_init,
21654 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21655 + },
21656 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
21657 + { /* Index 9: Focus FS453 TV-Out 640x480 */
21658 + "FS453_640x480 (Composite/S-Video)",
21659 + 640, 480,
21660 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21661 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21662 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21663 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21664 + /* mode_pwmdiv */ 0x00000000,
21665 + /* mode_pwmhi */ 0x00000000,
21666 + /* mode_outmask */ 0x00FFFFFF,
21667 + /* mode_fifoctrl */ 0x2f2f2f2f,
21668 + /* mode_toyclksrc */ 0x00000000,
21669 + /* mode_backlight */ 0x00000000,
21670 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21671 + /* device_init */ board_au1200fb_focus_init_cvsv,
21672 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21673 + },
21674 +
21675 + { /* Index 10: Focus FS453 TV-Out 640x480 */
21676 + "FS453_640x480 (Component Video)",
21677 + 640, 480,
21678 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21679 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21680 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21681 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21682 + /* mode_pwmdiv */ 0x00000000,
21683 + /* mode_pwmhi */ 0x00000000,
21684 + /* mode_outmask */ 0x00FFFFFF,
21685 + /* mode_fifoctrl */ 0x2f2f2f2f,
21686 + /* mode_toyclksrc */ 0x00000000,
21687 + /* mode_backlight */ 0x00000000,
21688 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21689 + /* device_init */ board_au1200fb_focus_init_component,
21690 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21691 + },
21692 +
21693 + { /* Index 11: Focus FS453 TV-Out 640x480 */
21694 + "FS453_640x480 (HDTV)",
21695 + 720, 480,
21696 + /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480),
21697 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64),
21698 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7),
21699 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21700 + /* mode_pwmdiv */ 0x00000000,
21701 + /* mode_pwmhi */ 0x00000000,
21702 + /* mode_outmask */ 0x00FFFFFF,
21703 + /* mode_fifoctrl */ 0x2f2f2f2f,
21704 + /* mode_toyclksrc */ 0x00000000,
21705 + /* mode_backlight */ 0x00000000,
21706 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21707 + /* device_init */ board_au1200fb_focus_init_hdtv,
21708 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21709 + },
21710 +#endif
21711 +};
21712 +
21713 +#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))
21714 +
21715 +static struct window_settings *win;
21716 +static struct panel_settings *panel;
21717 +
21718 +struct au1200fb_info {
21719 + struct fb_info_gen gen;
21720 + unsigned long fb_virt_start;
21721 + unsigned long fb_size;
21722 + unsigned long fb_phys;
21723 + int mmaped;
21724 + int nohwcursor;
21725 + int noblanking;
21726 +
21727 + struct { unsigned red, green, blue, pad; } palette[256];
21728 +
21729 +#if defined(FBCON_HAS_CFB16)
21730 + u16 fbcon_cmap16[16];
21731 +#endif
21732 +#if defined(FBCON_HAS_CFB32)
21733 + u32 fbcon_cmap32[16];
21734 +#endif
21735 +};
21736 +
21737 +
21738 +struct au1200fb_par {
21739 + struct fb_var_screeninfo var;
21740 +
21741 + int line_length; /* in bytes */
21742 + int cmap_len; /* color-map length */
21743 +};
21744 +
21745 +#ifndef CONFIG_FB_AU1200_DEVS
21746 +#define CONFIG_FB_AU1200_DEVS 1
21747 +#endif
21748 +
21749 +static struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];
21750 +static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];
21751 +static struct display disps[CONFIG_FB_AU1200_DEVS];
21752 +
21753 +int au1200fb_init(void);
21754 +void au1200fb_setup(char *options, int *ints);
21755 +static int au1200fb_mmap(struct fb_info *fb, struct file *file,
21756 + struct vm_area_struct *vma);
21757 +static int au1200_blank(int blank_mode, struct fb_info_gen *info);
21758 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
21759 + u_long arg, int con, struct fb_info *info);
21760 +
21761 +void au1200_nocursor(struct display *p, int mode, int xx, int yy){};
21762 +
21763 +static int au1200_setlocation (int plane, int xpos, int ypos);
21764 +static int au1200_setsize (int plane, int xres, int yres);
21765 +static void au1200_setmode(int plane);
21766 +static void au1200_setpanel (struct panel_settings *newpanel);
21767 +
21768 +static struct fb_ops au1200fb_ops = {
21769 + owner: THIS_MODULE,
21770 + fb_get_fix: fbgen_get_fix,
21771 + fb_get_var: fbgen_get_var,
21772 + fb_set_var: fbgen_set_var,
21773 + fb_get_cmap: fbgen_get_cmap,
21774 + fb_set_cmap: fbgen_set_cmap,
21775 + fb_pan_display: fbgen_pan_display,
21776 + fb_ioctl: au1200fb_ioctl,
21777 + fb_mmap: au1200fb_mmap,
21778 +};
21779 +
21780 +
21781 +static int
21782 +winbpp (unsigned int winctrl1)
21783 +{
21784 + /* how many bytes of memory are needed for each pixel format */
21785 + switch (winctrl1 & LCD_WINCTRL1_FRM)
21786 + {
21787 + case LCD_WINCTRL1_FRM_1BPP: return 1; break;
21788 + case LCD_WINCTRL1_FRM_2BPP: return 2; break;
21789 + case LCD_WINCTRL1_FRM_4BPP: return 4; break;
21790 + case LCD_WINCTRL1_FRM_8BPP: return 8; break;
21791 + case LCD_WINCTRL1_FRM_12BPP: return 16; break;
21792 + case LCD_WINCTRL1_FRM_16BPP655: return 16; break;
21793 + case LCD_WINCTRL1_FRM_16BPP565: return 16; break;
21794 + case LCD_WINCTRL1_FRM_16BPP556: return 16; break;
21795 + case LCD_WINCTRL1_FRM_16BPPI1555: return 16; break;
21796 + case LCD_WINCTRL1_FRM_16BPPI5551: return 16; break;
21797 + case LCD_WINCTRL1_FRM_16BPPA1555: return 16; break;
21798 + case LCD_WINCTRL1_FRM_16BPPA5551: return 16; break;
21799 + case LCD_WINCTRL1_FRM_24BPP: return 32; break;
21800 + case LCD_WINCTRL1_FRM_32BPP: return 32; break;
21801 + default: return 0; break;
21802 + }
21803 +}
21804 +
21805 +static int
21806 +fbinfo2index (struct fb_info *fb_info)
21807 +{
21808 + int i;
21809 + for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i)
21810 + {
21811 + if (fb_info == (struct fb_info *)(&fb_infos[i]))
21812 + return i;
21813 + }
21814 + printk("au1200fb: ERROR: fbinfo2index failed!\n");
21815 + return -1;
21816 +}
21817 +
21818 +static void au1200_detect(void)
21819 +{
21820 + /*
21821 + * This function should detect the current video mode settings
21822 + * and store it as the default video mode
21823 + * Yeh, well, we're not going to change any settings so we're
21824 + * always stuck with the default ...
21825 + */
21826 +}
21827 +
21828 +static int au1200_encode_fix(struct fb_fix_screeninfo *fix,
21829 + const void *_par, struct fb_info_gen *_info)
21830 +{
21831 + struct au1200fb_info *info = (struct au1200fb_info *) _info;
21832 + struct au1200fb_par *par = (struct au1200fb_par *) _par;
21833 + int plane;
21834 +
21835 + plane = fbinfo2index(info);
21836 +
21837 + memset(fix, 0, sizeof(struct fb_fix_screeninfo));
21838 +
21839 + fix->smem_start = info->fb_phys;
21840 + fix->smem_len = info->fb_size;
21841 + fix->type = FB_TYPE_PACKED_PIXELS;
21842 + fix->type_aux = 0;
21843 + fix->visual = (par->var.bits_per_pixel == 8) ?
21844 + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
21845 + fix->ywrapstep = 0;
21846 + fix->xpanstep = 1;
21847 + fix->ypanstep = 1;
21848 + /* FIX!!!! why doesn't par->line_length work???? it does for au1100 */
21849 + fix->line_length = fb_pars[plane].line_length; /*par->line_length;*/
21850 + return 0;
21851 +}
21852 +
21853 +static void set_color_bitfields(struct fb_var_screeninfo *var, int plane)
21854 +{
21855 + if (var->bits_per_pixel == 8)
21856 + {
21857 + var->red.offset = 0;
21858 + var->red.length = 8;
21859 + var->green.offset = 0;
21860 + var->green.length = 8;
21861 + var->blue.offset = 0;
21862 + var->blue.length = 8;
21863 + var->transp.offset = 0;
21864 + var->transp.length = 0;
21865 + }
21866 + else
21867 +
21868 + if (var->bits_per_pixel == 16)
21869 + {
21870 + /* FIX!!! How does CCO affect this ? */
21871 + /* FIX!!! Not exactly sure how many of these work with FB */
21872 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
21873 + {
21874 + case LCD_WINCTRL1_FRM_16BPP655:
21875 + var->red.offset = 10;
21876 + var->red.length = 6;
21877 + var->green.offset = 5;
21878 + var->green.length = 5;
21879 + var->blue.offset = 0;
21880 + var->blue.length = 5;
21881 + var->transp.offset = 0;
21882 + var->transp.length = 0;
21883 + break;
21884 +
21885 + case LCD_WINCTRL1_FRM_16BPP565:
21886 + var->red.offset = 11;
21887 + var->red.length = 5;
21888 + var->green.offset = 5;
21889 + var->green.length = 6;
21890 + var->blue.offset = 0;
21891 + var->blue.length = 5;
21892 + var->transp.offset = 0;
21893 + var->transp.length = 0;
21894 + break;
21895 +
21896 + case LCD_WINCTRL1_FRM_16BPP556:
21897 + var->red.offset = 11;
21898 + var->red.length = 5;
21899 + var->green.offset = 6;
21900 + var->green.length = 5;
21901 + var->blue.offset = 0;
21902 + var->blue.length = 6;
21903 + var->transp.offset = 0;
21904 + var->transp.length = 0;
21905 + break;
21906 +
21907 + case LCD_WINCTRL1_FRM_16BPPI1555:
21908 + var->red.offset = 10;
21909 + var->red.length = 5;
21910 + var->green.offset = 5;
21911 + var->green.length = 5;
21912 + var->blue.offset = 0;
21913 + var->blue.length = 5;
21914 + var->transp.offset = 0;
21915 + var->transp.length = 0;
21916 + break;
21917 +
21918 + case LCD_WINCTRL1_FRM_16BPPI5551:
21919 + var->red.offset = 11;
21920 + var->red.length = 5;
21921 + var->green.offset = 6;
21922 + var->green.length = 5;
21923 + var->blue.offset = 1;
21924 + var->blue.length = 5;
21925 + var->transp.offset = 0;
21926 + var->transp.length = 0;
21927 + break;
21928 +
21929 + case LCD_WINCTRL1_FRM_16BPPA1555:
21930 + var->red.offset = 10;
21931 + var->red.length = 5;
21932 + var->green.offset = 5;
21933 + var->green.length = 5;
21934 + var->blue.offset = 0;
21935 + var->blue.length = 5;
21936 + var->transp.offset = 15;
21937 + var->transp.length = 1;
21938 + break;
21939 +
21940 + case LCD_WINCTRL1_FRM_16BPPA5551:
21941 + var->red.offset = 11;
21942 + var->red.length = 5;
21943 + var->green.offset = 6;
21944 + var->green.length = 5;
21945 + var->blue.offset = 1;
21946 + var->blue.length = 5;
21947 + var->transp.offset = 0;
21948 + var->transp.length = 1;
21949 + break;
21950 +
21951 + default:
21952 + printk("ERROR: Invalid PIXEL FORMAT!!!\n"); break;
21953 + }
21954 + }
21955 + else
21956 +
21957 + if (var->bits_per_pixel == 32)
21958 + {
21959 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
21960 + {
21961 + case LCD_WINCTRL1_FRM_24BPP:
21962 + var->red.offset = 16;
21963 + var->red.length = 8;
21964 + var->green.offset = 8;
21965 + var->green.length = 8;
21966 + var->blue.offset = 0;
21967 + var->blue.length = 8;
21968 + var->transp.offset = 0;
21969 + var->transp.length = 0;
21970 + break;
21971 +
21972 + case LCD_WINCTRL1_FRM_32BPP:
21973 + var->red.offset = 16;
21974 + var->red.length = 8;
21975 + var->green.offset = 8;
21976 + var->green.length = 8;
21977 + var->blue.offset = 0;
21978 + var->blue.length = 8;
21979 + var->transp.offset = 24;
21980 + var->transp.length = 8;
21981 + break;
21982 + }
21983 + }
21984 + var->red.msb_right = 0;
21985 + var->green.msb_right = 0;
21986 + var->blue.msb_right = 0;
21987 + var->transp.msb_right = 0;
21988 +#if 0
21989 +printk("set_color_bitfields(a=%d, r=%d..%d, g=%d..%d, b=%d..%d)\n",
21990 + var->transp.offset,
21991 + var->red.offset+var->red.length-1, var->red.offset,
21992 + var->green.offset+var->green.length-1, var->green.offset,
21993 + var->blue.offset+var->blue.length-1, var->blue.offset);
21994 +#endif
21995 +}
21996 +
21997 +static int au1200_decode_var(const struct fb_var_screeninfo *var,
21998 + void *_par, struct fb_info_gen *_info)
21999 +{
22000 + struct au1200fb_par *par = (struct au1200fb_par *)_par;
22001 + int plane, bpp;
22002 +
22003 + plane = fbinfo2index((struct fb_info *)_info);
22004 +
22005 + /*
22006 + * Don't allow setting any of these yet: xres and yres don't
22007 + * make sense for LCD panels.
22008 + */
22009 + if (var->xres != win->w[plane].xres ||
22010 + var->yres != win->w[plane].yres ||
22011 + var->xres != win->w[plane].xres ||
22012 + var->yres != win->w[plane].yres) {
22013 + return -EINVAL;
22014 + }
22015 +
22016 + bpp = winbpp(win->w[plane].mode_winctrl1);
22017 + if(var->bits_per_pixel != bpp) {
22018 + /* on au1200, window pixel format is independent of panel pixel */
22019 + printk("WARNING: bits_per_pizel != panel->bpp\n");
22020 + }
22021 +
22022 + memset(par, 0, sizeof(struct au1200fb_par));
22023 + par->var = *var;
22024 +
22025 + /* FIX!!! */
22026 + switch (var->bits_per_pixel) {
22027 + case 8:
22028 + par->var.bits_per_pixel = 8;
22029 + break;
22030 + case 16:
22031 + par->var.bits_per_pixel = 16;
22032 + break;
22033 + case 24:
22034 + case 32:
22035 + par->var.bits_per_pixel = 32;
22036 + break;
22037 + default:
22038 + printk("color depth %d bpp not supported\n",
22039 + var->bits_per_pixel);
22040 + return -EINVAL;
22041 +
22042 + }
22043 + set_color_bitfields(&par->var, plane);
22044 + /* FIX!!! what is this for 24/32bpp? */
22045 + par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
22046 + return 0;
22047 +}
22048 +
22049 +static int au1200_encode_var(struct fb_var_screeninfo *var,
22050 + const void *par, struct fb_info_gen *_info)
22051 +{
22052 + *var = ((struct au1200fb_par *)par)->var;
22053 + return 0;
22054 +}
22055 +
22056 +static void
22057 +au1200_get_par(void *_par, struct fb_info_gen *_info)
22058 +{
22059 + int index;
22060 +
22061 + index = fbinfo2index((struct fb_info *)_info);
22062 + *(struct au1200fb_par *)_par = fb_pars[index];
22063 +}
22064 +
22065 +static void au1200_set_par(const void *par, struct fb_info_gen *info)
22066 +{
22067 + /* nothing to do: we don't change any settings */
22068 +}
22069 +
22070 +static int au1200_getcolreg(unsigned regno, unsigned *red, unsigned *green,
22071 + unsigned *blue, unsigned *transp,
22072 + struct fb_info *info)
22073 +{
22074 + struct au1200fb_info* i = (struct au1200fb_info*)info;
22075 +
22076 + if (regno > 255)
22077 + return 1;
22078 +
22079 + *red = i->palette[regno].red;
22080 + *green = i->palette[regno].green;
22081 + *blue = i->palette[regno].blue;
22082 + *transp = 0;
22083 +
22084 + return 0;
22085 +}
22086 +
22087 +static int au1200_setcolreg(unsigned regno, unsigned red, unsigned green,
22088 + unsigned blue, unsigned transp,
22089 + struct fb_info *info)
22090 +{
22091 + struct au1200fb_info* i = (struct au1200fb_info *)info;
22092 + u32 rgbcol;
22093 + int plane, bpp;
22094 +
22095 + plane = fbinfo2index((struct fb_info *)info);
22096 + bpp = winbpp(win->w[plane].mode_winctrl1);
22097 +
22098 + if (regno > 255)
22099 + return 1;
22100 +
22101 + i->palette[regno].red = red;
22102 + i->palette[regno].green = green;
22103 + i->palette[regno].blue = blue;
22104 +
22105 + switch(bpp) {
22106 +#ifdef FBCON_HAS_CFB8
22107 + case 8:
22108 + red >>= 10;
22109 + green >>= 10;
22110 + blue >>= 10;
22111 + panel_reg->lcd_pallettebase[regno] = (blue&0x1f) |
22112 + ((green&0x3f)<<5) | ((red&0x1f)<<11);
22113 + break;
22114 +#endif
22115 +#ifdef FBCON_HAS_CFB16
22116 +/* FIX!!!! depends upon pixel format */
22117 + case 16:
22118 + i->fbcon_cmap16[regno] =
22119 + ((red & 0xf800) >> 0) |
22120 + ((green & 0xfc00) >> 5) |
22121 + ((blue & 0xf800) >> 11);
22122 + break;
22123 +#endif
22124 +#ifdef FBCON_HAS_CFB32
22125 + case 32:
22126 + i->fbcon_cmap32[regno] =
22127 + (((u32 )transp & 0xff00) << 16) |
22128 + (((u32 )red & 0xff00) << 8) |
22129 + (((u32 )green & 0xff00)) |
22130 + (((u32 )blue & 0xff00) >> 8);
22131 + break;
22132 +#endif
22133 + default:
22134 + printk("unsupported au1200_setcolreg(%d)\n", bpp);
22135 + break;
22136 + }
22137 +
22138 + return 0;
22139 +}
22140 +
22141 +
22142 +static int au1200_blank(int blank_mode, struct fb_info_gen *_info)
22143 +{
22144 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_info;
22145 + int plane;
22146 +
22147 + /* Short-circuit screen blanking */
22148 + if (fb_info->noblanking)
22149 + return 0;
22150 +
22151 + plane = fbinfo2index((struct fb_info *)_info);
22152 +
22153 + switch (blank_mode) {
22154 + case VESA_NO_BLANKING:
22155 + /* printk("turn on panel\n"); */
22156 + au1200_setpanel(panel);
22157 + break;
22158 +
22159 + case VESA_VSYNC_SUSPEND:
22160 + case VESA_HSYNC_SUSPEND:
22161 + case VESA_POWERDOWN:
22162 + /* printk("turn off panel\n"); */
22163 + au1200_setpanel(NULL);
22164 + break;
22165 + default:
22166 + break;
22167 +
22168 + }
22169 + return 0;
22170 +}
22171 +
22172 +static void au1200_set_disp(const void *unused, struct display *disp,
22173 + struct fb_info_gen *info)
22174 +{
22175 + struct au1200fb_info *fb_info;
22176 + int plane;
22177 +
22178 + fb_info = (struct au1200fb_info *)info;
22179 +
22180 + disp->screen_base = (char *)fb_info->fb_virt_start;
22181 +
22182 + switch (disp->var.bits_per_pixel) {
22183 +#ifdef FBCON_HAS_CFB8
22184 + case 8:
22185 + disp->dispsw = &fbcon_cfb8;
22186 + if (fb_info->nohwcursor)
22187 + fbcon_cfb8.cursor = au1200_nocursor;
22188 + break;
22189 +#endif
22190 +#ifdef FBCON_HAS_CFB16
22191 + case 16:
22192 + disp->dispsw = &fbcon_cfb16;
22193 + disp->dispsw_data = fb_info->fbcon_cmap16;
22194 + if (fb_info->nohwcursor)
22195 + fbcon_cfb16.cursor = au1200_nocursor;
22196 + break;
22197 +#endif
22198 +#ifdef FBCON_HAS_CFB32
22199 + case 32:
22200 + disp->dispsw = &fbcon_cfb32;
22201 + disp->dispsw_data = fb_info->fbcon_cmap32;
22202 + if (fb_info->nohwcursor)
22203 + fbcon_cfb32.cursor = au1200_nocursor;
22204 + break;
22205 +#endif
22206 + default:
22207 + disp->dispsw = &fbcon_dummy;
22208 + disp->dispsw_data = NULL;
22209 + break;
22210 + }
22211 +}
22212 +
22213 +static int
22214 +au1200fb_mmap(struct fb_info *_fb,
22215 + struct file *file,
22216 + struct vm_area_struct *vma)
22217 +{
22218 + unsigned int len;
22219 + unsigned long start=0, off;
22220 +
22221 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_fb;
22222 +
22223 + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
22224 + return -EINVAL;
22225 + }
22226 +
22227 + start = fb_info->fb_phys & PAGE_MASK;
22228 + len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info->fb_size);
22229 +
22230 + off = vma->vm_pgoff << PAGE_SHIFT;
22231 +
22232 + if ((vma->vm_end - vma->vm_start + off) > len) {
22233 + return -EINVAL;
22234 + }
22235 +
22236 + off += start;
22237 + vma->vm_pgoff = off >> PAGE_SHIFT;
22238 +
22239 + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
22240 + pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
22241 +
22242 + /* This is an IO map - tell maydump to skip this VMA */
22243 + vma->vm_flags |= VM_IO;
22244 +
22245 + if (io_remap_page_range(vma->vm_start, off,
22246 + vma->vm_end - vma->vm_start,
22247 + vma->vm_page_prot)) {
22248 + return -EAGAIN;
22249 + }
22250 +
22251 + fb_info->mmaped = 1;
22252 + return 0;
22253 +}
22254 +
22255 +int au1200_pan_display(const struct fb_var_screeninfo *var,
22256 + struct fb_info_gen *info)
22257 +{
22258 + return 0;
22259 +}
22260 +
22261 +
22262 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
22263 + u_long arg, int con, struct fb_info *info)
22264 +{
22265 + int plane;
22266 +
22267 + plane = fbinfo2index(info);
22268 +
22269 + /* printk("au1200fb: ioctl %d on plane %d\n", cmd, plane); */
22270 +
22271 + if (cmd == 0x46FF)
22272 + {
22273 + au1200_lcd_getset_t iodata;
22274 +
22275 + if (copy_from_user(&iodata, (void *) arg, sizeof(au1200_lcd_getset_t)))
22276 + return -EFAULT;
22277 +
22278 + switch (iodata.subcmd)
22279 + {
22280 + case AU1200_LCD_GET_WINENABLE:
22281 + iodata.winenable.enable = (lcd->winenable & (1<<plane)) ? 1 : 0;
22282 + break;
22283 + case AU1200_LCD_SET_WINENABLE:
22284 + {
22285 + u32 winenable;
22286 + winenable = lcd->winenable;
22287 + winenable &= ~(1<<plane);
22288 + winenable |= (iodata.winenable.enable) ? (1<<plane) : 0;
22289 + lcd->winenable = winenable;
22290 + }
22291 + break;
22292 + case AU1200_LCD_GET_WINLOCATION:
22293 + iodata.winlocation.x =
22294 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
22295 + iodata.winlocation.y =
22296 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
22297 + break;
22298 + case AU1200_LCD_SET_WINLOCATION:
22299 + au1200_setlocation(plane, iodata.winlocation.x, iodata.winlocation.y);
22300 + break;
22301 + case AU1200_LCD_GET_WINSIZE:
22302 + iodata.winsize.hsz =
22303 + (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11;
22304 + iodata.winsize.vsz =
22305 + (lcd->window[plane].winctrl0 & LCD_WINCTRL1_SZY) >> 0;
22306 + break;
22307 + case AU1200_LCD_SET_WINSIZE:
22308 + au1200_setsize(plane, iodata.winsize.hsz, iodata.winsize.vsz);
22309 + break;
22310 + case AU1200_LCD_GET_BACKCOLOR:
22311 + iodata.backcolor.color = lcd->backcolor;
22312 + break;
22313 + case AU1200_LCD_SET_BACKCOLOR:
22314 + lcd->backcolor = iodata.backcolor.color;
22315 + break;
22316 + case AU1200_LCD_GET_COLORKEY:
22317 + iodata.colorkey.key = lcd->colorkey;
22318 + iodata.colorkey.mask = lcd->colorkeymsk;
22319 + break;
22320 + case AU1200_LCD_SET_COLORKEY:
22321 + lcd->colorkey = iodata.colorkey.key;
22322 + lcd->colorkeymsk = iodata.colorkey.mask;
22323 + break;
22324 + case AU1200_LCD_GET_PANEL:
22325 + iodata.panel.panel = panel_index;
22326 + break;
22327 + case AU1200_LCD_SET_PANEL:
22328 + if ((iodata.panel.panel >= 0) && (iodata.panel.panel < NUM_PANELS))
22329 + {
22330 + struct panel_settings *newpanel;
22331 + panel_index = iodata.panel.panel;
22332 + newpanel = &panels[panel_index];
22333 + au1200_setpanel(newpanel);
22334 + }
22335 + break;
22336 + }
22337 +
22338 + return copy_to_user((void *) arg, &iodata, sizeof(au1200_lcd_getset_t)) ? -EFAULT : 0;
22339 + }
22340 +
22341 + return -EINVAL;
22342 +}
22343 +
22344 +static struct fbgen_hwswitch au1200_switch = {
22345 + au1200_detect,
22346 + au1200_encode_fix,
22347 + au1200_decode_var,
22348 + au1200_encode_var,
22349 + au1200_get_par,
22350 + au1200_set_par,
22351 + au1200_getcolreg,
22352 + au1200_setcolreg,
22353 + au1200_pan_display,
22354 + au1200_blank,
22355 + au1200_set_disp
22356 +};
22357 +
22358 +static void au1200_setpanel (struct panel_settings *newpanel)
22359 +{
22360 + /*
22361 + * Perform global setup/init of LCD controller
22362 + */
22363 + uint32 winenable;
22364 +
22365 + /* Make sure all windows disabled */
22366 + winenable = lcd->winenable;
22367 + lcd->winenable = 0;
22368 +
22369 + /*
22370 + * Ensure everything is disabled before reconfiguring
22371 + */
22372 + if (lcd->screen & LCD_SCREEN_SEN)
22373 + {
22374 + /* Wait for vertical sync period */
22375 + lcd->intstatus = LCD_INT_SS;
22376 + while ((lcd->intstatus & LCD_INT_SS) == 0)
22377 + ;
22378 +
22379 + lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
22380 +
22381 + do
22382 + {
22383 + lcd->intstatus = lcd->intstatus; /*clear interrupts*/
22384 + }
22385 + /*wait for controller to shut down*/
22386 + while ((lcd->intstatus & LCD_INT_SD) == 0);
22387 +
22388 + /* Call shutdown of current panel (if up) */
22389 + /* this must occur last, because if an external clock is driving
22390 + the controller, the clock cannot be turned off before first
22391 + shutting down the controller.
22392 + */
22393 + if (panel->device_shutdown != NULL) panel->device_shutdown();
22394 + }
22395 +
22396 + /* Check if only needing to turn off panel */
22397 + if (panel == NULL) return;
22398 +
22399 + panel = newpanel;
22400 +
22401 + printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
22402 +
22403 + /*
22404 + * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
22405 + */
22406 + if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT))
22407 + {
22408 + uint32 sys_clksrc;
22409 + /* WARNING! This should really be a check since other peripherals can
22410 + be affected by changins sys_auxpll */
22411 + au_writel(panel->mode_auxpll, SYS_AUXPLL);
22412 + sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
22413 + sys_clksrc |= panel->mode_toyclksrc;
22414 + au_writel(sys_clksrc, SYS_CLKSRC);
22415 + }
22416 +
22417 + /*
22418 + * Configure panel timings
22419 + */
22420 + lcd->screen = panel->mode_screen;
22421 + lcd->horztiming = panel->mode_horztiming;
22422 + lcd->verttiming = panel->mode_verttiming;
22423 + lcd->clkcontrol = panel->mode_clkcontrol;
22424 + lcd->pwmdiv = panel->mode_pwmdiv;
22425 + lcd->pwmhi = panel->mode_pwmhi;
22426 + lcd->outmask = panel->mode_outmask;
22427 + lcd->fifoctrl = panel->mode_fifoctrl;
22428 + au_sync();
22429 +
22430 + /* FIX!!! Check window settings to make sure still valid for new geometry */
22431 + au1200_setlocation(0, win->w[0].xpos, win->w[0].ypos);
22432 + au1200_setlocation(1, win->w[1].xpos, win->w[1].ypos);
22433 + au1200_setlocation(2, win->w[2].xpos, win->w[2].ypos);
22434 + au1200_setlocation(3, win->w[3].xpos, win->w[3].ypos);
22435 + lcd->winenable = winenable;
22436 +
22437 + /*
22438 + * Re-enable screen now that it is configured
22439 + */
22440 + lcd->screen |= LCD_SCREEN_SEN;
22441 + au_sync();
22442 +
22443 + /* Call init of panel */
22444 + if (panel->device_init != NULL) panel->device_init();
22445 +
22446 +#if 0
22447 +#define D(X) printk("%25s: %08X\n", #X, X)
22448 + D(lcd->screen);
22449 + D(lcd->horztiming);
22450 + D(lcd->verttiming);
22451 + D(lcd->clkcontrol);
22452 + D(lcd->pwmdiv);
22453 + D(lcd->pwmhi);
22454 + D(lcd->outmask);
22455 + D(lcd->fifoctrl);
22456 + D(lcd->window[0].winctrl0);
22457 + D(lcd->window[0].winctrl1);
22458 + D(lcd->window[0].winctrl2);
22459 + D(lcd->window[0].winbuf0);
22460 + D(lcd->window[0].winbuf1);
22461 + D(lcd->window[0].winbufctrl);
22462 + D(lcd->window[1].winctrl0);
22463 + D(lcd->window[1].winctrl1);
22464 + D(lcd->window[1].winctrl2);
22465 + D(lcd->window[1].winbuf0);
22466 + D(lcd->window[1].winbuf1);
22467 + D(lcd->window[1].winbufctrl);
22468 + D(lcd->window[2].winctrl0);
22469 + D(lcd->window[2].winctrl1);
22470 + D(lcd->window[2].winctrl2);
22471 + D(lcd->window[2].winbuf0);
22472 + D(lcd->window[2].winbuf1);
22473 + D(lcd->window[2].winbufctrl);
22474 + D(lcd->window[3].winctrl0);
22475 + D(lcd->window[3].winctrl1);
22476 + D(lcd->window[3].winctrl2);
22477 + D(lcd->window[3].winbuf0);
22478 + D(lcd->window[3].winbuf1);
22479 + D(lcd->window[3].winbufctrl);
22480 + D(lcd->winenable);
22481 + D(lcd->intenable);
22482 + D(lcd->intstatus);
22483 + D(lcd->backcolor);
22484 + D(lcd->winenable);
22485 + D(lcd->colorkey);
22486 + D(lcd->colorkeymsk);
22487 + D(lcd->hwc.cursorctrl);
22488 + D(lcd->hwc.cursorpos);
22489 + D(lcd->hwc.cursorcolor0);
22490 + D(lcd->hwc.cursorcolor1);
22491 + D(lcd->hwc.cursorcolor2);
22492 + D(lcd->hwc.cursorcolor3);
22493 +#endif
22494 +}
22495 +
22496 +static int au1200_setsize (int plane, int xres, int yres)
22497 +{
22498 +#if 0
22499 + uint32 winctrl0, winctrl1, winenable;
22500 + int xsz, ysz;
22501 +
22502 + /* FIX!!! X*Y can not surpass allocated memory */
22503 +
22504 + printk("setsize: x %d y %d\n", xres, yres);
22505 + winctrl1 = lcd->window[plane].winctrl1;
22506 + printk("org winctrl1 %08X\n", winctrl1);
22507 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22508 +
22509 + xres -= 1;
22510 + yres -= 1;
22511 + winctrl1 |= (xres << 11);
22512 + winctrl1 |= (yres << 0);
22513 +
22514 + printk("new winctrl1 %08X\n", winctrl1);
22515 +
22516 + /*winenable = lcd->winenable & (1 << plane); */
22517 + /*lcd->winenable &= ~(1 << plane); */
22518 + lcd->window[plane].winctrl1 = winctrl1;
22519 + /*lcd->winenable |= winenable; */
22520 +#endif
22521 + return 0;
22522 +}
22523 +
22524 +static int au1200_setlocation (int plane, int xpos, int ypos)
22525 +{
22526 + uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
22527 + int xsz, ysz;
22528 +
22529 + /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
22530 +
22531 + winctrl0 = lcd->window[plane].winctrl0;
22532 + winctrl1 = lcd->window[plane].winctrl1;
22533 + winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
22534 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22535 +
22536 + /* Check for off-screen adjustments */
22537 + xsz = win->w[plane].xres;
22538 + ysz = win->w[plane].yres;
22539 + if ((xpos + win->w[plane].xres) > panel->Xres)
22540 + {
22541 + /* Off-screen to the right */
22542 + xsz = panel->Xres - xpos; /* off by 1 ??? */
22543 + /*printk("off screen right\n");*/
22544 + }
22545 +
22546 + if ((ypos + win->w[plane].yres) > panel->Yres)
22547 + {
22548 + /* Off-screen to the bottom */
22549 + ysz = panel->Yres - ypos; /* off by 1 ??? */
22550 + /*printk("off screen bottom\n");*/
22551 + }
22552 +
22553 + if (xpos < 0)
22554 + {
22555 + /* Off-screen to the left */
22556 + xsz = win->w[plane].xres + xpos;
22557 + fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
22558 + xpos = 0;
22559 + /*printk("off screen left\n");*/
22560 + }
22561 +
22562 + if (ypos < 0)
22563 + {
22564 + /* Off-screen to the top */
22565 + ysz = win->w[plane].yres + ypos;
22566 + fb_offset += ((0 - ypos) * fb_pars[plane].line_length);
22567 + ypos = 0;
22568 + /*printk("off screen top\n");*/
22569 + }
22570 +
22571 + /* record settings */
22572 + win->w[plane].xpos = xpos;
22573 + win->w[plane].ypos = ypos;
22574 +
22575 + xsz -= 1;
22576 + ysz -= 1;
22577 + winctrl0 |= (xpos << 21);
22578 + winctrl0 |= (ypos << 10);
22579 + winctrl1 |= (xsz << 11);
22580 + winctrl1 |= (ysz << 0);
22581 +
22582 + /* Disable the window while making changes, then restore WINEN */
22583 + winenable = lcd->winenable & (1 << plane);
22584 + lcd->winenable &= ~(1 << plane);
22585 + lcd->window[plane].winctrl0 = winctrl0;
22586 + lcd->window[plane].winctrl1 = winctrl1;
22587 + lcd->window[plane].winbuf0 =
22588 + lcd->window[plane].winbuf1 = fb_infos[plane].fb_phys + fb_offset;
22589 + lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
22590 + lcd->winenable |= winenable;
22591 +
22592 + return 0;
22593 +}
22594 +
22595 +static void au1200_setmode(int plane)
22596 +{
22597 + /* Window/plane setup */
22598 + lcd->window[plane].winctrl1 = ( 0
22599 + | LCD_WINCTRL1_PRI_N(plane)
22600 + | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
22601 + ) ;
22602 +
22603 + au1200_setlocation(plane, win->w[plane].xpos, win->w[plane].ypos);
22604 +
22605 + lcd->window[plane].winctrl2 = ( 0
22606 + | LCD_WINCTRL2_CKMODE_00
22607 + | LCD_WINCTRL2_DBM
22608 +/* | LCD_WINCTRL2_RAM */
22609 + | LCD_WINCTRL2_BX_N(fb_pars[plane].line_length)
22610 + | LCD_WINCTRL2_SCX_1
22611 + | LCD_WINCTRL2_SCY_1
22612 + ) ;
22613 + lcd->winenable |= win->w[plane].mode_winenable;
22614 + au_sync();
22615 +
22616 +}
22617 +
22618 +static unsigned long
22619 +au1200fb_alloc_fbmem (unsigned long size)
22620 +{
22621 + /* __get_free_pages() fulfills a max request of 2MB */
22622 + /* do multiple requests to obtain large contigous mem */
22623 +#define MAX_GFP 0x00200000
22624 +
22625 + unsigned long mem, amem, alloced = 0, allocsize;
22626 +
22627 + size += 0x1000;
22628 + allocsize = (size < MAX_GFP) ? size : MAX_GFP;
22629 +
22630 + /* Get first chunk */
22631 + mem = (unsigned long )
22632 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22633 + if (mem != 0) alloced = allocsize;
22634 +
22635 + /* Get remaining, contiguous chunks */
22636 + while (alloced < size)
22637 + {
22638 + amem = (unsigned long )
22639 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22640 + if (amem != 0)
22641 + alloced += allocsize;
22642 +
22643 + /* check for contiguous mem alloced */
22644 + if ((amem == 0) || (amem + allocsize) != mem)
22645 + break;
22646 + else
22647 + mem = amem;
22648 + }
22649 + return mem;
22650 +}
22651 +
22652 +int __init au1200fb_init(void)
22653 +{
22654 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22655 + struct au1200fb_info *fb_info;
22656 + struct display *disp;
22657 + struct au1200fb_par *par;
22658 + unsigned long page;
22659 + int plane, bpp;
22660 +
22661 + /*
22662 + * Get the panel information/display mode
22663 + */
22664 + if (panel_index < 0)
22665 + panel_index = board_au1200fb_panel();
22666 + if ((panel_index < 0) || (panel_index >= num_panels)) {
22667 + printk("ERROR: INVALID PANEL %d\n", panel_index);
22668 + return -EINVAL;
22669 + }
22670 + panel = &panels[panel_index];
22671 + win = &windows[window_index];
22672 +
22673 + printk("au1200fb: Panel %d %s\n", panel_index, panel->name);
22674 + printk("au1200fb: Win %d %s\n", window_index, win->name);
22675 +
22676 + /* Global setup/init */
22677 + au1200_setpanel(panel);
22678 + lcd->intenable = 0;
22679 + lcd->intstatus = ~0;
22680 + lcd->backcolor = win->mode_backcolor;
22681 + lcd->winenable = 0;
22682 +
22683 + /* Setup Color Key - FIX!!! */
22684 + lcd->colorkey = win->mode_colorkey;
22685 + lcd->colorkeymsk = win->mode_colorkeymsk;
22686 +
22687 + /* Setup HWCursor - FIX!!! Need to support this eventually */
22688 + lcd->hwc.cursorctrl = 0;
22689 + lcd->hwc.cursorpos = 0;
22690 + lcd->hwc.cursorcolor0 = 0;
22691 + lcd->hwc.cursorcolor1 = 0;
22692 + lcd->hwc.cursorcolor2 = 0;
22693 + lcd->hwc.cursorcolor3 = 0;
22694 +
22695 + /* Register each plane as a frame buffer device */
22696 + for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
22697 + {
22698 + fb_info = &fb_infos[plane];
22699 + disp = &disps[plane];
22700 + par = &fb_pars[plane];
22701 +
22702 + bpp = winbpp(win->w[plane].mode_winctrl1);
22703 + if (win->w[plane].xres == 0)
22704 + win->w[plane].xres = panel->Xres;
22705 + if (win->w[plane].yres == 0)
22706 + win->w[plane].yres = panel->Yres;
22707 +
22708 + par->var.xres =
22709 + par->var.xres_virtual = win->w[plane].xres;
22710 + par->var.yres =
22711 + par->var.yres_virtual = win->w[plane].yres;
22712 + par->var.bits_per_pixel = bpp;
22713 + par->line_length = win->w[plane].xres * bpp / 8; /* in bytes */
22714 + /*
22715 + * Allocate LCD framebuffer from system memory
22716 + * Set page reserved so that mmap will work. This is necessary
22717 + * since we'll be remapping normal memory.
22718 + */
22719 + fb_info->fb_size = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
22720 + fb_info->fb_virt_start = au1200fb_alloc_fbmem(fb_info->fb_size);
22721 + if (!fb_info->fb_virt_start) {
22722 + printk("Unable to allocate fb memory\n");
22723 + return -ENOMEM;
22724 + }
22725 + fb_info->fb_phys = virt_to_bus((void *)fb_info->fb_virt_start);
22726 + for (page = fb_info->fb_virt_start;
22727 + page < PAGE_ALIGN(fb_info->fb_virt_start + fb_info->fb_size);
22728 + page += PAGE_SIZE) {
22729 + SetPageReserved(virt_to_page(page));
22730 + }
22731 + /* Convert to kseg1 */
22732 + fb_info->fb_virt_start =
22733 + (void *)((u32)fb_info->fb_virt_start | 0xA0000000);
22734 + /* FIX!!! may wish to avoid this to save startup time??? */
22735 + memset((void *)fb_info->fb_virt_start, 0, fb_info->fb_size);
22736 +
22737 + fb_info->gen.parsize = sizeof(struct au1200fb_par);
22738 + fb_info->gen.fbhw = &au1200_switch;
22739 + strcpy(fb_info->gen.info.modename, "Au1200 LCD");
22740 + fb_info->gen.info.changevar = NULL;
22741 + fb_info->gen.info.node = -1;
22742 +
22743 + fb_info->gen.info.fbops = &au1200fb_ops;
22744 + fb_info->gen.info.disp = disp;
22745 + fb_info->gen.info.switch_con = &fbgen_switch;
22746 + fb_info->gen.info.updatevar = &fbgen_update_var;
22747 + fb_info->gen.info.blank = &fbgen_blank;
22748 + fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
22749 +
22750 + fb_info->nohwcursor = 1;
22751 + fb_info->noblanking = 1;
22752 +
22753 + /* This should give a reasonable default video mode */
22754 + fbgen_get_var(&disp->var, -1, &fb_info->gen.info);
22755 + fbgen_do_set_var(&disp->var, 1, &fb_info->gen);
22756 + fbgen_set_disp(-1, &fb_info->gen);
22757 + fbgen_install_cmap(0, &fb_info->gen);
22758 +
22759 + /* Turn on plane */
22760 + au1200_setmode(plane);
22761 +
22762 + if (register_framebuffer(&fb_info->gen.info) < 0)
22763 + return -EINVAL;
22764 +
22765 + printk(KERN_INFO "fb%d: %s plane %d @ %08X (%d x %d x %d)\n",
22766 + GET_FB_IDX(fb_info->gen.info.node),
22767 + fb_info->gen.info.modename, plane, fb_info->fb_phys,
22768 + win->w[plane].xres, win->w[plane].yres, bpp);
22769 + }
22770 + /* uncomment this if your driver cannot be unloaded */
22771 + /* MOD_INC_USE_COUNT; */
22772 + return 0;
22773 +}
22774 +
22775 +void au1200fb_setup(char *options, int *ints)
22776 +{
22777 + char* this_opt;
22778 + int i;
22779 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22780 +
22781 + if (!options || !*options)
22782 + return;
22783 +
22784 + for(this_opt=strtok(options, ","); this_opt;
22785 + this_opt=strtok(NULL, ",")) {
22786 + if (!strncmp(this_opt, "panel:", 6)) {
22787 + int i;
22788 + long int li;
22789 + char *endptr;
22790 + this_opt += 6;
22791 +
22792 + /* Panel name can be name, "bs" for board-switch, or number/index */
22793 + li = simple_strtol(this_opt, &endptr, 0);
22794 + if (*endptr == '\0') {
22795 + panel_index = (int)li;
22796 + }
22797 + else if (strcmp(this_opt, "bs") == 0) {
22798 + panel_index = board_au1200fb_panel();
22799 + }
22800 + else
22801 + for (i=0; i<num_panels; i++) {
22802 + if (!strcmp(this_opt, panels[i].name)) {
22803 + panel_index = i;
22804 + break;
22805 + }
22806 + }
22807 + }
22808 + else if (!strncmp(this_opt, "nohwcursor", 10)) {
22809 + printk("nohwcursor\n");
22810 + fb_infos[0].nohwcursor = 1;
22811 + }
22812 + }
22813 +
22814 + printk("au1200fb: Panel %d %s\n", panel_index,
22815 + panels[panel_index].name);
22816 +}
22817 +
22818 +
22819 +
22820 +#ifdef MODULE
22821 +MODULE_LICENSE("GPL");
22822 +MODULE_DESCRIPTION("Au1200 LCD framebuffer driver");
22823 +
22824 +void au1200fb_cleanup(struct fb_info *info)
22825 +{
22826 + unregister_framebuffer(info);
22827 +}
22828 +
22829 +module_init(au1200fb_init);
22830 +module_exit(au1200fb_cleanup);
22831 +#endif /* MODULE */
22832 +
22833 +
22834 diff -Nur linux-2.4.32-rc1/drivers/video/au1200fb.h linux-2.4.32-rc1.mips/drivers/video/au1200fb.h
22835 --- linux-2.4.32-rc1/drivers/video/au1200fb.h 1970-01-01 01:00:00.000000000 +0100
22836 +++ linux-2.4.32-rc1.mips/drivers/video/au1200fb.h 2005-02-11 22:16:44.000000000 +0100
22837 @@ -0,0 +1,288 @@
22838 +/*
22839 + * BRIEF MODULE DESCRIPTION
22840 + * Hardware definitions for the Au1200 LCD controller
22841 + *
22842 + * Copyright 2004 AMD
22843 + * Author: AMD
22844 + *
22845 + * This program is free software; you can redistribute it and/or modify it
22846 + * under the terms of the GNU General Public License as published by the
22847 + * Free Software Foundation; either version 2 of the License, or (at your
22848 + * option) any later version.
22849 + *
22850 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
22851 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22852 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22853 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22854 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22855 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
22856 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22857 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22858 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22859 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22860 + *
22861 + * You should have received a copy of the GNU General Public License along
22862 + * with this program; if not, write to the Free Software Foundation, Inc.,
22863 + * 675 Mass Ave, Cambridge, MA 02139, USA.
22864 + */
22865 +
22866 +#ifndef _AU1200LCD_H
22867 +#define _AU1200LCD_H
22868 +
22869 +/********************************************************************/
22870 +#define AU1200_LCD_ADDR 0xB5000000
22871 +
22872 +#define uint8 unsigned char
22873 +#define uint32 unsigned int
22874 +
22875 +typedef volatile struct
22876 +{
22877 + uint32 reserved0;
22878 + uint32 screen;
22879 + uint32 backcolor;
22880 + uint32 horztiming;
22881 + uint32 verttiming;
22882 + uint32 clkcontrol;
22883 + uint32 pwmdiv;
22884 + uint32 pwmhi;
22885 + uint32 reserved1;
22886 + uint32 winenable;
22887 + uint32 colorkey;
22888 + uint32 colorkeymsk;
22889 + struct
22890 + {
22891 + uint32 cursorctrl;
22892 + uint32 cursorpos;
22893 + uint32 cursorcolor0;
22894 + uint32 cursorcolor1;
22895 + uint32 cursorcolor2;
22896 + uint32 cursorcolor3;
22897 + } hwc;
22898 + uint32 intstatus;
22899 + uint32 intenable;
22900 + uint32 outmask;
22901 + uint32 fifoctrl;
22902 + uint32 reserved2[(0x0100-0x0058)/4];
22903 + struct
22904 + {
22905 + uint32 winctrl0;
22906 + uint32 winctrl1;
22907 + uint32 winctrl2;
22908 + uint32 winbuf0;
22909 + uint32 winbuf1;
22910 + uint32 winbufctrl;
22911 + uint32 winreserved0;
22912 + uint32 winreserved1;
22913 + } window[4];
22914 +
22915 + uint32 reserved3[(0x0400-0x0180)/4];
22916 +
22917 + uint32 palette[(0x0800-0x0400)/4];
22918 +
22919 + uint8 cursorpattern[256];
22920 +
22921 +} AU1200_LCD;
22922 +
22923 +/* lcd_screen */
22924 +#define LCD_SCREEN_SEN (1<<31)
22925 +#define LCD_SCREEN_SX (0x07FF<<19)
22926 +#define LCD_SCREEN_SY (0x07FF<< 8)
22927 +#define LCD_SCREEN_SWP (1<<7)
22928 +#define LCD_SCREEN_SWD (1<<6)
22929 +#define LCD_SCREEN_ST (7<<0)
22930 +#define LCD_SCREEN_ST_TFT (0<<0)
22931 +#define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
22932 +#define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
22933 +#define LCD_SCREEN_ST_CSTN (1<<0)
22934 +#define LCD_SCREEN_ST_CDSTN (2<<0)
22935 +#define LCD_SCREEN_ST_M8STN (3<<0)
22936 +#define LCD_SCREEN_ST_M4STN (4<<0)
22937 +
22938 +/* lcd_backcolor */
22939 +#define LCD_BACKCOLOR_SBGR (0xFF<<16)
22940 +#define LCD_BACKCOLOR_SBGG (0xFF<<8)
22941 +#define LCD_BACKCOLOR_SBGB (0xFF<<0)
22942 +#define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16)
22943 +#define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8)
22944 +#define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0)
22945 +
22946 +/* lcd_winenable */
22947 +#define LCD_WINENABLE_WEN3 (1<<3)
22948 +#define LCD_WINENABLE_WEN2 (1<<2)
22949 +#define LCD_WINENABLE_WEN1 (1<<1)
22950 +#define LCD_WINENABLE_WEN0 (1<<0)
22951 +
22952 +/* lcd_colorkey */
22953 +#define LCD_COLORKEY_CKR (0xFF<<16)
22954 +#define LCD_COLORKEY_CKG (0xFF<<8)
22955 +#define LCD_COLORKEY_CKB (0xFF<<0)
22956 +#define LCD_COLORKEY_CKR_N(N) ((N)<<16)
22957 +#define LCD_COLORKEY_CKG_N(N) ((N)<<8)
22958 +#define LCD_COLORKEY_CKB_N(N) ((N)<<0)
22959 +
22960 +/* lcd_colorkeymsk */
22961 +#define LCD_COLORKEYMSK_CKMR (0xFF<<16)
22962 +#define LCD_COLORKEYMSK_CKMG (0xFF<<8)
22963 +#define LCD_COLORKEYMSK_CKMB (0xFF<<0)
22964 +#define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16)
22965 +#define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8)
22966 +#define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0)
22967 +
22968 +/* lcd windows control 0 */
22969 +#define LCD_WINCTRL0_OX (0x07FF<<21)
22970 +#define LCD_WINCTRL0_OY (0x07FF<<10)
22971 +#define LCD_WINCTRL0_A (0x00FF<<2)
22972 +#define LCD_WINCTRL0_AEN (1<<1)
22973 +#define LCD_WINCTRL0_OX_N(N) ((N)<<21)
22974 +#define LCD_WINCTRL0_OY_N(N) ((N)<<10)
22975 +#define LCD_WINCTRL0_A_N(N) ((N)<<2)
22976 +
22977 +/* lcd windows control 1 */
22978 +#define LCD_WINCTRL1_PRI (3<<30)
22979 +#define LCD_WINCTRL1_PIPE (1<<29)
22980 +#define LCD_WINCTRL1_FRM (0xF<<25)
22981 +#define LCD_WINCTRL1_CCO (1<<24)
22982 +#define LCD_WINCTRL1_PO (3<<22)
22983 +#define LCD_WINCTRL1_SZX (0x07FF<<11)
22984 +#define LCD_WINCTRL1_SZY (0x07FF<<0)
22985 +#define LCD_WINCTRL1_FRM_1BPP (0<<25)
22986 +#define LCD_WINCTRL1_FRM_2BPP (1<<25)
22987 +#define LCD_WINCTRL1_FRM_4BPP (2<<25)
22988 +#define LCD_WINCTRL1_FRM_8BPP (3<<25)
22989 +#define LCD_WINCTRL1_FRM_12BPP (4<<25)
22990 +#define LCD_WINCTRL1_FRM_16BPP655 (5<<25)
22991 +#define LCD_WINCTRL1_FRM_16BPP565 (6<<25)
22992 +#define LCD_WINCTRL1_FRM_16BPP556 (7<<25)
22993 +#define LCD_WINCTRL1_FRM_16BPPI1555 (8<<25)
22994 +#define LCD_WINCTRL1_FRM_16BPPI5551 (9<<25)
22995 +#define LCD_WINCTRL1_FRM_16BPPA1555 (10<<25)
22996 +#define LCD_WINCTRL1_FRM_16BPPA5551 (11<<25)
22997 +#define LCD_WINCTRL1_FRM_24BPP (12<<25)
22998 +#define LCD_WINCTRL1_FRM_32BPP (13<<25)
22999 +#define LCD_WINCTRL1_PRI_N(N) ((N)<<30)
23000 +#define LCD_WINCTRL1_PO_00 (0<<22)
23001 +#define LCD_WINCTRL1_PO_01 (1<<22)
23002 +#define LCD_WINCTRL1_PO_10 (2<<22)
23003 +#define LCD_WINCTRL1_PO_11 (3<<22)
23004 +#define LCD_WINCTRL1_SZX_N(N) ((N-1)<<11)
23005 +#define LCD_WINCTRL1_SZY_N(N) ((N-1)<<0)
23006 +
23007 +/* lcd windows control 2 */
23008 +#define LCD_WINCTRL2_CKMODE (3<<24)
23009 +#define LCD_WINCTRL2_DBM (1<<23)
23010 +#define LCD_WINCTRL2_RAM (3<<21)
23011 +#define LCD_WINCTRL2_BX (0x1FFF<<8)
23012 +#define LCD_WINCTRL2_SCX (0xF<<4)
23013 +#define LCD_WINCTRL2_SCY (0xF<<0)
23014 +#define LCD_WINCTRL2_CKMODE_00 (0<<24)
23015 +#define LCD_WINCTRL2_CKMODE_01 (1<<24)
23016 +#define LCD_WINCTRL2_CKMODE_10 (2<<24)
23017 +#define LCD_WINCTRL2_CKMODE_11 (3<<24)
23018 +#define LCD_WINCTRL2_RAM_NONE (0<<21)
23019 +#define LCD_WINCTRL2_RAM_PALETTE (1<<21)
23020 +#define LCD_WINCTRL2_RAM_GAMMA (2<<21)
23021 +#define LCD_WINCTRL2_RAM_BUFFER (3<<21)
23022 +#define LCD_WINCTRL2_BX_N(N) ((N)<<8)
23023 +#define LCD_WINCTRL2_SCX_1 (0<<4)
23024 +#define LCD_WINCTRL2_SCX_2 (1<<4)
23025 +#define LCD_WINCTRL2_SCX_4 (2<<4)
23026 +#define LCD_WINCTRL2_SCY_1 (0<<0)
23027 +#define LCD_WINCTRL2_SCY_2 (1<<0)
23028 +#define LCD_WINCTRL2_SCY_4 (2<<0)
23029 +
23030 +/* lcd windows buffer control */
23031 +#define LCD_WINBUFCTRL_DB (1<<1)
23032 +#define LCD_WINBUFCTRL_DBN (1<<0)
23033 +
23034 +/* lcd_intstatus, lcd_intenable */
23035 +#define LCD_INT_IFO (0xF<<14)
23036 +#define LCD_INT_IFU (0xF<<10)
23037 +#define LCD_INT_OFO (1<<9)
23038 +#define LCD_INT_OFU (1<<8)
23039 +#define LCD_INT_WAIT (1<<3)
23040 +#define LCD_INT_SD (1<<2)
23041 +#define LCD_INT_SA (1<<1)
23042 +#define LCD_INT_SS (1<<0)
23043 +
23044 +/* lcd_horztiming */
23045 +#define LCD_HORZTIMING_HND2 (0x1FF<<18)
23046 +#define LCD_HORZTIMING_HND1 (0x1FF<<9)
23047 +#define LCD_HORZTIMING_HPW (0x1FF<<0)
23048 +#define LCD_HORZTIMING_HND2_N(N)(((N)-1)<<18)
23049 +#define LCD_HORZTIMING_HND1_N(N)(((N)-1)<<9)
23050 +#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<0)
23051 +
23052 +/* lcd_verttiming */
23053 +#define LCD_VERTTIMING_VND2 (0x1FF<<18)
23054 +#define LCD_VERTTIMING_VND1 (0x1FF<<9)
23055 +#define LCD_VERTTIMING_VPW (0x1FF<<0)
23056 +#define LCD_VERTTIMING_VND2_N(N)(((N)-1)<<18)
23057 +#define LCD_VERTTIMING_VND1_N(N)(((N)-1)<<9)
23058 +#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<0)
23059 +
23060 +/* lcd_clkcontrol */
23061 +#define LCD_CLKCONTROL_EXT (1<<22)
23062 +#define LCD_CLKCONTROL_DELAY (3<<20)
23063 +#define LCD_CLKCONTROL_CDD (1<<19)
23064 +#define LCD_CLKCONTROL_IB (1<<18)
23065 +#define LCD_CLKCONTROL_IC (1<<17)
23066 +#define LCD_CLKCONTROL_IH (1<<16)
23067 +#define LCD_CLKCONTROL_IV (1<<15)
23068 +#define LCD_CLKCONTROL_BF (0x1F<<10)
23069 +#define LCD_CLKCONTROL_PCD (0x3FF<<0)
23070 +#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
23071 +#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
23072 +
23073 +/* lcd_pwmdiv */
23074 +#define LCD_PWMDIV_EN (1<<31)
23075 +#define LCD_PWMDIV_PWMDIV (0x1FFFF<<0)
23076 +#define LCD_PWMDIV_PWMDIV_N(N) ((N)<<0)
23077 +
23078 +/* lcd_pwmhi */
23079 +#define LCD_PWMHI_PWMHI1 (0xFFFF<<16)
23080 +#define LCD_PWMHI_PWMHI0 (0xFFFF<<0)
23081 +#define LCD_PWMHI_PWMHI1_N(N) ((N)<<16)
23082 +#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
23083 +
23084 +/* lcd_hwccon */
23085 +#define LCD_HWCCON_EN (1<<0)
23086 +
23087 +/* lcd_cursorpos */
23088 +#define LCD_CURSORPOS_HWCXOFF (0x1F<<27)
23089 +#define LCD_CURSORPOS_HWCXPOS (0x07FF<<16)
23090 +#define LCD_CURSORPOS_HWCYOFF (0x1F<<11)
23091 +#define LCD_CURSORPOS_HWCYPOS (0x07FF<<0)
23092 +#define LCD_CURSORPOS_HWCXOFF_N(N) ((N)<<27)
23093 +#define LCD_CURSORPOS_HWCXPOS_N(N) ((N)<<16)
23094 +#define LCD_CURSORPOS_HWCYOFF_N(N) ((N)<<11)
23095 +#define LCD_CURSORPOS_HWCYPOS_N(N) ((N)<<0)
23096 +
23097 +/* lcd_cursorcolor */
23098 +#define LCD_CURSORCOLOR_HWCA (0xFF<<24)
23099 +#define LCD_CURSORCOLOR_HWCR (0xFF<<16)
23100 +#define LCD_CURSORCOLOR_HWCG (0xFF<<8)
23101 +#define LCD_CURSORCOLOR_HWCB (0xFF<<0)
23102 +#define LCD_CURSORCOLOR_HWCA_N(N) ((N)<<24)
23103 +#define LCD_CURSORCOLOR_HWCR_N(N) ((N)<<16)
23104 +#define LCD_CURSORCOLOR_HWCG_N(N) ((N)<<8)
23105 +#define LCD_CURSORCOLOR_HWCB_N(N) ((N)<<0)
23106 +
23107 +/* lcd_fifoctrl */
23108 +#define LCD_FIFOCTRL_F3IF (1<<29)
23109 +#define LCD_FIFOCTRL_F3REQ (0x1F<<24)
23110 +#define LCD_FIFOCTRL_F2IF (1<<29)
23111 +#define LCD_FIFOCTRL_F2REQ (0x1F<<16)
23112 +#define LCD_FIFOCTRL_F1IF (1<<29)
23113 +#define LCD_FIFOCTRL_F1REQ (0x1F<<8)
23114 +#define LCD_FIFOCTRL_F0IF (1<<29)
23115 +#define LCD_FIFOCTRL_F0REQ (0x1F<<0)
23116 +#define LCD_FIFOCTRL_F3REQ_N(N) ((N-1)<<24)
23117 +#define LCD_FIFOCTRL_F2REQ_N(N) ((N-1)<<16)
23118 +#define LCD_FIFOCTRL_F1REQ_N(N) ((N-1)<<8)
23119 +#define LCD_FIFOCTRL_F0REQ_N(N) ((N-1)<<0)
23120 +
23121 +/* lcd_outmask */
23122 +#define LCD_OUTMASK_MASK (0x00FFFFFF)
23123 +
23124 +/********************************************************************/
23125 +#endif /* _AU1200LCD_H */
23126 diff -Nur linux-2.4.32-rc1/drivers/video/Config.in linux-2.4.32-rc1.mips/drivers/video/Config.in
23127 --- linux-2.4.32-rc1/drivers/video/Config.in 2004-02-18 14:36:31.000000000 +0100
23128 +++ linux-2.4.32-rc1.mips/drivers/video/Config.in 2005-02-11 22:16:44.000000000 +0100
23129 @@ -87,8 +87,8 @@
23130 if [ "$CONFIG_HP300" = "y" ]; then
23131 define_bool CONFIG_FB_HP300 y
23132 fi
23133 - if [ "$ARCH" = "alpha" ]; then
23134 - tristate ' TGA framebuffer support' CONFIG_FB_TGA
23135 + if [ "$ARCH" = "alpha" -o "$CONFIG_TC" = "y" ]; then
23136 + tristate ' TGA/SFB+ framebuffer support' CONFIG_FB_TGA
23137 fi
23138 if [ "$CONFIG_X86" = "y" ]; then
23139 bool ' VESA VGA graphics console' CONFIG_FB_VESA
23140 @@ -121,6 +121,17 @@
23141 hex ' Framebuffer Base Address' CONFIG_E1355_FB_BASE a8200000
23142 fi
23143 fi
23144 + if [ "$CONFIG_SOC_AU1100" = "y" ]; then
23145 + bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
23146 + fi
23147 +
23148 + if [ "$CONFIG_SOC_AU1200" = "y" ]; then
23149 + bool ' Au1200 LCD Driver' CONFIG_FB_AU1200
23150 + if [ "$CONFIG_FB_AU1200" = "y" ]; then
23151 + int ' Number of planes (1 to 4)' CONFIG_FB_AU1200_DEVS 1
23152 + fi
23153 + fi
23154 +
23155 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
23156 if [ "$CONFIG_PCI" != "n" ]; then
23157 tristate ' Matrox acceleration (EXPERIMENTAL)' CONFIG_FB_MATROX
23158 @@ -178,9 +189,6 @@
23159 bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
23160 bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
23161 fi
23162 - if [ "$CONFIG_SOC_AU1100" = "y" ]; then
23163 - bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
23164 - fi
23165 fi
23166 fi
23167 fi
23168 diff -Nur linux-2.4.32-rc1/drivers/video/fbmem.c linux-2.4.32-rc1.mips/drivers/video/fbmem.c
23169 --- linux-2.4.32-rc1/drivers/video/fbmem.c 2005-06-01 02:56:56.000000000 +0200
23170 +++ linux-2.4.32-rc1.mips/drivers/video/fbmem.c 2005-05-25 19:14:24.000000000 +0200
23171 @@ -139,6 +139,8 @@
23172 extern int e1356fb_setup(char*);
23173 extern int au1100fb_init(void);
23174 extern int au1100fb_setup(char*);
23175 +extern int au1200fb_init(void);
23176 +extern int au1200fb_setup(char*);
23177 extern int pvr2fb_init(void);
23178 extern int pvr2fb_setup(char*);
23179 extern int sstfb_init(void);
23180 @@ -331,6 +333,9 @@
23181 #ifdef CONFIG_FB_AU1100
23182 { "au1100fb", au1100fb_init, au1100fb_setup },
23183 #endif
23184 +#ifdef CONFIG_FB_AU1200
23185 + { "au1200fb", au1200fb_init, au1200fb_setup },
23186 +#endif
23187 #ifdef CONFIG_FB_IT8181
23188 { "it8181fb", it8181fb_init, it8181fb_setup },
23189 #endif
23190 diff -Nur linux-2.4.32-rc1/drivers/video/ims332.h linux-2.4.32-rc1.mips/drivers/video/ims332.h
23191 --- linux-2.4.32-rc1/drivers/video/ims332.h 1970-01-01 01:00:00.000000000 +0100
23192 +++ linux-2.4.32-rc1.mips/drivers/video/ims332.h 2003-12-22 17:02:20.000000000 +0100
23193 @@ -0,0 +1,275 @@
23194 +/*
23195 + * linux/drivers/video/ims332.h
23196 + *
23197 + * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
23198 + *
23199 + * This file is subject to the terms and conditions of the GNU General
23200 + * Public License. See the file COPYING in the main directory of this
23201 + * archive for more details.
23202 + */
23203 +#include <linux/types.h>
23204 +
23205 +/*
23206 + * IMS332 16-bit wide, 128-bit aligned registers.
23207 + */
23208 +struct _ims332_reg {
23209 + volatile u16 r;
23210 + u16 pad[7];
23211 +};
23212 +
23213 +struct _ims332_regs {
23214 +#define IMS332_BOOT_PLL_MUTLIPLIER 0x00001f
23215 +#define IMS332_BOOT_CLOCK_SOURCE_SEL 0x000020
23216 +#define IMS332_BOOT_ADDRESS_ALIGNMENT 0x000040
23217 +#define IMS332_BOOT_WRITE_ZERO 0xffff80
23218 + struct _ims332_reg boot;
23219 + struct _ims332_reg pad0[0x020 - 0x000];
23220 + struct _ims332_reg half_sync;
23221 + struct _ims332_reg back_porch;
23222 + struct _ims332_reg display;
23223 + struct _ims332_reg short_display;
23224 + struct _ims332_reg broad_pulse;
23225 + struct _ims332_reg vsync;
23226 + struct _ims332_reg vpre_equalise;
23227 + struct _ims332_reg vpost_equalise;
23228 + struct _ims332_reg vblank;
23229 + struct _ims332_reg vdisplay;
23230 + struct _ims332_reg line_time;
23231 + struct _ims332_reg line_start;
23232 + struct _ims332_reg mem_init;
23233 + struct _ims332_reg transfer_delay;
23234 + struct _ims332_reg pad1[0x03f - 0x02e];
23235 + struct _ims332_reg pixel_address_mask;
23236 + struct _ims332_reg pad2[0x05f - 0x040];
23237 +
23238 +#define IMS332_CTRL_A_BOOT_ENABLE_VTG 0x000001
23239 +#define IMS332_CTRL_A_SCREEN_FORMAT 0x000002
23240 +#define IMS332_CTRL_A_INTERLACED_STANDARD 0x000004
23241 +#define IMS332_CTRL_A_OPERATING_MODE 0x000008
23242 +#define IMS332_CTRL_A_FRAME_FLYBACK_PATTERN 0x000010
23243 +#define IMS332_CTRL_A_DIGITAL_SYNC_FORMAT 0x000020
23244 +#define IMS332_CTRL_A_ANALOGUE_VIDEO_FORMAT 0x000040
23245 +#define IMS332_CTRL_A_BLANK_LEVEL 0x000080
23246 +#define IMS332_CTRL_A_BLANK_IO 0x000100
23247 +#define IMS332_CTRL_A_BLANK_FUNCTION_SWITCH 0x000200
23248 +#define IMS332_CTRL_A_FORCE_BLANKING 0x000400
23249 +#define IMS332_CTRL_A_TURN_OFF_BLANKING 0x000800
23250 +#define IMS332_CTRL_A_VRAM_ADDRESS_INCREMENT 0x003000
23251 +#define IMS332_CTRL_A_TURN_OFF_DMA 0x004000
23252 +#define IMS332_CTRL_A_SYNC_DELAY 0x038000
23253 +#define IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING 0x040000
23254 +#define IMS332_CTRL_A_DELAYED_SAMPLING 0x080000
23255 +#define IMS332_CTRL_A_BITS_PER_PIXEL 0x700000
23256 +#define IMS332_CTRL_A_CURSOR_DISABLE 0x800000
23257 + struct _ims332_reg config_control_a;
23258 + struct _ims332_reg pad3[0x06f - 0x060];
23259 +
23260 +#define IMS332_CTRL_B_WRITE_ZERO 0xffffff
23261 + struct _ims332_reg config_control_b;
23262 + struct _ims332_reg pad4[0x07f - 0x070];
23263 + struct _ims332_reg screen_top;
23264 + struct _ims332_reg pad5[0x0a0 - 0x080];
23265 + /* cursor color palette, 3 entries, reg no. 0xa1 - 0xa3 */
23266 + struct _ims332_reg cursor_color_palette0;
23267 + struct _ims332_reg cursor_color_palette1;
23268 + struct _ims332_reg cursor_color_palette2;
23269 + struct _ims332_reg pad6[0x0bf - 0x0a3];
23270 + struct _ims332_reg rgb_frame_checksum0;
23271 + struct _ims332_reg rgb_frame_checksum1;
23272 + struct _ims332_reg rgb_frame_checksum2;
23273 + struct _ims332_reg pad7[0x0c6 - 0x0c2];
23274 + struct _ims332_reg cursor_start;
23275 + struct _ims332_reg pad8[0x0ff - 0x0c7];
23276 + /* color palette, 256 entries of form 0x00BBGGRR, reg no. 0x100 - 0x1ff */
23277 + struct _ims332_reg color_palette[0x1ff - 0x0ff];
23278 + /* hardware cursor bitmap, reg no. 0x200 - 0x3ff */
23279 + struct _ims332_reg cursor_ram[0x3ff - 0x1ff];
23280 +};
23281 +
23282 +/*
23283 + * In the functions below we use some weird looking helper variables to
23284 + * access most members of this struct, otherwise the compiler splits
23285 + * the read/write in two byte accesses.
23286 + */
23287 +struct ims332_regs {
23288 + struct _ims332_regs rw;
23289 + char pad0[0x80000 - sizeof (struct _ims332_regs)];
23290 + struct _ims332_regs r;
23291 + char pad1[0xa0000 - (sizeof (struct _ims332_regs) + 0x80000)];
23292 + struct _ims332_regs w;
23293 +} __attribute__((packed));
23294 +
23295 +static inline void ims332_control_reg_bits(struct ims332_regs *regs, u32 mask,
23296 + u32 val)
23297 +{
23298 + volatile u16 *ctr = &(regs->r.config_control_a.r);
23299 + volatile u16 *ctw = &(regs->w.config_control_a.r);
23300 + u32 ctrl;
23301 +
23302 + mb();
23303 + ctrl = *ctr;
23304 + rmb();
23305 + ctrl |= ((regs->rw.boot.r << 8) & 0x00ff0000);
23306 + ctrl |= val & mask;
23307 + ctrl &= ~(~val & mask);
23308 + wmb();
23309 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
23310 + wmb();
23311 + *ctw = ctrl & 0xffff;
23312 +}
23313 +
23314 +/* FIXME: This is maxinefb specific. */
23315 +static inline void ims332_bootstrap(struct ims332_regs *regs)
23316 +{
23317 + volatile u16 *ctw = &(regs->w.config_control_a.r);
23318 + u32 ctrl = IMS332_CTRL_A_BOOT_ENABLE_VTG | IMS332_CTRL_A_TURN_OFF_DMA;
23319 +
23320 + /* bootstrap sequence */
23321 + mb();
23322 + regs->rw.boot.r = 0;
23323 + wmb();
23324 + *ctw = 0;
23325 +
23326 + /* init control A register */
23327 + wmb();
23328 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
23329 + wmb();
23330 + *ctw = ctrl & 0xffff;
23331 +}
23332 +
23333 +static inline void ims332_blank_screen(struct ims332_regs *regs, int blank)
23334 +{
23335 + ims332_control_reg_bits(regs, IMS332_CTRL_A_FORCE_BLANKING,
23336 + blank ? IMS332_CTRL_A_FORCE_BLANKING : 0);
23337 +}
23338 +
23339 +static inline void ims332_set_color_depth(struct ims332_regs *regs, u32 depth)
23340 +{
23341 + u32 dp;
23342 + u32 mask = (IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING
23343 + | IMS332_CTRL_A_DELAYED_SAMPLING
23344 + | IMS332_CTRL_A_BITS_PER_PIXEL);
23345 +
23346 + switch (depth) {
23347 + case 1: dp = 0 << 20; break;
23348 + case 2: dp = 1 << 20; break;
23349 + case 4: dp = 2 << 20; break;
23350 + case 8: dp = 3 << 20; break;
23351 + case 15: dp = (4 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
23352 + case 16: dp = (5 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
23353 + default: return;
23354 + }
23355 + ims332_control_reg_bits(regs, mask, dp);
23356 +
23357 + if (depth <= 8) {
23358 + volatile u16 *pmask = &(regs->w.pixel_address_mask.r);
23359 + u32 dm = (1 << depth) - 1;
23360 +
23361 + wmb();
23362 + regs->rw.boot.r = dm << 8;
23363 + wmb();
23364 + *pmask = dm << 8 | dm;
23365 + }
23366 +}
23367 +
23368 +static inline void ims332_set_screen_top(struct ims332_regs *regs, u16 top)
23369 +{
23370 + volatile u16 *st = &(regs->w.screen_top.r);
23371 +
23372 + mb();
23373 + *st = top & 0xffff;
23374 +}
23375 +
23376 +static inline void ims332_enable_cursor(struct ims332_regs *regs, int on)
23377 +{
23378 + ims332_control_reg_bits(regs, IMS332_CTRL_A_CURSOR_DISABLE,
23379 + on ? 0 : IMS332_CTRL_A_CURSOR_DISABLE);
23380 +}
23381 +
23382 +static inline void ims332_position_cursor(struct ims332_regs *regs,
23383 + u16 x, u16 y)
23384 +{
23385 + volatile u16 *cp = &(regs->w.cursor_start.r);
23386 + u32 val = ((x & 0xfff) << 12) | (y & 0xfff);
23387 +
23388 + if (x > 2303 || y > 2303)
23389 + return;
23390 +
23391 + mb();
23392 + regs->rw.boot.r = (val >> 8) & 0xff00;
23393 + wmb();
23394 + *cp = val & 0xffff;
23395 +}
23396 +
23397 +static inline void ims332_set_font(struct ims332_regs *regs, u8 fgc,
23398 + u16 width, u16 height)
23399 +{
23400 + volatile u16 *cp0 = &(regs->w.cursor_color_palette0.r);
23401 + int i;
23402 +
23403 + mb();
23404 + for (i = 0; i < 0x200; i++) {
23405 + volatile u16 *cram = &(regs->w.cursor_ram[i].r);
23406 +
23407 + if (height << 6 <= i << 3)
23408 + *cram = 0x0000;
23409 + else if (width <= i % 8 << 3)
23410 + *cram = 0x0000;
23411 + else if (((width >> 3) & 0xffff) > i % 8)
23412 + *cram = 0x5555;
23413 + else
23414 + *cram = 0x5555 & ~(0xffff << (width % 8 << 1));
23415 + wmb();
23416 + }
23417 + regs->rw.boot.r = fgc << 8;
23418 + wmb();
23419 + *cp0 = fgc << 8 | fgc;
23420 +}
23421 +
23422 +static inline void ims332_read_cmap(struct ims332_regs *regs, u8 reg,
23423 + u8* red, u8* green, u8* blue)
23424 +{
23425 + volatile u16 *rptr = &(regs->r.color_palette[reg].r);
23426 + u16 val;
23427 +
23428 + mb();
23429 + val = *rptr;
23430 + *red = val & 0xff;
23431 + *green = (val >> 8) & 0xff;
23432 + rmb();
23433 + *blue = (regs->rw.boot.r >> 8) & 0xff;
23434 +}
23435 +
23436 +static inline void ims332_write_cmap(struct ims332_regs *regs, u8 reg,
23437 + u8 red, u8 green, u8 blue)
23438 +{
23439 + volatile u16 *wptr = &(regs->w.color_palette[reg].r);
23440 +
23441 + mb();
23442 + regs->rw.boot.r = blue << 8;
23443 + wmb();
23444 + *wptr = (green << 8) + red;
23445 +}
23446 +
23447 +static inline void ims332_dump_regs(struct ims332_regs *regs)
23448 +{
23449 + int i;
23450 +
23451 + printk(__FUNCTION__);
23452 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG, 0);
23453 + for (i = 0; i < 0x100; i++) {
23454 + volatile u16 *cpad = (u16 *)((char *)(&regs->r) + sizeof(struct _ims332_reg) * i);
23455 + u32 val;
23456 +
23457 + val = *cpad;
23458 + rmb();
23459 + val |= regs->rw.boot.r << 8;
23460 + rmb();
23461 + if (! (i % 8))
23462 + printk("\n%02x:", i);
23463 + printk(" %06x", val);
23464 + }
23465 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG,
23466 + IMS332_CTRL_A_BOOT_ENABLE_VTG);
23467 + printk("\n");
23468 +}
23469 diff -Nur linux-2.4.32-rc1/drivers/video/Makefile linux-2.4.32-rc1.mips/drivers/video/Makefile
23470 --- linux-2.4.32-rc1/drivers/video/Makefile 2004-02-18 14:36:31.000000000 +0100
23471 +++ linux-2.4.32-rc1.mips/drivers/video/Makefile 2005-02-11 22:16:44.000000000 +0100
23472 @@ -87,6 +87,7 @@
23473 obj-$(CONFIG_FB_MAXINE) += maxinefb.o
23474 obj-$(CONFIG_FB_TX3912) += tx3912fb.o
23475 obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
23476 +obj-$(CONFIG_FB_AU1200) += au1200fb.o fbgen.o
23477 obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
23478
23479 subdir-$(CONFIG_STI_CONSOLE) += sti
23480 diff -Nur linux-2.4.32-rc1/drivers/video/maxinefb.h linux-2.4.32-rc1.mips/drivers/video/maxinefb.h
23481 --- linux-2.4.32-rc1/drivers/video/maxinefb.h 2003-08-25 13:44:42.000000000 +0200
23482 +++ linux-2.4.32-rc1.mips/drivers/video/maxinefb.h 1970-01-01 01:00:00.000000000 +0100
23483 @@ -1,38 +0,0 @@
23484 -/*
23485 - * linux/drivers/video/maxinefb.h
23486 - *
23487 - * DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
23488 - * Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
23489 - * This file is subject to the terms and conditions of the GNU General
23490 - * Public License. See the file COPYING in the main directory of this
23491 - * archive for more details.
23492 - */
23493 -
23494 -#include <asm/addrspace.h>
23495 -
23496 -/*
23497 - * IMS332 video controller register base address
23498 - */
23499 -#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)
23500 -
23501 -/*
23502 - * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
23503 - * is 1024x768x8
23504 - */
23505 -#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)
23506 -
23507 -/*
23508 - * The IMS 332 video controller used in the DECstation 5000/xx series
23509 - * uses 32 bits wide registers; the following defines declare the
23510 - * register numbers, to get the real offset, these have to be multiplied
23511 - * by four.
23512 - */
23513 -
23514 -#define IMS332_REG_CURSOR_RAM 0x200 /* hardware cursor bitmap */
23515 -
23516 -/*
23517 - * The color palette entries have the form 0x00BBGGRR
23518 - */
23519 -#define IMS332_REG_COLOR_PALETTE 0x100 /* color palette, 256 entries */
23520 -#define IMS332_REG_CURSOR_COLOR_PALETTE 0x0a1 /* cursor color palette, */
23521 - /* 3 entries */
23522 diff -Nur linux-2.4.32-rc1/drivers/video/newport_con.c linux-2.4.32-rc1.mips/drivers/video/newport_con.c
23523 --- linux-2.4.32-rc1/drivers/video/newport_con.c 2003-08-25 13:44:42.000000000 +0200
23524 +++ linux-2.4.32-rc1.mips/drivers/video/newport_con.c 2004-09-23 15:32:29.000000000 +0200
23525 @@ -22,6 +22,7 @@
23526 #include <linux/module.h>
23527 #include <linux/slab.h>
23528
23529 +#include <asm/io.h>
23530 #include <asm/uaccess.h>
23531 #include <asm/system.h>
23532 #include <asm/page.h>
23533 @@ -77,7 +78,7 @@
23534 static inline void newport_render_background(int xstart, int ystart,
23535 int xend, int yend, int ci)
23536 {
23537 - newport_wait();
23538 + newport_wait(npregs);
23539 npregs->set.wrmask = 0xffffffff;
23540 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23541 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23542 @@ -94,7 +95,7 @@
23543 unsigned short i;
23544
23545 for (i = 0; i < 16; i++) {
23546 - newport_bfwait();
23547 + newport_bfwait(npregs);
23548 newport_cmap_setaddr(npregs, color_table[i]);
23549 newport_cmap_setrgb(npregs,
23550 default_red[i],
23551 @@ -107,7 +108,7 @@
23552 unsigned long i;
23553
23554 for (i = 0; i < LINUX_LOGO_COLORS; i++) {
23555 - newport_bfwait();
23556 + newport_bfwait(npregs);
23557 newport_cmap_setaddr(npregs, i + 0x20);
23558 newport_cmap_setrgb(npregs,
23559 linux_logo_red[i],
23560 @@ -115,13 +116,13 @@
23561 linux_logo_blue[i]);
23562 }
23563
23564 - newport_wait();
23565 + newport_wait(npregs);
23566 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23567 NPORT_DMODE0_CHOST);
23568
23569 npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
23570 npregs->set.xyendi = ((newport_xsize - 1) << 16);
23571 - newport_wait();
23572 + newport_wait(npregs);
23573
23574 for (i = 0; i < LOGO_W * LOGO_H; i++)
23575 npregs->go.hostrw0 = linux_logo[i] << 24;
23576 @@ -133,7 +134,7 @@
23577 if (logo_active)
23578 return;
23579
23580 - newport_wait();
23581 + newport_wait(npregs);
23582 npregs->set.wrmask = 0xffffffff;
23583 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23584 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23585 @@ -155,7 +156,7 @@
23586 unsigned short treg;
23587 int i;
23588
23589 - newport_wait();
23590 + newport_wait(npregs);
23591 treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
23592 newport_vc2_set(npregs, VC2_IREG_CONTROL,
23593 (treg | VC2_CTRL_EVIDEO));
23594 @@ -165,7 +166,7 @@
23595 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23596 NPORT_DMODE_W2 | VC2_PROTOCOL);
23597 for (i = 0; i < 128; i++) {
23598 - newport_bfwait();
23599 + newport_bfwait(npregs);
23600 if (i == 92 || i == 94)
23601 npregs->set.dcbdata0.byshort.s1 = 0xff00;
23602 else
23603 @@ -205,7 +206,7 @@
23604 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23605 NPORT_DMODE_W2 | VC2_PROTOCOL);
23606 for (i = 0; i < 128; i++) {
23607 - newport_bfwait();
23608 + newport_bfwait(npregs);
23609 linetable[i] = npregs->set.dcbdata0.byshort.s1;
23610 }
23611
23612 @@ -216,12 +217,12 @@
23613 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23614 NPORT_DMODE_W2 | VC2_PROTOCOL);
23615 do {
23616 - newport_bfwait();
23617 + newport_bfwait(npregs);
23618 treg = npregs->set.dcbdata0.byshort.s1;
23619 if ((treg & 1) == 0)
23620 cols += (treg >> 7) & 0xfe;
23621 if ((treg & 0x80) == 0) {
23622 - newport_bfwait();
23623 + newport_bfwait(npregs);
23624 treg = npregs->set.dcbdata0.byshort.s1;
23625 }
23626 } while ((treg & 0x8000) == 0);
23627 @@ -291,16 +292,16 @@
23628
23629 if (!sgi_gfxaddr)
23630 return NULL;
23631 - npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
23632 + npregs = (struct newport_regs *) /* ioremap cannot fail */
23633 + ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
23634 npregs->cset.config = NPORT_CFG_GD0;
23635
23636 - if (newport_wait()) {
23637 - return NULL;
23638 - }
23639 + if (newport_wait(npregs))
23640 + goto out_unmap;
23641
23642 npregs->set.xstarti = TESTVAL;
23643 if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
23644 - return NULL;
23645 + goto out_unmap;
23646
23647 for (i = 0; i < MAX_NR_CONSOLES; i++)
23648 font_data[i] = FONT_DATA;
23649 @@ -310,6 +311,10 @@
23650 newport_get_screensize();
23651
23652 return "SGI Newport";
23653 +
23654 +out_unmap:
23655 + iounmap((void *)npregs);
23656 + return NULL;
23657 }
23658
23659 static void newport_init(struct vc_data *vc, int init)
23660 @@ -363,7 +368,7 @@
23661 (charattr & 0xf0) >> 4);
23662
23663 /* Set the color and drawing mode. */
23664 - newport_wait();
23665 + newport_wait(npregs);
23666 npregs->set.colori = charattr & 0xf;
23667 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23668 NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
23669 @@ -372,7 +377,7 @@
23670 /* Set coordinates for bitmap operation. */
23671 npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
23672 npregs->set.xyendi = ((xpos + 7) << 16);
23673 - newport_wait();
23674 + newport_wait(npregs);
23675
23676 /* Go, baby, go... */
23677 RENDER(npregs, p);
23678 @@ -396,7 +401,7 @@
23679 xpos + ((count - 1) << 3), ypos,
23680 (charattr & 0xf0) >> 4);
23681
23682 - newport_wait();
23683 + newport_wait(npregs);
23684
23685 /* Set the color and drawing mode. */
23686 npregs->set.colori = charattr & 0xf;
23687 @@ -407,7 +412,7 @@
23688 for (i = 0; i < count; i++, xpos += 8) {
23689 p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
23690
23691 - newport_wait();
23692 + newport_wait(npregs);
23693
23694 /* Set coordinates for bitmap operation. */
23695 npregs->set.xystarti =
23696 @@ -689,7 +694,7 @@
23697 xe = xs;
23698 xs = tmp;
23699 }
23700 - newport_wait();
23701 + newport_wait(npregs);
23702 npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
23703 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23704 | NPORT_DMODE0_STOPY);
23705 @@ -706,35 +711,35 @@
23706 #define DUMMY (void *) newport_dummy
23707
23708 const struct consw newport_con = {
23709 - con_startup: newport_startup,
23710 - con_init: newport_init,
23711 - con_deinit: newport_deinit,
23712 - con_clear: newport_clear,
23713 - con_putc: newport_putc,
23714 - con_putcs: newport_putcs,
23715 - con_cursor: newport_cursor,
23716 - con_scroll: newport_scroll,
23717 - con_bmove: newport_bmove,
23718 - con_switch: newport_switch,
23719 - con_blank: newport_blank,
23720 - con_font_op: newport_font_op,
23721 - con_set_palette: newport_set_palette,
23722 - con_scrolldelta: newport_scrolldelta,
23723 - con_set_origin: DUMMY,
23724 - con_save_screen: DUMMY
23725 + .con_startup = newport_startup,
23726 + .con_init = newport_init,
23727 + .con_deinit = newport_deinit,
23728 + .con_clear = newport_clear,
23729 + .con_putc = newport_putc,
23730 + .con_putcs = newport_putcs,
23731 + .con_cursor = newport_cursor,
23732 + .con_scroll = newport_scroll,
23733 + .con_bmove = newport_bmove,
23734 + .con_switch = newport_switch,
23735 + .con_blank = newport_blank,
23736 + .con_font_op = newport_font_op,
23737 + .con_set_palette = newport_set_palette,
23738 + .con_scrolldelta = newport_scrolldelta,
23739 + .con_set_origin = DUMMY,
23740 + .con_save_screen = DUMMY
23741 };
23742
23743 #ifdef MODULE
23744 static int __init newport_console_init(void)
23745 {
23746 take_over_console(&newport_con, 0, MAX_NR_CONSOLES - 1, 1);
23747 -
23748 return 0;
23749 }
23750
23751 static void __exit newport_console_exit(void)
23752 {
23753 give_up_console(&newport_con);
23754 + iounmap((void *)npregs);
23755 }
23756
23757 module_init(newport_console_init);
23758 diff -Nur linux-2.4.32-rc1/drivers/video/tgafb.c linux-2.4.32-rc1.mips/drivers/video/tgafb.c
23759 --- linux-2.4.32-rc1/drivers/video/tgafb.c 2001-11-14 23:52:20.000000000 +0100
23760 +++ linux-2.4.32-rc1.mips/drivers/video/tgafb.c 2004-10-30 01:15:02.000000000 +0200
23761 @@ -45,6 +45,15 @@
23762 #include <linux/console.h>
23763 #include <asm/io.h>
23764
23765 +#ifdef CONFIG_TC
23766 +#include <asm/dec/tc.h>
23767 +#else
23768 +static int search_tc_card(const char *) { return -1; }
23769 +static void claim_tc_card(int) { }
23770 +static void release_tc_card(int) { }
23771 +static unsigned long get_tc_base_addr(int) { return 0; }
23772 +#endif
23773 +
23774 #include <video/fbcon.h>
23775 #include <video/fbcon-cfb8.h>
23776 #include <video/fbcon-cfb32.h>
23777 @@ -84,10 +93,10 @@
23778 };
23779
23780 static unsigned int deep_presets[4] = {
23781 - 0x00014000,
23782 - 0x0001440d,
23783 + 0x00004000,
23784 + 0x0000440d,
23785 0xffffffff,
23786 - 0x0001441d
23787 + 0x0000441d
23788 };
23789
23790 static unsigned int rasterop_presets[4] = {
23791 @@ -131,6 +140,13 @@
23792 0,
23793 FB_VMODE_NONINTERLACED
23794 }},
23795 + { "1280x1024-72", { /* mode #0 of PMAGD boards */
23796 + 1280, 1024, 1280, 1024, 0, 0, 0, 0,
23797 + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
23798 + 0, 0, -1, -1, FB_ACCELF_TEXT, 7692, 232, 32, 34, 3, 160, 3,
23799 + FB_SYNC_ON_GREEN,
23800 + FB_VMODE_NONINTERLACED
23801 + }},
23802 { "800x600-56", {
23803 800, 600, 800, 600, 0, 0, 0, 0,
23804 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
23805 @@ -488,7 +504,8 @@
23806 continue;
23807
23808 mb();
23809 - TGA_WRITE_REG(deep_presets[fb_info.tga_type], TGA_DEEP_REG);
23810 + TGA_WRITE_REG(deep_presets[fb_info.tga_type] |
23811 + (par->sync_on_green ? 0x0 : 0x00010000), TGA_DEEP_REG);
23812 while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
23813 continue;
23814 mb();
23815 @@ -548,7 +565,7 @@
23816 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
23817 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
23818 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2,
23819 - (par->sync_on_green ? 0x80 : 0x40));
23820 + (par->sync_on_green ? 0xc0 : 0x40));
23821
23822 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
23823 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
23824 @@ -921,19 +938,34 @@
23825 int __init tgafb_init(void)
23826 {
23827 struct pci_dev *pdev;
23828 + int slot;
23829
23830 pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
23831 if (!pdev)
23832 + slot = search_tc_card("PMAGD");
23833 + if (!pdev && slot < 0)
23834 return -ENXIO;
23835
23836 /* divine board type */
23837
23838 - fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
23839 - fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
23840 - fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23841 - fb_info.tga_fb_base = (fb_info.tga_mem_base
23842 + if (pdev) {
23843 + fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start,
23844 + 0);
23845 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
23846 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23847 + fb_info.tga_fb_base = (fb_info.tga_mem_base
23848 + fb_offset_presets[fb_info.tga_type]);
23849 - pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
23850 + pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
23851 +
23852 + } else {
23853 + claim_tc_card(slot);
23854 + fb_info.tga_mem_base = get_tc_base_addr(slot);
23855 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f; /* ? */
23856 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23857 + fb_info.tga_fb_base = (fb_info.tga_mem_base
23858 + + fb_offset_presets[fb_info.tga_type]);
23859 + fb_info.tga_chip_rev = TGA_READ_REG(TGA_START_REG) & 0xff;
23860 + }
23861
23862 /* setup framebuffer */
23863
23864 @@ -950,40 +982,62 @@
23865 fb_info.gen.fbhw = &tgafb_hwswitch;
23866 fb_info.gen.fbhw->detect();
23867
23868 - printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
23869 - printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
23870 - pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
23871 + if (pdev) {
23872 + printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
23873 + fb_info.tga_chip_rev);
23874 + printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
23875 + pdev->bus->number,
23876 + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
23877 + } else {
23878 + printk (KERN_INFO "tgafb: SFB+ detected, rev=0x%02x\n",
23879 + fb_info.tga_chip_rev);
23880 + }
23881
23882 switch (fb_info.tga_type)
23883 {
23884 case TGA_TYPE_8PLANE:
23885 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
23886 + if (pdev)
23887 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
23888 + else
23889 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E1");
23890 break;
23891
23892 case TGA_TYPE_24PLANE:
23893 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
23894 + if (pdev)
23895 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
23896 + else
23897 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E2");
23898 break;
23899
23900 case TGA_TYPE_24PLUSZ:
23901 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
23902 + if (pdev)
23903 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
23904 + else
23905 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E3");
23906 break;
23907 }
23908
23909 /* This should give a reasonable default video mode */
23910
23911 if (!default_var_valid) {
23912 - default_var = tgafb_predefined[0].var;
23913 + if (pdev)
23914 + default_var = tgafb_predefined[0].var;
23915 + else
23916 + default_var = tgafb_predefined[1].var;
23917 }
23918 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
23919 disp.var.activate = FB_ACTIVATE_NOW;
23920 fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
23921 fbgen_set_disp(-1, &fb_info.gen);
23922 fbgen_install_cmap(0, &fb_info.gen);
23923 - if (register_framebuffer(&fb_info.gen.info) < 0)
23924 + if (register_framebuffer(&fb_info.gen.info) < 0) {
23925 + if (slot >= 0)
23926 + release_tc_card(slot);
23927 return -EINVAL;
23928 - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
23929 + }
23930 + printk(KERN_INFO "fb%d: %s frame buffer device at 0x%llx\n",
23931 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,
23932 - pdev->resource[0].start);
23933 + fb_info.tga_mem_base);
23934 return 0;
23935 }
23936
23937 diff -Nur linux-2.4.32-rc1/drivers/video/tgafb.h linux-2.4.32-rc1.mips/drivers/video/tgafb.h
23938 --- linux-2.4.32-rc1/drivers/video/tgafb.h 2000-04-12 18:47:28.000000000 +0200
23939 +++ linux-2.4.32-rc1.mips/drivers/video/tgafb.h 2004-10-30 01:15:02.000000000 +0200
23940 @@ -36,6 +36,7 @@
23941 #define TGA_RASTEROP_REG 0x0034
23942 #define TGA_PIXELSHIFT_REG 0x0038
23943 #define TGA_DEEP_REG 0x0050
23944 +#define TGA_START_REG 0x0054
23945 #define TGA_PIXELMASK_REG 0x005c
23946 #define TGA_CURSOR_BASE_REG 0x0060
23947 #define TGA_HORIZ_REG 0x0064
23948 diff -Nur linux-2.4.32-rc1/fs/binfmt_elf.c linux-2.4.32-rc1.mips/fs/binfmt_elf.c
23949 --- linux-2.4.32-rc1/fs/binfmt_elf.c 2005-06-01 02:56:56.000000000 +0200
23950 +++ linux-2.4.32-rc1.mips/fs/binfmt_elf.c 2005-05-23 14:12:31.000000000 +0200
23951 @@ -660,6 +660,9 @@
23952 bprm->argc++;
23953 }
23954 }
23955 + } else {
23956 + /* Executables without an interpreter also need a personality */
23957 + SET_PERSONALITY(elf_ex, ibcs2_interpreter);
23958 }
23959
23960 /* Flush all traces of the currently running executable */
23961 @@ -1211,7 +1214,11 @@
23962 elf.e_entry = 0;
23963 elf.e_phoff = sizeof(elf);
23964 elf.e_shoff = 0;
23965 +#ifdef ELF_CORE_EFLAGS
23966 + elf.e_flags = ELF_CORE_EFLAGS;
23967 +#else
23968 elf.e_flags = 0;
23969 +#endif
23970 elf.e_ehsize = sizeof(elf);
23971 elf.e_phentsize = sizeof(struct elf_phdr);
23972 elf.e_phnum = segs+1; /* Include notes */
23973 diff -Nur linux-2.4.32-rc1/fs/partitions/sgi.c linux-2.4.32-rc1.mips/fs/partitions/sgi.c
23974 --- linux-2.4.32-rc1/fs/partitions/sgi.c 2001-10-02 05:03:26.000000000 +0200
23975 +++ linux-2.4.32-rc1.mips/fs/partitions/sgi.c 2004-08-11 22:30:07.000000000 +0200
23976 @@ -17,6 +17,11 @@
23977 #include "check.h"
23978 #include "sgi.h"
23979
23980 +#if CONFIG_BLK_DEV_MD
23981 +extern void md_autodetect_dev(kdev_t dev);
23982 +#endif
23983 +
23984 +
23985 int sgi_partition(struct gendisk *hd, struct block_device *bdev, unsigned long first_sector, int current_minor)
23986 {
23987 int i, csum, magic;
23988 @@ -77,6 +82,10 @@
23989 if(!blocks)
23990 continue;
23991 add_gd_partition(hd, current_minor, start, blocks);
23992 +#ifdef CONFIG_BLK_DEV_MD
23993 + if (be32_to_cpu(p->type) == LINUX_RAID_PARTITION)
23994 + md_autodetect_dev(MKDEV(hd->major, current_minor));
23995 +#endif
23996 current_minor++;
23997 }
23998 printk("\n");
23999 diff -Nur linux-2.4.32-rc1/fs/proc/array.c linux-2.4.32-rc1.mips/fs/proc/array.c
24000 --- linux-2.4.32-rc1/fs/proc/array.c 2005-01-19 15:10:11.000000000 +0100
24001 +++ linux-2.4.32-rc1.mips/fs/proc/array.c 2004-11-29 18:47:18.000000000 +0100
24002 @@ -368,15 +368,15 @@
24003 task->cmin_flt,
24004 task->maj_flt,
24005 task->cmaj_flt,
24006 - task->times.tms_utime,
24007 - task->times.tms_stime,
24008 - task->times.tms_cutime,
24009 - task->times.tms_cstime,
24010 + hz_to_std(task->times.tms_utime),
24011 + hz_to_std(task->times.tms_stime),
24012 + hz_to_std(task->times.tms_cutime),
24013 + hz_to_std(task->times.tms_cstime),
24014 priority,
24015 nice,
24016 0UL /* removed */,
24017 task->it_real_value,
24018 - task->start_time,
24019 + hz_to_std(task->start_time),
24020 vsize,
24021 mm ? mm->rss : 0, /* you might want to shift this left 3 */
24022 task->rlim[RLIMIT_RSS].rlim_cur,
24023 @@ -615,14 +615,14 @@
24024
24025 len = sprintf(buffer,
24026 "cpu %lu %lu\n",
24027 - task->times.tms_utime,
24028 - task->times.tms_stime);
24029 + hz_to_std(task->times.tms_utime),
24030 + hz_to_std(task->times.tms_stime));
24031
24032 for (i = 0 ; i < smp_num_cpus; i++)
24033 len += sprintf(buffer + len, "cpu%d %lu %lu\n",
24034 i,
24035 - task->per_cpu_utime[cpu_logical_map(i)],
24036 - task->per_cpu_stime[cpu_logical_map(i)]);
24037 + hz_to_std(task->per_cpu_utime[cpu_logical_map(i)]),
24038 + hz_to_std(task->per_cpu_stime[cpu_logical_map(i)]));
24039
24040 return len;
24041 }
24042 diff -Nur linux-2.4.32-rc1/fs/proc/proc_misc.c linux-2.4.32-rc1.mips/fs/proc/proc_misc.c
24043 --- linux-2.4.32-rc1/fs/proc/proc_misc.c 2004-08-08 01:26:06.000000000 +0200
24044 +++ linux-2.4.32-rc1.mips/fs/proc/proc_misc.c 2004-08-14 20:39:01.000000000 +0200
24045 @@ -308,16 +308,16 @@
24046 {
24047 int i, len = 0;
24048 extern unsigned long total_forks;
24049 - unsigned long jif = jiffies;
24050 + unsigned long jif = hz_to_std(jiffies);
24051 unsigned int sum = 0, user = 0, nice = 0, system = 0;
24052 int major, disk;
24053
24054 for (i = 0 ; i < smp_num_cpus; i++) {
24055 int cpu = cpu_logical_map(i), j;
24056
24057 - user += kstat.per_cpu_user[cpu];
24058 - nice += kstat.per_cpu_nice[cpu];
24059 - system += kstat.per_cpu_system[cpu];
24060 + user += hz_to_std(kstat.per_cpu_user[cpu]);
24061 + nice += hz_to_std(kstat.per_cpu_nice[cpu]);
24062 + system += hz_to_std(kstat.per_cpu_system[cpu]);
24063 #if !defined(CONFIG_ARCH_S390)
24064 for (j = 0 ; j < NR_IRQS ; j++)
24065 sum += kstat.irqs[cpu][j];
24066 @@ -331,10 +331,10 @@
24067 proc_sprintf(page, &off, &len,
24068 "cpu%d %u %u %u %lu\n",
24069 i,
24070 - kstat.per_cpu_user[cpu_logical_map(i)],
24071 - kstat.per_cpu_nice[cpu_logical_map(i)],
24072 - kstat.per_cpu_system[cpu_logical_map(i)],
24073 - jif - ( kstat.per_cpu_user[cpu_logical_map(i)] \
24074 + hz_to_std(kstat.per_cpu_user[cpu_logical_map(i)]),
24075 + hz_to_std(kstat.per_cpu_nice[cpu_logical_map(i)]),
24076 + hz_to_std(kstat.per_cpu_system[cpu_logical_map(i)]),
24077 + jif - hz_to_std( kstat.per_cpu_user[cpu_logical_map(i)] \
24078 + kstat.per_cpu_nice[cpu_logical_map(i)] \
24079 + kstat.per_cpu_system[cpu_logical_map(i)]));
24080 proc_sprintf(page, &off, &len,
24081 diff -Nur linux-2.4.32-rc1/include/asm-alpha/param.h linux-2.4.32-rc1.mips/include/asm-alpha/param.h
24082 --- linux-2.4.32-rc1/include/asm-alpha/param.h 2000-11-08 08:37:31.000000000 +0100
24083 +++ linux-2.4.32-rc1.mips/include/asm-alpha/param.h 2000-11-28 04:59:03.000000000 +0100
24084 @@ -13,6 +13,9 @@
24085 # else
24086 # define HZ 1200
24087 # endif
24088 +#ifdef __KERNEL__
24089 +# define hz_to_std(a) (a)
24090 +#endif
24091 #endif
24092
24093 #define EXEC_PAGESIZE 8192
24094 diff -Nur linux-2.4.32-rc1/include/asm-i386/param.h linux-2.4.32-rc1.mips/include/asm-i386/param.h
24095 --- linux-2.4.32-rc1/include/asm-i386/param.h 2000-10-27 20:04:43.000000000 +0200
24096 +++ linux-2.4.32-rc1.mips/include/asm-i386/param.h 2000-11-23 03:00:55.000000000 +0100
24097 @@ -3,6 +3,9 @@
24098
24099 #ifndef HZ
24100 #define HZ 100
24101 +#ifdef __KERNEL__
24102 +#define hz_to_std(a) (a)
24103 +#endif
24104 #endif
24105
24106 #define EXEC_PAGESIZE 4096
24107 diff -Nur linux-2.4.32-rc1/include/asm-ia64/param.h linux-2.4.32-rc1.mips/include/asm-ia64/param.h
24108 --- linux-2.4.32-rc1/include/asm-ia64/param.h 2004-04-14 15:05:40.000000000 +0200
24109 +++ linux-2.4.32-rc1.mips/include/asm-ia64/param.h 2004-04-16 05:14:20.000000000 +0200
24110 @@ -7,9 +7,15 @@
24111 * Based on <asm-i386/param.h>.
24112 *
24113 * Modified 1998, 1999, 2002-2003
24114 - * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
24115 + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
24116 */
24117
24118 +#include <linux/config.h>
24119 +
24120 +#ifdef __KERNEL__
24121 +#define hz_to_std(a) (a)
24122 +#endif
24123 +
24124 #define EXEC_PAGESIZE 65536
24125
24126 #ifndef NGROUPS
24127 diff -Nur linux-2.4.32-rc1/include/asm-m68k/param.h linux-2.4.32-rc1.mips/include/asm-m68k/param.h
24128 --- linux-2.4.32-rc1/include/asm-m68k/param.h 2001-01-04 22:00:55.000000000 +0100
24129 +++ linux-2.4.32-rc1.mips/include/asm-m68k/param.h 2001-01-11 05:02:45.000000000 +0100
24130 @@ -3,6 +3,9 @@
24131
24132 #ifndef HZ
24133 #define HZ 100
24134 +#ifdef __KERNEL__
24135 +#define hz_to_std(a) (a)
24136 +#endif
24137 #endif
24138
24139 #define EXEC_PAGESIZE 8192
24140 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1000_gpio.h linux-2.4.32-rc1.mips/include/asm-mips/au1000_gpio.h
24141 --- linux-2.4.32-rc1/include/asm-mips/au1000_gpio.h 2002-11-29 00:53:15.000000000 +0100
24142 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1000_gpio.h 2005-01-30 09:01:28.000000000 +0100
24143 @@ -30,6 +30,13 @@
24144 * 675 Mass Ave, Cambridge, MA 02139, USA.
24145 */
24146
24147 +/*
24148 + * Revision history
24149 + * 01/31/02 0.01 Initial release. Steve Longerbeam, MontaVista
24150 + * 10/12/03 0.1 Added Au1100/Au1500, GPIO2, and bit operations. K.C. Nishio, AMD
24151 + * 08/05/04 0.11 Added Au1550 and Au1200. K.C. Nishio
24152 + */
24153 +
24154 #ifndef __AU1000_GPIO_H
24155 #define __AU1000_GPIO_H
24156
24157 @@ -44,13 +51,94 @@
24158 #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
24159 #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
24160
24161 +// bit operations
24162 +#define AU1000GPIO_BIT_READ _IOW (AU1000GPIO_IOC_MAGIC, 6, int)
24163 +#define AU1000GPIO_BIT_SET _IOW (AU1000GPIO_IOC_MAGIC, 7, int)
24164 +#define AU1000GPIO_BIT_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 8, int)
24165 +#define AU1000GPIO_BIT_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 9, int)
24166 +#define AU1000GPIO_BIT_INIT _IOW (AU1000GPIO_IOC_MAGIC, 10, int)
24167 +#define AU1000GPIO_BIT_TERM _IOW (AU1000GPIO_IOC_MAGIC, 11, int)
24168 +
24169 +/* set this major numer same as the CRIS GPIO driver */
24170 +#define AU1X00_GPIO_MAJOR (120)
24171 +
24172 +#define ENABLED_ZERO (0)
24173 +#define ENABLED_ONE (1)
24174 +#define ENABLED_10 (0x2)
24175 +#define ENABLED_11 (0x3)
24176 +#define ENABLED_111 (0x7)
24177 +#define NOT_AVAIL (-1)
24178 +#define AU1X00_MAX_PRIMARY_GPIO (32)
24179 +
24180 +#define AU1000_GPIO_MINOR_MAX AU1X00_MAX_PRIMARY_GPIO
24181 +/* Au1100, 1500, 1550 and 1200 have the secondary GPIO block */
24182 +#define AU1XX0_GPIO_MINOR_MAX (48)
24183 +
24184 +#define AU1X00_GPIO_NAME "gpio"
24185 +
24186 +/* GPIO pins which are not multiplexed */
24187 +#if defined(CONFIG_SOC_AU1000)
24188 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24189 + #define NATIVE_GPIO2PIN (0)
24190 +#elif defined(CONFIG_SOC_AU1100)
24191 + #define NATIVE_GPIOPIN ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) | (1 << 18) | \
24192 + (1 << 17) | (1 << 16) | (1 << 7) | (1 << 1) | (1 << 0))
24193 + #define NATIVE_GPIO2PIN (0)
24194 +#elif defined(CONFIG_SOC_AU1500)
24195 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24196 + /* exclude the PCI reset output signal: GPIO[200], DMA_REQ2 and DMA_REQ3 */
24197 + #define NATIVE_GPIO2PIN (0xfffe & ~((1 << 9) | (1 << 8)))
24198 +#elif defined(CONFIG_SOC_AU1550)
24199 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 6) | (1 << 1) | (1 << 0))
24200 + /* please refere Au1550 Data Book, chapter 15 */
24201 + #define NATIVE_GPIO2PIN (1 << 5)
24202 +#elif defined(CONFIG_SOC_AU1200)
24203 + #define NATIVE_GPIOPIN ((1 << 7) | (1 << 5))
24204 + #define NATIVE_GPIO2PIN (0)
24205 +#endif
24206 +
24207 +/* minor as u32 */
24208 +#define MINOR_TO_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? minor : (minor - AU1X00_MAX_PRIMARY_GPIO))
24209 +#define IS_PRIMARY_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? 1 : 0)
24210 +
24211 +/*
24212 + * pin to minor mapping.
24213 + * GPIO0-GPIO31, minor=0-31.
24214 + * GPIO200-GPIO215, minor=32-47.
24215 + */
24216 +typedef struct _au1x00_gpio_bit_ctl {
24217 + int direction; // The direction of this GPIO pin. 0: IN, 1: OUT.
24218 + int data; // Pin output when itized (0/1), or at the term. 0/1/-1 (tristate).
24219 +} au1x00_gpio_bit_ctl;
24220 +
24221 +typedef struct _au1x00_gpio_driver {
24222 + const char *driver_name;
24223 + const char *name;
24224 + int name_base; /* offset of printed name */
24225 + short major; /* major device number */
24226 + short minor_start; /* start of minor device number*/
24227 + short num; /* number of devices */
24228 +} au1x00_gpio_driver;
24229 +
24230 #ifdef __KERNEL__
24231 -extern u32 get_au1000_avail_gpio_mask(void);
24232 -extern int au1000gpio_tristate(u32 data);
24233 -extern int au1000gpio_in(u32 *data);
24234 -extern int au1000gpio_set(u32 data);
24235 -extern int au1000gpio_clear(u32 data);
24236 -extern int au1000gpio_out(u32 data);
24237 +extern u32 get_au1000_avail_gpio_mask(u32 *avail_gpio2);
24238 +extern int au1000gpio_tristate(u32 minor, u32 data);
24239 +extern int au1000gpio_in(u32 minor, u32 *data);
24240 +extern int au1000gpio_set(u32 minor, u32 data);
24241 +extern int au1000gpio_clear(u32 minor, u32 data);
24242 +extern int au1000gpio_out(u32 minor, u32 data);
24243 +extern int au1000gpio_bit_read(u32 minor, u32 *read_data);
24244 +extern int au1000gpio_bit_set(u32 minor);
24245 +extern int au1000gpio_bit_clear(u32 minor);
24246 +extern int au1000gpio_bit_tristate(u32 minor);
24247 +extern int check_minor_to_gpio(u32 minor);
24248 +extern int au1000gpio_bit_init(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24249 +extern int au1000gpio_bit_term(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24250 +
24251 +extern void gpio_register_devfs (au1x00_gpio_driver *driver, unsigned int flags, unsigned minor);
24252 +extern void gpio_unregister_devfs (au1x00_gpio_driver *driver, unsigned minor);
24253 +extern int gpio_register_driver(au1x00_gpio_driver *driver);
24254 +extern int gpio_unregister_driver(au1x00_gpio_driver *driver);
24255 #endif
24256
24257 #endif
24258 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1000.h linux-2.4.32-rc1.mips/include/asm-mips/au1000.h
24259 --- linux-2.4.32-rc1/include/asm-mips/au1000.h 2005-01-19 15:10:11.000000000 +0100
24260 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1000.h 2005-01-30 09:01:28.000000000 +0100
24261 @@ -160,28 +160,356 @@
24262 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
24263 #endif
24264
24265 -/* SDRAM Controller */
24266 +/*
24267 + * SDRAM Register Offsets
24268 + */
24269 #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
24270 -#define MEM_SDMODE0 0xB4000000
24271 -#define MEM_SDMODE1 0xB4000004
24272 -#define MEM_SDMODE2 0xB4000008
24273 -
24274 -#define MEM_SDADDR0 0xB400000C
24275 -#define MEM_SDADDR1 0xB4000010
24276 -#define MEM_SDADDR2 0xB4000014
24277 -
24278 -#define MEM_SDREFCFG 0xB4000018
24279 -#define MEM_SDPRECMD 0xB400001C
24280 -#define MEM_SDAUTOREF 0xB4000020
24281 -
24282 -#define MEM_SDWRMD0 0xB4000024
24283 -#define MEM_SDWRMD1 0xB4000028
24284 -#define MEM_SDWRMD2 0xB400002C
24285 +#define MEM_SDMODE0 (0x0000)
24286 +#define MEM_SDMODE1 (0x0004)
24287 +#define MEM_SDMODE2 (0x0008)
24288 +#define MEM_SDADDR0 (0x000C)
24289 +#define MEM_SDADDR1 (0x0010)
24290 +#define MEM_SDADDR2 (0x0014)
24291 +#define MEM_SDREFCFG (0x0018)
24292 +#define MEM_SDPRECMD (0x001C)
24293 +#define MEM_SDAUTOREF (0x0020)
24294 +#define MEM_SDWRMD0 (0x0024)
24295 +#define MEM_SDWRMD1 (0x0028)
24296 +#define MEM_SDWRMD2 (0x002C)
24297 +#define MEM_SDSLEEP (0x0030)
24298 +#define MEM_SDSMCKE (0x0034)
24299 +
24300 +#ifndef ASSEMBLER
24301 +/*typedef volatile struct
24302 +{
24303 + uint32 sdmode0;
24304 + uint32 sdmode1;
24305 + uint32 sdmode2;
24306 + uint32 sdaddr0;
24307 + uint32 sdaddr1;
24308 + uint32 sdaddr2;
24309 + uint32 sdrefcfg;
24310 + uint32 sdautoref;
24311 + uint32 sdwrmd0;
24312 + uint32 sdwrmd1;
24313 + uint32 sdwrmd2;
24314 + uint32 sdsleep;
24315 + uint32 sdsmcke;
24316 +
24317 +} AU1X00_SDRAM;*/
24318 +#endif
24319 +
24320 +/*
24321 + * MEM_SDMODE register content definitions
24322 + */
24323 +#define MEM_SDMODE_F (1<<22)
24324 +#define MEM_SDMODE_SR (1<<21)
24325 +#define MEM_SDMODE_BS (1<<20)
24326 +#define MEM_SDMODE_RS (3<<18)
24327 +#define MEM_SDMODE_CS (7<<15)
24328 +#define MEM_SDMODE_TRAS (15<<11)
24329 +#define MEM_SDMODE_TMRD (3<<9)
24330 +#define MEM_SDMODE_TWR (3<<7)
24331 +#define MEM_SDMODE_TRP (3<<5)
24332 +#define MEM_SDMODE_TRCD (3<<3)
24333 +#define MEM_SDMODE_TCL (7<<0)
24334 +
24335 +#define MEM_SDMODE_BS_2Bank (0<<20)
24336 +#define MEM_SDMODE_BS_4Bank (1<<20)
24337 +#define MEM_SDMODE_RS_11Row (0<<18)
24338 +#define MEM_SDMODE_RS_12Row (1<<18)
24339 +#define MEM_SDMODE_RS_13Row (2<<18)
24340 +#define MEM_SDMODE_RS_N(N) ((N)<<18)
24341 +#define MEM_SDMODE_CS_7Col (0<<15)
24342 +#define MEM_SDMODE_CS_8Col (1<<15)
24343 +#define MEM_SDMODE_CS_9Col (2<<15)
24344 +#define MEM_SDMODE_CS_10Col (3<<15)
24345 +#define MEM_SDMODE_CS_11Col (4<<15)
24346 +#define MEM_SDMODE_CS_N(N) ((N)<<15)
24347 +#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
24348 +#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
24349 +#define MEM_SDMODE_TWR_N(N) ((N)<<7)
24350 +#define MEM_SDMODE_TRP_N(N) ((N)<<5)
24351 +#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
24352 +#define MEM_SDMODE_TCL_N(N) ((N)<<0)
24353 +
24354 +/*
24355 + * MEM_SDADDR register contents definitions
24356 + */
24357 +#define MEM_SDADDR_E (1<<20)
24358 +#define MEM_SDADDR_CSBA (0x03FF<<10)
24359 +#define MEM_SDADDR_CSMASK (0x03FF<<0)
24360 +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
24361 +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
24362 +
24363 +/*
24364 + * MEM_SDREFCFG register content definitions
24365 + */
24366 +#define MEM_SDREFCFG_TRC (15<<28)
24367 +#define MEM_SDREFCFG_TRPM (3<<26)
24368 +#define MEM_SDREFCFG_E (1<<25)
24369 +#define MEM_SDREFCFG_RE (0x1ffffff<<0)
24370 +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
24371 +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
24372 +#define MEM_SDREFCFG_REF_N(N) (N)
24373 +#endif
24374 +
24375 +/***********************************************************************/
24376 +
24377 +/*
24378 + * Au1550 SDRAM Register Offsets
24379 + */
24380 +
24381 +/***********************************************************************/
24382 +
24383 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
24384 +#define MEM_SDMODE0 (0x0800)
24385 +#define MEM_SDMODE1 (0x0808)
24386 +#define MEM_SDMODE2 (0x0810)
24387 +#define MEM_SDADDR0 (0x0820)
24388 +#define MEM_SDADDR1 (0x0828)
24389 +#define MEM_SDADDR2 (0x0830)
24390 +#define MEM_SDCONFIGA (0x0840)
24391 +#define MEM_SDCONFIGB (0x0848)
24392 +#define MEM_SDSTAT (0x0850)
24393 +#define MEM_SDERRADDR (0x0858)
24394 +#define MEM_SDSTRIDE0 (0x0860)
24395 +#define MEM_SDSTRIDE1 (0x0868)
24396 +#define MEM_SDSTRIDE2 (0x0870)
24397 +#define MEM_SDWRMD0 (0x0880)
24398 +#define MEM_SDWRMD1 (0x0888)
24399 +#define MEM_SDWRMD2 (0x0890)
24400 +#define MEM_SDPRECMD (0x08C0)
24401 +#define MEM_SDAUTOREF (0x08C8)
24402 +#define MEM_SDSREF (0x08D0)
24403 +#define MEM_SDSLEEP MEM_SDSREF
24404 +
24405 +#ifndef ASSEMBLER
24406 +/*typedef volatile struct
24407 +{
24408 + uint32 sdmode0;
24409 + uint32 reserved0;
24410 + uint32 sdmode1;
24411 + uint32 reserved1;
24412 + uint32 sdmode2;
24413 + uint32 reserved2[3];
24414 + uint32 sdaddr0;
24415 + uint32 reserved3;
24416 + uint32 sdaddr1;
24417 + uint32 reserved4;
24418 + uint32 sdaddr2;
24419 + uint32 reserved5[3];
24420 + uint32 sdconfiga;
24421 + uint32 reserved6;
24422 + uint32 sdconfigb;
24423 + uint32 reserved7;
24424 + uint32 sdstat;
24425 + uint32 reserved8;
24426 + uint32 sderraddr;
24427 + uint32 reserved9;
24428 + uint32 sdstride0;
24429 + uint32 reserved10;
24430 + uint32 sdstride1;
24431 + uint32 reserved11;
24432 + uint32 sdstride2;
24433 + uint32 reserved12[3];
24434 + uint32 sdwrmd0;
24435 + uint32 reserved13;
24436 + uint32 sdwrmd1;
24437 + uint32 reserved14;
24438 + uint32 sdwrmd2;
24439 + uint32 reserved15[11];
24440 + uint32 sdprecmd;
24441 + uint32 reserved16;
24442 + uint32 sdautoref;
24443 + uint32 reserved17;
24444 + uint32 sdsref;
24445 +
24446 +} AU1550_SDRAM;*/
24447 +#endif
24448 +#endif
24449 +
24450 +/*
24451 + * Physical base addresses for integrated peripherals
24452 + */
24453 +
24454 +#ifdef CONFIG_SOC_AU1000
24455 +#define MEM_PHYS_ADDR 0x14000000
24456 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24457 +#define DMA0_PHYS_ADDR 0x14002000
24458 +#define DMA1_PHYS_ADDR 0x14002100
24459 +#define DMA2_PHYS_ADDR 0x14002200
24460 +#define DMA3_PHYS_ADDR 0x14002300
24461 +#define DMA4_PHYS_ADDR 0x14002400
24462 +#define DMA5_PHYS_ADDR 0x14002500
24463 +#define DMA6_PHYS_ADDR 0x14002600
24464 +#define DMA7_PHYS_ADDR 0x14002700
24465 +#define IC0_PHYS_ADDR 0x10400000
24466 +#define IC1_PHYS_ADDR 0x11800000
24467 +#define AC97_PHYS_ADDR 0x10000000
24468 +#define USBH_PHYS_ADDR 0x10100000
24469 +#define USBD_PHYS_ADDR 0x10200000
24470 +#define IRDA_PHYS_ADDR 0x10300000
24471 +#define MAC0_PHYS_ADDR 0x10500000
24472 +#define MAC1_PHYS_ADDR 0x10510000
24473 +#define MACEN_PHYS_ADDR 0x10520000
24474 +#define MACDMA0_PHYS_ADDR 0x14004000
24475 +#define MACDMA1_PHYS_ADDR 0x14004200
24476 +#define I2S_PHYS_ADDR 0x11000000
24477 +#define UART0_PHYS_ADDR 0x11100000
24478 +#define UART1_PHYS_ADDR 0x11200000
24479 +#define UART2_PHYS_ADDR 0x11300000
24480 +#define UART3_PHYS_ADDR 0x11400000
24481 +#define SSI0_PHYS_ADDR 0x11600000
24482 +#define SSI1_PHYS_ADDR 0x11680000
24483 +#define SYS_PHYS_ADDR 0x11900000
24484 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24485 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24486 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24487 +#endif
24488 +
24489 +/********************************************************************/
24490
24491 -#define MEM_SDSLEEP 0xB4000030
24492 -#define MEM_SDSMCKE 0xB4000034
24493 +#ifdef CONFIG_SOC_AU1500
24494 +#define MEM_PHYS_ADDR 0x14000000
24495 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24496 +#define DMA0_PHYS_ADDR 0x14002000
24497 +#define DMA1_PHYS_ADDR 0x14002100
24498 +#define DMA2_PHYS_ADDR 0x14002200
24499 +#define DMA3_PHYS_ADDR 0x14002300
24500 +#define DMA4_PHYS_ADDR 0x14002400
24501 +#define DMA5_PHYS_ADDR 0x14002500
24502 +#define DMA6_PHYS_ADDR 0x14002600
24503 +#define DMA7_PHYS_ADDR 0x14002700
24504 +#define IC0_PHYS_ADDR 0x10400000
24505 +#define IC1_PHYS_ADDR 0x11800000
24506 +#define AC97_PHYS_ADDR 0x10000000
24507 +#define USBH_PHYS_ADDR 0x10100000
24508 +#define USBD_PHYS_ADDR 0x10200000
24509 +#define PCI_PHYS_ADDR 0x14005000
24510 +#define MAC0_PHYS_ADDR 0x11500000
24511 +#define MAC1_PHYS_ADDR 0x11510000
24512 +#define MACEN_PHYS_ADDR 0x11520000
24513 +#define MACDMA0_PHYS_ADDR 0x14004000
24514 +#define MACDMA1_PHYS_ADDR 0x14004200
24515 +#define I2S_PHYS_ADDR 0x11000000
24516 +#define UART0_PHYS_ADDR 0x11100000
24517 +#define UART3_PHYS_ADDR 0x11400000
24518 +#define GPIO2_PHYS_ADDR 0x11700000
24519 +#define SYS_PHYS_ADDR 0x11900000
24520 +#define PCI_MEM_PHYS_ADDR 0x400000000
24521 +#define PCI_IO_PHYS_ADDR 0x500000000
24522 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
24523 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
24524 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24525 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24526 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24527 #endif
24528
24529 +/********************************************************************/
24530 +
24531 +#ifdef CONFIG_SOC_AU1100
24532 +#define MEM_PHYS_ADDR 0x14000000
24533 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24534 +#define DMA0_PHYS_ADDR 0x14002000
24535 +#define DMA1_PHYS_ADDR 0x14002100
24536 +#define DMA2_PHYS_ADDR 0x14002200
24537 +#define DMA3_PHYS_ADDR 0x14002300
24538 +#define DMA4_PHYS_ADDR 0x14002400
24539 +#define DMA5_PHYS_ADDR 0x14002500
24540 +#define DMA6_PHYS_ADDR 0x14002600
24541 +#define DMA7_PHYS_ADDR 0x14002700
24542 +#define IC0_PHYS_ADDR 0x10400000
24543 +#define SD0_PHYS_ADDR 0x10600000
24544 +#define SD1_PHYS_ADDR 0x10680000
24545 +#define IC1_PHYS_ADDR 0x11800000
24546 +#define AC97_PHYS_ADDR 0x10000000
24547 +#define USBH_PHYS_ADDR 0x10100000
24548 +#define USBD_PHYS_ADDR 0x10200000
24549 +#define IRDA_PHYS_ADDR 0x10300000
24550 +#define MAC0_PHYS_ADDR 0x10500000
24551 +#define MACEN_PHYS_ADDR 0x10520000
24552 +#define MACDMA0_PHYS_ADDR 0x14004000
24553 +#define MACDMA1_PHYS_ADDR 0x14004200
24554 +#define I2S_PHYS_ADDR 0x11000000
24555 +#define UART0_PHYS_ADDR 0x11100000
24556 +#define UART1_PHYS_ADDR 0x11200000
24557 +#define UART3_PHYS_ADDR 0x11400000
24558 +#define SSI0_PHYS_ADDR 0x11600000
24559 +#define SSI1_PHYS_ADDR 0x11680000
24560 +#define GPIO2_PHYS_ADDR 0x11700000
24561 +#define SYS_PHYS_ADDR 0x11900000
24562 +#define LCD_PHYS_ADDR 0x15000000
24563 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24564 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24565 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24566 +#endif
24567 +
24568 +/***********************************************************************/
24569 +
24570 +#ifdef CONFIG_SOC_AU1550
24571 +#define MEM_PHYS_ADDR 0x14000000
24572 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24573 +#define IC0_PHYS_ADDR 0x10400000
24574 +#define IC1_PHYS_ADDR 0x11800000
24575 +#define USBH_PHYS_ADDR 0x14020000
24576 +#define USBD_PHYS_ADDR 0x10200000
24577 +#define PCI_PHYS_ADDR 0x14005000
24578 +#define MAC0_PHYS_ADDR 0x10500000
24579 +#define MAC1_PHYS_ADDR 0x10510000
24580 +#define MACEN_PHYS_ADDR 0x10520000
24581 +#define MACDMA0_PHYS_ADDR 0x14004000
24582 +#define MACDMA1_PHYS_ADDR 0x14004200
24583 +#define UART0_PHYS_ADDR 0x11100000
24584 +#define UART1_PHYS_ADDR 0x11200000
24585 +#define UART3_PHYS_ADDR 0x11400000
24586 +#define GPIO2_PHYS_ADDR 0x11700000
24587 +#define SYS_PHYS_ADDR 0x11900000
24588 +#define DDMA_PHYS_ADDR 0x14002000
24589 +#define PE_PHYS_ADDR 0x14008000
24590 +#define PSC0_PHYS_ADDR 0x11A00000
24591 +#define PSC1_PHYS_ADDR 0x11B00000
24592 +#define PSC2_PHYS_ADDR 0x10A00000
24593 +#define PSC3_PHYS_ADDR 0x10B00000
24594 +#define PCI_MEM_PHYS_ADDR 0x400000000
24595 +#define PCI_IO_PHYS_ADDR 0x500000000
24596 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
24597 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
24598 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24599 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24600 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24601 +#endif
24602 +
24603 +/***********************************************************************/
24604 +
24605 +#ifdef CONFIG_SOC_AU1200
24606 +#define MEM_PHYS_ADDR 0x14000000
24607 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24608 +#define AES_PHYS_ADDR 0x10300000
24609 +#define CIM_PHYS_ADDR 0x14004000
24610 +#define IC0_PHYS_ADDR 0x10400000
24611 +#define IC1_PHYS_ADDR 0x11800000
24612 +#define USBM_PHYS_ADDR 0x14020000
24613 +#define USBH_PHYS_ADDR 0x14020100
24614 +#define UART0_PHYS_ADDR 0x11100000
24615 +#define UART1_PHYS_ADDR 0x11200000
24616 +#define GPIO2_PHYS_ADDR 0x11700000
24617 +#define SYS_PHYS_ADDR 0x11900000
24618 +#define DDMA_PHYS_ADDR 0x14002000
24619 +#define PSC0_PHYS_ADDR 0x11A00000
24620 +#define PSC1_PHYS_ADDR 0x11B00000
24621 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24622 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24623 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24624 +#define SD0_PHYS_ADDR 0x10600000
24625 +#define SD1_PHYS_ADDR 0x10680000
24626 +#define LCD_PHYS_ADDR 0x15000000
24627 +#define SWCNT_PHYS_ADDR 0x1110010C
24628 +#define MAEFE_PHYS_ADDR 0x14012000
24629 +#define MAEBE_PHYS_ADDR 0x14010000
24630 +#endif
24631 +
24632 +
24633 /* Static Bus Controller */
24634 #define MEM_STCFG0 0xB4001000
24635 #define MEM_STTIME0 0xB4001004
24636 @@ -367,7 +695,7 @@
24637 #define AU1000_MAC0_ENABLE 0xB0520000
24638 #define AU1000_MAC1_ENABLE 0xB0520004
24639 #define NUM_ETH_INTERFACES 2
24640 -#endif // CONFIG_SOC_AU1000
24641 +#endif /* CONFIG_SOC_AU1000 */
24642
24643 /* Au1500 */
24644 #ifdef CONFIG_SOC_AU1500
24645 @@ -438,7 +766,7 @@
24646 #define AU1500_MAC0_ENABLE 0xB1520000
24647 #define AU1500_MAC1_ENABLE 0xB1520004
24648 #define NUM_ETH_INTERFACES 2
24649 -#endif // CONFIG_SOC_AU1500
24650 +#endif /* CONFIG_SOC_AU1500 */
24651
24652 /* Au1100 */
24653 #ifdef CONFIG_SOC_AU1100
24654 @@ -483,6 +811,22 @@
24655 #define AU1000_GPIO_13 45
24656 #define AU1000_GPIO_14 46
24657 #define AU1000_GPIO_15 47
24658 +#define AU1000_GPIO_16 48
24659 +#define AU1000_GPIO_17 49
24660 +#define AU1000_GPIO_18 50
24661 +#define AU1000_GPIO_19 51
24662 +#define AU1000_GPIO_20 52
24663 +#define AU1000_GPIO_21 53
24664 +#define AU1000_GPIO_22 54
24665 +#define AU1000_GPIO_23 55
24666 +#define AU1000_GPIO_24 56
24667 +#define AU1000_GPIO_25 57
24668 +#define AU1000_GPIO_26 58
24669 +#define AU1000_GPIO_27 59
24670 +#define AU1000_GPIO_28 60
24671 +#define AU1000_GPIO_29 61
24672 +#define AU1000_GPIO_30 62
24673 +#define AU1000_GPIO_31 63
24674
24675 #define UART0_ADDR 0xB1100000
24676 #define UART1_ADDR 0xB1200000
24677 @@ -494,7 +838,7 @@
24678 #define AU1100_ETH0_BASE 0xB0500000
24679 #define AU1100_MAC0_ENABLE 0xB0520000
24680 #define NUM_ETH_INTERFACES 1
24681 -#endif // CONFIG_SOC_AU1100
24682 +#endif /* CONFIG_SOC_AU1100 */
24683
24684 #ifdef CONFIG_SOC_AU1550
24685 #define AU1550_UART0_INT 0
24686 @@ -511,14 +855,14 @@
24687 #define AU1550_PSC1_INT 11
24688 #define AU1550_PSC2_INT 12
24689 #define AU1550_PSC3_INT 13
24690 -#define AU1550_TOY_INT 14
24691 -#define AU1550_TOY_MATCH0_INT 15
24692 -#define AU1550_TOY_MATCH1_INT 16
24693 -#define AU1550_TOY_MATCH2_INT 17
24694 -#define AU1550_RTC_INT 18
24695 -#define AU1550_RTC_MATCH0_INT 19
24696 -#define AU1550_RTC_MATCH1_INT 20
24697 -#define AU1550_RTC_MATCH2_INT 21
24698 +#define AU1000_TOY_INT 14
24699 +#define AU1000_TOY_MATCH0_INT 15
24700 +#define AU1000_TOY_MATCH1_INT 16
24701 +#define AU1000_TOY_MATCH2_INT 17
24702 +#define AU1000_RTC_INT 18
24703 +#define AU1000_RTC_MATCH0_INT 19
24704 +#define AU1000_RTC_MATCH1_INT 20
24705 +#define AU1000_RTC_MATCH2_INT 21
24706 #define AU1550_NAND_INT 23
24707 #define AU1550_USB_DEV_REQ_INT 24
24708 #define AU1550_USB_DEV_SUS_INT 25
24709 @@ -573,7 +917,7 @@
24710 #define AU1550_MAC0_ENABLE 0xB0520000
24711 #define AU1550_MAC1_ENABLE 0xB0520004
24712 #define NUM_ETH_INTERFACES 2
24713 -#endif // CONFIG_SOC_AU1550
24714 +#endif /* CONFIG_SOC_AU1550 */
24715
24716 #ifdef CONFIG_SOC_AU1200
24717 #define AU1200_UART0_INT 0
24718 @@ -590,14 +934,14 @@
24719 #define AU1200_PSC1_INT 11
24720 #define AU1200_AES_INT 12
24721 #define AU1200_CAMERA_INT 13
24722 -#define AU1200_TOY_INT 14
24723 -#define AU1200_TOY_MATCH0_INT 15
24724 -#define AU1200_TOY_MATCH1_INT 16
24725 -#define AU1200_TOY_MATCH2_INT 17
24726 -#define AU1200_RTC_INT 18
24727 -#define AU1200_RTC_MATCH0_INT 19
24728 -#define AU1200_RTC_MATCH1_INT 20
24729 -#define AU1200_RTC_MATCH2_INT 21
24730 +#define AU1000_TOY_INT 14
24731 +#define AU1000_TOY_MATCH0_INT 15
24732 +#define AU1000_TOY_MATCH1_INT 16
24733 +#define AU1000_TOY_MATCH2_INT 17
24734 +#define AU1000_RTC_INT 18
24735 +#define AU1000_RTC_MATCH0_INT 19
24736 +#define AU1000_RTC_MATCH1_INT 20
24737 +#define AU1000_RTC_MATCH2_INT 21
24738 #define AU1200_NAND_INT 23
24739 #define AU1200_GPIO_204 24
24740 #define AU1200_GPIO_205 25
24741 @@ -605,6 +949,7 @@
24742 #define AU1200_GPIO_207 27
24743 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
24744 #define AU1200_USB_INT 29
24745 +#define AU1000_USB_HOST_INT AU1200_USB_INT
24746 #define AU1200_LCD_INT 30
24747 #define AU1200_MAE_BOTH_INT 31
24748 #define AU1000_GPIO_0 32
24749 @@ -643,21 +988,36 @@
24750 #define UART0_ADDR 0xB1100000
24751 #define UART1_ADDR 0xB1200000
24752
24753 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
24754 -#define USB_HOST_CONFIG 0xB4027ffc
24755 +#define USB_UOC_BASE 0x14020020
24756 +#define USB_UOC_LEN 0x20
24757 +#define USB_OHCI_BASE 0x14020100
24758 +#define USB_OHCI_LEN 0x100
24759 +#define USB_EHCI_BASE 0x14020200
24760 +#define USB_EHCI_LEN 0x100
24761 +#define USB_UDC_BASE 0x14022000
24762 +#define USB_UDC_LEN 0x2000
24763 +#define USB_MSR_BASE 0xB4020000
24764 +#define USB_MSR_MCFG 4
24765 +#define USBMSRMCFG_OMEMEN 0
24766 +#define USBMSRMCFG_OBMEN 1
24767 +#define USBMSRMCFG_EMEMEN 2
24768 +#define USBMSRMCFG_EBMEN 3
24769 +#define USBMSRMCFG_DMEMEN 4
24770 +#define USBMSRMCFG_DBMEN 5
24771 +#define USBMSRMCFG_GMEMEN 6
24772 +#define USBMSRMCFG_OHCCLKEN 16
24773 +#define USBMSRMCFG_EHCCLKEN 17
24774 +#define USBMSRMCFG_UDCCLKEN 18
24775 +#define USBMSRMCFG_PHYPLLEN 19
24776 +#define USBMSRMCFG_RDCOMB 30
24777 +#define USBMSRMCFG_PFEN 31
24778
24779 -// these are here for prototyping on au1550 (do not exist on au1200)
24780 -#define AU1200_ETH0_BASE 0xB0500000
24781 -#define AU1200_ETH1_BASE 0xB0510000
24782 -#define AU1200_MAC0_ENABLE 0xB0520000
24783 -#define AU1200_MAC1_ENABLE 0xB0520004
24784 -#define NUM_ETH_INTERFACES 2
24785 -#endif // CONFIG_SOC_AU1200
24786 +#endif /* CONFIG_SOC_AU1200 */
24787
24788 #define AU1000_LAST_INTC0_INT 31
24789 +#define AU1000_LAST_INTC1_INT 63
24790 #define AU1000_MAX_INTR 63
24791
24792 -
24793 /* Programmable Counters 0 and 1 */
24794 #define SYS_BASE 0xB1900000
24795 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
24796 @@ -728,6 +1088,8 @@
24797 #define I2S_CONTROL_D (1<<1)
24798 #define I2S_CONTROL_CE (1<<0)
24799
24800 +#ifndef CONFIG_SOC_AU1200
24801 +
24802 /* USB Host Controller */
24803 #define USB_OHCI_LEN 0x00100000
24804
24805 @@ -773,6 +1135,8 @@
24806 #define USBDEV_ENABLE (1<<1)
24807 #define USBDEV_CE (1<<0)
24808
24809 +#endif /* !CONFIG_SOC_AU1200 */
24810 +
24811 /* Ethernet Controllers */
24812
24813 /* 4 byte offsets from AU1000_ETH_BASE */
24814 @@ -1171,6 +1535,37 @@
24815 #define SYS_PF_PSC1_S1 (1 << 1)
24816 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
24817
24818 +/* Au1200 Only */
24819 +#ifdef CONFIG_SOC_AU1200
24820 +#define SYS_PINFUNC_DMA (1<<31)
24821 +#define SYS_PINFUNC_S0A (1<<30)
24822 +#define SYS_PINFUNC_S1A (1<<29)
24823 +#define SYS_PINFUNC_LP0 (1<<28)
24824 +#define SYS_PINFUNC_LP1 (1<<27)
24825 +#define SYS_PINFUNC_LD16 (1<<26)
24826 +#define SYS_PINFUNC_LD8 (1<<25)
24827 +#define SYS_PINFUNC_LD1 (1<<24)
24828 +#define SYS_PINFUNC_LD0 (1<<23)
24829 +#define SYS_PINFUNC_P1A (3<<21)
24830 +#define SYS_PINFUNC_P1B (1<<20)
24831 +#define SYS_PINFUNC_FS3 (1<<19)
24832 +#define SYS_PINFUNC_P0A (3<<17)
24833 +#define SYS_PINFUNC_CS (1<<16)
24834 +#define SYS_PINFUNC_CIM (1<<15)
24835 +#define SYS_PINFUNC_P1C (1<<14)
24836 +#define SYS_PINFUNC_U1T (1<<12)
24837 +#define SYS_PINFUNC_U1R (1<<11)
24838 +#define SYS_PINFUNC_EX1 (1<<10)
24839 +#define SYS_PINFUNC_EX0 (1<<9)
24840 +#define SYS_PINFUNC_U0R (1<<8)
24841 +#define SYS_PINFUNC_MC (1<<7)
24842 +#define SYS_PINFUNC_S0B (1<<6)
24843 +#define SYS_PINFUNC_S0C (1<<5)
24844 +#define SYS_PINFUNC_P0B (1<<4)
24845 +#define SYS_PINFUNC_U0T (1<<3)
24846 +#define SYS_PINFUNC_S1B (1<<2)
24847 +#endif
24848 +
24849 #define SYS_TRIOUTRD 0xB1900100
24850 #define SYS_TRIOUTCLR 0xB1900100
24851 #define SYS_OUTPUTRD 0xB1900108
24852 @@ -1298,7 +1693,6 @@
24853 #define SD1_XMIT_FIFO 0xB0680000
24854 #define SD1_RECV_FIFO 0xB0680004
24855
24856 -
24857 #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
24858 /* Au1500 PCI Controller */
24859 #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
24860 @@ -1388,9 +1782,60 @@
24861
24862 #endif
24863
24864 +#ifndef _LANGUAGE_ASSEMBLY
24865 +typedef volatile struct
24866 +{
24867 + /* 0x0000 */ u32 toytrim;
24868 + /* 0x0004 */ u32 toywrite;
24869 + /* 0x0008 */ u32 toymatch0;
24870 + /* 0x000C */ u32 toymatch1;
24871 + /* 0x0010 */ u32 toymatch2;
24872 + /* 0x0014 */ u32 cntrctrl;
24873 + /* 0x0018 */ u32 scratch0;
24874 + /* 0x001C */ u32 scratch1;
24875 + /* 0x0020 */ u32 freqctrl0;
24876 + /* 0x0024 */ u32 freqctrl1;
24877 + /* 0x0028 */ u32 clksrc;
24878 + /* 0x002C */ u32 pinfunc;
24879 + /* 0x0030 */ u32 reserved0;
24880 + /* 0x0034 */ u32 wakemsk;
24881 + /* 0x0038 */ u32 endian;
24882 + /* 0x003C */ u32 powerctrl;
24883 + /* 0x0040 */ u32 toyread;
24884 + /* 0x0044 */ u32 rtctrim;
24885 + /* 0x0048 */ u32 rtcwrite;
24886 + /* 0x004C */ u32 rtcmatch0;
24887 + /* 0x0050 */ u32 rtcmatch1;
24888 + /* 0x0054 */ u32 rtcmatch2;
24889 + /* 0x0058 */ u32 rtcread;
24890 + /* 0x005C */ u32 wakesrc;
24891 + /* 0x0060 */ u32 cpupll;
24892 + /* 0x0064 */ u32 auxpll;
24893 + /* 0x0068 */ u32 reserved1;
24894 + /* 0x006C */ u32 reserved2;
24895 + /* 0x0070 */ u32 reserved3;
24896 + /* 0x0074 */ u32 reserved4;
24897 + /* 0x0078 */ u32 slppwr;
24898 + /* 0x007C */ u32 sleep;
24899 + /* 0x0080 */ u32 reserved5[32];
24900 + /* 0x0100 */ u32 trioutrd;
24901 +#define trioutclr trioutrd
24902 + /* 0x0104 */ u32 reserved6;
24903 + /* 0x0108 */ u32 outputrd;
24904 +#define outputset outputrd
24905 + /* 0x010C */ u32 outputclr;
24906 + /* 0x0110 */ u32 pinstaterd;
24907 +#define pininputen pinstaterd
24908 +
24909 +} AU1X00_SYS;
24910 +
24911 +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
24912 +
24913 +#endif
24914 /* Processor information base on prid.
24915 * Copied from PowerPC.
24916 */
24917 +#ifndef _LANGUAGE_ASSEMBLY
24918 struct cpu_spec {
24919 /* CPU is matched via (PRID & prid_mask) == prid_value */
24920 unsigned int prid_mask;
24921 @@ -1404,3 +1849,6 @@
24922 extern struct cpu_spec cpu_specs[];
24923 extern struct cpu_spec *cur_cpu_spec[];
24924 #endif
24925 +
24926 +#endif
24927 +
24928 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1000_pcmcia.h linux-2.4.32-rc1.mips/include/asm-mips/au1000_pcmcia.h
24929 --- linux-2.4.32-rc1/include/asm-mips/au1000_pcmcia.h 2005-01-19 15:10:11.000000000 +0100
24930 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1000_pcmcia.h 2005-01-30 09:01:28.000000000 +0100
24931 @@ -38,16 +38,41 @@
24932 #define AU1X_SOCK0_PHYS_MEM 0xF80000000
24933
24934 /* pcmcia socket 1 needs external glue logic so the memory map
24935 - * differs from board to board.
24936 + * differs from board to board. the general rule is that
24937 + * static bus address bit 26 should be used to decode socket 0
24938 + * from socket 1. alas, some boards dont follow this...
24939 + * These really belong in a board-specific header file...
24940 */
24941 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
24942 -#define AU1X_SOCK1_IO 0xF08000000
24943 -#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
24944 -#define AU1X_SOCK1_PHYS_MEM 0xF88000000
24945 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
24946 -#define AU1X_SOCK1_IO 0xF04000000
24947 -#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
24948 -#define AU1X_SOCK1_PHYS_MEM 0xF84000000
24949 +#ifdef CONFIG_MIPS_PB1000
24950 +#define SOCK1_DECODE (1<<27)
24951 +#endif
24952 +#ifdef CONFIG_MIPS_DB1000
24953 +#define SOCK1_DECODE (1<<26)
24954 +#endif
24955 +#ifdef CONFIG_MIPS_DB1500
24956 +#define SOCK1_DECODE (1<<26)
24957 +#endif
24958 +#ifdef CONFIG_MIPS_DB1100
24959 +#define SOCK1_DECODE (1<<26)
24960 +#endif
24961 +#ifdef CONFIG_MIPS_DB1550
24962 +#define SOCK1_DECODE (1<<26)
24963 +#endif
24964 +#ifdef CONFIG_MIPS_DB1200
24965 +#define SOCK1_DECODE (1<<26)
24966 +#endif
24967 +#ifdef CONFIG_MIPS_PB1550
24968 +#define SOCK1_DECODE (1<<26)
24969 +#endif
24970 +#ifdef CONFIG_MIPS_PB1200
24971 +#define SOCK1_DECODE (1<<26)
24972 +#endif
24973 +
24974 +/* The board has a second PCMCIA socket */
24975 +#ifdef SOCK1_DECODE
24976 +#define AU1X_SOCK1_IO (0xF00000000|SOCK1_DECODE)
24977 +#define AU1X_SOCK1_PHYS_ATTR (0xF40000000|SOCK1_DECODE)
24978 +#define AU1X_SOCK1_PHYS_MEM (0xF80000000|SOCK1_DECODE)
24979 #endif
24980
24981 struct pcmcia_state {
24982 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1100_mmc.h linux-2.4.32-rc1.mips/include/asm-mips/au1100_mmc.h
24983 --- linux-2.4.32-rc1/include/asm-mips/au1100_mmc.h 2005-01-19 15:10:11.000000000 +0100
24984 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1100_mmc.h 2005-01-30 09:01:28.000000000 +0100
24985 @@ -39,16 +39,22 @@
24986 #define __ASM_AU1100_MMC_H
24987
24988
24989 -#define NUM_AU1100_MMC_CONTROLLERS 2
24990 -
24991 -
24992 -#define AU1100_SD_IRQ 2
24993 -
24994 +#if defined(CONFIG_SOC_AU1100)
24995 +#define NUM_MMC_CONTROLLERS 2
24996 +#define AU1X_MMC_INT AU1100_SD_INT
24997 +#endif
24998 +
24999 +#if defined(CONFIG_SOC_AU1200)
25000 +#define NUM_MMC_CONTROLLERS 2
25001 +#define AU1X_MMC_INT AU1200_SD_INT
25002 +#endif
25003
25004 #define SD0_BASE 0xB0600000
25005 #define SD1_BASE 0xB0680000
25006
25007
25008 +
25009 +
25010 /*
25011 * Register offsets.
25012 */
25013 @@ -201,5 +207,12 @@
25014 #define SD_CMD_RT_1B (0x00810000)
25015
25016
25017 +/* support routines required on a platform-specific basis */
25018 +extern void mmc_card_inserted(int _n_, int *_res_);
25019 +extern void mmc_card_writable(int _n_, int *_res_);
25020 +extern void mmc_power_on(int _n_);
25021 +extern void mmc_power_off(int _n_);
25022 +
25023 +
25024 #endif /* __ASM_AU1100_MMC_H */
25025
25026 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1xxx_dbdma.h linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_dbdma.h
25027 --- linux-2.4.32-rc1/include/asm-mips/au1xxx_dbdma.h 2005-01-19 15:10:11.000000000 +0100
25028 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_dbdma.h 2005-01-30 09:01:28.000000000 +0100
25029 @@ -43,7 +43,7 @@
25030 #define DDMA_GLOBAL_BASE 0xb4003000
25031 #define DDMA_CHANNEL_BASE 0xb4002000
25032
25033 -typedef struct dbdma_global {
25034 +typedef volatile struct dbdma_global {
25035 u32 ddma_config;
25036 u32 ddma_intstat;
25037 u32 ddma_throttle;
25038 @@ -60,7 +60,7 @@
25039
25040 /* The structure of a DMA Channel.
25041 */
25042 -typedef struct au1xxx_dma_channel {
25043 +typedef volatile struct au1xxx_dma_channel {
25044 u32 ddma_cfg; /* See below */
25045 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
25046 u32 ddma_statptr; /* word aligned pointer to status word */
25047 @@ -96,7 +96,7 @@
25048 /* "Standard" DDMA Descriptor.
25049 * Must be 32-byte aligned.
25050 */
25051 -typedef struct au1xxx_ddma_desc {
25052 +typedef volatile struct au1xxx_ddma_desc {
25053 u32 dscr_cmd0; /* See below */
25054 u32 dscr_cmd1; /* See below */
25055 u32 dscr_source0; /* source phys address */
25056 @@ -105,6 +105,12 @@
25057 u32 dscr_dest1; /* See below */
25058 u32 dscr_stat; /* completion status */
25059 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
25060 + /* First 32bytes are HW specific!!!
25061 + Lets have some SW data following.. make sure its 32bytes
25062 + */
25063 + u32 sw_status;
25064 + u32 sw_context;
25065 + u32 sw_reserved[6];
25066 } au1x_ddma_desc_t;
25067
25068 #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
25069 @@ -123,6 +129,8 @@
25070 #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
25071 #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
25072
25073 +#define SW_STATUS_INUSE (1<<0)
25074 +
25075 /* Command 0 device IDs.
25076 */
25077 #ifdef CONFIG_SOC_AU1550
25078 @@ -169,8 +177,8 @@
25079 #define DSCR_CMD0_SDMS_RX0 9
25080 #define DSCR_CMD0_SDMS_TX1 10
25081 #define DSCR_CMD0_SDMS_RX1 11
25082 -#define DSCR_CMD0_AES_TX 12
25083 -#define DSCR_CMD0_AES_RX 13
25084 +#define DSCR_CMD0_AES_TX 13
25085 +#define DSCR_CMD0_AES_RX 12
25086 #define DSCR_CMD0_PSC0_TX 14
25087 #define DSCR_CMD0_PSC0_RX 15
25088 #define DSCR_CMD0_PSC1_TX 16
25089 @@ -189,6 +197,10 @@
25090 #define DSCR_CMD0_THROTTLE 30
25091 #define DSCR_CMD0_ALWAYS 31
25092 #define DSCR_NDEV_IDS 32
25093 +/* THis macro is used to find/create custom device types */
25094 +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
25095 +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
25096 +
25097
25098 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
25099 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
25100 @@ -277,6 +289,43 @@
25101 */
25102 #define NUM_DBDMA_CHANS 16
25103
25104 +/*
25105 + * Ddma API definitions
25106 + * FIXME: may not fit to this header file
25107 + */
25108 +typedef struct dbdma_device_table {
25109 + u32 dev_id;
25110 + u32 dev_flags;
25111 + u32 dev_tsize;
25112 + u32 dev_devwidth;
25113 + u32 dev_physaddr; /* If FIFO */
25114 + u32 dev_intlevel;
25115 + u32 dev_intpolarity;
25116 +} dbdev_tab_t;
25117 +
25118 +
25119 +typedef struct dbdma_chan_config {
25120 + spinlock_t lock;
25121 +
25122 + u32 chan_flags;
25123 + u32 chan_index;
25124 + dbdev_tab_t *chan_src;
25125 + dbdev_tab_t *chan_dest;
25126 + au1x_dma_chan_t *chan_ptr;
25127 + au1x_ddma_desc_t *chan_desc_base;
25128 + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
25129 + void *chan_callparam;
25130 + void (*chan_callback)(int, void *, struct pt_regs *);
25131 +} chan_tab_t;
25132 +
25133 +#define DEV_FLAGS_INUSE (1 << 0)
25134 +#define DEV_FLAGS_ANYUSE (1 << 1)
25135 +#define DEV_FLAGS_OUT (1 << 2)
25136 +#define DEV_FLAGS_IN (1 << 3)
25137 +#define DEV_FLAGS_BURSTABLE (1 << 4)
25138 +#define DEV_FLAGS_SYNC (1 << 5)
25139 +/* end Ddma API definitions */
25140 +
25141 /* External functions for drivers to use.
25142 */
25143 /* Use this to allocate a dbdma channel. The device ids are one of the
25144 @@ -299,8 +348,8 @@
25145
25146 /* Put buffers on source/destination descriptors.
25147 */
25148 -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
25149 -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
25150 +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
25151 +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
25152
25153 /* Get a buffer from the destination descriptor.
25154 */
25155 @@ -314,5 +363,25 @@
25156 void au1xxx_dbdma_chan_free(u32 chanid);
25157 void au1xxx_dbdma_dump(u32 chanid);
25158
25159 +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
25160 +
25161 +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
25162 +
25163 +/*
25164 + Some compatibilty macros --
25165 + Needed to make changes to API without breaking existing drivers
25166 +*/
25167 +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
25168 +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
25169 +
25170 +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
25171 +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
25172 +
25173 +/*
25174 + * Flags for the put_source/put_dest functions.
25175 + */
25176 +#define DDMA_FLAGS_IE (1<<0)
25177 +#define DDMA_FLAGS_NOIE (1<<1)
25178 +
25179 #endif /* _LANGUAGE_ASSEMBLY */
25180 #endif /* _AU1000_DBDMA_H_ */
25181 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1xxx_gpio.h linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_gpio.h
25182 --- linux-2.4.32-rc1/include/asm-mips/au1xxx_gpio.h 1970-01-01 01:00:00.000000000 +0100
25183 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_gpio.h 2005-01-30 09:01:28.000000000 +0100
25184 @@ -0,0 +1,22 @@
25185 +
25186 +
25187 +#ifndef __AU1XXX_GPIO_H
25188 +#define __AU1XXX_GPIO_H
25189 +
25190 +void au1xxx_gpio1_set_inputs(void);
25191 +void au1xxx_gpio_tristate(int signal);
25192 +void au1xxx_gpio_write(int signal, int value);
25193 +int au1xxx_gpio_read(int signal);
25194 +
25195 +typedef volatile struct
25196 +{
25197 + u32 dir;
25198 + u32 reserved;
25199 + u32 output;
25200 + u32 pinstate;
25201 + u32 inten;
25202 + u32 enable;
25203 +
25204 +} AU1X00_GPIO2;
25205 +
25206 +#endif //__AU1XXX_GPIO_H
25207 diff -Nur linux-2.4.32-rc1/include/asm-mips/au1xxx_psc.h linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_psc.h
25208 --- linux-2.4.32-rc1/include/asm-mips/au1xxx_psc.h 2005-01-19 15:10:11.000000000 +0100
25209 +++ linux-2.4.32-rc1.mips/include/asm-mips/au1xxx_psc.h 2005-01-30 09:01:28.000000000 +0100
25210 @@ -41,6 +41,11 @@
25211 #define PSC3_BASE_ADDR 0xb0d00000
25212 #endif
25213
25214 +#ifdef CONFIG_SOC_AU1200
25215 +#define PSC0_BASE_ADDR 0xb1a00000
25216 +#define PSC1_BASE_ADDR 0xb1b00000
25217 +#endif
25218 +
25219 /* The PSC select and control registers are common to
25220 * all protocols.
25221 */
25222 @@ -226,6 +231,8 @@
25223 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
25224 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
25225 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
25226 +#define PSC_I2SCFG_WS(n) ((n&0xFF)<<16)
25227 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
25228 #define PSC_I2SCFG_WI (1 << 15)
25229
25230 #define PSC_I2SCFG_DIV_MASK (3 << 13)
25231 diff -Nur linux-2.4.32-rc1/include/asm-mips/bootinfo.h linux-2.4.32-rc1.mips/include/asm-mips/bootinfo.h
25232 --- linux-2.4.32-rc1/include/asm-mips/bootinfo.h 2004-02-18 14:36:32.000000000 +0100
25233 +++ linux-2.4.32-rc1.mips/include/asm-mips/bootinfo.h 2005-01-30 09:01:28.000000000 +0100
25234 @@ -180,6 +180,9 @@
25235 #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
25236 #define MACH_CSB250 8 /* Cogent Au1500 */
25237 #define MACH_PB1550 9 /* Au1550-based eval board */
25238 +#define MACH_PB1200 10 /* Au1200-based eval board */
25239 +#define MACH_DB1550 11 /* Au1550-based eval board */
25240 +#define MACH_DB1200 12 /* Au1200-based eval board */
25241
25242 /*
25243 * Valid machtype for group NEC_VR41XX
25244 diff -Nur linux-2.4.32-rc1/include/asm-mips/db1200.h linux-2.4.32-rc1.mips/include/asm-mips/db1200.h
25245 --- linux-2.4.32-rc1/include/asm-mips/db1200.h 1970-01-01 01:00:00.000000000 +0100
25246 +++ linux-2.4.32-rc1.mips/include/asm-mips/db1200.h 2005-01-30 09:02:45.000000000 +0100
25247 @@ -0,0 +1,214 @@
25248 +/*
25249 + * AMD Alchemy DB1200 Referrence Board
25250 + * Board Registers defines.
25251 + *
25252 + * ########################################################################
25253 + *
25254 + * This program is free software; you can distribute it and/or modify it
25255 + * under the terms of the GNU General Public License (Version 2) as
25256 + * published by the Free Software Foundation.
25257 + *
25258 + * This program is distributed in the hope it will be useful, but WITHOUT
25259 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25260 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25261 + * for more details.
25262 + *
25263 + * You should have received a copy of the GNU General Public License along
25264 + * with this program; if not, write to the Free Software Foundation, Inc.,
25265 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25266 + *
25267 + * ########################################################################
25268 + *
25269 + *
25270 + */
25271 +#ifndef __ASM_DB1200_H
25272 +#define __ASM_DB1200_H
25273 +
25274 +#include <linux/types.h>
25275 +
25276 +// This is defined in au1000.h with bogus value
25277 +#undef AU1X00_EXTERNAL_INT
25278 +
25279 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25280 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25281 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25282 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25283 +
25284 +/* SPI and SMB are muxed on the Pb1200 board.
25285 + Refer to board documentation.
25286 + */
25287 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25288 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25289 +/* AC97 and I2S are muxed on the Pb1200 board.
25290 + Refer to board documentation.
25291 + */
25292 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25293 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25294 +
25295 +#define BCSR_KSEG1_ADDR 0xB9800000
25296 +
25297 +typedef volatile struct
25298 +{
25299 + /*00*/ u16 whoami;
25300 + u16 reserved0;
25301 + /*04*/ u16 status;
25302 + u16 reserved1;
25303 + /*08*/ u16 switches;
25304 + u16 reserved2;
25305 + /*0C*/ u16 resets;
25306 + u16 reserved3;
25307 +
25308 + /*10*/ u16 pcmcia;
25309 + u16 reserved4;
25310 + /*14*/ u16 board;
25311 + u16 reserved5;
25312 + /*18*/ u16 disk_leds;
25313 + u16 reserved6;
25314 + /*1C*/ u16 system;
25315 + u16 reserved7;
25316 +
25317 + /*20*/ u16 intclr;
25318 + u16 reserved8;
25319 + /*24*/ u16 intset;
25320 + u16 reserved9;
25321 + /*28*/ u16 intclr_mask;
25322 + u16 reserved10;
25323 + /*2C*/ u16 intset_mask;
25324 + u16 reserved11;
25325 +
25326 + /*30*/ u16 sig_status;
25327 + u16 reserved12;
25328 + /*34*/ u16 int_status;
25329 + u16 reserved13;
25330 + /*38*/ u16 reserved14;
25331 + u16 reserved15;
25332 + /*3C*/ u16 reserved16;
25333 + u16 reserved17;
25334 +
25335 +} BCSR;
25336 +
25337 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25338 +
25339 +/*
25340 + * Register bit definitions for the BCSRs
25341 + */
25342 +#define BCSR_WHOAMI_DCID 0x000F
25343 +#define BCSR_WHOAMI_CPLD 0x00F0
25344 +#define BCSR_WHOAMI_BOARD 0x0F00
25345 +
25346 +#define BCSR_STATUS_PCMCIA0VS 0x0003
25347 +#define BCSR_STATUS_PCMCIA1VS 0x000C
25348 +#define BCSR_STATUS_SWAPBOOT 0x0040
25349 +#define BCSR_STATUS_FLASHBUSY 0x0100
25350 +#define BCSR_STATUS_IDECBLID 0x0200
25351 +#define BCSR_STATUS_SD0WP 0x0400
25352 +#define BCSR_STATUS_U0RXD 0x1000
25353 +#define BCSR_STATUS_U1RXD 0x2000
25354 +
25355 +#define BCSR_SWITCHES_OCTAL 0x00FF
25356 +#define BCSR_SWITCHES_DIP_1 0x0080
25357 +#define BCSR_SWITCHES_DIP_2 0x0040
25358 +#define BCSR_SWITCHES_DIP_3 0x0020
25359 +#define BCSR_SWITCHES_DIP_4 0x0010
25360 +#define BCSR_SWITCHES_DIP_5 0x0008
25361 +#define BCSR_SWITCHES_DIP_6 0x0004
25362 +#define BCSR_SWITCHES_DIP_7 0x0002
25363 +#define BCSR_SWITCHES_DIP_8 0x0001
25364 +#define BCSR_SWITCHES_ROTARY 0x0F00
25365 +
25366 +#define BCSR_RESETS_ETH 0x0001
25367 +#define BCSR_RESETS_CAMERA 0x0002
25368 +#define BCSR_RESETS_DC 0x0004
25369 +#define BCSR_RESETS_IDE 0x0008
25370 +#define BCSR_RESETS_TV 0x0010
25371 +/* not resets but in the same register */
25372 +#define BCSR_RESETS_PWMR1mUX 0x0800
25373 +#define BCSR_RESETS_PCS0MUX 0x1000
25374 +#define BCSR_RESETS_PCS1MUX 0x2000
25375 +#define BCSR_RESETS_SPISEL 0x4000
25376 +
25377 +#define BCSR_PCMCIA_PC0VPP 0x0003
25378 +#define BCSR_PCMCIA_PC0VCC 0x000C
25379 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
25380 +#define BCSR_PCMCIA_PC0RST 0x0080
25381 +#define BCSR_PCMCIA_PC1VPP 0x0300
25382 +#define BCSR_PCMCIA_PC1VCC 0x0C00
25383 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
25384 +#define BCSR_PCMCIA_PC1RST 0x8000
25385 +
25386 +#define BCSR_BOARD_LCDVEE 0x0001
25387 +#define BCSR_BOARD_LCDVDD 0x0002
25388 +#define BCSR_BOARD_LCDBL 0x0004
25389 +#define BCSR_BOARD_CAMSNAP 0x0010
25390 +#define BCSR_BOARD_CAMPWR 0x0020
25391 +#define BCSR_BOARD_SD0PWR 0x0040
25392 +
25393 +#define BCSR_LEDS_DECIMALS 0x0003
25394 +#define BCSR_LEDS_LED0 0x0100
25395 +#define BCSR_LEDS_LED1 0x0200
25396 +#define BCSR_LEDS_LED2 0x0400
25397 +#define BCSR_LEDS_LED3 0x0800
25398 +
25399 +#define BCSR_SYSTEM_POWEROFF 0x4000
25400 +#define BCSR_SYSTEM_RESET 0x8000
25401 +
25402 +/* Bit positions for the different interrupt sources */
25403 +#define BCSR_INT_IDE 0x0001
25404 +#define BCSR_INT_ETH 0x0002
25405 +#define BCSR_INT_PC0 0x0004
25406 +#define BCSR_INT_PC0STSCHG 0x0008
25407 +#define BCSR_INT_PC1 0x0010
25408 +#define BCSR_INT_PC1STSCHG 0x0020
25409 +#define BCSR_INT_DC 0x0040
25410 +#define BCSR_INT_FLASHBUSY 0x0080
25411 +#define BCSR_INT_PC0INSERT 0x0100
25412 +#define BCSR_INT_PC0EJECT 0x0200
25413 +#define BCSR_INT_PC1INSERT 0x0400
25414 +#define BCSR_INT_PC1EJECT 0x0800
25415 +#define BCSR_INT_SD0INSERT 0x1000
25416 +#define BCSR_INT_SD0EJECT 0x2000
25417 +
25418 +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
25419 +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
25420 +
25421 +#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
25422 +#define AU1XXX_ATA_PHYS_LEN (0x100)
25423 +#define AU1XXX_ATA_REG_OFFSET (5)
25424 +#define AU1XXX_ATA_INT DB1200_IDE_INT
25425 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
25426 +#define AU1XXX_ATA_RQSIZE 128
25427 +
25428 +#define NAND_PHYS_ADDR 0x20000000
25429 +
25430 +/*
25431 + * External Interrupts for Pb1200 as of 8/6/2004.
25432 + * Bit positions in the CPLD registers can be calculated by taking
25433 + * the interrupt define and subtracting the DB1200_INT_BEGIN value.
25434 + * *example: IDE bis pos is = 64 - 64
25435 + ETH bit pos is = 65 - 64
25436 + */
25437 +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
25438 +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
25439 +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
25440 +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
25441 +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
25442 +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
25443 +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
25444 +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
25445 +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
25446 +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
25447 +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
25448 +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
25449 +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
25450 +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
25451 +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
25452 +
25453 +#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
25454 +
25455 +/* For drivers/pcmcia/au1000_db1x00.c */
25456 +#define BOARD_PC0_INT DB1200_PC0_INT
25457 +#define BOARD_PC1_INT DB1200_PC1_INT
25458 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
25459 +
25460 +#endif /* __ASM_DB1200_H */
25461 +
25462 diff -Nur linux-2.4.32-rc1/include/asm-mips/db1x00.h linux-2.4.32-rc1.mips/include/asm-mips/db1x00.h
25463 --- linux-2.4.32-rc1/include/asm-mips/db1x00.h 2005-01-19 15:10:11.000000000 +0100
25464 +++ linux-2.4.32-rc1.mips/include/asm-mips/db1x00.h 2005-01-30 09:06:19.000000000 +0100
25465 @@ -1,5 +1,5 @@
25466 /*
25467 - * AMD Alchemy DB1x00 Reference Boards
25468 + * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
25469 *
25470 * Copyright 2001 MontaVista Software Inc.
25471 * Author: MontaVista Software, Inc.
25472 @@ -36,9 +36,18 @@
25473 #define AC97_PSC_BASE PSC1_BASE_ADDR
25474 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
25475 #define I2S_PSC_BASE PSC3_BASE_ADDR
25476 +#define NAND_CS 1
25477 +/* for drivers/pcmcia/au1000_db1x00.c */
25478 +#define BOARD_PC0_INT AU1000_GPIO_3
25479 +#define BOARD_PC1_INT AU1000_GPIO_5
25480 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25481
25482 #else
25483 #define BCSR_KSEG1_ADDR 0xAE000000
25484 +/* for drivers/pcmcia/au1000_db1x00.c */
25485 +#define BOARD_PC0_INT AU1000_GPIO_2
25486 +#define BOARD_PC1_INT AU1000_GPIO_5
25487 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25488 #endif
25489
25490 /*
25491 @@ -66,6 +75,7 @@
25492
25493 } BCSR;
25494
25495 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25496
25497 /*
25498 * Register/mask bit definitions for the BCSRs
25499 @@ -130,14 +140,6 @@
25500
25501 #define BCSR_SWRESET_RESET 0x0080
25502
25503 -/* PCMCIA Db1x00 specific defines */
25504 -#define PCMCIA_MAX_SOCK 1
25505 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
25506 -
25507 -/* VPP/VCC */
25508 -#define SET_VCC_VPP(VCC, VPP, SLOT)\
25509 - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25510 -
25511 /* MTD CONFIG OPTIONS */
25512 #if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
25513 #define DB1X00_BOTH_BANKS
25514 @@ -147,48 +149,15 @@
25515 #define DB1X00_USER_ONLY
25516 #endif
25517
25518 -/* SD controller macros */
25519 -/*
25520 - * Detect card.
25521 - */
25522 -#define mmc_card_inserted(_n_, _res_) \
25523 - do { \
25524 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25525 - unsigned long mmc_wp, board_specific; \
25526 - if ((_n_)) { \
25527 - mmc_wp = BCSR_BOARD_SD1_WP; \
25528 - } else { \
25529 - mmc_wp = BCSR_BOARD_SD0_WP; \
25530 - } \
25531 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25532 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25533 - *(int *)(_res_) = 1; \
25534 - } else { \
25535 - *(int *)(_res_) = 0; \
25536 - } \
25537 - } while (0)
25538 -
25539 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
25540 /*
25541 - * Apply power to card slot(s).
25542 + * Daughter card information.
25543 */
25544 -#define mmc_power_on(_n_) \
25545 - do { \
25546 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25547 - unsigned long mmc_pwr, mmc_wp, board_specific; \
25548 - if ((_n_)) { \
25549 - mmc_pwr = BCSR_BOARD_SD1_PWR; \
25550 - mmc_wp = BCSR_BOARD_SD1_WP; \
25551 - } else { \
25552 - mmc_pwr = BCSR_BOARD_SD0_PWR; \
25553 - mmc_wp = BCSR_BOARD_SD0_WP; \
25554 - } \
25555 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25556 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25557 - board_specific |= mmc_pwr; \
25558 - au_writel(board_specific, (int)(&bcsr->specific)); \
25559 - au_sync(); \
25560 - } \
25561 - } while (0)
25562 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
25563 +/* DC_IDE */
25564 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
25565 +#define AU1XXX_ATA_REG_OFFSET (5)
25566 +#endif /* CONFIG_MIPS_DB1550 */
25567
25568 #endif /* __ASM_DB1X00_H */
25569
25570 diff -Nur linux-2.4.32-rc1/include/asm-mips/elf.h linux-2.4.32-rc1.mips/include/asm-mips/elf.h
25571 --- linux-2.4.32-rc1/include/asm-mips/elf.h 2004-02-18 14:36:32.000000000 +0100
25572 +++ linux-2.4.32-rc1.mips/include/asm-mips/elf.h 2005-04-14 12:41:44.000000000 +0200
25573 @@ -66,9 +66,10 @@
25574 #define USE_ELF_CORE_DUMP
25575 #define ELF_EXEC_PAGESIZE PAGE_SIZE
25576
25577 -#define ELF_CORE_COPY_REGS(_dest,_regs) \
25578 - memcpy((char *) &_dest, (char *) _regs, \
25579 - sizeof(struct pt_regs));
25580 +extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
25581 +
25582 +#define ELF_CORE_COPY_REGS(elf_regs, regs) \
25583 + dump_regs((elf_greg_t *)&(elf_regs), regs);
25584
25585 /* This yields a mask that user programs can use to figure out what
25586 instruction set this cpu supports. This could be done in userspace,
25587 diff -Nur linux-2.4.32-rc1/include/asm-mips/ficmmp.h linux-2.4.32-rc1.mips/include/asm-mips/ficmmp.h
25588 --- linux-2.4.32-rc1/include/asm-mips/ficmmp.h 1970-01-01 01:00:00.000000000 +0100
25589 +++ linux-2.4.32-rc1.mips/include/asm-mips/ficmmp.h 2005-01-30 09:01:28.000000000 +0100
25590 @@ -0,0 +1,156 @@
25591 +/*
25592 + * FIC MMP
25593 + *
25594 + * ########################################################################
25595 + *
25596 + * This program is free software; you can distribute it and/or modify it
25597 + * under the terms of the GNU General Public License (Version 2) as
25598 + * published by the Free Software Foundation.
25599 + *
25600 + * This program is distributed in the hope it will be useful, but WITHOUT
25601 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25602 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25603 + * for more details.
25604 + *
25605 + * You should have received a copy of the GNU General Public License along
25606 + * with this program; if not, write to the Free Software Foundation, Inc.,
25607 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25608 + *
25609 + * ########################################################################
25610 + *
25611 + *
25612 + */
25613 +#ifndef __ASM_FICMMP_H
25614 +#define __ASM_FICMMP_H
25615 +
25616 +#include <linux/types.h>
25617 +#include <asm/au1000.h>
25618 +#include <asm/au1xxx_gpio.h>
25619 +
25620 +// This is defined in au1000.h with bogus value
25621 +#undef AU1X00_EXTERNAL_INT
25622 +
25623 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25624 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25625 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25626 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25627 +/* SPI and SMB are muxed on the Pb1200 board.
25628 + Refer to board documentation.
25629 + */
25630 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25631 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25632 +/* AC97 and I2S are muxed on the Pb1200 board.
25633 + Refer to board documentation.
25634 + */
25635 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25636 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25637 +
25638 +
25639 +/*
25640 + * SMSC LAN91C111
25641 + */
25642 +#define AU1XXX_SMC91111_PHYS_ADDR (0xAC000300)
25643 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_5
25644 +
25645 +/* DC_IDE and DC_ETHERNET */
25646 +#define FICMMP_IDE_INT AU1000_GPIO_4
25647 +
25648 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
25649 +#define AU1XXX_ATA_REG_OFFSET (5)
25650 +/*
25651 +#define AU1XXX_ATA_BASE (0x0C800000)
25652 +#define AU1XXX_ATA_END (0x0CFFFFFF)
25653 +#define AU1XXX_ATA_MEM_SIZE (AU1XXX_ATA_END - AU1XXX_ATA_BASE +1)
25654 +
25655 +#define AU1XXX_ATA_REG_OFFSET (5)
25656 +*/
25657 +/* VPP/VCC */
25658 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
25659 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25660 +
25661 +
25662 +#define FICMMP_CONFIG_BASE 0xAD000000
25663 +#define FICMMP_CONFIG_ENABLE 13
25664 +
25665 +#define FICMMP_CONFIG_I2SFREQ(N) (N<<0)
25666 +#define FICMMP_CONFIG_I2SXTAL0 (1<<0)
25667 +#define FICMMP_CONFIG_I2SXTAL1 (1<<1)
25668 +#define FICMMP_CONFIG_I2SXTAL2 (1<<2)
25669 +#define FICMMP_CONFIG_I2SXTAL3 (1<<3)
25670 +#define FICMMP_CONFIG_ADV1 (1<<4)
25671 +#define FICMMP_CONFIG_IDERST (1<<5)
25672 +#define FICMMP_CONFIG_LCMEN (1<<6)
25673 +#define FICMMP_CONFIG_CAMPWDN (1<<7)
25674 +#define FICMMP_CONFIG_USBPWREN (1<<8)
25675 +#define FICMMP_CONFIG_LCMPWREN (1<<9)
25676 +#define FICMMP_CONFIG_TVOUTPWREN (1<<10)
25677 +#define FICMMP_CONFIG_RS232PWREN (1<<11)
25678 +#define FICMMP_CONFIG_LCMDATAOUT (1<<12)
25679 +#define FICMMP_CONFIG_TVODATAOUT (1<<13)
25680 +#define FICMMP_CONFIG_ADV3 (1<<14)
25681 +#define FICMMP_CONFIG_ADV4 (1<<15)
25682 +
25683 +#define I2S_FREQ_8_192 (0x0)
25684 +#define I2S_FREQ_11_2896 (0x1)
25685 +#define I2S_FREQ_12_288 (0x2)
25686 +#define I2S_FREQ_24_576 (0x3)
25687 +//#define I2S_FREQ_12_288 (0x4)
25688 +#define I2S_FREQ_16_9344 (0x5)
25689 +#define I2S_FREQ_18_432 (0x6)
25690 +#define I2S_FREQ_36_864 (0x7)
25691 +#define I2S_FREQ_16_384 (0x8)
25692 +#define I2S_FREQ_22_5792 (0x9)
25693 +//#define I2S_FREQ_24_576 (0x10)
25694 +#define I2S_FREQ_49_152 (0x11)
25695 +//#define I2S_FREQ_24_576 (0x12)
25696 +#define I2S_FREQ_33_8688 (0x13)
25697 +//#define I2S_FREQ_36_864 (0x14)
25698 +#define I2S_FREQ_73_728 (0x15)
25699 +
25700 +#define FICMMP_IDE_PWR 9
25701 +#define FICMMP_FOCUS_RST 2
25702 +
25703 +static __inline void ficmmp_config_set(u16 bits)
25704 +{
25705 + extern u16 ficmmp_config;
25706 + //printk("set_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config | bits);
25707 + ficmmp_config |= bits;
25708 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25709 +}
25710 +
25711 +static __inline void ficmmp_config_clear(u16 bits)
25712 +{
25713 + extern u16 ficmmp_config;
25714 +// printk("clear_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config & ~bits);
25715 + ficmmp_config &= ~bits;
25716 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25717 +}
25718 +
25719 +static __inline void ficmmp_config_init(void)
25720 +{
25721 + au1xxx_gpio_write(FICMMP_CONFIG_ENABLE, 0); //Enable configuration latch
25722 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT | FICMMP_CONFIG_TVODATAOUT | FICMMP_CONFIG_IDERST); //Disable display data buffers
25723 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(I2S_FREQ_36_864));
25724 +}
25725 +
25726 +static __inline u32 ficmmp_set_i2s_sample_rate(u32 rate)
25727 +{
25728 + u32 freq;
25729 +
25730 + switch(rate)
25731 + {
25732 + case 88200:
25733 + case 44100:
25734 + case 8018: freq = I2S_FREQ_11_2896; break;
25735 + case 48000:
25736 + case 32000: //freq = I2S_FREQ_18_432; break;
25737 + case 8000: freq = I2S_FREQ_12_288; break;
25738 + default: freq = I2S_FREQ_12_288; rate = 8000;
25739 + }
25740 + ficmmp_config_clear(FICMMP_CONFIG_I2SFREQ(0xF));
25741 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(freq));
25742 + return rate;
25743 +}
25744 +
25745 +#endif /* __ASM_FICMMP_H */
25746 +
25747 diff -Nur linux-2.4.32-rc1/include/asm-mips/hazards.h linux-2.4.32-rc1.mips/include/asm-mips/hazards.h
25748 --- linux-2.4.32-rc1/include/asm-mips/hazards.h 2004-02-18 14:36:32.000000000 +0100
25749 +++ linux-2.4.32-rc1.mips/include/asm-mips/hazards.h 2005-06-06 16:46:22.000000000 +0200
25750 @@ -3,7 +3,7 @@
25751 * License. See the file "COPYING" in the main directory of this archive
25752 * for more details.
25753 *
25754 - * Copyright (C) 2003 Ralf Baechle
25755 + * Copyright (C) 2003, 2004 Ralf Baechle
25756 */
25757 #ifndef _ASM_HAZARDS_H
25758 #define _ASM_HAZARDS_H
25759 @@ -12,38 +12,200 @@
25760
25761 #ifdef __ASSEMBLY__
25762
25763 + .macro _ssnop
25764 + sll $0, $0, 1
25765 + .endm
25766 +
25767 /*
25768 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25769 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
25770 * for data translations should not occur for 3 cpu cycles.
25771 */
25772 #ifdef CONFIG_CPU_RM9000
25773 -#define rm9000_tlb_hazard \
25774 +
25775 +#define mtc0_tlbw_hazard \
25776 .set push; \
25777 .set mips32; \
25778 - ssnop; ssnop; ssnop; ssnop; \
25779 + _ssnop; _ssnop; _ssnop; _ssnop; \
25780 .set pop
25781 +
25782 +#define tlbw_eret_hazard \
25783 + .set push; \
25784 + .set mips32; \
25785 + _ssnop; _ssnop; _ssnop; _ssnop; \
25786 + .set pop
25787 +
25788 #else
25789 -#define rm9000_tlb_hazard
25790 +
25791 +/*
25792 + * The taken branch will result in a two cycle penalty for the two killed
25793 + * instructions on R4000 / R4400. Other processors only have a single cycle
25794 + * hazard so this is nice trick to have an optimal code for a range of
25795 + * processors.
25796 + */
25797 +#define mtc0_tlbw_hazard \
25798 + b . + 8
25799 +#define tlbw_eret_hazard \
25800 + nop
25801 #endif
25802
25803 +/*
25804 + * mtc0->mfc0 hazard
25805 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
25806 + * It is a MIPS32R2 processor so ehb will clear the hazard.
25807 + */
25808 +
25809 +#ifdef CONFIG_CPU_MIPSR2
25810 +/*
25811 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
25812 + */
25813 + .macro ehb
25814 + sll $0, $0, 3
25815 + .endm
25816 +
25817 +#define irq_enable_hazard \
25818 + ehb # irq_enable_hazard
25819 +
25820 +#define irq_disable_hazard \
25821 + ehb # irq_disable_hazard
25822 +
25823 +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
25824 +
25825 +/*
25826 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
25827 + */
25828 +
25829 +#define irq_enable_hazard
25830 +
25831 +#define irq_disable_hazard
25832 +
25833 #else
25834
25835 /*
25836 + * Classic MIPS needs 1 - 3 nops or ssnops
25837 + */
25838 +#define irq_enable_hazard
25839 +#define irq_disable_hazard \
25840 + _ssnop; _ssnop; _ssnop
25841 +
25842 +#endif
25843 +
25844 +#else /* __ASSEMBLY__ */
25845 +
25846 +/*
25847 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25848 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
25849 * for data translations should not occur for 3 cpu cycles.
25850 */
25851 #ifdef CONFIG_CPU_RM9000
25852 -#define rm9000_tlb_hazard() \
25853 +
25854 +#define mtc0_tlbw_hazard() \
25855 __asm__ __volatile__( \
25856 ".set\tmips32\n\t" \
25857 - "ssnop; ssnop; ssnop; ssnop\n\t" \
25858 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
25859 + ".set\tmips0")
25860 +
25861 +#define tlbw_use_hazard() \
25862 + __asm__ __volatile__( \
25863 + ".set\tmips32\n\t" \
25864 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
25865 ".set\tmips0")
25866 #else
25867 -#define rm9000_tlb_hazard() do { } while (0)
25868 +
25869 +/*
25870 + * Overkill warning ...
25871 + */
25872 +#define mtc0_tlbw_hazard() \
25873 + __asm__ __volatile__( \
25874 + ".set noreorder\n\t" \
25875 + "nop; nop; nop; nop; nop; nop;\n\t" \
25876 + ".set reorder\n\t")
25877 +
25878 +#define tlbw_use_hazard() \
25879 + __asm__ __volatile__( \
25880 + ".set noreorder\n\t" \
25881 + "nop; nop; nop; nop; nop; nop;\n\t" \
25882 + ".set reorder\n\t")
25883 +
25884 #endif
25885
25886 +/*
25887 + * mtc0->mfc0 hazard
25888 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
25889 + * It is a MIPS32R2 processor so ehb will clear the hazard.
25890 + */
25891 +
25892 +#ifdef CONFIG_CPU_MIPSR2
25893 +/*
25894 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
25895 + */
25896 +__asm__(
25897 + " .macro ehb \n\t"
25898 + " sll $0, $0, 3 \n\t"
25899 + " .endm \n\t"
25900 + " \n\t"
25901 + " .macro\tirq_enable_hazard \n\t"
25902 + " ehb \n\t"
25903 + " .endm \n\t"
25904 + " \n\t"
25905 + " .macro\tirq_disable_hazard \n\t"
25906 + " ehb \n\t"
25907 + " .endm");
25908 +
25909 +#define irq_enable_hazard() \
25910 + __asm__ __volatile__( \
25911 + "ehb\t\t\t\t# irq_enable_hazard")
25912 +
25913 +#define irq_disable_hazard() \
25914 + __asm__ __volatile__( \
25915 + "ehb\t\t\t\t# irq_disable_hazard")
25916 +
25917 +#elif defined(CONFIG_CPU_R10000)
25918 +
25919 +/*
25920 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
25921 + */
25922 +
25923 +__asm__(
25924 + " .macro\tirq_enable_hazard \n\t"
25925 + " .endm \n\t"
25926 + " \n\t"
25927 + " .macro\tirq_disable_hazard \n\t"
25928 + " .endm");
25929 +
25930 +#define irq_enable_hazard() do { } while (0)
25931 +#define irq_disable_hazard() do { } while (0)
25932 +
25933 +#else
25934 +
25935 +/*
25936 + * Default for classic MIPS processors. Assume worst case hazards but don't
25937 + * care about the irq_enable_hazard - sooner or later the hardware will
25938 + * enable it and we don't care when exactly.
25939 + */
25940 +
25941 +__asm__(
25942 + " .macro _ssnop \n\t"
25943 + " sll $0, $2, 1 \n\t"
25944 + " .endm \n\t"
25945 + " \n\t"
25946 + " # \n\t"
25947 + " # There is a hazard but we do not care \n\t"
25948 + " # \n\t"
25949 + " .macro\tirq_enable_hazard \n\t"
25950 + " .endm \n\t"
25951 + " \n\t"
25952 + " .macro\tirq_disable_hazard \n\t"
25953 + " _ssnop; _ssnop; _ssnop \n\t"
25954 + " .endm");
25955 +
25956 +#define irq_enable_hazard() do { } while (0)
25957 +#define irq_disable_hazard() \
25958 + __asm__ __volatile__( \
25959 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
25960 +
25961 #endif
25962
25963 +#endif /* __ASSEMBLY__ */
25964 +
25965 #endif /* _ASM_HAZARDS_H */
25966 diff -Nur linux-2.4.32-rc1/include/asm-mips/ide.h linux-2.4.32-rc1.mips/include/asm-mips/ide.h
25967 --- linux-2.4.32-rc1/include/asm-mips/ide.h 2003-08-25 13:44:43.000000000 +0200
25968 +++ linux-2.4.32-rc1.mips/include/asm-mips/ide.h 2005-04-19 14:26:53.000000000 +0200
25969 @@ -32,12 +32,12 @@
25970
25971 extern struct ide_ops *ide_ops;
25972
25973 -static __inline__ int ide_default_irq(ide_ioreg_t base)
25974 +static inline int ide_default_irq(ide_ioreg_t base)
25975 {
25976 return ide_ops->ide_default_irq(base);
25977 }
25978
25979 -static __inline__ ide_ioreg_t ide_default_io_base(int index)
25980 +static inline ide_ioreg_t ide_default_io_base(int index)
25981 {
25982 return ide_ops->ide_default_io_base(index);
25983 }
25984 @@ -48,7 +48,7 @@
25985 ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
25986 }
25987
25988 -static __inline__ void ide_init_default_hwifs(void)
25989 +static inline void ide_init_default_hwifs(void)
25990 {
25991 #ifndef CONFIG_BLK_DEV_IDEPCI
25992 hw_regs_t hw;
25993 @@ -68,7 +68,89 @@
25994 #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
25995 #endif
25996
25997 -#include <asm-generic/ide_iops.h>
25998 +/* MIPS port and memory-mapped I/O string operations. */
25999 +
26000 +static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
26001 +{
26002 + if (cpu_has_dc_aliases) {
26003 + unsigned long end = addr + size;
26004 + for (; addr < end; addr += PAGE_SIZE)
26005 + flush_dcache_page(virt_to_page(addr));
26006 + }
26007 +}
26008 +
26009 +static inline void __ide_insw(unsigned long port, void *addr,
26010 + unsigned int count)
26011 +{
26012 + insw(port, addr, count);
26013 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
26014 +}
26015 +
26016 +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
26017 +{
26018 + insl(port, addr, count);
26019 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
26020 +}
26021 +
26022 +static inline void __ide_outsw(unsigned long port, const void *addr,
26023 + unsigned long count)
26024 +{
26025 + outsw(port, addr, count);
26026 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
26027 +}
26028 +
26029 +static inline void __ide_outsl(unsigned long port, const void *addr,
26030 + unsigned long count)
26031 +{
26032 + outsl(port, addr, count);
26033 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
26034 +}
26035 +
26036 +static inline void __ide_mm_insw(unsigned long port, void *addr, u32 count)
26037 +{
26038 + unsigned long start = (unsigned long) addr;
26039 +
26040 + while (count--) {
26041 + *(u16 *)addr = readw(port);
26042 + addr += 2;
26043 + }
26044 + __ide_flush_dcache_range(start, count * 2);
26045 +}
26046 +
26047 +static inline void __ide_mm_insl(unsigned long port, void *addr, u32 count)
26048 +{
26049 + unsigned long start = (unsigned long) addr;
26050 +
26051 + while (count--) {
26052 + *(u32 *)addr = readl(port);
26053 + addr += 4;
26054 + }
26055 + __ide_flush_dcache_range(start, count * 4);
26056 +}
26057 +
26058 +static inline void __ide_mm_outsw(unsigned long port, const void *addr,
26059 + u32 count)
26060 +{
26061 + unsigned long start = (unsigned long) addr;
26062 +
26063 + while (count--) {
26064 + writew(*(u16 *)addr, port);
26065 + addr += 2;
26066 + }
26067 + __ide_flush_dcache_range(start, count * 2);
26068 +}
26069 +
26070 +static inline void __ide_mm_outsl(unsigned long port, const void *addr,
26071 + u32 count)
26072 +{
26073 + unsigned long start = (unsigned long) addr;
26074 +
26075 + while (count--) {
26076 + writel(*(u32 *)addr, port);
26077 + addr += 4;
26078 + }
26079 + __ide_flush_dcache_range(start, count * 4);
26080 +}
26081
26082 #endif /* __KERNEL__ */
26083
26084 diff -Nur linux-2.4.32-rc1/include/asm-mips/io.h linux-2.4.32-rc1.mips/include/asm-mips/io.h
26085 --- linux-2.4.32-rc1/include/asm-mips/io.h 2003-08-25 13:44:43.000000000 +0200
26086 +++ linux-2.4.32-rc1.mips/include/asm-mips/io.h 2005-04-19 14:24:16.000000000 +0200
26087 @@ -392,7 +392,8 @@
26088 return __ioswab32(__val);
26089 }
26090
26091 -static inline void __outsb(unsigned long port, void *addr, unsigned int count)
26092 +static inline void __outsb(unsigned long port, const void *addr,
26093 + unsigned int count)
26094 {
26095 while (count--) {
26096 outb(*(u8 *)addr, port);
26097 @@ -408,7 +409,8 @@
26098 }
26099 }
26100
26101 -static inline void __outsw(unsigned long port, void *addr, unsigned int count)
26102 +static inline void __outsw(unsigned long port, const void *addr,
26103 + unsigned int count)
26104 {
26105 while (count--) {
26106 outw(*(u16 *)addr, port);
26107 @@ -424,7 +426,8 @@
26108 }
26109 }
26110
26111 -static inline void __outsl(unsigned long port, void *addr, unsigned int count)
26112 +static inline void __outsl(unsigned long port, const void *addr,
26113 + unsigned int count)
26114 {
26115 while (count--) {
26116 outl(*(u32 *)addr, port);
26117 diff -Nur linux-2.4.32-rc1/include/asm-mips/mipsregs.h linux-2.4.32-rc1.mips/include/asm-mips/mipsregs.h
26118 --- linux-2.4.32-rc1/include/asm-mips/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
26119 +++ linux-2.4.32-rc1.mips/include/asm-mips/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
26120 @@ -757,10 +757,18 @@
26121 #define read_c0_config1() __read_32bit_c0_register($16, 1)
26122 #define read_c0_config2() __read_32bit_c0_register($16, 2)
26123 #define read_c0_config3() __read_32bit_c0_register($16, 3)
26124 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
26125 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
26126 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
26127 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
26128 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
26129 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
26130 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
26131 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
26132 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
26133 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
26134 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
26135 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
26136
26137 /*
26138 * The WatchLo register. There may be upto 8 of them.
26139 @@ -874,42 +882,34 @@
26140 */
26141 static inline void tlb_probe(void)
26142 {
26143 - rm9000_tlb_hazard();
26144 __asm__ __volatile__(
26145 ".set noreorder\n\t"
26146 "tlbp\n\t"
26147 ".set reorder");
26148 - rm9000_tlb_hazard();
26149 }
26150
26151 static inline void tlb_read(void)
26152 {
26153 - rm9000_tlb_hazard();
26154 __asm__ __volatile__(
26155 ".set noreorder\n\t"
26156 "tlbr\n\t"
26157 ".set reorder");
26158 - rm9000_tlb_hazard();
26159 }
26160
26161 static inline void tlb_write_indexed(void)
26162 {
26163 - rm9000_tlb_hazard();
26164 __asm__ __volatile__(
26165 ".set noreorder\n\t"
26166 "tlbwi\n\t"
26167 ".set reorder");
26168 - rm9000_tlb_hazard();
26169 }
26170
26171 static inline void tlb_write_random(void)
26172 {
26173 - rm9000_tlb_hazard();
26174 __asm__ __volatile__(
26175 ".set noreorder\n\t"
26176 "tlbwr\n\t"
26177 ".set reorder");
26178 - rm9000_tlb_hazard();
26179 }
26180
26181 /*
26182 diff -Nur linux-2.4.32-rc1/include/asm-mips/mmu_context.h linux-2.4.32-rc1.mips/include/asm-mips/mmu_context.h
26183 --- linux-2.4.32-rc1/include/asm-mips/mmu_context.h 2005-01-19 15:10:12.000000000 +0100
26184 +++ linux-2.4.32-rc1.mips/include/asm-mips/mmu_context.h 2004-11-22 14:38:29.000000000 +0100
26185 @@ -27,7 +27,7 @@
26186 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
26187 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
26188 #define TLBMISS_HANDLER_SETUP() \
26189 - write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
26190 + write_c0_context((unsigned long) smp_processor_id() << 23); \
26191 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
26192 extern unsigned long pgd_current[];
26193
26194 diff -Nur linux-2.4.32-rc1/include/asm-mips/pb1100.h linux-2.4.32-rc1.mips/include/asm-mips/pb1100.h
26195 --- linux-2.4.32-rc1/include/asm-mips/pb1100.h 2003-08-25 13:44:44.000000000 +0200
26196 +++ linux-2.4.32-rc1.mips/include/asm-mips/pb1100.h 2005-01-30 09:10:29.000000000 +0100
26197 @@ -1,5 +1,5 @@
26198 /*
26199 - * Alchemy Semi PB1100 Referrence Board
26200 + * AMD Alchemy PB1100 Reference Boards
26201 *
26202 * Copyright 2001 MontaVista Software Inc.
26203 * Author: MontaVista Software, Inc.
26204 @@ -27,55 +27,108 @@
26205 #ifndef __ASM_PB1100_H
26206 #define __ASM_PB1100_H
26207
26208 -#define PB1100_IDENT 0xAE000000
26209 -#define BOARD_STATUS_REG 0xAE000004
26210 - #define PB1100_ROM_SEL (1<<15)
26211 - #define PB1100_ROM_SIZ (1<<14)
26212 - #define PB1100_SWAP_BOOT (1<<13)
26213 - #define PB1100_FLASH_WP (1<<12)
26214 - #define PB1100_ROM_H_STS (1<<11)
26215 - #define PB1100_ROM_L_STS (1<<10)
26216 - #define PB1100_FLASH_H_STS (1<<9)
26217 - #define PB1100_FLASH_L_STS (1<<8)
26218 - #define PB1100_SRAM_SIZ (1<<7)
26219 - #define PB1100_TSC_BUSY (1<<6)
26220 - #define PB1100_PCMCIA_VS_MASK (3<<4)
26221 - #define PB1100_RS232_CD (1<<3)
26222 - #define PB1100_RS232_CTS (1<<2)
26223 - #define PB1100_RS232_DSR (1<<1)
26224 - #define PB1100_RS232_RI (1<<0)
26225 -
26226 -#define PB1100_IRDA_RS232 0xAE00000C
26227 - #define PB1100_IRDA_FULL (0<<14) /* full power */
26228 - #define PB1100_IRDA_SHUTDOWN (1<<14)
26229 - #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
26230 - #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
26231 - #define PB1100_IRDA_FIR (1<<13)
26232 -
26233 -#define PCMCIA_BOARD_REG 0xAE000010
26234 - #define PB1100_SD_WP1_RO (1<<15) /* read only */
26235 - #define PB1100_SD_WP0_RO (1<<14) /* read only */
26236 - #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
26237 - #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
26238 - #define PB1100_SEL_SD_CONN1 (1<<9)
26239 - #define PB1100_SEL_SD_CONN0 (1<<8)
26240 - #define PC_DEASSERT_RST (1<<7)
26241 - #define PC_DRV_EN (1<<4)
26242 -
26243 -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
26244 -
26245 -#define PB1100_RST_VDDI 0xAE00001C
26246 - #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
26247 - #define PB1100_VDDI_MASK (0x1F)
26248 +#define BCSR_KSEG1_ADDR 0xAE000000
26249 +
26250 +/*
26251 + * Overlay data structure of the Pb1100 board registers.
26252 + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
26253 + */
26254 +typedef volatile struct
26255 +{
26256 + /*00*/ unsigned short whoami;
26257 + unsigned short reserved0;
26258 + /*04*/ unsigned short status;
26259 + unsigned short reserved1;
26260 + /*08*/ unsigned short switches;
26261 + unsigned short reserved2;
26262 + /*0C*/ unsigned short resets;
26263 + unsigned short reserved3;
26264 + /*10*/ unsigned short pcmcia;
26265 + unsigned short reserved4;
26266 + /*14*/ unsigned short graphics;
26267 + unsigned short reserved5;
26268 + /*18*/ unsigned short leds;
26269 + unsigned short reserved6;
26270 + /*1C*/ unsigned short swreset;
26271 + unsigned short reserved7;
26272 +
26273 +} BCSR;
26274
26275 -#define PB1100_LEDS 0xAE000018
26276
26277 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
26278 - * 7:0 is the LED Display's decimal points.
26279 +/*
26280 + * Register/mask bit definitions for the BCSRs
26281 */
26282 -#define PB1100_HEX_LED 0xAE000018
26283 +#define BCSR_WHOAMI_DCID 0x000F
26284 +#define BCSR_WHOAMI_CPLD 0x00F0
26285 +#define BCSR_WHOAMI_BOARD 0x0F00
26286 +
26287 +#define BCSR_STATUS_RS232_RI 0x0001
26288 +#define BCSR_STATUS_RS232_DSR 0x0002
26289 +#define BCSR_STATUS_RS232_CTS 0x0004
26290 +#define BCSR_STATUS_RS232_CD 0x0008
26291 +#define BCSR_STATUS_PCMCIA_VS_MASK 0x0030
26292 +#define BCSR_STATUS_TSC_BUSY 0x0040
26293 +#define BCSR_STATUS_SRAM_SIZ 0x0080
26294 +#define BCSR_STATUS_FLASH_L_STS 0x0100
26295 +#define BCSR_STATUS_FLASH_H_STS 0x0200
26296 +#define BCSR_STATUS_ROM_H_STS 0x0400
26297 +#define BCSR_STATUS_ROM_L_STS 0x0800
26298 +#define BCSR_STATUS_FLASH_WP 0x1000
26299 +#define BCSR_STATUS_SWAP_BOOT 0x2000
26300 +#define BCSR_STATUS_ROM_SIZ 0x4000
26301 +#define BCSR_STATUS_ROM_SEL 0x8000
26302 +
26303 +#define BCSR_SWITCHES_DIP 0x00FF
26304 +#define BCSR_SWITCHES_DIP_1 0x0080
26305 +#define BCSR_SWITCHES_DIP_2 0x0040
26306 +#define BCSR_SWITCHES_DIP_3 0x0020
26307 +#define BCSR_SWITCHES_DIP_4 0x0010
26308 +#define BCSR_SWITCHES_DIP_5 0x0008
26309 +#define BCSR_SWITCHES_DIP_6 0x0004
26310 +#define BCSR_SWITCHES_DIP_7 0x0002
26311 +#define BCSR_SWITCHES_DIP_8 0x0001
26312 +#define BCSR_SWITCHES_ROTARY 0x0F00
26313 +#define BCSR_SWITCHES_SDO_CL 0x8000
26314 +
26315 +#define BCSR_RESETS_PHY0 0x0001
26316 +#define BCSR_RESETS_PHY1 0x0002
26317 +#define BCSR_RESETS_DC 0x0004
26318 +#define BCSR_RESETS_RS232_RTS 0x0100
26319 +#define BCSR_RESETS_RS232_DTR 0x0200
26320 +#define BCSR_RESETS_FIR_SEL 0x2000
26321 +#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
26322 +#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
26323 +#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
26324 +#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
26325 +#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
26326 +
26327 +#define BCSR_PCMCIA_PC0VPP 0x0003
26328 +#define BCSR_PCMCIA_PC0VCC 0x000C
26329 +#define BCSR_PCMCIA_PC0_DR_VEN 0x0010
26330 +#define BCSR_PCMCIA_PC0RST 0x0080
26331 +#define BCSR_PCMCIA_SEL_SD_CON0 0x0100
26332 +#define BCSR_PCMCIA_SEL_SD_CON1 0x0200
26333 +#define BCSR_PCMCIA_SD0_PWR 0x0400
26334 +#define BCSR_PCMCIA_SD1_PWR 0x0800
26335 +#define BCSR_PCMCIA_SD0_WP 0x4000
26336 +#define BCSR_PCMCIA_SD1_WP 0x8000
26337 +
26338 +#define PB1100_G_CONTROL 0xAE000014
26339 +#define BCSR_GRAPHICS_GPX_SMPASS 0x0010
26340 +#define BCSR_GRAPHICS_GPX_BIG_ENDIAN 0x0020
26341 +#define BCSR_GRAPHICS_GPX_RST 0x0040
26342 +
26343 +#define BCSR_LEDS_DECIMALS 0x00FF
26344 +#define BCSR_LEDS_LED0 0x0100
26345 +#define BCSR_LEDS_LED1 0x0200
26346 +#define BCSR_LEDS_LED2 0x0400
26347 +#define BCSR_LEDS_LED3 0x0800
26348 +
26349 +#define BCSR_SWRESET_RESET 0x0080
26350 +#define BCSR_VDDI_VDI 0x001F
26351
26352 -/* PCMCIA PB1100 specific defines */
26353 +
26354 + /* PCMCIA Pb1x00 specific defines */
26355 #define PCMCIA_MAX_SOCK 0
26356 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
26357
26358 @@ -83,3 +136,4 @@
26359 #define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
26360
26361 #endif /* __ASM_PB1100_H */
26362 +
26363 diff -Nur linux-2.4.32-rc1/include/asm-mips/pb1200.h linux-2.4.32-rc1.mips/include/asm-mips/pb1200.h
26364 --- linux-2.4.32-rc1/include/asm-mips/pb1200.h 1970-01-01 01:00:00.000000000 +0100
26365 +++ linux-2.4.32-rc1.mips/include/asm-mips/pb1200.h 2005-01-30 09:01:28.000000000 +0100
26366 @@ -0,0 +1,244 @@
26367 +/*
26368 + * AMD Alchemy PB1200 Referrence Board
26369 + * Board Registers defines.
26370 + *
26371 + * ########################################################################
26372 + *
26373 + * This program is free software; you can distribute it and/or modify it
26374 + * under the terms of the GNU General Public License (Version 2) as
26375 + * published by the Free Software Foundation.
26376 + *
26377 + * This program is distributed in the hope it will be useful, but WITHOUT
26378 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26379 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26380 + * for more details.
26381 + *
26382 + * You should have received a copy of the GNU General Public License along
26383 + * with this program; if not, write to the Free Software Foundation, Inc.,
26384 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
26385 + *
26386 + * ########################################################################
26387 + *
26388 + *
26389 + */
26390 +#ifndef __ASM_PB1200_H
26391 +#define __ASM_PB1200_H
26392 +
26393 +#include <linux/types.h>
26394 +
26395 +// This is defined in au1000.h with bogus value
26396 +#undef AU1X00_EXTERNAL_INT
26397 +
26398 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
26399 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
26400 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
26401 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
26402 +
26403 +/* SPI and SMB are muxed on the Pb1200 board.
26404 + Refer to board documentation.
26405 + */
26406 +#define SPI_PSC_BASE PSC0_BASE_ADDR
26407 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
26408 +/* AC97 and I2S are muxed on the Pb1200 board.
26409 + Refer to board documentation.
26410 + */
26411 +#define AC97_PSC_BASE PSC1_BASE_ADDR
26412 +#define I2S_PSC_BASE PSC1_BASE_ADDR
26413 +
26414 +#define BCSR_KSEG1_ADDR 0xAD800000
26415 +
26416 +typedef volatile struct
26417 +{
26418 + /*00*/ u16 whoami;
26419 + u16 reserved0;
26420 + /*04*/ u16 status;
26421 + u16 reserved1;
26422 + /*08*/ u16 switches;
26423 + u16 reserved2;
26424 + /*0C*/ u16 resets;
26425 + u16 reserved3;
26426 +
26427 + /*10*/ u16 pcmcia;
26428 + u16 reserved4;
26429 + /*14*/ u16 board;
26430 + u16 reserved5;
26431 + /*18*/ u16 disk_leds;
26432 + u16 reserved6;
26433 + /*1C*/ u16 system;
26434 + u16 reserved7;
26435 +
26436 + /*20*/ u16 intclr;
26437 + u16 reserved8;
26438 + /*24*/ u16 intset;
26439 + u16 reserved9;
26440 + /*28*/ u16 intclr_mask;
26441 + u16 reserved10;
26442 + /*2C*/ u16 intset_mask;
26443 + u16 reserved11;
26444 +
26445 + /*30*/ u16 sig_status;
26446 + u16 reserved12;
26447 + /*34*/ u16 int_status;
26448 + u16 reserved13;
26449 + /*38*/ u16 reserved14;
26450 + u16 reserved15;
26451 + /*3C*/ u16 reserved16;
26452 + u16 reserved17;
26453 +
26454 +} BCSR;
26455 +
26456 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
26457 +
26458 +/*
26459 + * Register bit definitions for the BCSRs
26460 + */
26461 +#define BCSR_WHOAMI_DCID 0x000F
26462 +#define BCSR_WHOAMI_CPLD 0x00F0
26463 +#define BCSR_WHOAMI_BOARD 0x0F00
26464 +
26465 +#define BCSR_STATUS_PCMCIA0VS 0x0003
26466 +#define BCSR_STATUS_PCMCIA1VS 0x000C
26467 +#define BCSR_STATUS_SWAPBOOT 0x0040
26468 +#define BCSR_STATUS_FLASHBUSY 0x0100
26469 +#define BCSR_STATUS_IDECBLID 0x0200
26470 +#define BCSR_STATUS_SD0WP 0x0400
26471 +#define BCSR_STATUS_SD1WP 0x0800
26472 +#define BCSR_STATUS_U0RXD 0x1000
26473 +#define BCSR_STATUS_U1RXD 0x2000
26474 +
26475 +#define BCSR_SWITCHES_OCTAL 0x00FF
26476 +#define BCSR_SWITCHES_DIP_1 0x0080
26477 +#define BCSR_SWITCHES_DIP_2 0x0040
26478 +#define BCSR_SWITCHES_DIP_3 0x0020
26479 +#define BCSR_SWITCHES_DIP_4 0x0010
26480 +#define BCSR_SWITCHES_DIP_5 0x0008
26481 +#define BCSR_SWITCHES_DIP_6 0x0004
26482 +#define BCSR_SWITCHES_DIP_7 0x0002
26483 +#define BCSR_SWITCHES_DIP_8 0x0001
26484 +#define BCSR_SWITCHES_ROTARY 0x0F00
26485 +
26486 +#define BCSR_RESETS_ETH 0x0001
26487 +#define BCSR_RESETS_CAMERA 0x0002
26488 +#define BCSR_RESETS_DC 0x0004
26489 +#define BCSR_RESETS_IDE 0x0008
26490 +/* not resets but in the same register */
26491 +#define BCSR_RESETS_WSCFSM 0x0800
26492 +#define BCSR_RESETS_PCS0MUX 0x1000
26493 +#define BCSR_RESETS_PCS1MUX 0x2000
26494 +#define BCSR_RESETS_SPISEL 0x4000
26495 +#define BCSR_RESETS_SD1MUX 0x8000
26496 +
26497 +#define BCSR_PCMCIA_PC0VPP 0x0003
26498 +#define BCSR_PCMCIA_PC0VCC 0x000C
26499 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
26500 +#define BCSR_PCMCIA_PC0RST 0x0080
26501 +#define BCSR_PCMCIA_PC1VPP 0x0300
26502 +#define BCSR_PCMCIA_PC1VCC 0x0C00
26503 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
26504 +#define BCSR_PCMCIA_PC1RST 0x8000
26505 +
26506 +#define BCSR_BOARD_LCDVEE 0x0001
26507 +#define BCSR_BOARD_LCDVDD 0x0002
26508 +#define BCSR_BOARD_LCDBL 0x0004
26509 +#define BCSR_BOARD_CAMSNAP 0x0010
26510 +#define BCSR_BOARD_CAMPWR 0x0020
26511 +#define BCSR_BOARD_SD0PWR 0x0040
26512 +#define BCSR_BOARD_SD1PWR 0x0080
26513 +
26514 +#define BCSR_LEDS_DECIMALS 0x00FF
26515 +#define BCSR_LEDS_LED0 0x0100
26516 +#define BCSR_LEDS_LED1 0x0200
26517 +#define BCSR_LEDS_LED2 0x0400
26518 +#define BCSR_LEDS_LED3 0x0800
26519 +
26520 +#define BCSR_SYSTEM_VDDI 0x001F
26521 +#define BCSR_SYSTEM_POWEROFF 0x4000
26522 +#define BCSR_SYSTEM_RESET 0x8000
26523 +
26524 +/* Bit positions for the different interrupt sources */
26525 +#define BCSR_INT_IDE 0x0001
26526 +#define BCSR_INT_ETH 0x0002
26527 +#define BCSR_INT_PC0 0x0004
26528 +#define BCSR_INT_PC0STSCHG 0x0008
26529 +#define BCSR_INT_PC1 0x0010
26530 +#define BCSR_INT_PC1STSCHG 0x0020
26531 +#define BCSR_INT_DC 0x0040
26532 +#define BCSR_INT_FLASHBUSY 0x0080
26533 +#define BCSR_INT_PC0INSERT 0x0100
26534 +#define BCSR_INT_PC0EJECT 0x0200
26535 +#define BCSR_INT_PC1INSERT 0x0400
26536 +#define BCSR_INT_PC1EJECT 0x0800
26537 +#define BCSR_INT_SD0INSERT 0x1000
26538 +#define BCSR_INT_SD0EJECT 0x2000
26539 +#define BCSR_INT_SD1INSERT 0x4000
26540 +#define BCSR_INT_SD1EJECT 0x8000
26541 +
26542 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
26543 +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
26544 +
26545 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
26546 +#define AU1XXX_ATA_PHYS_LEN (0x100)
26547 +#define AU1XXX_ATA_REG_OFFSET (5)
26548 +#define AU1XXX_ATA_INT PB1200_IDE_INT
26549 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
26550 +#define AU1XXX_ATA_RQSIZE 128
26551 +
26552 +#define NAND_PHYS_ADDR 0x1C000000
26553 +
26554 +/* Timing values as described in databook, * ns value stripped of
26555 + * lower 2 bits.
26556 + * These defines are here rather than an SOC1200 generic file because
26557 + * the parts chosen on another board may be different and may require
26558 + * different timings.
26559 + */
26560 +#define NAND_T_H (18 >> 2)
26561 +#define NAND_T_PUL (30 >> 2)
26562 +#define NAND_T_SU (30 >> 2)
26563 +#define NAND_T_WH (30 >> 2)
26564 +
26565 +/* Bitfield shift amounts */
26566 +#define NAND_T_H_SHIFT 0
26567 +#define NAND_T_PUL_SHIFT 4
26568 +#define NAND_T_SU_SHIFT 8
26569 +#define NAND_T_WH_SHIFT 12
26570 +
26571 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26572 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26573 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26574 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26575 +
26576 +
26577 +/*
26578 + * External Interrupts for Pb1200 as of 8/6/2004.
26579 + * Bit positions in the CPLD registers can be calculated by taking
26580 + * the interrupt define and subtracting the PB1200_INT_BEGIN value.
26581 + * *example: IDE bis pos is = 64 - 64
26582 + ETH bit pos is = 65 - 64
26583 + */
26584 +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
26585 +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
26586 +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
26587 +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
26588 +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
26589 +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
26590 +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
26591 +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
26592 +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
26593 +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
26594 +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
26595 +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
26596 +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
26597 +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
26598 +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
26599 +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
26600 +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
26601 +
26602 +#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
26603 +
26604 +/* For drivers/pcmcia/au1000_db1x00.c */
26605 +#define BOARD_PC0_INT PB1200_PC0_INT
26606 +#define BOARD_PC1_INT PB1200_PC1_INT
26607 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
26608 +
26609 +#endif /* __ASM_PB1200_H */
26610 +
26611 diff -Nur linux-2.4.32-rc1/include/asm-mips/pb1550.h linux-2.4.32-rc1.mips/include/asm-mips/pb1550.h
26612 --- linux-2.4.32-rc1/include/asm-mips/pb1550.h 2005-01-19 15:10:12.000000000 +0100
26613 +++ linux-2.4.32-rc1.mips/include/asm-mips/pb1550.h 2005-01-30 09:01:28.000000000 +0100
26614 @@ -30,13 +30,11 @@
26615
26616 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
26617 #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
26618 -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
26619 -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
26620 -
26621 #define SPI_PSC_BASE PSC0_BASE_ADDR
26622 #define AC97_PSC_BASE PSC1_BASE_ADDR
26623 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
26624 #define I2S_PSC_BASE PSC3_BASE_ADDR
26625 +#define NAND_CS 1
26626
26627 #define BCSR_PHYS_ADDR 0xAF000000
26628
26629 @@ -160,9 +158,23 @@
26630 #define NAND_T_SU_SHIFT 8
26631 #define NAND_T_WH_SHIFT 12
26632
26633 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26634 - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26635 - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26636 - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26637 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26638 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26639 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26640 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26641 +
26642 +/*
26643 + * Daughter card information.
26644 + */
26645 +#define DAUGHTER_CARD_BASE (0xAC000000)
26646 +#define DAUGHTER_CARD_MEM_SIZE (0xADFFFFFF - DAUGHTER_CARD_BASE + 1)
26647 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_3)
26648 +
26649 +/* DC_IDE and DC_ETHERNET */
26650 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
26651 +#define AU1XXX_ATA_REG_OFFSET (5)
26652 +
26653 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0C000300)
26654 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_3
26655
26656 #endif /* __ASM_PB1550_H */
26657 diff -Nur linux-2.4.32-rc1/include/asm-mips/reg.h linux-2.4.32-rc1.mips/include/asm-mips/reg.h
26658 --- linux-2.4.32-rc1/include/asm-mips/reg.h 2002-08-03 02:39:45.000000000 +0200
26659 +++ linux-2.4.32-rc1.mips/include/asm-mips/reg.h 2005-04-14 12:41:44.000000000 +0200
26660 @@ -45,6 +45,9 @@
26661 /*
26662 * k0/k1 unsaved
26663 */
26664 +#define EF_REG26 32
26665 +#define EF_REG27 33
26666 +
26667 #define EF_REG28 34
26668 #define EF_REG29 35
26669 #define EF_REG30 36
26670 @@ -60,6 +63,7 @@
26671 #define EF_CP0_BADVADDR 41
26672 #define EF_CP0_STATUS 42
26673 #define EF_CP0_CAUSE 43
26674 +#define EF_UNUSED0 44
26675
26676 #define EF_SIZE 180 /* size in bytes */
26677
26678 diff -Nur linux-2.4.32-rc1/include/asm-mips/sgi/hpc3.h linux-2.4.32-rc1.mips/include/asm-mips/sgi/hpc3.h
26679 --- linux-2.4.32-rc1/include/asm-mips/sgi/hpc3.h 2003-08-25 13:44:44.000000000 +0200
26680 +++ linux-2.4.32-rc1.mips/include/asm-mips/sgi/hpc3.h 2005-09-23 16:35:27.000000000 +0200
26681 @@ -128,26 +128,26 @@
26682 volatile u32 rx_gfptr; /* current GIO fifo ptr */
26683 volatile u32 rx_dfptr; /* current device fifo ptr */
26684 u32 _unused1; /* padding */
26685 - volatile u32 rx_reset; /* reset register */
26686 -#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
26687 -#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
26688 -#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
26689 -
26690 - volatile u32 rx_dconfig; /* DMA configuration register */
26691 -#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
26692 -#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
26693 -#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
26694 -#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
26695 -#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
26696 -#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
26697 -#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
26698 -#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
26699 -
26700 - volatile u32 rx_pconfig; /* PIO configuration register */
26701 -#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
26702 -#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
26703 -#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
26704 -#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
26705 + volatile u32 reset; /* reset register */
26706 +#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */
26707 +#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */
26708 +#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
26709 +
26710 + volatile u32 dconfig; /* DMA configuration register */
26711 +#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
26712 +#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
26713 +#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
26714 +#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
26715 +#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
26716 +#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
26717 +#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
26718 +#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */
26719 +
26720 + volatile u32 pconfig; /* PIO configuration register */
26721 +#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
26722 +#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
26723 +#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
26724 +#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
26725
26726 u32 _unused2[0x1000/4 - 8]; /* padding */
26727
26728 @@ -221,7 +221,7 @@
26729 #define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
26730
26731 u32 _unused1[0x14000/4 - 5]; /* padding */
26732 -
26733 +
26734 /* Now direct PIO per-HPC3 peripheral access to external regs. */
26735 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
26736 u32 _unused2[0x7c00/4];
26737 @@ -304,7 +304,7 @@
26738 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
26739 };
26740
26741 -/*
26742 +/*
26743 * It is possible to have two HPC3's within the address space on
26744 * one machine, though only having one is more likely on an Indy.
26745 */
26746 diff -Nur linux-2.4.32-rc1/include/asm-mips/tx4927/tx4927.h linux-2.4.32-rc1.mips/include/asm-mips/tx4927/tx4927.h
26747 --- linux-2.4.32-rc1/include/asm-mips/tx4927/tx4927.h 2003-08-25 13:44:44.000000000 +0200
26748 +++ linux-2.4.32-rc1.mips/include/asm-mips/tx4927/tx4927.h 2004-11-22 19:02:10.000000000 +0100
26749 @@ -88,8 +88,8 @@
26750
26751
26752 /* TX4927 Configuration registers (64-bit registers) */
26753 -#define TX4927_CONFIG_BASE 0xe300
26754 -#define TX4927_CONFIG_CCFG 0xe300
26755 +#define TX4927_CONFIG_BASE 0xe000
26756 +#define TX4927_CONFIG_CCFG 0xe000
26757 #define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
26758 #define TX4927_CONFIG_CCFG_WDRST BM_41_41
26759 #define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
26760 @@ -124,14 +124,14 @@
26761 #define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
26762 #define TX4927_CONFIG_CCFG_ARMODE BM_01_01
26763 #define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
26764 -#define TX4927_CONFIG_REVID 0xe308
26765 +#define TX4927_CONFIG_REVID 0xe008
26766 #define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
26767 #define TX4927_CONFIG_REVID_PCODE BM_16_31
26768 #define TX4927_CONFIG_REVID_MJERREV BM_12_15
26769 #define TX4927_CONFIG_REVID_MINEREV BM_08_11
26770 #define TX4927_CONFIG_REVID_MJREV BM_04_07
26771 #define TX4927_CONFIG_REVID_MINREV BM_00_03
26772 -#define TX4927_CONFIG_PCFG 0xe310
26773 +#define TX4927_CONFIG_PCFG 0xe010
26774 #define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
26775 #define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
26776 #define TX4927_CONFIG_PCFG_DRVCB BM_55_55
26777 @@ -197,10 +197,10 @@
26778 #define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
26779 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
26780 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
26781 -#define TX4927_CONFIG_TOEA 0xe318
26782 +#define TX4927_CONFIG_TOEA 0xe018
26783 #define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
26784 #define TX4927_CONFIG_TOEA_TOEA BM_00_35
26785 -#define TX4927_CONFIG_CLKCTR 0xe320
26786 +#define TX4927_CONFIG_CLKCTR 0xe020
26787 #define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
26788 #define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
26789 #define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
26790 @@ -223,7 +223,7 @@
26791 #define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
26792 #define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
26793 #define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
26794 -#define TX4927_CONFIG_GARBC 0xe330
26795 +#define TX4927_CONFIG_GARBC 0xe030
26796 #define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
26797 #define TX4927_CONFIG_GARBC_SET_09 BM_09_09
26798 #define TX4927_CONFIG_GARBC_ARBMD BM_08_08
26799 @@ -243,7 +243,7 @@
26800 #define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
26801 #define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
26802 #define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
26803 -#define TX4927_CONFIG_RAMP 0xe348
26804 +#define TX4927_CONFIG_RAMP 0xe048
26805 #define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
26806 #define TX4927_CONFIG_RAMP_RAMP BM_00_19
26807 #define TX4927_CONFIG_LIMIT 0xefff
26808 @@ -456,7 +456,7 @@
26809 #define TX4927_ACLC_ACINTSTS 0xf710
26810 #define TX4927_ACLC_ACINTMSTS 0xf714
26811 #define TX4927_ACLC_ACINTEN 0xf718
26812 -#define TX4927_ACLC_ACINTDIS 0xfR71c
26813 +#define TX4927_ACLC_ACINTDIS 0xf71c
26814 #define TX4927_ACLC_ACSEMAPH 0xf720
26815 #define TX4927_ACLC_ACGPIDAT 0xf740
26816 #define TX4927_ACLC_ACGPODAT 0xf744
26817 diff -Nur linux-2.4.32-rc1/include/asm-mips/unistd.h linux-2.4.32-rc1.mips/include/asm-mips/unistd.h
26818 --- linux-2.4.32-rc1/include/asm-mips/unistd.h 2005-01-19 15:10:12.000000000 +0100
26819 +++ linux-2.4.32-rc1.mips/include/asm-mips/unistd.h 2004-11-24 21:30:06.000000000 +0100
26820 @@ -760,7 +760,7 @@
26821 if (__a3 == 0) \
26822 return (type) __v0; \
26823 errno = __v0; \
26824 - return -1; \
26825 + return (type)-1; \
26826 }
26827
26828 /*
26829 @@ -788,7 +788,7 @@
26830 if (__a3 == 0) \
26831 return (type) __v0; \
26832 errno = __v0; \
26833 - return -1; \
26834 + return (type)-1; \
26835 }
26836
26837 #define _syscall2(type,name,atype,a,btype,b) \
26838 @@ -813,7 +813,7 @@
26839 if (__a3 == 0) \
26840 return (type) __v0; \
26841 errno = __v0; \
26842 - return -1; \
26843 + return (type)-1; \
26844 }
26845
26846 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
26847 @@ -839,7 +839,7 @@
26848 if (__a3 == 0) \
26849 return (type) __v0; \
26850 errno = __v0; \
26851 - return -1; \
26852 + return (type)-1; \
26853 }
26854
26855 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
26856 @@ -865,7 +865,7 @@
26857 if (__a3 == 0) \
26858 return (type) __v0; \
26859 errno = __v0; \
26860 - return -1; \
26861 + return (type)-1; \
26862 }
26863
26864 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
26865 @@ -902,7 +902,7 @@
26866 if (__a3 == 0) \
26867 return (type) __v0; \
26868 errno = __v0; \
26869 - return -1; \
26870 + return (type)-1; \
26871 }
26872
26873 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26874 @@ -935,7 +935,7 @@
26875 if (__a3 == 0) \
26876 return (type) __v0; \
26877 errno = __v0; \
26878 - return -1; \
26879 + return (type)-1; \
26880 }
26881
26882 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
26883 @@ -966,7 +966,7 @@
26884 if (__a3 == 0) \
26885 return (type) __v0; \
26886 errno = __v0; \
26887 - return -1; \
26888 + return (type)-1; \
26889 }
26890
26891 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26892 @@ -995,7 +995,7 @@
26893 if (__a3 == 0) \
26894 return (type) __v0; \
26895 errno = __v0; \
26896 - return -1; \
26897 + return (type)-1; \
26898 }
26899
26900 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
26901 diff -Nur linux-2.4.32-rc1/include/asm-mips64/checksum.h linux-2.4.32-rc1.mips/include/asm-mips64/checksum.h
26902 --- linux-2.4.32-rc1/include/asm-mips64/checksum.h 2005-01-19 15:10:12.000000000 +0100
26903 +++ linux-2.4.32-rc1.mips/include/asm-mips64/checksum.h 2005-09-20 12:58:50.000000000 +0200
26904 @@ -144,7 +144,7 @@
26905 "daddu\t%0, %4\n\t"
26906 "dsll32\t$1, %0, 0\n\t"
26907 "daddu\t%0, $1\n\t"
26908 - "dsrl32\t%0, %0, 0\n\t"
26909 + "dsra32\t%0, %0, 0\n\t"
26910 ".set\tat"
26911 : "=&r" (sum)
26912 : "0" (daddr), "r"(saddr),
26913 diff -Nur linux-2.4.32-rc1/include/asm-mips64/elf.h linux-2.4.32-rc1.mips/include/asm-mips64/elf.h
26914 --- linux-2.4.32-rc1/include/asm-mips64/elf.h 2004-02-18 14:36:32.000000000 +0100
26915 +++ linux-2.4.32-rc1.mips/include/asm-mips64/elf.h 2005-04-14 12:41:44.000000000 +0200
26916 @@ -64,9 +64,10 @@
26917 #define USE_ELF_CORE_DUMP
26918 #define ELF_EXEC_PAGESIZE PAGE_SIZE
26919
26920 -#define ELF_CORE_COPY_REGS(_dest,_regs) \
26921 - memcpy((char *) &_dest, (char *) _regs, \
26922 - sizeof(struct pt_regs));
26923 +extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
26924 +
26925 +#define ELF_CORE_COPY_REGS(elf_regs, regs) \
26926 + dump_regs((elf_greg_t *)&(elf_regs), regs);
26927
26928 /* This yields a mask that user programs can use to figure out what
26929 instruction set this cpu supports. This could be done in userspace,
26930 diff -Nur linux-2.4.32-rc1/include/asm-mips64/hazards.h linux-2.4.32-rc1.mips/include/asm-mips64/hazards.h
26931 --- linux-2.4.32-rc1/include/asm-mips64/hazards.h 2004-02-18 14:36:32.000000000 +0100
26932 +++ linux-2.4.32-rc1.mips/include/asm-mips64/hazards.h 2005-06-06 16:46:22.000000000 +0200
26933 @@ -3,7 +3,7 @@
26934 * License. See the file "COPYING" in the main directory of this archive
26935 * for more details.
26936 *
26937 - * Copyright (C) 2003 Ralf Baechle
26938 + * Copyright (C) 2003, 2004 Ralf Baechle
26939 */
26940 #ifndef _ASM_HAZARDS_H
26941 #define _ASM_HAZARDS_H
26942 @@ -12,37 +12,200 @@
26943
26944 #ifdef __ASSEMBLY__
26945
26946 + .macro _ssnop
26947 + sll $0, $0, 1
26948 + .endm
26949 +
26950 /*
26951 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
26952 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
26953 * for data translations should not occur for 3 cpu cycles.
26954 */
26955 #ifdef CONFIG_CPU_RM9000
26956 -#define rm9000_tlb_hazard \
26957 +
26958 +#define mtc0_tlbw_hazard \
26959 + .set push; \
26960 .set mips32; \
26961 - ssnop; ssnop; ssnop; ssnop; \
26962 - .set mips0
26963 + _ssnop; _ssnop; _ssnop; _ssnop; \
26964 + .set pop
26965 +
26966 +#define tlbw_eret_hazard \
26967 + .set push; \
26968 + .set mips32; \
26969 + _ssnop; _ssnop; _ssnop; _ssnop; \
26970 + .set pop
26971 +
26972 #else
26973 -#define rm9000_tlb_hazard
26974 +
26975 +/*
26976 + * The taken branch will result in a two cycle penalty for the two killed
26977 + * instructions on R4000 / R4400. Other processors only have a single cycle
26978 + * hazard so this is nice trick to have an optimal code for a range of
26979 + * processors.
26980 + */
26981 +#define mtc0_tlbw_hazard \
26982 + b . + 8
26983 +#define tlbw_eret_hazard \
26984 + nop
26985 #endif
26986
26987 +/*
26988 + * mtc0->mfc0 hazard
26989 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
26990 + * It is a MIPS32R2 processor so ehb will clear the hazard.
26991 + */
26992 +
26993 +#ifdef CONFIG_CPU_MIPSR2
26994 +/*
26995 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
26996 + */
26997 + .macro ehb
26998 + sll $0, $0, 3
26999 + .endm
27000 +
27001 +#define irq_enable_hazard \
27002 + ehb # irq_enable_hazard
27003 +
27004 +#define irq_disable_hazard \
27005 + ehb # irq_disable_hazard
27006 +
27007 +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
27008 +
27009 +/*
27010 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
27011 + */
27012 +
27013 +#define irq_enable_hazard
27014 +
27015 +#define irq_disable_hazard
27016 +
27017 #else
27018
27019 /*
27020 + * Classic MIPS needs 1 - 3 nops or ssnops
27021 + */
27022 +#define irq_enable_hazard
27023 +#define irq_disable_hazard \
27024 + _ssnop; _ssnop; _ssnop
27025 +
27026 +#endif
27027 +
27028 +#else /* __ASSEMBLY__ */
27029 +
27030 +/*
27031 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
27032 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
27033 * for data translations should not occur for 3 cpu cycles.
27034 */
27035 #ifdef CONFIG_CPU_RM9000
27036 -#define rm9000_tlb_hazard() \
27037 +
27038 +#define mtc0_tlbw_hazard() \
27039 + __asm__ __volatile__( \
27040 + ".set\tmips32\n\t" \
27041 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
27042 + ".set\tmips0")
27043 +
27044 +#define tlbw_use_hazard() \
27045 __asm__ __volatile__( \
27046 ".set\tmips32\n\t" \
27047 - "ssnop; ssnop; ssnop; ssnop\n\t" \
27048 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
27049 ".set\tmips0")
27050 #else
27051 -#define rm9000_tlb_hazard() do { } while (0)
27052 +
27053 +/*
27054 + * Overkill warning ...
27055 + */
27056 +#define mtc0_tlbw_hazard() \
27057 + __asm__ __volatile__( \
27058 + ".set noreorder\n\t" \
27059 + "nop; nop; nop; nop; nop; nop;\n\t" \
27060 + ".set reorder\n\t")
27061 +
27062 +#define tlbw_use_hazard() \
27063 + __asm__ __volatile__( \
27064 + ".set noreorder\n\t" \
27065 + "nop; nop; nop; nop; nop; nop;\n\t" \
27066 + ".set reorder\n\t")
27067 +
27068 #endif
27069
27070 +/*
27071 + * mtc0->mfc0 hazard
27072 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
27073 + * It is a MIPS32R2 processor so ehb will clear the hazard.
27074 + */
27075 +
27076 +#ifdef CONFIG_CPU_MIPSR2
27077 +/*
27078 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
27079 + */
27080 +__asm__(
27081 + " .macro ehb \n\t"
27082 + " sll $0, $0, 3 \n\t"
27083 + " .endm \n\t"
27084 + " \n\t"
27085 + " .macro\tirq_enable_hazard \n\t"
27086 + " ehb \n\t"
27087 + " .endm \n\t"
27088 + " \n\t"
27089 + " .macro\tirq_disable_hazard \n\t"
27090 + " ehb \n\t"
27091 + " .endm");
27092 +
27093 +#define irq_enable_hazard() \
27094 + __asm__ __volatile__( \
27095 + "ehb\t\t\t\t# irq_enable_hazard")
27096 +
27097 +#define irq_disable_hazard() \
27098 + __asm__ __volatile__( \
27099 + "ehb\t\t\t\t# irq_disable_hazard")
27100 +
27101 +#elif defined(CONFIG_CPU_R10000)
27102 +
27103 +/*
27104 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
27105 + */
27106 +
27107 +__asm__(
27108 + " .macro\tirq_enable_hazard \n\t"
27109 + " .endm \n\t"
27110 + " \n\t"
27111 + " .macro\tirq_disable_hazard \n\t"
27112 + " .endm");
27113 +
27114 +#define irq_enable_hazard() do { } while (0)
27115 +#define irq_disable_hazard() do { } while (0)
27116 +
27117 +#else
27118 +
27119 +/*
27120 + * Default for classic MIPS processors. Assume worst case hazards but don't
27121 + * care about the irq_enable_hazard - sooner or later the hardware will
27122 + * enable it and we don't care when exactly.
27123 + */
27124 +
27125 +__asm__(
27126 + " .macro _ssnop \n\t"
27127 + " sll $0, $2, 1 \n\t"
27128 + " .endm \n\t"
27129 + " \n\t"
27130 + " # \n\t"
27131 + " # There is a hazard but we do not care \n\t"
27132 + " # \n\t"
27133 + " .macro\tirq_enable_hazard \n\t"
27134 + " .endm \n\t"
27135 + " \n\t"
27136 + " .macro\tirq_disable_hazard \n\t"
27137 + " _ssnop; _ssnop; _ssnop \n\t"
27138 + " .endm");
27139 +
27140 +#define irq_enable_hazard() do { } while (0)
27141 +#define irq_disable_hazard() \
27142 + __asm__ __volatile__( \
27143 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
27144 +
27145 #endif
27146
27147 +#endif /* __ASSEMBLY__ */
27148 +
27149 #endif /* _ASM_HAZARDS_H */
27150 diff -Nur linux-2.4.32-rc1/include/asm-mips64/ide.h linux-2.4.32-rc1.mips/include/asm-mips64/ide.h
27151 --- linux-2.4.32-rc1/include/asm-mips64/ide.h 2003-08-25 13:44:44.000000000 +0200
27152 +++ linux-2.4.32-rc1.mips/include/asm-mips64/ide.h 2005-04-19 14:26:53.000000000 +0200
27153 @@ -32,12 +32,12 @@
27154
27155 extern struct ide_ops *ide_ops;
27156
27157 -static __inline__ int ide_default_irq(ide_ioreg_t base)
27158 +static inline int ide_default_irq(ide_ioreg_t base)
27159 {
27160 return ide_ops->ide_default_irq(base);
27161 }
27162
27163 -static __inline__ ide_ioreg_t ide_default_io_base(int index)
27164 +static inline ide_ioreg_t ide_default_io_base(int index)
27165 {
27166 return ide_ops->ide_default_io_base(index);
27167 }
27168 @@ -48,7 +48,7 @@
27169 ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
27170 }
27171
27172 -static __inline__ void ide_init_default_hwifs(void)
27173 +static inline void ide_init_default_hwifs(void)
27174 {
27175 #ifndef CONFIG_BLK_DEV_IDEPCI
27176 hw_regs_t hw;
27177 @@ -68,7 +68,89 @@
27178 #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
27179 #endif
27180
27181 -#include <asm-generic/ide_iops.h>
27182 +/* MIPS port and memory-mapped I/O string operations. */
27183 +
27184 +static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
27185 +{
27186 + if (cpu_has_dc_aliases) {
27187 + unsigned long end = addr + size;
27188 + for (; addr < end; addr += PAGE_SIZE)
27189 + flush_dcache_page(virt_to_page(addr));
27190 + }
27191 +}
27192 +
27193 +static inline void __ide_insw(unsigned long port, void *addr,
27194 + unsigned int count)
27195 +{
27196 + insw(port, addr, count);
27197 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
27198 +}
27199 +
27200 +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
27201 +{
27202 + insl(port, addr, count);
27203 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
27204 +}
27205 +
27206 +static inline void __ide_outsw(unsigned long port, const void *addr,
27207 + unsigned long count)
27208 +{
27209 + outsw(port, addr, count);
27210 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
27211 +}
27212 +
27213 +static inline void __ide_outsl(unsigned long port, const void *addr,
27214 + unsigned long count)
27215 +{
27216 + outsl(port, addr, count);
27217 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
27218 +}
27219 +
27220 +static inline void __ide_mm_insw(unsigned long port, void *addr, u32 count)
27221 +{
27222 + unsigned long start = (unsigned long) addr;
27223 +
27224 + while (count--) {
27225 + *(u16 *)addr = readw(port);
27226 + addr += 2;
27227 + }
27228 + __ide_flush_dcache_range(start, count * 2);
27229 +}
27230 +
27231 +static inline void __ide_mm_insl(unsigned long port, void *addr, u32 count)
27232 +{
27233 + unsigned long start = (unsigned long) addr;
27234 +
27235 + while (count--) {
27236 + *(u32 *)addr = readl(port);
27237 + addr += 4;
27238 + }
27239 + __ide_flush_dcache_range(start, count * 4);
27240 +}
27241 +
27242 +static inline void __ide_mm_outsw(unsigned long port, const void *addr,
27243 + u32 count)
27244 +{
27245 + unsigned long start = (unsigned long) addr;
27246 +
27247 + while (count--) {
27248 + writew(*(u16 *)addr, port);
27249 + addr += 2;
27250 + }
27251 + __ide_flush_dcache_range(start, count * 2);
27252 +}
27253 +
27254 +static inline void __ide_mm_outsl(unsigned long port, const void *addr,
27255 + u32 count)
27256 +{
27257 + unsigned long start = (unsigned long) addr;
27258 +
27259 + while (count--) {
27260 + writel(*(u32 *)addr, port);
27261 + addr += 4;
27262 + }
27263 + __ide_flush_dcache_range(start, count * 4);
27264 +}
27265
27266 #endif /* __KERNEL__ */
27267
27268 diff -Nur linux-2.4.32-rc1/include/asm-mips64/io.h linux-2.4.32-rc1.mips/include/asm-mips64/io.h
27269 --- linux-2.4.32-rc1/include/asm-mips64/io.h 2004-02-18 14:36:32.000000000 +0100
27270 +++ linux-2.4.32-rc1.mips/include/asm-mips64/io.h 2005-04-19 14:24:53.000000000 +0200
27271 @@ -414,7 +414,8 @@
27272 return __ioswab32(__val);
27273 }
27274
27275 -static inline void __outsb(unsigned long port, void *addr, unsigned int count)
27276 +static inline void __outsb(unsigned long port, const void *addr,
27277 + unsigned int count)
27278 {
27279 while (count--) {
27280 outb(*(u8 *)addr, port);
27281 @@ -430,7 +431,8 @@
27282 }
27283 }
27284
27285 -static inline void __outsw(unsigned long port, void *addr, unsigned int count)
27286 +static inline void __outsw(unsigned long port, const void *addr,
27287 + unsigned int count)
27288 {
27289 while (count--) {
27290 outw(*(u16 *)addr, port);
27291 @@ -446,7 +448,8 @@
27292 }
27293 }
27294
27295 -static inline void __outsl(unsigned long port, void *addr, unsigned int count)
27296 +static inline void __outsl(unsigned long port, const void *addr,
27297 + unsigned int count)
27298 {
27299 while (count--) {
27300 outl(*(u32 *)addr, port);
27301 diff -Nur linux-2.4.32-rc1/include/asm-mips64/mipsregs.h linux-2.4.32-rc1.mips/include/asm-mips64/mipsregs.h
27302 --- linux-2.4.32-rc1/include/asm-mips64/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
27303 +++ linux-2.4.32-rc1.mips/include/asm-mips64/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
27304 @@ -757,10 +757,18 @@
27305 #define read_c0_config1() __read_32bit_c0_register($16, 1)
27306 #define read_c0_config2() __read_32bit_c0_register($16, 2)
27307 #define read_c0_config3() __read_32bit_c0_register($16, 3)
27308 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
27309 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
27310 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
27311 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
27312 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
27313 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
27314 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
27315 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
27316 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
27317 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
27318 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
27319 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
27320
27321 /*
27322 * The WatchLo register. There may be upto 8 of them.
27323 @@ -856,42 +864,34 @@
27324 */
27325 static inline void tlb_probe(void)
27326 {
27327 - rm9000_tlb_hazard();
27328 __asm__ __volatile__(
27329 ".set noreorder\n\t"
27330 "tlbp\n\t"
27331 ".set reorder");
27332 - rm9000_tlb_hazard();
27333 }
27334
27335 static inline void tlb_read(void)
27336 {
27337 - rm9000_tlb_hazard();
27338 __asm__ __volatile__(
27339 ".set noreorder\n\t"
27340 "tlbr\n\t"
27341 ".set reorder");
27342 - rm9000_tlb_hazard();
27343 }
27344
27345 static inline void tlb_write_indexed(void)
27346 {
27347 - rm9000_tlb_hazard();
27348 __asm__ __volatile__(
27349 ".set noreorder\n\t"
27350 "tlbwi\n\t"
27351 ".set reorder");
27352 - rm9000_tlb_hazard();
27353 }
27354
27355 static inline void tlb_write_random(void)
27356 {
27357 - rm9000_tlb_hazard();
27358 __asm__ __volatile__(
27359 ".set noreorder\n\t"
27360 "tlbwr\n\t"
27361 ".set reorder");
27362 - rm9000_tlb_hazard();
27363 }
27364
27365 /*
27366 diff -Nur linux-2.4.32-rc1/include/asm-mips64/reg.h linux-2.4.32-rc1.mips/include/asm-mips64/reg.h
27367 --- linux-2.4.32-rc1/include/asm-mips64/reg.h 2003-08-25 13:44:44.000000000 +0200
27368 +++ linux-2.4.32-rc1.mips/include/asm-mips64/reg.h 2005-04-14 12:41:44.000000000 +0200
27369 @@ -46,6 +46,9 @@
27370 /*
27371 * k0/k1 unsaved
27372 */
27373 +#define EF_REG26 26
27374 +#define EF_REG27 27
27375 +
27376 #define EF_REG28 28
27377 #define EF_REG29 29
27378 #define EF_REG30 30
27379 diff -Nur linux-2.4.32-rc1/include/asm-mips64/sgi/hpc3.h linux-2.4.32-rc1.mips/include/asm-mips64/sgi/hpc3.h
27380 --- linux-2.4.32-rc1/include/asm-mips64/sgi/hpc3.h 2003-08-25 13:44:44.000000000 +0200
27381 +++ linux-2.4.32-rc1.mips/include/asm-mips64/sgi/hpc3.h 2005-09-23 16:35:27.000000000 +0200
27382 @@ -128,26 +128,26 @@
27383 volatile u32 rx_gfptr; /* current GIO fifo ptr */
27384 volatile u32 rx_dfptr; /* current device fifo ptr */
27385 u32 _unused1; /* padding */
27386 - volatile u32 rx_reset; /* reset register */
27387 -#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
27388 -#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
27389 -#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
27390 -
27391 - volatile u32 rx_dconfig; /* DMA configuration register */
27392 -#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
27393 -#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
27394 -#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
27395 -#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
27396 -#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
27397 -#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
27398 -#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
27399 -#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
27400 -
27401 - volatile u32 rx_pconfig; /* PIO configuration register */
27402 -#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
27403 -#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
27404 -#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
27405 -#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
27406 + volatile u32 reset; /* reset register */
27407 +#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */
27408 +#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */
27409 +#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
27410 +
27411 + volatile u32 dconfig; /* DMA configuration register */
27412 +#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
27413 +#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
27414 +#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
27415 +#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
27416 +#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
27417 +#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
27418 +#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
27419 +#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */
27420 +
27421 + volatile u32 pconfig; /* PIO configuration register */
27422 +#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
27423 +#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
27424 +#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
27425 +#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
27426
27427 u32 _unused2[0x1000/4 - 8]; /* padding */
27428
27429 @@ -221,7 +221,7 @@
27430 #define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
27431
27432 u32 _unused1[0x14000/4 - 5]; /* padding */
27433 -
27434 +
27435 /* Now direct PIO per-HPC3 peripheral access to external regs. */
27436 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
27437 u32 _unused2[0x7c00/4];
27438 @@ -304,7 +304,7 @@
27439 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
27440 };
27441
27442 -/*
27443 +/*
27444 * It is possible to have two HPC3's within the address space on
27445 * one machine, though only having one is more likely on an Indy.
27446 */
27447 diff -Nur linux-2.4.32-rc1/include/asm-mips64/sn/nmi.h linux-2.4.32-rc1.mips/include/asm-mips64/sn/nmi.h
27448 --- linux-2.4.32-rc1/include/asm-mips64/sn/nmi.h 2002-11-29 00:53:15.000000000 +0100
27449 +++ linux-2.4.32-rc1.mips/include/asm-mips64/sn/nmi.h 2002-08-06 01:53:40.000000000 +0200
27450 @@ -8,7 +8,7 @@
27451 #ifndef __ASM_SN_NMI_H
27452 #define __ASM_SN_NMI_H
27453
27454 -#ident "$Revision: 1.2.4.2 $"
27455 +#ident "$Revision: 1.2.4.1 $"
27456
27457 #include <asm/sn/addrs.h>
27458
27459 diff -Nur linux-2.4.32-rc1/include/asm-mips64/unistd.h linux-2.4.32-rc1.mips/include/asm-mips64/unistd.h
27460 --- linux-2.4.32-rc1/include/asm-mips64/unistd.h 2005-01-19 15:10:12.000000000 +0100
27461 +++ linux-2.4.32-rc1.mips/include/asm-mips64/unistd.h 2004-11-24 21:30:06.000000000 +0100
27462 @@ -760,7 +760,7 @@
27463 if (__a3 == 0) \
27464 return (type) __v0; \
27465 errno = __v0; \
27466 - return -1; \
27467 + return (type)-1; \
27468 }
27469
27470 /*
27471 @@ -788,7 +788,7 @@
27472 if (__a3 == 0) \
27473 return (type) __v0; \
27474 errno = __v0; \
27475 - return -1; \
27476 + return (type)-1; \
27477 }
27478
27479 #define _syscall2(type,name,atype,a,btype,b) \
27480 @@ -813,7 +813,7 @@
27481 if (__a3 == 0) \
27482 return (type) __v0; \
27483 errno = __v0; \
27484 - return -1; \
27485 + return (type)-1; \
27486 }
27487
27488 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
27489 @@ -839,7 +839,7 @@
27490 if (__a3 == 0) \
27491 return (type) __v0; \
27492 errno = __v0; \
27493 - return -1; \
27494 + return (type)-1; \
27495 }
27496
27497 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
27498 @@ -865,7 +865,7 @@
27499 if (__a3 == 0) \
27500 return (type) __v0; \
27501 errno = __v0; \
27502 - return -1; \
27503 + return (type)-1; \
27504 }
27505
27506 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
27507 @@ -902,7 +902,7 @@
27508 if (__a3 == 0) \
27509 return (type) __v0; \
27510 errno = __v0; \
27511 - return -1; \
27512 + return (type)-1; \
27513 }
27514
27515 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27516 @@ -935,7 +935,7 @@
27517 if (__a3 == 0) \
27518 return (type) __v0; \
27519 errno = __v0; \
27520 - return -1; \
27521 + return (type)-1; \
27522 }
27523
27524 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
27525 @@ -966,7 +966,7 @@
27526 if (__a3 == 0) \
27527 return (type) __v0; \
27528 errno = __v0; \
27529 - return -1; \
27530 + return (type)-1; \
27531 }
27532
27533 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27534 @@ -995,7 +995,7 @@
27535 if (__a3 == 0) \
27536 return (type) __v0; \
27537 errno = __v0; \
27538 - return -1; \
27539 + return (type)-1; \
27540 }
27541
27542 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
27543 diff -Nur linux-2.4.32-rc1/include/asm-ppc/param.h linux-2.4.32-rc1.mips/include/asm-ppc/param.h
27544 --- linux-2.4.32-rc1/include/asm-ppc/param.h 2003-06-13 16:51:38.000000000 +0200
27545 +++ linux-2.4.32-rc1.mips/include/asm-ppc/param.h 2003-07-05 05:23:46.000000000 +0200
27546 @@ -3,6 +3,9 @@
27547
27548 #ifndef HZ
27549 #define HZ 100
27550 +#ifdef __KERNEL__
27551 +#define hz_to_std(a) (a)
27552 +#endif
27553 #endif
27554
27555 #define EXEC_PAGESIZE 4096
27556 diff -Nur linux-2.4.32-rc1/include/asm-s390/param.h linux-2.4.32-rc1.mips/include/asm-s390/param.h
27557 --- linux-2.4.32-rc1/include/asm-s390/param.h 2001-02-13 23:13:44.000000000 +0100
27558 +++ linux-2.4.32-rc1.mips/include/asm-s390/param.h 2001-03-09 21:34:48.000000000 +0100
27559 @@ -11,6 +11,9 @@
27560
27561 #ifndef HZ
27562 #define HZ 100
27563 +#ifdef __KERNEL__
27564 +#define hz_to_std(a) (a)
27565 +#endif
27566 #endif
27567
27568 #define EXEC_PAGESIZE 4096
27569 diff -Nur linux-2.4.32-rc1/include/asm-sh/param.h linux-2.4.32-rc1.mips/include/asm-sh/param.h
27570 --- linux-2.4.32-rc1/include/asm-sh/param.h 2001-01-04 22:19:13.000000000 +0100
27571 +++ linux-2.4.32-rc1.mips/include/asm-sh/param.h 2001-01-11 05:02:45.000000000 +0100
27572 @@ -3,6 +3,9 @@
27573
27574 #ifndef HZ
27575 #define HZ 100
27576 +#ifdef __KERNEL__
27577 +#define hz_to_std(a) (a)
27578 +#endif
27579 #endif
27580
27581 #define EXEC_PAGESIZE 4096
27582 diff -Nur linux-2.4.32-rc1/include/asm-sparc/param.h linux-2.4.32-rc1.mips/include/asm-sparc/param.h
27583 --- linux-2.4.32-rc1/include/asm-sparc/param.h 2000-10-30 23:34:12.000000000 +0100
27584 +++ linux-2.4.32-rc1.mips/include/asm-sparc/param.h 2000-11-23 03:00:56.000000000 +0100
27585 @@ -4,6 +4,9 @@
27586
27587 #ifndef HZ
27588 #define HZ 100
27589 +#ifdef __KERNEL__
27590 +#define hz_to_std(a) (a)
27591 +#endif
27592 #endif
27593
27594 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
27595 diff -Nur linux-2.4.32-rc1/include/asm-sparc64/param.h linux-2.4.32-rc1.mips/include/asm-sparc64/param.h
27596 --- linux-2.4.32-rc1/include/asm-sparc64/param.h 2000-10-30 23:34:12.000000000 +0100
27597 +++ linux-2.4.32-rc1.mips/include/asm-sparc64/param.h 2000-11-23 03:00:56.000000000 +0100
27598 @@ -4,6 +4,9 @@
27599
27600 #ifndef HZ
27601 #define HZ 100
27602 +#ifdef __KERNEL__
27603 +#define hz_to_std(a) (a)
27604 +#endif
27605 #endif
27606
27607 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
27608 diff -Nur linux-2.4.32-rc1/include/linux/i2c-algo-au1550.h linux-2.4.32-rc1.mips/include/linux/i2c-algo-au1550.h
27609 --- linux-2.4.32-rc1/include/linux/i2c-algo-au1550.h 1970-01-01 01:00:00.000000000 +0100
27610 +++ linux-2.4.32-rc1.mips/include/linux/i2c-algo-au1550.h 2004-07-07 02:38:02.000000000 +0200
27611 @@ -0,0 +1,31 @@
27612 +/*
27613 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
27614 + *
27615 + * This program is free software; you can redistribute it and/or modify
27616 + * it under the terms of the GNU General Public License as published by
27617 + * the Free Software Foundation; either version 2 of the License, or
27618 + * (at your option) any later version.
27619 + *
27620 + * This program is distributed in the hope that it will be useful,
27621 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
27622 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27623 + * GNU General Public License for more details.
27624 + *
27625 + * You should have received a copy of the GNU General Public License
27626 + * along with this program; if not, write to the Free Software
27627 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27628 + */
27629 +
27630 +#ifndef I2C_ALGO_AU1550_H
27631 +#define I2C_ALGO_AU1550_H 1
27632 +
27633 +struct i2c_algo_au1550_data {
27634 + u32 psc_base;
27635 + int xfer_timeout;
27636 + int ack_timeout;
27637 +};
27638 +
27639 +int i2c_au1550_add_bus(struct i2c_adapter *);
27640 +int i2c_au1550_del_bus(struct i2c_adapter *);
27641 +
27642 +#endif /* I2C_ALGO_AU1550_H */
27643 diff -Nur linux-2.4.32-rc1/include/linux/i2c-id.h linux-2.4.32-rc1.mips/include/linux/i2c-id.h
27644 --- linux-2.4.32-rc1/include/linux/i2c-id.h 2004-02-18 14:36:32.000000000 +0100
27645 +++ linux-2.4.32-rc1.mips/include/linux/i2c-id.h 2004-07-07 02:38:02.000000000 +0200
27646 @@ -156,6 +156,8 @@
27647
27648 #define I2C_ALGO_SGI 0x130000 /* SGI algorithm */
27649
27650 +#define I2C_ALGO_AU1550 0x140000 /* Alchemy Au1550 PSC */
27651 +
27652 #define I2C_ALGO_EXP 0x800000 /* experimental */
27653
27654 #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
27655 @@ -204,6 +206,9 @@
27656 #define I2C_HW_SGI_VINO 0x00
27657 #define I2C_HW_SGI_MACE 0x01
27658
27659 +/* --- Au1550 PSC adapters */
27660 +#define I2C_HW_AU1550_PSC 0x00
27661 +
27662 /* --- SMBus only adapters */
27663 #define I2C_HW_SMBUS_PIIX4 0x00
27664 #define I2C_HW_SMBUS_ALI15X3 0x01
27665 diff -Nur linux-2.4.32-rc1/include/linux/sched.h linux-2.4.32-rc1.mips/include/linux/sched.h
27666 --- linux-2.4.32-rc1/include/linux/sched.h 2005-01-19 15:10:12.000000000 +0100
27667 +++ linux-2.4.32-rc1.mips/include/linux/sched.h 2004-11-29 18:47:18.000000000 +0100
27668 @@ -617,6 +617,10 @@
27669 extern int in_group_p(gid_t);
27670 extern int in_egroup_p(gid_t);
27671
27672 +extern ATTRIB_NORET void cpu_idle(void);
27673 +
27674 +extern void release_task(struct task_struct * p);
27675 +
27676 extern void proc_caches_init(void);
27677 extern void flush_signals(struct task_struct *);
27678 extern void flush_signal_handlers(struct task_struct *);
27679 diff -Nur linux-2.4.32-rc1/include/linux/serial.h linux-2.4.32-rc1.mips/include/linux/serial.h
27680 --- linux-2.4.32-rc1/include/linux/serial.h 2002-08-03 02:39:45.000000000 +0200
27681 +++ linux-2.4.32-rc1.mips/include/linux/serial.h 2004-07-31 02:17:57.000000000 +0200
27682 @@ -75,7 +75,8 @@
27683 #define PORT_16654 11
27684 #define PORT_16850 12
27685 #define PORT_RSA 13 /* RSA-DV II/S card */
27686 -#define PORT_MAX 13
27687 +#define PORT_SB1250 14
27688 +#define PORT_MAX 14
27689
27690 #define SERIAL_IO_PORT 0
27691 #define SERIAL_IO_HUB6 1
27692 diff -Nur linux-2.4.32-rc1/include/linux/swap.h linux-2.4.32-rc1.mips/include/linux/swap.h
27693 --- linux-2.4.32-rc1/include/linux/swap.h 2005-01-19 15:10:12.000000000 +0100
27694 +++ linux-2.4.32-rc1.mips/include/linux/swap.h 2004-11-29 18:47:18.000000000 +0100
27695 @@ -1,6 +1,12 @@
27696 #ifndef _LINUX_SWAP_H
27697 #define _LINUX_SWAP_H
27698
27699 +#include <linux/config.h>
27700 +
27701 +#define MAX_SWAPFILES 32
27702 +
27703 +#ifdef __KERNEL__
27704 +
27705 #include <linux/spinlock.h>
27706 #include <asm/page.h>
27707
27708 @@ -8,8 +14,6 @@
27709 #define SWAP_FLAG_PRIO_MASK 0x7fff
27710 #define SWAP_FLAG_PRIO_SHIFT 0
27711
27712 -#define MAX_SWAPFILES 32
27713 -
27714 /*
27715 * Magic header for a swap area. The first part of the union is
27716 * what the swap magic looks like for the old (limited to 128MB)
27717 @@ -39,8 +43,6 @@
27718 } info;
27719 };
27720
27721 -#ifdef __KERNEL__
27722 -
27723 /*
27724 * Max bad pages in the new format..
27725 */
27726 diff -Nur linux-2.4.32-rc1/include/video/newport.h linux-2.4.32-rc1.mips/include/video/newport.h
27727 --- linux-2.4.32-rc1/include/video/newport.h 2001-04-12 21:20:31.000000000 +0200
27728 +++ linux-2.4.32-rc1.mips/include/video/newport.h 2004-09-23 15:32:29.000000000 +0200
27729 @@ -291,8 +291,6 @@
27730 unsigned int _unused2[0x1ef];
27731 struct newport_cregs cgo;
27732 };
27733 -extern struct newport_regs *npregs;
27734 -
27735
27736 typedef struct {
27737 unsigned int drawmode1;
27738 @@ -450,38 +448,26 @@
27739
27740 /* Miscellaneous NEWPORT routines. */
27741 #define BUSY_TIMEOUT 100000
27742 -static __inline__ int newport_wait(void)
27743 +static __inline__ int newport_wait(struct newport_regs *regs)
27744 {
27745 - int i = 0;
27746 + int t = BUSY_TIMEOUT;
27747
27748 - while(i < BUSY_TIMEOUT)
27749 - if(!(npregs->cset.status & NPORT_STAT_GBUSY))
27750 + while (t--)
27751 + if (!(regs->cset.status & NPORT_STAT_GBUSY))
27752 break;
27753 - if(i == BUSY_TIMEOUT)
27754 - return 1;
27755 - return 0;
27756 + return !t;
27757 }
27758
27759 -static __inline__ int newport_bfwait(void)
27760 +static __inline__ int newport_bfwait(struct newport_regs *regs)
27761 {
27762 - int i = 0;
27763 + int t = BUSY_TIMEOUT;
27764
27765 - while(i < BUSY_TIMEOUT)
27766 - if(!(npregs->cset.status & NPORT_STAT_BBUSY))
27767 + while (t--)
27768 + if(!(regs->cset.status & NPORT_STAT_BBUSY))
27769 break;
27770 - if(i == BUSY_TIMEOUT)
27771 - return 1;
27772 - return 0;
27773 + return !t;
27774 }
27775
27776 -/* newport.c and cons_newport.c routines */
27777 -extern struct graphics_ops *newport_probe (int, const char **);
27778 -
27779 -void newport_save (void *);
27780 -void newport_restore (void *);
27781 -void newport_reset (void);
27782 -int newport_ioctl (int card, int cmd, unsigned long arg);
27783 -
27784 /*
27785 * DCBMODE register defines:
27786 */
27787 @@ -564,7 +550,7 @@
27788 {
27789 rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
27790 DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
27791 - newport_bfwait ();
27792 + newport_bfwait (rex);
27793
27794 while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
27795 ;
27796 diff -Nur linux-2.4.32-rc1/init/main.c linux-2.4.32-rc1.mips/init/main.c
27797 --- linux-2.4.32-rc1/init/main.c 2004-11-17 12:54:22.000000000 +0100
27798 +++ linux-2.4.32-rc1.mips/init/main.c 2004-11-19 01:28:52.000000000 +0100
27799 @@ -296,7 +296,6 @@
27800
27801
27802 extern void setup_arch(char **);
27803 -extern void cpu_idle(void);
27804
27805 unsigned long wait_init_idle;
27806
27807 diff -Nur linux-2.4.32-rc1/kernel/exit.c linux-2.4.32-rc1.mips/kernel/exit.c
27808 --- linux-2.4.32-rc1/kernel/exit.c 2002-11-29 00:53:15.000000000 +0100
27809 +++ linux-2.4.32-rc1.mips/kernel/exit.c 2003-01-11 18:53:18.000000000 +0100
27810 @@ -26,7 +26,7 @@
27811
27812 int getrusage(struct task_struct *, int, struct rusage *);
27813
27814 -static void release_task(struct task_struct * p)
27815 +void release_task(struct task_struct * p)
27816 {
27817 if (p != current) {
27818 #ifdef CONFIG_SMP
27819 diff -Nur linux-2.4.32-rc1/kernel/signal.c linux-2.4.32-rc1.mips/kernel/signal.c
27820 --- linux-2.4.32-rc1/kernel/signal.c 2004-02-18 14:36:32.000000000 +0100
27821 +++ linux-2.4.32-rc1.mips/kernel/signal.c 2004-01-20 16:10:34.000000000 +0100
27822 @@ -14,6 +14,7 @@
27823 #include <linux/init.h>
27824 #include <linux/sched.h>
27825
27826 +#include <asm/param.h>
27827 #include <asm/uaccess.h>
27828
27829 /*
27830 @@ -28,6 +29,14 @@
27831 #define SIG_SLAB_DEBUG 0
27832 #endif
27833
27834 +#define DEBUG_SIG 0
27835 +
27836 +#if DEBUG_SIG
27837 +#define SIG_SLAB_DEBUG (SLAB_DEBUG_FREE | SLAB_RED_ZONE /* | SLAB_POISON */)
27838 +#else
27839 +#define SIG_SLAB_DEBUG 0
27840 +#endif
27841 +
27842 static kmem_cache_t *sigqueue_cachep;
27843
27844 atomic_t nr_queued_signals;
27845 @@ -270,6 +279,11 @@
27846 signal_pending(current));
27847 #endif
27848
27849 +#if DEBUG_SIG
27850 +printk("SIG dequeue (%s:%d): %d ", current->comm, current->pid,
27851 + signal_pending(current));
27852 +#endif
27853 +
27854 sig = next_signal(current, mask);
27855 if (sig) {
27856 if (current->notifier) {
27857 @@ -293,6 +307,10 @@
27858 printk(" %d -> %d\n", signal_pending(current), sig);
27859 #endif
27860
27861 +#if DEBUG_SIG
27862 +printk(" %d -> %d\n", signal_pending(current), sig);
27863 +#endif
27864 +
27865 return sig;
27866 }
27867
27868 @@ -540,6 +558,11 @@
27869 printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
27870 #endif
27871
27872 +
27873 +#if DEBUG_SIG
27874 +printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
27875 +#endif
27876 +
27877 ret = -EINVAL;
27878 if (sig < 0 || sig > _NSIG)
27879 goto out_nolock;
27880 @@ -778,8 +801,8 @@
27881 info.si_uid = tsk->uid;
27882
27883 /* FIXME: find out whether or not this is supposed to be c*time. */
27884 - info.si_utime = tsk->times.tms_utime;
27885 - info.si_stime = tsk->times.tms_stime;
27886 + info.si_utime = hz_to_std(tsk->times.tms_utime);
27887 + info.si_stime = hz_to_std(tsk->times.tms_stime);
27888
27889 status = tsk->exit_code & 0x7f;
27890 why = SI_KERNEL; /* shouldn't happen */
27891 diff -Nur linux-2.4.32-rc1/kernel/sys.c linux-2.4.32-rc1.mips/kernel/sys.c
27892 --- linux-2.4.32-rc1/kernel/sys.c 2003-11-28 19:26:21.000000000 +0100
27893 +++ linux-2.4.32-rc1.mips/kernel/sys.c 2003-11-17 02:07:47.000000000 +0100
27894 @@ -801,16 +801,23 @@
27895
27896 asmlinkage long sys_times(struct tms * tbuf)
27897 {
27898 + struct tms temp;
27899 +
27900 /*
27901 * In the SMP world we might just be unlucky and have one of
27902 * the times increment as we use it. Since the value is an
27903 * atomically safe type this is just fine. Conceptually its
27904 * as if the syscall took an instant longer to occur.
27905 */
27906 - if (tbuf)
27907 - if (copy_to_user(tbuf, &current->times, sizeof(struct tms)))
27908 + if (tbuf) {
27909 + temp.tms_utime = hz_to_std(current->times.tms_utime);
27910 + temp.tms_stime = hz_to_std(current->times.tms_stime);
27911 + temp.tms_cutime = hz_to_std(current->times.tms_cutime);
27912 + temp.tms_cstime = hz_to_std(current->times.tms_cstime);
27913 + if (copy_to_user(tbuf, &temp, sizeof(struct tms)))
27914 return -EFAULT;
27915 - return jiffies;
27916 + }
27917 + return hz_to_std(jiffies);
27918 }
27919
27920 /*
27921 diff -Nur linux-2.4.32-rc1/lib/Makefile linux-2.4.32-rc1.mips/lib/Makefile
27922 --- linux-2.4.32-rc1/lib/Makefile 2004-04-14 15:05:40.000000000 +0200
27923 +++ linux-2.4.32-rc1.mips/lib/Makefile 2004-04-16 05:14:21.000000000 +0200
27924 @@ -27,6 +27,7 @@
27925 subdir-$(CONFIG_ZLIB_INFLATE) += zlib_inflate
27926 subdir-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate
27927
27928 +-include $(TOPDIR)/arch/$(ARCH)/Makefile.lib
27929 include $(TOPDIR)/drivers/net/Makefile.lib
27930 include $(TOPDIR)/drivers/usb/Makefile.lib
27931 include $(TOPDIR)/drivers/bluetooth/Makefile.lib
27932 diff -Nur linux-2.4.32-rc1/Makefile linux-2.4.32-rc1.mips/Makefile
27933 --- linux-2.4.32-rc1/Makefile 2005-10-24 11:33:30.000000000 +0200
27934 +++ linux-2.4.32-rc1.mips/Makefile 2005-09-23 22:41:15.000000000 +0200
27935 @@ -5,7 +5,7 @@
27936
27937 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
27938
27939 -ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
27940 +ARCH = mips
27941 KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
27942
27943 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
27944 @@ -462,10 +462,11 @@
27945 $(MAKE) -C Documentation/DocBook mrproper
27946
27947 distclean: mrproper
27948 - rm -f core `find . \( -not -type d \) -and \
27949 - \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
27950 - -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
27951 - -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
27952 + find . \( -not -type d \) -and \
27953 + \( -name core -o -name '*.orig' -o -name '*.rej' \
27954 + -o -name '*~' -o -name '*.bak' -o -name '#*#' \
27955 + -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \
27956 + -o -name TAGS -o -name tags \) -print | env -i xargs rm -f
27957
27958 backup: mrproper
27959 cd .. && tar cf - linux/ | gzip -9 > backup.gz
27960 @@ -492,7 +493,7 @@
27961 $(MAKE) -C Documentation/DocBook man
27962
27963 sums:
27964 - find . -type f -print | sort | xargs sum > .SUMS
27965 + find . -type f -print | sort | env -i xargs sum > .SUMS
27966
27967 dep-files: scripts/mkdep archdep include/linux/version.h
27968 rm -f .depend .hdepend
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