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[openwrt.git] / target / linux / ubicom32 / files / drivers / serial / ubi32_mailbox.c
1 /*
2 * drivers/serial/ubi32_mailbox.c
3 * Ubicom32 On-Chip Mailbox Driver
4 *
5 * (C) Copyright 2009, Ubicom, Inc.
6 *
7 * This file is part of the Ubicom32 Linux Kernel Port.
8 *
9 * The Ubicom32 Linux Kernel Port is free software: you can redistribute
10 * it and/or modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation, either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * The Ubicom32 Linux Kernel Port is distributed in the hope that it
15 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
16 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
17 * the GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with the Ubicom32 Linux Kernel Port. If not,
21 * see <http://www.gnu.org/licenses/>.
22 *
23 * Ubicom32 implementation derived from (with many thanks):
24 * arch/m68knommu
25 * arch/blackfin
26 * arch/parisc
27 */
28 #include <linux/module.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/platform_device.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/serial_core.h>
37 #include <linux/version.h>
38
39 #include <asm/ip5000.h>
40
41 #define SERIAL_UBICOM_BAUDRATE 115200
42 #define SERIAL_UBICOM_DATA_BIT 8 /* Fixed parameter - do not change */
43 #define SERIAL_UBICOM_PAR_BIT 0 /* Fixed parameter - do not change */
44 #define SERIAL_UBICOM_STOP_BIT 1 /* Fixed parameter - do not change */
45
46 /* UART name and device definitions */
47 #define UBI32_MAILBOX_NAME "ttyUM" // XXX
48 #define UBI32_MAILBOX_MAJOR 207 // XXX
49 #define UBI32_MAILBOX_MINOR 64
50
51 #define PORT_UBI32_MAILBOX 1235
52 #define NR_PORTS 1
53
54 #define get_sclk() 0
55
56 struct ubi32_mailbox_port {
57 struct uart_port port;
58 /*
59 * NOTE (rkeller):
60 * the uart port is wrapped in another structure in case we need to hold more state than
61 * what we can hold in the uart_port.
62 * Not sure if we need this, I took over the concept from the blackfin driver.
63 */
64 } ubi32_mailbox_ports[NR_PORTS];
65
66 struct ubi32_mailbox_resource {
67 int uart_base_addr;
68 int uart_irq;
69 } ubi32_mailbox_resource[NR_PORTS] = {
70 /*
71 * uart_base_addr has to be non-NULL because it is put in the uart_port membase.
72 * If membase if null the kernel skips the configuration and our port_type never gets set.
73 */
74 {ISD_MAILBOX_BASE, ISD_MAILBOX_INT}
75 };
76
77 static volatile struct ubicom32_isd_mailbox {
78 volatile u32_t in;
79 volatile u32_t out;
80 volatile u32_t status;
81 } *ubi32_mailbox = (struct ubicom32_isd_mailbox *)ISD_MAILBOX_BASE;
82
83 static void ubi32_mailbox_tx_chars(struct ubi32_mailbox_port *uart);
84
85 static void ubi32_mailbox_mctrl_check(struct ubi32_mailbox_port *uart);
86
87 #define TRUE 1
88 #define FALSE 0
89
90 static int mailbox_console_flg = TRUE;
91 static int num_timeouts = 0;
92
93 /*
94 * dummy functions and defined to be able to compile the Blackfin code
95 */
96 #define UART_GET_LSR(port) (1)
97 #define UART_PUT_LSR(port, bits)
98 #define UART_CLEAR_LSR(port) (1)
99 #define TEMT 1
100 #define TFI 1
101 #define BI 1
102 #define PE 1
103 #define OE 1
104 #define FE 1
105 #define THRE 1
106 #define DR 1
107 #define UART_GET_LCR(port) (1)
108 #define UART_PUT_LCR(port, bits)
109 #define SB 1
110 #define STB 1
111 #define PEN 1
112 #define EPS 1
113 #define STP 1
114 #define WLS(n) 0
115 #define UART_GET_IER(port) (1)
116 #define UART_SET_IER(port, bits)
117 #define UART_CLEAR_IER(port, bits)
118 #define ETBEI 0
119 #define ERBFI 0
120 #define UART_GET_CHAR(port) ubi32_mailbox_get_char()
121 #define UART_PUT_CHAR(port, ch) ubi32_mailbox_put_char(ch)
122 #define SSYNC()
123 #define UART_GET_DLL(port) 0
124 #define UART_PUT_DLL(port, ch)
125 #define UART_GET_DLH(port) 0
126 #define UART_PUT_DLH(port, ch)
127 #define UART_GET_GCTL(port) (0)
128 #define UART_PUT_GCTL(port, ch)
129 #define UCEN 1
130
131 /*
132 * ubi32_mailbox_get_char_avail()
133 */
134 static int ubi32_mailbox_get_char_avail(void)
135 {
136 return !(ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY);
137 }
138
139 /*
140 * ubi32_mailbox_get_char()
141 */
142 static u32_t ubi32_mailbox_get_char(void)
143 {
144 if (mailbox_console_flg == TRUE) {
145 /*
146 * Mailbox console is connected.
147 */
148 while (ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY);
149 return ubi32_mailbox->in & 0xff;
150 }
151
152 /*
153 * Mailbox console was not connected.
154 */
155 if (ubi32_mailbox->status & ISD_MAILBOX_STATUS_IN_EMPTY) {
156 return 0xff;
157 }
158
159 /*
160 * Mailbox console is connecting.
161 */
162 mailbox_console_flg = TRUE;
163 num_timeouts = 0;
164 return ubi32_mailbox->in & 0xff;
165 }
166
167 #define MAILBOX_MAX_ATTEMPTS 1000000
168 #define MAILBOX_MAX_TIMEOUTS 5
169 /*
170 * ubi32_mailbox_put_char()
171 */
172 static void ubi32_mailbox_put_char(u32_t v)
173 {
174 /*
175 * Wait to be able to output.
176 */
177 u32_t num_attempts = 0;
178
179 if(mailbox_console_flg == TRUE) {
180 while(num_attempts++ < MAILBOX_MAX_ATTEMPTS) {
181 if(ubi32_mailbox->status & ISD_MAILBOX_STATUS_OUT_EMPTY) {
182 break;
183 }
184 }
185
186 /*
187 * If timed out more than 5 times on send, mailbox console is disconnected now.
188 */
189 if (num_attempts > MAILBOX_MAX_ATTEMPTS) {
190 if (num_timeouts++ > MAILBOX_MAX_TIMEOUTS) {
191 mailbox_console_flg = FALSE;
192 }
193 }
194 }
195
196 asm volatile(
197 "pipe_flush 0 \n\t"
198 "pipe_flush 0 \n\t"
199 "pipe_flush 0 \n\t"
200 "pipe_flush 0 \n\t"
201 "pipe_flush 0 \n\t"
202 "pipe_flush 0 \n\t"
203 "pipe_flush 0 \n\t"
204 );
205
206 ubi32_mailbox->out = v & 0xff;
207 }
208
209 static void ubi32_mailbox_hw_init(struct ubi32_mailbox_port *uart)
210 {
211 // NOTE: It does not do any good to do these here because we are running on the linux hardware thread,
212 // and these have to be called on the ldsr thread.
213 // ubicom32_clear_interrupt(ISD_MAILBOX_INT);
214 // ubicom32_enable_interrupt(ISD_MAILBOX_INT);
215 }
216
217 /*
218 * interrupts are disabled on entry
219 */
220 static void ubi32_mailbox_stop_tx(struct uart_port *port)
221 {
222 // struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
223 // struct circ_buf *xmit = &uart->port.info->xmit;
224
225 while (!(UART_GET_LSR(uart) & TEMT))
226 cpu_relax();
227
228 /* Clear TFI bit */
229 UART_PUT_LSR(uart, TFI);
230 UART_CLEAR_IER(uart, ETBEI);
231 }
232
233 /*
234 * port is locked and interrupts are disabled
235 */
236 static void ubi32_mailbox_start_tx(struct uart_port *port)
237 {
238 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
239
240 UART_SET_IER(uart, ETBEI);
241
242 ubi32_mailbox_tx_chars(uart);
243 }
244
245 /*
246 * Interrupts are enabled
247 */
248 static void ubi32_mailbox_stop_rx(struct uart_port *port)
249 {
250 // struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
251 UART_CLEAR_IER(uart, ERBFI);
252 }
253
254 /*
255 * Set the modem control timer to fire immediately.
256 */
257 static void ubi32_mailbox_enable_ms(struct uart_port *port)
258 {
259 }
260
261 static void ubi32_mailbox_rx_chars(struct ubi32_mailbox_port *uart)
262 {
263 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
264 struct uart_state *state = uart->port.state;
265 struct tty_struct *tty = state->port.tty;
266 #else
267 struct uart_info *info = uart->port.info;
268 struct tty_struct *tty = info->port.tty;
269 #endif
270 unsigned int status, ch, flg;
271
272 status = 0; // XXX? UART_GET_LSR(uart);
273 UART_CLEAR_LSR(uart);
274
275 ch = UART_GET_CHAR(uart);
276
277 if(ch == 0xff)
278 return;
279
280 uart->port.icount.rx++;
281
282 if (status & BI) {
283 uart->port.icount.brk++;
284 if (uart_handle_break(&uart->port))
285 goto ignore_char;
286 status &= ~(PE | FE);
287 }
288 if (status & PE)
289 uart->port.icount.parity++;
290 if (status & OE)
291 uart->port.icount.overrun++;
292 if (status & FE)
293 uart->port.icount.frame++;
294
295 status &= uart->port.read_status_mask;
296
297 if (status & BI)
298 flg = TTY_BREAK;
299 else if (status & PE)
300 flg = TTY_PARITY;
301 else if (status & FE)
302 flg = TTY_FRAME;
303 else
304 flg = TTY_NORMAL;
305
306 if (uart_handle_sysrq_char(&uart->port, ch))
307 goto ignore_char;
308
309 uart_insert_char(&uart->port, status, OE, ch, flg);
310
311 ignore_char:
312 tty_flip_buffer_push(tty);
313 }
314
315 static void ubi32_mailbox_tx_chars(struct ubi32_mailbox_port *uart)
316 {
317 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
318 struct circ_buf *xmit = &uart->port.state->xmit;
319 #else
320 struct circ_buf *xmit = &uart->port.info->xmit;
321 #endif
322
323 if (uart->port.x_char) {
324 UART_PUT_CHAR(uart, uart->port.x_char);
325 uart->port.icount.tx++;
326 uart->port.x_char = 0;
327 }
328 /*
329 * Check the modem control lines before
330 * transmitting anything.
331 */
332 ubi32_mailbox_mctrl_check(uart);
333
334 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
335 ubi32_mailbox_stop_tx(&uart->port);
336 return;
337 }
338
339 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
340 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
341 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
342 uart->port.icount.tx++;
343 SSYNC();
344 }
345
346 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
347 uart_write_wakeup(&uart->port);
348
349 if (uart_circ_empty(xmit))
350 ubi32_mailbox_stop_tx(&uart->port);
351 }
352
353 static irqreturn_t ubi32_mailbox_isr(int irq, void *dev_id)
354 {
355 struct ubi32_mailbox_port *uart = dev_id;
356
357 spin_lock(&uart->port.lock);
358
359 //XXX?while (UART_GET_LSR(uart) & DR)
360
361 /*
362 * RX process
363 */
364 while (ubi32_mailbox_get_char_avail()) {
365 ubi32_mailbox_rx_chars(uart);
366 }
367
368 #if 0
369 /*
370 * TX process
371 */
372 if (this_uart.tx_in == this_uart.tx_out) {
373 UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_mask &= ~IO_PORTX_INT_SERDES_TXBE;
374 } else if (UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_status & IO_PORTX_INT_SERDES_TXBE) {
375 uart_ubicom32_send(this_uart.tx_buf[this_uart.tx_out & (SERIAL_UBICOM_BUF_SIZE - 1)]);
376 this_uart.tx_out++;
377 UBICOM32_IO_PORT(SERIAL_UBICOM_PORT)->int_mask |= IO_PORTX_INT_SERDES_TXBE;
378 }
379 #endif
380
381 spin_unlock(&uart->port.lock);
382
383 return IRQ_HANDLED;
384 }
385 #if 0
386 static irqreturn_t ubi32_mailbox_tx_int(int irq, void *dev_id)
387 {
388 struct ubi32_mailbox_port *uart = dev_id;
389
390 spin_lock(&uart->port.lock);
391 if (UART_GET_LSR(uart) & THRE)
392 ubi32_mailbox_tx_chars(uart);
393 spin_unlock(&uart->port.lock);
394
395 return IRQ_HANDLED;
396 }
397 #endif
398
399 /*
400 * Return TIOCSER_TEMT when transmitter is not busy.
401 */
402 static unsigned int ubi32_mailbox_tx_empty(struct uart_port *port)
403 {
404 // struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
405 unsigned short lsr;
406
407 lsr = UART_GET_LSR(uart);
408 if (lsr & TEMT)
409 return TIOCSER_TEMT;
410 else
411 return 0;
412 }
413
414 static unsigned int ubi32_mailbox_get_mctrl(struct uart_port *port)
415 {
416 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
417 }
418
419 static void ubi32_mailbox_set_mctrl(struct uart_port *port, unsigned int mctrl)
420 {
421 }
422
423 /*
424 * Handle any change of modem status signal since we were last called.
425 */
426 static void ubi32_mailbox_mctrl_check(struct ubi32_mailbox_port *uart)
427 {
428 }
429
430 /*
431 * Interrupts are always disabled.
432 */
433 static void ubi32_mailbox_break_ctl(struct uart_port *port, int break_state)
434 {
435 // struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
436 u16 lcr = UART_GET_LCR(uart);
437 if (break_state)
438 lcr |= SB;
439 else
440 lcr &= ~SB;
441 UART_PUT_LCR(uart, lcr);
442 SSYNC();
443 }
444
445 static int ubi32_mailbox_startup(struct uart_port *port)
446 {
447 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
448
449 if (request_irq(uart->port.irq, ubi32_mailbox_isr, IRQF_DISABLED,
450 "UBI32_MAILBOX", uart)) {
451 printk(KERN_NOTICE "Unable to attach Ubicom32 SERDES interrupt\n");
452 return -EBUSY;
453 }
454
455 UART_SET_IER(uart, ERBFI);
456 return 0;
457 }
458
459 static void ubi32_mailbox_shutdown(struct uart_port *port)
460 {
461 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
462
463 free_irq(uart->port.irq, uart);
464 }
465
466 static void
467 ubi32_mailbox_set_termios(struct uart_port *port, struct ktermios *termios,
468 struct ktermios *old)
469 {
470 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
471 unsigned long flags;
472 unsigned int baud, quot;
473 unsigned short val, ier, lsr, lcr = 0;
474
475 switch (termios->c_cflag & CSIZE) {
476 case CS8:
477 lcr = WLS(8);
478 break;
479 case CS7:
480 lcr = WLS(7);
481 break;
482 case CS6:
483 lcr = WLS(6);
484 break;
485 case CS5:
486 lcr = WLS(5);
487 break;
488 default:
489 printk(KERN_ERR "%s: word lengh not supported\n",
490 __FUNCTION__);
491 }
492
493 if (termios->c_cflag & CSTOPB)
494 lcr |= STB;
495 if (termios->c_cflag & PARENB)
496 lcr |= PEN;
497 if (!(termios->c_cflag & PARODD))
498 lcr |= EPS;
499 if (termios->c_cflag & CMSPAR)
500 lcr |= STP;
501
502 port->read_status_mask = OE;
503 if (termios->c_iflag & INPCK)
504 port->read_status_mask |= (FE | PE);
505 if (termios->c_iflag & (BRKINT | PARMRK))
506 port->read_status_mask |= BI;
507
508 /*
509 * Characters to ignore
510 */
511 port->ignore_status_mask = 0;
512 if (termios->c_iflag & IGNPAR)
513 port->ignore_status_mask |= FE | PE;
514 if (termios->c_iflag & IGNBRK) {
515 port->ignore_status_mask |= BI;
516 /*
517 * If we're ignoring parity and break indicators,
518 * ignore overruns too (for real raw support).
519 */
520 if (termios->c_iflag & IGNPAR)
521 port->ignore_status_mask |= OE;
522 }
523
524 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
525 quot = uart_get_divisor(port, baud);
526 spin_lock_irqsave(&uart->port.lock, flags);
527
528 do {
529 lsr = UART_GET_LSR(uart);
530 } while (!(lsr & TEMT));
531
532 /* Disable UART */
533 ier = UART_GET_IER(uart);
534 UART_CLEAR_IER(uart, 0xF);
535
536 UART_PUT_DLL(uart, quot & 0xFF);
537 SSYNC();
538 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
539 SSYNC();
540
541 UART_PUT_LCR(uart, lcr);
542
543 /* Enable UART */
544 UART_SET_IER(uart, ier);
545
546 val = UART_GET_GCTL(uart);
547 val |= UCEN;
548 UART_PUT_GCTL(uart, val);
549
550 spin_unlock_irqrestore(&uart->port.lock, flags);
551 }
552
553 static const char *ubi32_mailbox_type(struct uart_port *port)
554 {
555 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
556
557 return uart->port.type == PORT_UBI32_MAILBOX ? "UBI32_MAILBOX" : NULL;
558 }
559
560 /*
561 * Release the memory region(s) being used by 'port'.
562 */
563 static void ubi32_mailbox_release_port(struct uart_port *port)
564 {
565 }
566
567 /*
568 * Request the memory region(s) being used by 'port'.
569 */
570 static int ubi32_mailbox_request_port(struct uart_port *port)
571 {
572 return 0;
573 }
574
575 /*
576 * Configure/autoconfigure the port.
577 */
578 static void ubi32_mailbox_config_port(struct uart_port *port, int flags)
579 {
580 struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
581
582 if (flags & UART_CONFIG_TYPE && ubi32_mailbox_request_port(&uart->port) == 0)
583 uart->port.type = PORT_UBI32_MAILBOX;
584 }
585
586 /*
587 * Verify the new serial_struct (for TIOCSSERIAL).
588 * The only change we allow are to the flags and type, and
589 * even then only between PORT_UBI32_MAILBOX and PORT_UNKNOWN
590 */
591 static int
592 ubi32_mailbox_verify_port(struct uart_port *port, struct serial_struct *ser)
593 {
594 return 0;
595 }
596
597 static struct uart_ops ubi32_mailbox_pops = {
598 .tx_empty = ubi32_mailbox_tx_empty,
599 .set_mctrl = ubi32_mailbox_set_mctrl,
600 .get_mctrl = ubi32_mailbox_get_mctrl,
601 .stop_tx = ubi32_mailbox_stop_tx,
602 .start_tx = ubi32_mailbox_start_tx,
603 .stop_rx = ubi32_mailbox_stop_rx,
604 .enable_ms = ubi32_mailbox_enable_ms,
605 .break_ctl = ubi32_mailbox_break_ctl,
606 .startup = ubi32_mailbox_startup,
607 .shutdown = ubi32_mailbox_shutdown,
608 .set_termios = ubi32_mailbox_set_termios,
609 .type = ubi32_mailbox_type,
610 .release_port = ubi32_mailbox_release_port,
611 .request_port = ubi32_mailbox_request_port,
612 .config_port = ubi32_mailbox_config_port,
613 .verify_port = ubi32_mailbox_verify_port,
614 };
615
616 static void __init ubi32_mailbox_init_ports(void)
617 {
618 static int first = 1;
619 int i;
620
621 if (!first)
622 return;
623 first = 0;
624
625 for (i = 0; i < NR_PORTS; i++) {
626 ubi32_mailbox_ports[i].port.uartclk = get_sclk();
627 ubi32_mailbox_ports[i].port.ops = &ubi32_mailbox_pops;
628 ubi32_mailbox_ports[i].port.line = i;
629 ubi32_mailbox_ports[i].port.iotype = UPIO_MEM;
630 ubi32_mailbox_ports[i].port.membase =
631 (void __iomem *)ubi32_mailbox_resource[i].uart_base_addr;
632 ubi32_mailbox_ports[i].port.mapbase =
633 ubi32_mailbox_resource[i].uart_base_addr;
634 ubi32_mailbox_ports[i].port.irq =
635 ubi32_mailbox_resource[i].uart_irq;
636 ubi32_mailbox_ports[i].port.flags = UPF_BOOT_AUTOCONF;
637 spin_lock_init(&ubi32_mailbox_ports[i].port.lock);
638
639 ubi32_mailbox_hw_init(&ubi32_mailbox_ports[i]);
640 }
641
642 }
643
644 #ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
645 /*
646 * If the port was already initialised (eg, by a boot loader),
647 * try to determine the current setup.
648 */
649 static void __init
650 ubi32_mailbox_console_get_options(struct ubi32_mailbox_port *uart, int *baud,
651 int *parity, int *bits)
652 {
653 unsigned short status;
654
655 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
656 if (status == (ERBFI | ETBEI)) {
657 /* ok, the port was enabled */
658 unsigned short lcr;
659 unsigned short dlh, dll;
660
661 lcr = UART_GET_LCR(uart);
662
663 *parity = 'n';
664 if (lcr & PEN) {
665 if (lcr & EPS)
666 *parity = 'e';
667 else
668 *parity = 'o';
669 }
670 switch (lcr & 0x03) {
671 case 0: *bits = 5; break;
672 case 1: *bits = 6; break;
673 case 2: *bits = 7; break;
674 case 3: *bits = 8; break;
675 }
676
677 dll = UART_GET_DLL(uart);
678 dlh = UART_GET_DLH(uart);
679
680 *baud = get_sclk() / (16*(dll | dlh << 8));
681 }
682 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
683 }
684 #endif
685
686 #if defined(CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
687 static struct uart_driver ubi32_mailbox_reg;
688
689 static int __init
690 ubi32_mailbox_console_setup(struct console *co, char *options)
691 {
692 struct ubi32_mailbox_port *uart;
693 # ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
694 int baud = SERIAL_UBICOM_BAUDRATE;
695 int bits = 8;
696 int parity = 'n';
697 int flow = 'n';
698 # endif
699
700 /*
701 * Check whether an invalid uart number has been specified, and
702 * if so, search for the first available port that does have
703 * console support.
704 */
705 if (co->index == -1 || co->index >= NR_PORTS)
706 co->index = 0;
707 uart = &ubi32_mailbox_ports[co->index];
708
709 # ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
710 if (options)
711 uart_parse_options(options, &baud, &parity, &bits, &flow);
712 else
713 ubi32_mailbox_console_get_options(uart, &baud, &parity, &bits);
714
715 //JB return uart_set_options(&uart->port, co, baud, parity, bits, flow);
716 return 0;
717 # else
718 return 0;
719 # endif
720 }
721 #endif /* defined (CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE) ||
722 defined (CONFIG_EARLY_PRINTK) */
723
724 #ifdef CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE
725 static void ubi32_mailbox_console_putchar(struct uart_port *port, int ch)
726 {
727 // struct ubi32_mailbox_port *uart = (struct ubi32_mailbox_port *)port;
728 while (!(UART_GET_LSR(uart) & THRE))
729 barrier();
730 UART_PUT_CHAR(uart, ch);
731 SSYNC();
732 }
733
734 /*
735 * Interrupts are disabled on entering
736 */
737 static void
738 ubi32_mailbox_console_write(struct console *co, const char *s, unsigned int count)
739 {
740 struct ubi32_mailbox_port *uart = &ubi32_mailbox_ports[co->index];
741 unsigned long flags = 0;
742
743 spin_lock_irqsave(&uart->port.lock, flags);
744 uart_console_write(&uart->port, s, count, ubi32_mailbox_console_putchar);
745 spin_unlock_irqrestore(&uart->port.lock, flags);
746
747 }
748
749 static struct console ubi32_mailbox_console = {
750 .name = UBI32_MAILBOX_NAME,
751 .write = ubi32_mailbox_console_write,
752 .device = uart_console_device,
753 .setup = ubi32_mailbox_console_setup,
754 .flags = CON_PRINTBUFFER,
755 .index = -1,
756 .data = &ubi32_mailbox_reg,
757 };
758
759 static int __init ubi32_mailbox_console_init(void)
760 {
761 ubi32_mailbox_init_ports();
762 register_console(&ubi32_mailbox_console);
763 return 0;
764 }
765 console_initcall(ubi32_mailbox_console_init);
766
767 #define UBI32_MAILBOX_CONSOLE &ubi32_mailbox_console
768 #else
769 #define UBI32_MAILBOX_CONSOLE NULL
770 #endif /* CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE */
771
772
773 #ifdef CONFIG_EARLY_PRINTK
774 static __init void ubi32_mailbox_early_putc(struct uart_port *port, int ch)
775 {
776 UART_PUT_CHAR(uart, ch);
777 }
778
779 static __init void ubi32_mailbox_early_write(struct console *con, const char *s,
780 unsigned int n)
781 {
782 struct ubi32_mailbox_port *uart = &ubi32_mailbox_ports[con->index];
783 unsigned int i;
784
785 for (i = 0; i < n; i++, s++) {
786 if (*s == '\n')
787 ubi32_mailbox_early_putc(&uart->port, '\r');
788 ubi32_mailbox_early_putc(&uart->port, *s);
789 }
790 }
791
792 static struct __init console ubi32_mailbox_early_console = {
793 .name = "early_UM",
794 .write = ubi32_mailbox_early_write,
795 .device = uart_console_device,
796 .flags = CON_PRINTBUFFER,
797 .setup = ubi32_mailbox_console_setup,
798 .index = -1,
799 .data = &ubi32_mailbox_reg,
800 };
801
802 /*
803 * XXX Unused in our driver. Need to find out what the termios initialization is good/needed for.
804 */
805 struct console __init *ubi32_mailbox_early_init(unsigned int port,
806 unsigned int cflag)
807 {
808 struct ubi32_mailbox_port *uart;
809 struct ktermios t;
810
811 if (port == -1 || port >= NR_PORTS)
812 port = 0;
813 ubi32_mailbox_init_ports();
814 ubi32_mailbox_early_console.index = port;
815 uart = &ubi32_mailbox_ports[port];
816 t.c_cflag = cflag;
817 t.c_iflag = 0;
818 t.c_oflag = 0;
819 t.c_lflag = ICANON;
820 t.c_line = port;
821 ubi32_mailbox_set_termios(&uart->port, &t, &t);
822 return &ubi32_mailbox_early_console;
823 }
824
825 #endif /* CONFIG_SERIAL_UBI32_MAILBOX_CONSOLE */
826
827 static struct uart_driver ubi32_mailbox_reg = {
828 .owner = THIS_MODULE,
829 .driver_name = "ubi32_mailbox",
830 .dev_name = UBI32_MAILBOX_NAME,
831 .major = UBI32_MAILBOX_MAJOR,
832 .minor = UBI32_MAILBOX_MINOR,
833 .nr = NR_PORTS,
834 .cons = UBI32_MAILBOX_CONSOLE,
835 };
836
837 static int ubi32_mailbox_suspend(struct platform_device *dev, pm_message_t state)
838 {
839 struct ubi32_mailbox_port *uart = platform_get_drvdata(dev);
840
841 if (uart)
842 uart_suspend_port(&ubi32_mailbox_reg, &uart->port);
843
844 return 0;
845 }
846
847 static int ubi32_mailbox_resume(struct platform_device *dev)
848 {
849 struct ubi32_mailbox_port *uart = platform_get_drvdata(dev);
850
851 if (uart)
852 uart_resume_port(&ubi32_mailbox_reg, &uart->port);
853
854 return 0;
855 }
856
857 static int ubi32_mailbox_probe(struct platform_device *dev)
858 {
859 struct resource *res = dev->resource;
860 int i;
861
862 for (i = 0; i < dev->num_resources; i++, res++)
863 if (res->flags & IORESOURCE_MEM)
864 break;
865
866 if (i < dev->num_resources) {
867 for (i = 0; i < NR_PORTS; i++, res++) {
868 if (ubi32_mailbox_ports[i].port.mapbase != res->start)
869 continue;
870 ubi32_mailbox_ports[i].port.dev = &dev->dev;
871 uart_add_one_port(&ubi32_mailbox_reg, &ubi32_mailbox_ports[i].port);
872 platform_set_drvdata(dev, &ubi32_mailbox_ports[i]);
873 }
874 }
875
876 return 0;
877 }
878
879 static int ubi32_mailbox_remove(struct platform_device *pdev)
880 {
881 struct ubi32_mailbox_port *uart = platform_get_drvdata(pdev);
882
883 platform_set_drvdata(pdev, NULL);
884
885 if (uart)
886 uart_remove_one_port(&ubi32_mailbox_reg, &uart->port);
887
888 return 0;
889 }
890
891 static struct platform_driver ubi32_mailbox_driver = {
892 .probe = ubi32_mailbox_probe,
893 .remove = ubi32_mailbox_remove,
894 .suspend = ubi32_mailbox_suspend,
895 .resume = ubi32_mailbox_resume,
896 .driver = {
897 .name = "ubi32-mbox",
898 .owner = THIS_MODULE,
899 },
900 };
901
902 static int __init ubi32_mailbox_init(void)
903 {
904 int ret;
905
906 pr_info("Serial: Ubicom32 mailbox serial driver.\n");
907
908 mailbox_console_flg = TRUE;
909 num_timeouts = 0;
910 ubi32_mailbox_init_ports();
911
912 ret = uart_register_driver(&ubi32_mailbox_reg);
913 if (ret == 0) {
914 ret = platform_driver_register(&ubi32_mailbox_driver);
915 if (ret) {
916 pr_debug("uart register failed\n");
917 uart_unregister_driver(&ubi32_mailbox_reg);
918 }
919 }
920
921 /*
922 * XXX HACK: currently probe does not get called, but the port needs to be added to work.
923 */
924 uart_add_one_port(&ubi32_mailbox_reg, &ubi32_mailbox_ports[0].port);
925 return ret;
926 }
927
928 static void __exit ubi32_mailbox_exit(void)
929 {
930 platform_driver_unregister(&ubi32_mailbox_driver);
931 uart_unregister_driver(&ubi32_mailbox_reg);
932 }
933
934 module_init(ubi32_mailbox_init);
935 module_exit(ubi32_mailbox_exit);
936
937 MODULE_ALIAS_CHARDEV_MAJOR(UBI32_MAILBOX_MAJOR);
938 MODULE_ALIAS("platform:ubi32_mailbox");
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