target/linux/lantiq/patches/210-nor.patch

   1 --- a/drivers/mtd/maps/Kconfig
   2 +++ b/drivers/mtd/maps/Kconfig
   3 @@ -251,6 +251,12 @@
   4         help
   5           Support for flash chips on NETtel/SecureEdge/SnapGear boards.
   6
   7 +config MTD_LANTIQ
   8 +       bool "Lantiq SoC NOR support"
   9 +       depends on LANTIQ && MTD_PARTITIONS
  10 +       help
  11 +         Support for NOR flsh chips on Lantiq SoC
  12 +
  13  config MTD_DILNETPC
  14         tristate "CFI Flash device mapped on DIL/Net PC"
  15         depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
  16 --- a/drivers/mtd/maps/Makefile
  17 +++ b/drivers/mtd/maps/Makefile
  18 @@ -59,3 +59,4 @@
  19  obj-$(CONFIG_MTD_RBTX4939)     += rbtx4939-flash.o
  20  obj-$(CONFIG_MTD_VMU)          += vmu-flash.o
  21  obj-$(CONFIG_MTD_GPIO_ADDR)    += gpio-addr-flash.o
  22 +obj-$(CONFIG_MTD_LANTIQ)  += lantiq.o
  23 --- /dev/null
  24 +++ b/drivers/mtd/maps/lantiq.c
  25 @@ -0,0 +1,169 @@
  26 +/*
  27 + *  This program is free software; you can redistribute it and/or modify it
  28 + *  under the terms of the GNU General Public License version 2 as published
  29 + *  by the Free Software Foundation.
  30 + *
  31 + *  Copyright (C) 2004 Liu Peng Infineon IFAP DC COM CPE
  32 + *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  33 + */
  34 +
  35 +#include <linux/module.h>
  36 +#include <linux/types.h>
  37 +#include <linux/kernel.h>
  38 +#include <linux/io.h>
  39 +#include <linux/init.h>
  40 +#include <linux/mtd/mtd.h>
  41 +#include <linux/mtd/map.h>
  42 +#include <linux/mtd/partitions.h>
  43 +#include <linux/mtd/cfi.h>
  44 +#include <linux/magic.h>
  45 +#include <linux/platform_device.h>
  46 +#include <linux/mtd/physmap.h>
  47 +
  48 +#include <lantiq.h>
  49 +#include <lantiq_platform.h>
  50 +
  51 +static map_word
  52 +lq_read16(struct map_info *map, unsigned long adr)
  53 +{
  54 +       unsigned long flags;
  55 +       map_word temp;
  56 +       spin_lock_irqsave(&ebu_lock, flags);
  57 +       adr ^= 2;
  58 +       temp.x[0] = *((__u16 *)(map->virt + adr));
  59 +       spin_unlock_irqrestore(&ebu_lock, flags);
  60 +       return temp;
  61 +}
  62 +
  63 +static void
  64 +lq_write16(struct map_info *map, map_word d, unsigned long adr)
  65 +{
  66 +       unsigned long flags;
  67 +       spin_lock_irqsave(&ebu_lock, flags);
  68 +       adr ^= 2;
  69 +       *((__u16 *)(map->virt + adr)) = d.x[0];
  70 +       spin_unlock_irqrestore(&ebu_lock, flags);
  71 +}
  72 +
  73 +void
  74 +lq_copy_from(struct map_info *map, void *to,
  75 +       unsigned long from, ssize_t len)
  76 +{
  77 +       unsigned char *p;
  78 +       unsigned char *to_8;
  79 +       unsigned long flags;
  80 +       spin_lock_irqsave(&ebu_lock, flags);
  81 +       from = (unsigned long)(from + map->virt);
  82 +       p = (unsigned char *) from;
  83 +       to_8 = (unsigned char *) to;
  84 +       while (len--)
  85 +               *to_8++ = *p++;
  86 +       spin_unlock_irqrestore(&ebu_lock, flags);
  87 +}
  88 +
  89 +void
  90 +lq_copy_to(struct map_info *map, unsigned long to,
  91 +       const void *from, ssize_t len)
  92 +{
  93 +       unsigned char *p =  (unsigned char *)from;
  94 +       unsigned char *to_8;
  95 +       unsigned long flags;
  96 +       spin_lock_irqsave(&ebu_lock, flags);
  97 +       to += (unsigned long) map->virt;
  98 +       to_8 = (unsigned char *)to;
  99 +       while (len--)
 100 +               *p++ = *to_8++;
 101 +       spin_unlock_irqrestore(&ebu_lock, flags);
 102 +}
 103 +
 104 +static const char *part_probe_types[] = { "cmdlinepart", NULL };
 105 +
 106 +static struct map_info lq_map = {
 107 +       .name = "lq_nor",
 108 +       .bankwidth = 2,
 109 +       .read = lq_read16,
 110 +       .write = lq_write16,
 111 +       .copy_from = lq_copy_from,
 112 +       .copy_to = lq_copy_to,
 113 +};
 114 +
 115 +static int
 116 +lq_mtd_probe(struct platform_device *pdev)
 117 +{
 118 +       struct physmap_flash_data *lq_mtd_data =
 119 +               (struct physmap_flash_data*) dev_get_platdata(&pdev->dev);
 120 +       struct mtd_info *lq_mtd = NULL;
 121 +       struct mtd_partition *parts = NULL;
 122 +       struct resource *res = 0;
 123 +       int nr_parts = 0;
 124 +
 125 +#ifdef CONFIG_SOC_LANTIQ_XWAY
 126 +       lq_w32(lq_r32(LQ_EBU_BUSCON0) & ~EBU_WRDIS, LQ_EBU_BUSCON0);
 127 +#endif
 128 +
 129 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 130 +       if(!res)
 131 +       {
 132 +               dev_err(&pdev->dev, "failed to get memory resource");
 133 +               return -ENOENT;
 134 +       }
 135 +       res = request_mem_region(res->start, resource_size(res),
 136 +               dev_name(&pdev->dev));
 137 +       if(!res)
 138 +       {
 139 +               dev_err(&pdev->dev, "failed to request mem resource");
 140 +               return -EBUSY;
 141 +       }
 142 +
 143 +       lq_map.phys = res->start;
 144 +       lq_map.size = resource_size(res);
 145 +       lq_map.virt = ioremap_nocache(lq_map.phys, lq_map.size);
 146 +
 147 +       if (!lq_map.virt ) {
 148 +               dev_err(&pdev->dev, "failed to ioremap!\n");
 149 +               return -EIO;
 150 +       }
 151 +
 152 +       lq_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &lq_map);
 153 +       if (!lq_mtd) {
 154 +               iounmap(lq_map.virt);
 155 +               dev_err(&pdev->dev, "probing failed\n");
 156 +               return -ENXIO;
 157 +       }
 158 +
 159 +       lq_mtd->owner = THIS_MODULE;
 160 +
 161 +       nr_parts = parse_mtd_partitions(lq_mtd, part_probe_types, &parts, 0);
 162 +       if (nr_parts > 0) {
 163 +               dev_info(&pdev->dev, "using %d partitions from cmdline", nr_parts);
 164 +       } else {
 165 +               nr_parts = lq_mtd_data->nr_parts;
 166 +               parts = lq_mtd_data->parts;
 167 +       }
 168 +
 169 +       add_mtd_partitions(lq_mtd, parts, nr_parts);
 170 +       return 0;
 171 +}
 172 +
 173 +static struct platform_driver lq_mtd_driver = {
 174 +       .probe = lq_mtd_probe,
 175 +       .driver = {
 176 +               .name = "lq_nor",
 177 +               .owner = THIS_MODULE,
 178 +       },
 179 +};
 180 +
 181 +int __init
 182 +init_lq_mtd(void)
 183 +{
 184 +       int ret = platform_driver_register(&lq_mtd_driver);
 185 +       if (ret)
 186 +               printk(KERN_INFO "lq_nor: error registering platfom driver");
 187 +       return ret;
 188 +}
 189 +
 190 +module_init(init_lq_mtd);
 191 +
 192 +MODULE_LICENSE("GPL");
 193 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 194 +MODULE_DESCRIPTION("Lantiq SoC NOR");
 195 --- a/drivers/mtd/chips/cfi_cmdset_0001.c
 196 +++ b/drivers/mtd/chips/cfi_cmdset_0001.c
 197 @@ -41,7 +41,11 @@
 198  /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
 199
 200  // debugging, turns off buffer write mode if set to 1
 201 -#define FORCE_WORD_WRITE 0
 202 +#ifdef CONFIG_LANTIQ
 203 +#  define FORCE_WORD_WRITE 1
 204 +#else
 205 +#  define FORCE_WORD_WRITE 0
 206 +#endif
 207
 208  /* Intel chips */
 209  #define I82802AB       0x00ad
 210 @@ -1491,6 +1495,9 @@
 211         int ret=0;
 212
 213         adr += chip->start;
 214 +#ifdef CONFIG_LANTIQ
 215 +       adr ^= 2;
 216 +#endif
 217
 218         switch (mode) {
 219         case FL_WRITING:
 220 --- a/drivers/mtd/chips/cfi_cmdset_0002.c
 221 +++ b/drivers/mtd/chips/cfi_cmdset_0002.c
 222 @@ -40,7 +40,11 @@
 223  #include <linux/mtd/xip.h>
 224
 225  #define AMD_BOOTLOC_BUG
 226 -#define FORCE_WORD_WRITE 0
 227 +#ifdef CONFIG_LANTIQ
 228 +#  define FORCE_WORD_WRITE 1
 229 +#else
 230 +#  define FORCE_WORD_WRITE 0
 231 +#endif
 232
 233  #define MAX_WORD_RETRIES 3
 234
 235 @@ -1156,6 +1160,10 @@
 236
 237         adr += chip->start;
 238
 239 +#ifdef CONFIG_LANTIQ
 240 +       adr ^= 2;
 241 +#endif
 242 +
 243         mutex_lock(&chip->mutex);
 244         ret = get_chip(map, chip, adr, FL_WRITING);
 245         if (ret) {