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add ixp4xx 2.6.25 patchset
[openwrt.git] / target / linux / ixp4xx / patches-2.6.25 / 030-ixp4xx_fsg_board_support.patch
1 From: Rod Whitby <rod@whitby.id.au>
2 Subject: [PATCH] ixp4xx: Add support for the Freecom FSG-3 board (Patch #4874)
3
4 The Freecom-FSG3 is a small network-attached-storage device with the
5 following feature set:
6
7 * Intel IXP422
8 * 4MB Flash (ixp4xx flash driver)
9 * 64MB RAM
10 * 4 USB 2.0 host ports (ehci and ohci drivers)
11 * 1 WAN (eth1) and 3 LAN (eth0) ethernet ports
12 * Supported by the open source ixp4xx ethernet driver
13 * Via VT6421 disk controller (libata and sata-via drivers)
14 * Internal hard disk (PATA supported, SATA not yet supported)
15 * External SATA port (not yet supported)
16 * ISL1208 RTC chip
17 * Winbond 83782 temp sensor and fan controller
18 * MiniPCI slot
19
20 The ixp4xx_defconfig is also updated to support this device (the
21 leds-fsg driver is to be submitted separately via the leds tree after
22 this initial support is merged, as it depends on header gpio defines).
23
24 Signed-off-by: Rod Whitby <rod@whitby.id.au>
25
26 PATCH FOLLOWS
27 KernelVersion: v2.6.25-rc6-74-g264e3e8
28 ---
29
30 Updated to correct all issues found by RMK.
31
32 The front power button calls ctrl_alt_del() and the rear reset button
33 now calls machine_restart() directly.
34
35 arch/arm/configs/ixp4xx_defconfig | 9 +-
36 arch/arm/mach-ixp4xx/Kconfig | 9 +
37 arch/arm/mach-ixp4xx/Makefile | 2 +
38 arch/arm/mach-ixp4xx/fsg-pci.c | 71 ++++++++
39 arch/arm/mach-ixp4xx/fsg-setup.c | 276 ++++++++++++++++++++++++++++++++
40 include/asm-arm/arch-ixp4xx/fsg.h | 50 ++++++
41 include/asm-arm/arch-ixp4xx/hardware.h | 1 +
42 include/asm-arm/arch-ixp4xx/irqs.h | 7 +
43 8 files changed, 421 insertions(+), 4 deletions(-)
44 create mode 100644 arch/arm/mach-ixp4xx/fsg-pci.c
45 create mode 100644 arch/arm/mach-ixp4xx/fsg-setup.c
46 create mode 100644 include/asm-arm/arch-ixp4xx/fsg.h
47
48 diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig
49 index efa0485..fc14932 100644
50 --- a/arch/arm/configs/ixp4xx_defconfig
51 +++ b/arch/arm/configs/ixp4xx_defconfig
52 @@ -165,6 +165,7 @@ CONFIG_ARCH_PRPMC1100=y
53 CONFIG_MACH_NAS100D=y
54 CONFIG_MACH_DSMG600=y
55 CONFIG_ARCH_IXDP4XX=y
56 +CONFIG_MACH_FSG=y
57 CONFIG_CPU_IXP46X=y
58 CONFIG_CPU_IXP43X=y
59 CONFIG_MACH_GTWX5715=y
60 @@ -770,7 +771,7 @@ CONFIG_ATA=y
61 # CONFIG_SATA_SIL24 is not set
62 # CONFIG_SATA_SIS is not set
63 # CONFIG_SATA_ULI is not set
64 -# CONFIG_SATA_VIA is not set
65 +CONFIG_SATA_VIA=y
66 # CONFIG_SATA_VITESSE is not set
67 # CONFIG_SATA_INIC162X is not set
68 # CONFIG_PATA_ALI is not set
69 @@ -1143,7 +1144,7 @@ CONFIG_HWMON=y
70 # CONFIG_SENSORS_VIA686A is not set
71 # CONFIG_SENSORS_VT1211 is not set
72 # CONFIG_SENSORS_VT8231 is not set
73 -# CONFIG_SENSORS_W83781D is not set
74 +CONFIG_SENSORS_W83781D=y
75 # CONFIG_SENSORS_W83791D is not set
76 # CONFIG_SENSORS_W83792D is not set
77 # CONFIG_SENSORS_W83793 is not set
78 @@ -1334,8 +1335,8 @@ CONFIG_LEDS_CLASS=y
79 #
80 # LED drivers
81 #
82 -# CONFIG_LEDS_IXP4XX is not set
83 CONFIG_LEDS_GPIO=y
84 +CONFIG_LEDS_FSG=y
85
86 #
87 # LED Triggers
88 @@ -1367,7 +1368,7 @@ CONFIG_RTC_INTF_DEV=y
89 # CONFIG_RTC_DRV_DS1672 is not set
90 # CONFIG_RTC_DRV_MAX6900 is not set
91 # CONFIG_RTC_DRV_RS5C372 is not set
92 -# CONFIG_RTC_DRV_ISL1208 is not set
93 +CONFIG_RTC_DRV_ISL1208=y
94 CONFIG_RTC_DRV_X1205=y
95 CONFIG_RTC_DRV_PCF8563=y
96 # CONFIG_RTC_DRV_PCF8583 is not set
97 diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
98 index e774447..db8b5fe 100644
99 --- a/arch/arm/mach-ixp4xx/Kconfig
100 +++ b/arch/arm/mach-ixp4xx/Kconfig
101 @@ -125,6 +125,15 @@ config ARCH_IXDP4XX
102 depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
103 default y
104
105 +config MACH_FSG
106 + bool
107 + prompt "Freecom FSG-3"
108 + select PCI
109 + help
110 + Say 'Y' here if you want your kernel to support Freecom's
111 + FSG-3 device. For more information on this platform,
112 + see http://www.nslu2-linux.org/wiki/FSG3/HomePage
113 +
114 #
115 # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
116 #
117 diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
118 index c195688..2e6bbf9 100644
119 --- a/arch/arm/mach-ixp4xx/Makefile
120 +++ b/arch/arm/mach-ixp4xx/Makefile
121 @@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
122 obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
123 obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
124 obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
125 +obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
126
127 obj-y += common.o
128
129 @@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
130 obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
131 obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
132 obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
133 +obj-$(CONFIG_MACH_FSG) += fsg-setup.o
134
135 obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
136 obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
137 diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
138 new file mode 100644
139 index 0000000..f19f3f6
140 --- /dev/null
141 +++ b/arch/arm/mach-ixp4xx/fsg-pci.c
142 @@ -0,0 +1,71 @@
143 +/*
144 + * arch/arch/mach-ixp4xx/fsg-pci.c
145 + *
146 + * FSG board-level PCI initialization
147 + *
148 + * Author: Rod Whitby <rod@whitby.id.au>
149 + * Maintainer: http://www.nslu2-linux.org/
150 + *
151 + * based on ixdp425-pci.c:
152 + * Copyright (C) 2002 Intel Corporation.
153 + * Copyright (C) 2003-2004 MontaVista Software, Inc.
154 + *
155 + * This program is free software; you can redistribute it and/or modify
156 + * it under the terms of the GNU General Public License version 2 as
157 + * published by the Free Software Foundation.
158 + *
159 + */
160 +
161 +#include <linux/pci.h>
162 +#include <linux/init.h>
163 +#include <linux/irq.h>
164 +
165 +#include <asm/mach/pci.h>
166 +#include <asm/mach-types.h>
167 +
168 +void __init fsg_pci_preinit(void)
169 +{
170 + set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
171 + set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
172 + set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
173 +
174 + ixp4xx_pci_preinit();
175 +}
176 +
177 +static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
178 +{
179 + static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
180 + IRQ_FSG_PCI_INTC,
181 + IRQ_FSG_PCI_INTB,
182 + IRQ_FSG_PCI_INTA,
183 + };
184 +
185 + int irq = -1;
186 + slot = slot - 11;
187 +
188 + if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
189 + pin >= 1 && pin <= FSG_PCI_IRQ_LINES)
190 + irq = pci_irq_table[(slot - 1)];
191 + printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
192 + __func__, slot, pin, irq);
193 +
194 + return irq;
195 +}
196 +
197 +struct hw_pci fsg_pci __initdata = {
198 + .nr_controllers = 1,
199 + .preinit = fsg_pci_preinit,
200 + .swizzle = pci_std_swizzle,
201 + .setup = ixp4xx_setup,
202 + .scan = ixp4xx_scan_bus,
203 + .map_irq = fsg_map_irq,
204 +};
205 +
206 +int __init fsg_pci_init(void)
207 +{
208 + if (machine_is_fsg())
209 + pci_common_init(&fsg_pci);
210 + return 0;
211 +}
212 +
213 +subsys_initcall(fsg_pci_init);
214 diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
215 new file mode 100644
216 index 0000000..0db3a90
217 --- /dev/null
218 +++ b/arch/arm/mach-ixp4xx/fsg-setup.c
219 @@ -0,0 +1,276 @@
220 +/*
221 + * arch/arm/mach-ixp4xx/fsg-setup.c
222 + *
223 + * FSG board-setup
224 + *
225 + * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
226 + *
227 + * based on ixdp425-setup.c:
228 + * Copyright (C) 2003-2004 MontaVista Software, Inc.
229 + * based on nslu2-power.c
230 + * Copyright (C) 2005 Tower Technologies
231 + *
232 + * Author: Rod Whitby <rod@whitby.id.au>
233 + * Maintainers: http://www.nslu2-linux.org/
234 + *
235 + */
236 +
237 +#include <linux/if_ether.h>
238 +#include <linux/irq.h>
239 +#include <linux/serial.h>
240 +#include <linux/serial_8250.h>
241 +#include <linux/leds.h>
242 +#include <linux/reboot.h>
243 +#include <linux/i2c.h>
244 +#include <linux/i2c-gpio.h>
245 +
246 +#include <asm/mach-types.h>
247 +#include <asm/mach/arch.h>
248 +#include <asm/mach/flash.h>
249 +#include <asm/io.h>
250 +#include <asm/gpio.h>
251 +
252 +static struct flash_platform_data fsg_flash_data = {
253 + .map_name = "cfi_probe",
254 + .width = 2,
255 +};
256 +
257 +static struct resource fsg_flash_resource = {
258 + .flags = IORESOURCE_MEM,
259 +};
260 +
261 +static struct platform_device fsg_flash = {
262 + .name = "IXP4XX-Flash",
263 + .id = 0,
264 + .dev = {
265 + .platform_data = &fsg_flash_data,
266 + },
267 + .num_resources = 1,
268 + .resource = &fsg_flash_resource,
269 +};
270 +
271 +static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
272 + .sda_pin = FSG_SDA_PIN,
273 + .scl_pin = FSG_SCL_PIN,
274 +};
275 +
276 +static struct platform_device fsg_i2c_gpio = {
277 + .name = "i2c-gpio",
278 + .id = 0,
279 + .dev = {
280 + .platform_data = &fsg_i2c_gpio_data,
281 + },
282 +};
283 +
284 +static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
285 + {
286 + I2C_BOARD_INFO("rtc-isl1208", 0x6f),
287 + },
288 +};
289 +
290 +static struct resource fsg_uart_resources[] = {
291 + {
292 + .start = IXP4XX_UART1_BASE_PHYS,
293 + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
294 + .flags = IORESOURCE_MEM,
295 + },
296 + {
297 + .start = IXP4XX_UART2_BASE_PHYS,
298 + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
299 + .flags = IORESOURCE_MEM,
300 + }
301 +};
302 +
303 +static struct plat_serial8250_port fsg_uart_data[] = {
304 + {
305 + .mapbase = IXP4XX_UART1_BASE_PHYS,
306 + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
307 + .irq = IRQ_IXP4XX_UART1,
308 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
309 + .iotype = UPIO_MEM,
310 + .regshift = 2,
311 + .uartclk = IXP4XX_UART_XTAL,
312 + },
313 + {
314 + .mapbase = IXP4XX_UART2_BASE_PHYS,
315 + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
316 + .irq = IRQ_IXP4XX_UART2,
317 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
318 + .iotype = UPIO_MEM,
319 + .regshift = 2,
320 + .uartclk = IXP4XX_UART_XTAL,
321 + },
322 + { }
323 +};
324 +
325 +static struct platform_device fsg_uart = {
326 + .name = "serial8250",
327 + .id = PLAT8250_DEV_PLATFORM,
328 + .dev = {
329 + .platform_data = fsg_uart_data,
330 + },
331 + .num_resources = ARRAY_SIZE(fsg_uart_resources),
332 + .resource = fsg_uart_resources,
333 +};
334 +
335 +static struct platform_device fsg_leds = {
336 + .name = "fsg-led",
337 + .id = -1,
338 +};
339 +
340 +/* Built-in 10/100 Ethernet MAC interfaces */
341 +static struct eth_plat_info fsg_plat_eth[] = {
342 + {
343 + .phy = 5,
344 + .rxq = 3,
345 + .txreadyq = 20,
346 + }, {
347 + .phy = 4,
348 + .rxq = 4,
349 + .txreadyq = 21,
350 + }
351 +};
352 +
353 +static struct platform_device fsg_eth[] = {
354 + {
355 + .name = "ixp4xx_eth",
356 + .id = IXP4XX_ETH_NPEB,
357 + .dev = {
358 + .platform_data = fsg_plat_eth,
359 + },
360 + }, {
361 + .name = "ixp4xx_eth",
362 + .id = IXP4XX_ETH_NPEC,
363 + .dev = {
364 + .platform_data = fsg_plat_eth + 1,
365 + },
366 + }
367 +};
368 +
369 +static struct platform_device *fsg_devices[] __initdata = {
370 + &fsg_i2c_gpio,
371 + &fsg_flash,
372 + &fsg_leds,
373 + &fsg_eth[0],
374 + &fsg_eth[1],
375 +};
376 +
377 +static irqreturn_t fsg_power_handler(int irq, void *dev_id)
378 +{
379 + /* Signal init to do the ctrlaltdel action, this will bypass init if
380 + * it hasn't started and do a kernel_restart.
381 + */
382 + ctrl_alt_del();
383 +
384 + return IRQ_HANDLED;
385 +}
386 +
387 +static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
388 +{
389 + /* This is the paper-clip reset which does an emergency reboot. */
390 + printk(KERN_INFO "Restarting system.\n");
391 + machine_restart(NULL);
392 +
393 + /* This should never be reached. */
394 + return IRQ_HANDLED;
395 +}
396 +
397 +static void __init fsg_init(void)
398 +{
399 + DECLARE_MAC_BUF(mac_buf);
400 + uint8_t __iomem *f;
401 + int i;
402 +
403 + ixp4xx_sys_init();
404 +
405 + fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
406 + fsg_flash_resource.end =
407 + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
408 +
409 + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
410 + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
411 +
412 + /* Configure CS2 for operation, 8bit and writable */
413 + *IXP4XX_EXP_CS2 = 0xbfff0002;
414 +
415 + i2c_register_board_info(0, fsg_i2c_board_info,
416 + ARRAY_SIZE(fsg_i2c_board_info));
417 +
418 + /* This is only useful on a modified machine, but it is valuable
419 + * to have it first in order to see debug messages, and so that
420 + * it does *not* get removed if platform_add_devices fails!
421 + */
422 + (void)platform_device_register(&fsg_uart);
423 +
424 + platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
425 +
426 + if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
427 + IRQF_DISABLED | IRQF_TRIGGER_LOW,
428 + "FSG reset button", NULL) < 0) {
429 +
430 + printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
431 + gpio_to_irq(FSG_RB_GPIO));
432 + }
433 +
434 + if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
435 + IRQF_DISABLED | IRQF_TRIGGER_LOW,
436 + "FSG power button", NULL) < 0) {
437 +
438 + printk(KERN_DEBUG "Power Button IRQ %d not available\n",
439 + gpio_to_irq(FSG_SB_GPIO));
440 + }
441 +
442 + /*
443 + * Map in a portion of the flash and read the MAC addresses.
444 + * Since it is stored in BE in the flash itself, we need to
445 + * byteswap it if we're in LE mode.
446 + */
447 + f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
448 + if (f) {
449 +#ifdef __ARMEB__
450 + for (i = 0; i < 6; i++) {
451 + fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
452 + fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
453 + }
454 +#else
455 +
456 + /*
457 + Endian-swapped reads from unaligned addresses are
458 + required to extract the two MACs from the big-endian
459 + Redboot config area in flash.
460 + */
461 +
462 + fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
463 + fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
464 + fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
465 + fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
466 + fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
467 + fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
468 +
469 + fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
470 + fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
471 + fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
472 + fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
473 + fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
474 + fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
475 +#endif
476 + iounmap(f);
477 + }
478 + printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
479 + print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
480 + printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
481 + print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
482 +
483 +}
484 +
485 +MACHINE_START(FSG, "Freecom FSG-3")
486 + /* Maintainer: www.nslu2-linux.org */
487 + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
488 + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
489 + .map_io = ixp4xx_map_io,
490 + .init_irq = ixp4xx_init_irq,
491 + .timer = &ixp4xx_timer,
492 + .boot_params = 0x0100,
493 + .init_machine = fsg_init,
494 +MACHINE_END
495 +
496 diff --git a/include/asm-arm/arch-ixp4xx/fsg.h b/include/asm-arm/arch-ixp4xx/fsg.h
497 new file mode 100644
498 index 0000000..c0100cc
499 --- /dev/null
500 +++ b/include/asm-arm/arch-ixp4xx/fsg.h
501 @@ -0,0 +1,50 @@
502 +/*
503 + * include/asm-arm/arch-ixp4xx/fsg.h
504 + *
505 + * Freecom FSG-3 platform specific definitions
506 + *
507 + * Author: Rod Whitby <rod@whitby.id.au>
508 + * Author: Tomasz Chmielewski <mangoo@wpkg.org>
509 + * Maintainers: http://www.nslu2-linux.org
510 + *
511 + * Based on coyote.h by
512 + * Copyright 2004 (c) MontaVista, Software, Inc.
513 + *
514 + * This file is licensed under the terms of the GNU General Public
515 + * License version 2. This program is licensed "as is" without any
516 + * warranty of any kind, whether express or implied.
517 + */
518 +
519 +#ifndef __ASM_ARCH_HARDWARE_H__
520 +#error "Do not include this directly, instead #include <asm/hardware.h>"
521 +#endif
522 +
523 +#define FSG_SDA_PIN 12
524 +#define FSG_SCL_PIN 13
525 +
526 +/*
527 + * FSG PCI IRQs
528 + */
529 +#define FSG_PCI_MAX_DEV 3
530 +#define FSG_PCI_IRQ_LINES 3
531 +
532 +
533 +/* PCI controller GPIO to IRQ pin mappings */
534 +#define FSG_PCI_INTA_PIN 6
535 +#define FSG_PCI_INTB_PIN 7
536 +#define FSG_PCI_INTC_PIN 5
537 +
538 +/* Buttons */
539 +
540 +#define FSG_SB_GPIO 4 /* sync button */
541 +#define FSG_RB_GPIO 9 /* reset button */
542 +#define FSG_UB_GPIO 10 /* usb button */
543 +
544 +/* LEDs */
545 +
546 +#define FSG_LED_WLAN_BIT 0
547 +#define FSG_LED_WAN_BIT 1
548 +#define FSG_LED_SATA_BIT 2
549 +#define FSG_LED_USB_BIT 4
550 +#define FSG_LED_RING_BIT 5
551 +#define FSG_LED_SYNC_BIT 7
552 diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
553 index 73e8dc3..fa723a6 100644
554 --- a/include/asm-arm/arch-ixp4xx/hardware.h
555 +++ b/include/asm-arm/arch-ixp4xx/hardware.h
556 @@ -45,5 +45,6 @@
557 #include "nslu2.h"
558 #include "nas100d.h"
559 #include "dsmg600.h"
560 +#include "fsg.h"
561
562 #endif /* _ASM_ARCH_HARDWARE_H */
563 diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
564 index 1180160..674af4a 100644
565 --- a/include/asm-arm/arch-ixp4xx/irqs.h
566 +++ b/include/asm-arm/arch-ixp4xx/irqs.h
567 @@ -128,4 +128,11 @@
568 #define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
569 #define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
570
571 +/*
572 + * Freecom FSG-3 Board IRQs
573 + */
574 +#define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6
575 +#define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7
576 +#define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5
577 +
578 #endif
579 --
580 1.5.2.5
581
Personal OpenWRT clone
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