ar71xx: 3.2: fix build errors if PCI is not enabled
[openwrt.git] / target / linux / cns21xx / patches-2.6.36 / 104-cns21xx-usb-ehci-support.patch
1 --- /dev/null
2 +++ b/drivers/usb/host/ehci-cns21xx.c
3 @@ -0,0 +1,184 @@
4 +/*
5 + * Copyright (c) 2008 Cavium Networks
6 + * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
7 + *
8 + * This file is free software; you can redistribute it and/or modify
9 + * it under the terms of the GNU General Public License, Version 2, as
10 + * published by the Free Software Foundation.
11 + */
12 +
13 +#include <linux/platform_device.h>
14 +#include <linux/irq.h>
15 +
16 +#include <mach/cns21xx.h>
17 +
18 +#define DRIVER_NAME "cns21xx-ehci"
19 +
20 +static int cns21xx_ehci_reset(struct usb_hcd *hcd)
21 +{
22 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
23 + int ret;
24 +
25 + ret = ehci_halt(ehci);
26 + if (ret)
27 + return ret;
28 +
29 + ret = ehci_init(hcd);
30 + if (ret)
31 + return ret;
32 +
33 + ehci_reset(ehci);
34 + ehci_port_power(ehci, 0);
35 +
36 + return 0;
37 +}
38 +
39 +static const struct hc_driver ehci_cns21xx_hc_driver = {
40 + .description = hcd_name,
41 + .product_desc = DRIVER_NAME,
42 + .hcd_priv_size = sizeof(struct ehci_hcd),
43 +
44 + /*
45 + * generic hardware linkage
46 + */
47 + .irq = ehci_irq,
48 + .flags = HCD_MEMORY | HCD_USB2,
49 +
50 + /*
51 + * basic lifecycle operations
52 + */
53 + .reset = cns21xx_ehci_reset,
54 + .start = ehci_run,
55 + .stop = ehci_stop,
56 + .shutdown = ehci_shutdown,
57 +
58 + /*
59 + * managing i/o requests and associated device resources
60 + */
61 + .urb_enqueue = ehci_urb_enqueue,
62 + .urb_dequeue = ehci_urb_dequeue,
63 + .endpoint_disable = ehci_endpoint_disable,
64 + .endpoint_reset = ehci_endpoint_reset,
65 +
66 + /*
67 + * scheduling support
68 + */
69 + .get_frame_number = ehci_get_frame,
70 +
71 + /*
72 + * root hub support
73 + */
74 + .hub_status_data = ehci_hub_status_data,
75 + .hub_control = ehci_hub_control,
76 + .relinquish_port = ehci_relinquish_port,
77 + .port_handed_over = ehci_port_handed_over,
78 +
79 + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
80 +};
81 +
82 +static void cns21xx_ehci_init_hc(void)
83 +{
84 + __raw_writel(0x106, CNS21XX_EHCI_CONFIG_BASE_VIRT + 0x04);
85 + __raw_writel((3 << 5) | 0x2000, CNS21XX_EHCI_CONFIG_BASE_VIRT + 0x40);
86 + msleep(100);
87 +}
88 +
89 +static int ehci_cns21xx_probe(struct platform_device *pdev)
90 +{
91 + struct usb_hcd *hcd;
92 + struct ehci_hcd *ehci;
93 + struct resource *res;
94 + int irq;
95 + int ret;
96 +
97 + if (usb_disabled())
98 + return -ENODEV;
99 +
100 + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
101 + if (!res) {
102 + dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
103 + dev_name(&pdev->dev));
104 + return -ENODEV;
105 + }
106 + irq = res->start;
107 +
108 + hcd = usb_create_hcd(&ehci_cns21xx_hc_driver, &pdev->dev,
109 + dev_name(&pdev->dev));
110 + if (!hcd)
111 + return -ENOMEM;
112 +
113 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
114 + if (!res) {
115 + dev_dbg(&pdev->dev, "no base address specified for %s\n",
116 + dev_name(&pdev->dev));
117 + ret = -ENODEV;
118 + goto err_put_hcd;
119 + }
120 + hcd->rsrc_start = res->start;
121 + hcd->rsrc_len = res->end - res->start + 1;
122 +
123 + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
124 + dev_dbg(&pdev->dev, "controller already in use\n");
125 + ret = -EBUSY;
126 + goto err_put_hcd;
127 + }
128 +
129 + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
130 + if (!hcd->regs) {
131 + dev_dbg(&pdev->dev, "error mapping memory\n");
132 + ret = -EFAULT;
133 + goto err_release_region;
134 + }
135 +
136 + cns21xx_ehci_init_hc();
137 +
138 + ehci = hcd_to_ehci(hcd);
139 +
140 + ehci->caps = hcd->regs;
141 + ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase));
142 + dbg_hcs_params(ehci, "reset");
143 + dbg_hcc_params(ehci, "reset");
144 +
145 + /* cache this readonly data; minimize chip reads */
146 + ehci->hcs_params = readl(&ehci->caps->hcs_params);
147 + ehci->sbrn = 0x20;
148 +
149 + ret = usb_add_hcd(hcd, CNS21XX_IRQ_EHCI, IRQF_DISABLED);
150 + if (ret)
151 + goto err_unmap;
152 +
153 + platform_set_drvdata(pdev, hcd);
154 + return 0;
155 +
156 +err_unmap:
157 + iounmap(hcd->regs);
158 +err_release_region:
159 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
160 +err_put_hcd:
161 + usb_put_hcd(hcd);
162 + return ret;
163 +}
164 +
165 +static int ehci_cns21xx_remove(struct platform_device *pdev)
166 +{
167 + struct usb_hcd *hcd = platform_get_drvdata(pdev);
168 +
169 + usb_remove_hcd(hcd);
170 + iounmap(hcd->regs);
171 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
172 + usb_put_hcd(hcd);
173 + platform_set_drvdata(pdev, NULL);
174 +
175 + return 0;
176 +}
177 +
178 +static struct platform_driver ehci_cns21xx_driver = {
179 + .probe = ehci_cns21xx_probe,
180 + .remove = ehci_cns21xx_remove,
181 + .driver = {
182 + .owner = THIS_MODULE,
183 + .name = DRIVER_NAME,
184 + },
185 +};
186 +
187 +MODULE_ALIAS("platform:" DRIVER_NAME);
188 --- a/drivers/usb/host/ehci-hcd.c
189 +++ b/drivers/usb/host/ehci-hcd.c
190 @@ -1197,6 +1197,11 @@ MODULE_LICENSE ("GPL");
191 #define PLATFORM_DRIVER ehci_atmel_driver
192 #endif
193
194 +#ifdef CONFIG_ARCH_CNS21XX
195 +#include "ehci-cns21xx.c"
196 +#define PLATFORM_DRIVER ehci_cns21xx_driver
197 +#endif
198 +
199 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
200 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
201 !defined(XILINX_OF_PLATFORM_DRIVER)
202 --- a/arch/arm/Kconfig
203 +++ b/arch/arm/Kconfig
204 @@ -300,6 +300,7 @@ config ARCH_CNS21XX
205 select ARCH_REQUIRE_GPIOLIB
206 select ARM_L1_CACHE_SHIFT_4
207 select USB_ARCH_HAS_OHCI
208 + select USB_ARCH_HAS_EHCI
209 help
210 Support for Cavium Networks CNS21xx family.
211
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