target/linux/xburst/patches-3.2/0004-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch

   1 From 297d8a7bdfb755778d4189ca2861dd2a6125e972 Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Tue, 15 Mar 2011 12:33:41 +0100
   4 Subject: [PATCH 04/21] NAND: Add support for subpage reads for
   5  NAND_ECC_HW_OOB_FIRST
   6
   7 ---
   8  drivers/mtd/nand/nand_base.c |   78 ++++++++++++++++++++++++++++++++++++++++--
   9  include/linux/mtd/nand.h     |    8 ++--
  10  2 files changed, 79 insertions(+), 7 deletions(-)
  11
  12 diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
  13 index 184aa93..0131e84 100644
  14 --- a/drivers/mtd/nand/nand_base.c
  15 +++ b/drivers/mtd/nand/nand_base.c
  16 @@ -1143,7 +1143,7 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
  17   * @bufpoi: buffer to store read data
  18   */
  19  static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
  20 -                       uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
  21 +                       uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
  22  {
  23         int start_step, end_step, num_steps;
  24         uint32_t *eccpos = chip->ecc.layout->eccpos;
  25 @@ -1324,6 +1324,75 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
  26  }
  27
  28  /**
  29 + * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function
  30 + * @mtd:       mtd info structure
  31 + * @chip:      nand chip info structure
  32 + * @data_offs: offset of requested data within the page
  33 + * @readlen:   data length
  34 + * @bufpoi:    buffer to store read data
  35 + * @page:      page number to read
  36 + *
  37 + * Hardware ECC for large page chips, require OOB to be read first.
  38 + * For this ECC mode, the write_page method is re-used from ECC_HW.
  39 + * These methods read/write ECC from the OOB area, unlike the
  40 + * ECC_HW_SYNDROME support with multiple ECC steps, follows the
  41 + * "infix ECC" scheme and reads/writes ECC from the data area, by
  42 + * overwriting the NAND manufacturer bad block markings.
  43 + */
  44 +static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip,
  45 +                       uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
  46 +{
  47 +       int start_step, end_step, num_steps;
  48 +       uint32_t *eccpos = chip->ecc.layout->eccpos;
  49 +       uint8_t *p;
  50 +       int data_col_addr;
  51 +       int eccsize = chip->ecc.size;
  52 +       int eccbytes = chip->ecc.bytes;
  53 +       uint8_t *ecc_code = chip->buffers->ecccode;
  54 +       uint8_t *ecc_calc = chip->buffers->ecccalc;
  55 +       int i;
  56 +
  57 +       /* Column address wihin the page aligned to ECC size */
  58 +       start_step = data_offs / chip->ecc.size;
  59 +       end_step = (data_offs + readlen - 1) / chip->ecc.size;
  60 +       num_steps = end_step - start_step + 1;
  61 +
  62 +       data_col_addr = start_step * chip->ecc.size;
  63 +
  64 +       /* Read the OOB area first */
  65 +       if (mtd->writesize > 512) {
  66 +               chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
  67 +               chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  68 +               chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
  69 +       } else {
  70 +               chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
  71 +               chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  72 +               chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
  73 +       }
  74 +
  75 +       for (i = 0; i < chip->ecc.total; i++)
  76 +               ecc_code[i] = chip->oob_poi[eccpos[i]];
  77 +
  78 +       p = bufpoi + data_col_addr;
  79 +
  80 +       for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {
  81 +               int stat;
  82 +
  83 +               chip->ecc.hwctl(mtd, NAND_ECC_READ);
  84 +               chip->read_buf(mtd, p, eccsize);
  85 +               chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  86 +
  87 +               stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
  88 +               if (stat < 0)
  89 +                       mtd->ecc_stats.failed++;
  90 +               else
  91 +                       mtd->ecc_stats.corrected += stat;
  92 +       }
  93 +
  94 +       return 0;
  95 +}
  96 +
  97 +/**
  98   * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
  99   * @mtd: mtd info structure
 100   * @chip: nand chip info structure
 101 @@ -1482,7 +1551,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 102                                                               bufpoi, page);
 103                         else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
 104                                 ret = chip->ecc.read_subpage(mtd, chip,
 105 -                                                       col, bytes, bufpoi);
 106 +                                                       col, bytes, bufpoi, page);
 107                         else
 108                                 ret = chip->ecc.read_page(mtd, chip, bufpoi,
 109                                                           page);
 110 @@ -3292,8 +3361,11 @@ int nand_scan_tail(struct mtd_info *mtd)
 111                                    "hardware ECC not possible\n");
 112                         BUG();
 113                 }
 114 -               if (!chip->ecc.read_page)
 115 +               if (!chip->ecc.read_page) {
 116                         chip->ecc.read_page = nand_read_page_hwecc_oob_first;
 117 +                       if (!chip->ecc.read_subpage)
 118 +                               chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first;
 119 +               }
 120
 121         case NAND_ECC_HW:
 122                 /* Use standard hwecc read page function? */
 123 diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
 124 index 904131b..9034100 100644
 125 --- a/include/linux/mtd/nand.h
 126 +++ b/include/linux/mtd/nand.h
 127 @@ -211,9 +211,9 @@ typedef enum {
 128  #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
 129  #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
 130  #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
 131 -/* Large page NAND with SOFT_ECC should support subpage reads */
 132 -#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
 133 -                                       && (chip->page_shift > 9))
 134 +/* Large page NAND with read_subpage set should support subpage reads */
 135 +#define NAND_SUBPAGE_READ(chip) (((chip)->ecc.read_subpage) \
 136 +                                       && ((chip)->page_shift > 9))
 137
 138  /* Mask to zero out the chip options, which come from the id table */
 139  #define NAND_CHIPOPTIONS_MSK   (0x0000ffff & ~NAND_NO_AUTOINCR)
 140 @@ -367,7 +367,7 @@ struct nand_ecc_ctrl {
 141         int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
 142                         uint8_t *buf, int page);
 143         int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
 144 -                       uint32_t offs, uint32_t len, uint8_t *buf);
 145 +                       uint32_t offs, uint32_t len, uint8_t *buf, int page);
 146         void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
 147                         const uint8_t *buf);
 148         int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,
 149 --
 150 1.7.5.4
 151