Add i2c driver (to etrax) improved by Geert Vancompernolle
[openwrt.git] / target / linux / ar71xx / files / drivers / spi / ar71xx_spi.c
1 /*
2 * Atheros AR71xx SPI Controller driver
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/spinlock.h>
17 #include <linux/workqueue.h>
18 #include <linux/platform_device.h>
19 #include <linux/io.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
22 #include <linux/bitops.h>
23
24 #include <asm/mach-ar71xx/ar71xx.h>
25 #include <asm/mach-ar71xx/platform.h>
26
27 #define DRV_DESC "Atheros AR71xx SPI Controller driver"
28 #define DRV_VERSION "0.2.2"
29 #define DRV_NAME "ar71xx-spi"
30
31 #undef PER_BIT_READ
32
33 struct ar71xx_spi {
34 struct spi_bitbang bitbang;
35 u32 ioc_base;
36 u32 reg_ctrl;
37
38 void __iomem *base;
39
40 struct platform_device *pdev;
41 u32 (*get_ioc_base)(u8 chip_select, int cs_high,
42 int is_on);
43 };
44
45 static inline u32 ar71xx_spi_rr(struct ar71xx_spi *sp, unsigned reg)
46 {
47 return __raw_readl(sp->base + reg);
48 }
49
50 static inline void ar71xx_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
51 {
52 __raw_writel(val, sp->base + reg);
53 }
54
55 static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
56 {
57 return spi_master_get_devdata(spi->master);
58 }
59
60 static u32 ar71xx_spi_get_ioc_base(u8 chip_select, int cs_high, int is_on)
61 {
62 u32 ret;
63
64 if (is_on == AR71XX_SPI_CS_INACTIVE)
65 ret = SPI_IOC_CS_ALL;
66 else
67 ret = SPI_IOC_CS_ALL & ~SPI_IOC_CS(chip_select);
68
69 return ret;
70 }
71
72 static void ar71xx_spi_chipselect(struct spi_device *spi, int value)
73 {
74 struct ar71xx_spi *sp = spidev_to_sp(spi);
75 void __iomem *base = sp->base;
76 u32 ioc_base;
77
78 switch (value) {
79 case BITBANG_CS_INACTIVE:
80 ioc_base = sp->get_ioc_base(spi->chip_select,
81 (spi->mode & SPI_CS_HIGH) != 0,
82 AR71XX_SPI_CS_INACTIVE);
83
84 __raw_writel(ioc_base, base + SPI_REG_IOC);
85 __raw_writel(sp->reg_ctrl, base + SPI_REG_CTRL);
86 __raw_writel(0, base + SPI_REG_FS);
87 break;
88
89 case BITBANG_CS_ACTIVE:
90 ioc_base = sp->get_ioc_base(spi->chip_select,
91 (spi->mode & SPI_CS_HIGH) != 0,
92 AR71XX_SPI_CS_ACTIVE);
93
94 __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
95 /* TODO: setup speed */
96 __raw_writel(0x43, base + SPI_REG_CTRL);
97 __raw_writel(ioc_base, base + SPI_REG_IOC);
98 sp->ioc_base = ioc_base;
99 break;
100 }
101 }
102
103 static u32 ar71xx_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
104 u32 word, u8 bits)
105 {
106 struct ar71xx_spi *sp = spidev_to_sp(spi);
107 void __iomem *base = sp->base;
108 u32 ioc = sp->ioc_base;
109 u32 ret;
110
111 /* clock starts at inactive polarity */
112 for (word <<= (32 - bits); likely(bits); bits--) {
113 u32 out;
114
115 if (word & (1 << 31))
116 out = ioc | SPI_IOC_DO;
117 else
118 out = ioc & ~SPI_IOC_DO;
119
120 /* setup MSB (to slave) on trailing edge */
121 __raw_writel(out, base + SPI_REG_IOC);
122
123 __raw_writel(out | SPI_IOC_CLK, base + SPI_REG_IOC);
124
125 word <<= 1;
126
127 #ifdef PER_BIT_READ
128 /* sample MSB (from slave) on leading edge */
129 ret = __raw_readl(base + SPI_REG_RDS);
130 __raw_writel(out, base + SPI_REG_IOC);
131 #endif
132
133 }
134
135 #ifndef PER_BIT_READ
136 ret = __raw_readl(base + SPI_REG_RDS);
137 #endif
138 return ret;
139 }
140
141 static int ar71xx_spi_probe(struct platform_device *pdev)
142 {
143 struct spi_master *master;
144 struct ar71xx_spi *sp;
145 struct ar71xx_spi_platform_data *pdata;
146 struct resource *r;
147 int ret;
148
149 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
150 if (master == NULL) {
151 dev_err(&pdev->dev, "failed to allocate spi master\n");
152 return -ENOMEM;
153 }
154
155 sp = spi_master_get_devdata(master);
156 platform_set_drvdata(pdev, sp);
157
158 pdata = pdev->dev.platform_data;
159
160 sp->bitbang.master = spi_master_get(master);
161 sp->bitbang.chipselect = ar71xx_spi_chipselect;
162 sp->bitbang.txrx_word[SPI_MODE_0] = ar71xx_spi_txrx_mode0;
163
164 sp->get_ioc_base = ar71xx_spi_get_ioc_base;
165 if (pdata) {
166 sp->bitbang.master->bus_num = pdata->bus_num;
167 sp->bitbang.master->num_chipselect = pdata->num_chipselect;
168 if (pdata->get_ioc_base)
169 sp->get_ioc_base = pdata->get_ioc_base;
170 } else {
171 sp->bitbang.master->bus_num = 0;
172 sp->bitbang.master->num_chipselect = 3;
173 }
174
175 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 if (r == NULL) {
177 ret = -ENOENT;
178 goto err1;
179 }
180
181 sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
182 if (!sp->base) {
183 ret = -ENXIO;
184 goto err1;
185 }
186
187 sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_IOC);
188
189 ret = spi_bitbang_start(&sp->bitbang);
190 if (!ret)
191 return 0;
192
193 iounmap(sp->base);
194 err1:
195 platform_set_drvdata(pdev, NULL);
196 spi_master_put(sp->bitbang.master);
197
198 return ret;
199 }
200
201 static int ar71xx_spi_remove(struct platform_device *pdev)
202 {
203 struct ar71xx_spi *sp = platform_get_drvdata(pdev);
204
205 spi_bitbang_stop(&sp->bitbang);
206 iounmap(sp->base);
207 platform_set_drvdata(pdev, NULL);
208 spi_master_put(sp->bitbang.master);
209
210 return 0;
211 }
212
213 static struct platform_driver ar71xx_spi_drv = {
214 .probe = ar71xx_spi_probe,
215 .remove = ar71xx_spi_remove,
216 .driver = {
217 .name = DRV_NAME,
218 .owner = THIS_MODULE,
219 },
220 };
221
222 static int __init ar71xx_spi_init(void)
223 {
224 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
225 return platform_driver_register(&ar71xx_spi_drv);
226 }
227 module_init(ar71xx_spi_init);
228
229 static void __exit ar71xx_spi_exit(void)
230 {
231 platform_driver_unregister(&ar71xx_spi_drv);
232 }
233 module_exit(ar71xx_spi_exit);
234
235 MODULE_ALIAS("platform:" DRV_NAME);
236 MODULE_DESCRIPTION(DRV_DESC);
237 MODULE_VERSION(DRV_VERSION);
238 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
239 MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
240 MODULE_LICENSE("GPL v2");
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