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[openwrt.git] / package / linux / kernel-patches / 000-linux-mips-2_4_49.patch
1 diff -Nur linux-2.4.29/arch/mips/au1000/common/au1xxx_irqmap.c linux-mips/arch/mips/au1000/common/au1xxx_irqmap.c
2 --- linux-2.4.29/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-19 15:09:26.000000000 +0100
3 +++ linux-mips/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-30 09:01:27.000000000 +0100
4 @@ -172,14 +172,14 @@
5 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
6 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
7 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
8 - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
9 - { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
10 - { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
11 - { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
12 - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
13 - { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
14 - { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
15 - { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
16 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
17 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
18 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
19 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
20 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
21 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
22 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
23 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
24 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
25 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
26 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
27 @@ -200,14 +200,14 @@
28 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
29 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
30 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
31 - { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
32 - { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
33 - { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
34 - { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
35 - { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
36 - { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
37 - { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
38 - { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
39 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
40 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
41 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
42 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
43 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
44 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
45 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
46 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
47 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
48 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
49 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
50 diff -Nur linux-2.4.29/arch/mips/au1000/common/cputable.c linux-mips/arch/mips/au1000/common/cputable.c
51 --- linux-2.4.29/arch/mips/au1000/common/cputable.c 2005-01-19 15:09:26.000000000 +0100
52 +++ linux-mips/arch/mips/au1000/common/cputable.c 2005-01-30 09:01:27.000000000 +0100
53 @@ -39,7 +39,8 @@
54 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
55 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
56 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
57 - { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
58 + { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
59 + { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
60 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
61 };
62
63 diff -Nur linux-2.4.29/arch/mips/au1000/common/dbdma.c linux-mips/arch/mips/au1000/common/dbdma.c
64 --- linux-2.4.29/arch/mips/au1000/common/dbdma.c 2005-01-19 15:09:26.000000000 +0100
65 +++ linux-mips/arch/mips/au1000/common/dbdma.c 2005-02-08 07:28:37.000000000 +0100
66 @@ -41,6 +41,8 @@
67 #include <asm/au1xxx_dbdma.h>
68 #include <asm/system.h>
69
70 +#include <linux/module.h>
71 +
72 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
73
74 /*
75 @@ -60,37 +62,10 @@
76 */
77 #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
78
79 -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
80 -static int dbdma_initialized;
81 +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
82 +static int dbdma_initialized=0;
83 static void au1xxx_dbdma_init(void);
84
85 -typedef struct dbdma_device_table {
86 - u32 dev_id;
87 - u32 dev_flags;
88 - u32 dev_tsize;
89 - u32 dev_devwidth;
90 - u32 dev_physaddr; /* If FIFO */
91 - u32 dev_intlevel;
92 - u32 dev_intpolarity;
93 -} dbdev_tab_t;
94 -
95 -typedef struct dbdma_chan_config {
96 - u32 chan_flags;
97 - u32 chan_index;
98 - dbdev_tab_t *chan_src;
99 - dbdev_tab_t *chan_dest;
100 - au1x_dma_chan_t *chan_ptr;
101 - au1x_ddma_desc_t *chan_desc_base;
102 - au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
103 - void *chan_callparam;
104 - void (*chan_callback)(int, void *, struct pt_regs *);
105 -} chan_tab_t;
106 -
107 -#define DEV_FLAGS_INUSE (1 << 0)
108 -#define DEV_FLAGS_ANYUSE (1 << 1)
109 -#define DEV_FLAGS_OUT (1 << 2)
110 -#define DEV_FLAGS_IN (1 << 3)
111 -
112 static dbdev_tab_t dbdev_tab[] = {
113 #ifdef CONFIG_SOC_AU1550
114 /* UARTS */
115 @@ -156,13 +131,13 @@
116 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
117 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
118
119 - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
120 - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
121 - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
122 - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
123 + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
124 + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
125 + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
126 + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
127
128 - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
129 - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
130 + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
131 + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
132
133 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
134 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
135 @@ -172,9 +147,9 @@
136 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
137 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
138
139 - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
140 - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
141 - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
142 + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
143 + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
144 + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
145 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
146
147 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
148 @@ -183,6 +158,24 @@
149
150 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
151 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
152 +
153 + /* Provide 16 user definable device types */
154 + { 0, 0, 0, 0, 0, 0, 0 },
155 + { 0, 0, 0, 0, 0, 0, 0 },
156 + { 0, 0, 0, 0, 0, 0, 0 },
157 + { 0, 0, 0, 0, 0, 0, 0 },
158 + { 0, 0, 0, 0, 0, 0, 0 },
159 + { 0, 0, 0, 0, 0, 0, 0 },
160 + { 0, 0, 0, 0, 0, 0, 0 },
161 + { 0, 0, 0, 0, 0, 0, 0 },
162 + { 0, 0, 0, 0, 0, 0, 0 },
163 + { 0, 0, 0, 0, 0, 0, 0 },
164 + { 0, 0, 0, 0, 0, 0, 0 },
165 + { 0, 0, 0, 0, 0, 0, 0 },
166 + { 0, 0, 0, 0, 0, 0, 0 },
167 + { 0, 0, 0, 0, 0, 0, 0 },
168 + { 0, 0, 0, 0, 0, 0, 0 },
169 + { 0, 0, 0, 0, 0, 0, 0 },
170 };
171
172 #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
173 @@ -202,6 +195,30 @@
174 return NULL;
175 }
176
177 +u32
178 +au1xxx_ddma_add_device(dbdev_tab_t *dev)
179 +{
180 + u32 ret = 0;
181 + dbdev_tab_t *p=NULL;
182 + static u16 new_id=0x1000;
183 +
184 + p = find_dbdev_id(0);
185 + if ( NULL != p )
186 + {
187 + memcpy(p, dev, sizeof(dbdev_tab_t));
188 + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
189 + ret = p->dev_id;
190 + new_id++;
191 +#if 0
192 + printk("add_device: id:%x flags:%x padd:%x\n",
193 + p->dev_id, p->dev_flags, p->dev_physaddr );
194 +#endif
195 + }
196 +
197 + return ret;
198 +}
199 +EXPORT_SYMBOL(au1xxx_ddma_add_device);
200 +
201 /* Allocate a channel and return a non-zero descriptor if successful.
202 */
203 u32
204 @@ -214,7 +231,7 @@
205 int i;
206 dbdev_tab_t *stp, *dtp;
207 chan_tab_t *ctp;
208 - volatile au1x_dma_chan_t *cp;
209 + au1x_dma_chan_t *cp;
210
211 /* We do the intialization on the first channel allocation.
212 * We have to wait because of the interrupt handler initialization
213 @@ -224,9 +241,6 @@
214 au1xxx_dbdma_init();
215 dbdma_initialized = 1;
216
217 - if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
218 - return 0;
219 -
220 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
221 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
222
223 @@ -268,9 +282,9 @@
224 /* If kmalloc fails, it is caught below same
225 * as a channel not available.
226 */
227 - ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
228 + ctp = (chan_tab_t *)
229 + kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
230 chan_tab_ptr[i] = ctp;
231 - ctp->chan_index = chan = i;
232 break;
233 }
234 }
235 @@ -278,10 +292,11 @@
236
237 if (ctp != NULL) {
238 memset(ctp, 0, sizeof(chan_tab_t));
239 + ctp->chan_index = chan = i;
240 dcp = DDMA_CHANNEL_BASE;
241 dcp += (0x0100 * chan);
242 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
243 - cp = (volatile au1x_dma_chan_t *)dcp;
244 + cp = (au1x_dma_chan_t *)dcp;
245 ctp->chan_src = stp;
246 ctp->chan_dest = dtp;
247 ctp->chan_callback = callback;
248 @@ -298,6 +313,9 @@
249 i |= DDMA_CFG_DED;
250 if (dtp->dev_intpolarity)
251 i |= DDMA_CFG_DP;
252 + if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
253 + (dtp->dev_flags & DEV_FLAGS_SYNC))
254 + i |= DDMA_CFG_SYNC;
255 cp->ddma_cfg = i;
256 au_sync();
257
258 @@ -308,14 +326,14 @@
259 rv = (u32)(&chan_tab_ptr[chan]);
260 }
261 else {
262 - /* Release devices.
263 - */
264 + /* Release devices */
265 stp->dev_flags &= ~DEV_FLAGS_INUSE;
266 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
267 }
268 }
269 return rv;
270 }
271 +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
272
273 /* Set the device width if source or destination is a FIFO.
274 * Should be 8, 16, or 32 bits.
275 @@ -343,6 +361,7 @@
276
277 return rv;
278 }
279 +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
280
281 /* Allocate a descriptor ring, initializing as much as possible.
282 */
283 @@ -369,7 +388,8 @@
284 * and if we try that first we are likely to not waste larger
285 * slabs of memory.
286 */
287 - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
288 + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
289 + GFP_KERNEL|GFP_DMA);
290 if (desc_base == 0)
291 return 0;
292
293 @@ -380,7 +400,7 @@
294 kfree((const void *)desc_base);
295 i = entries * sizeof(au1x_ddma_desc_t);
296 i += (sizeof(au1x_ddma_desc_t) - 1);
297 - if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
298 + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
299 return 0;
300
301 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
302 @@ -460,9 +480,14 @@
303 /* If source input is fifo, set static address.
304 */
305 if (stp->dev_flags & DEV_FLAGS_IN) {
306 - src0 = stp->dev_physaddr;
307 - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
308 + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
309 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
310 + else
311 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
312 +
313 }
314 + if (stp->dev_physaddr)
315 + src0 = stp->dev_physaddr;
316
317 /* Set up dest1. For now, assume no stride and increment.
318 * A channel attribute update can change this later.
319 @@ -486,10 +511,18 @@
320 /* If destination output is fifo, set static address.
321 */
322 if (dtp->dev_flags & DEV_FLAGS_OUT) {
323 - dest0 = dtp->dev_physaddr;
324 + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
325 + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
326 + else
327 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
328 }
329 + if (dtp->dev_physaddr)
330 + dest0 = dtp->dev_physaddr;
331
332 +#if 0
333 + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
334 + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
335 +#endif
336 for (i=0; i<entries; i++) {
337 dp->dscr_cmd0 = cmd0;
338 dp->dscr_cmd1 = cmd1;
339 @@ -498,6 +531,7 @@
340 dp->dscr_dest0 = dest0;
341 dp->dscr_dest1 = dest1;
342 dp->dscr_stat = 0;
343 + dp->sw_context = dp->sw_status = 0;
344 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
345 dp++;
346 }
347 @@ -510,13 +544,14 @@
348
349 return (u32)(ctp->chan_desc_base);
350 }
351 +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
352
353 /* Put a source buffer into the DMA ring.
354 * This updates the source pointer and byte count. Normally used
355 * for memory to fifo transfers.
356 */
357 u32
358 -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
359 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
360 {
361 chan_tab_t *ctp;
362 au1x_ddma_desc_t *dp;
363 @@ -543,24 +578,40 @@
364 */
365 dp->dscr_source0 = virt_to_phys(buf);
366 dp->dscr_cmd1 = nbytes;
367 - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
368 - ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */
369 -
370 + /* Check flags */
371 + if (flags & DDMA_FLAGS_IE)
372 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
373 + if (flags & DDMA_FLAGS_NOIE)
374 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
375 /* Get next descriptor pointer.
376 */
377 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
378
379 + /*
380 + * There is an errata on the Au1200/Au1550 parts that could result
381 + * in "stale" data being DMA'd. It has to do with the snoop logic on
382 + * the dache eviction buffer. NONCOHERENT_IO is on by default for
383 + * these parts. If it is fixedin the future, these dma_cache_inv will
384 + * just be nothing more than empty macros. See io.h.
385 + * */
386 + dma_cache_wback_inv(buf,nbytes);
387 + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
388 + au_sync();
389 + dma_cache_wback_inv(dp, sizeof(dp));
390 + ctp->chan_ptr->ddma_dbell = 0;
391 +
392 /* return something not zero.
393 */
394 return nbytes;
395 }
396 +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
397
398 /* Put a destination buffer into the DMA ring.
399 * This updates the destination pointer and byte count. Normally used
400 * to place an empty buffer into the ring for fifo to memory transfers.
401 */
402 u32
403 -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
404 +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
405 {
406 chan_tab_t *ctp;
407 au1x_ddma_desc_t *dp;
408 @@ -582,11 +633,33 @@
409 if (dp->dscr_cmd0 & DSCR_CMD0_V)
410 return 0;
411
412 - /* Load up buffer address and byte count.
413 - */
414 + /* Load up buffer address and byte count */
415 +
416 + /* Check flags */
417 + if (flags & DDMA_FLAGS_IE)
418 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
419 + if (flags & DDMA_FLAGS_NOIE)
420 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
421 +
422 dp->dscr_dest0 = virt_to_phys(buf);
423 dp->dscr_cmd1 = nbytes;
424 +#if 0
425 + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
426 + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
427 + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
428 +#endif
429 + /*
430 + * There is an errata on the Au1200/Au1550 parts that could result in
431 + * "stale" data being DMA'd. It has to do with the snoop logic on the
432 + * dache eviction buffer. NONCOHERENT_IO is on by default for these
433 + * parts. If it is fixedin the future, these dma_cache_inv will just
434 + * be nothing more than empty macros. See io.h.
435 + * */
436 + dma_cache_inv(buf,nbytes);
437 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
438 + au_sync();
439 + dma_cache_wback_inv(dp, sizeof(dp));
440 + ctp->chan_ptr->ddma_dbell = 0;
441
442 /* Get next descriptor pointer.
443 */
444 @@ -596,6 +669,7 @@
445 */
446 return nbytes;
447 }
448 +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
449
450 /* Get a destination buffer into the DMA ring.
451 * Normally used to get a full buffer from the ring during fifo
452 @@ -645,7 +719,7 @@
453 au1xxx_dbdma_stop(u32 chanid)
454 {
455 chan_tab_t *ctp;
456 - volatile au1x_dma_chan_t *cp;
457 + au1x_dma_chan_t *cp;
458 int halt_timeout = 0;
459
460 ctp = *((chan_tab_t **)chanid);
461 @@ -665,6 +739,7 @@
462 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
463 au_sync();
464 }
465 +EXPORT_SYMBOL(au1xxx_dbdma_stop);
466
467 /* Start using the current descriptor pointer. If the dbdma encounters
468 * a not valid descriptor, it will stop. In this case, we can just
469 @@ -674,17 +749,17 @@
470 au1xxx_dbdma_start(u32 chanid)
471 {
472 chan_tab_t *ctp;
473 - volatile au1x_dma_chan_t *cp;
474 + au1x_dma_chan_t *cp;
475
476 ctp = *((chan_tab_t **)chanid);
477 -
478 cp = ctp->chan_ptr;
479 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
480 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
481 au_sync();
482 - cp->ddma_dbell = 0xffffffff; /* Make it go */
483 + cp->ddma_dbell = 0;
484 au_sync();
485 }
486 +EXPORT_SYMBOL(au1xxx_dbdma_start);
487
488 void
489 au1xxx_dbdma_reset(u32 chanid)
490 @@ -703,15 +778,21 @@
491
492 do {
493 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
494 + /* reset our SW status -- this is used to determine
495 + * if a descriptor is in use by upper level SW. Since
496 + * posting can reset 'V' bit.
497 + */
498 + dp->sw_status = 0;
499 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
500 } while (dp != ctp->chan_desc_base);
501 }
502 +EXPORT_SYMBOL(au1xxx_dbdma_reset);
503
504 u32
505 au1xxx_get_dma_residue(u32 chanid)
506 {
507 chan_tab_t *ctp;
508 - volatile au1x_dma_chan_t *cp;
509 + au1x_dma_chan_t *cp;
510 u32 rv;
511
512 ctp = *((chan_tab_t **)chanid);
513 @@ -746,15 +827,16 @@
514
515 kfree(ctp);
516 }
517 +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
518
519 static void
520 dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
521 {
522 - u32 intstat;
523 + u32 intstat, flags;
524 u32 chan_index;
525 chan_tab_t *ctp;
526 au1x_ddma_desc_t *dp;
527 - volatile au1x_dma_chan_t *cp;
528 + au1x_dma_chan_t *cp;
529
530 intstat = dbdma_gptr->ddma_intstat;
531 au_sync();
532 @@ -773,18 +855,26 @@
533 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
534
535 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
536 -
537 }
538
539 -static void
540 -au1xxx_dbdma_init(void)
541 +static void au1xxx_dbdma_init(void)
542 {
543 + int irq_nr;
544 +
545 dbdma_gptr->ddma_config = 0;
546 dbdma_gptr->ddma_throttle = 0;
547 dbdma_gptr->ddma_inten = 0xffff;
548 au_sync();
549
550 - if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
551 +#if defined(CONFIG_SOC_AU1550)
552 + irq_nr = AU1550_DDMA_INT;
553 +#elif defined(CONFIG_SOC_AU1200)
554 + irq_nr = AU1200_DDMA_INT;
555 +#else
556 + #error Unknown Au1x00 SOC
557 +#endif
558 +
559 + if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
560 "Au1xxx dbdma", (void *)dbdma_gptr))
561 printk("Can't get 1550 dbdma irq");
562 }
563 @@ -795,7 +885,8 @@
564 chan_tab_t *ctp;
565 au1x_ddma_desc_t *dp;
566 dbdev_tab_t *stp, *dtp;
567 - volatile au1x_dma_chan_t *cp;
568 + au1x_dma_chan_t *cp;
569 + u32 i = 0;
570
571 ctp = *((chan_tab_t **)chanid);
572 stp = ctp->chan_src;
573 @@ -820,15 +911,64 @@
574 dp = ctp->chan_desc_base;
575
576 do {
577 - printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
578 - (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
579 - printk("src0 %08x, src1 %08x, dest0 %08x\n",
580 - dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
581 - printk("dest1 %08x, stat %08x, nxtptr %08x\n",
582 - dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
583 + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
584 + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
585 + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
586 + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
587 + printk("stat %08x, nxtptr %08x\n",
588 + dp->dscr_stat, dp->dscr_nxtptr);
589 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
590 } while (dp != ctp->chan_desc_base);
591 }
592
593 +/* Put a descriptor into the DMA ring.
594 + * This updates the source/destination pointers and byte count.
595 + */
596 +u32
597 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
598 +{
599 + chan_tab_t *ctp;
600 + au1x_ddma_desc_t *dp;
601 + u32 nbytes=0;
602 +
603 + /* I guess we could check this to be within the
604 + * range of the table......
605 + */
606 + ctp = *((chan_tab_t **)chanid);
607 +
608 + /* We should have multiple callers for a particular channel,
609 + * an interrupt doesn't affect this pointer nor the descriptor,
610 + * so no locking should be needed.
611 + */
612 + dp = ctp->put_ptr;
613 +
614 + /* If the descriptor is valid, we are way ahead of the DMA
615 + * engine, so just return an error condition.
616 + */
617 + if (dp->dscr_cmd0 & DSCR_CMD0_V)
618 + return 0;
619 +
620 + /* Load up buffer addresses and byte count.
621 + */
622 + dp->dscr_dest0 = dscr->dscr_dest0;
623 + dp->dscr_source0 = dscr->dscr_source0;
624 + dp->dscr_dest1 = dscr->dscr_dest1;
625 + dp->dscr_source1 = dscr->dscr_source1;
626 + dp->dscr_cmd1 = dscr->dscr_cmd1;
627 + nbytes = dscr->dscr_cmd1;
628 + /* Allow the caller to specifiy if an interrupt is generated */
629 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
630 + dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
631 + ctp->chan_ptr->ddma_dbell = 0;
632 +
633 + /* Get next descriptor pointer.
634 + */
635 + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
636 +
637 + /* return something not zero.
638 + */
639 + return nbytes;
640 +}
641 +
642 #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
643
644 diff -Nur linux-2.4.29/arch/mips/au1000/common/gpio.c linux-mips/arch/mips/au1000/common/gpio.c
645 --- linux-2.4.29/arch/mips/au1000/common/gpio.c 1970-01-01 01:00:00.000000000 +0100
646 +++ linux-mips/arch/mips/au1000/common/gpio.c 2005-01-30 09:01:27.000000000 +0100
647 @@ -0,0 +1,118 @@
648 +/*
649 + * This program is free software; you can redistribute it and/or modify it
650 + * under the terms of the GNU General Public License as published by the
651 + * Free Software Foundation; either version 2 of the License, or (at your
652 + * option) any later version.
653 + *
654 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
655 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
656 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
657 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
658 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
659 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
660 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
661 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
662 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
663 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
664 + *
665 + * You should have received a copy of the GNU General Public License along
666 + * with this program; if not, write to the Free Software Foundation, Inc.,
667 + * 675 Mass Ave, Cambridge, MA 02139, USA.
668 + */
669 +
670 +#include <asm/au1000.h>
671 +#include <asm/au1xxx_gpio.h>
672 +
673 +#define gpio1 sys
674 +#if !defined(CONFIG_SOC_AU1000)
675 +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
676 +
677 +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
678 +
679 +int au1xxx_gpio2_read(int signal)
680 +{
681 + signal -= 200;
682 +/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
683 + return ((gpio2->pinstate >> signal) & 0x01);
684 +}
685 +
686 +void au1xxx_gpio2_write(int signal, int value)
687 +{
688 + signal -= 200;
689 +
690 + gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
691 + (value << signal);
692 +}
693 +
694 +void au1xxx_gpio2_tristate(int signal)
695 +{
696 + signal -= 200;
697 + gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
698 +}
699 +#endif
700 +
701 +int au1xxx_gpio1_read(int signal)
702 +{
703 +/* gpio1->trioutclr |= (0x01 << signal); */
704 + return ((gpio1->pinstaterd >> signal) & 0x01);
705 +}
706 +
707 +void au1xxx_gpio1_write(int signal, int value)
708 +{
709 + if(value)
710 + gpio1->outputset = (0x01 << signal);
711 + else
712 + gpio1->outputclr = (0x01 << signal); /* Output a Zero */
713 +}
714 +
715 +void au1xxx_gpio1_tristate(int signal)
716 +{
717 + gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
718 +}
719 +
720 +
721 +int au1xxx_gpio_read(int signal)
722 +{
723 + if(signal >= 200)
724 +#if defined(CONFIG_SOC_AU1000)
725 + return 0;
726 +#else
727 + return au1xxx_gpio2_read(signal);
728 +#endif
729 + else
730 + return au1xxx_gpio1_read(signal);
731 +}
732 +
733 +void au1xxx_gpio_write(int signal, int value)
734 +{
735 + if(signal >= 200)
736 +#if defined(CONFIG_SOC_AU1000)
737 + ;
738 +#else
739 + au1xxx_gpio2_write(signal, value);
740 +#endif
741 + else
742 + au1xxx_gpio1_write(signal, value);
743 +}
744 +
745 +void au1xxx_gpio_tristate(int signal)
746 +{
747 + if(signal >= 200)
748 +#if defined(CONFIG_SOC_AU1000)
749 + ;
750 +#else
751 + au1xxx_gpio2_tristate(signal);
752 +#endif
753 + else
754 + au1xxx_gpio1_tristate(signal);
755 +}
756 +
757 +void au1xxx_gpio1_set_inputs(void)
758 +{
759 + gpio1->pininputen = 0;
760 +}
761 +
762 +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
763 +EXPORT_SYMBOL(au1xxx_gpio_tristate);
764 +EXPORT_SYMBOL(au1xxx_gpio_write);
765 +EXPORT_SYMBOL(au1xxx_gpio_read);
766 diff -Nur linux-2.4.29/arch/mips/au1000/common/irq.c linux-mips/arch/mips/au1000/common/irq.c
767 --- linux-2.4.29/arch/mips/au1000/common/irq.c 2005-01-19 15:09:26.000000000 +0100
768 +++ linux-mips/arch/mips/au1000/common/irq.c 2005-03-13 08:56:57.000000000 +0100
769 @@ -303,8 +303,30 @@
770 };
771
772 #ifdef CONFIG_PM
773 -void startup_match20_interrupt(void)
774 +void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *))
775 {
776 + static struct irqaction action;
777 + /* This is a big problem.... since we didn't use request_irq
778 + when kernel/irq.c calls probe_irq_xxx this interrupt will
779 + be probed for usage. This will end up disabling the device :(
780 +
781 + Give it a bogus "action" pointer -- this will keep it from
782 + getting auto-probed!
783 +
784 + By setting the status to match that of request_irq() we
785 + can avoid it. --cgray
786 + */
787 + action.dev_id = handler;
788 + action.flags = 0;
789 + action.mask = 0;
790 + action.name = "Au1xxx TOY";
791 + action.handler = handler;
792 + action.next = NULL;
793 +
794 + irq_desc[AU1000_TOY_MATCH2_INT].action = &action;
795 + irq_desc[AU1000_TOY_MATCH2_INT].status
796 + &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
797 +
798 local_enable_irq(AU1000_TOY_MATCH2_INT);
799 }
800 #endif
801 @@ -508,6 +530,7 @@
802
803 if (!intc0_req0) return;
804
805 +#ifdef AU1000_USB_DEV_REQ_INT
806 /*
807 * Because of the tight timing of SETUP token to reply
808 * transactions, the USB devices-side packet complete
809 @@ -518,6 +541,7 @@
810 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
811 return;
812 }
813 +#endif
814
815 irq = au_ffs(intc0_req0) - 1;
816 intc0_req0 &= ~(1<<irq);
817 @@ -536,17 +560,7 @@
818
819 irq = au_ffs(intc0_req1) - 1;
820 intc0_req1 &= ~(1<<irq);
821 -#ifdef CONFIG_PM
822 - if (irq == AU1000_TOY_MATCH2_INT) {
823 - mask_and_ack_rise_edge_irq(irq);
824 - counter0_irq(irq, NULL, regs);
825 - local_enable_irq(irq);
826 - }
827 - else
828 -#endif
829 - {
830 - do_IRQ(irq, regs);
831 - }
832 + do_IRQ(irq, regs);
833 }
834
835
836 diff -Nur linux-2.4.29/arch/mips/au1000/common/Makefile linux-mips/arch/mips/au1000/common/Makefile
837 --- linux-2.4.29/arch/mips/au1000/common/Makefile 2005-01-19 15:09:26.000000000 +0100
838 +++ linux-mips/arch/mips/au1000/common/Makefile 2005-01-30 09:01:27.000000000 +0100
839 @@ -19,9 +19,9 @@
840 export-objs = prom.o clocks.o power.o usbdev.o
841
842 obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
843 - au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
844 + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
845
846 -export-objs += dma.o dbdma.o
847 +export-objs += dma.o dbdma.o gpio.o
848
849 obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
850 obj-$(CONFIG_KGDB) += dbg_io.o
851 diff -Nur linux-2.4.29/arch/mips/au1000/common/pci_fixup.c linux-mips/arch/mips/au1000/common/pci_fixup.c
852 --- linux-2.4.29/arch/mips/au1000/common/pci_fixup.c 2005-01-19 15:09:26.000000000 +0100
853 +++ linux-mips/arch/mips/au1000/common/pci_fixup.c 2004-12-03 09:00:32.000000000 +0100
854 @@ -75,9 +75,13 @@
855
856 #ifdef CONFIG_NONCOHERENT_IO
857 /*
858 - * Set the NC bit in controller for pre-AC silicon
859 + * Set the NC bit in controller for Au1500 pre-AC silicon
860 */
861 - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
862 + u32 prid = read_c0_prid();
863 + if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
864 + au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
865 + printk("Non-coherent PCI accesses enabled\n");
866 + }
867 printk("Non-coherent PCI accesses enabled\n");
868 #endif
869
870 diff -Nur linux-2.4.29/arch/mips/au1000/common/pci_ops.c linux-mips/arch/mips/au1000/common/pci_ops.c
871 --- linux-2.4.29/arch/mips/au1000/common/pci_ops.c 2004-02-18 14:36:30.000000000 +0100
872 +++ linux-mips/arch/mips/au1000/common/pci_ops.c 2005-02-27 23:14:24.000000000 +0100
873 @@ -162,6 +162,7 @@
874 static int config_access(unsigned char access_type, struct pci_dev *dev,
875 unsigned char where, u32 * data)
876 {
877 + int error = PCIBIOS_SUCCESSFUL;
878 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
879 unsigned char bus = dev->bus->number;
880 unsigned int dev_fn = dev->devfn;
881 @@ -170,7 +171,6 @@
882 unsigned long offset, status;
883 unsigned long cfg_base;
884 unsigned long flags;
885 - int error = PCIBIOS_SUCCESSFUL;
886 unsigned long entryLo0, entryLo1;
887
888 if (device > 19) {
889 @@ -205,9 +205,8 @@
890 last_entryLo0 = last_entryLo1 = 0xffffffff;
891 }
892
893 - /* Since the Au1xxx doesn't do the idsel timing exactly to spec,
894 - * many board vendors implement their own off-chip idsel, so call
895 - * it now. If it doesn't succeed, may as well bail out at this point.
896 + /* Allow board vendors to implement their own off-chip idsel.
897 + * If it doesn't succeed, may as well bail out at this point.
898 */
899 if (board_pci_idsel) {
900 if (board_pci_idsel(device, 1) == 0) {
901 @@ -271,8 +270,11 @@
902 }
903
904 local_irq_restore(flags);
905 - return error;
906 +#else
907 + /* Fake out Config space access with no responder */
908 + *data = 0xFFFFFFFF;
909 #endif
910 + return error;
911 }
912 #endif
913
914 diff -Nur linux-2.4.29/arch/mips/au1000/common/power.c linux-mips/arch/mips/au1000/common/power.c
915 --- linux-2.4.29/arch/mips/au1000/common/power.c 2005-01-19 15:09:26.000000000 +0100
916 +++ linux-mips/arch/mips/au1000/common/power.c 2005-01-30 09:01:27.000000000 +0100
917 @@ -50,7 +50,6 @@
918
919 static void calibrate_delay(void);
920
921 -extern void set_au1x00_speed(unsigned int new_freq);
922 extern unsigned int get_au1x00_speed(void);
923 extern unsigned long get_au1x00_uart_baud_base(void);
924 extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
925 @@ -116,6 +115,7 @@
926 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
927 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
928
929 +#ifndef CONFIG_SOC_AU1200
930 /* Shutdown USB host/device.
931 */
932 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
933 @@ -127,6 +127,7 @@
934
935 sleep_usbdev_enable = au_readl(USBD_ENABLE);
936 au_writel(0, USBD_ENABLE); au_sync();
937 +#endif
938
939 /* Save interrupt controller state.
940 */
941 @@ -212,14 +213,12 @@
942 int au_sleep(void)
943 {
944 unsigned long wakeup, flags;
945 - extern void save_and_sleep(void);
946 + extern unsigned int save_and_sleep(void);
947
948 spin_lock_irqsave(&pm_lock,flags);
949
950 save_core_regs();
951
952 - flush_cache_all();
953 -
954 /** The code below is all system dependent and we should probably
955 ** have a function call out of here to set this up. You need
956 ** to configure the GPIO or timer interrupts that will bring
957 @@ -227,27 +226,26 @@
958 ** For testing, the TOY counter wakeup is useful.
959 **/
960
961 -#if 0
962 +#if 1
963 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
964
965 /* gpio 6 can cause a wake up event */
966 wakeup = au_readl(SYS_WAKEMSK);
967 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
968 - wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
969 + wakeup = 1 << 5; /* turn on gpio 6 wakeup */
970 #else
971 - /* For testing, allow match20 to wake us up.
972 - */
973 + /* For testing, allow match20 to wake us up. */
974 #ifdef SLEEP_TEST_TIMEOUT
975 wakeup_counter0_set(sleep_ticks);
976 #endif
977 wakeup = 1 << 8; /* turn on match20 wakeup */
978 wakeup = 0;
979 #endif
980 - au_writel(1, SYS_WAKESRC); /* clear cause */
981 + au_writel(0, SYS_WAKESRC); /* clear cause */
982 au_sync();
983 au_writel(wakeup, SYS_WAKEMSK);
984 au_sync();
985 -
986 + DPRINTK("Entering sleep!\n");
987 save_and_sleep();
988
989 /* after a wakeup, the cpu vectors back to 0x1fc00000 so
990 @@ -255,6 +253,7 @@
991 */
992 restore_core_regs();
993 spin_unlock_irqrestore(&pm_lock, flags);
994 + DPRINTK("Leaving sleep!\n");
995 return 0;
996 }
997
998 @@ -285,7 +284,6 @@
999
1000 if (retval)
1001 return retval;
1002 -
1003 au_sleep();
1004 retval = pm_send_all(PM_RESUME, (void *) 0);
1005 }
1006 @@ -312,120 +310,9 @@
1007 }
1008
1009
1010 -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
1011 - void *buffer, size_t * len)
1012 -{
1013 - int retval = 0, i;
1014 - unsigned long val, pll;
1015 -#define TMPBUFLEN 64
1016 -#define MAX_CPU_FREQ 396
1017 - char buf[TMPBUFLEN], *p;
1018 - unsigned long flags, intc0_mask, intc1_mask;
1019 - unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
1020 - old_refresh;
1021 - unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
1022 -
1023 - spin_lock_irqsave(&pm_lock, flags);
1024 - if (!write) {
1025 - *len = 0;
1026 - } else {
1027 - /* Parse the new frequency */
1028 - if (*len > TMPBUFLEN - 1) {
1029 - spin_unlock_irqrestore(&pm_lock, flags);
1030 - return -EFAULT;
1031 - }
1032 - if (copy_from_user(buf, buffer, *len)) {
1033 - spin_unlock_irqrestore(&pm_lock, flags);
1034 - return -EFAULT;
1035 - }
1036 - buf[*len] = 0;
1037 - p = buf;
1038 - val = simple_strtoul(p, &p, 0);
1039 - if (val > MAX_CPU_FREQ) {
1040 - spin_unlock_irqrestore(&pm_lock, flags);
1041 - return -EFAULT;
1042 - }
1043 -
1044 - pll = val / 12;
1045 - if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
1046 - /* revisit this for higher speed cpus */
1047 - spin_unlock_irqrestore(&pm_lock, flags);
1048 - return -EFAULT;
1049 - }
1050 -
1051 - old_baud_base = get_au1x00_uart_baud_base();
1052 - old_cpu_freq = get_au1x00_speed();
1053 -
1054 - new_cpu_freq = pll * 12 * 1000000;
1055 - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
1056 - set_au1x00_speed(new_cpu_freq);
1057 - set_au1x00_uart_baud_base(new_baud_base);
1058 -
1059 - old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
1060 - new_refresh =
1061 - ((old_refresh * new_cpu_freq) /
1062 - old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
1063 -
1064 - au_writel(pll, SYS_CPUPLL);
1065 - au_sync_delay(1);
1066 - au_writel(new_refresh, MEM_SDREFCFG);
1067 - au_sync_delay(1);
1068 -
1069 - for (i = 0; i < 4; i++) {
1070 - if (au_readl
1071 - (UART_BASE + UART_MOD_CNTRL +
1072 - i * 0x00100000) == 3) {
1073 - old_clk =
1074 - au_readl(UART_BASE + UART_CLK +
1075 - i * 0x00100000);
1076 - // baud_rate = baud_base/clk
1077 - baud_rate = old_baud_base / old_clk;
1078 - /* we won't get an exact baud rate and the error
1079 - * could be significant enough that our new
1080 - * calculation will result in a clock that will
1081 - * give us a baud rate that's too far off from
1082 - * what we really want.
1083 - */
1084 - if (baud_rate > 100000)
1085 - baud_rate = 115200;
1086 - else if (baud_rate > 50000)
1087 - baud_rate = 57600;
1088 - else if (baud_rate > 30000)
1089 - baud_rate = 38400;
1090 - else if (baud_rate > 17000)
1091 - baud_rate = 19200;
1092 - else
1093 - (baud_rate = 9600);
1094 - // new_clk = new_baud_base/baud_rate
1095 - new_clk = new_baud_base / baud_rate;
1096 - au_writel(new_clk,
1097 - UART_BASE + UART_CLK +
1098 - i * 0x00100000);
1099 - au_sync_delay(10);
1100 - }
1101 - }
1102 - }
1103 -
1104 -
1105 - /* We don't want _any_ interrupts other than
1106 - * match20. Otherwise our calibrate_delay()
1107 - * calculation will be off, potentially a lot.
1108 - */
1109 - intc0_mask = save_local_and_disable(0);
1110 - intc1_mask = save_local_and_disable(1);
1111 - local_enable_irq(AU1000_TOY_MATCH2_INT);
1112 - spin_unlock_irqrestore(&pm_lock, flags);
1113 - calibrate_delay();
1114 - restore_local_and_enable(0, intc0_mask);
1115 - restore_local_and_enable(1, intc1_mask);
1116 - return retval;
1117 -}
1118 -
1119 -
1120 static struct ctl_table pm_table[] = {
1121 {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
1122 {ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
1123 - {CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
1124 {0}
1125 };
1126
1127 diff -Nur linux-2.4.29/arch/mips/au1000/common/reset.c linux-mips/arch/mips/au1000/common/reset.c
1128 --- linux-2.4.29/arch/mips/au1000/common/reset.c 2005-01-19 15:09:26.000000000 +0100
1129 +++ linux-mips/arch/mips/au1000/common/reset.c 2005-02-27 23:11:54.000000000 +0100
1130 @@ -144,6 +144,26 @@
1131 au_writel(0x00, 0xb1900064); /* sys_auxpll */
1132 au_writel(0x00, 0xb1900100); /* sys_pininputen */
1133 break;
1134 + case 0x04000000: /* Au1200 */
1135 + au_writel(0x00, 0xb400300c); /* ddma */
1136 + au_writel(0x00, 0xb1a00004); /* psc 0 */
1137 + au_writel(0x00, 0xb1b00004); /* psc 1 */
1138 + au_writel(0x00d02000, 0xb4020004); /* ehci, ohci, udc, otg */
1139 + au_writel(0x00, 0xb5000004); /* lcd */
1140 + au_writel(0x00, 0xb060000c); /* sd0 */
1141 + au_writel(0x00, 0xb068000c); /* sd1 */
1142 + au_writel(0x00, 0xb1100100); /* swcnt */
1143 + au_writel(0x00, 0xb0300000); /* aes */
1144 + au_writel(0x00, 0xb4004000); /* cim */
1145 + au_writel(0x00, 0xb1100100); /* uart0_enable */
1146 + au_writel(0x00, 0xb1200100); /* uart1_enable */
1147 + au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
1148 + au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
1149 + au_writel(0x00, 0xb1900028); /* sys_clksrc */
1150 + au_writel(0x10, 0xb1900060); /* sys_cpupll */
1151 + au_writel(0x00, 0xb1900064); /* sys_auxpll */
1152 + au_writel(0x00, 0xb1900100); /* sys_pininputen */
1153 + break;
1154
1155 default:
1156 break;
1157 diff -Nur linux-2.4.29/arch/mips/au1000/common/setup.c linux-mips/arch/mips/au1000/common/setup.c
1158 --- linux-2.4.29/arch/mips/au1000/common/setup.c 2005-01-19 15:09:26.000000000 +0100
1159 +++ linux-mips/arch/mips/au1000/common/setup.c 2005-01-30 09:01:27.000000000 +0100
1160 @@ -174,6 +174,40 @@
1161 initrd_end = (unsigned long)&__rd_end;
1162 #endif
1163
1164 +#if defined(CONFIG_SOC_AU1200)
1165 +#ifdef CONFIG_USB_EHCI_HCD
1166 + if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
1167 + char usb_args[80];
1168 + argptr = prom_getcmdline();
1169 + memset(usb_args, 0, sizeof(usb_args));
1170 + sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
1171 + USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
1172 + strcat(argptr, usb_args);
1173 + }
1174 +#ifdef CONFIG_USB_AMD5536UDC
1175 + /* enable EHC + OHC + UDC clocks, memory and bus mastering */
1176 +/* au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
1177 + au_writel( 0xC0DF207F, USB_MSR_BASE + 4); // incl. prefetch
1178 +#else
1179 + /* enable EHC + OHC clocks, memory and bus mastering */
1180 +/* au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
1181 + au_writel( 0xC0DB200F, USB_MSR_BASE + 4); /* incl. prefetch */
1182 +#endif
1183 + udelay(1000);
1184 +
1185 +#else /* CONFIG_USB_EHCI_HCD */
1186 +
1187 +#ifdef CONFIG_USB_AMD5536UDC
1188 +#ifndef CONFIG_USB_OHCI
1189 + /* enable UDC clocks, memory and bus mastering */
1190 +/* au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
1191 + au_writel( 0xC0DC2070, USB_MSR_BASE + 4); // incl. prefetch
1192 + udelay(1000);
1193 +#endif
1194 +#endif
1195 +#endif /* CONFIG_USB_EHCI_HCD */
1196 +#endif /* CONFIG_SOC_AU1200 */
1197 +
1198 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1199 #ifdef CONFIG_USB_OHCI
1200 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
1201 @@ -187,19 +221,38 @@
1202 #endif
1203
1204 #ifdef CONFIG_USB_OHCI
1205 - // enable host controller and wait for reset done
1206 +#if defined(CONFIG_SOC_AU1200)
1207 +#ifndef CONFIG_USB_EHCI_HCD
1208 +#ifdef CONFIG_USB_AMD5536UDC
1209 + /* enable OHC + UDC clocks, memory and bus mastering */
1210 +/* au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
1211 + au_writel( 0xC0DD2073, USB_MSR_BASE + 4); // incl. prefetch
1212 +#else
1213 + /* enable OHC clocks, memory and bus mastering */
1214 + au_writel( 0x00D12003, USB_MSR_BASE + 4);
1215 +#endif
1216 + udelay(1000);
1217 +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
1218 +#endif
1219 +#else
1220 + /* Au1000, Au1500, Au1100, Au1550 */
1221 + /* enable host controller and wait for reset done */
1222 au_writel(0x08, USB_HOST_CONFIG);
1223 udelay(1000);
1224 au_writel(0x0E, USB_HOST_CONFIG);
1225 udelay(1000);
1226 - au_readl(USB_HOST_CONFIG); // throw away first read
1227 + au_readl(USB_HOST_CONFIG); /* throw away first read */
1228 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
1229 au_readl(USB_HOST_CONFIG);
1230 +#endif /* CONFIG_SOC_AU1200 */
1231 #endif
1232 -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1233 +#else
1234 +
1235 +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
1236 +
1237
1238 #ifdef CONFIG_FB
1239 - // Needed if PCI video card in use
1240 + /* Needed if PCI video card in use */
1241 conswitchp = &dummy_con;
1242 #endif
1243
1244 @@ -209,8 +262,7 @@
1245 #endif
1246
1247 #ifdef CONFIG_BLK_DEV_IDE
1248 - /* Board setup takes precedence for unique devices.
1249 - */
1250 + /* Board setup takes precedence for unique devices. */
1251 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
1252 ide_ops = &std_ide_ops;
1253 #endif
1254 diff -Nur linux-2.4.29/arch/mips/au1000/common/sleeper.S linux-mips/arch/mips/au1000/common/sleeper.S
1255 --- linux-2.4.29/arch/mips/au1000/common/sleeper.S 2004-02-18 14:36:30.000000000 +0100
1256 +++ linux-mips/arch/mips/au1000/common/sleeper.S 2005-01-30 09:01:27.000000000 +0100
1257 @@ -15,17 +15,48 @@
1258 #include <asm/addrspace.h>
1259 #include <asm/regdef.h>
1260 #include <asm/stackframe.h>
1261 +#include <asm/au1000.h>
1262 +
1263 +/*
1264 + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep
1265 + * need not be tied to any particular power management scheme.
1266 + */
1267 +
1268 + .extern ___flush_cache_all
1269
1270 .text
1271 - .set macro
1272 - .set noat
1273 .align 5
1274
1275 -/* Save all of the processor general registers and go to sleep.
1276 - * A wakeup condition will get us back here to restore the registers.
1277 +/*
1278 + * Save the processor general registers and go to sleep. A wakeup
1279 + * condition will get us back here to restore the registers.
1280 */
1281 -LEAF(save_and_sleep)
1282
1283 +/* still need to fix alignment issues here */
1284 +save_and_sleep_frmsz = 48
1285 +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
1286 + .set noreorder
1287 + .set nomacro
1288 + .set noat
1289 + subu sp, save_and_sleep_frmsz
1290 + sw ra, save_and_sleep_frmsz-4(sp)
1291 + sw s0, save_and_sleep_frmsz-8(sp)
1292 + sw s1, save_and_sleep_frmsz-12(sp)
1293 + sw s2, save_and_sleep_frmsz-16(sp)
1294 + sw s3, save_and_sleep_frmsz-20(sp)
1295 + sw s4, save_and_sleep_frmsz-24(sp)
1296 + sw s5, save_and_sleep_frmsz-28(sp)
1297 + sw s6, save_and_sleep_frmsz-32(sp)
1298 + sw s7, save_and_sleep_frmsz-36(sp)
1299 + sw s8, save_and_sleep_frmsz-40(sp)
1300 + sw gp, save_and_sleep_frmsz-44(sp)
1301 +
1302 + /* We only need to save the registers that the calling function
1303 + * hasn't saved for us. 0 is always zero. 8 - 15, 24 and 25 are
1304 + * temporaries and can be used without saving. 26 and 27 are reserved
1305 + * for interrupt/trap handling and expected to change. 29 is the
1306 + * stack pointer which is handled as a special case here.
1307 + */
1308 subu sp, PT_SIZE
1309 sw $1, PT_R1(sp)
1310 sw $2, PT_R2(sp)
1311 @@ -34,14 +65,6 @@
1312 sw $5, PT_R5(sp)
1313 sw $6, PT_R6(sp)
1314 sw $7, PT_R7(sp)
1315 - sw $8, PT_R8(sp)
1316 - sw $9, PT_R9(sp)
1317 - sw $10, PT_R10(sp)
1318 - sw $11, PT_R11(sp)
1319 - sw $12, PT_R12(sp)
1320 - sw $13, PT_R13(sp)
1321 - sw $14, PT_R14(sp)
1322 - sw $15, PT_R15(sp)
1323 sw $16, PT_R16(sp)
1324 sw $17, PT_R17(sp)
1325 sw $18, PT_R18(sp)
1326 @@ -50,32 +73,47 @@
1327 sw $21, PT_R21(sp)
1328 sw $22, PT_R22(sp)
1329 sw $23, PT_R23(sp)
1330 - sw $24, PT_R24(sp)
1331 - sw $25, PT_R25(sp)
1332 - sw $26, PT_R26(sp)
1333 - sw $27, PT_R27(sp)
1334 sw $28, PT_R28(sp)
1335 - sw $29, PT_R29(sp)
1336 sw $30, PT_R30(sp)
1337 sw $31, PT_R31(sp)
1338 +#define PT_C0STATUS PT_LO
1339 +#define PT_CONTEXT PT_HI
1340 +#define PT_PAGEMASK PT_EPC
1341 +#define PT_CONFIG PT_BVADDR
1342 mfc0 k0, CP0_STATUS
1343 - sw k0, 0x20(sp)
1344 + sw k0, PT_C0STATUS(sp) // 0x20
1345 mfc0 k0, CP0_CONTEXT
1346 - sw k0, 0x1c(sp)
1347 + sw k0, PT_CONTEXT(sp) // 0x1c
1348 mfc0 k0, CP0_PAGEMASK
1349 - sw k0, 0x18(sp)
1350 + sw k0, PT_PAGEMASK(sp) // 0x18
1351 mfc0 k0, CP0_CONFIG
1352 - sw k0, 0x14(sp)
1353 + sw k0, PT_CONFIG(sp) // 0x14
1354 +
1355 + .set macro
1356 + .set at
1357 +
1358 + li t0, SYS_SLPPWR
1359 + sw zero, 0(t0) /* Get the processor ready to sleep */
1360 + sync
1361
1362 /* Now set up the scratch registers so the boot rom will
1363 * return to this point upon wakeup.
1364 + * sys_scratch0 : SP
1365 + * sys_scratch1 : RA
1366 + */
1367 + li t0, SYS_SCRATCH0
1368 + li t1, SYS_SCRATCH1
1369 + sw sp, 0(t0)
1370 + la k0, resume_from_sleep
1371 + sw k0, 0(t1)
1372 +
1373 +/*
1374 + * Flush DCACHE to make sure context is in memory
1375 */
1376 - la k0, 1f
1377 - lui k1, 0xb190
1378 - ori k1, 0x18
1379 - sw sp, 0(k1)
1380 - ori k1, 0x1c
1381 - sw k0, 0(k1)
1382 + la t1,___flush_cache_all /* _flush_cache_all is a function pointer */
1383 + lw t0,0(t1)
1384 + jal t0
1385 + nop
1386
1387 /* Put SDRAM into self refresh. Preload instructions into cache,
1388 * issue a precharge, then auto refresh, then sleep commands to it.
1389 @@ -88,30 +126,65 @@
1390 cache 0x14, 96(t0)
1391 .set mips0
1392
1393 + /* Put SDRAM to sleep */
1394 sdsleep:
1395 - lui k0, 0xb400
1396 - sw zero, 0x001c(k0) /* Precharge */
1397 - sw zero, 0x0020(k0) /* Auto refresh */
1398 - sw zero, 0x0030(k0) /* SDRAM sleep */
1399 + li a0, MEM_PHYS_ADDR
1400 + or a0, a0, 0xA0000000
1401 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
1402 + lw k0, MEM_SDMODE0(a0)
1403 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1404 + sw zero, MEM_SDAUTOREF(a0) /* Auto Refresh */
1405 + sw zero, MEM_SDSLEEP(a0) /* Sleep */
1406 sync
1407 -
1408 - lui k1, 0xb190
1409 - sw zero, 0x0078(k1) /* get ready to sleep */
1410 +#endif
1411 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
1412 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1413 + sw zero, MEM_SDSREF(a0)
1414 +
1415 + #lw t0, MEM_SDSTAT(a0)
1416 + #and t0, t0, 0x01000000
1417 + li t0, 0x01000000
1418 +refresh_not_set:
1419 + lw t1, MEM_SDSTAT(a0)
1420 + and t2, t1, t0
1421 + beq zero, t2, refresh_not_set
1422 + nop
1423 +
1424 + li t0, ~0x30000000
1425 + lw t1, MEM_SDCONFIGA(a0)
1426 + and t1, t0, t1
1427 + sw t1, MEM_SDCONFIGA(a0)
1428 sync
1429 - sw zero, 0x007c(k1) /* Put processor to sleep */
1430 +#endif
1431 +
1432 + li t0, SYS_SLEEP
1433 + sw zero, 0(t0) /* Put processor to sleep */
1434 sync
1435 + nop
1436 + nop
1437 + nop
1438 + nop
1439 + nop
1440 + nop
1441 + nop
1442 + nop
1443 +
1444
1445 /* This is where we return upon wakeup.
1446 * Reload all of the registers and return.
1447 */
1448 -1: nop
1449 - lw k0, 0x20(sp)
1450 +resume_from_sleep:
1451 + nop
1452 + .set nomacro
1453 + .set noat
1454 +
1455 + lw k0, PT_C0STATUS(sp) // 0x20
1456 mtc0 k0, CP0_STATUS
1457 - lw k0, 0x1c(sp)
1458 + lw k0, PT_CONTEXT(sp) // 0x1c
1459 mtc0 k0, CP0_CONTEXT
1460 - lw k0, 0x18(sp)
1461 + lw k0, PT_PAGEMASK(sp) // 0x18
1462 mtc0 k0, CP0_PAGEMASK
1463 - lw k0, 0x14(sp)
1464 + lw k0, PT_CONFIG(sp) // 0x14
1465 mtc0 k0, CP0_CONFIG
1466 lw $1, PT_R1(sp)
1467 lw $2, PT_R2(sp)
1468 @@ -120,14 +193,6 @@
1469 lw $5, PT_R5(sp)
1470 lw $6, PT_R6(sp)
1471 lw $7, PT_R7(sp)
1472 - lw $8, PT_R8(sp)
1473 - lw $9, PT_R9(sp)
1474 - lw $10, PT_R10(sp)
1475 - lw $11, PT_R11(sp)
1476 - lw $12, PT_R12(sp)
1477 - lw $13, PT_R13(sp)
1478 - lw $14, PT_R14(sp)
1479 - lw $15, PT_R15(sp)
1480 lw $16, PT_R16(sp)
1481 lw $17, PT_R17(sp)
1482 lw $18, PT_R18(sp)
1483 @@ -136,15 +201,36 @@
1484 lw $21, PT_R21(sp)
1485 lw $22, PT_R22(sp)
1486 lw $23, PT_R23(sp)
1487 - lw $24, PT_R24(sp)
1488 - lw $25, PT_R25(sp)
1489 - lw $26, PT_R26(sp)
1490 - lw $27, PT_R27(sp)
1491 lw $28, PT_R28(sp)
1492 - lw $29, PT_R29(sp)
1493 lw $30, PT_R30(sp)
1494 lw $31, PT_R31(sp)
1495 +
1496 + .set macro
1497 + .set at
1498 +
1499 + /* clear the wake source, but save it as the return value of the function */
1500 + li t0, SYS_WAKESRC
1501 + lw v0, 0(t0)
1502 + sw v0, PT_R2(sp)
1503 + sw zero, 0(t0)
1504 +
1505 addiu sp, PT_SIZE
1506
1507 + lw gp, save_and_sleep_frmsz-44(sp)
1508 + lw s8, save_and_sleep_frmsz-40(sp)
1509 + lw s7, save_and_sleep_frmsz-36(sp)
1510 + lw s6, save_and_sleep_frmsz-32(sp)
1511 + lw s5, save_and_sleep_frmsz-28(sp)
1512 + lw s4, save_and_sleep_frmsz-24(sp)
1513 + lw s3, save_and_sleep_frmsz-20(sp)
1514 + lw s2, save_and_sleep_frmsz-16(sp)
1515 + lw s1, save_and_sleep_frmsz-12(sp)
1516 + lw s0, save_and_sleep_frmsz-8(sp)
1517 + lw ra, save_and_sleep_frmsz-4(sp)
1518 +
1519 + addu sp, save_and_sleep_frmsz
1520 jr ra
1521 + nop
1522 + .set reorder
1523 END(save_and_sleep)
1524 +
1525 diff -Nur linux-2.4.29/arch/mips/au1000/common/time.c linux-mips/arch/mips/au1000/common/time.c
1526 --- linux-2.4.29/arch/mips/au1000/common/time.c 2005-01-19 15:09:26.000000000 +0100
1527 +++ linux-mips/arch/mips/au1000/common/time.c 2005-03-13 08:56:57.000000000 +0100
1528 @@ -50,7 +50,6 @@
1529 #include <linux/mc146818rtc.h>
1530 #include <linux/timex.h>
1531
1532 -extern void startup_match20_interrupt(void);
1533 extern void do_softirq(void);
1534 extern volatile unsigned long wall_jiffies;
1535 unsigned long missed_heart_beats = 0;
1536 @@ -66,7 +65,7 @@
1537
1538 #ifdef CONFIG_PM
1539 #define MATCH20_INC 328
1540 -extern void startup_match20_interrupt(void);
1541 +extern void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *));
1542 static unsigned long last_pc0, last_match20;
1543 #endif
1544
1545 @@ -437,9 +436,6 @@
1546 au_writel(0, SYS_TOYWRITE);
1547 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
1548
1549 - au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
1550 - au_writel(~0, SYS_WAKESRC);
1551 - au_sync();
1552 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1553
1554 /* setup match20 to interrupt once every 10ms */
1555 @@ -447,7 +443,7 @@
1556 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
1557 au_sync();
1558 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1559 - startup_match20_interrupt();
1560 + startup_match20_interrupt(counter0_irq);
1561
1562 do_gettimeoffset = do_fast_pm_gettimeoffset;
1563
1564 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/board_setup.c linux-mips/arch/mips/au1000/db1x00/board_setup.c
1565 --- linux-2.4.29/arch/mips/au1000/db1x00/board_setup.c 2005-01-19 15:09:26.000000000 +0100
1566 +++ linux-mips/arch/mips/au1000/db1x00/board_setup.c 2005-01-30 09:06:19.000000000 +0100
1567 @@ -46,10 +46,22 @@
1568 #include <asm/au1000.h>
1569 #include <asm/db1x00.h>
1570
1571 -extern struct rtc_ops no_rtc_ops;
1572 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1573 +#include <asm/au1xxx_dbdma.h>
1574 +extern struct ide_ops *ide_ops;
1575 +extern struct ide_ops au1xxx_ide_ops;
1576 +extern u32 au1xxx_ide_virtbase;
1577 +extern u64 au1xxx_ide_physbase;
1578 +extern int au1xxx_ide_irq;
1579 +
1580 +/* Ddma */
1581 +chan_tab_t *ide_read_ch, *ide_write_ch;
1582 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
1583 +
1584 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
1585 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
1586
1587 -/* not correct for db1550 */
1588 -static BCSR * const bcsr = (BCSR *)0xAE000000;
1589 +extern struct rtc_ops no_rtc_ops;
1590
1591 void board_reset (void)
1592 {
1593 @@ -108,8 +120,42 @@
1594 au_writel(0x02000200, GPIO2_OUTPUT);
1595 #endif
1596
1597 +#if defined(CONFIG_AU1XXX_SMC91111)
1598 +#define CPLD_CONTROL (0xAF00000C)
1599 + {
1600 + extern uint32_t au1xxx_smc91111_base;
1601 + extern unsigned int au1xxx_smc91111_irq;
1602 + extern int au1xxx_smc91111_nowait;
1603 +
1604 + au1xxx_smc91111_base = 0xAC000300;
1605 + au1xxx_smc91111_irq = AU1000_GPIO_8;
1606 + au1xxx_smc91111_nowait = 1;
1607 +
1608 + /* set up the Static Bus timing - only 396Mhz */
1609 + bcsr->resets |= 0x7;
1610 + au_writel(0x00010003, MEM_STCFG0);
1611 + au_writel(0x000c00c0, MEM_STCFG2);
1612 + au_writel(0x85E1900D, MEM_STTIME2);
1613 + }
1614 +#endif /* end CONFIG_SMC91111 */
1615 au_sync();
1616
1617 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1618 + /*
1619 + * Iniz IDE parameters
1620 + */
1621 + ide_ops = &au1xxx_ide_ops;
1622 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
1623 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
1624 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
1625 +
1626 + /*
1627 + * change PIO or PIO+Ddma
1628 + * check the GPIO-6 pin condition. db1550:s6_dot
1629 + */
1630 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
1631 +#endif
1632 +
1633 #ifdef CONFIG_MIPS_DB1000
1634 printk("AMD Alchemy Au1000/Db1000 Board\n");
1635 #endif
1636 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/irqmap.c linux-mips/arch/mips/au1000/db1x00/irqmap.c
1637 --- linux-2.4.29/arch/mips/au1000/db1x00/irqmap.c 2005-01-19 15:09:26.000000000 +0100
1638 +++ linux-mips/arch/mips/au1000/db1x00/irqmap.c 2005-01-30 09:06:19.000000000 +0100
1639 @@ -53,6 +53,7 @@
1640 #ifdef CONFIG_MIPS_DB1550
1641 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
1642 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
1643 + { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
1644 #else
1645 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
1646 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
1647 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/Makefile linux-mips/arch/mips/au1000/db1x00/Makefile
1648 --- linux-2.4.29/arch/mips/au1000/db1x00/Makefile 2005-01-19 15:09:26.000000000 +0100
1649 +++ linux-mips/arch/mips/au1000/db1x00/Makefile 2005-01-30 09:06:19.000000000 +0100
1650 @@ -17,4 +17,11 @@
1651 obj-y := init.o board_setup.o irqmap.o
1652 obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
1653
1654 +ifdef CONFIG_MIPS_DB1100
1655 +ifdef CONFIG_MMC
1656 +obj-y += mmc_support.o
1657 +export-objs += mmc_support.o
1658 +endif
1659 +endif
1660 +
1661 include $(TOPDIR)/Rules.make
1662 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/mmc_support.c linux-mips/arch/mips/au1000/db1x00/mmc_support.c
1663 --- linux-2.4.29/arch/mips/au1000/db1x00/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
1664 +++ linux-mips/arch/mips/au1000/db1x00/mmc_support.c 2005-01-30 09:07:01.000000000 +0100
1665 @@ -0,0 +1,126 @@
1666 +/*
1667 + * BRIEF MODULE DESCRIPTION
1668 + *
1669 + * MMC support routines for DB1100.
1670 + *
1671 + *
1672 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
1673 + * Author: Embedded Edge, LLC.
1674 + * Contact: dan@embeddededge.com
1675 + *
1676 + * This program is free software; you can redistribute it and/or modify it
1677 + * under the terms of the GNU General Public License as published by the
1678 + * Free Software Foundation; either version 2 of the License, or (at your
1679 + * option) any later version.
1680 + *
1681 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1682 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1683 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
1684 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1685 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1686 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
1687 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1688 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1689 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1690 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1691 + *
1692 + * You should have received a copy of the GNU General Public License along
1693 + * with this program; if not, write to the Free Software Foundation, Inc.,
1694 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1695 + *
1696 + */
1697 +
1698 +
1699 +#include <linux/config.h>
1700 +#include <linux/kernel.h>
1701 +#include <linux/module.h>
1702 +#include <linux/init.h>
1703 +
1704 +#include <asm/irq.h>
1705 +#include <asm/au1000.h>
1706 +#include <asm/au1100_mmc.h>
1707 +#include <asm/db1x00.h>
1708 +
1709 +
1710 +/* SD/MMC controller support functions */
1711 +
1712 +/*
1713 + * Detect card.
1714 + */
1715 +void mmc_card_inserted(int _n_, int *_res_)
1716 +{
1717 + u32 gpios = au_readl(SYS_PINSTATERD);
1718 + u32 emptybit = (_n_) ? (1<<20) : (1<<19);
1719 + *_res_ = ((gpios & emptybit) == 0);
1720 +}
1721 +
1722 +/*
1723 + * Check card write protection.
1724 + */
1725 +void mmc_card_writable(int _n_, int *_res_)
1726 +{
1727 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1728 + unsigned long mmc_wp, board_specific;
1729 +
1730 + if (_n_) {
1731 + mmc_wp = BCSR_BOARD_SD1_WP;
1732 + } else {
1733 + mmc_wp = BCSR_BOARD_SD0_WP;
1734 + }
1735 +
1736 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1737 +
1738 + if (!(board_specific & mmc_wp)) {/* low means card writable */
1739 + *_res_ = 1;
1740 + } else {
1741 + *_res_ = 0;
1742 + }
1743 +}
1744 +
1745 +/*
1746 + * Apply power to card slot.
1747 + */
1748 +void mmc_power_on(int _n_)
1749 +{
1750 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1751 + unsigned long mmc_pwr, board_specific;
1752 +
1753 + if (_n_) {
1754 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1755 + } else {
1756 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1757 + }
1758 +
1759 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1760 + board_specific |= mmc_pwr;
1761 +
1762 + au_writel(board_specific, (int)(&bcsr->specific));
1763 + au_sync_delay(1);
1764 +}
1765 +
1766 +/*
1767 + * Remove power from card slot.
1768 + */
1769 +void mmc_power_off(int _n_)
1770 +{
1771 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1772 + unsigned long mmc_pwr, board_specific;
1773 +
1774 + if (_n_) {
1775 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1776 + } else {
1777 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1778 + }
1779 +
1780 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1781 + board_specific &= ~mmc_pwr;
1782 +
1783 + au_writel(board_specific, (int)(&bcsr->specific));
1784 + au_sync_delay(1);
1785 +}
1786 +
1787 +EXPORT_SYMBOL(mmc_card_inserted);
1788 +EXPORT_SYMBOL(mmc_card_writable);
1789 +EXPORT_SYMBOL(mmc_power_on);
1790 +EXPORT_SYMBOL(mmc_power_off);
1791 +
1792 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/au1200_ibutton.c linux-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c
1793 --- linux-2.4.29/arch/mips/au1000/ficmmp/au1200_ibutton.c 1970-01-01 01:00:00.000000000 +0100
1794 +++ linux-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c 2005-02-03 07:35:29.000000000 +0100
1795 @@ -0,0 +1,270 @@
1796 +/* ----------------------------------------------------------------------
1797 + * mtwilson_keys.c
1798 + *
1799 + * Copyright (C) 2003 Intrinsyc Software Inc.
1800 + *
1801 + * Intel Personal Media Player buttons
1802 + *
1803 + * This program is free software; you can redistribute it and/or modify
1804 + * it under the terms of the GNU General Public License version 2 as
1805 + * published by the Free Software Foundation.
1806 + *
1807 + * May 02, 2003 : Initial version [FB]
1808 + *
1809 + ------------------------------------------------------------------------*/
1810 +
1811 +#include <linux/config.h>
1812 +#include <linux/module.h>
1813 +#include <linux/kernel.h>
1814 +#include <linux/init.h>
1815 +#include <linux/fs.h>
1816 +#include <linux/sched.h>
1817 +#include <linux/miscdevice.h>
1818 +#include <linux/errno.h>
1819 +#include <linux/poll.h>
1820 +#include <linux/delay.h>
1821 +#include <linux/input.h>
1822 +
1823 +#include <asm/au1000.h>
1824 +#include <asm/uaccess.h>
1825 +#include <asm/au1xxx_gpio.h>
1826 +#include <asm/irq.h>
1827 +#include <asm/keyboard.h>
1828 +#include <linux/time.h>
1829 +
1830 +#define DRIVER_VERSION "V1.0"
1831 +#define DRIVER_AUTHOR "FIC"
1832 +#define DRIVER_DESC "FIC Travis Media Player Button Driver"
1833 +#define DRIVER_NAME "Au1200Button"
1834 +
1835 +#define BUTTON_MAIN (1<<1)
1836 +#define BUTTON_SELECT (1<<6)
1837 +#define BUTTON_GUIDE (1<<12)
1838 +#define BUTTON_DOWN (1<<17)
1839 +#define BUTTON_LEFT (1<<19)
1840 +#define BUTTON_RIGHT (1<<26)
1841 +#define BUTTON_UP (1<<28)
1842 +
1843 +#define BUTTON_MASK (\
1844 + BUTTON_MAIN \
1845 + | BUTTON_SELECT \
1846 + | BUTTON_GUIDE \
1847 + | BUTTON_DOWN \
1848 + | BUTTON_LEFT \
1849 + | BUTTON_RIGHT \
1850 + | BUTTON_UP \
1851 + )
1852 +
1853 +#define BUTTON_INVERT (\
1854 + BUTTON_MAIN \
1855 + | 0 \
1856 + | BUTTON_GUIDE \
1857 + | 0 \
1858 + | 0 \
1859 + | 0 \
1860 + | 0 \
1861 + )
1862 +
1863 +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1864 +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1865 +
1866 +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1867 +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1868 +
1869 +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
1870 +
1871 +struct input_dev dev;
1872 +struct timeval cur_tv;
1873 +
1874 +static unsigned int old_tv_usec = 0;
1875 +
1876 +static unsigned int read_button_state(void)
1877 +{
1878 + unsigned int state;
1879 +
1880 + state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
1881 +
1882 + state ^= BUTTON_INVERT; /* invert main & guide button */
1883 +
1884 + /* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
1885 + return state;
1886 +}
1887 +
1888 +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
1889 +static unsigned int bounce()
1890 +{
1891 +
1892 + unsigned int elapsed_time;
1893 +
1894 + do_gettimeofday (&cur_tv);
1895 +
1896 + if (!old_tv_usec) {
1897 + old_tv_usec = cur_tv.tv_usec;
1898 + return 0;
1899 + }
1900 +
1901 + if(cur_tv.tv_usec > old_tv_usec) {
1902 + /* If there hasn't been rollover */
1903 + elapsed_time = ((cur_tv.tv_usec - old_tv_usec));
1904 + }
1905 + else {
1906 + /* Accounting for rollover */
1907 + elapsed_time = ((1000000 - old_tv_usec + cur_tv.tv_usec));
1908 + }
1909 +
1910 + if (elapsed_time > 250000) {
1911 + old_tv_usec = 0; /* reset the bounce time */
1912 + return 0;
1913 + }
1914 +
1915 + return 1;
1916 +}
1917 +
1918 +/* button interrupt handler */
1919 +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
1920 +{
1921 +
1922 + unsigned int i,bit_mask, key_choice;
1923 + u32 button_state;
1924 +
1925 + /* Report state to upper level */
1926 +
1927 + button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
1928 +
1929 + /* Return if this is a repeated (bouncing) event */
1930 + if(bounce())
1931 + return;
1932 +
1933 + /* we want to make keystrokes */
1934 + for( i=0; i< BUTTON_COUNT; i++) {
1935 + bit_mask = 1<<i;
1936 + if (button_state & bit_mask) {
1937 + key_choice = button_map[i];
1938 + /* toggle key down */
1939 + input_report_key(dev, key_choice, 1);
1940 + /* toggle key up */
1941 + input_report_key(dev, key_choice, 0);
1942 + printk("ibutton gpio %d stat %x scan code %d\r\n",
1943 + i, button_state, key_choice);
1944 + /* Only report the first key event; it doesn't make
1945 + * sense for two keys to be pressed at the same time,
1946 + * and causes problems with the directional keys
1947 + * return;
1948 + */
1949 + }
1950 + }
1951 +}
1952 +
1953 +static int
1954 +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
1955 +{
1956 + static int prev_scancode;
1957 +
1958 + printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n",
1959 + scancode, raw_mode);
1960 +
1961 + if (scancode == 0xe0 || scancode == 0xe1) {
1962 + prev_scancode = scancode;
1963 + return 0;
1964 + }
1965 +
1966 + if (scancode == 0x00 || scancode == 0xff) {
1967 + prev_scancode = 0;
1968 + return 0;
1969 + }
1970 +
1971 + *keycode = scancode;
1972 +
1973 + return 1;
1974 +}
1975 +
1976 +/* init button hardware */
1977 +static int button_hw_init(void)
1978 +{
1979 + unsigned int ipinfunc=0;
1980 +
1981 + printk("au1200_ibutton.c: Initializing buttons hardware\n");
1982 +
1983 + // initialize GPIO pin function assignments
1984 +
1985 + ipinfunc = au_readl(SYS_PINFUNC);
1986 +
1987 + ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);
1988 + au_writel( ipinfunc ,SYS_PINFUNC);
1989 +
1990 + ipinfunc |= (SYS_PINFUNC_S0C);
1991 + au_writel( ipinfunc ,SYS_PINFUNC);
1992 +
1993 + return 0;
1994 +}
1995 +
1996 +/* button driver init */
1997 +static int __init button_init(void)
1998 +{
1999 + int ret, i;
2000 + unsigned int flag=0;
2001 +
2002 + printk("au1200_ibutton.c: button_init()\r\n");
2003 +
2004 + button_hw_init();
2005 +
2006 + /* register all button irq handler */
2007 +
2008 + for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
2009 + {
2010 + /* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
2011 + if(button_map[i] != 0)
2012 + {
2013 + ret = request_irq(AU1000_GPIO_0 + i ,
2014 + &button_interrupt , SA_INTERRUPT ,
2015 + DRIVER_NAME , &dev);
2016 + if(ret) flag |= 1<<i;
2017 + }
2018 + }
2019 +
2020 + printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
2021 +
2022 + if (ret) {
2023 + printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
2024 + return ret;
2025 + }
2026 +
2027 + dev.name = DRIVER_NAME;
2028 + dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
2029 +
2030 + for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2031 + {
2032 + dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
2033 + }
2034 +
2035 + input_register_device(&dev);
2036 +
2037 + /* ready to receive interrupts */
2038 +
2039 + return 0;
2040 +}
2041 +
2042 +/* button driver exit */
2043 +static void __exit button_exit(void)
2044 +{
2045 + int i;
2046 +
2047 + for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2048 + {
2049 + if(button_map[i] != 0)
2050 + {
2051 + free_irq( AU1000_GPIO_0 + i, &dev);
2052 + }
2053 + }
2054 +
2055 + input_unregister_device(&dev);
2056 +
2057 + printk("au1200_ibutton.c: button_exit()\r\n");
2058 +}
2059 +
2060 +module_init(button_init);
2061 +module_exit(button_exit);
2062 +
2063 +MODULE_AUTHOR( DRIVER_AUTHOR );
2064 +MODULE_DESCRIPTION( DRIVER_DESC );
2065 +MODULE_LICENSE("GPL");
2066 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/au1xxx_dock.c linux-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c
2067 --- linux-2.4.29/arch/mips/au1000/ficmmp/au1xxx_dock.c 1970-01-01 01:00:00.000000000 +0100
2068 +++ linux-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c 2005-01-30 09:01:27.000000000 +0100
2069 @@ -0,0 +1,261 @@
2070 +/*
2071 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2072 + *
2073 + * This program is free software; you can redistribute it and/or modify
2074 + * it under the terms of the GNU General Public License version 2 as
2075 + * published by the Free Software Foundation.
2076 + */
2077 +
2078 +#include <linux/config.h>
2079 +#include <linux/module.h>
2080 +#include <linux/init.h>
2081 +#include <linux/fs.h>
2082 +#include <linux/sched.h>
2083 +#include <linux/miscdevice.h>
2084 +#include <linux/errno.h>
2085 +#include <linux/poll.h>
2086 +#include <asm/au1000.h>
2087 +#include <asm/uaccess.h>
2088 +#include <asm/au1xxx_gpio.h>
2089 +
2090 +
2091 +#if defined(CONFIG_MIPS_FICMMP)
2092 + #define DOCK_GPIO 215
2093 +#else
2094 + #error Unsupported Au1xxx Platform
2095 +#endif
2096 +
2097 +#define MAKE_FLAG 0x20
2098 +
2099 +#undef DEBUG
2100 +
2101 +#define DEBUG 0
2102 +//#define DEBUG 1
2103 +
2104 +#if DEBUG
2105 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2106 +#else
2107 +#define DPRINTK(format, args...) do { } while (0)
2108 +#endif
2109 +
2110 +/* Please note that this driver is based on a timer and is not interrupt
2111 + * driven. If you are going to make use of this driver, you will need to have
2112 + * your application open the dock listing from the /dev directory first.
2113 + */
2114 +
2115 +struct au1xxx_dock {
2116 + struct fasync_struct *fasync;
2117 + wait_queue_head_t read_wait;
2118 + int open_count;
2119 + unsigned int debounce;
2120 + unsigned int current;
2121 + unsigned int last;
2122 +};
2123 +
2124 +static struct au1xxx_dock dock_info;
2125 +
2126 +
2127 +static void dock_timer_periodic(void *data);
2128 +
2129 +static struct tq_struct dock_task = {
2130 + routine: dock_timer_periodic,
2131 + data: NULL
2132 +};
2133 +
2134 +static int cleanup_flag = 0;
2135 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2136 +
2137 +
2138 +static unsigned int read_dock_state(void)
2139 +{
2140 + u32 state;
2141 +
2142 + state = au1xxx_gpio_read(DOCK_GPIO);
2143 +
2144 + /* printk( "Current Dock State: %d\n", state ); */
2145 +
2146 + return state;
2147 +}
2148 +
2149 +
2150 +static void dock_timer_periodic(void *data)
2151 +{
2152 + struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
2153 + unsigned long dock_state;
2154 +
2155 + /* If cleanup wants us to die */
2156 + if (cleanup_flag) {
2157 + /* now cleanup_module can return */
2158 + wake_up(&cleanup_wait_queue);
2159 + } else {
2160 + /* put ourselves back in the task queue */
2161 + queue_task(&dock_task, &tq_timer);
2162 + }
2163 +
2164 + /* read current dock */
2165 + dock_state = read_dock_state();
2166 +
2167 + /* if dock states hasn't changed */
2168 + /* save time and be done. */
2169 + if (dock_state == dock->current) {
2170 + return;
2171 + }
2172 +
2173 + if (dock_state == dock->debounce) {
2174 + dock->current = dock_state;
2175 + } else {
2176 + dock->debounce = dock_state;
2177 + }
2178 + if (dock->current != dock->last) {
2179 + if (waitqueue_active(&dock->read_wait)) {
2180 + wake_up_interruptible(&dock->read_wait);
2181 + }
2182 + }
2183 +}
2184 +
2185 +
2186 +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2187 +{
2188 + struct au1xxx_dock *dock = filp->private_data;
2189 + char event[3];
2190 + int last;
2191 + int cur;
2192 + int err;
2193 +
2194 +try_again:
2195 +
2196 + while (dock->current == dock->last) {
2197 + if (filp->f_flags & O_NONBLOCK) {
2198 + return -EAGAIN;
2199 + }
2200 + interruptible_sleep_on(&dock->read_wait);
2201 + if (signal_pending(current)) {
2202 + return -ERESTARTSYS;
2203 + }
2204 + }
2205 +
2206 + cur = dock->current;
2207 + last = dock->last;
2208 +
2209 + if(cur != last)
2210 + {
2211 + event[0] = cur ? 'D' : 'U';
2212 + event[1] = '\r';
2213 + event[2] = '\n';
2214 + }
2215 + else
2216 + goto try_again;
2217 +
2218 + dock->last = cur;
2219 + err = copy_to_user(buffer, &event, 3);
2220 + if (err) {
2221 + return err;
2222 + }
2223 +
2224 + return 3;
2225 +}
2226 +
2227 +
2228 +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
2229 +{
2230 + struct au1xxx_dock *dock = &dock_info;
2231 +
2232 + MOD_INC_USE_COUNT;
2233 +
2234 + filp->private_data = dock;
2235 +
2236 + if (dock->open_count++ == 0) {
2237 + dock_task.data = dock;
2238 + cleanup_flag = 0;
2239 + queue_task(&dock_task, &tq_timer);
2240 + }
2241 +
2242 + return 0;
2243 +}
2244 +
2245 +
2246 +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
2247 +{
2248 + struct au1xxx_dock *dock = filp->private_data;
2249 + int ret = 0;
2250 +
2251 + DPRINTK("start\n");
2252 + poll_wait(filp, &dock->read_wait, wait);
2253 + if (dock->current != dock->last) {
2254 + ret = POLLIN | POLLRDNORM;
2255 + }
2256 + return ret;
2257 +}
2258 +
2259 +
2260 +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
2261 +{
2262 + struct au1xxx_dock *dock = filp->private_data;
2263 +
2264 + DPRINTK("start\n");
2265 +
2266 + if (--dock->open_count == 0) {
2267 + cleanup_flag = 1;
2268 + sleep_on(&cleanup_wait_queue);
2269 + }
2270 + MOD_DEC_USE_COUNT;
2271 +
2272 + return 0;
2273 +}
2274 +
2275 +
2276 +
2277 +static struct file_operations au1xxx_dock_fops = {
2278 + owner: THIS_MODULE,
2279 + read: au1xxx_dock_read,
2280 + poll: au1xxx_dock_poll,
2281 + open: au1xxx_dock_open,
2282 + release: au1xxx_dock_release,
2283 +};
2284 +
2285 +/*
2286 + * The au1xxx dock is a misc device:
2287 + * Major 10 char
2288 + * Minor 22 /dev/dock
2289 + *
2290 + * This is /dev/misc/dock if devfs is used.
2291 + */
2292 +
2293 +static struct miscdevice au1xxx_dock_dev = {
2294 + minor: 23,
2295 + name: "dock",
2296 + fops: &au1xxx_dock_fops,
2297 +};
2298 +
2299 +static int __init au1xxx_dock_init(void)
2300 +{
2301 + struct au1xxx_dock *dock = &dock_info;
2302 + int ret;
2303 +
2304 + DPRINTK("Initializing dock driver\n");
2305 + dock->open_count = 0;
2306 + cleanup_flag = 0;
2307 + init_waitqueue_head(&dock->read_wait);
2308 +
2309 +
2310 + /* yamon configures GPIO pins for the dock
2311 + * no initialization needed
2312 + */
2313 +
2314 + ret = misc_register(&au1xxx_dock_dev);
2315 +
2316 + DPRINTK("dock driver fully initialized.\n");
2317 +
2318 + return ret;
2319 +}
2320 +
2321 +
2322 +static void __exit au1xxx_dock_exit(void)
2323 +{
2324 + DPRINTK("unloading dock driver\n");
2325 + misc_deregister(&au1xxx_dock_dev);
2326 +}
2327 +
2328 +
2329 +module_init(au1xxx_dock_init);
2330 +module_exit(au1xxx_dock_exit);
2331 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/board_setup.c linux-mips/arch/mips/au1000/ficmmp/board_setup.c
2332 --- linux-2.4.29/arch/mips/au1000/ficmmp/board_setup.c 1970-01-01 01:00:00.000000000 +0100
2333 +++ linux-mips/arch/mips/au1000/ficmmp/board_setup.c 2005-03-13 09:04:16.000000000 +0100
2334 @@ -0,0 +1,222 @@
2335 +/*
2336 + *
2337 + * BRIEF MODULE DESCRIPTION
2338 + * Alchemy Pb1200 board setup.
2339 + *
2340 + * This program is free software; you can redistribute it and/or modify it
2341 + * under the terms of the GNU General Public License as published by the
2342 + * Free Software Foundation; either version 2 of the License, or (at your
2343 + * option) any later version.
2344 + *
2345 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2346 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2347 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2348 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2349 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2350 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2351 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2352 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2353 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2354 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2355 + *
2356 + * You should have received a copy of the GNU General Public License along
2357 + * with this program; if not, write to the Free Software Foundation, Inc.,
2358 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2359 + */
2360 +#include <linux/config.h>
2361 +#include <linux/init.h>
2362 +#include <linux/sched.h>
2363 +#include <linux/ioport.h>
2364 +#include <linux/mm.h>
2365 +#include <linux/console.h>
2366 +#include <linux/mc146818rtc.h>
2367 +#include <linux/delay.h>
2368 +#include <linux/ide.h>
2369 +
2370 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2371 +#include <linux/ide.h>
2372 +#endif
2373 +
2374 +#include <asm/cpu.h>
2375 +#include <asm/bootinfo.h>
2376 +#include <asm/irq.h>
2377 +#include <asm/keyboard.h>
2378 +#include <asm/mipsregs.h>
2379 +#include <asm/reboot.h>
2380 +#include <asm/pgtable.h>
2381 +#include <asm/au1000.h>
2382 +#include <asm/ficmmp.h>
2383 +#include <asm/au1xxx_dbdma.h>
2384 +#include <asm/au1xxx_gpio.h>
2385 +
2386 +extern struct rtc_ops no_rtc_ops;
2387 +
2388 +/* value currently in the board configuration register */
2389 +u16 ficmmp_config = 0;
2390 +
2391 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2392 +extern struct ide_ops *ide_ops;
2393 +extern struct ide_ops au1xxx_ide_ops;
2394 +extern u32 au1xxx_ide_virtbase;
2395 +extern u64 au1xxx_ide_physbase;
2396 +extern int au1xxx_ide_irq;
2397 +
2398 +u32 led_base_addr;
2399 +/* Ddma */
2400 +chan_tab_t *ide_read_ch, *ide_write_ch;
2401 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
2402 +
2403 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
2404 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
2405 +
2406 +void board_reset (void)
2407 +{
2408 + au_writel(0, 0xAD80001C);
2409 +}
2410 +
2411 +void __init board_setup(void)
2412 +{
2413 + char *argptr = NULL;
2414 + u32 pin_func;
2415 + rtc_ops = &no_rtc_ops;
2416 +
2417 + ficmmp_config_init(); //Initialize FIC control register
2418 +
2419 +#if 0
2420 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
2421 + * but it is board specific code, so put it here.
2422 + */
2423 + pin_func = au_readl(SYS_PINFUNC);
2424 + au_sync();
2425 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
2426 + au_writel(pin_func, SYS_PINFUNC);
2427 +
2428 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
2429 + au_sync();
2430 +#endif
2431 +
2432 +#if defined( CONFIG_I2C_ALGO_AU1550 )
2433 + {
2434 + u32 freq0, clksrc;
2435 +
2436 + /* Select SMBUS in CPLD */
2437 + /* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
2438 +
2439 + pin_func = au_readl(SYS_PINFUNC);
2440 + au_sync();
2441 + pin_func &= ~(3<<17 | 1<<4);
2442 + /* Set GPIOs correctly */
2443 + pin_func |= 2<<17;
2444 + au_writel(pin_func, SYS_PINFUNC);
2445 + au_sync();
2446 +
2447 + /* The i2c driver depends on 50Mhz clock */
2448 + freq0 = au_readl(SYS_FREQCTRL0);
2449 + au_sync();
2450 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
2451 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
2452 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
2453 + au_writel(freq0, SYS_FREQCTRL0);
2454 + au_sync();
2455 + freq0 |= SYS_FC_FE1;
2456 + au_writel(freq0, SYS_FREQCTRL0);
2457 + au_sync();
2458 +
2459 + clksrc = au_readl(SYS_CLKSRC);
2460 + au_sync();
2461 + clksrc &= ~0x01f00000;
2462 + /* bit 22 is EXTCLK0 for PSC0 */
2463 + clksrc |= (0x3 << 22);
2464 + au_writel(clksrc, SYS_CLKSRC);
2465 + au_sync();
2466 + }
2467 +#endif
2468 +
2469 +#ifdef CONFIG_FB_AU1200
2470 + argptr = prom_getcmdline();
2471 + strcat(argptr, " video=au1200fb:");
2472 +#endif
2473 +
2474 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2475 + /*
2476 + * Iniz IDE parameters
2477 + */
2478 + ide_ops = &au1xxx_ide_ops;
2479 + au1xxx_ide_irq = FICMMP_IDE_INT;
2480 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
2481 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
2482 + switch4ddma = 0;
2483 + /*
2484 + ide_ops = &au1xxx_ide_ops;
2485 + au1xxx_ide_irq = FICMMP_IDE_INT;
2486 + au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
2487 + */
2488 + au1xxx_gpio_write(9, 1);
2489 + printk("B4001010: %X\n", *((u32*)0xB4001010));
2490 + printk("B4001014: %X\n", *((u32*)0xB4001014));
2491 + printk("B4001018: %X\n", *((u32*)0xB4001018));
2492 + printk("B1900100: %X\n", *((u32*)0xB1900100));
2493 +
2494 +#if 0
2495 + ficmmp_config_clear(FICMMP_CONFIG_IDERST);
2496 + mdelay(100);
2497 + ficmmp_config_set(FICMMP_CONFIG_IDERST);
2498 + mdelay(100);
2499 +#endif
2500 + /*
2501 + * change PIO or PIO+Ddma
2502 + * check the GPIO-5 pin condition. pb1200:s18_dot
2503 + */
2504 +/* switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
2505 +#endif
2506 +
2507 + /* The Pb1200 development board uses external MUX for PSC0 to
2508 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
2509 + */
2510 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
2511 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
2512 + Refer to Pb1200 documentation.
2513 +#elif defined( CONFIG_AU1550_PSC_SPI )
2514 + //bcsr->resets |= BCSR_RESETS_PCS0MUX;
2515 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
2516 + //bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
2517 +#endif
2518 + au_sync();
2519 +
2520 + printk("FIC Multimedia Player Board\n");
2521 + au1xxx_gpio_tristate(5);
2522 + printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
2523 + printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
2524 +}
2525 +
2526 +int
2527 +board_au1200fb_panel (void)
2528 +{
2529 + au1xxx_gpio_tristate(6);
2530 +
2531 + if (au1xxx_gpio_read(12) == 0)
2532 + return 9; /* FS453_640x480 (Composite/S-Video) */
2533 + else
2534 + return 7; /* Sharp 320x240 TFT */
2535 +}
2536 +
2537 +int
2538 +board_au1200fb_panel_init (void)
2539 +{
2540 + /*Enable data buffers*/
2541 + ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
2542 + /*Take LCD out of reset*/
2543 + ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
2544 + return 0;
2545 +}
2546 +
2547 +int
2548 +board_au1200fb_panel_shutdown (void)
2549 +{
2550 + /*Disable data buffers*/
2551 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
2552 + /*Put LCD in reset, remove power*/
2553 + ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
2554 + return 0;
2555 +}
2556 +
2557 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/init.c linux-mips/arch/mips/au1000/ficmmp/init.c
2558 --- linux-2.4.29/arch/mips/au1000/ficmmp/init.c 1970-01-01 01:00:00.000000000 +0100
2559 +++ linux-mips/arch/mips/au1000/ficmmp/init.c 2005-01-30 09:01:27.000000000 +0100
2560 @@ -0,0 +1,76 @@
2561 +/*
2562 + *
2563 + * BRIEF MODULE DESCRIPTION
2564 + * PB1200 board setup
2565 + *
2566 + * This program is free software; you can redistribute it and/or modify it
2567 + * under the terms of the GNU General Public License as published by the
2568 + * Free Software Foundation; either version 2 of the License, or (at your
2569 + * option) any later version.
2570 + *
2571 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2572 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2573 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2574 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2575 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2576 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2577 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2578 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2579 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2580 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2581 + *
2582 + * You should have received a copy of the GNU General Public License along
2583 + * with this program; if not, write to the Free Software Foundation, Inc.,
2584 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2585 + */
2586 +
2587 +#include <linux/init.h>
2588 +#include <linux/mm.h>
2589 +#include <linux/sched.h>
2590 +#include <linux/bootmem.h>
2591 +#include <asm/addrspace.h>
2592 +#include <asm/bootinfo.h>
2593 +#include <linux/config.h>
2594 +#include <linux/string.h>
2595 +#include <linux/kernel.h>
2596 +#include <linux/sched.h>
2597 +
2598 +int prom_argc;
2599 +char **prom_argv, **prom_envp;
2600 +extern void __init prom_init_cmdline(void);
2601 +extern char *prom_getenv(char *envname);
2602 +
2603 +const char *get_system_type(void)
2604 +{
2605 + return "FIC Multimedia Player (Au1200)";
2606 +}
2607 +
2608 +u32 mae_memsize = 0;
2609 +
2610 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
2611 +{
2612 + unsigned char *memsize_str;
2613 + unsigned long memsize;
2614 +
2615 + prom_argc = argc;
2616 + prom_argv = argv;
2617 + prom_envp = envp;
2618 +
2619 + mips_machgroup = MACH_GROUP_ALCHEMY;
2620 + mips_machtype = MACH_PB1000; /* set the platform # */
2621 + prom_init_cmdline();
2622 +
2623 + memsize_str = prom_getenv("memsize");
2624 + if (!memsize_str) {
2625 + memsize = 0x08000000;
2626 + } else {
2627 + memsize = simple_strtol(memsize_str, NULL, 0);
2628 + }
2629 +
2630 + /* reserved 32MB for MAE driver */
2631 + memsize -= (32 * 1024 * 1024);
2632 + add_memory_region(0, memsize, BOOT_MEM_RAM);
2633 + mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
2634 + return 0;
2635 +}
2636 +
2637 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/irqmap.c linux-mips/arch/mips/au1000/ficmmp/irqmap.c
2638 --- linux-2.4.29/arch/mips/au1000/ficmmp/irqmap.c 1970-01-01 01:00:00.000000000 +0100
2639 +++ linux-mips/arch/mips/au1000/ficmmp/irqmap.c 2005-01-30 09:01:27.000000000 +0100
2640 @@ -0,0 +1,61 @@
2641 +/*
2642 + * BRIEF MODULE DESCRIPTION
2643 + * Au1xxx irq map table
2644 + *
2645 + * This program is free software; you can redistribute it and/or modify it
2646 + * under the terms of the GNU General Public License as published by the
2647 + * Free Software Foundation; either version 2 of the License, or (at your
2648 + * option) any later version.
2649 + *
2650 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2651 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2652 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2653 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2654 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2655 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2656 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2657 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2658 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2659 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2660 + *
2661 + * You should have received a copy of the GNU General Public License along
2662 + * with this program; if not, write to the Free Software Foundation, Inc.,
2663 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2664 + */
2665 +#include <linux/errno.h>
2666 +#include <linux/init.h>
2667 +#include <linux/irq.h>
2668 +#include <linux/kernel_stat.h>
2669 +#include <linux/module.h>
2670 +#include <linux/signal.h>
2671 +#include <linux/sched.h>
2672 +#include <linux/types.h>
2673 +#include <linux/interrupt.h>
2674 +#include <linux/ioport.h>
2675 +#include <linux/timex.h>
2676 +#include <linux/slab.h>
2677 +#include <linux/random.h>
2678 +#include <linux/delay.h>
2679 +
2680 +#include <asm/bitops.h>
2681 +#include <asm/bootinfo.h>
2682 +#include <asm/io.h>
2683 +#include <asm/mipsregs.h>
2684 +#include <asm/system.h>
2685 +#include <asm/au1000.h>
2686 +#include <asm/ficmmp.h>
2687 +
2688 +au1xxx_irq_map_t au1xxx_irq_map[] = {
2689 + { FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
2690 + { AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
2691 + { AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 }, // main button
2692 + { AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 }, // select button
2693 + { AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 }, // guide button
2694 + { AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 }, // down button
2695 + { AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 }, // left button
2696 + { AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 }, // right button
2697 + { AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 }, // up button
2698 +};
2699 +
2700 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
2701 +
2702 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/Makefile linux-mips/arch/mips/au1000/ficmmp/Makefile
2703 --- linux-2.4.29/arch/mips/au1000/ficmmp/Makefile 1970-01-01 01:00:00.000000000 +0100
2704 +++ linux-mips/arch/mips/au1000/ficmmp/Makefile 2005-01-30 09:01:27.000000000 +0100
2705 @@ -0,0 +1,25 @@
2706 +#
2707 +# Copyright 2000 MontaVista Software Inc.
2708 +# Author: MontaVista Software, Inc.
2709 +# ppopov@mvista.com or source@mvista.com
2710 +#
2711 +# Makefile for the Alchemy Semiconductor FIC board.
2712 +#
2713 +# Note! Dependencies are done automagically by 'make dep', which also
2714 +# removes any old dependencies. DON'T put your own dependencies here
2715 +# unless it's something special (ie not a .c file).
2716 +#
2717 +
2718 +USE_STANDARD_AS_RULE := true
2719 +
2720 +O_TARGET := ficmmp.o
2721 +
2722 +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
2723 +
2724 +ifdef CONFIG_MMC
2725 +obj-y += mmc_support.o
2726 +export-objs +=mmc_support.o
2727 +endif
2728 +
2729 +
2730 +include $(TOPDIR)/Rules.make
2731 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/board_setup.c linux-mips/arch/mips/au1000/hydrogen3/board_setup.c
2732 --- linux-2.4.29/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-19 15:09:26.000000000 +0100
2733 +++ linux-mips/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-30 09:07:57.000000000 +0100
2734 @@ -57,6 +57,9 @@
2735
2736 rtc_ops = &no_rtc_ops;
2737
2738 + /* Set GPIO14 high to make CD/DAT1 high for MMC to work */
2739 + au_writel(1<<14, SYS_OUTPUTSET);
2740 +
2741 #ifdef CONFIG_AU1X00_USB_DEVICE
2742 // 2nd USB port is USB device
2743 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
2744 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/buttons.c linux-mips/arch/mips/au1000/hydrogen3/buttons.c
2745 --- linux-2.4.29/arch/mips/au1000/hydrogen3/buttons.c 1970-01-01 01:00:00.000000000 +0100
2746 +++ linux-mips/arch/mips/au1000/hydrogen3/buttons.c 2005-02-11 22:09:55.000000000 +0100
2747 @@ -0,0 +1,308 @@
2748 +/*
2749 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2750 + *
2751 + * This program is free software; you can redistribute it and/or modify
2752 + * it under the terms of the GNU General Public License version 2 as
2753 + * published by the Free Software Foundation.
2754 + */
2755 +
2756 +#include <linux/config.h>
2757 +#include <linux/module.h>
2758 +#include <linux/init.h>
2759 +#include <linux/fs.h>
2760 +#include <linux/sched.h>
2761 +#include <linux/miscdevice.h>
2762 +#include <linux/errno.h>
2763 +#include <linux/poll.h>
2764 +#include <asm/au1000.h>
2765 +#include <asm/uaccess.h>
2766 +
2767 +#define BUTTON_SELECT (1<<1)
2768 +#define BUTTON_1 (1<<2)
2769 +#define BUTTON_2 (1<<3)
2770 +#define BUTTON_ONOFF (1<<6)
2771 +#define BUTTON_3 (1<<7)
2772 +#define BUTTON_4 (1<<8)
2773 +#define BUTTON_LEFT (1<<9)
2774 +#define BUTTON_DOWN (1<<10)
2775 +#define BUTTON_RIGHT (1<<11)
2776 +#define BUTTON_UP (1<<12)
2777 +
2778 +#define BUTTON_MASK (\
2779 + BUTTON_SELECT \
2780 + | BUTTON_1 \
2781 + | BUTTON_2 \
2782 + | BUTTON_ONOFF \
2783 + | BUTTON_3 \
2784 + | BUTTON_4 \
2785 + | BUTTON_LEFT \
2786 + | BUTTON_DOWN \
2787 + | BUTTON_RIGHT \
2788 + | BUTTON_UP \
2789 + )
2790 +
2791 +#define BUTTON_INVERT (\
2792 + BUTTON_SELECT \
2793 + | BUTTON_1 \
2794 + | BUTTON_2 \
2795 + | BUTTON_3 \
2796 + | BUTTON_4 \
2797 + | BUTTON_LEFT \
2798 + | BUTTON_DOWN \
2799 + | BUTTON_RIGHT \
2800 + | BUTTON_UP \
2801 + )
2802 +
2803 +
2804 +
2805 +#define MAKE_FLAG 0x20
2806 +
2807 +#undef DEBUG
2808 +
2809 +#define DEBUG 0
2810 +//#define DEBUG 1
2811 +
2812 +#if DEBUG
2813 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2814 +#else
2815 +#define DPRINTK(format, args...) do { } while (0)
2816 +#endif
2817 +
2818 +/* Please note that this driver is based on a timer and is not interrupt
2819 + * driven. If you are going to make use of this driver, you will need to have
2820 + * your application open the buttons listing from the /dev directory first.
2821 + */
2822 +
2823 +struct hydrogen3_buttons {
2824 + struct fasync_struct *fasync;
2825 + wait_queue_head_t read_wait;
2826 + int open_count;
2827 + unsigned int debounce;
2828 + unsigned int current;
2829 + unsigned int last;
2830 +};
2831 +
2832 +static struct hydrogen3_buttons buttons_info;
2833 +
2834 +
2835 +static void button_timer_periodic(void *data);
2836 +
2837 +static struct tq_struct button_task = {
2838 + routine: button_timer_periodic,
2839 + data: NULL
2840 +};
2841 +
2842 +static int cleanup_flag = 0;
2843 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2844 +
2845 +
2846 +static unsigned int read_button_state(void)
2847 +{
2848 + unsigned long state;
2849 +
2850 + state = inl(SYS_PINSTATERD) & BUTTON_MASK;
2851 + state ^= BUTTON_INVERT;
2852 +
2853 + DPRINTK( "Current Button State: %d\n", state );
2854 +
2855 + return state;
2856 +}
2857 +
2858 +
2859 +static void button_timer_periodic(void *data)
2860 +{
2861 + struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
2862 + unsigned long button_state;
2863 +
2864 + // If cleanup wants us to die
2865 + if (cleanup_flag) {
2866 + wake_up(&cleanup_wait_queue); // now cleanup_module can return
2867 + } else {
2868 + queue_task(&button_task, &tq_timer); // put ourselves back in the task queue
2869 + }
2870 +
2871 + // read current buttons
2872 + button_state = read_button_state();
2873 +
2874 + // if no buttons are down and nothing to do then
2875 + // save time and be done.
2876 + if ((button_state == 0) && (buttons->current == 0)) {
2877 + return;
2878 + }
2879 +
2880 + if (button_state == buttons->debounce) {
2881 + buttons->current = button_state;
2882 + } else {
2883 + buttons->debounce = button_state;
2884 + }
2885 +// printk("0x%04x\n", button_state);
2886 + if (buttons->current != buttons->last) {
2887 + if (waitqueue_active(&buttons->read_wait)) {
2888 + wake_up_interruptible(&buttons->read_wait);
2889 + }
2890 + }
2891 +}
2892 +
2893 +
2894 +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2895 +{
2896 + struct hydrogen3_buttons *buttons = filp->private_data;
2897 + char events[16];
2898 + int index;
2899 + int last;
2900 + int cur;
2901 + int bit;
2902 + int bit_mask;
2903 + int err;
2904 +
2905 + DPRINTK("start\n");
2906 +
2907 +try_again:
2908 +
2909 + while (buttons->current == buttons->last) {
2910 + if (filp->f_flags & O_NONBLOCK) {
2911 + return -EAGAIN;
2912 + }
2913 + interruptible_sleep_on(&buttons->read_wait);
2914 + if (signal_pending(current)) {
2915 + return -ERESTARTSYS;
2916 + }
2917 + }
2918 +
2919 + cur = buttons->current;
2920 + last = buttons->last;
2921 +
2922 + index = 0;
2923 + bit_mask = 1;
2924 + for (bit = 0; (bit < 16) && count; bit++) {
2925 + if ((cur ^ last) & bit_mask) {
2926 + if (cur & bit_mask) {
2927 + events[index] = (bit | MAKE_FLAG) + 'A';
2928 + last |= bit_mask;
2929 + } else {
2930 + events[index] = bit + 'A';
2931 + last &= ~bit_mask;
2932 + }
2933 + index++;
2934 + count--;
2935 + }
2936 + bit_mask <<= 1;
2937 + }
2938 + buttons->last = last;
2939 +
2940 + if (index == 0) {
2941 + goto try_again;
2942 + }
2943 +
2944 + err = copy_to_user(buffer, events, index);
2945 + if (err) {
2946 + return err;
2947 + }
2948 +
2949 + return index;
2950 +}
2951 +
2952 +
2953 +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
2954 +{
2955 + struct hydrogen3_buttons *buttons = &buttons_info;
2956 +
2957 + DPRINTK("start\n");
2958 + MOD_INC_USE_COUNT;
2959 +
2960 + filp->private_data = buttons;
2961 +
2962 + if (buttons->open_count++ == 0) {
2963 + button_task.data = buttons;
2964 + cleanup_flag = 0;
2965 + queue_task(&button_task, &tq_timer);
2966 + }
2967 +
2968 + return 0;
2969 +}
2970 +
2971 +
2972 +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
2973 +{
2974 + struct hydrogen3_buttons *buttons = filp->private_data;
2975 + int ret = 0;
2976 +
2977 + DPRINTK("start\n");
2978 + poll_wait(filp, &buttons->read_wait, wait);
2979 + if (buttons->current != buttons->last) {
2980 + ret = POLLIN | POLLRDNORM;
2981 + }
2982 + return ret;
2983 +}
2984 +
2985 +
2986 +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
2987 +{
2988 + struct hydrogen3_buttons *buttons = filp->private_data;
2989 +
2990 + DPRINTK("start\n");
2991 +
2992 + if (--buttons->open_count == 0) {
2993 + cleanup_flag = 1;
2994 + sleep_on(&cleanup_wait_queue);
2995 + }
2996 + MOD_DEC_USE_COUNT;
2997 +
2998 + return 0;
2999 +}
3000 +
3001 +
3002 +
3003 +static struct file_operations hydrogen3_buttons_fops = {
3004 + owner: THIS_MODULE,
3005 + read: hydrogen3_buttons_read,
3006 + poll: hydrogen3_buttons_poll,
3007 + open: hydrogen3_buttons_open,
3008 + release: hydrogen3_buttons_release,
3009 +};
3010 +
3011 +/*
3012 + * The hydrogen3 buttons is a misc device:
3013 + * Major 10 char
3014 + * Minor 22 /dev/buttons
3015 + *
3016 + * This is /dev/misc/buttons if devfs is used.
3017 + */
3018 +
3019 +static struct miscdevice hydrogen3_buttons_dev = {
3020 + minor: 22,
3021 + name: "buttons",
3022 + fops: &hydrogen3_buttons_fops,
3023 +};
3024 +
3025 +static int __init hydrogen3_buttons_init(void)
3026 +{
3027 + struct hydrogen3_buttons *buttons = &buttons_info;
3028 + int ret;
3029 +
3030 + DPRINTK("Initializing buttons driver\n");
3031 + buttons->open_count = 0;
3032 + cleanup_flag = 0;
3033 + init_waitqueue_head(&buttons->read_wait);
3034 +
3035 +
3036 + // yamon configures GPIO pins for the buttons
3037 + // no initialization needed
3038 +
3039 + ret = misc_register(&hydrogen3_buttons_dev);
3040 +
3041 + DPRINTK("Buttons driver fully initialized.\n");
3042 +
3043 + return ret;
3044 +}
3045 +
3046 +
3047 +static void __exit hydrogen3_buttons_exit(void)
3048 +{
3049 + DPRINTK("unloading buttons driver\n");
3050 + misc_deregister(&hydrogen3_buttons_dev);
3051 +}
3052 +
3053 +
3054 +module_init(hydrogen3_buttons_init);
3055 +module_exit(hydrogen3_buttons_exit);
3056 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/Makefile linux-mips/arch/mips/au1000/hydrogen3/Makefile
3057 --- linux-2.4.29/arch/mips/au1000/hydrogen3/Makefile 2005-01-19 15:09:26.000000000 +0100
3058 +++ linux-mips/arch/mips/au1000/hydrogen3/Makefile 2005-02-11 22:09:55.000000000 +0100
3059 @@ -14,6 +14,11 @@
3060
3061 O_TARGET := hydrogen3.o
3062
3063 -obj-y := init.o board_setup.o irqmap.o
3064 +obj-y := init.o board_setup.o irqmap.o buttons.o
3065 +
3066 +ifdef CONFIG_MMC
3067 +obj-y += mmc_support.o
3068 +export-objs +=mmc_support.o
3069 +endif
3070
3071 include $(TOPDIR)/Rules.make
3072 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/mmc_support.c linux-mips/arch/mips/au1000/hydrogen3/mmc_support.c
3073 --- linux-2.4.29/arch/mips/au1000/hydrogen3/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3074 +++ linux-mips/arch/mips/au1000/hydrogen3/mmc_support.c 2005-02-02 05:27:06.000000000 +0100
3075 @@ -0,0 +1,89 @@
3076 +/*
3077 + * BRIEF MODULE DESCRIPTION
3078 + *
3079 + * MMC support routines for Hydrogen3.
3080 + *
3081 + *
3082 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3083 + * Author: Embedded Edge, LLC.
3084 + * Contact: dan@embeddededge.com
3085 + *
3086 + * This program is free software; you can redistribute it and/or modify it
3087 + * under the terms of the GNU General Public License as published by the
3088 + * Free Software Foundation; either version 2 of the License, or (at your
3089 + * option) any later version.
3090 + *
3091 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3092 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3093 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3094 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3095 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3096 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3097 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3098 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3099 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3100 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3101 + *
3102 + * You should have received a copy of the GNU General Public License along
3103 + * with this program; if not, write to the Free Software Foundation, Inc.,
3104 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3105 + *
3106 + */
3107 +
3108 +
3109 +#include <linux/config.h>
3110 +#include <linux/kernel.h>
3111 +#include <linux/module.h>
3112 +#include <linux/init.h>
3113 +
3114 +#include <asm/irq.h>
3115 +#include <asm/au1000.h>
3116 +#include <asm/au1100_mmc.h>
3117 +
3118 +#define GPIO_17_WP 0x20000
3119 +
3120 +/* SD/MMC controller support functions */
3121 +
3122 +/*
3123 + * Detect card.
3124 + */
3125 +void mmc_card_inserted(int _n_, int *_res_)
3126 +{
3127 + u32 gpios = au_readl(SYS_PINSTATERD);
3128 + u32 emptybit = (1<<16);
3129 + *_res_ = ((gpios & emptybit) == 0);
3130 +}
3131 +
3132 +/*
3133 + * Check card write protection.
3134 + */
3135 +void mmc_card_writable(int _n_, int *_res_)
3136 +{
3137 + unsigned long mmc_wp, board_specific;
3138 + board_specific = au_readl(SYS_OUTPUTSET);
3139 + mmc_wp=GPIO_17_WP;
3140 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3141 + *_res_ = 1;
3142 + } else {
3143 + *_res_ = 0;
3144 + }
3145 +}
3146 +/*
3147 + * Apply power to card slot.
3148 + */
3149 +void mmc_power_on(int _n_)
3150 +{
3151 +}
3152 +
3153 +/*
3154 + * Remove power from card slot.
3155 + */
3156 +void mmc_power_off(int _n_)
3157 +{
3158 +}
3159 +
3160 +EXPORT_SYMBOL(mmc_card_inserted);
3161 +EXPORT_SYMBOL(mmc_card_writable);
3162 +EXPORT_SYMBOL(mmc_power_on);
3163 +EXPORT_SYMBOL(mmc_power_off);
3164 +
3165 diff -Nur linux-2.4.29/arch/mips/au1000/mtx-1/board_setup.c linux-mips/arch/mips/au1000/mtx-1/board_setup.c
3166 --- linux-2.4.29/arch/mips/au1000/mtx-1/board_setup.c 2004-02-18 14:36:30.000000000 +0100
3167 +++ linux-mips/arch/mips/au1000/mtx-1/board_setup.c 2004-11-26 09:37:16.000000000 +0100
3168 @@ -48,6 +48,12 @@
3169
3170 extern struct rtc_ops no_rtc_ops;
3171
3172 +void board_reset (void)
3173 +{
3174 + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3175 + au_writel(0x00000000, 0xAE00001C);
3176 +}
3177 +
3178 void __init board_setup(void)
3179 {
3180 rtc_ops = &no_rtc_ops;
3181 diff -Nur linux-2.4.29/arch/mips/au1000/mtx-1/irqmap.c linux-mips/arch/mips/au1000/mtx-1/irqmap.c
3182 --- linux-2.4.29/arch/mips/au1000/mtx-1/irqmap.c 2005-01-19 15:09:26.000000000 +0100
3183 +++ linux-mips/arch/mips/au1000/mtx-1/irqmap.c 2004-11-26 09:37:16.000000000 +0100
3184 @@ -72,10 +72,10 @@
3185 * A B C D
3186 */
3187 {
3188 - {INTA, INTB, INTC, INTD}, /* IDSEL 0 */
3189 - {INTA, INTB, INTC, INTD}, /* IDSEL 1 */
3190 - {INTA, INTB, INTC, INTD}, /* IDSEL 2 */
3191 - {INTA, INTB, INTC, INTD}, /* IDSEL 3 */
3192 + {INTA, INTB, INTX, INTX}, /* IDSEL 0 */
3193 + {INTB, INTA, INTX, INTX}, /* IDSEL 1 */
3194 + {INTC, INTD, INTX, INTX}, /* IDSEL 2 */
3195 + {INTD, INTC, INTX, INTX}, /* IDSEL 3 */
3196 };
3197 const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
3198 return PCI_IRQ_TABLE_LOOKUP;
3199 diff -Nur linux-2.4.29/arch/mips/au1000/pb1100/Makefile linux-mips/arch/mips/au1000/pb1100/Makefile
3200 --- linux-2.4.29/arch/mips/au1000/pb1100/Makefile 2003-08-25 13:44:39.000000000 +0200
3201 +++ linux-mips/arch/mips/au1000/pb1100/Makefile 2005-01-30 09:10:29.000000000 +0100
3202 @@ -16,4 +16,10 @@
3203
3204 obj-y := init.o board_setup.o irqmap.o
3205
3206 +
3207 +ifdef CONFIG_MMC
3208 +obj-y += mmc_support.o
3209 +export-objs += mmc_support.o
3210 +endif
3211 +
3212 include $(TOPDIR)/Rules.make
3213 diff -Nur linux-2.4.29/arch/mips/au1000/pb1100/mmc_support.c linux-mips/arch/mips/au1000/pb1100/mmc_support.c
3214 --- linux-2.4.29/arch/mips/au1000/pb1100/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3215 +++ linux-mips/arch/mips/au1000/pb1100/mmc_support.c 2005-01-30 09:10:29.000000000 +0100
3216 @@ -0,0 +1,126 @@
3217 +/*
3218 + * BRIEF MODULE DESCRIPTION
3219 + *
3220 + * MMC support routines for PB1100.
3221 + *
3222 + *
3223 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3224 + * Author: Embedded Edge, LLC.
3225 + * Contact: dan@embeddededge.com
3226 + *
3227 + * This program is free software; you can redistribute it and/or modify it
3228 + * under the terms of the GNU General Public License as published by the
3229 + * Free Software Foundation; either version 2 of the License, or (at your
3230 + * option) any later version.
3231 + *
3232 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3233 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3234 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3235 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3236 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3237 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3238 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3239 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3240 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3241 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3242 + *
3243 + * You should have received a copy of the GNU General Public License along
3244 + * with this program; if not, write to the Free Software Foundation, Inc.,
3245 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3246 + *
3247 + */
3248 +
3249 +
3250 +#include <linux/config.h>
3251 +#include <linux/kernel.h>
3252 +#include <linux/module.h>
3253 +#include <linux/init.h>
3254 +
3255 +#include <asm/irq.h>
3256 +#include <asm/au1000.h>
3257 +#include <asm/au1100_mmc.h>
3258 +#include <asm/pb1100.h>
3259 +
3260 +
3261 +/* SD/MMC controller support functions */
3262 +
3263 +/*
3264 + * Detect card.
3265 + */
3266 +void mmc_card_inserted(int _n_, int *_res_)
3267 +{
3268 + u32 gpios = au_readl(SYS_PINSTATERD);
3269 + u32 emptybit = (_n_) ? (1<<15) : (1<<14);
3270 + *_res_ = ((gpios & emptybit) == 0);
3271 +}
3272 +
3273 +/*
3274 + * Check card write protection.
3275 + */
3276 +void mmc_card_writable(int _n_, int *_res_)
3277 +{
3278 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3279 + unsigned long mmc_wp, board_specific;
3280 +
3281 + if (_n_) {
3282 + mmc_wp = BCSR_PCMCIA_SD1_WP;
3283 + } else {
3284 + mmc_wp = BCSR_PCMCIA_SD0_WP;
3285 + }
3286 +
3287 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3288 +
3289 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3290 + *_res_ = 1;
3291 + } else {
3292 + *_res_ = 0;
3293 + }
3294 +}
3295 +
3296 +/*
3297 + * Apply power to card slot.
3298 + */
3299 +void mmc_power_on(int _n_)
3300 +{
3301 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3302 + unsigned long mmc_pwr, board_specific;
3303 +
3304 + if (_n_) {
3305 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3306 + } else {
3307 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3308 + }
3309 +
3310 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3311 + board_specific |= mmc_pwr;
3312 +
3313 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3314 + au_sync_delay(1);
3315 +}
3316 +
3317 +/*
3318 + * Remove power from card slot.
3319 + */
3320 +void mmc_power_off(int _n_)
3321 +{
3322 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3323 + unsigned long mmc_pwr, board_specific;
3324 +
3325 + if (_n_) {
3326 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3327 + } else {
3328 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3329 + }
3330 +
3331 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3332 + board_specific &= ~mmc_pwr;
3333 +
3334 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3335 + au_sync_delay(1);
3336 +}
3337 +
3338 +EXPORT_SYMBOL(mmc_card_inserted);
3339 +EXPORT_SYMBOL(mmc_card_writable);
3340 +EXPORT_SYMBOL(mmc_power_on);
3341 +EXPORT_SYMBOL(mmc_power_off);
3342 +
3343 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/board_setup.c linux-mips/arch/mips/au1000/pb1200/board_setup.c
3344 --- linux-2.4.29/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
3345 +++ linux-mips/arch/mips/au1000/pb1200/board_setup.c 2005-03-13 09:04:16.000000000 +0100
3346 @@ -0,0 +1,216 @@
3347 +/*
3348 + *
3349 + * BRIEF MODULE DESCRIPTION
3350 + * Alchemy Pb1200 board setup.
3351 + *
3352 + * This program is free software; you can redistribute it and/or modify it
3353 + * under the terms of the GNU General Public License as published by the
3354 + * Free Software Foundation; either version 2 of the License, or (at your
3355 + * option) any later version.
3356 + *
3357 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3358 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3359 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3360 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3361 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3362 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3363 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3364 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3365 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3366 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3367 + *
3368 + * You should have received a copy of the GNU General Public License along
3369 + * with this program; if not, write to the Free Software Foundation, Inc.,
3370 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3371 + */
3372 +#include <linux/config.h>
3373 +#include <linux/init.h>
3374 +#include <linux/sched.h>
3375 +#include <linux/ioport.h>
3376 +#include <linux/mm.h>
3377 +#include <linux/console.h>
3378 +#include <linux/mc146818rtc.h>
3379 +#include <linux/delay.h>
3380 +
3381 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3382 +#include <linux/ide.h>
3383 +#endif
3384 +
3385 +#include <asm/cpu.h>
3386 +#include <asm/bootinfo.h>
3387 +#include <asm/irq.h>
3388 +#include <asm/keyboard.h>
3389 +#include <asm/mipsregs.h>
3390 +#include <asm/reboot.h>
3391 +#include <asm/pgtable.h>
3392 +#include <asm/au1000.h>
3393 +#include <asm/au1xxx_dbdma.h>
3394 +
3395 +#ifdef CONFIG_MIPS_PB1200
3396 +#include <asm/pb1200.h>
3397 +#endif
3398 +
3399 +#ifdef CONFIG_MIPS_DB1200
3400 +#include <asm/db1200.h>
3401 +#define PB1200_ETH_INT DB1200_ETH_INT
3402 +#define PB1200_IDE_INT DB1200_IDE_INT
3403 +#endif
3404 +
3405 +extern struct rtc_ops no_rtc_ops;
3406 +
3407 +extern void _board_init_irq(void);
3408 +extern void (*board_init_irq)(void);
3409 +
3410 +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
3411 +extern struct ide_ops *ide_ops;
3412 +extern struct ide_ops au1xxx_ide_ops;
3413 +extern u32 au1xxx_ide_virtbase;
3414 +extern u64 au1xxx_ide_physbase;
3415 +extern int au1xxx_ide_irq;
3416 +
3417 +u32 led_base_addr;
3418 +/* Ddma */
3419 +chan_tab_t *ide_read_ch, *ide_write_ch;
3420 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3421 +
3422 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
3423 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3424 +
3425 +void board_reset (void)
3426 +{
3427 + bcsr->resets = 0;
3428 +}
3429 +
3430 +void __init board_setup(void)
3431 +{
3432 + char *argptr = NULL;
3433 + u32 pin_func;
3434 + rtc_ops = &no_rtc_ops;
3435 +
3436 +#if 0
3437 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
3438 + * but it is board specific code, so put it here.
3439 + */
3440 + pin_func = au_readl(SYS_PINFUNC);
3441 + au_sync();
3442 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
3443 + au_writel(pin_func, SYS_PINFUNC);
3444 +
3445 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3446 + au_sync();
3447 +#endif
3448 +
3449 +#if defined( CONFIG_I2C_ALGO_AU1550 )
3450 + {
3451 + u32 freq0, clksrc;
3452 +
3453 + /* Select SMBUS in CPLD */
3454 + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
3455 +
3456 + pin_func = au_readl(SYS_PINFUNC);
3457 + au_sync();
3458 + pin_func &= ~(3<<17 | 1<<4);
3459 + /* Set GPIOs correctly */
3460 + pin_func |= 2<<17;
3461 + au_writel(pin_func, SYS_PINFUNC);
3462 + au_sync();
3463 +
3464 + /* The i2c driver depends on 50Mhz clock */
3465 + freq0 = au_readl(SYS_FREQCTRL0);
3466 + au_sync();
3467 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
3468 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
3469 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
3470 + au_writel(freq0, SYS_FREQCTRL0);
3471 + au_sync();
3472 + freq0 |= SYS_FC_FE1;
3473 + au_writel(freq0, SYS_FREQCTRL0);
3474 + au_sync();
3475 +
3476 + clksrc = au_readl(SYS_CLKSRC);
3477 + au_sync();
3478 + clksrc &= ~0x01f00000;
3479 + /* bit 22 is EXTCLK0 for PSC0 */
3480 + clksrc |= (0x3 << 22);
3481 + au_writel(clksrc, SYS_CLKSRC);
3482 + au_sync();
3483 + }
3484 +#endif
3485 +
3486 +#ifdef CONFIG_FB_AU1200
3487 + argptr = prom_getcmdline();
3488 + strcat(argptr, " video=au1200fb:");
3489 +#endif
3490 +
3491 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3492 + /*
3493 + * Iniz IDE parameters
3494 + */
3495 + ide_ops = &au1xxx_ide_ops;
3496 + au1xxx_ide_irq = PB1200_IDE_INT;
3497 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3498 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3499 + /*
3500 + * change PIO or PIO+Ddma
3501 + * check the GPIO-5 pin condition. pb1200:s18_dot */
3502 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
3503 +#endif
3504 +
3505 + /* The Pb1200 development board uses external MUX for PSC0 to
3506 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
3507 + */
3508 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
3509 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
3510 + Refer to Pb1200/Db1200 documentation.
3511 +#elif defined( CONFIG_AU1550_PSC_SPI )
3512 + bcsr->resets |= BCSR_RESETS_PCS0MUX;
3513 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
3514 + bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
3515 +#endif
3516 + au_sync();
3517 +
3518 +#ifdef CONFIG_MIPS_PB1200
3519 + printk("AMD Alchemy Pb1200 Board\n");
3520 +#endif
3521 +#ifdef CONFIG_MIPS_DB1200
3522 + printk("AMD Alchemy Db1200 Board\n");
3523 +#endif
3524 +
3525 + /* Setup Pb1200 External Interrupt Controller */
3526 + {
3527 + extern void (*board_init_irq)(void);
3528 + extern void _board_init_irq(void);
3529 + board_init_irq = _board_init_irq;
3530 + }
3531 +}
3532 +
3533 +int
3534 +board_au1200fb_panel (void)
3535 +{
3536 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3537 + int p;
3538 +
3539 + p = bcsr->switches;
3540 + p >>= 8;
3541 + p &= 0x0F;
3542 + return p;
3543 +}
3544 +
3545 +int
3546 +board_au1200fb_panel_init (void)
3547 +{
3548 + /* Apply power */
3549 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3550 + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3551 + return 0;
3552 +}
3553 +
3554 +int
3555 +board_au1200fb_panel_shutdown (void)
3556 +{
3557 + /* Remove power */
3558 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3559 + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3560 + return 0;
3561 +}
3562 +
3563 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/init.c linux-mips/arch/mips/au1000/pb1200/init.c
3564 --- linux-2.4.29/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
3565 +++ linux-mips/arch/mips/au1000/pb1200/init.c 2005-01-30 09:01:28.000000000 +0100
3566 @@ -0,0 +1,72 @@
3567 +/*
3568 + *
3569 + * BRIEF MODULE DESCRIPTION
3570 + * PB1200 board setup
3571 + *
3572 + * This program is free software; you can redistribute it and/or modify it
3573 + * under the terms of the GNU General Public License as published by the
3574 + * Free Software Foundation; either version 2 of the License, or (at your
3575 + * option) any later version.
3576 + *
3577 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3578 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3579 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3580 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3581 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3582 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3583 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3584 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3585 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3586 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3587 + *
3588 + * You should have received a copy of the GNU General Public License along
3589 + * with this program; if not, write to the Free Software Foundation, Inc.,
3590 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3591 + */
3592 +
3593 +#include <linux/init.h>
3594 +#include <linux/mm.h>
3595 +#include <linux/sched.h>
3596 +#include <linux/bootmem.h>
3597 +#include <asm/addrspace.h>
3598 +#include <asm/bootinfo.h>
3599 +#include <linux/config.h>
3600 +#include <linux/string.h>
3601 +#include <linux/kernel.h>
3602 +#include <linux/sched.h>
3603 +
3604 +int prom_argc;
3605 +char **prom_argv, **prom_envp;
3606 +extern void __init prom_init_cmdline(void);
3607 +extern char *prom_getenv(char *envname);
3608 +
3609 +const char *get_system_type(void)
3610 +{
3611 + return "AMD Alchemy Au1200/Pb1200";
3612 +}
3613 +
3614 +u32 mae_memsize = 0;
3615 +
3616 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
3617 +{
3618 + unsigned char *memsize_str;
3619 + unsigned long memsize;
3620 +
3621 + prom_argc = argc;
3622 + prom_argv = argv;
3623 + prom_envp = envp;
3624 +
3625 + mips_machgroup = MACH_GROUP_ALCHEMY;
3626 + mips_machtype = MACH_PB1000; /* set the platform # */
3627 + prom_init_cmdline();
3628 +
3629 + memsize_str = prom_getenv("memsize");
3630 + if (!memsize_str) {
3631 + memsize = 0x08000000;
3632 + } else {
3633 + memsize = simple_strtol(memsize_str, NULL, 0);
3634 + }
3635 + add_memory_region(0, memsize, BOOT_MEM_RAM);
3636 + return 0;
3637 +}
3638 +
3639 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/irqmap.c linux-mips/arch/mips/au1000/pb1200/irqmap.c
3640 --- linux-2.4.29/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
3641 +++ linux-mips/arch/mips/au1000/pb1200/irqmap.c 2005-01-30 09:01:28.000000000 +0100
3642 @@ -0,0 +1,180 @@
3643 +/*
3644 + * BRIEF MODULE DESCRIPTION
3645 + * Au1xxx irq map table
3646 + *
3647 + * This program is free software; you can redistribute it and/or modify it
3648 + * under the terms of the GNU General Public License as published by the
3649 + * Free Software Foundation; either version 2 of the License, or (at your
3650 + * option) any later version.
3651 + *
3652 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3653 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3654 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3655 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3656 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3657 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3658 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3659 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3660 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3661 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3662 + *
3663 + * You should have received a copy of the GNU General Public License along
3664 + * with this program; if not, write to the Free Software Foundation, Inc.,
3665 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3666 + */
3667 +#include <linux/errno.h>
3668 +#include <linux/init.h>
3669 +#include <linux/irq.h>
3670 +#include <linux/kernel_stat.h>
3671 +#include <linux/module.h>
3672 +#include <linux/signal.h>
3673 +#include <linux/sched.h>
3674 +#include <linux/types.h>
3675 +#include <linux/interrupt.h>
3676 +#include <linux/ioport.h>
3677 +#include <linux/timex.h>
3678 +#include <linux/slab.h>
3679 +#include <linux/random.h>
3680 +#include <linux/delay.h>
3681 +
3682 +#include <asm/bitops.h>
3683 +#include <asm/bootinfo.h>
3684 +#include <asm/io.h>
3685 +#include <asm/mipsregs.h>
3686 +#include <asm/system.h>
3687 +#include <asm/au1000.h>
3688 +
3689 +#ifdef CONFIG_MIPS_PB1200
3690 +#include <asm/pb1200.h>
3691 +#endif
3692 +
3693 +#ifdef CONFIG_MIPS_DB1200
3694 +#include <asm/db1200.h>
3695 +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
3696 +#define PB1200_INT_END DB1200_INT_END
3697 +#endif
3698 +
3699 +au1xxx_irq_map_t au1xxx_irq_map[] = {
3700 + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
3701 +};
3702 +
3703 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3704 +
3705 +/*
3706 + * Support for External interrupts on the PbAu1200 Development platform.
3707 + */
3708 +static volatile int pb1200_cascade_en=0;
3709 +
3710 +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
3711 +{
3712 + unsigned short bisr = bcsr->int_status;
3713 + int extirq_nr = 0;
3714 +
3715 + /* Clear all the edge interrupts. This has no effect on level */
3716 + bcsr->int_status = bisr;
3717 + for( ; bisr; bisr &= (bisr-1) )
3718 + {
3719 + extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
3720 + /* Ack and dispatch IRQ */
3721 + do_IRQ(extirq_nr,regs);
3722 + }
3723 +}
3724 +
3725 +inline void pb1200_enable_irq(unsigned int irq_nr)
3726 +{
3727 + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3728 + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
3729 +}
3730 +
3731 +inline void pb1200_disable_irq(unsigned int irq_nr)
3732 +{
3733 + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3734 + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
3735 +}
3736 +
3737 +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
3738 +{
3739 + if (++pb1200_cascade_en == 1)
3740 + {
3741 + request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
3742 + 0, "Pb1200 Cascade", &pb1200_cascade_handler );
3743 +#ifdef CONFIG_MIPS_PB1200
3744 + /* We have a problem with CPLD rev3. Enable a workaround */
3745 + if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
3746 + {
3747 + printk("\nWARNING!!!\n");
3748 + printk("\nWARNING!!!\n");
3749 + printk("\nWARNING!!!\n");
3750 + printk("\nWARNING!!!\n");
3751 + printk("\nWARNING!!!\n");
3752 + printk("\nWARNING!!!\n");
3753 + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
3754 + printk("updated to latest revision. This software will not\n");
3755 + printk("work on anything less than CPLD rev4\n");
3756 + printk("\nWARNING!!!\n");
3757 + printk("\nWARNING!!!\n");
3758 + printk("\nWARNING!!!\n");
3759 + printk("\nWARNING!!!\n");
3760 + printk("\nWARNING!!!\n");
3761 + printk("\nWARNING!!!\n");
3762 + while(1);
3763 + }
3764 +#endif
3765 + }
3766 + pb1200_enable_irq(irq_nr);
3767 + return 0;
3768 +}
3769 +
3770 +static void pb1200_shutdown_irq( unsigned int irq_nr )
3771 +{
3772 + pb1200_disable_irq(irq_nr);
3773 + if (--pb1200_cascade_en == 0)
3774 + {
3775 + free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
3776 + }
3777 + return;
3778 +}
3779 +
3780 +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
3781 +{
3782 + pb1200_disable_irq( irq_nr );
3783 +}
3784 +
3785 +static void pb1200_end_irq(unsigned int irq_nr)
3786 +{
3787 + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
3788 + pb1200_enable_irq(irq_nr);
3789 + }
3790 +}
3791 +
3792 +static struct hw_interrupt_type external_irq_type =
3793 +{
3794 +#ifdef CONFIG_MIPS_PB1200
3795 + "Pb1200 Ext",
3796 +#endif
3797 +#ifdef CONFIG_MIPS_DB1200
3798 + "Db1200 Ext",
3799 +#endif
3800 + pb1200_startup_irq,
3801 + pb1200_shutdown_irq,
3802 + pb1200_enable_irq,
3803 + pb1200_disable_irq,
3804 + pb1200_mask_and_ack_irq,
3805 + pb1200_end_irq,
3806 + NULL
3807 +};
3808 +
3809 +void _board_init_irq(void)
3810 +{
3811 + int irq_nr;
3812 +
3813 + for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
3814 + {
3815 + irq_desc[irq_nr].handler = &external_irq_type;
3816 + pb1200_disable_irq(irq_nr);
3817 + }
3818 +
3819 + /* GPIO_7 can not be hooked here, so it is hooked upon first
3820 + request of any source attached to the cascade */
3821 +}
3822 +
3823 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/Makefile linux-mips/arch/mips/au1000/pb1200/Makefile
3824 --- linux-2.4.29/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
3825 +++ linux-mips/arch/mips/au1000/pb1200/Makefile 2005-01-30 09:01:27.000000000 +0100
3826 @@ -0,0 +1,25 @@
3827 +#
3828 +# Copyright 2000 MontaVista Software Inc.
3829 +# Author: MontaVista Software, Inc.
3830 +# ppopov@mvista.com or source@mvista.com
3831 +#
3832 +# Makefile for the Alchemy Semiconductor PB1000 board.
3833 +#
3834 +# Note! Dependencies are done automagically by 'make dep', which also
3835 +# removes any old dependencies. DON'T put your own dependencies here
3836 +# unless it's something special (ie not a .c file).
3837 +#
3838 +
3839 +USE_STANDARD_AS_RULE := true
3840 +
3841 +O_TARGET := pb1200.o
3842 +
3843 +obj-y := init.o board_setup.o irqmap.o
3844 +
3845 +ifdef CONFIG_MMC
3846 +obj-y += mmc_support.o
3847 +export-objs +=mmc_support.o
3848 +endif
3849 +
3850 +
3851 +include $(TOPDIR)/Rules.make
3852 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/mmc_support.c linux-mips/arch/mips/au1000/pb1200/mmc_support.c
3853 --- linux-2.4.29/arch/mips/au1000/pb1200/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3854 +++ linux-mips/arch/mips/au1000/pb1200/mmc_support.c 2005-01-30 09:01:28.000000000 +0100
3855 @@ -0,0 +1,141 @@
3856 +/*
3857 + * BRIEF MODULE DESCRIPTION
3858 + *
3859 + * MMC support routines for PB1200.
3860 + *
3861 + *
3862 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3863 + * Author: Embedded Edge, LLC.
3864 + * Contact: dan@embeddededge.com
3865 + *
3866 + * This program is free software; you can redistribute it and/or modify it
3867 + * under the terms of the GNU General Public License as published by the
3868 + * Free Software Foundation; either version 2 of the License, or (at your
3869 + * option) any later version.
3870 + *
3871 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3872 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3873 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3874 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3875 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3876 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3877 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3878 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3879 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3880 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3881 + *
3882 + * You should have received a copy of the GNU General Public License along
3883 + * with this program; if not, write to the Free Software Foundation, Inc.,
3884 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3885 + *
3886 + */
3887 +
3888 +
3889 +#include <linux/config.h>
3890 +#include <linux/kernel.h>
3891 +#include <linux/module.h>
3892 +#include <linux/init.h>
3893 +
3894 +#include <asm/irq.h>
3895 +#include <asm/au1000.h>
3896 +#include <asm/au1100_mmc.h>
3897 +
3898 +#ifdef CONFIG_MIPS_PB1200
3899 +#include <asm/pb1200.h>
3900 +#endif
3901 +
3902 +#ifdef CONFIG_MIPS_DB1200
3903 +/* NOTE: DB1200 only has SD0 pinned out and usable */
3904 +#include <asm/db1200.h>
3905 +#endif
3906 +
3907 +/* SD/MMC controller support functions */
3908 +
3909 +/*
3910 + * Detect card.
3911 + */
3912 +void mmc_card_inserted(int socket, int *result)
3913 +{
3914 + u16 mask;
3915 +
3916 + if (socket)
3917 +#ifdef CONFIG_MIPS_DB1200
3918 + mask = 0;
3919 +#else
3920 + mask = BCSR_INT_SD1INSERT;
3921 +#endif
3922 + else
3923 + mask = BCSR_INT_SD0INSERT;
3924 +
3925 + *result = ((bcsr->sig_status & mask) != 0);
3926 +}
3927 +
3928 +/*
3929 + * Check card write protection.
3930 + */
3931 +void mmc_card_writable(int socket, int *result)
3932 +{
3933 + u16 mask;
3934 +
3935 + if (socket)
3936 +#ifdef CONFIG_MIPS_DB1200
3937 + mask = 0;
3938 +#else
3939 + mask = BCSR_STATUS_SD1WP;
3940 +#endif
3941 + else
3942 + mask = BCSR_STATUS_SD0WP;
3943 +
3944 + /* low means card writable */
3945 + if (!(bcsr->status & mask)) {
3946 + *result = 1;
3947 + } else {
3948 + *result = 0;
3949 + }
3950 +}
3951 +
3952 +/*
3953 + * Apply power to card slot.
3954 + */
3955 +void mmc_power_on(int socket)
3956 +{
3957 + u16 mask;
3958 +
3959 + if (socket)
3960 +#ifdef CONFIG_MIPS_DB1200
3961 + mask = 0;
3962 +#else
3963 + mask = BCSR_BOARD_SD1PWR;
3964 +#endif
3965 + else
3966 + mask = BCSR_BOARD_SD0PWR;
3967 +
3968 + bcsr->board |= mask;
3969 + au_sync_delay(1);
3970 +}
3971 +
3972 +/*
3973 + * Remove power from card slot.
3974 + */
3975 +void mmc_power_off(int socket)
3976 +{
3977 + u16 mask;
3978 +
3979 + if (socket)
3980 +#ifdef CONFIG_MIPS_DB1200
3981 + mask = 0;
3982 +#else
3983 + mask = BCSR_BOARD_SD1PWR;
3984 +#endif
3985 + else
3986 + mask = BCSR_BOARD_SD0PWR;
3987 +
3988 + bcsr->board &= ~mask;
3989 + au_sync_delay(1);
3990 +}
3991 +
3992 +EXPORT_SYMBOL(mmc_card_inserted);
3993 +EXPORT_SYMBOL(mmc_card_writable);
3994 +EXPORT_SYMBOL(mmc_power_on);
3995 +EXPORT_SYMBOL(mmc_power_off);
3996 +
3997 diff -Nur linux-2.4.29/arch/mips/au1000/pb1550/board_setup.c linux-mips/arch/mips/au1000/pb1550/board_setup.c
3998 --- linux-2.4.29/arch/mips/au1000/pb1550/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3999 +++ linux-mips/arch/mips/au1000/pb1550/board_setup.c 2005-01-30 09:01:28.000000000 +0100
4000 @@ -48,6 +48,16 @@
4001
4002 extern struct rtc_ops no_rtc_ops;
4003
4004 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4005 +extern struct ide_ops *ide_ops;
4006 +extern struct ide_ops au1xxx_ide_ops;
4007 +extern u32 au1xxx_ide_virtbase;
4008 +extern u64 au1xxx_ide_physbase;
4009 +extern unsigned int au1xxx_ide_irq;
4010 +
4011 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
4012 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
4013 +
4014 void board_reset (void)
4015 {
4016 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
4017 @@ -78,5 +88,36 @@
4018 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
4019 au_sync();
4020
4021 +#if defined(CONFIG_AU1XXX_SMC91111)
4022 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4023 +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
4024 +#else
4025 +#define CPLD_CONTROL (0xAF00000C)
4026 + {
4027 + /* set up the Static Bus timing */
4028 + /* only 396Mhz */
4029 + /* reset the DC */
4030 + au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
4031 + au_writel(0x00010003, MEM_STCFG0);
4032 + au_writel(0x000c00c0, MEM_STCFG2);
4033 + au_writel(0x85E1900D, MEM_STTIME2);
4034 + }
4035 +#endif
4036 +#endif /* end CONFIG_SMC91111 */
4037 +
4038 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4039 + /*
4040 + * Iniz IDE parameters
4041 + */
4042 + ide_ops = &au1xxx_ide_ops;
4043 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
4044 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
4045 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
4046 + /*
4047 + * change PIO or PIO+Ddma
4048 + * check the GPIO-6 pin condition. pb1550:s15_dot
4049 + */
4050 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
4051 +#endif
4052 printk("AMD Alchemy Pb1550 Board\n");
4053 }
4054 diff -Nur linux-2.4.29/arch/mips/au1000/pb1550/irqmap.c linux-mips/arch/mips/au1000/pb1550/irqmap.c
4055 --- linux-2.4.29/arch/mips/au1000/pb1550/irqmap.c 2005-01-19 15:09:26.000000000 +0100
4056 +++ linux-mips/arch/mips/au1000/pb1550/irqmap.c 2005-01-30 09:01:28.000000000 +0100
4057 @@ -50,6 +50,9 @@
4058 au1xxx_irq_map_t au1xxx_irq_map[] = {
4059 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
4060 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
4061 +#ifdef CONFIG_AU1XXX_SMC91111
4062 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
4063 +#endif
4064 };
4065
4066 int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
4067 diff -Nur linux-2.4.29/arch/mips/config-shared.in linux-mips/arch/mips/config-shared.in
4068 --- linux-2.4.29/arch/mips/config-shared.in 2005-01-19 15:09:27.000000000 +0100
4069 +++ linux-mips/arch/mips/config-shared.in 2005-01-30 09:01:26.000000000 +0100
4070 @@ -21,16 +21,19 @@
4071 comment 'Machine selection'
4072 dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
4073 dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
4074 +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
4075 dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
4076 dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
4077 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
4078 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
4079 dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
4080 +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
4081 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
4082 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
4083 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
4084 -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4085 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
4086 +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
4087 +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4088 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
4089 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
4090 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
4091 @@ -249,6 +252,12 @@
4092 define_bool CONFIG_PC_KEYB y
4093 define_bool CONFIG_NONCOHERENT_IO y
4094 fi
4095 +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
4096 + define_bool CONFIG_SOC_AU1X00 y
4097 + define_bool CONFIG_SOC_AU1200 y
4098 + define_bool CONFIG_NONCOHERENT_IO y
4099 + define_bool CONFIG_PC_KEYB y
4100 +fi
4101 if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
4102 define_bool CONFIG_SOC_AU1X00 y
4103 define_bool CONFIG_SOC_AU1500 y
4104 @@ -263,6 +272,12 @@
4105 define_bool CONFIG_SWAP_IO_SPACE_W y
4106 define_bool CONFIG_SWAP_IO_SPACE_L y
4107 fi
4108 +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4109 + define_bool CONFIG_SOC_AU1X00 y
4110 + define_bool CONFIG_SOC_AU1500 y
4111 + define_bool CONFIG_NONCOHERENT_IO y
4112 + define_bool CONFIG_PC_KEYB y
4113 +fi
4114 if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
4115 define_bool CONFIG_SOC_AU1X00 y
4116 define_bool CONFIG_SOC_AU1100 y
4117 @@ -271,9 +286,15 @@
4118 define_bool CONFIG_SWAP_IO_SPACE_W y
4119 define_bool CONFIG_SWAP_IO_SPACE_L y
4120 fi
4121 -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4122 +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4123 define_bool CONFIG_SOC_AU1X00 y
4124 - define_bool CONFIG_SOC_AU1500 y
4125 + define_bool CONFIG_SOC_AU1550 y
4126 + define_bool CONFIG_NONCOHERENT_IO n
4127 + define_bool CONFIG_PC_KEYB y
4128 +fi
4129 +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
4130 + define_bool CONFIG_SOC_AU1X00 y
4131 + define_bool CONFIG_SOC_AU1200 y
4132 define_bool CONFIG_NONCOHERENT_IO y
4133 define_bool CONFIG_PC_KEYB y
4134 fi
4135 @@ -290,18 +311,24 @@
4136 define_bool CONFIG_NONCOHERENT_IO y
4137 define_bool CONFIG_PC_KEYB y
4138 fi
4139 +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4140 + define_bool CONFIG_SOC_AU1X00 y
4141 + define_bool CONFIG_SOC_AU1100 y
4142 + define_bool CONFIG_NONCOHERENT_IO y
4143 + define_bool CONFIG_PC_KEYB y
4144 + define_bool CONFIG_SWAP_IO_SPACE y
4145 +fi
4146 if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
4147 define_bool CONFIG_SOC_AU1X00 y
4148 define_bool CONFIG_SOC_AU1550 y
4149 define_bool CONFIG_NONCOHERENT_IO y
4150 define_bool CONFIG_PC_KEYB y
4151 fi
4152 -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4153 +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
4154 define_bool CONFIG_SOC_AU1X00 y
4155 - define_bool CONFIG_SOC_AU1100 y
4156 + define_bool CONFIG_SOC_AU1200 y
4157 define_bool CONFIG_NONCOHERENT_IO y
4158 define_bool CONFIG_PC_KEYB y
4159 - define_bool CONFIG_SWAP_IO_SPACE y
4160 fi
4161 if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
4162 define_bool CONFIG_SOC_AU1X00 y
4163 @@ -327,12 +354,6 @@
4164 define_bool CONFIG_NONCOHERENT_IO y
4165 define_bool CONFIG_PC_KEYB y
4166 fi
4167 -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4168 - define_bool CONFIG_SOC_AU1X00 y
4169 - define_bool CONFIG_SOC_AU1550 y
4170 - define_bool CONFIG_NONCOHERENT_IO n
4171 - define_bool CONFIG_PC_KEYB y
4172 -fi
4173 if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
4174 define_bool CONFIG_BOOT_ELF32 y
4175 define_bool CONFIG_COBALT_LCD y
4176 @@ -729,6 +750,13 @@
4177 "$CONFIG_MIPS_PB1000" = "y" -o \
4178 "$CONFIG_MIPS_PB1100" = "y" -o \
4179 "$CONFIG_MIPS_PB1500" = "y" -o \
4180 + "$CONFIG_MIPS_PB1550" = "y" -o \
4181 + "$CONFIG_MIPS_PB1200" = "y" -o \
4182 + "$CONFIG_MIPS_DB1000" = "y" -o \
4183 + "$CONFIG_MIPS_DB1100" = "y" -o \
4184 + "$CONFIG_MIPS_DB1500" = "y" -o \
4185 + "$CONFIG_MIPS_DB1550" = "y" -o \
4186 + "$CONFIG_MIPS_DB1200" = "y" -o \
4187 "$CONFIG_NEC_OSPREY" = "y" -o \
4188 "$CONFIG_NEC_EAGLE" = "y" -o \
4189 "$CONFIG_NINO" = "y" -o \
4190 diff -Nur linux-2.4.29/arch/mips/defconfig linux-mips/arch/mips/defconfig
4191 --- linux-2.4.29/arch/mips/defconfig 2005-01-19 15:09:27.000000000 +0100
4192 +++ linux-mips/arch/mips/defconfig 2005-01-09 20:33:59.000000000 +0100
4193 @@ -235,11 +235,6 @@
4194 #
4195 # CONFIG_IPX is not set
4196 # CONFIG_ATALK is not set
4197 -
4198 -#
4199 -# Appletalk devices
4200 -#
4201 -# CONFIG_DEV_APPLETALK is not set
4202 # CONFIG_DECNET is not set
4203 # CONFIG_BRIDGE is not set
4204 # CONFIG_X25 is not set
4205 @@ -319,6 +314,7 @@
4206 # CONFIG_SCSI_MEGARAID is not set
4207 # CONFIG_SCSI_MEGARAID2 is not set
4208 # CONFIG_SCSI_SATA is not set
4209 +# CONFIG_SCSI_SATA_AHCI is not set
4210 # CONFIG_SCSI_SATA_SVW is not set
4211 # CONFIG_SCSI_ATA_PIIX is not set
4212 # CONFIG_SCSI_SATA_NV is not set
4213 diff -Nur linux-2.4.29/arch/mips/defconfig-atlas linux-mips/arch/mips/defconfig-atlas
4214 --- linux-2.4.29/arch/mips/defconfig-atlas 2005-01-19 15:09:27.000000000 +0100
4215 +++ linux-mips/arch/mips/defconfig-atlas 2005-01-09 20:33:59.000000000 +0100
4216 @@ -235,11 +235,6 @@
4217 #
4218 # CONFIG_IPX is not set
4219 # CONFIG_ATALK is not set
4220 -
4221 -#
4222 -# Appletalk devices
4223 -#
4224 -# CONFIG_DEV_APPLETALK is not set
4225 # CONFIG_DECNET is not set
4226 # CONFIG_BRIDGE is not set
4227 # CONFIG_X25 is not set
4228 @@ -317,6 +312,7 @@
4229 # CONFIG_SCSI_MEGARAID is not set
4230 # CONFIG_SCSI_MEGARAID2 is not set
4231 # CONFIG_SCSI_SATA is not set
4232 +# CONFIG_SCSI_SATA_AHCI is not set
4233 # CONFIG_SCSI_SATA_SVW is not set
4234 # CONFIG_SCSI_ATA_PIIX is not set
4235 # CONFIG_SCSI_SATA_NV is not set
4236 diff -Nur linux-2.4.29/arch/mips/defconfig-bosporus linux-mips/arch/mips/defconfig-bosporus
4237 --- linux-2.4.29/arch/mips/defconfig-bosporus 2005-01-19 15:09:27.000000000 +0100
4238 +++ linux-mips/arch/mips/defconfig-bosporus 2005-01-30 09:01:26.000000000 +0100
4239 @@ -373,11 +373,6 @@
4240 #
4241 # CONFIG_IPX is not set
4242 # CONFIG_ATALK is not set
4243 -
4244 -#
4245 -# Appletalk devices
4246 -#
4247 -# CONFIG_DEV_APPLETALK is not set
4248 # CONFIG_DECNET is not set
4249 # CONFIG_BRIDGE is not set
4250 # CONFIG_X25 is not set
4251 @@ -457,6 +452,7 @@
4252 # CONFIG_SCSI_MEGARAID is not set
4253 # CONFIG_SCSI_MEGARAID2 is not set
4254 # CONFIG_SCSI_SATA is not set
4255 +# CONFIG_SCSI_SATA_AHCI is not set
4256 # CONFIG_SCSI_SATA_SVW is not set
4257 # CONFIG_SCSI_ATA_PIIX is not set
4258 # CONFIG_SCSI_SATA_NV is not set
4259 @@ -899,7 +895,7 @@
4260 # CONFIG_USB_UHCI is not set
4261 # CONFIG_USB_UHCI_ALT is not set
4262 CONFIG_USB_OHCI=y
4263 -
4264 +CONFIG_USB_NON_PCI_OHCI=y
4265 #
4266 # USB Device Class drivers
4267 #
4268 diff -Nur linux-2.4.29/arch/mips/defconfig-capcella linux-mips/arch/mips/defconfig-capcella
4269 --- linux-2.4.29/arch/mips/defconfig-capcella 2005-01-19 15:09:27.000000000 +0100
4270 +++ linux-mips/arch/mips/defconfig-capcella 2005-01-09 20:33:59.000000000 +0100
4271 @@ -228,11 +228,6 @@
4272 #
4273 # CONFIG_IPX is not set
4274 # CONFIG_ATALK is not set
4275 -
4276 -#
4277 -# Appletalk devices
4278 -#
4279 -# CONFIG_DEV_APPLETALK is not set
4280 # CONFIG_DECNET is not set
4281 # CONFIG_BRIDGE is not set
4282 # CONFIG_X25 is not set
4283 diff -Nur linux-2.4.29/arch/mips/defconfig-cobalt linux-mips/arch/mips/defconfig-cobalt
4284 --- linux-2.4.29/arch/mips/defconfig-cobalt 2005-01-19 15:09:28.000000000 +0100
4285 +++ linux-mips/arch/mips/defconfig-cobalt 2005-01-09 20:33:59.000000000 +0100
4286 @@ -222,11 +222,6 @@
4287 #
4288 # CONFIG_IPX is not set
4289 # CONFIG_ATALK is not set
4290 -
4291 -#
4292 -# Appletalk devices
4293 -#
4294 -# CONFIG_DEV_APPLETALK is not set
4295 # CONFIG_DECNET is not set
4296 # CONFIG_BRIDGE is not set
4297 # CONFIG_X25 is not set
4298 diff -Nur linux-2.4.29/arch/mips/defconfig-csb250 linux-mips/arch/mips/defconfig-csb250
4299 --- linux-2.4.29/arch/mips/defconfig-csb250 2005-01-19 15:09:28.000000000 +0100
4300 +++ linux-mips/arch/mips/defconfig-csb250 2005-01-09 20:33:59.000000000 +0100
4301 @@ -268,11 +268,6 @@
4302 #
4303 # CONFIG_IPX is not set
4304 # CONFIG_ATALK is not set
4305 -
4306 -#
4307 -# Appletalk devices
4308 -#
4309 -# CONFIG_DEV_APPLETALK is not set
4310 # CONFIG_DECNET is not set
4311 # CONFIG_BRIDGE is not set
4312 # CONFIG_X25 is not set
4313 diff -Nur linux-2.4.29/arch/mips/defconfig-db1000 linux-mips/arch/mips/defconfig-db1000
4314 --- linux-2.4.29/arch/mips/defconfig-db1000 2005-01-19 15:09:28.000000000 +0100
4315 +++ linux-mips/arch/mips/defconfig-db1000 2005-02-03 07:35:29.000000000 +0100
4316 @@ -22,16 +22,19 @@
4317 #
4318 # CONFIG_ACER_PICA_61 is not set
4319 # CONFIG_MIPS_BOSPORUS is not set
4320 +# CONFIG_MIPS_FICMMP is not set
4321 # CONFIG_MIPS_MIRAGE is not set
4322 CONFIG_MIPS_DB1000=y
4323 # CONFIG_MIPS_DB1100 is not set
4324 # CONFIG_MIPS_DB1500 is not set
4325 # CONFIG_MIPS_DB1550 is not set
4326 +# CONFIG_MIPS_DB1200 is not set
4327 # CONFIG_MIPS_PB1000 is not set
4328 # CONFIG_MIPS_PB1100 is not set
4329 # CONFIG_MIPS_PB1500 is not set
4330 -# CONFIG_MIPS_HYDROGEN3 is not set
4331 # CONFIG_MIPS_PB1550 is not set
4332 +# CONFIG_MIPS_PB1200 is not set
4333 +# CONFIG_MIPS_HYDROGEN3 is not set
4334 # CONFIG_MIPS_XXS1500 is not set
4335 # CONFIG_MIPS_MTX1 is not set
4336 # CONFIG_COGENT_CSB250 is not set
4337 @@ -342,11 +345,6 @@
4338 #
4339 # CONFIG_IPX is not set
4340 # CONFIG_ATALK is not set
4341 -
4342 -#
4343 -# Appletalk devices
4344 -#
4345 -# CONFIG_DEV_APPLETALK is not set
4346 # CONFIG_DECNET is not set
4347 # CONFIG_BRIDGE is not set
4348 # CONFIG_X25 is not set
4349 diff -Nur linux-2.4.29/arch/mips/defconfig-db1100 linux-mips/arch/mips/defconfig-db1100
4350 --- linux-2.4.29/arch/mips/defconfig-db1100 2005-01-19 15:09:28.000000000 +0100
4351 +++ linux-mips/arch/mips/defconfig-db1100 2005-02-03 07:35:29.000000000 +0100
4352 @@ -22,16 +22,19 @@
4353 #
4354 # CONFIG_ACER_PICA_61 is not set
4355 # CONFIG_MIPS_BOSPORUS is not set
4356 +# CONFIG_MIPS_FICMMP is not set
4357 # CONFIG_MIPS_MIRAGE is not set
4358 # CONFIG_MIPS_DB1000 is not set
4359 CONFIG_MIPS_DB1100=y
4360 # CONFIG_MIPS_DB1500 is not set
4361 # CONFIG_MIPS_DB1550 is not set
4362 +# CONFIG_MIPS_DB1200 is not set
4363 # CONFIG_MIPS_PB1000 is not set
4364 # CONFIG_MIPS_PB1100 is not set
4365 # CONFIG_MIPS_PB1500 is not set
4366 -# CONFIG_MIPS_HYDROGEN3 is not set
4367 # CONFIG_MIPS_PB1550 is not set
4368 +# CONFIG_MIPS_PB1200 is not set
4369 +# CONFIG_MIPS_HYDROGEN3 is not set
4370 # CONFIG_MIPS_XXS1500 is not set
4371 # CONFIG_MIPS_MTX1 is not set
4372 # CONFIG_COGENT_CSB250 is not set
4373 @@ -342,11 +345,6 @@
4374 #
4375 # CONFIG_IPX is not set
4376 # CONFIG_ATALK is not set
4377 -
4378 -#
4379 -# Appletalk devices
4380 -#
4381 -# CONFIG_DEV_APPLETALK is not set
4382 # CONFIG_DECNET is not set
4383 # CONFIG_BRIDGE is not set
4384 # CONFIG_X25 is not set
4385 diff -Nur linux-2.4.29/arch/mips/defconfig-db1200 linux-mips/arch/mips/defconfig-db1200
4386 --- linux-2.4.29/arch/mips/defconfig-db1200 1970-01-01 01:00:00.000000000 +0100
4387 +++ linux-mips/arch/mips/defconfig-db1200 2005-01-30 09:01:26.000000000 +0100
4388 @@ -0,0 +1,1051 @@
4389 +#
4390 +# Automatically generated make config: don't edit
4391 +#
4392 +CONFIG_MIPS=y
4393 +CONFIG_MIPS32=y
4394 +# CONFIG_MIPS64 is not set
4395 +
4396 +#
4397 +# Code maturity level options
4398 +#
4399 +CONFIG_EXPERIMENTAL=y
4400 +
4401 +#
4402 +# Loadable module support
4403 +#
4404 +CONFIG_MODULES=y
4405 +# CONFIG_MODVERSIONS is not set
4406 +CONFIG_KMOD=y
4407 +
4408 +#
4409 +# Machine selection
4410 +#
4411 +# CONFIG_ACER_PICA_61 is not set
4412 +# CONFIG_MIPS_BOSPORUS is not set
4413 +# CONFIG_MIPS_FICMMP is not set
4414 +# CONFIG_MIPS_MIRAGE is not set
4415 +# CONFIG_MIPS_DB1000 is not set
4416 +# CONFIG_MIPS_DB1100 is not set
4417 +# CONFIG_MIPS_DB1500 is not set
4418 +# CONFIG_MIPS_DB1550 is not set
4419 +CONFIG_MIPS_DB1200=y
4420 +# CONFIG_MIPS_PB1000 is not set
4421 +# CONFIG_MIPS_PB1100 is not set
4422 +# CONFIG_MIPS_PB1500 is not set
4423 +# CONFIG_MIPS_PB1550 is not set
4424 +# CONFIG_MIPS_PB1200 is not set
4425 +# CONFIG_MIPS_HYDROGEN3 is not set
4426 +# CONFIG_MIPS_XXS1500 is not set
4427 +# CONFIG_MIPS_MTX1 is not set
4428 +# CONFIG_COGENT_CSB250 is not set
4429 +# CONFIG_BAGET_MIPS is not set
4430 +# CONFIG_CASIO_E55 is not set
4431 +# CONFIG_MIPS_COBALT is not set
4432 +# CONFIG_DECSTATION is not set
4433 +# CONFIG_MIPS_EV64120 is not set
4434 +# CONFIG_MIPS_EV96100 is not set
4435 +# CONFIG_MIPS_IVR is not set
4436 +# CONFIG_HP_LASERJET is not set
4437 +# CONFIG_IBM_WORKPAD is not set
4438 +# CONFIG_LASAT is not set
4439 +# CONFIG_MIPS_ITE8172 is not set
4440 +# CONFIG_MIPS_ATLAS is not set
4441 +# CONFIG_MIPS_MAGNUM_4000 is not set
4442 +# CONFIG_MIPS_MALTA is not set
4443 +# CONFIG_MIPS_SEAD is not set
4444 +# CONFIG_MOMENCO_OCELOT is not set
4445 +# CONFIG_MOMENCO_OCELOT_G is not set
4446 +# CONFIG_MOMENCO_OCELOT_C is not set
4447 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
4448 +# CONFIG_PMC_BIG_SUR is not set
4449 +# CONFIG_PMC_STRETCH is not set
4450 +# CONFIG_PMC_YOSEMITE is not set
4451 +# CONFIG_DDB5074 is not set
4452 +# CONFIG_DDB5476 is not set
4453 +# CONFIG_DDB5477 is not set
4454 +# CONFIG_NEC_OSPREY is not set
4455 +# CONFIG_NEC_EAGLE is not set
4456 +# CONFIG_OLIVETTI_M700 is not set
4457 +# CONFIG_NINO is not set
4458 +# CONFIG_SGI_IP22 is not set
4459 +# CONFIG_SGI_IP27 is not set
4460 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
4461 +# CONFIG_SNI_RM200_PCI is not set
4462 +# CONFIG_TANBAC_TB0226 is not set
4463 +# CONFIG_TANBAC_TB0229 is not set
4464 +# CONFIG_TOSHIBA_JMR3927 is not set
4465 +# CONFIG_TOSHIBA_RBTX4927 is not set
4466 +# CONFIG_VICTOR_MPC30X is not set
4467 +# CONFIG_ZAO_CAPCELLA is not set
4468 +# CONFIG_HIGHMEM is not set
4469 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4470 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4471 +CONFIG_SOC_AU1X00=y
4472 +CONFIG_SOC_AU1200=y
4473 +CONFIG_NONCOHERENT_IO=y
4474 +CONFIG_PC_KEYB=y
4475 +# CONFIG_MIPS_AU1000 is not set
4476 +
4477 +#
4478 +# CPU selection
4479 +#
4480 +CONFIG_CPU_MIPS32=y
4481 +# CONFIG_CPU_MIPS64 is not set
4482 +# CONFIG_CPU_R3000 is not set
4483 +# CONFIG_CPU_TX39XX is not set
4484 +# CONFIG_CPU_VR41XX is not set
4485 +# CONFIG_CPU_R4300 is not set
4486 +# CONFIG_CPU_R4X00 is not set
4487 +# CONFIG_CPU_TX49XX is not set
4488 +# CONFIG_CPU_R5000 is not set
4489 +# CONFIG_CPU_R5432 is not set
4490 +# CONFIG_CPU_R6000 is not set
4491 +# CONFIG_CPU_NEVADA is not set
4492 +# CONFIG_CPU_R8000 is not set
4493 +# CONFIG_CPU_R10000 is not set
4494 +# CONFIG_CPU_RM7000 is not set
4495 +# CONFIG_CPU_RM9000 is not set
4496 +# CONFIG_CPU_SB1 is not set
4497 +CONFIG_PAGE_SIZE_4KB=y
4498 +# CONFIG_PAGE_SIZE_16KB is not set
4499 +# CONFIG_PAGE_SIZE_64KB is not set
4500 +CONFIG_CPU_HAS_PREFETCH=y
4501 +# CONFIG_VTAG_ICACHE is not set
4502 +CONFIG_64BIT_PHYS_ADDR=y
4503 +# CONFIG_CPU_ADVANCED is not set
4504 +CONFIG_CPU_HAS_LLSC=y
4505 +# CONFIG_CPU_HAS_LLDSCD is not set
4506 +# CONFIG_CPU_HAS_WB is not set
4507 +CONFIG_CPU_HAS_SYNC=y
4508 +
4509 +#
4510 +# General setup
4511 +#
4512 +CONFIG_CPU_LITTLE_ENDIAN=y
4513 +# CONFIG_BUILD_ELF64 is not set
4514 +CONFIG_NET=y
4515 +CONFIG_PCI=y
4516 +CONFIG_PCI_NEW=y
4517 +CONFIG_PCI_AUTO=y
4518 +# CONFIG_PCI_NAMES is not set
4519 +# CONFIG_ISA is not set
4520 +# CONFIG_TC is not set
4521 +# CONFIG_MCA is not set
4522 +# CONFIG_SBUS is not set
4523 +CONFIG_HOTPLUG=y
4524 +
4525 +#
4526 +# PCMCIA/CardBus support
4527 +#
4528 +CONFIG_PCMCIA=m
4529 +# CONFIG_CARDBUS is not set
4530 +# CONFIG_TCIC is not set
4531 +# CONFIG_I82092 is not set
4532 +# CONFIG_I82365 is not set
4533 +CONFIG_PCMCIA_AU1X00=m
4534 +
4535 +#
4536 +# PCI Hotplug Support
4537 +#
4538 +# CONFIG_HOTPLUG_PCI is not set
4539 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
4540 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
4541 +# CONFIG_HOTPLUG_PCI_SHPC is not set
4542 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
4543 +# CONFIG_HOTPLUG_PCI_PCIE is not set
4544 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
4545 +CONFIG_SYSVIPC=y
4546 +# CONFIG_BSD_PROCESS_ACCT is not set
4547 +CONFIG_SYSCTL=y
4548 +CONFIG_KCORE_ELF=y
4549 +# CONFIG_KCORE_AOUT is not set
4550 +# CONFIG_BINFMT_AOUT is not set
4551 +CONFIG_BINFMT_ELF=y
4552 +# CONFIG_MIPS32_COMPAT is not set
4553 +# CONFIG_MIPS32_O32 is not set
4554 +# CONFIG_MIPS32_N32 is not set
4555 +# CONFIG_BINFMT_ELF32 is not set
4556 +# CONFIG_BINFMT_MISC is not set
4557 +# CONFIG_OOM_KILLER is not set
4558 +CONFIG_CMDLINE_BOOL=y
4559 +CONFIG_CMDLINE="mem=96M"
4560 +# CONFIG_PM is not set
4561 +
4562 +#
4563 +# Memory Technology Devices (MTD)
4564 +#
4565 +# CONFIG_MTD is not set
4566 +
4567 +#
4568 +# Parallel port support
4569 +#
4570 +# CONFIG_PARPORT is not set
4571 +
4572 +#
4573 +# Plug and Play configuration
4574 +#
4575 +# CONFIG_PNP is not set
4576 +# CONFIG_ISAPNP is not set
4577 +
4578 +#
4579 +# Block devices
4580 +#
4581 +# CONFIG_BLK_DEV_FD is not set
4582 +# CONFIG_BLK_DEV_XD is not set
4583 +# CONFIG_PARIDE is not set
4584 +# CONFIG_BLK_CPQ_DA is not set
4585 +# CONFIG_BLK_CPQ_CISS_DA is not set
4586 +# CONFIG_CISS_SCSI_TAPE is not set
4587 +# CONFIG_CISS_MONITOR_THREAD is not set
4588 +# CONFIG_BLK_DEV_DAC960 is not set
4589 +# CONFIG_BLK_DEV_UMEM is not set
4590 +# CONFIG_BLK_DEV_SX8 is not set
4591 +CONFIG_BLK_DEV_LOOP=y
4592 +# CONFIG_BLK_DEV_NBD is not set
4593 +# CONFIG_BLK_DEV_RAM is not set
4594 +# CONFIG_BLK_DEV_INITRD is not set
4595 +# CONFIG_BLK_STATS is not set
4596 +
4597 +#
4598 +# Multi-device support (RAID and LVM)
4599 +#
4600 +# CONFIG_MD is not set
4601 +# CONFIG_BLK_DEV_MD is not set
4602 +# CONFIG_MD_LINEAR is not set
4603 +# CONFIG_MD_RAID0 is not set
4604 +# CONFIG_MD_RAID1 is not set
4605 +# CONFIG_MD_RAID5 is not set
4606 +# CONFIG_MD_MULTIPATH is not set
4607 +# CONFIG_BLK_DEV_LVM is not set
4608 +
4609 +#
4610 +# Networking options
4611 +#
4612 +CONFIG_PACKET=y
4613 +# CONFIG_PACKET_MMAP is not set
4614 +# CONFIG_NETLINK_DEV is not set
4615 +CONFIG_NETFILTER=y
4616 +# CONFIG_NETFILTER_DEBUG is not set
4617 +CONFIG_FILTER=y
4618 +CONFIG_UNIX=y
4619 +CONFIG_INET=y
4620 +CONFIG_IP_MULTICAST=y
4621 +# CONFIG_IP_ADVANCED_ROUTER is not set
4622 +CONFIG_IP_PNP=y
4623 +# CONFIG_IP_PNP_DHCP is not set
4624 +CONFIG_IP_PNP_BOOTP=y
4625 +# CONFIG_IP_PNP_RARP is not set
4626 +# CONFIG_NET_IPIP is not set
4627 +# CONFIG_NET_IPGRE is not set
4628 +# CONFIG_IP_MROUTE is not set
4629 +# CONFIG_ARPD is not set
4630 +# CONFIG_INET_ECN is not set
4631 +# CONFIG_SYN_COOKIES is not set
4632 +
4633 +#
4634 +# IP: Netfilter Configuration
4635 +#
4636 +# CONFIG_IP_NF_CONNTRACK is not set
4637 +# CONFIG_IP_NF_QUEUE is not set
4638 +# CONFIG_IP_NF_IPTABLES is not set
4639 +# CONFIG_IP_NF_ARPTABLES is not set
4640 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
4641 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
4642 +
4643 +#
4644 +# IP: Virtual Server Configuration
4645 +#
4646 +# CONFIG_IP_VS is not set
4647 +# CONFIG_IPV6 is not set
4648 +# CONFIG_KHTTPD is not set
4649 +
4650 +#
4651 +# SCTP Configuration (EXPERIMENTAL)
4652 +#
4653 +# CONFIG_IP_SCTP is not set
4654 +# CONFIG_ATM is not set
4655 +# CONFIG_VLAN_8021Q is not set
4656 +
4657 +#
4658 +#
4659 +#
4660 +# CONFIG_IPX is not set
4661 +# CONFIG_ATALK is not set
4662 +# CONFIG_DECNET is not set
4663 +# CONFIG_BRIDGE is not set
4664 +# CONFIG_X25 is not set
4665 +# CONFIG_LAPB is not set
4666 +# CONFIG_LLC is not set
4667 +# CONFIG_NET_DIVERT is not set
4668 +# CONFIG_ECONET is not set
4669 +# CONFIG_WAN_ROUTER is not set
4670 +# CONFIG_NET_FASTROUTE is not set
4671 +# CONFIG_NET_HW_FLOWCONTROL is not set
4672 +
4673 +#
4674 +# QoS and/or fair queueing
4675 +#
4676 +# CONFIG_NET_SCHED is not set
4677 +
4678 +#
4679 +# Network testing
4680 +#
4681 +# CONFIG_NET_PKTGEN is not set
4682 +
4683 +#
4684 +# Telephony Support
4685 +#
4686 +# CONFIG_PHONE is not set
4687 +# CONFIG_PHONE_IXJ is not set
4688 +# CONFIG_PHONE_IXJ_PCMCIA is not set
4689 +
4690 +#
4691 +# ATA/IDE/MFM/RLL support
4692 +#
4693 +CONFIG_IDE=y
4694 +
4695 +#
4696 +# IDE, ATA and ATAPI Block devices
4697 +#
4698 +CONFIG_BLK_DEV_IDE=y
4699 +
4700 +#
4701 +# Please see Documentation/ide.txt for help/info on IDE drives
4702 +#
4703 +# CONFIG_BLK_DEV_HD_IDE is not set
4704 +# CONFIG_BLK_DEV_HD is not set
4705 +# CONFIG_BLK_DEV_IDE_SATA is not set
4706 +CONFIG_BLK_DEV_IDEDISK=y
4707 +CONFIG_IDEDISK_MULTI_MODE=y
4708 +CONFIG_IDEDISK_STROKE=y
4709 +CONFIG_BLK_DEV_IDECS=m
4710 +# CONFIG_BLK_DEV_DELKIN is not set
4711 +# CONFIG_BLK_DEV_IDECD is not set
4712 +# CONFIG_BLK_DEV_IDETAPE is not set
4713 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
4714 +# CONFIG_BLK_DEV_IDESCSI is not set
4715 +# CONFIG_IDE_TASK_IOCTL is not set
4716 +
4717 +#
4718 +# IDE chipset support/bugfixes
4719 +#
4720 +# CONFIG_BLK_DEV_CMD640 is not set
4721 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
4722 +# CONFIG_BLK_DEV_ISAPNP is not set
4723 +# CONFIG_BLK_DEV_IDEPCI is not set
4724 +# CONFIG_IDE_CHIPSETS is not set
4725 +# CONFIG_IDEDMA_AUTO is not set
4726 +# CONFIG_DMA_NONPCI is not set
4727 +# CONFIG_BLK_DEV_ATARAID is not set
4728 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
4729 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
4730 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
4731 +# CONFIG_BLK_DEV_ATARAID_SII is not set
4732 +
4733 +#
4734 +# SCSI support
4735 +#
4736 +CONFIG_SCSI=y
4737 +
4738 +#
4739 +# SCSI support type (disk, tape, CD-ROM)
4740 +#
4741 +CONFIG_BLK_DEV_SD=y
4742 +CONFIG_SD_EXTRA_DEVS=40
4743 +CONFIG_CHR_DEV_ST=y
4744 +# CONFIG_CHR_DEV_OSST is not set
4745 +CONFIG_BLK_DEV_SR=y
4746 +# CONFIG_BLK_DEV_SR_VENDOR is not set
4747 +CONFIG_SR_EXTRA_DEVS=2
4748 +# CONFIG_CHR_DEV_SG is not set
4749 +
4750 +#
4751 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
4752 +#
4753 +# CONFIG_SCSI_DEBUG_QUEUES is not set
4754 +# CONFIG_SCSI_MULTI_LUN is not set
4755 +CONFIG_SCSI_CONSTANTS=y
4756 +# CONFIG_SCSI_LOGGING is not set
4757 +
4758 +#
4759 +# SCSI low-level drivers
4760 +#
4761 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
4762 +# CONFIG_SCSI_7000FASST is not set
4763 +# CONFIG_SCSI_ACARD is not set
4764 +# CONFIG_SCSI_AHA152X is not set
4765 +# CONFIG_SCSI_AHA1542 is not set
4766 +# CONFIG_SCSI_AHA1740 is not set
4767 +# CONFIG_SCSI_AACRAID is not set
4768 +# CONFIG_SCSI_AIC7XXX is not set
4769 +# CONFIG_SCSI_AIC79XX is not set
4770 +# CONFIG_SCSI_AIC7XXX_OLD is not set
4771 +# CONFIG_SCSI_DPT_I2O is not set
4772 +# CONFIG_SCSI_ADVANSYS is not set
4773 +# CONFIG_SCSI_IN2000 is not set
4774 +# CONFIG_SCSI_AM53C974 is not set
4775 +# CONFIG_SCSI_MEGARAID is not set
4776 +# CONFIG_SCSI_MEGARAID2 is not set
4777 +# CONFIG_SCSI_SATA is not set
4778 +# CONFIG_SCSI_SATA_AHCI is not set
4779 +# CONFIG_SCSI_SATA_SVW is not set
4780 +# CONFIG_SCSI_ATA_PIIX is not set
4781 +# CONFIG_SCSI_SATA_NV is not set
4782 +# CONFIG_SCSI_SATA_PROMISE is not set
4783 +# CONFIG_SCSI_SATA_SX4 is not set
4784 +# CONFIG_SCSI_SATA_SIL is not set
4785 +# CONFIG_SCSI_SATA_SIS is not set
4786 +# CONFIG_SCSI_SATA_ULI is not set
4787 +# CONFIG_SCSI_SATA_VIA is not set
4788 +# CONFIG_SCSI_SATA_VITESSE is not set
4789 +# CONFIG_SCSI_BUSLOGIC is not set
4790 +# CONFIG_SCSI_CPQFCTS is not set
4791 +# CONFIG_SCSI_DMX3191D is not set
4792 +# CONFIG_SCSI_DTC3280 is not set
4793 +# CONFIG_SCSI_EATA is not set
4794 +# CONFIG_SCSI_EATA_DMA is not set
4795 +# CONFIG_SCSI_EATA_PIO is not set
4796 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
4797 +# CONFIG_SCSI_GDTH is not set
4798 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
4799 +# CONFIG_SCSI_INITIO is not set
4800 +# CONFIG_SCSI_INIA100 is not set
4801 +# CONFIG_SCSI_NCR53C406A is not set
4802 +# CONFIG_SCSI_NCR53C7xx is not set
4803 +# CONFIG_SCSI_SYM53C8XX_2 is not set
4804 +# CONFIG_SCSI_NCR53C8XX is not set
4805 +# CONFIG_SCSI_SYM53C8XX is not set
4806 +# CONFIG_SCSI_PAS16 is not set
4807 +# CONFIG_SCSI_PCI2000 is not set
4808 +# CONFIG_SCSI_PCI2220I is not set
4809 +# CONFIG_SCSI_PSI240I is not set
4810 +# CONFIG_SCSI_QLOGIC_FAS is not set
4811 +# CONFIG_SCSI_QLOGIC_ISP is not set
4812 +# CONFIG_SCSI_QLOGIC_FC is not set
4813 +# CONFIG_SCSI_QLOGIC_1280 is not set
4814 +# CONFIG_SCSI_SIM710 is not set
4815 +# CONFIG_SCSI_SYM53C416 is not set
4816 +# CONFIG_SCSI_DC390T is not set
4817 +# CONFIG_SCSI_T128 is not set
4818 +# CONFIG_SCSI_U14_34F is not set
4819 +# CONFIG_SCSI_NSP32 is not set
4820 +# CONFIG_SCSI_DEBUG is not set
4821 +
4822 +#
4823 +# PCMCIA SCSI adapter support
4824 +#
4825 +# CONFIG_SCSI_PCMCIA is not set
4826 +
4827 +#
4828 +# Fusion MPT device support
4829 +#
4830 +# CONFIG_FUSION is not set
4831 +# CONFIG_FUSION_BOOT is not set
4832 +# CONFIG_FUSION_ISENSE is not set
4833 +# CONFIG_FUSION_CTL is not set
4834 +# CONFIG_FUSION_LAN is not set
4835 +
4836 +#
4837 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
4838 +#
4839 +# CONFIG_IEEE1394 is not set
4840 +
4841 +#
4842 +# I2O device support
4843 +#
4844 +# CONFIG_I2O is not set
4845 +# CONFIG_I2O_PCI is not set
4846 +# CONFIG_I2O_BLOCK is not set
4847 +# CONFIG_I2O_LAN is not set
4848 +# CONFIG_I2O_SCSI is not set
4849 +# CONFIG_I2O_PROC is not set
4850 +
4851 +#
4852 +# Network device support
4853 +#
4854 +CONFIG_NETDEVICES=y
4855 +
4856 +#
4857 +# ARCnet devices
4858 +#
4859 +# CONFIG_ARCNET is not set
4860 +# CONFIG_DUMMY is not set
4861 +# CONFIG_BONDING is not set
4862 +# CONFIG_EQUALIZER is not set
4863 +# CONFIG_TUN is not set
4864 +# CONFIG_ETHERTAP is not set
4865 +
4866 +#
4867 +# Ethernet (10 or 100Mbit)
4868 +#
4869 +CONFIG_NET_ETHERNET=y
4870 +# CONFIG_MIPS_AU1X00_ENET is not set
4871 +# CONFIG_SUNLANCE is not set
4872 +# CONFIG_HAPPYMEAL is not set
4873 +# CONFIG_SUNBMAC is not set
4874 +# CONFIG_SUNQE is not set
4875 +# CONFIG_SUNGEM is not set
4876 +# CONFIG_NET_VENDOR_3COM is not set
4877 +# CONFIG_LANCE is not set
4878 +# CONFIG_NET_VENDOR_SMC is not set
4879 +# CONFIG_NET_VENDOR_RACAL is not set
4880 +# CONFIG_HP100 is not set
4881 +# CONFIG_NET_ISA is not set
4882 +# CONFIG_NET_PCI is not set
4883 +# CONFIG_NET_POCKET is not set
4884 +
4885 +#
4886 +# Ethernet (1000 Mbit)
4887 +#
4888 +# CONFIG_ACENIC is not set
4889 +# CONFIG_DL2K is not set
4890 +# CONFIG_E1000 is not set
4891 +# CONFIG_MYRI_SBUS is not set
4892 +# CONFIG_NS83820 is not set
4893 +# CONFIG_HAMACHI is not set
4894 +# CONFIG_YELLOWFIN is not set
4895 +# CONFIG_R8169 is not set
4896 +# CONFIG_SK98LIN is not set
4897 +# CONFIG_TIGON3 is not set
4898 +# CONFIG_FDDI is not set
4899 +# CONFIG_HIPPI is not set
4900 +# CONFIG_PLIP is not set
4901 +# CONFIG_PPP is not set
4902 +# CONFIG_SLIP is not set
4903 +
4904 +#
4905 +# Wireless LAN (non-hamradio)
4906 +#
4907 +# CONFIG_NET_RADIO is not set
4908 +
4909 +#
4910 +# Token Ring devices
4911 +#
4912 +# CONFIG_TR is not set
4913 +# CONFIG_NET_FC is not set
4914 +# CONFIG_RCPCI is not set
4915 +# CONFIG_SHAPER is not set
4916 +
4917 +#
4918 +# Wan interfaces
4919 +#
4920 +# CONFIG_WAN is not set
4921 +
4922 +#
4923 +# PCMCIA network device support
4924 +#
4925 +# CONFIG_NET_PCMCIA is not set
4926 +
4927 +#
4928 +# Amateur Radio support
4929 +#
4930 +# CONFIG_HAMRADIO is not set
4931 +
4932 +#
4933 +# IrDA (infrared) support
4934 +#
4935 +# CONFIG_IRDA is not set
4936 +
4937 +#
4938 +# ISDN subsystem
4939 +#
4940 +# CONFIG_ISDN is not set
4941 +
4942 +#
4943 +# Input core support
4944 +#
4945 +CONFIG_INPUT=y
4946 +CONFIG_INPUT_KEYBDEV=y
4947 +CONFIG_INPUT_MOUSEDEV=y
4948 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
4949 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
4950 +# CONFIG_INPUT_JOYDEV is not set
4951 +CONFIG_INPUT_EVDEV=y
4952 +# CONFIG_INPUT_UINPUT is not set
4953 +
4954 +#
4955 +# Character devices
4956 +#
4957 +CONFIG_VT=y
4958 +# CONFIG_VT_CONSOLE is not set
4959 +# CONFIG_SERIAL is not set
4960 +# CONFIG_SERIAL_EXTENDED is not set
4961 +CONFIG_SERIAL_NONSTANDARD=y
4962 +# CONFIG_COMPUTONE is not set
4963 +# CONFIG_ROCKETPORT is not set
4964 +# CONFIG_CYCLADES is not set
4965 +# CONFIG_DIGIEPCA is not set
4966 +# CONFIG_DIGI is not set
4967 +# CONFIG_ESPSERIAL is not set
4968 +# CONFIG_MOXA_INTELLIO is not set
4969 +# CONFIG_MOXA_SMARTIO is not set
4970 +# CONFIG_ISI is not set
4971 +# CONFIG_SYNCLINK is not set
4972 +# CONFIG_SYNCLINKMP is not set
4973 +# CONFIG_N_HDLC is not set
4974 +# CONFIG_RISCOM8 is not set
4975 +# CONFIG_SPECIALIX is not set
4976 +# CONFIG_SX is not set
4977 +# CONFIG_RIO is not set
4978 +# CONFIG_STALDRV is not set
4979 +# CONFIG_SERIAL_TX3912 is not set
4980 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
4981 +# CONFIG_SERIAL_TXX9 is not set
4982 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
4983 +CONFIG_AU1X00_UART=y
4984 +CONFIG_AU1X00_SERIAL_CONSOLE=y
4985 +# CONFIG_AU1X00_USB_TTY is not set
4986 +# CONFIG_AU1X00_USB_RAW is not set
4987 +# CONFIG_TXX927_SERIAL is not set
4988 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4989 +CONFIG_UNIX98_PTYS=y
4990 +CONFIG_UNIX98_PTY_COUNT=256
4991 +
4992 +#
4993 +# I2C support
4994 +#
4995 +# CONFIG_I2C is not set
4996 +
4997 +#
4998 +# Mice
4999 +#
5000 +# CONFIG_BUSMOUSE is not set
5001 +# CONFIG_MOUSE is not set
5002 +
5003 +#
5004 +# Joysticks
5005 +#
5006 +# CONFIG_INPUT_GAMEPORT is not set
5007 +# CONFIG_INPUT_NS558 is not set
5008 +# CONFIG_INPUT_LIGHTNING is not set
5009 +# CONFIG_INPUT_PCIGAME is not set
5010 +# CONFIG_INPUT_CS461X is not set
5011 +# CONFIG_INPUT_EMU10K1 is not set
5012 +# CONFIG_INPUT_SERIO is not set
5013 +# CONFIG_INPUT_SERPORT is not set
5014 +
5015 +#
5016 +# Joysticks
5017 +#
5018 +# CONFIG_INPUT_ANALOG is not set
5019 +# CONFIG_INPUT_A3D is not set
5020 +# CONFIG_INPUT_ADI is not set
5021 +# CONFIG_INPUT_COBRA is not set
5022 +# CONFIG_INPUT_GF2K is not set
5023 +# CONFIG_INPUT_GRIP is not set
5024 +# CONFIG_INPUT_INTERACT is not set
5025 +# CONFIG_INPUT_TMDC is not set
5026 +# CONFIG_INPUT_SIDEWINDER is not set
5027 +# CONFIG_INPUT_IFORCE_USB is not set
5028 +# CONFIG_INPUT_IFORCE_232 is not set
5029 +# CONFIG_INPUT_WARRIOR is not set
5030 +# CONFIG_INPUT_MAGELLAN is not set
5031 +# CONFIG_INPUT_SPACEORB is not set
5032 +# CONFIG_INPUT_SPACEBALL is not set
5033 +# CONFIG_INPUT_STINGER is not set
5034 +# CONFIG_INPUT_DB9 is not set
5035 +# CONFIG_INPUT_GAMECON is not set
5036 +# CONFIG_INPUT_TURBOGRAFX is not set
5037 +# CONFIG_QIC02_TAPE is not set
5038 +# CONFIG_IPMI_HANDLER is not set
5039 +# CONFIG_IPMI_PANIC_EVENT is not set
5040 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
5041 +# CONFIG_IPMI_KCS is not set
5042 +# CONFIG_IPMI_WATCHDOG is not set
5043 +
5044 +#
5045 +# Watchdog Cards
5046 +#
5047 +# CONFIG_WATCHDOG is not set
5048 +# CONFIG_SCx200 is not set
5049 +# CONFIG_SCx200_GPIO is not set
5050 +# CONFIG_AMD_PM768 is not set
5051 +# CONFIG_NVRAM is not set
5052 +# CONFIG_RTC is not set
5053 +# CONFIG_DTLK is not set
5054 +# CONFIG_R3964 is not set
5055 +# CONFIG_APPLICOM is not set
5056 +
5057 +#
5058 +# Ftape, the floppy tape device driver
5059 +#
5060 +# CONFIG_FTAPE is not set
5061 +# CONFIG_AGP is not set
5062 +
5063 +#
5064 +# Direct Rendering Manager (XFree86 DRI support)
5065 +#
5066 +# CONFIG_DRM is not set
5067 +
5068 +#
5069 +# PCMCIA character devices
5070 +#
5071 +# CONFIG_PCMCIA_SERIAL_CS is not set
5072 +# CONFIG_SYNCLINK_CS is not set
5073 +# CONFIG_AU1X00_GPIO is not set
5074 +# CONFIG_TS_AU1X00_ADS7846 is not set
5075 +
5076 +#
5077 +# File systems
5078 +#
5079 +# CONFIG_QUOTA is not set
5080 +# CONFIG_QFMT_V2 is not set
5081 +CONFIG_AUTOFS_FS=y
5082 +# CONFIG_AUTOFS4_FS is not set
5083 +# CONFIG_REISERFS_FS is not set
5084 +# CONFIG_REISERFS_CHECK is not set
5085 +# CONFIG_REISERFS_PROC_INFO is not set
5086 +# CONFIG_ADFS_FS is not set
5087 +# CONFIG_ADFS_FS_RW is not set
5088 +# CONFIG_AFFS_FS is not set
5089 +# CONFIG_HFS_FS is not set
5090 +# CONFIG_HFSPLUS_FS is not set
5091 +# CONFIG_BEFS_FS is not set
5092 +# CONFIG_BEFS_DEBUG is not set
5093 +# CONFIG_BFS_FS is not set
5094 +CONFIG_EXT3_FS=y
5095 +CONFIG_JBD=y
5096 +# CONFIG_JBD_DEBUG is not set
5097 +CONFIG_FAT_FS=y
5098 +CONFIG_MSDOS_FS=y
5099 +# CONFIG_UMSDOS_FS is not set
5100 +CONFIG_VFAT_FS=y
5101 +# CONFIG_EFS_FS is not set
5102 +# CONFIG_JFFS_FS is not set
5103 +# CONFIG_JFFS2_FS is not set
5104 +# CONFIG_CRAMFS is not set
5105 +CONFIG_TMPFS=y
5106 +CONFIG_RAMFS=y
5107 +# CONFIG_ISO9660_FS is not set
5108 +# CONFIG_JOLIET is not set
5109 +# CONFIG_ZISOFS is not set
5110 +# CONFIG_JFS_FS is not set
5111 +# CONFIG_JFS_DEBUG is not set
5112 +# CONFIG_JFS_STATISTICS is not set
5113 +# CONFIG_MINIX_FS is not set
5114 +# CONFIG_VXFS_FS is not set
5115 +# CONFIG_NTFS_FS is not set
5116 +# CONFIG_NTFS_RW is not set
5117 +# CONFIG_HPFS_FS is not set
5118 +CONFIG_PROC_FS=y
5119 +# CONFIG_DEVFS_FS is not set
5120 +# CONFIG_DEVFS_MOUNT is not set
5121 +# CONFIG_DEVFS_DEBUG is not set
5122 +CONFIG_DEVPTS_FS=y
5123 +# CONFIG_QNX4FS_FS is not set
5124 +# CONFIG_QNX4FS_RW is not set
5125 +# CONFIG_ROMFS_FS is not set
5126 +CONFIG_EXT2_FS=y
5127 +# CONFIG_SYSV_FS is not set
5128 +# CONFIG_UDF_FS is not set
5129 +# CONFIG_UDF_RW is not set
5130 +# CONFIG_UFS_FS is not set
5131 +# CONFIG_UFS_FS_WRITE is not set
5132 +# CONFIG_XFS_FS is not set
5133 +# CONFIG_XFS_QUOTA is not set
5134 +# CONFIG_XFS_RT is not set
5135 +# CONFIG_XFS_TRACE is not set
5136 +# CONFIG_XFS_DEBUG is not set
5137 +
5138 +#
5139 +# Network File Systems
5140 +#
5141 +# CONFIG_CODA_FS is not set
5142 +# CONFIG_INTERMEZZO_FS is not set
5143 +CONFIG_NFS_FS=y
5144 +CONFIG_NFS_V3=y
5145 +# CONFIG_NFS_DIRECTIO is not set
5146 +CONFIG_ROOT_NFS=y
5147 +# CONFIG_NFSD is not set
5148 +# CONFIG_NFSD_V3 is not set
5149 +# CONFIG_NFSD_TCP is not set
5150 +CONFIG_SUNRPC=y
5151 +CONFIG_LOCKD=y
5152 +CONFIG_LOCKD_V4=y
5153 +# CONFIG_SMB_FS is not set
5154 +# CONFIG_NCP_FS is not set
5155 +# CONFIG_NCPFS_PACKET_SIGNING is not set
5156 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
5157 +# CONFIG_NCPFS_STRONG is not set
5158 +# CONFIG_NCPFS_NFS_NS is not set
5159 +# CONFIG_NCPFS_OS2_NS is not set
5160 +# CONFIG_NCPFS_SMALLDOS is not set
5161 +# CONFIG_NCPFS_NLS is not set
5162 +# CONFIG_NCPFS_EXTRAS is not set
5163 +# CONFIG_ZISOFS_FS is not set
5164 +
5165 +#
5166 +# Partition Types
5167 +#
5168 +# CONFIG_PARTITION_ADVANCED is not set
5169 +CONFIG_MSDOS_PARTITION=y
5170 +# CONFIG_SMB_NLS is not set
5171 +CONFIG_NLS=y
5172 +
5173 +#
5174 +# Native Language Support
5175 +#
5176 +CONFIG_NLS_DEFAULT="iso8859-1"
5177 +# CONFIG_NLS_CODEPAGE_437 is not set
5178 +# CONFIG_NLS_CODEPAGE_737 is not set
5179 +# CONFIG_NLS_CODEPAGE_775 is not set
5180 +# CONFIG_NLS_CODEPAGE_850 is not set
5181 +# CONFIG_NLS_CODEPAGE_852 is not set
5182 +# CONFIG_NLS_CODEPAGE_855 is not set
5183 +# CONFIG_NLS_CODEPAGE_857 is not set
5184 +# CONFIG_NLS_CODEPAGE_860 is not set
5185 +# CONFIG_NLS_CODEPAGE_861 is not set
5186 +# CONFIG_NLS_CODEPAGE_862 is not set
5187 +# CONFIG_NLS_CODEPAGE_863 is not set
5188 +# CONFIG_NLS_CODEPAGE_864 is not set
5189 +# CONFIG_NLS_CODEPAGE_865 is not set
5190 +# CONFIG_NLS_CODEPAGE_866 is not set
5191 +# CONFIG_NLS_CODEPAGE_869 is not set
5192 +# CONFIG_NLS_CODEPAGE_936 is not set
5193 +# CONFIG_NLS_CODEPAGE_950 is not set
5194 +# CONFIG_NLS_CODEPAGE_932 is not set
5195 +# CONFIG_NLS_CODEPAGE_949 is not set
5196 +# CONFIG_NLS_CODEPAGE_874 is not set
5197 +# CONFIG_NLS_ISO8859_8 is not set
5198 +# CONFIG_NLS_CODEPAGE_1250 is not set
5199 +# CONFIG_NLS_CODEPAGE_1251 is not set
5200 +# CONFIG_NLS_ISO8859_1 is not set
5201 +# CONFIG_NLS_ISO8859_2 is not set
5202 +# CONFIG_NLS_ISO8859_3 is not set
5203 +# CONFIG_NLS_ISO8859_4 is not set
5204 +# CONFIG_NLS_ISO8859_5 is not set
5205 +# CONFIG_NLS_ISO8859_6 is not set
5206 +# CONFIG_NLS_ISO8859_7 is not set
5207 +# CONFIG_NLS_ISO8859_9 is not set
5208 +# CONFIG_NLS_ISO8859_13 is not set
5209 +# CONFIG_NLS_ISO8859_14 is not set
5210 +# CONFIG_NLS_ISO8859_15 is not set
5211 +# CONFIG_NLS_KOI8_R is not set
5212 +# CONFIG_NLS_KOI8_U is not set
5213 +# CONFIG_NLS_UTF8 is not set
5214 +
5215 +#
5216 +# Multimedia devices
5217 +#
5218 +# CONFIG_VIDEO_DEV is not set
5219 +
5220 +#
5221 +# Console drivers
5222 +#
5223 +# CONFIG_VGA_CONSOLE is not set
5224 +# CONFIG_MDA_CONSOLE is not set
5225 +
5226 +#
5227 +# Frame-buffer support
5228 +#
5229 +CONFIG_FB=y
5230 +CONFIG_DUMMY_CONSOLE=y
5231 +# CONFIG_FB_RIVA is not set
5232 +# CONFIG_FB_CLGEN is not set
5233 +# CONFIG_FB_PM2 is not set
5234 +# CONFIG_FB_PM3 is not set
5235 +# CONFIG_FB_CYBER2000 is not set
5236 +# CONFIG_FB_MATROX is not set
5237 +# CONFIG_FB_ATY is not set
5238 +# CONFIG_FB_RADEON is not set
5239 +# CONFIG_FB_ATY128 is not set
5240 +# CONFIG_FB_INTEL is not set
5241 +# CONFIG_FB_SIS is not set
5242 +# CONFIG_FB_NEOMAGIC is not set
5243 +# CONFIG_FB_3DFX is not set
5244 +# CONFIG_FB_VOODOO1 is not set
5245 +# CONFIG_FB_TRIDENT is not set
5246 +# CONFIG_FB_E1356 is not set
5247 +# CONFIG_FB_IT8181 is not set
5248 +# CONFIG_FB_VIRTUAL is not set
5249 +CONFIG_FBCON_ADVANCED=y
5250 +# CONFIG_FBCON_MFB is not set
5251 +# CONFIG_FBCON_CFB2 is not set
5252 +# CONFIG_FBCON_CFB4 is not set
5253 +# CONFIG_FBCON_CFB8 is not set
5254 +CONFIG_FBCON_CFB16=y
5255 +# CONFIG_FBCON_CFB24 is not set
5256 +CONFIG_FBCON_CFB32=y
5257 +# CONFIG_FBCON_AFB is not set
5258 +# CONFIG_FBCON_ILBM is not set
5259 +# CONFIG_FBCON_IPLAN2P2 is not set
5260 +# CONFIG_FBCON_IPLAN2P4 is not set
5261 +# CONFIG_FBCON_IPLAN2P8 is not set
5262 +# CONFIG_FBCON_MAC is not set
5263 +# CONFIG_FBCON_VGA_PLANES is not set
5264 +# CONFIG_FBCON_VGA is not set
5265 +# CONFIG_FBCON_HGA is not set
5266 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
5267 +CONFIG_FBCON_FONTS=y
5268 +CONFIG_FONT_8x8=y
5269 +CONFIG_FONT_8x16=y
5270 +# CONFIG_FONT_SUN8x16 is not set
5271 +# CONFIG_FONT_SUN12x22 is not set
5272 +# CONFIG_FONT_6x11 is not set
5273 +# CONFIG_FONT_PEARL_8x8 is not set
5274 +# CONFIG_FONT_ACORN_8x8 is not set
5275 +
5276 +#
5277 +# Sound
5278 +#
5279 +CONFIG_SOUND=y
5280 +# CONFIG_SOUND_ALI5455 is not set
5281 +# CONFIG_SOUND_BT878 is not set
5282 +# CONFIG_SOUND_CMPCI is not set
5283 +# CONFIG_SOUND_EMU10K1 is not set
5284 +# CONFIG_MIDI_EMU10K1 is not set
5285 +# CONFIG_SOUND_FUSION is not set
5286 +# CONFIG_SOUND_CS4281 is not set
5287 +# CONFIG_SOUND_ES1370 is not set
5288 +# CONFIG_SOUND_ES1371 is not set
5289 +# CONFIG_SOUND_ESSSOLO1 is not set
5290 +# CONFIG_SOUND_MAESTRO is not set
5291 +# CONFIG_SOUND_MAESTRO3 is not set
5292 +# CONFIG_SOUND_FORTE is not set
5293 +# CONFIG_SOUND_ICH is not set
5294 +# CONFIG_SOUND_RME96XX is not set
5295 +# CONFIG_SOUND_SONICVIBES is not set
5296 +# CONFIG_SOUND_AU1X00 is not set
5297 +CONFIG_SOUND_AU1550_PSC=y
5298 +# CONFIG_SOUND_AU1550_I2S is not set
5299 +# CONFIG_SOUND_TRIDENT is not set
5300 +# CONFIG_SOUND_MSNDCLAS is not set
5301 +# CONFIG_SOUND_MSNDPIN is not set
5302 +# CONFIG_SOUND_VIA82CXXX is not set
5303 +# CONFIG_MIDI_VIA82CXXX is not set
5304 +# CONFIG_SOUND_OSS is not set
5305 +# CONFIG_SOUND_TVMIXER is not set
5306 +# CONFIG_SOUND_AD1980 is not set
5307 +# CONFIG_SOUND_WM97XX is not set
5308 +
5309 +#
5310 +# USB support
5311 +#
5312 +CONFIG_USB=y
5313 +# CONFIG_USB_DEBUG is not set
5314 +
5315 +#
5316 +# Miscellaneous USB options
5317 +#
5318 +CONFIG_USB_DEVICEFS=y
5319 +# CONFIG_USB_BANDWIDTH is not set
5320 +
5321 +#
5322 +# USB Host Controller Drivers
5323 +#
5324 +# CONFIG_USB_EHCI_HCD is not set
5325 +# CONFIG_USB_UHCI is not set
5326 +# CONFIG_USB_UHCI_ALT is not set
5327 +CONFIG_USB_OHCI=y
5328 +
5329 +#
5330 +# USB Device Class drivers
5331 +#
5332 +# CONFIG_USB_AUDIO is not set
5333 +# CONFIG_USB_EMI26 is not set
5334 +# CONFIG_USB_BLUETOOTH is not set
5335 +# CONFIG_USB_MIDI is not set
5336 +CONFIG_USB_STORAGE=y
5337 +# CONFIG_USB_STORAGE_DEBUG is not set
5338 +# CONFIG_USB_STORAGE_DATAFAB is not set
5339 +# CONFIG_USB_STORAGE_FREECOM is not set
5340 +# CONFIG_USB_STORAGE_ISD200 is not set
5341 +# CONFIG_USB_STORAGE_DPCM is not set
5342 +# CONFIG_USB_STORAGE_HP8200e is not set
5343 +# CONFIG_USB_STORAGE_SDDR09 is not set
5344 +# CONFIG_USB_STORAGE_SDDR55 is not set
5345 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
5346 +# CONFIG_USB_ACM is not set
5347 +# CONFIG_USB_PRINTER is not set
5348 +
5349 +#
5350 +# USB Human Interface Devices (HID)
5351 +#
5352 +CONFIG_USB_HID=y
5353 +CONFIG_USB_HIDINPUT=y
5354 +CONFIG_USB_HIDDEV=y
5355 +# CONFIG_USB_AIPTEK is not set
5356 +# CONFIG_USB_WACOM is not set
5357 +# CONFIG_USB_KBTAB is not set
5358 +# CONFIG_USB_POWERMATE is not set
5359 +
5360 +#
5361 +# USB Imaging devices
5362 +#
5363 +# CONFIG_USB_DC2XX is not set
5364 +# CONFIG_USB_MDC800 is not set
5365 +# CONFIG_USB_SCANNER is not set
5366 +# CONFIG_USB_MICROTEK is not set
5367 +# CONFIG_USB_HPUSBSCSI is not set
5368 +
5369 +#
5370 +# USB Multimedia devices
5371 +#
5372 +
5373 +#
5374 +# Video4Linux support is needed for USB Multimedia device support
5375 +#
5376 +
5377 +#
5378 +# USB Network adaptors
5379 +#
5380 +# CONFIG_USB_PEGASUS is not set
5381 +# CONFIG_USB_RTL8150 is not set
5382 +# CONFIG_USB_KAWETH is not set
5383 +# CONFIG_USB_CATC is not set
5384 +# CONFIG_USB_CDCETHER is not set
5385 +# CONFIG_USB_USBNET is not set
5386 +
5387 +#
5388 +# USB port drivers
5389 +#
5390 +# CONFIG_USB_USS720 is not set
5391 +
5392 +#
5393 +# USB Serial Converter support
5394 +#
5395 +# CONFIG_USB_SERIAL is not set
5396 +
5397 +#
5398 +# USB Miscellaneous drivers
5399 +#
5400 +# CONFIG_USB_RIO500 is not set
5401 +# CONFIG_USB_AUERSWALD is not set
5402 +# CONFIG_USB_TIGL is not set
5403 +# CONFIG_USB_BRLVGER is not set
5404 +# CONFIG_USB_LCD is not set
5405 +
5406 +#
5407 +# Support for USB gadgets
5408 +#
5409 +# CONFIG_USB_GADGET is not set
5410 +
5411 +#
5412 +# Bluetooth support
5413 +#
5414 +# CONFIG_BLUEZ is not set
5415 +
5416 +#
5417 +# Kernel hacking
5418 +#
5419 +CONFIG_CROSSCOMPILE=y
5420 +# CONFIG_RUNTIME_DEBUG is not set
5421 +# CONFIG_KGDB is not set
5422 +# CONFIG_GDB_CONSOLE is not set
5423 +# CONFIG_DEBUG_INFO is not set
5424 +# CONFIG_MAGIC_SYSRQ is not set
5425 +# CONFIG_MIPS_UNCACHED is not set
5426 +CONFIG_LOG_BUF_SHIFT=0
5427 +
5428 +#
5429 +# Cryptographic options
5430 +#
5431 +# CONFIG_CRYPTO is not set
5432 +
5433 +#
5434 +# Library routines
5435 +#
5436 +# CONFIG_CRC32 is not set
5437 +CONFIG_ZLIB_INFLATE=m
5438 +CONFIG_ZLIB_DEFLATE=m
5439 +# CONFIG_FW_LOADER is not set
5440 diff -Nur linux-2.4.29/arch/mips/defconfig-db1500 linux-mips/arch/mips/defconfig-db1500
5441 --- linux-2.4.29/arch/mips/defconfig-db1500 2005-01-19 15:09:28.000000000 +0100
5442 +++ linux-mips/arch/mips/defconfig-db1500 2005-02-03 07:35:29.000000000 +0100
5443 @@ -22,16 +22,19 @@
5444 #
5445 # CONFIG_ACER_PICA_61 is not set
5446 # CONFIG_MIPS_BOSPORUS is not set
5447 +# CONFIG_MIPS_FICMMP is not set
5448 # CONFIG_MIPS_MIRAGE is not set
5449 # CONFIG_MIPS_DB1000 is not set
5450 # CONFIG_MIPS_DB1100 is not set
5451 CONFIG_MIPS_DB1500=y
5452 # CONFIG_MIPS_DB1550 is not set
5453 +# CONFIG_MIPS_DB1200 is not set
5454 # CONFIG_MIPS_PB1000 is not set
5455 # CONFIG_MIPS_PB1100 is not set
5456 # CONFIG_MIPS_PB1500 is not set
5457 -# CONFIG_MIPS_HYDROGEN3 is not set
5458 # CONFIG_MIPS_PB1550 is not set
5459 +# CONFIG_MIPS_PB1200 is not set
5460 +# CONFIG_MIPS_HYDROGEN3 is not set
5461 # CONFIG_MIPS_XXS1500 is not set
5462 # CONFIG_MIPS_MTX1 is not set
5463 # CONFIG_COGENT_CSB250 is not set
5464 @@ -267,11 +270,6 @@
5465 #
5466 # CONFIG_IPX is not set
5467 # CONFIG_ATALK is not set
5468 -
5469 -#
5470 -# Appletalk devices
5471 -#
5472 -# CONFIG_DEV_APPLETALK is not set
5473 # CONFIG_DECNET is not set
5474 # CONFIG_BRIDGE is not set
5475 # CONFIG_X25 is not set
5476 diff -Nur linux-2.4.29/arch/mips/defconfig-db1550 linux-mips/arch/mips/defconfig-db1550
5477 --- linux-2.4.29/arch/mips/defconfig-db1550 2005-01-19 15:09:28.000000000 +0100
5478 +++ linux-mips/arch/mips/defconfig-db1550 2005-02-03 07:35:29.000000000 +0100
5479 @@ -22,16 +22,19 @@
5480 #
5481 # CONFIG_ACER_PICA_61 is not set
5482 # CONFIG_MIPS_BOSPORUS is not set
5483 +# CONFIG_MIPS_FICMMP is not set
5484 # CONFIG_MIPS_MIRAGE is not set
5485 # CONFIG_MIPS_DB1000 is not set
5486 # CONFIG_MIPS_DB1100 is not set
5487 # CONFIG_MIPS_DB1500 is not set
5488 CONFIG_MIPS_DB1550=y
5489 +# CONFIG_MIPS_DB1200 is not set
5490 # CONFIG_MIPS_PB1000 is not set
5491 # CONFIG_MIPS_PB1100 is not set
5492 # CONFIG_MIPS_PB1500 is not set
5493 -# CONFIG_MIPS_HYDROGEN3 is not set
5494 # CONFIG_MIPS_PB1550 is not set
5495 +# CONFIG_MIPS_PB1200 is not set
5496 +# CONFIG_MIPS_HYDROGEN3 is not set
5497 # CONFIG_MIPS_XXS1500 is not set
5498 # CONFIG_MIPS_MTX1 is not set
5499 # CONFIG_COGENT_CSB250 is not set
5500 @@ -343,11 +346,6 @@
5501 #
5502 # CONFIG_IPX is not set
5503 # CONFIG_ATALK is not set
5504 -
5505 -#
5506 -# Appletalk devices
5507 -#
5508 -# CONFIG_DEV_APPLETALK is not set
5509 # CONFIG_DECNET is not set
5510 # CONFIG_BRIDGE is not set
5511 # CONFIG_X25 is not set
5512 diff -Nur linux-2.4.29/arch/mips/defconfig-ddb5476 linux-mips/arch/mips/defconfig-ddb5476
5513 --- linux-2.4.29/arch/mips/defconfig-ddb5476 2005-01-19 15:09:28.000000000 +0100
5514 +++ linux-mips/arch/mips/defconfig-ddb5476 2005-01-09 20:33:59.000000000 +0100
5515 @@ -226,11 +226,6 @@
5516 #
5517 # CONFIG_IPX is not set
5518 # CONFIG_ATALK is not set
5519 -
5520 -#
5521 -# Appletalk devices
5522 -#
5523 -# CONFIG_DEV_APPLETALK is not set
5524 # CONFIG_DECNET is not set
5525 # CONFIG_BRIDGE is not set
5526 # CONFIG_X25 is not set
5527 diff -Nur linux-2.4.29/arch/mips/defconfig-ddb5477 linux-mips/arch/mips/defconfig-ddb5477
5528 --- linux-2.4.29/arch/mips/defconfig-ddb5477 2005-01-19 15:09:28.000000000 +0100
5529 +++ linux-mips/arch/mips/defconfig-ddb5477 2005-01-09 20:33:59.000000000 +0100
5530 @@ -226,11 +226,6 @@
5531 #
5532 # CONFIG_IPX is not set
5533 # CONFIG_ATALK is not set
5534 -
5535 -#
5536 -# Appletalk devices
5537 -#
5538 -# CONFIG_DEV_APPLETALK is not set
5539 # CONFIG_DECNET is not set
5540 # CONFIG_BRIDGE is not set
5541 # CONFIG_X25 is not set
5542 diff -Nur linux-2.4.29/arch/mips/defconfig-decstation linux-mips/arch/mips/defconfig-decstation
5543 --- linux-2.4.29/arch/mips/defconfig-decstation 2005-01-19 15:09:28.000000000 +0100
5544 +++ linux-mips/arch/mips/defconfig-decstation 2005-01-09 20:33:59.000000000 +0100
5545 @@ -223,11 +223,6 @@
5546 #
5547 # CONFIG_IPX is not set
5548 # CONFIG_ATALK is not set
5549 -
5550 -#
5551 -# Appletalk devices
5552 -#
5553 -# CONFIG_DEV_APPLETALK is not set
5554 # CONFIG_DECNET is not set
5555 # CONFIG_BRIDGE is not set
5556 # CONFIG_X25 is not set
5557 @@ -306,6 +301,7 @@
5558 # CONFIG_SCSI_MEGARAID is not set
5559 # CONFIG_SCSI_MEGARAID2 is not set
5560 # CONFIG_SCSI_SATA is not set
5561 +# CONFIG_SCSI_SATA_AHCI is not set
5562 # CONFIG_SCSI_SATA_SVW is not set
5563 # CONFIG_SCSI_ATA_PIIX is not set
5564 # CONFIG_SCSI_SATA_NV is not set
5565 diff -Nur linux-2.4.29/arch/mips/defconfig-e55 linux-mips/arch/mips/defconfig-e55
5566 --- linux-2.4.29/arch/mips/defconfig-e55 2005-01-19 15:09:28.000000000 +0100
5567 +++ linux-mips/arch/mips/defconfig-e55 2005-01-09 20:33:59.000000000 +0100
5568 @@ -222,11 +222,6 @@
5569 #
5570 # CONFIG_IPX is not set
5571 # CONFIG_ATALK is not set
5572 -
5573 -#
5574 -# Appletalk devices
5575 -#
5576 -# CONFIG_DEV_APPLETALK is not set
5577 # CONFIG_DECNET is not set
5578 # CONFIG_BRIDGE is not set
5579 # CONFIG_X25 is not set
5580 diff -Nur linux-2.4.29/arch/mips/defconfig-eagle linux-mips/arch/mips/defconfig-eagle
5581 --- linux-2.4.29/arch/mips/defconfig-eagle 2005-01-19 15:09:28.000000000 +0100
5582 +++ linux-mips/arch/mips/defconfig-eagle 2005-01-09 20:33:59.000000000 +0100
5583 @@ -327,11 +327,6 @@
5584 #
5585 # CONFIG_IPX is not set
5586 # CONFIG_ATALK is not set
5587 -
5588 -#
5589 -# Appletalk devices
5590 -#
5591 -# CONFIG_DEV_APPLETALK is not set
5592 # CONFIG_DECNET is not set
5593 # CONFIG_BRIDGE is not set
5594 # CONFIG_X25 is not set
5595 diff -Nur linux-2.4.29/arch/mips/defconfig-ev64120 linux-mips/arch/mips/defconfig-ev64120
5596 --- linux-2.4.29/arch/mips/defconfig-ev64120 2005-01-19 15:09:28.000000000 +0100
5597 +++ linux-mips/arch/mips/defconfig-ev64120 2005-01-09 20:33:59.000000000 +0100
5598 @@ -230,11 +230,6 @@
5599 #
5600 # CONFIG_IPX is not set
5601 # CONFIG_ATALK is not set
5602 -
5603 -#
5604 -# Appletalk devices
5605 -#
5606 -# CONFIG_DEV_APPLETALK is not set
5607 # CONFIG_DECNET is not set
5608 # CONFIG_BRIDGE is not set
5609 # CONFIG_X25 is not set
5610 diff -Nur linux-2.4.29/arch/mips/defconfig-ev96100 linux-mips/arch/mips/defconfig-ev96100
5611 --- linux-2.4.29/arch/mips/defconfig-ev96100 2005-01-19 15:09:28.000000000 +0100
5612 +++ linux-mips/arch/mips/defconfig-ev96100 2005-01-09 20:33:59.000000000 +0100
5613 @@ -232,11 +232,6 @@
5614 #
5615 # CONFIG_IPX is not set
5616 # CONFIG_ATALK is not set
5617 -
5618 -#
5619 -# Appletalk devices
5620 -#
5621 -# CONFIG_DEV_APPLETALK is not set
5622 # CONFIG_DECNET is not set
5623 # CONFIG_BRIDGE is not set
5624 # CONFIG_X25 is not set
5625 diff -Nur linux-2.4.29/arch/mips/defconfig-ficmmp linux-mips/arch/mips/defconfig-ficmmp
5626 --- linux-2.4.29/arch/mips/defconfig-ficmmp 1970-01-01 01:00:00.000000000 +0100
5627 +++ linux-mips/arch/mips/defconfig-ficmmp 2005-02-03 07:35:29.000000000 +0100
5628 @@ -0,0 +1,880 @@
5629 +#
5630 +# Automatically generated make config: don't edit
5631 +#
5632 +CONFIG_MIPS=y
5633 +CONFIG_MIPS32=y
5634 +# CONFIG_MIPS64 is not set
5635 +
5636 +#
5637 +# Code maturity level options
5638 +#
5639 +CONFIG_EXPERIMENTAL=y
5640 +
5641 +#
5642 +# Loadable module support
5643 +#
5644 +CONFIG_MODULES=y
5645 +# CONFIG_MODVERSIONS is not set
5646 +CONFIG_KMOD=y
5647 +
5648 +#
5649 +# Machine selection
5650 +#
5651 +# CONFIG_ACER_PICA_61 is not set
5652 +# CONFIG_MIPS_BOSPORUS is not set
5653 +CONFIG_MIPS_FICMMP=y
5654 +# CONFIG_MIPS_MIRAGE is not set
5655 +# CONFIG_MIPS_DB1000 is not set
5656 +# CONFIG_MIPS_DB1100 is not set
5657 +# CONFIG_MIPS_DB1500 is not set
5658 +# CONFIG_MIPS_DB1550 is not set
5659 +# CONFIG_MIPS_DB1200 is not set
5660 +# CONFIG_MIPS_PB1000 is not set
5661 +# CONFIG_MIPS_PB1100 is not set
5662 +# CONFIG_MIPS_PB1500 is not set
5663 +# CONFIG_MIPS_PB1550 is not set
5664 +# CONFIG_MIPS_PB1200 is not set
5665 +# CONFIG_MIPS_HYDROGEN3 is not set
5666 +# CONFIG_MIPS_XXS1500 is not set
5667 +# CONFIG_MIPS_MTX1 is not set
5668 +# CONFIG_COGENT_CSB250 is not set
5669 +# CONFIG_BAGET_MIPS is not set
5670 +# CONFIG_CASIO_E55 is not set
5671 +# CONFIG_MIPS_COBALT is not set
5672 +# CONFIG_DECSTATION is not set
5673 +# CONFIG_MIPS_EV64120 is not set
5674 +# CONFIG_MIPS_EV96100 is not set
5675 +# CONFIG_MIPS_IVR is not set
5676 +# CONFIG_HP_LASERJET is not set
5677 +# CONFIG_IBM_WORKPAD is not set
5678 +# CONFIG_LASAT is not set
5679 +# CONFIG_MIPS_ITE8172 is not set
5680 +# CONFIG_MIPS_ATLAS is not set
5681 +# CONFIG_MIPS_MAGNUM_4000 is not set
5682 +# CONFIG_MIPS_MALTA is not set
5683 +# CONFIG_MIPS_SEAD is not set
5684 +# CONFIG_MOMENCO_OCELOT is not set
5685 +# CONFIG_MOMENCO_OCELOT_G is not set
5686 +# CONFIG_MOMENCO_OCELOT_C is not set
5687 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
5688 +# CONFIG_PMC_BIG_SUR is not set
5689 +# CONFIG_PMC_STRETCH is not set
5690 +# CONFIG_PMC_YOSEMITE is not set
5691 +# CONFIG_DDB5074 is not set
5692 +# CONFIG_DDB5476 is not set
5693 +# CONFIG_DDB5477 is not set
5694 +# CONFIG_NEC_OSPREY is not set
5695 +# CONFIG_NEC_EAGLE is not set
5696 +# CONFIG_OLIVETTI_M700 is not set
5697 +# CONFIG_NINO is not set
5698 +# CONFIG_SGI_IP22 is not set
5699 +# CONFIG_SGI_IP27 is not set
5700 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
5701 +# CONFIG_SNI_RM200_PCI is not set
5702 +# CONFIG_TANBAC_TB0226 is not set
5703 +# CONFIG_TANBAC_TB0229 is not set
5704 +# CONFIG_TOSHIBA_JMR3927 is not set
5705 +# CONFIG_TOSHIBA_RBTX4927 is not set
5706 +# CONFIG_VICTOR_MPC30X is not set
5707 +# CONFIG_ZAO_CAPCELLA is not set
5708 +# CONFIG_HIGHMEM is not set
5709 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
5710 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
5711 +CONFIG_SOC_AU1X00=y
5712 +CONFIG_SOC_AU1200=y
5713 +CONFIG_NONCOHERENT_IO=y
5714 +CONFIG_PC_KEYB=y
5715 +# CONFIG_MIPS_AU1000 is not set
5716 +
5717 +#
5718 +# CPU selection
5719 +#
5720 +CONFIG_CPU_MIPS32=y
5721 +# CONFIG_CPU_MIPS64 is not set
5722 +# CONFIG_CPU_R3000 is not set
5723 +# CONFIG_CPU_TX39XX is not set
5724 +# CONFIG_CPU_VR41XX is not set
5725 +# CONFIG_CPU_R4300 is not set
5726 +# CONFIG_CPU_R4X00 is not set
5727 +# CONFIG_CPU_TX49XX is not set
5728 +# CONFIG_CPU_R5000 is not set
5729 +# CONFIG_CPU_R5432 is not set
5730 +# CONFIG_CPU_R6000 is not set
5731 +# CONFIG_CPU_NEVADA is not set
5732 +# CONFIG_CPU_R8000 is not set
5733 +# CONFIG_CPU_R10000 is not set
5734 +# CONFIG_CPU_RM7000 is not set
5735 +# CONFIG_CPU_RM9000 is not set
5736 +# CONFIG_CPU_SB1 is not set
5737 +CONFIG_PAGE_SIZE_4KB=y
5738 +# CONFIG_PAGE_SIZE_16KB is not set
5739 +# CONFIG_PAGE_SIZE_64KB is not set
5740 +CONFIG_CPU_HAS_PREFETCH=y
5741 +# CONFIG_VTAG_ICACHE is not set
5742 +CONFIG_64BIT_PHYS_ADDR=y
5743 +# CONFIG_CPU_ADVANCED is not set
5744 +CONFIG_CPU_HAS_LLSC=y
5745 +# CONFIG_CPU_HAS_LLDSCD is not set
5746 +# CONFIG_CPU_HAS_WB is not set
5747 +CONFIG_CPU_HAS_SYNC=y
5748 +
5749 +#
5750 +# General setup
5751 +#
5752 +CONFIG_CPU_LITTLE_ENDIAN=y
5753 +# CONFIG_BUILD_ELF64 is not set
5754 +CONFIG_NET=y
5755 +# CONFIG_PCI is not set
5756 +# CONFIG_PCI_NEW is not set
5757 +CONFIG_PCI_AUTO=y
5758 +# CONFIG_ISA is not set
5759 +# CONFIG_TC is not set
5760 +# CONFIG_MCA is not set
5761 +# CONFIG_SBUS is not set
5762 +# CONFIG_HOTPLUG is not set
5763 +# CONFIG_PCMCIA is not set
5764 +# CONFIG_HOTPLUG_PCI is not set
5765 +CONFIG_SYSVIPC=y
5766 +# CONFIG_BSD_PROCESS_ACCT is not set
5767 +CONFIG_SYSCTL=y
5768 +CONFIG_KCORE_ELF=y
5769 +# CONFIG_KCORE_AOUT is not set
5770 +# CONFIG_BINFMT_AOUT is not set
5771 +CONFIG_BINFMT_ELF=y
5772 +# CONFIG_MIPS32_COMPAT is not set
5773 +# CONFIG_MIPS32_O32 is not set
5774 +# CONFIG_MIPS32_N32 is not set
5775 +# CONFIG_BINFMT_ELF32 is not set
5776 +# CONFIG_BINFMT_MISC is not set
5777 +# CONFIG_OOM_KILLER is not set
5778 +CONFIG_CMDLINE_BOOL=y
5779 +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
5780 +# CONFIG_PM is not set
5781 +
5782 +#
5783 +# Memory Technology Devices (MTD)
5784 +#
5785 +# CONFIG_MTD is not set
5786 +
5787 +#
5788 +# Parallel port support
5789 +#
5790 +# CONFIG_PARPORT is not set
5791 +
5792 +#
5793 +# Plug and Play configuration
5794 +#
5795 +# CONFIG_PNP is not set
5796 +# CONFIG_ISAPNP is not set
5797 +
5798 +#
5799 +# Block devices
5800 +#
5801 +# CONFIG_BLK_DEV_FD is not set
5802 +# CONFIG_BLK_DEV_XD is not set
5803 +# CONFIG_PARIDE is not set
5804 +# CONFIG_BLK_CPQ_DA is not set
5805 +# CONFIG_BLK_CPQ_CISS_DA is not set
5806 +# CONFIG_CISS_SCSI_TAPE is not set
5807 +# CONFIG_CISS_MONITOR_THREAD is not set
5808 +# CONFIG_BLK_DEV_DAC960 is not set
5809 +# CONFIG_BLK_DEV_UMEM is not set
5810 +# CONFIG_BLK_DEV_SX8 is not set
5811 +CONFIG_BLK_DEV_LOOP=y
5812 +# CONFIG_BLK_DEV_NBD is not set
5813 +# CONFIG_BLK_DEV_RAM is not set
5814 +# CONFIG_BLK_DEV_INITRD is not set
5815 +# CONFIG_BLK_STATS is not set
5816 +
5817 +#
5818 +# Multi-device support (RAID and LVM)
5819 +#
5820 +# CONFIG_MD is not set
5821 +# CONFIG_BLK_DEV_MD is not set
5822 +# CONFIG_MD_LINEAR is not set
5823 +# CONFIG_MD_RAID0 is not set
5824 +# CONFIG_MD_RAID1 is not set
5825 +# CONFIG_MD_RAID5 is not set
5826 +# CONFIG_MD_MULTIPATH is not set
5827 +# CONFIG_BLK_DEV_LVM is not set
5828 +
5829 +#
5830 +# Networking options
5831 +#
5832 +CONFIG_PACKET=y
5833 +# CONFIG_PACKET_MMAP is not set
5834 +# CONFIG_NETLINK_DEV is not set
5835 +CONFIG_NETFILTER=y
5836 +# CONFIG_NETFILTER_DEBUG is not set
5837 +CONFIG_FILTER=y
5838 +CONFIG_UNIX=y
5839 +CONFIG_INET=y
5840 +CONFIG_IP_MULTICAST=y
5841 +# CONFIG_IP_ADVANCED_ROUTER is not set
5842 +# CONFIG_IP_PNP is not set
5843 +# CONFIG_NET_IPIP is not set
5844 +# CONFIG_NET_IPGRE is not set
5845 +# CONFIG_IP_MROUTE is not set
5846 +# CONFIG_ARPD is not set
5847 +# CONFIG_INET_ECN is not set
5848 +# CONFIG_SYN_COOKIES is not set
5849 +
5850 +#
5851 +# IP: Netfilter Configuration
5852 +#
5853 +# CONFIG_IP_NF_CONNTRACK is not set
5854 +# CONFIG_IP_NF_QUEUE is not set
5855 +# CONFIG_IP_NF_IPTABLES is not set
5856 +# CONFIG_IP_NF_ARPTABLES is not set
5857 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
5858 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
5859 +
5860 +#
5861 +# IP: Virtual Server Configuration
5862 +#
5863 +# CONFIG_IP_VS is not set
5864 +# CONFIG_IPV6 is not set
5865 +# CONFIG_KHTTPD is not set
5866 +
5867 +#
5868 +# SCTP Configuration (EXPERIMENTAL)
5869 +#
5870 +# CONFIG_IP_SCTP is not set
5871 +# CONFIG_ATM is not set
5872 +# CONFIG_VLAN_8021Q is not set
5873 +
5874 +#
5875 +#
5876 +#
5877 +# CONFIG_IPX is not set
5878 +# CONFIG_ATALK is not set
5879 +# CONFIG_DECNET is not set
5880 +# CONFIG_BRIDGE is not set
5881 +# CONFIG_X25 is not set
5882 +# CONFIG_LAPB is not set
5883 +# CONFIG_LLC is not set
5884 +# CONFIG_NET_DIVERT is not set
5885 +# CONFIG_ECONET is not set
5886 +# CONFIG_WAN_ROUTER is not set
5887 +# CONFIG_NET_FASTROUTE is not set
5888 +# CONFIG_NET_HW_FLOWCONTROL is not set
5889 +
5890 +#
5891 +# QoS and/or fair queueing
5892 +#
5893 +# CONFIG_NET_SCHED is not set
5894 +
5895 +#
5896 +# Network testing
5897 +#
5898 +# CONFIG_NET_PKTGEN is not set
5899 +
5900 +#
5901 +# Telephony Support
5902 +#
5903 +# CONFIG_PHONE is not set
5904 +# CONFIG_PHONE_IXJ is not set
5905 +# CONFIG_PHONE_IXJ_PCMCIA is not set
5906 +
5907 +#
5908 +# ATA/IDE/MFM/RLL support
5909 +#
5910 +CONFIG_IDE=y
5911 +
5912 +#
5913 +# IDE, ATA and ATAPI Block devices
5914 +#
5915 +CONFIG_BLK_DEV_IDE=y
5916 +
5917 +#
5918 +# Please see Documentation/ide.txt for help/info on IDE drives
5919 +#
5920 +CONFIG_BLK_DEV_HD_IDE=y
5921 +CONFIG_BLK_DEV_HD=y
5922 +# CONFIG_BLK_DEV_IDE_SATA is not set
5923 +CONFIG_BLK_DEV_IDEDISK=y
5924 +CONFIG_IDEDISK_MULTI_MODE=y
5925 +CONFIG_IDEDISK_STROKE=y
5926 +# CONFIG_BLK_DEV_IDECS is not set
5927 +# CONFIG_BLK_DEV_DELKIN is not set
5928 +# CONFIG_BLK_DEV_IDECD is not set
5929 +# CONFIG_BLK_DEV_IDETAPE is not set
5930 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
5931 +# CONFIG_BLK_DEV_IDESCSI is not set
5932 +# CONFIG_IDE_TASK_IOCTL is not set
5933 +
5934 +#
5935 +# IDE chipset support/bugfixes
5936 +#
5937 +# CONFIG_BLK_DEV_CMD640 is not set
5938 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
5939 +# CONFIG_BLK_DEV_ISAPNP is not set
5940 +# CONFIG_IDE_CHIPSETS is not set
5941 +# CONFIG_IDEDMA_AUTO is not set
5942 +# CONFIG_DMA_NONPCI is not set
5943 +# CONFIG_BLK_DEV_ATARAID is not set
5944 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
5945 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
5946 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
5947 +# CONFIG_BLK_DEV_ATARAID_SII is not set
5948 +
5949 +#
5950 +# SCSI support
5951 +#
5952 +CONFIG_SCSI=y
5953 +
5954 +#
5955 +# SCSI support type (disk, tape, CD-ROM)
5956 +#
5957 +CONFIG_BLK_DEV_SD=y
5958 +CONFIG_SD_EXTRA_DEVS=40
5959 +CONFIG_CHR_DEV_ST=y
5960 +# CONFIG_CHR_DEV_OSST is not set
5961 +CONFIG_BLK_DEV_SR=y
5962 +# CONFIG_BLK_DEV_SR_VENDOR is not set
5963 +CONFIG_SR_EXTRA_DEVS=2
5964 +# CONFIG_CHR_DEV_SG is not set
5965 +
5966 +#
5967 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
5968 +#
5969 +# CONFIG_SCSI_DEBUG_QUEUES is not set
5970 +# CONFIG_SCSI_MULTI_LUN is not set
5971 +CONFIG_SCSI_CONSTANTS=y
5972 +# CONFIG_SCSI_LOGGING is not set
5973 +
5974 +#
5975 +# SCSI low-level drivers
5976 +#
5977 +# CONFIG_SCSI_7000FASST is not set
5978 +# CONFIG_SCSI_ACARD is not set
5979 +# CONFIG_SCSI_AHA152X is not set
5980 +# CONFIG_SCSI_AHA1542 is not set
5981 +# CONFIG_SCSI_AHA1740 is not set
5982 +# CONFIG_SCSI_AACRAID is not set
5983 +# CONFIG_SCSI_AIC7XXX is not set
5984 +# CONFIG_SCSI_AIC79XX is not set
5985 +# CONFIG_SCSI_AIC7XXX_OLD is not set
5986 +# CONFIG_SCSI_DPT_I2O is not set
5987 +# CONFIG_SCSI_ADVANSYS is not set
5988 +# CONFIG_SCSI_IN2000 is not set
5989 +# CONFIG_SCSI_AM53C974 is not set
5990 +# CONFIG_SCSI_MEGARAID is not set
5991 +# CONFIG_SCSI_MEGARAID2 is not set
5992 +# CONFIG_SCSI_SATA is not set
5993 +# CONFIG_SCSI_SATA_AHCI is not set
5994 +# CONFIG_SCSI_SATA_SVW is not set
5995 +# CONFIG_SCSI_ATA_PIIX is not set
5996 +# CONFIG_SCSI_SATA_NV is not set
5997 +# CONFIG_SCSI_SATA_PROMISE is not set
5998 +# CONFIG_SCSI_SATA_SX4 is not set
5999 +# CONFIG_SCSI_SATA_SIL is not set
6000 +# CONFIG_SCSI_SATA_SIS is not set
6001 +# CONFIG_SCSI_SATA_ULI is not set
6002 +# CONFIG_SCSI_SATA_VIA is not set
6003 +# CONFIG_SCSI_SATA_VITESSE is not set
6004 +# CONFIG_SCSI_BUSLOGIC is not set
6005 +# CONFIG_SCSI_DMX3191D is not set
6006 +# CONFIG_SCSI_DTC3280 is not set
6007 +# CONFIG_SCSI_EATA is not set
6008 +# CONFIG_SCSI_EATA_DMA is not set
6009 +# CONFIG_SCSI_EATA_PIO is not set
6010 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
6011 +# CONFIG_SCSI_GDTH is not set
6012 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
6013 +# CONFIG_SCSI_INITIO is not set
6014 +# CONFIG_SCSI_INIA100 is not set
6015 +# CONFIG_SCSI_NCR53C406A is not set
6016 +# CONFIG_SCSI_NCR53C7xx is not set
6017 +# CONFIG_SCSI_PAS16 is not set
6018 +# CONFIG_SCSI_PCI2000 is not set
6019 +# CONFIG_SCSI_PCI2220I is not set
6020 +# CONFIG_SCSI_PSI240I is not set
6021 +# CONFIG_SCSI_QLOGIC_FAS is not set
6022 +# CONFIG_SCSI_SIM710 is not set
6023 +# CONFIG_SCSI_SYM53C416 is not set
6024 +# CONFIG_SCSI_T128 is not set
6025 +# CONFIG_SCSI_U14_34F is not set
6026 +# CONFIG_SCSI_NSP32 is not set
6027 +# CONFIG_SCSI_DEBUG is not set
6028 +
6029 +#
6030 +# Fusion MPT device support
6031 +#
6032 +# CONFIG_FUSION is not set
6033 +# CONFIG_FUSION_BOOT is not set
6034 +# CONFIG_FUSION_ISENSE is not set
6035 +# CONFIG_FUSION_CTL is not set
6036 +# CONFIG_FUSION_LAN is not set
6037 +
6038 +#
6039 +# Network device support
6040 +#
6041 +CONFIG_NETDEVICES=y
6042 +
6043 +#
6044 +# ARCnet devices
6045 +#
6046 +# CONFIG_ARCNET is not set
6047 +# CONFIG_DUMMY is not set
6048 +# CONFIG_BONDING is not set
6049 +# CONFIG_EQUALIZER is not set
6050 +# CONFIG_TUN is not set
6051 +# CONFIG_ETHERTAP is not set
6052 +
6053 +#
6054 +# Ethernet (10 or 100Mbit)
6055 +#
6056 +CONFIG_NET_ETHERNET=y
6057 +# CONFIG_MIPS_AU1X00_ENET is not set
6058 +# CONFIG_SUNLANCE is not set
6059 +# CONFIG_SUNBMAC is not set
6060 +# CONFIG_SUNQE is not set
6061 +# CONFIG_SUNGEM is not set
6062 +# CONFIG_NET_VENDOR_3COM is not set
6063 +# CONFIG_LANCE is not set
6064 +# CONFIG_NET_VENDOR_SMC is not set
6065 +# CONFIG_NET_VENDOR_RACAL is not set
6066 +# CONFIG_NET_ISA is not set
6067 +# CONFIG_NET_PCI is not set
6068 +# CONFIG_NET_POCKET is not set
6069 +
6070 +#
6071 +# Ethernet (1000 Mbit)
6072 +#
6073 +# CONFIG_ACENIC is not set
6074 +# CONFIG_DL2K is not set
6075 +# CONFIG_E1000 is not set
6076 +# CONFIG_MYRI_SBUS is not set
6077 +# CONFIG_NS83820 is not set
6078 +# CONFIG_HAMACHI is not set
6079 +# CONFIG_YELLOWFIN is not set
6080 +# CONFIG_R8169 is not set
6081 +# CONFIG_SK98LIN is not set
6082 +# CONFIG_TIGON3 is not set
6083 +# CONFIG_FDDI is not set
6084 +# CONFIG_HIPPI is not set
6085 +# CONFIG_PLIP is not set
6086 +# CONFIG_PPP is not set
6087 +# CONFIG_SLIP is not set
6088 +
6089 +#
6090 +# Wireless LAN (non-hamradio)
6091 +#
6092 +# CONFIG_NET_RADIO is not set
6093 +
6094 +#
6095 +# Token Ring devices
6096 +#
6097 +# CONFIG_TR is not set
6098 +# CONFIG_NET_FC is not set
6099 +# CONFIG_RCPCI is not set
6100 +# CONFIG_SHAPER is not set
6101 +
6102 +#
6103 +# Wan interfaces
6104 +#
6105 +# CONFIG_WAN is not set
6106 +
6107 +#
6108 +# Amateur Radio support
6109 +#
6110 +# CONFIG_HAMRADIO is not set
6111 +
6112 +#
6113 +# IrDA (infrared) support
6114 +#
6115 +# CONFIG_IRDA is not set
6116 +
6117 +#
6118 +# ISDN subsystem
6119 +#
6120 +# CONFIG_ISDN is not set
6121 +
6122 +#
6123 +# Input core support
6124 +#
6125 +CONFIG_INPUT=y
6126 +CONFIG_INPUT_KEYBDEV=y
6127 +CONFIG_INPUT_MOUSEDEV=y
6128 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
6129 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
6130 +# CONFIG_INPUT_JOYDEV is not set
6131 +CONFIG_INPUT_EVDEV=y
6132 +# CONFIG_INPUT_UINPUT is not set
6133 +
6134 +#
6135 +# Character devices
6136 +#
6137 +CONFIG_VT=y
6138 +CONFIG_VT_CONSOLE=y
6139 +# CONFIG_SERIAL is not set
6140 +# CONFIG_SERIAL_EXTENDED is not set
6141 +CONFIG_SERIAL_NONSTANDARD=y
6142 +# CONFIG_COMPUTONE is not set
6143 +# CONFIG_ROCKETPORT is not set
6144 +# CONFIG_CYCLADES is not set
6145 +# CONFIG_DIGIEPCA is not set
6146 +# CONFIG_DIGI is not set
6147 +# CONFIG_ESPSERIAL is not set
6148 +# CONFIG_MOXA_INTELLIO is not set
6149 +# CONFIG_MOXA_SMARTIO is not set
6150 +# CONFIG_ISI is not set
6151 +# CONFIG_SYNCLINK is not set
6152 +# CONFIG_SYNCLINKMP is not set
6153 +# CONFIG_N_HDLC is not set
6154 +# CONFIG_RISCOM8 is not set
6155 +# CONFIG_SPECIALIX is not set
6156 +# CONFIG_SX is not set
6157 +# CONFIG_RIO is not set
6158 +# CONFIG_STALDRV is not set
6159 +# CONFIG_SERIAL_TX3912 is not set
6160 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
6161 +# CONFIG_SERIAL_TXX9 is not set
6162 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
6163 +CONFIG_AU1X00_UART=y
6164 +CONFIG_AU1X00_SERIAL_CONSOLE=y
6165 +# CONFIG_AU1X00_USB_TTY is not set
6166 +# CONFIG_AU1X00_USB_RAW is not set
6167 +# CONFIG_TXX927_SERIAL is not set
6168 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6169 +CONFIG_UNIX98_PTYS=y
6170 +CONFIG_UNIX98_PTY_COUNT=256
6171 +
6172 +#
6173 +# I2C support
6174 +#
6175 +CONFIG_I2C=y
6176 +# CONFIG_I2C_ALGOBIT is not set
6177 +# CONFIG_SCx200_ACB is not set
6178 +# CONFIG_I2C_ALGOPCF is not set
6179 +# CONFIG_I2C_CHARDEV is not set
6180 +# CONFIG_I2C_PROC is not set
6181 +
6182 +#
6183 +# Mice
6184 +#
6185 +# CONFIG_BUSMOUSE is not set
6186 +# CONFIG_MOUSE is not set
6187 +
6188 +#
6189 +# Joysticks
6190 +#
6191 +# CONFIG_INPUT_GAMEPORT is not set
6192 +# CONFIG_INPUT_NS558 is not set
6193 +# CONFIG_INPUT_LIGHTNING is not set
6194 +# CONFIG_INPUT_PCIGAME is not set
6195 +# CONFIG_INPUT_CS461X is not set
6196 +# CONFIG_INPUT_EMU10K1 is not set
6197 +# CONFIG_INPUT_SERIO is not set
6198 +# CONFIG_INPUT_SERPORT is not set
6199 +
6200 +#
6201 +# Joysticks
6202 +#
6203 +# CONFIG_INPUT_ANALOG is not set
6204 +# CONFIG_INPUT_A3D is not set
6205 +# CONFIG_INPUT_ADI is not set
6206 +# CONFIG_INPUT_COBRA is not set
6207 +# CONFIG_INPUT_GF2K is not set
6208 +# CONFIG_INPUT_GRIP is not set
6209 +# CONFIG_INPUT_INTERACT is not set
6210 +# CONFIG_INPUT_TMDC is not set
6211 +# CONFIG_INPUT_SIDEWINDER is not set
6212 +# CONFIG_INPUT_IFORCE_USB is not set
6213 +# CONFIG_INPUT_IFORCE_232 is not set
6214 +# CONFIG_INPUT_WARRIOR is not set
6215 +# CONFIG_INPUT_MAGELLAN is not set
6216 +# CONFIG_INPUT_SPACEORB is not set
6217 +# CONFIG_INPUT_SPACEBALL is not set
6218 +# CONFIG_INPUT_STINGER is not set
6219 +# CONFIG_INPUT_DB9 is not set
6220 +# CONFIG_INPUT_GAMECON is not set
6221 +# CONFIG_INPUT_TURBOGRAFX is not set
6222 +# CONFIG_QIC02_TAPE is not set
6223 +# CONFIG_IPMI_HANDLER is not set
6224 +# CONFIG_IPMI_PANIC_EVENT is not set
6225 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
6226 +# CONFIG_IPMI_KCS is not set
6227 +# CONFIG_IPMI_WATCHDOG is not set
6228 +
6229 +#
6230 +# Watchdog Cards
6231 +#
6232 +# CONFIG_WATCHDOG is not set
6233 +# CONFIG_SCx200 is not set
6234 +# CONFIG_SCx200_GPIO is not set
6235 +# CONFIG_AMD_PM768 is not set
6236 +# CONFIG_NVRAM is not set
6237 +# CONFIG_RTC is not set
6238 +# CONFIG_DTLK is not set
6239 +# CONFIG_R3964 is not set
6240 +# CONFIG_APPLICOM is not set
6241 +
6242 +#
6243 +# Ftape, the floppy tape device driver
6244 +#
6245 +# CONFIG_FTAPE is not set
6246 +# CONFIG_AGP is not set
6247 +
6248 +#
6249 +# Direct Rendering Manager (XFree86 DRI support)
6250 +#
6251 +# CONFIG_DRM is not set
6252 +# CONFIG_AU1X00_GPIO is not set
6253 +# CONFIG_TS_AU1X00_ADS7846 is not set
6254 +
6255 +#
6256 +# File systems
6257 +#
6258 +# CONFIG_QUOTA is not set
6259 +# CONFIG_QFMT_V2 is not set
6260 +CONFIG_AUTOFS_FS=y
6261 +# CONFIG_AUTOFS4_FS is not set
6262 +# CONFIG_REISERFS_FS is not set
6263 +# CONFIG_REISERFS_CHECK is not set
6264 +# CONFIG_REISERFS_PROC_INFO is not set
6265 +# CONFIG_ADFS_FS is not set
6266 +# CONFIG_ADFS_FS_RW is not set
6267 +# CONFIG_AFFS_FS is not set
6268 +# CONFIG_HFS_FS is not set
6269 +# CONFIG_HFSPLUS_FS is not set
6270 +# CONFIG_BEFS_FS is not set
6271 +# CONFIG_BEFS_DEBUG is not set
6272 +# CONFIG_BFS_FS is not set
6273 +CONFIG_EXT3_FS=y
6274 +CONFIG_JBD=y
6275 +# CONFIG_JBD_DEBUG is not set
6276 +CONFIG_FAT_FS=y
6277 +CONFIG_MSDOS_FS=y
6278 +# CONFIG_UMSDOS_FS is not set
6279 +CONFIG_VFAT_FS=y
6280 +# CONFIG_EFS_FS is not set
6281 +# CONFIG_JFFS_FS is not set
6282 +# CONFIG_JFFS2_FS is not set
6283 +# CONFIG_CRAMFS is not set
6284 +# CONFIG_TMPFS is not set
6285 +CONFIG_RAMFS=y
6286 +# CONFIG_ISO9660_FS is not set
6287 +# CONFIG_JOLIET is not set
6288 +# CONFIG_ZISOFS is not set
6289 +# CONFIG_JFS_FS is not set
6290 +# CONFIG_JFS_DEBUG is not set
6291 +# CONFIG_JFS_STATISTICS is not set
6292 +# CONFIG_MINIX_FS is not set
6293 +# CONFIG_VXFS_FS is not set
6294 +# CONFIG_NTFS_FS is not set
6295 +# CONFIG_NTFS_RW is not set
6296 +# CONFIG_HPFS_FS is not set
6297 +CONFIG_PROC_FS=y
6298 +# CONFIG_DEVFS_FS is not set
6299 +# CONFIG_DEVFS_MOUNT is not set
6300 +# CONFIG_DEVFS_DEBUG is not set
6301 +CONFIG_DEVPTS_FS=y
6302 +# CONFIG_QNX4FS_FS is not set
6303 +# CONFIG_QNX4FS_RW is not set
6304 +# CONFIG_ROMFS_FS is not set
6305 +CONFIG_EXT2_FS=y
6306 +# CONFIG_SYSV_FS is not set
6307 +# CONFIG_UDF_FS is not set
6308 +# CONFIG_UDF_RW is not set
6309 +# CONFIG_UFS_FS is not set
6310 +# CONFIG_UFS_FS_WRITE is not set
6311 +# CONFIG_XFS_FS is not set
6312 +# CONFIG_XFS_QUOTA is not set
6313 +# CONFIG_XFS_RT is not set
6314 +# CONFIG_XFS_TRACE is not set
6315 +# CONFIG_XFS_DEBUG is not set
6316 +
6317 +#
6318 +# Network File Systems
6319 +#
6320 +# CONFIG_CODA_FS is not set
6321 +# CONFIG_INTERMEZZO_FS is not set
6322 +# CONFIG_NFS_FS is not set
6323 +# CONFIG_NFS_V3 is not set
6324 +# CONFIG_NFS_DIRECTIO is not set
6325 +# CONFIG_ROOT_NFS is not set
6326 +# CONFIG_NFSD is not set
6327 +# CONFIG_NFSD_V3 is not set
6328 +# CONFIG_NFSD_TCP is not set
6329 +# CONFIG_SUNRPC is not set
6330 +# CONFIG_LOCKD is not set
6331 +# CONFIG_SMB_FS is not set
6332 +# CONFIG_NCP_FS is not set
6333 +# CONFIG_NCPFS_PACKET_SIGNING is not set
6334 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
6335 +# CONFIG_NCPFS_STRONG is not set
6336 +# CONFIG_NCPFS_NFS_NS is not set
6337 +# CONFIG_NCPFS_OS2_NS is not set
6338 +# CONFIG_NCPFS_SMALLDOS is not set
6339 +# CONFIG_NCPFS_NLS is not set
6340 +# CONFIG_NCPFS_EXTRAS is not set
6341 +# CONFIG_ZISOFS_FS is not set
6342 +
6343 +#
6344 +# Partition Types
6345 +#
6346 +# CONFIG_PARTITION_ADVANCED is not set
6347 +CONFIG_MSDOS_PARTITION=y
6348 +# CONFIG_SMB_NLS is not set
6349 +CONFIG_NLS=y
6350 +
6351 +#
6352 +# Native Language Support
6353 +#
6354 +CONFIG_NLS_DEFAULT="iso8859-1"
6355 +# CONFIG_NLS_CODEPAGE_437 is not set
6356 +# CONFIG_NLS_CODEPAGE_737 is not set
6357 +# CONFIG_NLS_CODEPAGE_775 is not set
6358 +# CONFIG_NLS_CODEPAGE_850 is not set
6359 +# CONFIG_NLS_CODEPAGE_852 is not set
6360 +# CONFIG_NLS_CODEPAGE_855 is not set
6361 +# CONFIG_NLS_CODEPAGE_857 is not set
6362 +# CONFIG_NLS_CODEPAGE_860 is not set
6363 +# CONFIG_NLS_CODEPAGE_861 is not set
6364 +# CONFIG_NLS_CODEPAGE_862 is not set
6365 +# CONFIG_NLS_CODEPAGE_863 is not set
6366 +# CONFIG_NLS_CODEPAGE_864 is not set
6367 +# CONFIG_NLS_CODEPAGE_865 is not set
6368 +# CONFIG_NLS_CODEPAGE_866 is not set
6369 +# CONFIG_NLS_CODEPAGE_869 is not set
6370 +# CONFIG_NLS_CODEPAGE_936 is not set
6371 +# CONFIG_NLS_CODEPAGE_950 is not set
6372 +# CONFIG_NLS_CODEPAGE_932 is not set
6373 +# CONFIG_NLS_CODEPAGE_949 is not set
6374 +# CONFIG_NLS_CODEPAGE_874 is not set
6375 +# CONFIG_NLS_ISO8859_8 is not set
6376 +# CONFIG_NLS_CODEPAGE_1250 is not set
6377 +# CONFIG_NLS_CODEPAGE_1251 is not set
6378 +# CONFIG_NLS_ISO8859_1 is not set
6379 +# CONFIG_NLS_ISO8859_2 is not set
6380 +# CONFIG_NLS_ISO8859_3 is not set
6381 +# CONFIG_NLS_ISO8859_4 is not set
6382 +# CONFIG_NLS_ISO8859_5 is not set
6383 +# CONFIG_NLS_ISO8859_6 is not set
6384 +# CONFIG_NLS_ISO8859_7 is not set
6385 +# CONFIG_NLS_ISO8859_9 is not set
6386 +# CONFIG_NLS_ISO8859_13 is not set
6387 +# CONFIG_NLS_ISO8859_14 is not set
6388 +# CONFIG_NLS_ISO8859_15 is not set
6389 +# CONFIG_NLS_KOI8_R is not set
6390 +# CONFIG_NLS_KOI8_U is not set
6391 +# CONFIG_NLS_UTF8 is not set
6392 +
6393 +#
6394 +# Multimedia devices
6395 +#
6396 +# CONFIG_VIDEO_DEV is not set
6397 +
6398 +#
6399 +# Console drivers
6400 +#
6401 +# CONFIG_VGA_CONSOLE is not set
6402 +# CONFIG_MDA_CONSOLE is not set
6403 +
6404 +#
6405 +# Frame-buffer support
6406 +#
6407 +CONFIG_FB=y
6408 +CONFIG_DUMMY_CONSOLE=y
6409 +# CONFIG_FB_CYBER2000 is not set
6410 +# CONFIG_FB_VIRTUAL is not set
6411 +CONFIG_FBCON_ADVANCED=y
6412 +# CONFIG_FBCON_MFB is not set
6413 +# CONFIG_FBCON_CFB2 is not set
6414 +# CONFIG_FBCON_CFB4 is not set
6415 +# CONFIG_FBCON_CFB8 is not set
6416 +CONFIG_FBCON_CFB16=y
6417 +# CONFIG_FBCON_CFB24 is not set
6418 +# CONFIG_FBCON_CFB32 is not set
6419 +# CONFIG_FBCON_AFB is not set
6420 +# CONFIG_FBCON_ILBM is not set
6421 +# CONFIG_FBCON_IPLAN2P2 is not set
6422 +# CONFIG_FBCON_IPLAN2P4 is not set
6423 +# CONFIG_FBCON_IPLAN2P8 is not set
6424 +# CONFIG_FBCON_MAC is not set
6425 +# CONFIG_FBCON_VGA_PLANES is not set
6426 +# CONFIG_FBCON_VGA is not set
6427 +# CONFIG_FBCON_HGA is not set
6428 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
6429 +CONFIG_FBCON_FONTS=y
6430 +CONFIG_FONT_8x8=y
6431 +CONFIG_FONT_8x16=y
6432 +# CONFIG_FONT_SUN8x16 is not set
6433 +# CONFIG_FONT_SUN12x22 is not set
6434 +# CONFIG_FONT_6x11 is not set
6435 +# CONFIG_FONT_PEARL_8x8 is not set
6436 +# CONFIG_FONT_ACORN_8x8 is not set
6437 +
6438 +#
6439 +# Sound
6440 +#
6441 +CONFIG_SOUND=y
6442 +# CONFIG_SOUND_ALI5455 is not set
6443 +# CONFIG_SOUND_BT878 is not set
6444 +# CONFIG_SOUND_CMPCI is not set
6445 +# CONFIG_SOUND_EMU10K1 is not set
6446 +# CONFIG_MIDI_EMU10K1 is not set
6447 +# CONFIG_SOUND_FUSION is not set
6448 +# CONFIG_SOUND_CS4281 is not set
6449 +# CONFIG_SOUND_ES1370 is not set
6450 +# CONFIG_SOUND_ES1371 is not set
6451 +# CONFIG_SOUND_ESSSOLO1 is not set
6452 +# CONFIG_SOUND_MAESTRO is not set
6453 +# CONFIG_SOUND_MAESTRO3 is not set
6454 +# CONFIG_SOUND_FORTE is not set
6455 +# CONFIG_SOUND_ICH is not set
6456 +# CONFIG_SOUND_RME96XX is not set
6457 +# CONFIG_SOUND_SONICVIBES is not set
6458 +# CONFIG_SOUND_AU1X00 is not set
6459 +# CONFIG_SOUND_AU1550_PSC is not set
6460 +# CONFIG_SOUND_AU1550_I2S is not set
6461 +# CONFIG_SOUND_TRIDENT is not set
6462 +# CONFIG_SOUND_MSNDCLAS is not set
6463 +# CONFIG_SOUND_MSNDPIN is not set
6464 +# CONFIG_SOUND_VIA82CXXX is not set
6465 +# CONFIG_MIDI_VIA82CXXX is not set
6466 +# CONFIG_SOUND_OSS is not set
6467 +# CONFIG_SOUND_TVMIXER is not set
6468 +# CONFIG_SOUND_AD1980 is not set
6469 +# CONFIG_SOUND_WM97XX is not set
6470 +
6471 +#
6472 +# USB support
6473 +#
6474 +# CONFIG_USB is not set
6475 +
6476 +#
6477 +# Support for USB gadgets
6478 +#
6479 +# CONFIG_USB_GADGET is not set
6480 +
6481 +#
6482 +# Bluetooth support
6483 +#
6484 +# CONFIG_BLUEZ is not set
6485 +
6486 +#
6487 +# Kernel hacking
6488 +#
6489 +CONFIG_CROSSCOMPILE=y
6490 +# CONFIG_RUNTIME_DEBUG is not set
6491 +# CONFIG_KGDB is not set
6492 +# CONFIG_GDB_CONSOLE is not set
6493 +# CONFIG_DEBUG_INFO is not set
6494 +# CONFIG_MAGIC_SYSRQ is not set
6495 +# CONFIG_MIPS_UNCACHED is not set
6496 +CONFIG_LOG_BUF_SHIFT=0
6497 +
6498 +#
6499 +# Cryptographic options
6500 +#
6501 +# CONFIG_CRYPTO is not set
6502 +
6503 +#
6504 +# Library routines
6505 +#
6506 +# CONFIG_CRC32 is not set
6507 +CONFIG_ZLIB_INFLATE=m
6508 +CONFIG_ZLIB_DEFLATE=m
6509 diff -Nur linux-2.4.29/arch/mips/defconfig-hp-lj linux-mips/arch/mips/defconfig-hp-lj
6510 --- linux-2.4.29/arch/mips/defconfig-hp-lj 2005-01-19 15:09:28.000000000 +0100
6511 +++ linux-mips/arch/mips/defconfig-hp-lj 2005-01-09 20:33:59.000000000 +0100
6512 @@ -304,11 +304,6 @@
6513 #
6514 # CONFIG_IPX is not set
6515 # CONFIG_ATALK is not set
6516 -
6517 -#
6518 -# Appletalk devices
6519 -#
6520 -# CONFIG_DEV_APPLETALK is not set
6521 # CONFIG_DECNET is not set
6522 # CONFIG_BRIDGE is not set
6523 # CONFIG_X25 is not set
6524 diff -Nur linux-2.4.29/arch/mips/defconfig-hydrogen3 linux-mips/arch/mips/defconfig-hydrogen3
6525 --- linux-2.4.29/arch/mips/defconfig-hydrogen3 2005-01-19 15:09:28.000000000 +0100
6526 +++ linux-mips/arch/mips/defconfig-hydrogen3 2005-01-30 09:01:26.000000000 +0100
6527 @@ -22,6 +22,7 @@
6528 #
6529 # CONFIG_ACER_PICA_61 is not set
6530 # CONFIG_MIPS_BOSPORUS is not set
6531 +# CONFIG_MIPS_FICMMP is not set
6532 # CONFIG_MIPS_MIRAGE is not set
6533 # CONFIG_MIPS_DB1000 is not set
6534 # CONFIG_MIPS_DB1100 is not set
6535 @@ -30,9 +31,11 @@
6536 # CONFIG_MIPS_PB1000 is not set
6537 # CONFIG_MIPS_PB1100 is not set
6538 # CONFIG_MIPS_PB1500 is not set
6539 -CONFIG_MIPS_HYDROGEN3=y
6540 # CONFIG_MIPS_PB1550 is not set
6541 +# CONFIG_MIPS_PB1200 is not set
6542 +CONFIG_MIPS_HYDROGEN3=y
6543 # CONFIG_MIPS_XXS1500 is not set
6544 +# CONFIG_MIPS_EP1000 is not set
6545 # CONFIG_MIPS_MTX1 is not set
6546 # CONFIG_COGENT_CSB250 is not set
6547 # CONFIG_BAGET_MIPS is not set
6548 @@ -185,6 +188,7 @@
6549 CONFIG_MTD_BLOCK=y
6550 # CONFIG_FTL is not set
6551 # CONFIG_NFTL is not set
6552 +# CONFIG_INFTL is not set
6553
6554 #
6555 # RAM/ROM/Flash chip drivers
6556 @@ -196,6 +200,7 @@
6557 # CONFIG_MTD_CFI_INTELEXT is not set
6558 CONFIG_MTD_CFI_AMDSTD=y
6559 # CONFIG_MTD_CFI_STAA is not set
6560 +CONFIG_MTD_CFI_UTIL=y
6561 # CONFIG_MTD_RAM is not set
6562 # CONFIG_MTD_ROM is not set
6563 # CONFIG_MTD_ABSENT is not set
6564 @@ -207,17 +212,12 @@
6565 #
6566 # Mapping drivers for chip access
6567 #
6568 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
6569 # CONFIG_MTD_PHYSMAP is not set
6570 -# CONFIG_MTD_PB1000 is not set
6571 -# CONFIG_MTD_PB1500 is not set
6572 -# CONFIG_MTD_PB1100 is not set
6573 -# CONFIG_MTD_BOSPORUS is not set
6574 -# CONFIG_MTD_XXS1500 is not set
6575 -# CONFIG_MTD_MTX1 is not set
6576 -# CONFIG_MTD_DB1X00 is not set
6577 # CONFIG_MTD_PB1550 is not set
6578 -CONFIG_MTD_HYDROGEN3=y
6579 -# CONFIG_MTD_MIRAGE is not set
6580 +# CONFIG_MTD_DB1550 is not set
6581 +# CONFIG_MTD_PB1200 is not set
6582 +# CONFIG_MTD_XXS1500 is not set
6583 # CONFIG_MTD_CSTM_MIPS_IXX is not set
6584 # CONFIG_MTD_OCELOT is not set
6585 # CONFIG_MTD_LASAT is not set
6586 @@ -235,9 +235,9 @@
6587 #
6588 # Disk-On-Chip Device Drivers
6589 #
6590 -# CONFIG_MTD_DOC1000 is not set
6591 # CONFIG_MTD_DOC2000 is not set
6592 # CONFIG_MTD_DOC2001 is not set
6593 +# CONFIG_MTD_DOC2001PLUS is not set
6594 # CONFIG_MTD_DOCPROBE is not set
6595
6596 #
6597 @@ -340,11 +340,6 @@
6598 #
6599 # CONFIG_IPX is not set
6600 # CONFIG_ATALK is not set
6601 -
6602 -#
6603 -# Appletalk devices
6604 -#
6605 -# CONFIG_DEV_APPLETALK is not set
6606 # CONFIG_DECNET is not set
6607 # CONFIG_BRIDGE is not set
6608 # CONFIG_X25 is not set
6609 @@ -386,6 +381,7 @@
6610 #
6611 # Please see Documentation/ide.txt for help/info on IDE drives
6612 #
6613 +# CONFIG_BLK_DEV_IDE_AU1XXX is not set
6614 # CONFIG_BLK_DEV_HD_IDE is not set
6615 # CONFIG_BLK_DEV_HD is not set
6616 # CONFIG_BLK_DEV_IDE_SATA is not set
6617 @@ -403,6 +399,7 @@
6618 #
6619 # IDE chipset support/bugfixes
6620 #
6621 +# CONFIG_BLK_DEV_IDE_AU1XXX is not set
6622 # CONFIG_BLK_DEV_CMD640 is not set
6623 # CONFIG_BLK_DEV_CMD640_ENHANCED is not set
6624 # CONFIG_BLK_DEV_ISAPNP is not set
6625 @@ -590,7 +587,6 @@
6626 # CONFIG_AU1X00_USB_TTY is not set
6627 # CONFIG_AU1X00_USB_RAW is not set
6628 # CONFIG_TXX927_SERIAL is not set
6629 -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
6630 CONFIG_UNIX98_PTYS=y
6631 CONFIG_UNIX98_PTY_COUNT=256
6632
6633 @@ -677,6 +673,12 @@
6634 # CONFIG_SYNCLINK_CS is not set
6635 # CONFIG_AU1X00_GPIO is not set
6636 # CONFIG_TS_AU1X00_ADS7846 is not set
6637 +# CONFIG_AU1550_PSC_SPI is not set
6638 +# CONFIG_AU1XXX_MAE is not set
6639 +# CONFIG_AU1XXX_AES is not set
6640 +# CONFIG_AU1XXX_CIM is not set
6641 +# CONFIG_AU1XXX_AES_TEST is not set
6642 +CONFIG_AU1XXX_BUTTONS=y
6643
6644 #
6645 # File systems
6646 @@ -838,18 +840,20 @@
6647 # CONFIG_FB_PM2 is not set
6648 # CONFIG_FB_PM3 is not set
6649 # CONFIG_FB_CYBER2000 is not set
6650 +CONFIG_FB_AU1100=y
6651 +# CONFIG_FOCUS_ENHANCEMENTS is not set
6652 # CONFIG_FB_MATROX is not set
6653 # CONFIG_FB_ATY is not set
6654 # CONFIG_FB_RADEON is not set
6655 # CONFIG_FB_ATY128 is not set
6656 # CONFIG_FB_INTEL is not set
6657 # CONFIG_FB_SIS is not set
6658 +# CONFIG_FB_SMI501 is not set
6659 # CONFIG_FB_NEOMAGIC is not set
6660 # CONFIG_FB_3DFX is not set
6661 # CONFIG_FB_VOODOO1 is not set
6662 # CONFIG_FB_TRIDENT is not set
6663 # CONFIG_FB_E1356 is not set
6664 -CONFIG_FB_AU1100=y
6665 # CONFIG_FB_IT8181 is not set
6666 # CONFIG_FB_VIRTUAL is not set
6667 CONFIG_FBCON_ADVANCED=y
6668 @@ -923,9 +927,11 @@
6669 # USB Host Controller Drivers
6670 #
6671 # CONFIG_USB_EHCI_HCD is not set
6672 +# CONFIG_USB_NON_PCI_EHCI is not set
6673 # CONFIG_USB_UHCI is not set
6674 # CONFIG_USB_UHCI_ALT is not set
6675 CONFIG_USB_OHCI=y
6676 +CONFIG_USB_NON_PCI_OHCI=y
6677
6678 #
6679 # USB Device Class drivers
6680 diff -Nur linux-2.4.29/arch/mips/defconfig-ip22 linux-mips/arch/mips/defconfig-ip22
6681 --- linux-2.4.29/arch/mips/defconfig-ip22 2005-01-19 15:09:28.000000000 +0100
6682 +++ linux-mips/arch/mips/defconfig-ip22 2005-01-09 20:33:59.000000000 +0100
6683 @@ -235,11 +235,6 @@
6684 #
6685 # CONFIG_IPX is not set
6686 # CONFIG_ATALK is not set
6687 -
6688 -#
6689 -# Appletalk devices
6690 -#
6691 -# CONFIG_DEV_APPLETALK is not set
6692 # CONFIG_DECNET is not set
6693 # CONFIG_BRIDGE is not set
6694 # CONFIG_X25 is not set
6695 @@ -319,6 +314,7 @@
6696 # CONFIG_SCSI_MEGARAID is not set
6697 # CONFIG_SCSI_MEGARAID2 is not set
6698 # CONFIG_SCSI_SATA is not set
6699 +# CONFIG_SCSI_SATA_AHCI is not set
6700 # CONFIG_SCSI_SATA_SVW is not set
6701 # CONFIG_SCSI_ATA_PIIX is not set
6702 # CONFIG_SCSI_SATA_NV is not set
6703 diff -Nur linux-2.4.29/arch/mips/defconfig-it8172 linux-mips/arch/mips/defconfig-it8172
6704 --- linux-2.4.29/arch/mips/defconfig-it8172 2005-01-19 15:09:28.000000000 +0100
6705 +++ linux-mips/arch/mips/defconfig-it8172 2005-01-09 20:33:59.000000000 +0100
6706 @@ -304,11 +304,6 @@
6707 #
6708 # CONFIG_IPX is not set
6709 # CONFIG_ATALK is not set
6710 -
6711 -#
6712 -# Appletalk devices
6713 -#
6714 -# CONFIG_DEV_APPLETALK is not set
6715 # CONFIG_DECNET is not set
6716 # CONFIG_BRIDGE is not set
6717 # CONFIG_X25 is not set
6718 diff -Nur linux-2.4.29/arch/mips/defconfig-ivr linux-mips/arch/mips/defconfig-ivr
6719 --- linux-2.4.29/arch/mips/defconfig-ivr 2005-01-19 15:09:28.000000000 +0100
6720 +++ linux-mips/arch/mips/defconfig-ivr 2005-01-09 20:33:59.000000000 +0100
6721 @@ -226,11 +226,6 @@
6722 #
6723 # CONFIG_IPX is not set
6724 # CONFIG_ATALK is not set
6725 -
6726 -#
6727 -# Appletalk devices
6728 -#
6729 -# CONFIG_DEV_APPLETALK is not set
6730 # CONFIG_DECNET is not set
6731 # CONFIG_BRIDGE is not set
6732 # CONFIG_X25 is not set
6733 diff -Nur linux-2.4.29/arch/mips/defconfig-jmr3927 linux-mips/arch/mips/defconfig-jmr3927
6734 --- linux-2.4.29/arch/mips/defconfig-jmr3927 2005-01-19 15:09:28.000000000 +0100
6735 +++ linux-mips/arch/mips/defconfig-jmr3927 2005-01-09 20:33:59.000000000 +0100
6736 @@ -225,11 +225,6 @@
6737 #
6738 # CONFIG_IPX is not set
6739 # CONFIG_ATALK is not set
6740 -
6741 -#
6742 -# Appletalk devices
6743 -#
6744 -# CONFIG_DEV_APPLETALK is not set
6745 # CONFIG_DECNET is not set
6746 # CONFIG_BRIDGE is not set
6747 # CONFIG_X25 is not set
6748 diff -Nur linux-2.4.29/arch/mips/defconfig-lasat linux-mips/arch/mips/defconfig-lasat
6749 --- linux-2.4.29/arch/mips/defconfig-lasat 2005-01-19 15:09:28.000000000 +0100
6750 +++ linux-mips/arch/mips/defconfig-lasat 2005-01-09 20:33:59.000000000 +0100
6751 @@ -303,11 +303,6 @@
6752 #
6753 # CONFIG_IPX is not set
6754 # CONFIG_ATALK is not set
6755 -
6756 -#
6757 -# Appletalk devices
6758 -#
6759 -# CONFIG_DEV_APPLETALK is not set
6760 # CONFIG_DECNET is not set
6761 # CONFIG_BRIDGE is not set
6762 # CONFIG_X25 is not set
6763 diff -Nur linux-2.4.29/arch/mips/defconfig-malta linux-mips/arch/mips/defconfig-malta
6764 --- linux-2.4.29/arch/mips/defconfig-malta 2005-01-19 15:09:28.000000000 +0100
6765 +++ linux-mips/arch/mips/defconfig-malta 2005-01-09 20:33:59.000000000 +0100
6766 @@ -237,11 +237,6 @@
6767 #
6768 # CONFIG_IPX is not set
6769 # CONFIG_ATALK is not set
6770 -
6771 -#
6772 -# Appletalk devices
6773 -#
6774 -# CONFIG_DEV_APPLETALK is not set
6775 # CONFIG_DECNET is not set
6776 # CONFIG_BRIDGE is not set
6777 # CONFIG_X25 is not set
6778 @@ -319,6 +314,7 @@
6779 # CONFIG_SCSI_MEGARAID is not set
6780 # CONFIG_SCSI_MEGARAID2 is not set
6781 # CONFIG_SCSI_SATA is not set
6782 +# CONFIG_SCSI_SATA_AHCI is not set
6783 # CONFIG_SCSI_SATA_SVW is not set
6784 # CONFIG_SCSI_ATA_PIIX is not set
6785 # CONFIG_SCSI_SATA_NV is not set
6786 diff -Nur linux-2.4.29/arch/mips/defconfig-mirage linux-mips/arch/mips/defconfig-mirage
6787 --- linux-2.4.29/arch/mips/defconfig-mirage 2005-01-19 15:09:28.000000000 +0100
6788 +++ linux-mips/arch/mips/defconfig-mirage 2005-01-30 09:01:26.000000000 +0100
6789 @@ -335,11 +335,6 @@
6790 #
6791 # CONFIG_IPX is not set
6792 # CONFIG_ATALK is not set
6793 -
6794 -#
6795 -# Appletalk devices
6796 -#
6797 -# CONFIG_DEV_APPLETALK is not set
6798 # CONFIG_DECNET is not set
6799 # CONFIG_BRIDGE is not set
6800 # CONFIG_X25 is not set
6801 @@ -863,7 +858,7 @@
6802 # CONFIG_USB_UHCI is not set
6803 # CONFIG_USB_UHCI_ALT is not set
6804 CONFIG_USB_OHCI=y
6805 -
6806 +CONFIG_USB_NON_PCI_OHCI=y
6807 #
6808 # USB Device Class drivers
6809 #
6810 diff -Nur linux-2.4.29/arch/mips/defconfig-mpc30x linux-mips/arch/mips/defconfig-mpc30x
6811 --- linux-2.4.29/arch/mips/defconfig-mpc30x 2005-01-19 15:09:28.000000000 +0100
6812 +++ linux-mips/arch/mips/defconfig-mpc30x 2005-01-09 20:33:59.000000000 +0100
6813 @@ -228,11 +228,6 @@
6814 #
6815 # CONFIG_IPX is not set
6816 # CONFIG_ATALK is not set
6817 -
6818 -#
6819 -# Appletalk devices
6820 -#
6821 -# CONFIG_DEV_APPLETALK is not set
6822 # CONFIG_DECNET is not set
6823 # CONFIG_BRIDGE is not set
6824 # CONFIG_X25 is not set
6825 diff -Nur linux-2.4.29/arch/mips/defconfig-mtx-1 linux-mips/arch/mips/defconfig-mtx-1
6826 --- linux-2.4.29/arch/mips/defconfig-mtx-1 2005-01-19 15:09:28.000000000 +0100
6827 +++ linux-mips/arch/mips/defconfig-mtx-1 2005-01-20 03:19:22.000000000 +0100
6828 @@ -371,11 +371,6 @@
6829 #
6830 # CONFIG_IPX is not set
6831 # CONFIG_ATALK is not set
6832 -
6833 -#
6834 -# Appletalk devices
6835 -#
6836 -# CONFIG_DEV_APPLETALK is not set
6837 # CONFIG_DECNET is not set
6838 CONFIG_BRIDGE=m
6839 # CONFIG_X25 is not set
6840 @@ -479,6 +474,7 @@
6841 # CONFIG_SCSI_MEGARAID is not set
6842 # CONFIG_SCSI_MEGARAID2 is not set
6843 # CONFIG_SCSI_SATA is not set
6844 +# CONFIG_SCSI_SATA_AHCI is not set
6845 # CONFIG_SCSI_SATA_SVW is not set
6846 # CONFIG_SCSI_ATA_PIIX is not set
6847 # CONFIG_SCSI_SATA_NV is not set
6848 diff -Nur linux-2.4.29/arch/mips/defconfig-nino linux-mips/arch/mips/defconfig-nino
6849 --- linux-2.4.29/arch/mips/defconfig-nino 2005-01-19 15:09:28.000000000 +0100
6850 +++ linux-mips/arch/mips/defconfig-nino 2005-01-09 20:33:59.000000000 +0100
6851 @@ -226,11 +226,6 @@
6852 #
6853 # CONFIG_IPX is not set
6854 # CONFIG_ATALK is not set
6855 -
6856 -#
6857 -# Appletalk devices
6858 -#
6859 -# CONFIG_DEV_APPLETALK is not set
6860 # CONFIG_DECNET is not set
6861 # CONFIG_BRIDGE is not set
6862 # CONFIG_X25 is not set
6863 diff -Nur linux-2.4.29/arch/mips/defconfig-ocelot linux-mips/arch/mips/defconfig-ocelot
6864 --- linux-2.4.29/arch/mips/defconfig-ocelot 2005-01-19 15:09:28.000000000 +0100
6865 +++ linux-mips/arch/mips/defconfig-ocelot 2005-01-09 20:33:59.000000000 +0100
6866 @@ -307,11 +307,6 @@
6867 #
6868 # CONFIG_IPX is not set
6869 # CONFIG_ATALK is not set
6870 -
6871 -#
6872 -# Appletalk devices
6873 -#
6874 -# CONFIG_DEV_APPLETALK is not set
6875 # CONFIG_DECNET is not set
6876 # CONFIG_BRIDGE is not set
6877 # CONFIG_X25 is not set
6878 diff -Nur linux-2.4.29/arch/mips/defconfig-osprey linux-mips/arch/mips/defconfig-osprey
6879 --- linux-2.4.29/arch/mips/defconfig-osprey 2005-01-19 15:09:28.000000000 +0100
6880 +++ linux-mips/arch/mips/defconfig-osprey 2005-01-09 20:33:59.000000000 +0100
6881 @@ -227,11 +227,6 @@
6882 #
6883 # CONFIG_IPX is not set
6884 # CONFIG_ATALK is not set
6885 -
6886 -#
6887 -# Appletalk devices
6888 -#
6889 -# CONFIG_DEV_APPLETALK is not set
6890 # CONFIG_DECNET is not set
6891 # CONFIG_BRIDGE is not set
6892 # CONFIG_X25 is not set
6893 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1000 linux-mips/arch/mips/defconfig-pb1000
6894 --- linux-2.4.29/arch/mips/defconfig-pb1000 2005-01-19 15:09:28.000000000 +0100
6895 +++ linux-mips/arch/mips/defconfig-pb1000 2005-02-03 07:35:29.000000000 +0100
6896 @@ -22,16 +22,19 @@
6897 #
6898 # CONFIG_ACER_PICA_61 is not set
6899 # CONFIG_MIPS_BOSPORUS is not set
6900 +# CONFIG_MIPS_FICMMP is not set
6901 # CONFIG_MIPS_MIRAGE is not set
6902 # CONFIG_MIPS_DB1000 is not set
6903 # CONFIG_MIPS_DB1100 is not set
6904 # CONFIG_MIPS_DB1500 is not set
6905 # CONFIG_MIPS_DB1550 is not set
6906 +# CONFIG_MIPS_DB1200 is not set
6907 CONFIG_MIPS_PB1000=y
6908 # CONFIG_MIPS_PB1100 is not set
6909 # CONFIG_MIPS_PB1500 is not set
6910 -# CONFIG_MIPS_HYDROGEN3 is not set
6911 # CONFIG_MIPS_PB1550 is not set
6912 +# CONFIG_MIPS_PB1200 is not set
6913 +# CONFIG_MIPS_HYDROGEN3 is not set
6914 # CONFIG_MIPS_XXS1500 is not set
6915 # CONFIG_MIPS_MTX1 is not set
6916 # CONFIG_COGENT_CSB250 is not set
6917 @@ -324,11 +327,6 @@
6918 #
6919 # CONFIG_IPX is not set
6920 # CONFIG_ATALK is not set
6921 -
6922 -#
6923 -# Appletalk devices
6924 -#
6925 -# CONFIG_DEV_APPLETALK is not set
6926 # CONFIG_DECNET is not set
6927 # CONFIG_BRIDGE is not set
6928 # CONFIG_X25 is not set
6929 @@ -707,7 +705,7 @@
6930 #
6931 # CONFIG_PCMCIA_SERIAL_CS is not set
6932 # CONFIG_SYNCLINK_CS is not set
6933 -CONFIG_AU1X00_GPIO=m
6934 +CONFIG_AU1X00_GPIO=y
6935 # CONFIG_TS_AU1X00_ADS7846 is not set
6936
6937 #
6938 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1100 linux-mips/arch/mips/defconfig-pb1100
6939 --- linux-2.4.29/arch/mips/defconfig-pb1100 2005-01-19 15:09:28.000000000 +0100
6940 +++ linux-mips/arch/mips/defconfig-pb1100 2005-02-03 07:35:29.000000000 +0100
6941 @@ -22,16 +22,19 @@
6942 #
6943 # CONFIG_ACER_PICA_61 is not set
6944 # CONFIG_MIPS_BOSPORUS is not set
6945 +# CONFIG_MIPS_FICMMP is not set
6946 # CONFIG_MIPS_MIRAGE is not set
6947 # CONFIG_MIPS_DB1000 is not set
6948 # CONFIG_MIPS_DB1100 is not set
6949 # CONFIG_MIPS_DB1500 is not set
6950 # CONFIG_MIPS_DB1550 is not set
6951 +# CONFIG_MIPS_DB1200 is not set
6952 # CONFIG_MIPS_PB1000 is not set
6953 CONFIG_MIPS_PB1100=y
6954 # CONFIG_MIPS_PB1500 is not set
6955 -# CONFIG_MIPS_HYDROGEN3 is not set
6956 # CONFIG_MIPS_PB1550 is not set
6957 +# CONFIG_MIPS_PB1200 is not set
6958 +# CONFIG_MIPS_HYDROGEN3 is not set
6959 # CONFIG_MIPS_XXS1500 is not set
6960 # CONFIG_MIPS_MTX1 is not set
6961 # CONFIG_COGENT_CSB250 is not set
6962 @@ -324,11 +327,6 @@
6963 #
6964 # CONFIG_IPX is not set
6965 # CONFIG_ATALK is not set
6966 -
6967 -#
6968 -# Appletalk devices
6969 -#
6970 -# CONFIG_DEV_APPLETALK is not set
6971 # CONFIG_DECNET is not set
6972 # CONFIG_BRIDGE is not set
6973 # CONFIG_X25 is not set
6974 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1200 linux-mips/arch/mips/defconfig-pb1200
6975 --- linux-2.4.29/arch/mips/defconfig-pb1200 1970-01-01 01:00:00.000000000 +0100
6976 +++ linux-mips/arch/mips/defconfig-pb1200 2005-01-30 09:01:27.000000000 +0100
6977 @@ -0,0 +1,1063 @@
6978 +#
6979 +# Automatically generated make config: don't edit
6980 +#
6981 +CONFIG_MIPS=y
6982 +CONFIG_MIPS32=y
6983 +# CONFIG_MIPS64 is not set
6984 +
6985 +#
6986 +# Code maturity level options
6987 +#
6988 +CONFIG_EXPERIMENTAL=y
6989 +
6990 +#
6991 +# Loadable module support
6992 +#
6993 +CONFIG_MODULES=y
6994 +# CONFIG_MODVERSIONS is not set
6995 +CONFIG_KMOD=y
6996 +
6997 +#
6998 +# Machine selection
6999 +#
7000 +# CONFIG_ACER_PICA_61 is not set
7001 +# CONFIG_MIPS_BOSPORUS is not set
7002 +# CONFIG_MIPS_FICMMP is not set
7003 +# CONFIG_MIPS_MIRAGE is not set
7004 +# CONFIG_MIPS_DB1000 is not set
7005 +# CONFIG_MIPS_DB1100 is not set
7006 +# CONFIG_MIPS_DB1500 is not set
7007 +# CONFIG_MIPS_DB1550 is not set
7008 +# CONFIG_MIPS_DB1200 is not set
7009 +# CONFIG_MIPS_PB1000 is not set
7010 +# CONFIG_MIPS_PB1100 is not set
7011 +# CONFIG_MIPS_PB1500 is not set
7012 +# CONFIG_MIPS_PB1550 is not set
7013 +CONFIG_MIPS_PB1200=y
7014 +# CONFIG_MIPS_HYDROGEN3 is not set
7015 +# CONFIG_MIPS_XXS1500 is not set
7016 +# CONFIG_MIPS_MTX1 is not set
7017 +# CONFIG_COGENT_CSB250 is not set
7018 +# CONFIG_BAGET_MIPS is not set
7019 +# CONFIG_CASIO_E55 is not set
7020 +# CONFIG_MIPS_COBALT is not set
7021 +# CONFIG_DECSTATION is not set
7022 +# CONFIG_MIPS_EV64120 is not set
7023 +# CONFIG_MIPS_EV96100 is not set
7024 +# CONFIG_MIPS_IVR is not set
7025 +# CONFIG_HP_LASERJET is not set
7026 +# CONFIG_IBM_WORKPAD is not set
7027 +# CONFIG_LASAT is not set
7028 +# CONFIG_MIPS_ITE8172 is not set
7029 +# CONFIG_MIPS_ATLAS is not set
7030 +# CONFIG_MIPS_MAGNUM_4000 is not set
7031 +# CONFIG_MIPS_MALTA is not set
7032 +# CONFIG_MIPS_SEAD is not set
7033 +# CONFIG_MOMENCO_OCELOT is not set
7034 +# CONFIG_MOMENCO_OCELOT_G is not set
7035 +# CONFIG_MOMENCO_OCELOT_C is not set
7036 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
7037 +# CONFIG_PMC_BIG_SUR is not set
7038 +# CONFIG_PMC_STRETCH is not set
7039 +# CONFIG_PMC_YOSEMITE is not set
7040 +# CONFIG_DDB5074 is not set
7041 +# CONFIG_DDB5476 is not set
7042 +# CONFIG_DDB5477 is not set
7043 +# CONFIG_NEC_OSPREY is not set
7044 +# CONFIG_NEC_EAGLE is not set
7045 +# CONFIG_OLIVETTI_M700 is not set
7046 +# CONFIG_NINO is not set
7047 +# CONFIG_SGI_IP22 is not set
7048 +# CONFIG_SGI_IP27 is not set
7049 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
7050 +# CONFIG_SNI_RM200_PCI is not set
7051 +# CONFIG_TANBAC_TB0226 is not set
7052 +# CONFIG_TANBAC_TB0229 is not set
7053 +# CONFIG_TOSHIBA_JMR3927 is not set
7054 +# CONFIG_TOSHIBA_RBTX4927 is not set
7055 +# CONFIG_VICTOR_MPC30X is not set
7056 +# CONFIG_ZAO_CAPCELLA is not set
7057 +# CONFIG_HIGHMEM is not set
7058 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
7059 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
7060 +CONFIG_SOC_AU1X00=y
7061 +CONFIG_SOC_AU1200=y
7062 +CONFIG_NONCOHERENT_IO=y
7063 +CONFIG_PC_KEYB=y
7064 +# CONFIG_MIPS_AU1000 is not set
7065 +
7066 +#
7067 +# CPU selection
7068 +#
7069 +CONFIG_CPU_MIPS32=y
7070 +# CONFIG_CPU_MIPS64 is not set
7071 +# CONFIG_CPU_R3000 is not set
7072 +# CONFIG_CPU_TX39XX is not set
7073 +# CONFIG_CPU_VR41XX is not set
7074 +# CONFIG_CPU_R4300 is not set
7075 +# CONFIG_CPU_R4X00 is not set
7076 +# CONFIG_CPU_TX49XX is not set
7077 +# CONFIG_CPU_R5000 is not set
7078 +# CONFIG_CPU_R5432 is not set
7079 +# CONFIG_CPU_R6000 is not set
7080 +# CONFIG_CPU_NEVADA is not set
7081 +# CONFIG_CPU_R8000 is not set
7082 +# CONFIG_CPU_R10000 is not set
7083 +# CONFIG_CPU_RM7000 is not set
7084 +# CONFIG_CPU_RM9000 is not set
7085 +# CONFIG_CPU_SB1 is not set
7086 +CONFIG_PAGE_SIZE_4KB=y
7087 +# CONFIG_PAGE_SIZE_16KB is not set
7088 +# CONFIG_PAGE_SIZE_64KB is not set
7089 +CONFIG_CPU_HAS_PREFETCH=y
7090 +# CONFIG_VTAG_ICACHE is not set
7091 +CONFIG_64BIT_PHYS_ADDR=y
7092 +# CONFIG_CPU_ADVANCED is not set
7093 +CONFIG_CPU_HAS_LLSC=y
7094 +# CONFIG_CPU_HAS_LLDSCD is not set
7095 +# CONFIG_CPU_HAS_WB is not set
7096 +CONFIG_CPU_HAS_SYNC=y
7097 +
7098 +#
7099 +# General setup
7100 +#
7101 +CONFIG_CPU_LITTLE_ENDIAN=y
7102 +# CONFIG_BUILD_ELF64 is not set
7103 +CONFIG_NET=y
7104 +CONFIG_PCI=y
7105 +CONFIG_PCI_NEW=y
7106 +CONFIG_PCI_AUTO=y
7107 +# CONFIG_PCI_NAMES is not set
7108 +# CONFIG_ISA is not set
7109 +# CONFIG_TC is not set
7110 +# CONFIG_MCA is not set
7111 +# CONFIG_SBUS is not set
7112 +CONFIG_HOTPLUG=y
7113 +
7114 +#
7115 +# PCMCIA/CardBus support
7116 +#
7117 +CONFIG_PCMCIA=m
7118 +# CONFIG_CARDBUS is not set
7119 +# CONFIG_TCIC is not set
7120 +# CONFIG_I82092 is not set
7121 +# CONFIG_I82365 is not set
7122 +CONFIG_PCMCIA_AU1X00=m
7123 +
7124 +#
7125 +# PCI Hotplug Support
7126 +#
7127 +# CONFIG_HOTPLUG_PCI is not set
7128 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
7129 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
7130 +# CONFIG_HOTPLUG_PCI_SHPC is not set
7131 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
7132 +# CONFIG_HOTPLUG_PCI_PCIE is not set
7133 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
7134 +CONFIG_SYSVIPC=y
7135 +# CONFIG_BSD_PROCESS_ACCT is not set
7136 +CONFIG_SYSCTL=y
7137 +CONFIG_KCORE_ELF=y
7138 +# CONFIG_KCORE_AOUT is not set
7139 +# CONFIG_BINFMT_AOUT is not set
7140 +CONFIG_BINFMT_ELF=y
7141 +# CONFIG_MIPS32_COMPAT is not set
7142 +# CONFIG_MIPS32_O32 is not set
7143 +# CONFIG_MIPS32_N32 is not set
7144 +# CONFIG_BINFMT_ELF32 is not set
7145 +# CONFIG_BINFMT_MISC is not set
7146 +# CONFIG_OOM_KILLER is not set
7147 +CONFIG_CMDLINE_BOOL=y
7148 +CONFIG_CMDLINE="mem=96M"
7149 +# CONFIG_PM is not set
7150 +
7151 +#
7152 +# Memory Technology Devices (MTD)
7153 +#
7154 +# CONFIG_MTD is not set
7155 +
7156 +#
7157 +# Parallel port support
7158 +#
7159 +# CONFIG_PARPORT is not set
7160 +
7161 +#
7162 +# Plug and Play configuration
7163 +#
7164 +# CONFIG_PNP is not set
7165 +# CONFIG_ISAPNP is not set
7166 +
7167 +#
7168 +# Block devices
7169 +#
7170 +# CONFIG_BLK_DEV_FD is not set
7171 +# CONFIG_BLK_DEV_XD is not set
7172 +# CONFIG_PARIDE is not set
7173 +# CONFIG_BLK_CPQ_DA is not set
7174 +# CONFIG_BLK_CPQ_CISS_DA is not set
7175 +# CONFIG_CISS_SCSI_TAPE is not set
7176 +# CONFIG_CISS_MONITOR_THREAD is not set
7177 +# CONFIG_BLK_DEV_DAC960 is not set
7178 +# CONFIG_BLK_DEV_UMEM is not set
7179 +# CONFIG_BLK_DEV_SX8 is not set
7180 +CONFIG_BLK_DEV_LOOP=y
7181 +# CONFIG_BLK_DEV_NBD is not set
7182 +# CONFIG_BLK_DEV_RAM is not set
7183 +# CONFIG_BLK_DEV_INITRD is not set
7184 +# CONFIG_BLK_STATS is not set
7185 +
7186 +#
7187 +# Multi-device support (RAID and LVM)
7188 +#
7189 +# CONFIG_MD is not set
7190 +# CONFIG_BLK_DEV_MD is not set
7191 +# CONFIG_MD_LINEAR is not set
7192 +# CONFIG_MD_RAID0 is not set
7193 +# CONFIG_MD_RAID1 is not set
7194 +# CONFIG_MD_RAID5 is not set
7195 +# CONFIG_MD_MULTIPATH is not set
7196 +# CONFIG_BLK_DEV_LVM is not set
7197 +
7198 +#
7199 +# Networking options
7200 +#
7201 +CONFIG_PACKET=y
7202 +# CONFIG_PACKET_MMAP is not set
7203 +# CONFIG_NETLINK_DEV is not set
7204 +CONFIG_NETFILTER=y
7205 +# CONFIG_NETFILTER_DEBUG is not set
7206 +CONFIG_FILTER=y
7207 +CONFIG_UNIX=y
7208 +CONFIG_INET=y
7209 +CONFIG_IP_MULTICAST=y
7210 +# CONFIG_IP_ADVANCED_ROUTER is not set
7211 +CONFIG_IP_PNP=y
7212 +# CONFIG_IP_PNP_DHCP is not set
7213 +CONFIG_IP_PNP_BOOTP=y
7214 +# CONFIG_IP_PNP_RARP is not set
7215 +# CONFIG_NET_IPIP is not set
7216 +# CONFIG_NET_IPGRE is not set
7217 +# CONFIG_IP_MROUTE is not set
7218 +# CONFIG_ARPD is not set
7219 +# CONFIG_INET_ECN is not set
7220 +# CONFIG_SYN_COOKIES is not set
7221 +
7222 +#
7223 +# IP: Netfilter Configuration
7224 +#
7225 +# CONFIG_IP_NF_CONNTRACK is not set
7226 +# CONFIG_IP_NF_QUEUE is not set
7227 +# CONFIG_IP_NF_IPTABLES is not set
7228 +# CONFIG_IP_NF_ARPTABLES is not set
7229 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
7230 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
7231 +
7232 +#
7233 +# IP: Virtual Server Configuration
7234 +#
7235 +# CONFIG_IP_VS is not set
7236 +# CONFIG_IPV6 is not set
7237 +# CONFIG_KHTTPD is not set
7238 +
7239 +#
7240 +# SCTP Configuration (EXPERIMENTAL)
7241 +#
7242 +# CONFIG_IP_SCTP is not set
7243 +# CONFIG_ATM is not set
7244 +# CONFIG_VLAN_8021Q is not set
7245 +
7246 +#
7247 +#
7248 +#
7249 +# CONFIG_IPX is not set
7250 +# CONFIG_ATALK is not set
7251 +# CONFIG_DECNET is not set
7252 +# CONFIG_BRIDGE is not set
7253 +# CONFIG_X25 is not set
7254 +# CONFIG_LAPB is not set
7255 +# CONFIG_LLC is not set
7256 +# CONFIG_NET_DIVERT is not set
7257 +# CONFIG_ECONET is not set
7258 +# CONFIG_WAN_ROUTER is not set
7259 +# CONFIG_NET_FASTROUTE is not set
7260 +# CONFIG_NET_HW_FLOWCONTROL is not set
7261 +
7262 +#
7263 +# QoS and/or fair queueing
7264 +#
7265 +# CONFIG_NET_SCHED is not set
7266 +
7267 +#
7268 +# Network testing
7269 +#
7270 +# CONFIG_NET_PKTGEN is not set
7271 +
7272 +#
7273 +# Telephony Support
7274 +#
7275 +# CONFIG_PHONE is not set
7276 +# CONFIG_PHONE_IXJ is not set
7277 +# CONFIG_PHONE_IXJ_PCMCIA is not set
7278 +
7279 +#
7280 +# ATA/IDE/MFM/RLL support
7281 +#
7282 +CONFIG_IDE=y
7283 +
7284 +#
7285 +# IDE, ATA and ATAPI Block devices
7286 +#
7287 +CONFIG_BLK_DEV_IDE=y
7288 +
7289 +#
7290 +# Please see Documentation/ide.txt for help/info on IDE drives
7291 +#
7292 +# CONFIG_BLK_DEV_HD_IDE is not set
7293 +# CONFIG_BLK_DEV_HD is not set
7294 +# CONFIG_BLK_DEV_IDE_SATA is not set
7295 +CONFIG_BLK_DEV_IDEDISK=y
7296 +CONFIG_IDEDISK_MULTI_MODE=y
7297 +CONFIG_IDEDISK_STROKE=y
7298 +CONFIG_BLK_DEV_IDECS=m
7299 +# CONFIG_BLK_DEV_DELKIN is not set
7300 +# CONFIG_BLK_DEV_IDECD is not set
7301 +# CONFIG_BLK_DEV_IDETAPE is not set
7302 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
7303 +# CONFIG_BLK_DEV_IDESCSI is not set
7304 +# CONFIG_IDE_TASK_IOCTL is not set
7305 +
7306 +#
7307 +# IDE chipset support/bugfixes
7308 +#
7309 +# CONFIG_BLK_DEV_CMD640 is not set
7310 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
7311 +# CONFIG_BLK_DEV_ISAPNP is not set
7312 +# CONFIG_BLK_DEV_IDEPCI is not set
7313 +# CONFIG_IDE_CHIPSETS is not set
7314 +# CONFIG_IDEDMA_AUTO is not set
7315 +# CONFIG_DMA_NONPCI is not set
7316 +# CONFIG_BLK_DEV_ATARAID is not set
7317 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
7318 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
7319 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
7320 +# CONFIG_BLK_DEV_ATARAID_SII is not set
7321 +
7322 +#
7323 +# SCSI support
7324 +#
7325 +CONFIG_SCSI=y
7326 +
7327 +#
7328 +# SCSI support type (disk, tape, CD-ROM)
7329 +#
7330 +CONFIG_BLK_DEV_SD=y
7331 +CONFIG_SD_EXTRA_DEVS=40
7332 +CONFIG_CHR_DEV_ST=y
7333 +# CONFIG_CHR_DEV_OSST is not set
7334 +CONFIG_BLK_DEV_SR=y
7335 +# CONFIG_BLK_DEV_SR_VENDOR is not set
7336 +CONFIG_SR_EXTRA_DEVS=2
7337 +# CONFIG_CHR_DEV_SG is not set
7338 +
7339 +#
7340 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
7341 +#
7342 +# CONFIG_SCSI_DEBUG_QUEUES is not set
7343 +# CONFIG_SCSI_MULTI_LUN is not set
7344 +CONFIG_SCSI_CONSTANTS=y
7345 +# CONFIG_SCSI_LOGGING is not set
7346 +
7347 +#
7348 +# SCSI low-level drivers
7349 +#
7350 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
7351 +# CONFIG_SCSI_7000FASST is not set
7352 +# CONFIG_SCSI_ACARD is not set
7353 +# CONFIG_SCSI_AHA152X is not set
7354 +# CONFIG_SCSI_AHA1542 is not set
7355 +# CONFIG_SCSI_AHA1740 is not set
7356 +# CONFIG_SCSI_AACRAID is not set
7357 +# CONFIG_SCSI_AIC7XXX is not set
7358 +# CONFIG_SCSI_AIC79XX is not set
7359 +# CONFIG_SCSI_AIC7XXX_OLD is not set
7360 +# CONFIG_SCSI_DPT_I2O is not set
7361 +# CONFIG_SCSI_ADVANSYS is not set
7362 +# CONFIG_SCSI_IN2000 is not set
7363 +# CONFIG_SCSI_AM53C974 is not set
7364 +# CONFIG_SCSI_MEGARAID is not set
7365 +# CONFIG_SCSI_MEGARAID2 is not set
7366 +# CONFIG_SCSI_SATA is not set
7367 +# CONFIG_SCSI_SATA_AHCI is not set
7368 +# CONFIG_SCSI_SATA_SVW is not set
7369 +# CONFIG_SCSI_ATA_PIIX is not set
7370 +# CONFIG_SCSI_SATA_NV is not set
7371 +# CONFIG_SCSI_SATA_PROMISE is not set
7372 +# CONFIG_SCSI_SATA_SX4 is not set
7373 +# CONFIG_SCSI_SATA_SIL is not set
7374 +# CONFIG_SCSI_SATA_SIS is not set
7375 +# CONFIG_SCSI_SATA_ULI is not set
7376 +# CONFIG_SCSI_SATA_VIA is not set
7377 +# CONFIG_SCSI_SATA_VITESSE is not set
7378 +# CONFIG_SCSI_BUSLOGIC is not set
7379 +# CONFIG_SCSI_CPQFCTS is not set
7380 +# CONFIG_SCSI_DMX3191D is not set
7381 +# CONFIG_SCSI_DTC3280 is not set
7382 +# CONFIG_SCSI_EATA is not set
7383 +# CONFIG_SCSI_EATA_DMA is not set
7384 +# CONFIG_SCSI_EATA_PIO is not set
7385 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
7386 +# CONFIG_SCSI_GDTH is not set
7387 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
7388 +# CONFIG_SCSI_INITIO is not set
7389 +# CONFIG_SCSI_INIA100 is not set
7390 +# CONFIG_SCSI_NCR53C406A is not set
7391 +# CONFIG_SCSI_NCR53C7xx is not set
7392 +# CONFIG_SCSI_SYM53C8XX_2 is not set
7393 +# CONFIG_SCSI_NCR53C8XX is not set
7394 +# CONFIG_SCSI_SYM53C8XX is not set
7395 +# CONFIG_SCSI_PAS16 is not set
7396 +# CONFIG_SCSI_PCI2000 is not set
7397 +# CONFIG_SCSI_PCI2220I is not set
7398 +# CONFIG_SCSI_PSI240I is not set
7399 +# CONFIG_SCSI_QLOGIC_FAS is not set
7400 +# CONFIG_SCSI_QLOGIC_ISP is not set
7401 +# CONFIG_SCSI_QLOGIC_FC is not set
7402 +# CONFIG_SCSI_QLOGIC_1280 is not set
7403 +# CONFIG_SCSI_SIM710 is not set
7404 +# CONFIG_SCSI_SYM53C416 is not set
7405 +# CONFIG_SCSI_DC390T is not set
7406 +# CONFIG_SCSI_T128 is not set
7407 +# CONFIG_SCSI_U14_34F is not set
7408 +# CONFIG_SCSI_NSP32 is not set
7409 +# CONFIG_SCSI_DEBUG is not set
7410 +
7411 +#
7412 +# PCMCIA SCSI adapter support
7413 +#
7414 +# CONFIG_SCSI_PCMCIA is not set
7415 +
7416 +#
7417 +# Fusion MPT device support
7418 +#
7419 +# CONFIG_FUSION is not set
7420 +# CONFIG_FUSION_BOOT is not set
7421 +# CONFIG_FUSION_ISENSE is not set
7422 +# CONFIG_FUSION_CTL is not set
7423 +# CONFIG_FUSION_LAN is not set
7424 +
7425 +#
7426 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
7427 +#
7428 +# CONFIG_IEEE1394 is not set
7429 +
7430 +#
7431 +# I2O device support
7432 +#
7433 +# CONFIG_I2O is not set
7434 +# CONFIG_I2O_PCI is not set
7435 +# CONFIG_I2O_BLOCK is not set
7436 +# CONFIG_I2O_LAN is not set
7437 +# CONFIG_I2O_SCSI is not set
7438 +# CONFIG_I2O_PROC is not set
7439 +
7440 +#
7441 +# Network device support
7442 +#
7443 +CONFIG_NETDEVICES=y
7444 +
7445 +#
7446 +# ARCnet devices
7447 +#
7448 +# CONFIG_ARCNET is not set
7449 +# CONFIG_DUMMY is not set
7450 +# CONFIG_BONDING is not set
7451 +# CONFIG_EQUALIZER is not set
7452 +# CONFIG_TUN is not set
7453 +# CONFIG_ETHERTAP is not set
7454 +
7455 +#
7456 +# Ethernet (10 or 100Mbit)
7457 +#
7458 +CONFIG_NET_ETHERNET=y
7459 +# CONFIG_MIPS_AU1X00_ENET is not set
7460 +# CONFIG_SUNLANCE is not set
7461 +# CONFIG_HAPPYMEAL is not set
7462 +# CONFIG_SUNBMAC is not set
7463 +# CONFIG_SUNQE is not set
7464 +# CONFIG_SUNGEM is not set
7465 +# CONFIG_NET_VENDOR_3COM is not set
7466 +# CONFIG_LANCE is not set
7467 +# CONFIG_NET_VENDOR_SMC is not set
7468 +# CONFIG_NET_VENDOR_RACAL is not set
7469 +# CONFIG_HP100 is not set
7470 +# CONFIG_NET_ISA is not set
7471 +# CONFIG_NET_PCI is not set
7472 +# CONFIG_NET_POCKET is not set
7473 +
7474 +#
7475 +# Ethernet (1000 Mbit)
7476 +#
7477 +# CONFIG_ACENIC is not set
7478 +# CONFIG_DL2K is not set
7479 +# CONFIG_E1000 is not set
7480 +# CONFIG_MYRI_SBUS is not set
7481 +# CONFIG_NS83820 is not set
7482 +# CONFIG_HAMACHI is not set
7483 +# CONFIG_YELLOWFIN is not set
7484 +# CONFIG_R8169 is not set
7485 +# CONFIG_SK98LIN is not set
7486 +# CONFIG_TIGON3 is not set
7487 +# CONFIG_FDDI is not set
7488 +# CONFIG_HIPPI is not set
7489 +# CONFIG_PLIP is not set
7490 +CONFIG_PPP=m
7491 +CONFIG_PPP_MULTILINK=y
7492 +# CONFIG_PPP_FILTER is not set
7493 +CONFIG_PPP_ASYNC=m
7494 +# CONFIG_PPP_SYNC_TTY is not set
7495 +CONFIG_PPP_DEFLATE=m
7496 +# CONFIG_PPP_BSDCOMP is not set
7497 +CONFIG_PPPOE=m
7498 +# CONFIG_SLIP is not set
7499 +
7500 +#
7501 +# Wireless LAN (non-hamradio)
7502 +#
7503 +# CONFIG_NET_RADIO is not set
7504 +
7505 +#
7506 +# Token Ring devices
7507 +#
7508 +# CONFIG_TR is not set
7509 +# CONFIG_NET_FC is not set
7510 +# CONFIG_RCPCI is not set
7511 +# CONFIG_SHAPER is not set
7512 +
7513 +#
7514 +# Wan interfaces
7515 +#
7516 +# CONFIG_WAN is not set
7517 +
7518 +#
7519 +# PCMCIA network device support
7520 +#
7521 +# CONFIG_NET_PCMCIA is not set
7522 +
7523 +#
7524 +# Amateur Radio support
7525 +#
7526 +# CONFIG_HAMRADIO is not set
7527 +
7528 +#
7529 +# IrDA (infrared) support
7530 +#
7531 +# CONFIG_IRDA is not set
7532 +
7533 +#
7534 +# ISDN subsystem
7535 +#
7536 +# CONFIG_ISDN is not set
7537 +
7538 +#
7539 +# Input core support
7540 +#
7541 +CONFIG_INPUT=y
7542 +CONFIG_INPUT_KEYBDEV=y
7543 +CONFIG_INPUT_MOUSEDEV=y
7544 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
7545 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
7546 +# CONFIG_INPUT_JOYDEV is not set
7547 +CONFIG_INPUT_EVDEV=y
7548 +# CONFIG_INPUT_UINPUT is not set
7549 +
7550 +#
7551 +# Character devices
7552 +#
7553 +CONFIG_VT=y
7554 +# CONFIG_VT_CONSOLE is not set
7555 +# CONFIG_SERIAL is not set
7556 +# CONFIG_SERIAL_EXTENDED is not set
7557 +CONFIG_SERIAL_NONSTANDARD=y
7558 +# CONFIG_COMPUTONE is not set
7559 +# CONFIG_ROCKETPORT is not set
7560 +# CONFIG_CYCLADES is not set
7561 +# CONFIG_DIGIEPCA is not set
7562 +# CONFIG_DIGI is not set
7563 +# CONFIG_ESPSERIAL is not set
7564 +# CONFIG_MOXA_INTELLIO is not set
7565 +# CONFIG_MOXA_SMARTIO is not set
7566 +# CONFIG_ISI is not set
7567 +# CONFIG_SYNCLINK is not set
7568 +# CONFIG_SYNCLINKMP is not set
7569 +# CONFIG_N_HDLC is not set
7570 +# CONFIG_RISCOM8 is not set
7571 +# CONFIG_SPECIALIX is not set
7572 +# CONFIG_SX is not set
7573 +# CONFIG_RIO is not set
7574 +# CONFIG_STALDRV is not set
7575 +# CONFIG_SERIAL_TX3912 is not set
7576 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
7577 +# CONFIG_SERIAL_TXX9 is not set
7578 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
7579 +CONFIG_AU1X00_UART=y
7580 +CONFIG_AU1X00_SERIAL_CONSOLE=y
7581 +# CONFIG_AU1X00_USB_TTY is not set
7582 +# CONFIG_AU1X00_USB_RAW is not set
7583 +# CONFIG_TXX927_SERIAL is not set
7584 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7585 +CONFIG_UNIX98_PTYS=y
7586 +CONFIG_UNIX98_PTY_COUNT=256
7587 +
7588 +#
7589 +# I2C support
7590 +#
7591 +CONFIG_I2C=y
7592 +# CONFIG_I2C_ALGOBIT is not set
7593 +# CONFIG_SCx200_ACB is not set
7594 +# CONFIG_I2C_ALGOPCF is not set
7595 +# CONFIG_I2C_CHARDEV is not set
7596 +CONFIG_I2C_PROC=y
7597 +
7598 +#
7599 +# Mice
7600 +#
7601 +# CONFIG_BUSMOUSE is not set
7602 +# CONFIG_MOUSE is not set
7603 +
7604 +#
7605 +# Joysticks
7606 +#
7607 +# CONFIG_INPUT_GAMEPORT is not set
7608 +# CONFIG_INPUT_NS558 is not set
7609 +# CONFIG_INPUT_LIGHTNING is not set
7610 +# CONFIG_INPUT_PCIGAME is not set
7611 +# CONFIG_INPUT_CS461X is not set
7612 +# CONFIG_INPUT_EMU10K1 is not set
7613 +# CONFIG_INPUT_SERIO is not set
7614 +# CONFIG_INPUT_SERPORT is not set
7615 +
7616 +#
7617 +# Joysticks
7618 +#
7619 +# CONFIG_INPUT_ANALOG is not set
7620 +# CONFIG_INPUT_A3D is not set
7621 +# CONFIG_INPUT_ADI is not set
7622 +# CONFIG_INPUT_COBRA is not set
7623 +# CONFIG_INPUT_GF2K is not set
7624 +# CONFIG_INPUT_GRIP is not set
7625 +# CONFIG_INPUT_INTERACT is not set
7626 +# CONFIG_INPUT_TMDC is not set
7627 +# CONFIG_INPUT_SIDEWINDER is not set
7628 +# CONFIG_INPUT_IFORCE_USB is not set
7629 +# CONFIG_INPUT_IFORCE_232 is not set
7630 +# CONFIG_INPUT_WARRIOR is not set
7631 +# CONFIG_INPUT_MAGELLAN is not set
7632 +# CONFIG_INPUT_SPACEORB is not set
7633 +# CONFIG_INPUT_SPACEBALL is not set
7634 +# CONFIG_INPUT_STINGER is not set
7635 +# CONFIG_INPUT_DB9 is not set
7636 +# CONFIG_INPUT_GAMECON is not set
7637 +# CONFIG_INPUT_TURBOGRAFX is not set
7638 +# CONFIG_QIC02_TAPE is not set
7639 +# CONFIG_IPMI_HANDLER is not set
7640 +# CONFIG_IPMI_PANIC_EVENT is not set
7641 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
7642 +# CONFIG_IPMI_KCS is not set
7643 +# CONFIG_IPMI_WATCHDOG is not set
7644 +
7645 +#
7646 +# Watchdog Cards
7647 +#
7648 +# CONFIG_WATCHDOG is not set
7649 +# CONFIG_SCx200 is not set
7650 +# CONFIG_SCx200_GPIO is not set
7651 +# CONFIG_AMD_PM768 is not set
7652 +# CONFIG_NVRAM is not set
7653 +# CONFIG_RTC is not set
7654 +# CONFIG_DTLK is not set
7655 +# CONFIG_R3964 is not set
7656 +# CONFIG_APPLICOM is not set
7657 +
7658 +#
7659 +# Ftape, the floppy tape device driver
7660 +#
7661 +# CONFIG_FTAPE is not set
7662 +# CONFIG_AGP is not set
7663 +
7664 +#
7665 +# Direct Rendering Manager (XFree86 DRI support)
7666 +#
7667 +# CONFIG_DRM is not set
7668 +
7669 +#
7670 +# PCMCIA character devices
7671 +#
7672 +# CONFIG_PCMCIA_SERIAL_CS is not set
7673 +# CONFIG_SYNCLINK_CS is not set
7674 +# CONFIG_AU1X00_GPIO is not set
7675 +# CONFIG_TS_AU1X00_ADS7846 is not set
7676 +
7677 +#
7678 +# File systems
7679 +#
7680 +# CONFIG_QUOTA is not set
7681 +# CONFIG_QFMT_V2 is not set
7682 +CONFIG_AUTOFS_FS=y
7683 +# CONFIG_AUTOFS4_FS is not set
7684 +# CONFIG_REISERFS_FS is not set
7685 +# CONFIG_REISERFS_CHECK is not set
7686 +# CONFIG_REISERFS_PROC_INFO is not set
7687 +# CONFIG_ADFS_FS is not set
7688 +# CONFIG_ADFS_FS_RW is not set
7689 +# CONFIG_AFFS_FS is not set
7690 +# CONFIG_HFS_FS is not set
7691 +# CONFIG_HFSPLUS_FS is not set
7692 +# CONFIG_BEFS_FS is not set
7693 +# CONFIG_BEFS_DEBUG is not set
7694 +# CONFIG_BFS_FS is not set
7695 +CONFIG_EXT3_FS=y
7696 +CONFIG_JBD=y
7697 +# CONFIG_JBD_DEBUG is not set
7698 +CONFIG_FAT_FS=y
7699 +CONFIG_MSDOS_FS=y
7700 +# CONFIG_UMSDOS_FS is not set
7701 +CONFIG_VFAT_FS=y
7702 +# CONFIG_EFS_FS is not set
7703 +# CONFIG_JFFS_FS is not set
7704 +# CONFIG_JFFS2_FS is not set
7705 +# CONFIG_CRAMFS is not set
7706 +CONFIG_TMPFS=y
7707 +CONFIG_RAMFS=y
7708 +# CONFIG_ISO9660_FS is not set
7709 +# CONFIG_JOLIET is not set
7710 +# CONFIG_ZISOFS is not set
7711 +# CONFIG_JFS_FS is not set
7712 +# CONFIG_JFS_DEBUG is not set
7713 +# CONFIG_JFS_STATISTICS is not set
7714 +# CONFIG_MINIX_FS is not set
7715 +# CONFIG_VXFS_FS is not set
7716 +# CONFIG_NTFS_FS is not set
7717 +# CONFIG_NTFS_RW is not set
7718 +# CONFIG_HPFS_FS is not set
7719 +CONFIG_PROC_FS=y
7720 +# CONFIG_DEVFS_FS is not set
7721 +# CONFIG_DEVFS_MOUNT is not set
7722 +# CONFIG_DEVFS_DEBUG is not set
7723 +CONFIG_DEVPTS_FS=y
7724 +# CONFIG_QNX4FS_FS is not set
7725 +# CONFIG_QNX4FS_RW is not set
7726 +# CONFIG_ROMFS_FS is not set
7727 +CONFIG_EXT2_FS=y
7728 +# CONFIG_SYSV_FS is not set
7729 +# CONFIG_UDF_FS is not set
7730 +# CONFIG_UDF_RW is not set
7731 +# CONFIG_UFS_FS is not set
7732 +# CONFIG_UFS_FS_WRITE is not set
7733 +# CONFIG_XFS_FS is not set
7734 +# CONFIG_XFS_QUOTA is not set
7735 +# CONFIG_XFS_RT is not set
7736 +# CONFIG_XFS_TRACE is not set
7737 +# CONFIG_XFS_DEBUG is not set
7738 +
7739 +#
7740 +# Network File Systems
7741 +#
7742 +# CONFIG_CODA_FS is not set
7743 +# CONFIG_INTERMEZZO_FS is not set
7744 +CONFIG_NFS_FS=y
7745 +CONFIG_NFS_V3=y
7746 +# CONFIG_NFS_DIRECTIO is not set
7747 +CONFIG_ROOT_NFS=y
7748 +# CONFIG_NFSD is not set
7749 +# CONFIG_NFSD_V3 is not set
7750 +# CONFIG_NFSD_TCP is not set
7751 +CONFIG_SUNRPC=y
7752 +CONFIG_LOCKD=y
7753 +CONFIG_LOCKD_V4=y
7754 +# CONFIG_SMB_FS is not set
7755 +# CONFIG_NCP_FS is not set
7756 +# CONFIG_NCPFS_PACKET_SIGNING is not set
7757 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
7758 +# CONFIG_NCPFS_STRONG is not set
7759 +# CONFIG_NCPFS_NFS_NS is not set
7760 +# CONFIG_NCPFS_OS2_NS is not set
7761 +# CONFIG_NCPFS_SMALLDOS is not set
7762 +# CONFIG_NCPFS_NLS is not set
7763 +# CONFIG_NCPFS_EXTRAS is not set
7764 +# CONFIG_ZISOFS_FS is not set
7765 +
7766 +#
7767 +# Partition Types
7768 +#
7769 +# CONFIG_PARTITION_ADVANCED is not set
7770 +CONFIG_MSDOS_PARTITION=y
7771 +# CONFIG_SMB_NLS is not set
7772 +CONFIG_NLS=y
7773 +
7774 +#
7775 +# Native Language Support
7776 +#
7777 +CONFIG_NLS_DEFAULT="iso8859-1"
7778 +# CONFIG_NLS_CODEPAGE_437 is not set
7779 +# CONFIG_NLS_CODEPAGE_737 is not set
7780 +# CONFIG_NLS_CODEPAGE_775 is not set
7781 +# CONFIG_NLS_CODEPAGE_850 is not set
7782 +# CONFIG_NLS_CODEPAGE_852 is not set
7783 +# CONFIG_NLS_CODEPAGE_855 is not set
7784 +# CONFIG_NLS_CODEPAGE_857 is not set
7785 +# CONFIG_NLS_CODEPAGE_860 is not set
7786 +# CONFIG_NLS_CODEPAGE_861 is not set
7787 +# CONFIG_NLS_CODEPAGE_862 is not set
7788 +# CONFIG_NLS_CODEPAGE_863 is not set
7789 +# CONFIG_NLS_CODEPAGE_864 is not set
7790 +# CONFIG_NLS_CODEPAGE_865 is not set
7791 +# CONFIG_NLS_CODEPAGE_866 is not set
7792 +# CONFIG_NLS_CODEPAGE_869 is not set
7793 +# CONFIG_NLS_CODEPAGE_936 is not set
7794 +# CONFIG_NLS_CODEPAGE_950 is not set
7795 +# CONFIG_NLS_CODEPAGE_932 is not set
7796 +# CONFIG_NLS_CODEPAGE_949 is not set
7797 +# CONFIG_NLS_CODEPAGE_874 is not set
7798 +# CONFIG_NLS_ISO8859_8 is not set
7799 +# CONFIG_NLS_CODEPAGE_1250 is not set
7800 +# CONFIG_NLS_CODEPAGE_1251 is not set
7801 +# CONFIG_NLS_ISO8859_1 is not set
7802 +# CONFIG_NLS_ISO8859_2 is not set
7803 +# CONFIG_NLS_ISO8859_3 is not set
7804 +# CONFIG_NLS_ISO8859_4 is not set
7805 +# CONFIG_NLS_ISO8859_5 is not set
7806 +# CONFIG_NLS_ISO8859_6 is not set
7807 +# CONFIG_NLS_ISO8859_7 is not set
7808 +# CONFIG_NLS_ISO8859_9 is not set
7809 +# CONFIG_NLS_ISO8859_13 is not set
7810 +# CONFIG_NLS_ISO8859_14 is not set
7811 +# CONFIG_NLS_ISO8859_15 is not set
7812 +# CONFIG_NLS_KOI8_R is not set
7813 +# CONFIG_NLS_KOI8_U is not set
7814 +# CONFIG_NLS_UTF8 is not set
7815 +
7816 +#
7817 +# Multimedia devices
7818 +#
7819 +# CONFIG_VIDEO_DEV is not set
7820 +
7821 +#
7822 +# Console drivers
7823 +#
7824 +# CONFIG_VGA_CONSOLE is not set
7825 +# CONFIG_MDA_CONSOLE is not set
7826 +
7827 +#
7828 +# Frame-buffer support
7829 +#
7830 +CONFIG_FB=y
7831 +CONFIG_DUMMY_CONSOLE=y
7832 +# CONFIG_FB_RIVA is not set
7833 +# CONFIG_FB_CLGEN is not set
7834 +# CONFIG_FB_PM2 is not set
7835 +# CONFIG_FB_PM3 is not set
7836 +# CONFIG_FB_CYBER2000 is not set
7837 +# CONFIG_FB_MATROX is not set
7838 +# CONFIG_FB_ATY is not set
7839 +# CONFIG_FB_RADEON is not set
7840 +# CONFIG_FB_ATY128 is not set
7841 +# CONFIG_FB_INTEL is not set
7842 +# CONFIG_FB_SIS is not set
7843 +# CONFIG_FB_NEOMAGIC is not set
7844 +# CONFIG_FB_3DFX is not set
7845 +# CONFIG_FB_VOODOO1 is not set
7846 +# CONFIG_FB_TRIDENT is not set
7847 +# CONFIG_FB_E1356 is not set
7848 +# CONFIG_FB_IT8181 is not set
7849 +# CONFIG_FB_VIRTUAL is not set
7850 +CONFIG_FBCON_ADVANCED=y
7851 +# CONFIG_FBCON_MFB is not set
7852 +# CONFIG_FBCON_CFB2 is not set
7853 +# CONFIG_FBCON_CFB4 is not set
7854 +# CONFIG_FBCON_CFB8 is not set
7855 +CONFIG_FBCON_CFB16=y
7856 +# CONFIG_FBCON_CFB24 is not set
7857 +CONFIG_FBCON_CFB32=y
7858 +# CONFIG_FBCON_AFB is not set
7859 +# CONFIG_FBCON_ILBM is not set
7860 +# CONFIG_FBCON_IPLAN2P2 is not set
7861 +# CONFIG_FBCON_IPLAN2P4 is not set
7862 +# CONFIG_FBCON_IPLAN2P8 is not set
7863 +# CONFIG_FBCON_MAC is not set
7864 +# CONFIG_FBCON_VGA_PLANES is not set
7865 +# CONFIG_FBCON_VGA is not set
7866 +# CONFIG_FBCON_HGA is not set
7867 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
7868 +CONFIG_FBCON_FONTS=y
7869 +CONFIG_FONT_8x8=y
7870 +CONFIG_FONT_8x16=y
7871 +# CONFIG_FONT_SUN8x16 is not set
7872 +# CONFIG_FONT_SUN12x22 is not set
7873 +# CONFIG_FONT_6x11 is not set
7874 +# CONFIG_FONT_PEARL_8x8 is not set
7875 +# CONFIG_FONT_ACORN_8x8 is not set
7876 +
7877 +#
7878 +# Sound
7879 +#
7880 +CONFIG_SOUND=y
7881 +# CONFIG_SOUND_ALI5455 is not set
7882 +# CONFIG_SOUND_BT878 is not set
7883 +# CONFIG_SOUND_CMPCI is not set
7884 +# CONFIG_SOUND_EMU10K1 is not set
7885 +# CONFIG_MIDI_EMU10K1 is not set
7886 +# CONFIG_SOUND_FUSION is not set
7887 +# CONFIG_SOUND_CS4281 is not set
7888 +# CONFIG_SOUND_ES1370 is not set
7889 +# CONFIG_SOUND_ES1371 is not set
7890 +# CONFIG_SOUND_ESSSOLO1 is not set
7891 +# CONFIG_SOUND_MAESTRO is not set
7892 +# CONFIG_SOUND_MAESTRO3 is not set
7893 +# CONFIG_SOUND_FORTE is not set
7894 +# CONFIG_SOUND_ICH is not set
7895 +# CONFIG_SOUND_RME96XX is not set
7896 +# CONFIG_SOUND_SONICVIBES is not set
7897 +# CONFIG_SOUND_AU1X00 is not set
7898 +CONFIG_SOUND_AU1550_PSC=y
7899 +# CONFIG_SOUND_AU1550_I2S is not set
7900 +# CONFIG_SOUND_TRIDENT is not set
7901 +# CONFIG_SOUND_MSNDCLAS is not set
7902 +# CONFIG_SOUND_MSNDPIN is not set
7903 +# CONFIG_SOUND_VIA82CXXX is not set
7904 +# CONFIG_MIDI_VIA82CXXX is not set
7905 +# CONFIG_SOUND_OSS is not set
7906 +# CONFIG_SOUND_TVMIXER is not set
7907 +# CONFIG_SOUND_AD1980 is not set
7908 +# CONFIG_SOUND_WM97XX is not set
7909 +
7910 +#
7911 +# USB support
7912 +#
7913 +CONFIG_USB=y
7914 +# CONFIG_USB_DEBUG is not set
7915 +
7916 +#
7917 +# Miscellaneous USB options
7918 +#
7919 +CONFIG_USB_DEVICEFS=y
7920 +# CONFIG_USB_BANDWIDTH is not set
7921 +
7922 +#
7923 +# USB Host Controller Drivers
7924 +#
7925 +# CONFIG_USB_EHCI_HCD is not set
7926 +# CONFIG_USB_UHCI is not set
7927 +# CONFIG_USB_UHCI_ALT is not set
7928 +CONFIG_USB_OHCI=y
7929 +
7930 +#
7931 +# USB Device Class drivers
7932 +#
7933 +# CONFIG_USB_AUDIO is not set
7934 +# CONFIG_USB_EMI26 is not set
7935 +# CONFIG_USB_BLUETOOTH is not set
7936 +# CONFIG_USB_MIDI is not set
7937 +CONFIG_USB_STORAGE=y
7938 +# CONFIG_USB_STORAGE_DEBUG is not set
7939 +# CONFIG_USB_STORAGE_DATAFAB is not set
7940 +# CONFIG_USB_STORAGE_FREECOM is not set
7941 +# CONFIG_USB_STORAGE_ISD200 is not set
7942 +# CONFIG_USB_STORAGE_DPCM is not set
7943 +# CONFIG_USB_STORAGE_HP8200e is not set
7944 +# CONFIG_USB_STORAGE_SDDR09 is not set
7945 +# CONFIG_USB_STORAGE_SDDR55 is not set
7946 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
7947 +# CONFIG_USB_ACM is not set
7948 +# CONFIG_USB_PRINTER is not set
7949 +
7950 +#
7951 +# USB Human Interface Devices (HID)
7952 +#
7953 +CONFIG_USB_HID=y
7954 +CONFIG_USB_HIDINPUT=y
7955 +CONFIG_USB_HIDDEV=y
7956 +# CONFIG_USB_AIPTEK is not set
7957 +# CONFIG_USB_WACOM is not set
7958 +# CONFIG_USB_KBTAB is not set
7959 +# CONFIG_USB_POWERMATE is not set
7960 +
7961 +#
7962 +# USB Imaging devices
7963 +#
7964 +# CONFIG_USB_DC2XX is not set
7965 +# CONFIG_USB_MDC800 is not set
7966 +# CONFIG_USB_SCANNER is not set
7967 +# CONFIG_USB_MICROTEK is not set
7968 +# CONFIG_USB_HPUSBSCSI is not set
7969 +
7970 +#
7971 +# USB Multimedia devices
7972 +#
7973 +
7974 +#
7975 +# Video4Linux support is needed for USB Multimedia device support
7976 +#
7977 +
7978 +#
7979 +# USB Network adaptors
7980 +#
7981 +# CONFIG_USB_PEGASUS is not set
7982 +# CONFIG_USB_RTL8150 is not set
7983 +# CONFIG_USB_KAWETH is not set
7984 +# CONFIG_USB_CATC is not set
7985 +# CONFIG_USB_CDCETHER is not set
7986 +# CONFIG_USB_USBNET is not set
7987 +
7988 +#
7989 +# USB port drivers
7990 +#
7991 +# CONFIG_USB_USS720 is not set
7992 +
7993 +#
7994 +# USB Serial Converter support
7995 +#
7996 +# CONFIG_USB_SERIAL is not set
7997 +
7998 +#
7999 +# USB Miscellaneous drivers
8000 +#
8001 +# CONFIG_USB_RIO500 is not set
8002 +# CONFIG_USB_AUERSWALD is not set
8003 +# CONFIG_USB_TIGL is not set
8004 +# CONFIG_USB_BRLVGER is not set
8005 +# CONFIG_USB_LCD is not set
8006 +
8007 +#
8008 +# Support for USB gadgets
8009 +#
8010 +# CONFIG_USB_GADGET is not set
8011 +
8012 +#
8013 +# Bluetooth support
8014 +#
8015 +# CONFIG_BLUEZ is not set
8016 +
8017 +#
8018 +# Kernel hacking
8019 +#
8020 +CONFIG_CROSSCOMPILE=y
8021 +# CONFIG_RUNTIME_DEBUG is not set
8022 +# CONFIG_KGDB is not set
8023 +# CONFIG_GDB_CONSOLE is not set
8024 +# CONFIG_DEBUG_INFO is not set
8025 +# CONFIG_MAGIC_SYSRQ is not set
8026 +# CONFIG_MIPS_UNCACHED is not set
8027 +CONFIG_LOG_BUF_SHIFT=0
8028 +
8029 +#
8030 +# Cryptographic options
8031 +#
8032 +# CONFIG_CRYPTO is not set
8033 +
8034 +#
8035 +# Library routines
8036 +#
8037 +# CONFIG_CRC32 is not set
8038 +CONFIG_ZLIB_INFLATE=m
8039 +CONFIG_ZLIB_DEFLATE=m
8040 +# CONFIG_FW_LOADER is not set
8041 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1500 linux-mips/arch/mips/defconfig-pb1500
8042 --- linux-2.4.29/arch/mips/defconfig-pb1500 2005-01-19 15:09:28.000000000 +0100
8043 +++ linux-mips/arch/mips/defconfig-pb1500 2005-02-03 07:35:29.000000000 +0100
8044 @@ -22,16 +22,19 @@
8045 #
8046 # CONFIG_ACER_PICA_61 is not set
8047 # CONFIG_MIPS_BOSPORUS is not set
8048 +# CONFIG_MIPS_FICMMP is not set
8049 # CONFIG_MIPS_MIRAGE is not set
8050 # CONFIG_MIPS_DB1000 is not set
8051 # CONFIG_MIPS_DB1100 is not set
8052 # CONFIG_MIPS_DB1500 is not set
8053 # CONFIG_MIPS_DB1550 is not set
8054 +# CONFIG_MIPS_DB1200 is not set
8055 # CONFIG_MIPS_PB1000 is not set
8056 # CONFIG_MIPS_PB1100 is not set
8057 CONFIG_MIPS_PB1500=y
8058 -# CONFIG_MIPS_HYDROGEN3 is not set
8059 # CONFIG_MIPS_PB1550 is not set
8060 +# CONFIG_MIPS_PB1200 is not set
8061 +# CONFIG_MIPS_HYDROGEN3 is not set
8062 # CONFIG_MIPS_XXS1500 is not set
8063 # CONFIG_MIPS_MTX1 is not set
8064 # CONFIG_COGENT_CSB250 is not set
8065 @@ -341,11 +344,6 @@
8066 #
8067 # CONFIG_IPX is not set
8068 # CONFIG_ATALK is not set
8069 -
8070 -#
8071 -# Appletalk devices
8072 -#
8073 -# CONFIG_DEV_APPLETALK is not set
8074 # CONFIG_DECNET is not set
8075 # CONFIG_BRIDGE is not set
8076 # CONFIG_X25 is not set
8077 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1550 linux-mips/arch/mips/defconfig-pb1550
8078 --- linux-2.4.29/arch/mips/defconfig-pb1550 2005-01-19 15:09:29.000000000 +0100
8079 +++ linux-mips/arch/mips/defconfig-pb1550 2005-02-03 07:35:29.000000000 +0100
8080 @@ -22,16 +22,19 @@
8081 #
8082 # CONFIG_ACER_PICA_61 is not set
8083 # CONFIG_MIPS_BOSPORUS is not set
8084 +# CONFIG_MIPS_FICMMP is not set
8085 # CONFIG_MIPS_MIRAGE is not set
8086 # CONFIG_MIPS_DB1000 is not set
8087 # CONFIG_MIPS_DB1100 is not set
8088 # CONFIG_MIPS_DB1500 is not set
8089 # CONFIG_MIPS_DB1550 is not set
8090 +# CONFIG_MIPS_DB1200 is not set
8091 # CONFIG_MIPS_PB1000 is not set
8092 # CONFIG_MIPS_PB1100 is not set
8093 # CONFIG_MIPS_PB1500 is not set
8094 -# CONFIG_MIPS_HYDROGEN3 is not set
8095 CONFIG_MIPS_PB1550=y
8096 +# CONFIG_MIPS_PB1200 is not set
8097 +# CONFIG_MIPS_HYDROGEN3 is not set
8098 # CONFIG_MIPS_XXS1500 is not set
8099 # CONFIG_MIPS_MTX1 is not set
8100 # CONFIG_COGENT_CSB250 is not set
8101 @@ -343,11 +346,6 @@
8102 #
8103 # CONFIG_IPX is not set
8104 # CONFIG_ATALK is not set
8105 -
8106 -#
8107 -# Appletalk devices
8108 -#
8109 -# CONFIG_DEV_APPLETALK is not set
8110 # CONFIG_DECNET is not set
8111 # CONFIG_BRIDGE is not set
8112 # CONFIG_X25 is not set
8113 diff -Nur linux-2.4.29/arch/mips/defconfig-rbtx4927 linux-mips/arch/mips/defconfig-rbtx4927
8114 --- linux-2.4.29/arch/mips/defconfig-rbtx4927 2005-01-19 15:09:29.000000000 +0100
8115 +++ linux-mips/arch/mips/defconfig-rbtx4927 2005-01-09 20:33:59.000000000 +0100
8116 @@ -223,11 +223,6 @@
8117 #
8118 # CONFIG_IPX is not set
8119 # CONFIG_ATALK is not set
8120 -
8121 -#
8122 -# Appletalk devices
8123 -#
8124 -# CONFIG_DEV_APPLETALK is not set
8125 # CONFIG_DECNET is not set
8126 # CONFIG_BRIDGE is not set
8127 # CONFIG_X25 is not set
8128 diff -Nur linux-2.4.29/arch/mips/defconfig-rm200 linux-mips/arch/mips/defconfig-rm200
8129 --- linux-2.4.29/arch/mips/defconfig-rm200 2005-01-19 15:09:29.000000000 +0100
8130 +++ linux-mips/arch/mips/defconfig-rm200 2005-01-09 20:33:59.000000000 +0100
8131 @@ -229,11 +229,6 @@
8132 #
8133 # CONFIG_IPX is not set
8134 # CONFIG_ATALK is not set
8135 -
8136 -#
8137 -# Appletalk devices
8138 -#
8139 -# CONFIG_DEV_APPLETALK is not set
8140 # CONFIG_DECNET is not set
8141 # CONFIG_BRIDGE is not set
8142 # CONFIG_X25 is not set
8143 diff -Nur linux-2.4.29/arch/mips/defconfig-sb1250-swarm linux-mips/arch/mips/defconfig-sb1250-swarm
8144 --- linux-2.4.29/arch/mips/defconfig-sb1250-swarm 2005-01-19 15:09:29.000000000 +0100
8145 +++ linux-mips/arch/mips/defconfig-sb1250-swarm 2005-01-09 20:33:59.000000000 +0100
8146 @@ -90,6 +90,7 @@
8147 # CONFIG_SIBYTE_TBPROF is not set
8148 CONFIG_SIBYTE_GENBUS_IDE=y
8149 CONFIG_SMP_CAPABLE=y
8150 +CONFIG_MIPS_RTC=y
8151 # CONFIG_SNI_RM200_PCI is not set
8152 # CONFIG_TANBAC_TB0226 is not set
8153 # CONFIG_TANBAC_TB0229 is not set
8154 @@ -253,11 +254,6 @@
8155 #
8156 # CONFIG_IPX is not set
8157 # CONFIG_ATALK is not set
8158 -
8159 -#
8160 -# Appletalk devices
8161 -#
8162 -# CONFIG_DEV_APPLETALK is not set
8163 # CONFIG_DECNET is not set
8164 # CONFIG_BRIDGE is not set
8165 # CONFIG_X25 is not set
8166 diff -Nur linux-2.4.29/arch/mips/defconfig-stretch linux-mips/arch/mips/defconfig-stretch
8167 --- linux-2.4.29/arch/mips/defconfig-stretch 2005-01-19 15:09:29.000000000 +0100
8168 +++ linux-mips/arch/mips/defconfig-stretch 2005-01-09 20:33:59.000000000 +0100
8169 @@ -240,11 +240,6 @@
8170 #
8171 # CONFIG_IPX is not set
8172 # CONFIG_ATALK is not set
8173 -
8174 -#
8175 -# Appletalk devices
8176 -#
8177 -# CONFIG_DEV_APPLETALK is not set
8178 # CONFIG_DECNET is not set
8179 # CONFIG_BRIDGE is not set
8180 # CONFIG_X25 is not set
8181 @@ -324,6 +319,7 @@
8182 # CONFIG_SCSI_MEGARAID is not set
8183 # CONFIG_SCSI_MEGARAID2 is not set
8184 # CONFIG_SCSI_SATA is not set
8185 +# CONFIG_SCSI_SATA_AHCI is not set
8186 # CONFIG_SCSI_SATA_SVW is not set
8187 # CONFIG_SCSI_ATA_PIIX is not set
8188 # CONFIG_SCSI_SATA_NV is not set
8189 diff -Nur linux-2.4.29/arch/mips/defconfig-tb0226 linux-mips/arch/mips/defconfig-tb0226
8190 --- linux-2.4.29/arch/mips/defconfig-tb0226 2005-01-19 15:09:29.000000000 +0100
8191 +++ linux-mips/arch/mips/defconfig-tb0226 2005-01-09 20:34:00.000000000 +0100
8192 @@ -228,11 +228,6 @@
8193 #
8194 # CONFIG_IPX is not set
8195 # CONFIG_ATALK is not set
8196 -
8197 -#
8198 -# Appletalk devices
8199 -#
8200 -# CONFIG_DEV_APPLETALK is not set
8201 # CONFIG_DECNET is not set
8202 # CONFIG_BRIDGE is not set
8203 # CONFIG_X25 is not set
8204 @@ -312,6 +307,7 @@
8205 # CONFIG_SCSI_MEGARAID is not set
8206 # CONFIG_SCSI_MEGARAID2 is not set
8207 # CONFIG_SCSI_SATA is not set
8208 +# CONFIG_SCSI_SATA_AHCI is not set
8209 # CONFIG_SCSI_SATA_SVW is not set
8210 # CONFIG_SCSI_ATA_PIIX is not set
8211 # CONFIG_SCSI_SATA_NV is not set
8212 diff -Nur linux-2.4.29/arch/mips/defconfig-tb0229 linux-mips/arch/mips/defconfig-tb0229
8213 --- linux-2.4.29/arch/mips/defconfig-tb0229 2005-01-19 15:09:29.000000000 +0100
8214 +++ linux-mips/arch/mips/defconfig-tb0229 2005-01-09 20:34:00.000000000 +0100
8215 @@ -230,11 +230,6 @@
8216 #
8217 # CONFIG_IPX is not set
8218 # CONFIG_ATALK is not set
8219 -
8220 -#
8221 -# Appletalk devices
8222 -#
8223 -# CONFIG_DEV_APPLETALK is not set
8224 # CONFIG_DECNET is not set
8225 # CONFIG_BRIDGE is not set
8226 # CONFIG_X25 is not set
8227 diff -Nur linux-2.4.29/arch/mips/defconfig-ti1500 linux-mips/arch/mips/defconfig-ti1500
8228 --- linux-2.4.29/arch/mips/defconfig-ti1500 2005-01-19 15:09:29.000000000 +0100
8229 +++ linux-mips/arch/mips/defconfig-ti1500 2005-01-09 20:34:00.000000000 +0100
8230 @@ -339,11 +339,6 @@
8231 #
8232 # CONFIG_IPX is not set
8233 # CONFIG_ATALK is not set
8234 -
8235 -#
8236 -# Appletalk devices
8237 -#
8238 -# CONFIG_DEV_APPLETALK is not set
8239 # CONFIG_DECNET is not set
8240 # CONFIG_BRIDGE is not set
8241 # CONFIG_X25 is not set
8242 diff -Nur linux-2.4.29/arch/mips/defconfig-workpad linux-mips/arch/mips/defconfig-workpad
8243 --- linux-2.4.29/arch/mips/defconfig-workpad 2005-01-19 15:09:29.000000000 +0100
8244 +++ linux-mips/arch/mips/defconfig-workpad 2005-01-09 20:34:00.000000000 +0100
8245 @@ -222,11 +222,6 @@
8246 #
8247 # CONFIG_IPX is not set
8248 # CONFIG_ATALK is not set
8249 -
8250 -#
8251 -# Appletalk devices
8252 -#
8253 -# CONFIG_DEV_APPLETALK is not set
8254 # CONFIG_DECNET is not set
8255 # CONFIG_BRIDGE is not set
8256 # CONFIG_X25 is not set
8257 diff -Nur linux-2.4.29/arch/mips/defconfig-xxs1500 linux-mips/arch/mips/defconfig-xxs1500
8258 --- linux-2.4.29/arch/mips/defconfig-xxs1500 2005-01-19 15:09:29.000000000 +0100
8259 +++ linux-mips/arch/mips/defconfig-xxs1500 2005-01-09 20:34:00.000000000 +0100
8260 @@ -339,11 +339,6 @@
8261 #
8262 # CONFIG_IPX is not set
8263 # CONFIG_ATALK is not set
8264 -
8265 -#
8266 -# Appletalk devices
8267 -#
8268 -# CONFIG_DEV_APPLETALK is not set
8269 # CONFIG_DECNET is not set
8270 # CONFIG_BRIDGE is not set
8271 # CONFIG_X25 is not set
8272 diff -Nur linux-2.4.29/arch/mips/defconfig-yosemite linux-mips/arch/mips/defconfig-yosemite
8273 --- linux-2.4.29/arch/mips/defconfig-yosemite 2005-01-19 15:09:29.000000000 +0100
8274 +++ linux-mips/arch/mips/defconfig-yosemite 2005-01-09 20:34:00.000000000 +0100
8275 @@ -227,11 +227,6 @@
8276 #
8277 # CONFIG_IPX is not set
8278 # CONFIG_ATALK is not set
8279 -
8280 -#
8281 -# Appletalk devices
8282 -#
8283 -# CONFIG_DEV_APPLETALK is not set
8284 # CONFIG_DECNET is not set
8285 # CONFIG_BRIDGE is not set
8286 # CONFIG_X25 is not set
8287 @@ -310,6 +305,7 @@
8288 # CONFIG_SCSI_MEGARAID is not set
8289 # CONFIG_SCSI_MEGARAID2 is not set
8290 # CONFIG_SCSI_SATA is not set
8291 +# CONFIG_SCSI_SATA_AHCI is not set
8292 # CONFIG_SCSI_SATA_SVW is not set
8293 # CONFIG_SCSI_ATA_PIIX is not set
8294 # CONFIG_SCSI_SATA_NV is not set
8295 diff -Nur linux-2.4.29/arch/mips/kernel/cpu-probe.c linux-mips/arch/mips/kernel/cpu-probe.c
8296 --- linux-2.4.29/arch/mips/kernel/cpu-probe.c 2005-01-19 15:09:29.000000000 +0100
8297 +++ linux-mips/arch/mips/kernel/cpu-probe.c 2005-01-30 09:01:28.000000000 +0100
8298 @@ -105,6 +105,7 @@
8299 case CPU_AU1100:
8300 case CPU_AU1500:
8301 case CPU_AU1550:
8302 + case CPU_AU1200:
8303 if (au1k_wait_ptr != NULL) {
8304 cpu_wait = au1k_wait_ptr;
8305 printk(" available.\n");
8306 diff -Nur linux-2.4.29/arch/mips/kernel/head.S linux-mips/arch/mips/kernel/head.S
8307 --- linux-2.4.29/arch/mips/kernel/head.S 2005-01-19 15:09:29.000000000 +0100
8308 +++ linux-mips/arch/mips/kernel/head.S 2004-11-22 14:38:23.000000000 +0100
8309 @@ -43,9 +43,9 @@
8310
8311 /* Cache Error */
8312 LEAF(except_vec2_generic)
8313 + .set push
8314 .set noreorder
8315 .set noat
8316 - .set mips0
8317 /*
8318 * This is a very bad place to be. Our cache error
8319 * detection has triggered. If we have write-back data
8320 @@ -64,10 +64,9 @@
8321
8322 j cache_parity_error
8323 nop
8324 + .set pop
8325 END(except_vec2_generic)
8326
8327 - .set at
8328 -
8329 /*
8330 * Special interrupt vector for embedded MIPS. This is a
8331 * dedicated interrupt vector which reduces interrupt processing
8332 @@ -76,8 +75,11 @@
8333 * size!
8334 */
8335 NESTED(except_vec4, 0, sp)
8336 + .set push
8337 + .set noreorder
8338 1: j 1b /* Dummy, will be replaced */
8339 nop
8340 + .set pop
8341 END(except_vec4)
8342
8343 /*
8344 @@ -87,8 +89,11 @@
8345 * unconditional jump to this vector.
8346 */
8347 NESTED(except_vec_ejtag_debug, 0, sp)
8348 + .set push
8349 + .set noreorder
8350 j ejtag_debug_handler
8351 nop
8352 + .set pop
8353 END(except_vec_ejtag_debug)
8354
8355 __FINIT
8356 @@ -97,6 +102,7 @@
8357 * EJTAG debug exception handler.
8358 */
8359 NESTED(ejtag_debug_handler, PT_SIZE, sp)
8360 + .set push
8361 .set noat
8362 .set noreorder
8363 mtc0 k0, CP0_DESAVE
8364 @@ -120,7 +126,7 @@
8365 deret
8366 .set mips0
8367 nop
8368 - .set at
8369 + .set pop
8370 END(ejtag_debug_handler)
8371
8372 __INIT
8373 @@ -132,13 +138,17 @@
8374 * unconditional jump to this vector.
8375 */
8376 NESTED(except_vec_nmi, 0, sp)
8377 + .set push
8378 + .set noreorder
8379 j nmi_handler
8380 nop
8381 + .set pop
8382 END(except_vec_nmi)
8383
8384 __FINIT
8385
8386 NESTED(nmi_handler, PT_SIZE, sp)
8387 + .set push
8388 .set noat
8389 .set noreorder
8390 .set mips3
8391 @@ -147,8 +157,7 @@
8392 move a0, sp
8393 RESTORE_ALL
8394 eret
8395 - .set at
8396 - .set mips0
8397 + .set pop
8398 END(nmi_handler)
8399
8400 __INIT
8401 @@ -157,7 +166,20 @@
8402 * Kernel entry point
8403 */
8404 NESTED(kernel_entry, 16, sp)
8405 + .set push
8406 + /*
8407 + * For the moment disable interrupts and mark the kernel mode.
8408 + * A full initialization of the CPU's status register is done
8409 + * later in per_cpu_trap_init().
8410 + */
8411 + mfc0 t0, CP0_STATUS
8412 + or t0, ST0_CU0|0x1f
8413 + xor t0, 0x1f
8414 + mtc0 t0, CP0_STATUS
8415 +
8416 .set noreorder
8417 + sll zero,3 # ehb
8418 + .set reorder
8419
8420 /*
8421 * The firmware/bootloader passes argc/argp/envp
8422 @@ -170,8 +192,8 @@
8423 la t1, (_end - 4)
8424 1:
8425 addiu t0, 4
8426 + sw zero, (t0)
8427 bne t0, t1, 1b
8428 - sw zero, (t0)
8429
8430 /*
8431 * Stack for kernel and init, current variable
8432 @@ -182,7 +204,7 @@
8433 sw t0, kernelsp
8434
8435 jal init_arch
8436 - nop
8437 + .set pop
8438 END(kernel_entry)
8439
8440
8441 @@ -193,17 +215,26 @@
8442 * function after setting up the stack and gp registers.
8443 */
8444 LEAF(smp_bootstrap)
8445 - .set push
8446 - .set noreorder
8447 - mtc0 zero, CP0_WIRED
8448 - CLI
8449 + .set push
8450 + /*
8451 + * For the moment disable interrupts and bootstrap exception
8452 + * vectors and mark the kernel mode. A full initialization of
8453 + * the CPU's status register is done later in
8454 + * per_cpu_trap_init().
8455 + */
8456 mfc0 t0, CP0_STATUS
8457 - li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
8458 - and t0, t1
8459 - or t0, (ST0_CU0);
8460 + or t0, ST0_CU0|ST0_BEV|0x1f
8461 + xor t0, ST0_BEV|0x1f
8462 + mtc0 t0, CP0_STATUS
8463 +
8464 + .set noreorder
8465 + sll zero,3 # ehb
8466 + .set reorder
8467 +
8468 + mtc0 zero, CP0_WIRED
8469 +
8470 jal start_secondary
8471 - mtc0 t0, CP0_STATUS
8472 - .set pop
8473 + .set pop
8474 END(smp_bootstrap)
8475 #endif
8476
8477 diff -Nur linux-2.4.29/arch/mips/kernel/scall_o32.S linux-mips/arch/mips/kernel/scall_o32.S
8478 --- linux-2.4.29/arch/mips/kernel/scall_o32.S 2005-01-19 15:09:29.000000000 +0100
8479 +++ linux-mips/arch/mips/kernel/scall_o32.S 2005-02-07 22:21:53.000000000 +0100
8480 @@ -121,15 +121,14 @@
8481
8482 trace_a_syscall:
8483 SAVE_STATIC
8484 - sw t2, PT_R1(sp)
8485 + move s0, t2
8486 jal syscall_trace
8487 - lw t2, PT_R1(sp)
8488
8489 lw a0, PT_R4(sp) # Restore argument registers
8490 lw a1, PT_R5(sp)
8491 lw a2, PT_R6(sp)
8492 lw a3, PT_R7(sp)
8493 - jalr t2
8494 + jalr s0
8495
8496 li t0, -EMAXERRNO - 1 # error?
8497 sltu t0, t0, v0
8498 diff -Nur linux-2.4.29/arch/mips/kernel/setup.c linux-mips/arch/mips/kernel/setup.c
8499 --- linux-2.4.29/arch/mips/kernel/setup.c 2005-01-19 15:09:29.000000000 +0100
8500 +++ linux-mips/arch/mips/kernel/setup.c 2005-01-13 22:15:57.000000000 +0100
8501 @@ -5,7 +5,7 @@
8502 *
8503 * Copyright (C) 1995 Linus Torvalds
8504 * Copyright (C) 1995 Waldorf Electronics
8505 - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
8506 + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05 Ralf Baechle
8507 * Copyright (C) 1996 Stoned Elipot
8508 * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
8509 */
8510 @@ -71,6 +71,8 @@
8511 extern struct rtc_ops no_rtc_ops;
8512 struct rtc_ops *rtc_ops;
8513
8514 +EXPORT_SYMBOL(rtc_ops);
8515 +
8516 #ifdef CONFIG_PC_KEYB
8517 struct kbd_ops *kbd_ops;
8518 #endif
8519 @@ -132,10 +134,6 @@
8520 */
8521 load_mmu();
8522
8523 - /* Disable coprocessors and set FPU for 16/32 FPR register model */
8524 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
8525 - set_c0_status(ST0_CU0);
8526 -
8527 start_kernel();
8528 }
8529
8530 diff -Nur linux-2.4.29/arch/mips/kernel/traps.c linux-mips/arch/mips/kernel/traps.c
8531 --- linux-2.4.29/arch/mips/kernel/traps.c 2005-01-19 15:09:29.000000000 +0100
8532 +++ linux-mips/arch/mips/kernel/traps.c 2004-11-22 14:38:23.000000000 +0100
8533 @@ -887,12 +887,18 @@
8534 void __init per_cpu_trap_init(void)
8535 {
8536 unsigned int cpu = smp_processor_id();
8537 + unsigned int status_set = ST0_CU0;
8538
8539 - /* Some firmware leaves the BEV flag set, clear it. */
8540 - clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
8541 -
8542 + /*
8543 + * Disable coprocessors and 64-bit addressing and set FPU for
8544 + * the 16/32 FPR register model. Reset the BEV flag that some
8545 + * firmware may have left set and the TS bit (for IP27). Set
8546 + * XX for ISA IV code to work.
8547 + */
8548 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
8549 - set_c0_status(ST0_XX);
8550 + status_set |= ST0_XX;
8551 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
8552 + status_set);
8553
8554 /*
8555 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
8556 @@ -902,7 +908,7 @@
8557 set_c0_cause(CAUSEF_IV);
8558
8559 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
8560 - write_c0_context(cpu << 23);
8561 + TLBMISS_HANDLER_SETUP();
8562
8563 atomic_inc(&init_mm.mm_count);
8564 current->active_mm = &init_mm;
8565 @@ -918,8 +924,6 @@
8566 extern char except_vec4;
8567 unsigned long i;
8568
8569 - per_cpu_trap_init();
8570 -
8571 /* Copy the generic exception handler code to it's final destination. */
8572 memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
8573
8574 @@ -1020,10 +1024,5 @@
8575
8576 flush_icache_range(KSEG0, KSEG0 + 0x400);
8577
8578 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
8579 - current->active_mm = &init_mm;
8580 -
8581 - /* XXX Must be done for all CPUs */
8582 - current_cpu_data.asid_cache = ASID_FIRST_VERSION;
8583 - TLBMISS_HANDLER_SETUP();
8584 + per_cpu_trap_init();
8585 }
8586 diff -Nur linux-2.4.29/arch/mips/lib/rtc-no.c linux-mips/arch/mips/lib/rtc-no.c
8587 --- linux-2.4.29/arch/mips/lib/rtc-no.c 2004-02-18 14:36:30.000000000 +0100
8588 +++ linux-mips/arch/mips/lib/rtc-no.c 2005-01-13 22:15:57.000000000 +0100
8589 @@ -6,10 +6,9 @@
8590 * Stub RTC routines to keep Linux from crashing on machine which don't
8591 * have a RTC chip.
8592 *
8593 - * Copyright (C) 1998, 2001 by Ralf Baechle
8594 + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
8595 */
8596 #include <linux/kernel.h>
8597 -#include <linux/module.h>
8598 #include <linux/mc146818rtc.h>
8599
8600 static unsigned int shouldnt_happen(void)
8601 @@ -29,5 +28,3 @@
8602 .rtc_write_data = (void *) &shouldnt_happen,
8603 .rtc_bcd_mode = (void *) &shouldnt_happen
8604 };
8605 -
8606 -EXPORT_SYMBOL(rtc_ops);
8607 diff -Nur linux-2.4.29/arch/mips/lib/rtc-std.c linux-mips/arch/mips/lib/rtc-std.c
8608 --- linux-2.4.29/arch/mips/lib/rtc-std.c 2004-02-18 14:36:30.000000000 +0100
8609 +++ linux-mips/arch/mips/lib/rtc-std.c 2005-01-13 22:15:57.000000000 +0100
8610 @@ -5,9 +5,8 @@
8611 *
8612 * RTC routines for PC style attached Dallas chip.
8613 *
8614 - * Copyright (C) 1998, 2001 by Ralf Baechle
8615 + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
8616 */
8617 -#include <linux/module.h>
8618 #include <linux/mc146818rtc.h>
8619 #include <asm/io.h>
8620
8621 @@ -33,5 +32,3 @@
8622 &std_rtc_write_data,
8623 &std_rtc_bcd_mode
8624 };
8625 -
8626 -EXPORT_SYMBOL(rtc_ops);
8627 diff -Nur linux-2.4.29/arch/mips/Makefile linux-mips/arch/mips/Makefile
8628 --- linux-2.4.29/arch/mips/Makefile 2005-01-19 15:09:26.000000000 +0100
8629 +++ linux-mips/arch/mips/Makefile 2005-01-30 09:01:26.000000000 +0100
8630 @@ -211,7 +211,7 @@
8631 endif
8632
8633 #
8634 -# Au1000 (Alchemy Semi PB1000) eval board
8635 +# Au1x AMD Alchemy eval boards
8636 #
8637 ifdef CONFIG_MIPS_PB1000
8638 LIBS += arch/mips/au1000/pb1000/pb1000.o \
8639 @@ -220,9 +220,6 @@
8640 LOADADDR := 0x80100000
8641 endif
8642
8643 -#
8644 -# Au1100 (Alchemy Semi PB1100) eval board
8645 -#
8646 ifdef CONFIG_MIPS_PB1100
8647 LIBS += arch/mips/au1000/pb1100/pb1100.o \
8648 arch/mips/au1000/common/au1000.o
8649 @@ -230,9 +227,6 @@
8650 LOADADDR += 0x80100000
8651 endif
8652
8653 -#
8654 -# Au1500 (Alchemy Semi PB1500) eval board
8655 -#
8656 ifdef CONFIG_MIPS_PB1500
8657 LIBS += arch/mips/au1000/pb1500/pb1500.o \
8658 arch/mips/au1000/common/au1000.o
8659 @@ -240,9 +234,6 @@
8660 LOADADDR := 0x80100000
8661 endif
8662
8663 -#
8664 -# Au1x00 (AMD/Alchemy) eval boards
8665 -#
8666 ifdef CONFIG_MIPS_DB1000
8667 LIBS += arch/mips/au1000/db1x00/db1x00.o \
8668 arch/mips/au1000/common/au1000.o
8669 @@ -313,6 +304,27 @@
8670 LOADADDR += 0x80100000
8671 endif
8672
8673 +ifdef CONFIG_MIPS_PB1200
8674 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
8675 + arch/mips/au1000/common/au1000.o
8676 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
8677 +LOADADDR += 0x80100000
8678 +endif
8679 +
8680 +ifdef CONFIG_MIPS_DB1200
8681 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
8682 + arch/mips/au1000/common/au1000.o
8683 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
8684 +LOADADDR += 0x80100000
8685 +endif
8686 +
8687 +ifdef CONFIG_MIPS_FICMMP
8688 +LIBS += arch/mips/au1000/ficmmp/ficmmp.o \
8689 + arch/mips/au1000/common/au1000.o
8690 +SUBDIRS += arch/mips/au1000/ficmmp arch/mips/au1000/common
8691 +LOADADDR += 0x80100000
8692 +endif
8693 +
8694
8695 #
8696 # Cogent CSB250
8697 diff -Nur linux-2.4.29/arch/mips/mm/cerr-sb1.c linux-mips/arch/mips/mm/cerr-sb1.c
8698 --- linux-2.4.29/arch/mips/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
8699 +++ linux-mips/arch/mips/mm/cerr-sb1.c 2004-12-13 18:37:23.000000000 +0100
8700 @@ -252,14 +252,14 @@
8701
8702 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
8703 static const uint64_t mask_72_64[8] = {
8704 - 0x0738C808099264FFL,
8705 - 0x38C808099264FF07L,
8706 - 0xC808099264FF0738L,
8707 - 0x08099264FF0738C8L,
8708 - 0x099264FF0738C808L,
8709 - 0x9264FF0738C80809L,
8710 - 0x64FF0738C8080992L,
8711 - 0xFF0738C808099264L
8712 + 0x0738C808099264FFULL,
8713 + 0x38C808099264FF07ULL,
8714 + 0xC808099264FF0738ULL,
8715 + 0x08099264FF0738C8ULL,
8716 + 0x099264FF0738C808ULL,
8717 + 0x9264FF0738C80809ULL,
8718 + 0x64FF0738C8080992ULL,
8719 + 0xFF0738C808099264ULL
8720 };
8721
8722 /* Calculate the parity on a range of bits */
8723 @@ -331,9 +331,9 @@
8724 ((lru >> 4) & 0x3),
8725 ((lru >> 6) & 0x3));
8726 }
8727 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
8728 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
8729 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
8730 - va |= 0x3FFFF00000000000;
8731 + va |= 0x3FFFF00000000000ULL;
8732 valid = ((taghi >> 29) & 1);
8733 if (valid) {
8734 tlo_tmp = taglo & 0xfff3ff;
8735 @@ -474,7 +474,7 @@
8736 : "r" ((way << 13) | addr));
8737
8738 taglo = ((unsigned long long)taglohi << 32) | taglolo;
8739 - pa = (taglo & 0xFFFFFFE000) | addr;
8740 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
8741 if (way == 0) {
8742 lru = (taghi >> 14) & 0xff;
8743 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
8744 diff -Nur linux-2.4.29/arch/mips/mm/c-r4k.c linux-mips/arch/mips/mm/c-r4k.c
8745 --- linux-2.4.29/arch/mips/mm/c-r4k.c 2005-01-19 15:09:29.000000000 +0100
8746 +++ linux-mips/arch/mips/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
8747 @@ -867,9 +867,16 @@
8748 * normally they'd suffer from aliases but magic in the hardware deals
8749 * with that for us so we don't need to take care ourselves.
8750 */
8751 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
8752 - if (c->dcache.waysize > PAGE_SIZE)
8753 - c->dcache.flags |= MIPS_CACHE_ALIASES;
8754 + switch (c->cputype) {
8755 + case CPU_R10000:
8756 + case CPU_R12000:
8757 + break;
8758 + case CPU_24K:
8759 + if (!(read_c0_config7() & (1 << 16)))
8760 + default:
8761 + if (c->dcache.waysize > PAGE_SIZE)
8762 + c->dcache.flags |= MIPS_CACHE_ALIASES;
8763 + }
8764
8765 switch (c->cputype) {
8766 case CPU_20KC:
8767 @@ -1069,9 +1076,6 @@
8768 probe_pcache();
8769 setup_scache();
8770
8771 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
8772 - c->dcache.flags |= MIPS_CACHE_ALIASES;
8773 -
8774 r4k_blast_dcache_page_setup();
8775 r4k_blast_dcache_page_indexed_setup();
8776 r4k_blast_dcache_setup();
8777 diff -Nur linux-2.4.29/arch/mips/mm/tlbex-mips32.S linux-mips/arch/mips/mm/tlbex-mips32.S
8778 --- linux-2.4.29/arch/mips/mm/tlbex-mips32.S 2004-02-18 14:36:30.000000000 +0100
8779 +++ linux-mips/arch/mips/mm/tlbex-mips32.S 2004-11-29 00:33:15.000000000 +0100
8780 @@ -196,7 +196,7 @@
8781 .set noat; \
8782 SAVE_ALL; \
8783 mfc0 a2, CP0_BADVADDR; \
8784 - STI; \
8785 + KMODE; \
8786 .set at; \
8787 move a0, sp; \
8788 jal do_page_fault; \
8789 diff -Nur linux-2.4.29/arch/mips/mm/tlbex-r4k.S linux-mips/arch/mips/mm/tlbex-r4k.S
8790 --- linux-2.4.29/arch/mips/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
8791 +++ linux-mips/arch/mips/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
8792 @@ -184,13 +184,10 @@
8793 P_MTC0 k0, CP0_ENTRYLO0 # load it
8794 PTE_SRL k1, k1, 6 # convert to entrylo1
8795 P_MTC0 k1, CP0_ENTRYLO1 # load it
8796 - b 1f
8797 - rm9000_tlb_hazard
8798 + mtc0_tlbw_hazard
8799 tlbwr # write random tlb entry
8800 -1:
8801 - nop
8802 - rm9000_tlb_hazard
8803 - eret # return from trap
8804 + tlbw_eret_hazard
8805 + eret
8806 END(except_vec0_r4000)
8807
8808 /* TLB refill, EXL == 0, R4600 version */
8809 @@ -468,13 +465,10 @@
8810 PTE_PRESENT(k0, k1, nopage_tlbl)
8811 PTE_MAKEVALID(k0, k1)
8812 PTE_RELOAD(k1, k0)
8813 - rm9000_tlb_hazard
8814 - nop
8815 - b 1f
8816 - tlbwi
8817 -1:
8818 + mtc0_tlbw_hazard
8819 + tlbwi
8820 nop
8821 - rm9000_tlb_hazard
8822 + tlbw_eret_hazard
8823 .set mips3
8824 eret
8825 .set mips0
8826 @@ -496,13 +490,10 @@
8827 PTE_WRITABLE(k0, k1, nopage_tlbs)
8828 PTE_MAKEWRITE(k0, k1)
8829 PTE_RELOAD(k1, k0)
8830 - rm9000_tlb_hazard
8831 - nop
8832 - b 1f
8833 - tlbwi
8834 -1:
8835 + mtc0_tlbw_hazard
8836 + tlbwi
8837 nop
8838 - rm9000_tlb_hazard
8839 + tlbw_eret_hazard
8840 .set mips3
8841 eret
8842 .set mips0
8843 @@ -529,13 +520,10 @@
8844
8845 /* Now reload the entry into the tlb. */
8846 PTE_RELOAD(k1, k0)
8847 - rm9000_tlb_hazard
8848 - nop
8849 - b 1f
8850 - tlbwi
8851 -1:
8852 - rm9000_tlb_hazard
8853 + mtc0_tlbw_hazard
8854 + tlbwi
8855 nop
8856 + tlbw_eret_hazard
8857 .set mips3
8858 eret
8859 .set mips0
8860 diff -Nur linux-2.4.29/arch/mips/mm/tlb-r4k.c linux-mips/arch/mips/mm/tlb-r4k.c
8861 --- linux-2.4.29/arch/mips/mm/tlb-r4k.c 2005-01-19 15:09:29.000000000 +0100
8862 +++ linux-mips/arch/mips/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
8863 @@ -3,17 +3,12 @@
8864 * License. See the file "COPYING" in the main directory of this archive
8865 * for more details.
8866 *
8867 - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
8868 - *
8869 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
8870 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
8871 - *
8872 - * To do:
8873 - *
8874 - * - this code is a overbloated pig
8875 - * - many of the bug workarounds are not efficient at all, but at
8876 - * least they are functional ...
8877 + * Carsten Langgaard, carstenl@mips.com
8878 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
8879 */
8880 +#include <linux/config.h>
8881 #include <linux/init.h>
8882 #include <linux/sched.h>
8883 #include <linux/mm.h>
8884 @@ -25,9 +20,6 @@
8885 #include <asm/pgtable.h>
8886 #include <asm/system.h>
8887
8888 -#undef DEBUG_TLB
8889 -#undef DEBUG_TLBUPDATE
8890 -
8891 extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
8892
8893 /* CP0 hazard avoidance. */
8894 @@ -41,33 +33,23 @@
8895 unsigned long old_ctx;
8896 int entry;
8897
8898 -#ifdef DEBUG_TLB
8899 - printk("[tlball]");
8900 -#endif
8901 -
8902 local_irq_save(flags);
8903 /* Save old context and create impossible VPN2 value */
8904 old_ctx = read_c0_entryhi();
8905 write_c0_entrylo0(0);
8906 write_c0_entrylo1(0);
8907 - BARRIER;
8908
8909 entry = read_c0_wired();
8910
8911 /* Blast 'em all away. */
8912 while (entry < current_cpu_data.tlbsize) {
8913 - /*
8914 - * Make sure all entries differ. If they're not different
8915 - * MIPS32 will take revenge ...
8916 - */
8917 write_c0_entryhi(KSEG0 + entry*0x2000);
8918 write_c0_index(entry);
8919 - BARRIER;
8920 + mtc0_tlbw_hazard();
8921 tlb_write_indexed();
8922 - BARRIER;
8923 entry++;
8924 }
8925 - BARRIER;
8926 + tlbw_use_hazard();
8927 write_c0_entryhi(old_ctx);
8928 local_irq_restore(flags);
8929 }
8930 @@ -76,12 +58,8 @@
8931 {
8932 int cpu = smp_processor_id();
8933
8934 - if (cpu_context(cpu, mm) != 0) {
8935 -#ifdef DEBUG_TLB
8936 - printk("[tlbmm<%d>]", cpu_context(cpu, mm));
8937 -#endif
8938 + if (cpu_context(cpu, mm) != 0)
8939 drop_mmu_context(mm,cpu);
8940 - }
8941 }
8942
8943 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
8944 @@ -93,10 +71,6 @@
8945 unsigned long flags;
8946 int size;
8947
8948 -#ifdef DEBUG_TLB
8949 - printk("[tlbrange<%02x,%08lx,%08lx>]",
8950 - cpu_asid(cpu, mm), start, end);
8951 -#endif
8952 local_irq_save(flags);
8953 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
8954 size = (size + 1) >> 1;
8955 @@ -112,7 +86,7 @@
8956
8957 write_c0_entryhi(start | newpid);
8958 start += (PAGE_SIZE << 1);
8959 - BARRIER;
8960 + mtc0_tlbw_hazard();
8961 tlb_probe();
8962 BARRIER;
8963 idx = read_c0_index();
8964 @@ -122,10 +96,10 @@
8965 continue;
8966 /* Make sure all entries differ. */
8967 write_c0_entryhi(KSEG0 + idx*0x2000);
8968 - BARRIER;
8969 + mtc0_tlbw_hazard();
8970 tlb_write_indexed();
8971 - BARRIER;
8972 }
8973 + tlbw_use_hazard();
8974 write_c0_entryhi(oldpid);
8975 } else {
8976 drop_mmu_context(mm, cpu);
8977 @@ -138,34 +112,30 @@
8978 {
8979 int cpu = smp_processor_id();
8980
8981 - if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
8982 + if (cpu_context(cpu, vma->vm_mm) != 0) {
8983 unsigned long flags;
8984 - int oldpid, newpid, idx;
8985 + unsigned long oldpid, newpid, idx;
8986
8987 -#ifdef DEBUG_TLB
8988 - printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
8989 - page);
8990 -#endif
8991 newpid = cpu_asid(cpu, vma->vm_mm);
8992 page &= (PAGE_MASK << 1);
8993 local_irq_save(flags);
8994 oldpid = read_c0_entryhi();
8995 write_c0_entryhi(page | newpid);
8996 - BARRIER;
8997 + mtc0_tlbw_hazard();
8998 tlb_probe();
8999 BARRIER;
9000 idx = read_c0_index();
9001 write_c0_entrylo0(0);
9002 write_c0_entrylo1(0);
9003 - if(idx < 0)
9004 + if (idx < 0)
9005 goto finish;
9006 /* Make sure all entries differ. */
9007 write_c0_entryhi(KSEG0+idx*0x2000);
9008 - BARRIER;
9009 + mtc0_tlbw_hazard();
9010 tlb_write_indexed();
9011 + tlbw_use_hazard();
9012
9013 finish:
9014 - BARRIER;
9015 write_c0_entryhi(oldpid);
9016 local_irq_restore(flags);
9017 }
9018 @@ -185,7 +155,7 @@
9019
9020 local_irq_save(flags);
9021 write_c0_entryhi(page);
9022 - BARRIER;
9023 + mtc0_tlbw_hazard();
9024 tlb_probe();
9025 BARRIER;
9026 idx = read_c0_index();
9027 @@ -194,18 +164,19 @@
9028 if (idx >= 0) {
9029 /* Make sure all entries differ. */
9030 write_c0_entryhi(KSEG0+idx*0x2000);
9031 + mtc0_tlbw_hazard();
9032 tlb_write_indexed();
9033 + tlbw_use_hazard();
9034 }
9035 - BARRIER;
9036 write_c0_entryhi(oldpid);
9037 +
9038 local_irq_restore(flags);
9039 }
9040
9041 EXPORT_SYMBOL(local_flush_tlb_one);
9042
9043 -/* We will need multiple versions of update_mmu_cache(), one that just
9044 - * updates the TLB with the new pte(s), and another which also checks
9045 - * for the R4k "end of page" hardware bug and does the needy.
9046 +/*
9047 + * Updates the TLB with the new pte(s).
9048 */
9049 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
9050 {
9051 @@ -223,25 +194,16 @@
9052
9053 pid = read_c0_entryhi() & ASID_MASK;
9054
9055 -#ifdef DEBUG_TLB
9056 - if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
9057 - (cpu_context(vma->vm_mm) == 0)) {
9058 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
9059 - "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
9060 - }
9061 -#endif
9062 -
9063 local_irq_save(flags);
9064 address &= (PAGE_MASK << 1);
9065 write_c0_entryhi(address | pid);
9066 pgdp = pgd_offset(vma->vm_mm, address);
9067 - BARRIER;
9068 + mtc0_tlbw_hazard();
9069 tlb_probe();
9070 BARRIER;
9071 pmdp = pmd_offset(pgdp, address);
9072 idx = read_c0_index();
9073 ptep = pte_offset(pmdp, address);
9074 - BARRIER;
9075 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
9076 write_c0_entrylo0(ptep->pte_high);
9077 ptep++;
9078 @@ -251,15 +213,13 @@
9079 write_c0_entrylo1(pte_val(*ptep) >> 6);
9080 #endif
9081 write_c0_entryhi(address | pid);
9082 - BARRIER;
9083 - if (idx < 0) {
9084 + mtc0_tlbw_hazard();
9085 + if (idx < 0)
9086 tlb_write_random();
9087 - } else {
9088 + else
9089 tlb_write_indexed();
9090 - }
9091 - BARRIER;
9092 + tlbw_use_hazard();
9093 write_c0_entryhi(pid);
9094 - BARRIER;
9095 local_irq_restore(flags);
9096 }
9097
9098 @@ -279,24 +239,26 @@
9099 asid = read_c0_entryhi() & ASID_MASK;
9100 write_c0_entryhi(address | asid);
9101 pgdp = pgd_offset(vma->vm_mm, address);
9102 + mtc0_tlbw_hazard();
9103 tlb_probe();
9104 + BARRIER;
9105 pmdp = pmd_offset(pgdp, address);
9106 idx = read_c0_index();
9107 ptep = pte_offset(pmdp, address);
9108 write_c0_entrylo0(pte_val(*ptep++) >> 6);
9109 write_c0_entrylo1(pte_val(*ptep) >> 6);
9110 - BARRIER;
9111 + mtc0_tlbw_hazard();
9112 if (idx < 0)
9113 tlb_write_random();
9114 else
9115 tlb_write_indexed();
9116 - BARRIER;
9117 + tlbw_use_hazard();
9118 local_irq_restore(flags);
9119 }
9120 #endif
9121
9122 void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
9123 - unsigned long entryhi, unsigned long pagemask)
9124 + unsigned long entryhi, unsigned long pagemask)
9125 {
9126 unsigned long flags;
9127 unsigned long wired;
9128 @@ -315,9 +277,9 @@
9129 write_c0_entryhi(entryhi);
9130 write_c0_entrylo0(entrylo0);
9131 write_c0_entrylo1(entrylo1);
9132 - BARRIER;
9133 + mtc0_tlbw_hazard();
9134 tlb_write_indexed();
9135 - BARRIER;
9136 + tlbw_use_hazard();
9137
9138 write_c0_entryhi(old_ctx);
9139 BARRIER;
9140 @@ -355,17 +317,15 @@
9141 }
9142
9143 write_c0_index(temp_tlb_entry);
9144 - BARRIER;
9145 write_c0_pagemask(pagemask);
9146 write_c0_entryhi(entryhi);
9147 write_c0_entrylo0(entrylo0);
9148 write_c0_entrylo1(entrylo1);
9149 - BARRIER;
9150 + mtc0_tlbw_hazard();
9151 tlb_write_indexed();
9152 - BARRIER;
9153 + tlbw_use_hazard();
9154
9155 write_c0_entryhi(old_ctx);
9156 - BARRIER;
9157 write_c0_pagemask(old_pagemask);
9158 out:
9159 local_irq_restore(flags);
9160 @@ -375,7 +335,7 @@
9161 static void __init probe_tlb(unsigned long config)
9162 {
9163 struct cpuinfo_mips *c = &current_cpu_data;
9164 - unsigned int reg;
9165 + unsigned int config1;
9166
9167 /*
9168 * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
9169 @@ -385,16 +345,16 @@
9170 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
9171 return;
9172
9173 - reg = read_c0_config1();
9174 + config1 = read_c0_config1();
9175 if (!((config >> 7) & 3))
9176 panic("No TLB present");
9177
9178 - c->tlbsize = ((reg >> 25) & 0x3f) + 1;
9179 + c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
9180 }
9181
9182 void __init r4k_tlb_init(void)
9183 {
9184 - u32 config = read_c0_config();
9185 + unsigned int config = read_c0_config();
9186
9187 /*
9188 * You should never change this register:
9189 diff -Nur linux-2.4.29/arch/mips64/defconfig linux-mips/arch/mips64/defconfig
9190 --- linux-2.4.29/arch/mips64/defconfig 2005-01-19 15:09:30.000000000 +0100
9191 +++ linux-mips/arch/mips64/defconfig 2005-01-20 03:19:22.000000000 +0100
9192 @@ -470,6 +470,7 @@
9193 # CONFIG_SCSI_MEGARAID is not set
9194 # CONFIG_SCSI_MEGARAID2 is not set
9195 # CONFIG_SCSI_SATA is not set
9196 +# CONFIG_SCSI_SATA_AHCI is not set
9197 # CONFIG_SCSI_SATA_SVW is not set
9198 # CONFIG_SCSI_ATA_PIIX is not set
9199 # CONFIG_SCSI_SATA_NV is not set
9200 diff -Nur linux-2.4.29/arch/mips64/defconfig-atlas linux-mips/arch/mips64/defconfig-atlas
9201 --- linux-2.4.29/arch/mips64/defconfig-atlas 2005-01-19 15:09:30.000000000 +0100
9202 +++ linux-mips/arch/mips64/defconfig-atlas 2005-01-09 20:34:01.000000000 +0100
9203 @@ -232,11 +232,6 @@
9204 #
9205 # CONFIG_IPX is not set
9206 # CONFIG_ATALK is not set
9207 -
9208 -#
9209 -# Appletalk devices
9210 -#
9211 -# CONFIG_DEV_APPLETALK is not set
9212 # CONFIG_DECNET is not set
9213 # CONFIG_BRIDGE is not set
9214 # CONFIG_X25 is not set
9215 @@ -314,6 +309,7 @@
9216 # CONFIG_SCSI_MEGARAID is not set
9217 # CONFIG_SCSI_MEGARAID2 is not set
9218 # CONFIG_SCSI_SATA is not set
9219 +# CONFIG_SCSI_SATA_AHCI is not set
9220 # CONFIG_SCSI_SATA_SVW is not set
9221 # CONFIG_SCSI_ATA_PIIX is not set
9222 # CONFIG_SCSI_SATA_NV is not set
9223 diff -Nur linux-2.4.29/arch/mips64/defconfig-decstation linux-mips/arch/mips64/defconfig-decstation
9224 --- linux-2.4.29/arch/mips64/defconfig-decstation 2005-01-19 15:09:30.000000000 +0100
9225 +++ linux-mips/arch/mips64/defconfig-decstation 2005-01-09 20:34:01.000000000 +0100
9226 @@ -224,11 +224,6 @@
9227 #
9228 # CONFIG_IPX is not set
9229 # CONFIG_ATALK is not set
9230 -
9231 -#
9232 -# Appletalk devices
9233 -#
9234 -# CONFIG_DEV_APPLETALK is not set
9235 # CONFIG_DECNET is not set
9236 # CONFIG_BRIDGE is not set
9237 # CONFIG_X25 is not set
9238 @@ -307,6 +302,7 @@
9239 # CONFIG_SCSI_MEGARAID is not set
9240 # CONFIG_SCSI_MEGARAID2 is not set
9241 # CONFIG_SCSI_SATA is not set
9242 +# CONFIG_SCSI_SATA_AHCI is not set
9243 # CONFIG_SCSI_SATA_SVW is not set
9244 # CONFIG_SCSI_ATA_PIIX is not set
9245 # CONFIG_SCSI_SATA_NV is not set
9246 diff -Nur linux-2.4.29/arch/mips64/defconfig-ip22 linux-mips/arch/mips64/defconfig-ip22
9247 --- linux-2.4.29/arch/mips64/defconfig-ip22 2005-01-19 15:09:31.000000000 +0100
9248 +++ linux-mips/arch/mips64/defconfig-ip22 2005-01-09 20:34:01.000000000 +0100
9249 @@ -235,11 +235,6 @@
9250 #
9251 # CONFIG_IPX is not set
9252 # CONFIG_ATALK is not set
9253 -
9254 -#
9255 -# Appletalk devices
9256 -#
9257 -# CONFIG_DEV_APPLETALK is not set
9258 # CONFIG_DECNET is not set
9259 # CONFIG_BRIDGE is not set
9260 # CONFIG_X25 is not set
9261 @@ -319,6 +314,7 @@
9262 # CONFIG_SCSI_MEGARAID is not set
9263 # CONFIG_SCSI_MEGARAID2 is not set
9264 # CONFIG_SCSI_SATA is not set
9265 +# CONFIG_SCSI_SATA_AHCI is not set
9266 # CONFIG_SCSI_SATA_SVW is not set
9267 # CONFIG_SCSI_ATA_PIIX is not set
9268 # CONFIG_SCSI_SATA_NV is not set
9269 diff -Nur linux-2.4.29/arch/mips64/defconfig-ip27 linux-mips/arch/mips64/defconfig-ip27
9270 --- linux-2.4.29/arch/mips64/defconfig-ip27 2005-01-19 15:09:31.000000000 +0100
9271 +++ linux-mips/arch/mips64/defconfig-ip27 2005-01-20 03:19:22.000000000 +0100
9272 @@ -470,6 +470,7 @@
9273 # CONFIG_SCSI_MEGARAID is not set
9274 # CONFIG_SCSI_MEGARAID2 is not set
9275 # CONFIG_SCSI_SATA is not set
9276 +# CONFIG_SCSI_SATA_AHCI is not set
9277 # CONFIG_SCSI_SATA_SVW is not set
9278 # CONFIG_SCSI_ATA_PIIX is not set
9279 # CONFIG_SCSI_SATA_NV is not set
9280 diff -Nur linux-2.4.29/arch/mips64/defconfig-jaguar linux-mips/arch/mips64/defconfig-jaguar
9281 --- linux-2.4.29/arch/mips64/defconfig-jaguar 2005-01-19 15:09:31.000000000 +0100
9282 +++ linux-mips/arch/mips64/defconfig-jaguar 2005-01-09 20:34:01.000000000 +0100
9283 @@ -227,11 +227,6 @@
9284 #
9285 # CONFIG_IPX is not set
9286 # CONFIG_ATALK is not set
9287 -
9288 -#
9289 -# Appletalk devices
9290 -#
9291 -# CONFIG_DEV_APPLETALK is not set
9292 # CONFIG_DECNET is not set
9293 # CONFIG_BRIDGE is not set
9294 # CONFIG_X25 is not set
9295 diff -Nur linux-2.4.29/arch/mips64/defconfig-malta linux-mips/arch/mips64/defconfig-malta
9296 --- linux-2.4.29/arch/mips64/defconfig-malta 2005-01-19 15:09:31.000000000 +0100
9297 +++ linux-mips/arch/mips64/defconfig-malta 2005-01-09 20:34:01.000000000 +0100
9298 @@ -235,11 +235,6 @@
9299 #
9300 # CONFIG_IPX is not set
9301 # CONFIG_ATALK is not set
9302 -
9303 -#
9304 -# Appletalk devices
9305 -#
9306 -# CONFIG_DEV_APPLETALK is not set
9307 # CONFIG_DECNET is not set
9308 # CONFIG_BRIDGE is not set
9309 # CONFIG_X25 is not set
9310 @@ -317,6 +312,7 @@
9311 # CONFIG_SCSI_MEGARAID is not set
9312 # CONFIG_SCSI_MEGARAID2 is not set
9313 # CONFIG_SCSI_SATA is not set
9314 +# CONFIG_SCSI_SATA_AHCI is not set
9315 # CONFIG_SCSI_SATA_SVW is not set
9316 # CONFIG_SCSI_ATA_PIIX is not set
9317 # CONFIG_SCSI_SATA_NV is not set
9318 diff -Nur linux-2.4.29/arch/mips64/defconfig-ocelotc linux-mips/arch/mips64/defconfig-ocelotc
9319 --- linux-2.4.29/arch/mips64/defconfig-ocelotc 2005-01-19 15:09:31.000000000 +0100
9320 +++ linux-mips/arch/mips64/defconfig-ocelotc 2005-01-09 20:34:01.000000000 +0100
9321 @@ -231,11 +231,6 @@
9322 #
9323 # CONFIG_IPX is not set
9324 # CONFIG_ATALK is not set
9325 -
9326 -#
9327 -# Appletalk devices
9328 -#
9329 -# CONFIG_DEV_APPLETALK is not set
9330 # CONFIG_DECNET is not set
9331 # CONFIG_BRIDGE is not set
9332 # CONFIG_X25 is not set
9333 diff -Nur linux-2.4.29/arch/mips64/defconfig-sb1250-swarm linux-mips/arch/mips64/defconfig-sb1250-swarm
9334 --- linux-2.4.29/arch/mips64/defconfig-sb1250-swarm 2005-01-19 15:09:31.000000000 +0100
9335 +++ linux-mips/arch/mips64/defconfig-sb1250-swarm 2005-01-09 20:34:01.000000000 +0100
9336 @@ -90,6 +90,7 @@
9337 # CONFIG_SIBYTE_TBPROF is not set
9338 CONFIG_SIBYTE_GENBUS_IDE=y
9339 CONFIG_SMP_CAPABLE=y
9340 +CONFIG_MIPS_RTC=y
9341 # CONFIG_SNI_RM200_PCI is not set
9342 # CONFIG_TANBAC_TB0226 is not set
9343 # CONFIG_TANBAC_TB0229 is not set
9344 @@ -253,11 +254,6 @@
9345 #
9346 # CONFIG_IPX is not set
9347 # CONFIG_ATALK is not set
9348 -
9349 -#
9350 -# Appletalk devices
9351 -#
9352 -# CONFIG_DEV_APPLETALK is not set
9353 # CONFIG_DECNET is not set
9354 # CONFIG_BRIDGE is not set
9355 # CONFIG_X25 is not set
9356 diff -Nur linux-2.4.29/arch/mips64/kernel/binfmt_elfn32.c linux-mips/arch/mips64/kernel/binfmt_elfn32.c
9357 --- linux-2.4.29/arch/mips64/kernel/binfmt_elfn32.c 2003-08-25 13:44:40.000000000 +0200
9358 +++ linux-mips/arch/mips64/kernel/binfmt_elfn32.c 2005-01-26 03:40:47.000000000 +0100
9359 @@ -116,4 +116,7 @@
9360 #undef MODULE_DESCRIPTION
9361 #undef MODULE_AUTHOR
9362
9363 +#undef TASK_SIZE
9364 +#define TASK_SIZE TASK_SIZE32
9365 +
9366 #include "../../../fs/binfmt_elf.c"
9367 diff -Nur linux-2.4.29/arch/mips64/kernel/binfmt_elfo32.c linux-mips/arch/mips64/kernel/binfmt_elfo32.c
9368 --- linux-2.4.29/arch/mips64/kernel/binfmt_elfo32.c 2003-08-25 13:44:40.000000000 +0200
9369 +++ linux-mips/arch/mips64/kernel/binfmt_elfo32.c 2005-01-26 03:40:47.000000000 +0100
9370 @@ -137,4 +137,7 @@
9371 #undef MODULE_DESCRIPTION
9372 #undef MODULE_AUTHOR
9373
9374 +#undef TASK_SIZE
9375 +#define TASK_SIZE TASK_SIZE32
9376 +
9377 #include "../../../fs/binfmt_elf.c"
9378 diff -Nur linux-2.4.29/arch/mips64/kernel/head.S linux-mips/arch/mips64/kernel/head.S
9379 --- linux-2.4.29/arch/mips64/kernel/head.S 2004-02-18 14:36:30.000000000 +0100
9380 +++ linux-mips/arch/mips64/kernel/head.S 2004-11-22 14:38:26.000000000 +0100
9381 @@ -91,6 +91,21 @@
9382 __INIT
9383
9384 NESTED(kernel_entry, 16, sp) # kernel entry point
9385 + .set push
9386 + /*
9387 + * For the moment disable interrupts, mark the kernel mode and
9388 + * set ST0_KX so that the CPU does not spit fire when using
9389 + * 64-bit addresses. A full initialization of the CPU's status
9390 + * register is done later in per_cpu_trap_init().
9391 + */
9392 + mfc0 t0, CP0_STATUS
9393 + or t0, ST0_CU0|ST0_KX|0x1f
9394 + xor t0, 0x1f
9395 + mtc0 t0, CP0_STATUS
9396 +
9397 + .set noreorder
9398 + sll zero,3 # ehb
9399 + .set reorder
9400
9401 ori sp, 0xf # align stack on 16 byte.
9402 xori sp, 0xf
9403 @@ -103,8 +118,6 @@
9404
9405 ARC64_TWIDDLE_PC
9406
9407 - CLI # disable interrupts
9408 -
9409 /*
9410 * The firmware/bootloader passes argc/argp/envp
9411 * to us as arguments. But clear bss first because
9412 @@ -125,6 +138,7 @@
9413 dsubu sp, 4*SZREG # init stack pointer
9414
9415 j init_arch
9416 + .set pop
9417 END(kernel_entry)
9418
9419 #ifdef CONFIG_SMP
9420 @@ -133,6 +147,23 @@
9421 * function after setting up the stack and gp registers.
9422 */
9423 NESTED(smp_bootstrap, 16, sp)
9424 + .set push
9425 + /*
9426 + * For the moment disable interrupts and bootstrap exception
9427 + * vectors, mark the kernel mode and set ST0_KX so that the CPU
9428 + * does not spit fire when using 64-bit addresses. A full
9429 + * initialization of the CPU's status register is done later in
9430 + * per_cpu_trap_init().
9431 + */
9432 + mfc0 t0, CP0_STATUS
9433 + or t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
9434 + xor t0, ST0_BEV|0x1f
9435 + mtc0 t0, CP0_STATUS
9436 +
9437 + .set noreorder
9438 + sll zero,3 # ehb
9439 + .set reorder
9440 +
9441 #ifdef CONFIG_SGI_IP27
9442 GET_NASID_ASM t1
9443 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
9444 @@ -146,19 +177,8 @@
9445 ARC64_TWIDDLE_PC
9446 #endif /* CONFIG_SGI_IP27 */
9447
9448 - CLI
9449 -
9450 - /*
9451 - * For the moment set ST0_KU so the CPU will not spit fire when
9452 - * executing 64-bit instructions. The full initialization of the
9453 - * CPU's status register is done later in per_cpu_trap_init().
9454 - */
9455 - mfc0 t0, CP0_STATUS
9456 - or t0, ST0_KX
9457 - mtc0 t0, CP0_STATUS
9458 -
9459 jal start_secondary # XXX: IP27: cboot
9460 -
9461 + .set pop
9462 END(smp_bootstrap)
9463 #endif /* CONFIG_SMP */
9464
9465 diff -Nur linux-2.4.29/arch/mips64/kernel/ioctl32.c linux-mips/arch/mips64/kernel/ioctl32.c
9466 --- linux-2.4.29/arch/mips64/kernel/ioctl32.c 2005-01-19 15:09:31.000000000 +0100
9467 +++ linux-mips/arch/mips64/kernel/ioctl32.c 2005-01-26 03:36:17.000000000 +0100
9468 @@ -2352,7 +2352,7 @@
9469 IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
9470 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
9471 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
9472 - IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
9473 + IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
9474 IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
9475 IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
9476 IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
9477 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_64.S linux-mips/arch/mips64/kernel/scall_64.S
9478 --- linux-2.4.29/arch/mips64/kernel/scall_64.S 2005-01-19 15:09:32.000000000 +0100
9479 +++ linux-mips/arch/mips64/kernel/scall_64.S 2005-02-07 22:21:54.000000000 +0100
9480 @@ -102,15 +102,14 @@
9481
9482 trace_a_syscall:
9483 SAVE_STATIC
9484 - sd t2,PT_R1(sp)
9485 + move s0, t2
9486 jal syscall_trace
9487 - ld t2,PT_R1(sp)
9488
9489 ld a0, PT_R4(sp) # Restore argument registers
9490 ld a1, PT_R5(sp)
9491 ld a2, PT_R6(sp)
9492 ld a3, PT_R7(sp)
9493 - jalr t2
9494 + jalr s0
9495
9496 li t0, -EMAXERRNO - 1 # error?
9497 sltu t0, t0, v0
9498 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_n32.S linux-mips/arch/mips64/kernel/scall_n32.S
9499 --- linux-2.4.29/arch/mips64/kernel/scall_n32.S 2005-01-19 15:09:32.000000000 +0100
9500 +++ linux-mips/arch/mips64/kernel/scall_n32.S 2005-02-07 22:21:54.000000000 +0100
9501 @@ -106,15 +106,14 @@
9502
9503 trace_a_syscall:
9504 SAVE_STATIC
9505 - sd t2,PT_R1(sp)
9506 + move s0, t2
9507 jal syscall_trace
9508 - ld t2,PT_R1(sp)
9509
9510 ld a0, PT_R4(sp) # Restore argument registers
9511 ld a1, PT_R5(sp)
9512 ld a2, PT_R6(sp)
9513 ld a3, PT_R7(sp)
9514 - jalr t2
9515 + jalr s0
9516
9517 li t0, -EMAXERRNO - 1 # error?
9518 sltu t0, t0, v0
9519 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_o32.S linux-mips/arch/mips64/kernel/scall_o32.S
9520 --- linux-2.4.29/arch/mips64/kernel/scall_o32.S 2005-01-19 15:09:32.000000000 +0100
9521 +++ linux-mips/arch/mips64/kernel/scall_o32.S 2005-02-14 04:52:57.000000000 +0100
9522 @@ -118,9 +118,8 @@
9523 sd a6, PT_R10(sp)
9524 sd a7, PT_R11(sp)
9525
9526 - sd t2,PT_R1(sp)
9527 + move s0, t2
9528 jal syscall_trace
9529 - ld t2,PT_R1(sp)
9530
9531 ld a0, PT_R4(sp) # Restore argument registers
9532 ld a1, PT_R5(sp)
9533 @@ -129,7 +128,7 @@
9534 ld a4, PT_R8(sp)
9535 ld a5, PT_R9(sp)
9536
9537 - jalr t2
9538 + jalr s0
9539
9540 li t0, -EMAXERRNO - 1 # error?
9541 sltu t0, t0, v0
9542 @@ -576,6 +575,8 @@
9543 sys_call_table:
9544 syscalltable
9545
9546 + .purgem sys
9547 +
9548 .macro sys function, nargs
9549 .byte \nargs
9550 .endm
9551 diff -Nur linux-2.4.29/arch/mips64/kernel/setup.c linux-mips/arch/mips64/kernel/setup.c
9552 --- linux-2.4.29/arch/mips64/kernel/setup.c 2005-01-19 15:09:32.000000000 +0100
9553 +++ linux-mips/arch/mips64/kernel/setup.c 2004-11-22 14:38:26.000000000 +0100
9554 @@ -129,14 +129,6 @@
9555 */
9556 load_mmu();
9557
9558 - /*
9559 - * On IP27, I am seeing the TS bit set when the kernel is loaded.
9560 - * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
9561 - * anyway ...
9562 - */
9563 - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
9564 - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
9565 -
9566 start_kernel();
9567 }
9568
9569 diff -Nur linux-2.4.29/arch/mips64/kernel/signal_n32.c linux-mips/arch/mips64/kernel/signal_n32.c
9570 --- linux-2.4.29/arch/mips64/kernel/signal_n32.c 2005-01-19 15:09:33.000000000 +0100
9571 +++ linux-mips/arch/mips64/kernel/signal_n32.c 2005-02-07 22:10:53.000000000 +0100
9572 @@ -68,7 +68,7 @@
9573 };
9574
9575 extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9576 -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9577 +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9578
9579 asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
9580 {
9581 diff -Nur linux-2.4.29/arch/mips64/kernel/traps.c linux-mips/arch/mips64/kernel/traps.c
9582 --- linux-2.4.29/arch/mips64/kernel/traps.c 2005-01-19 15:09:33.000000000 +0100
9583 +++ linux-mips/arch/mips64/kernel/traps.c 2004-11-22 14:38:26.000000000 +0100
9584 @@ -809,13 +809,18 @@
9585 void __init per_cpu_trap_init(void)
9586 {
9587 unsigned int cpu = smp_processor_id();
9588 + unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
9589
9590 - /* Some firmware leaves the BEV flag set, clear it. */
9591 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
9592 - set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
9593 -
9594 + /*
9595 + * Disable coprocessors, enable 64-bit addressing and set FPU
9596 + * for the 32/32 FPR register model. Reset the BEV flag that
9597 + * some firmware may have left set and the TS bit (for IP27).
9598 + * Set XX for ISA IV code to work.
9599 + */
9600 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
9601 - set_c0_status(ST0_XX);
9602 + status_set |= ST0_XX;
9603 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
9604 + status_set);
9605
9606 /*
9607 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
9608 @@ -825,13 +830,11 @@
9609 set_c0_cause(CAUSEF_IV);
9610
9611 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
9612 - write_c0_context(((long)(&pgd_current[cpu])) << 23);
9613 - write_c0_wired(0);
9614 + TLBMISS_HANDLER_SETUP();
9615
9616 atomic_inc(&init_mm.mm_count);
9617 current->active_mm = &init_mm;
9618 - if (current->mm)
9619 - BUG();
9620 + BUG_ON(current->mm);
9621 enter_lazy_tlb(&init_mm, current, cpu);
9622 }
9623
9624 @@ -842,8 +845,6 @@
9625 extern char except_vec4;
9626 unsigned long i;
9627
9628 - per_cpu_trap_init();
9629 -
9630 /* Copy the generic exception handlers to their final destination. */
9631 memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
9632 memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
9633 @@ -933,6 +934,5 @@
9634
9635 flush_icache_range(KSEG0, KSEG0 + 0x400);
9636
9637 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
9638 - current->active_mm = &init_mm;
9639 + per_cpu_trap_init();
9640 }
9641 diff -Nur linux-2.4.29/arch/mips64/mm/cerr-sb1.c linux-mips/arch/mips64/mm/cerr-sb1.c
9642 --- linux-2.4.29/arch/mips64/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
9643 +++ linux-mips/arch/mips64/mm/cerr-sb1.c 2004-12-13 18:37:26.000000000 +0100
9644 @@ -252,14 +252,14 @@
9645
9646 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
9647 static const uint64_t mask_72_64[8] = {
9648 - 0x0738C808099264FFL,
9649 - 0x38C808099264FF07L,
9650 - 0xC808099264FF0738L,
9651 - 0x08099264FF0738C8L,
9652 - 0x099264FF0738C808L,
9653 - 0x9264FF0738C80809L,
9654 - 0x64FF0738C8080992L,
9655 - 0xFF0738C808099264L
9656 + 0x0738C808099264FFULL,
9657 + 0x38C808099264FF07ULL,
9658 + 0xC808099264FF0738ULL,
9659 + 0x08099264FF0738C8ULL,
9660 + 0x099264FF0738C808ULL,
9661 + 0x9264FF0738C80809ULL,
9662 + 0x64FF0738C8080992ULL,
9663 + 0xFF0738C808099264ULL
9664 };
9665
9666 /* Calculate the parity on a range of bits */
9667 @@ -331,9 +331,9 @@
9668 ((lru >> 4) & 0x3),
9669 ((lru >> 6) & 0x3));
9670 }
9671 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
9672 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
9673 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
9674 - va |= 0x3FFFF00000000000;
9675 + va |= 0x3FFFF00000000000ULL;
9676 valid = ((taghi >> 29) & 1);
9677 if (valid) {
9678 tlo_tmp = taglo & 0xfff3ff;
9679 @@ -474,7 +474,7 @@
9680 : "r" ((way << 13) | addr));
9681
9682 taglo = ((unsigned long long)taglohi << 32) | taglolo;
9683 - pa = (taglo & 0xFFFFFFE000) | addr;
9684 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
9685 if (way == 0) {
9686 lru = (taghi >> 14) & 0xff;
9687 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
9688 diff -Nur linux-2.4.29/arch/mips64/mm/c-r4k.c linux-mips/arch/mips64/mm/c-r4k.c
9689 --- linux-2.4.29/arch/mips64/mm/c-r4k.c 2005-01-19 15:09:33.000000000 +0100
9690 +++ linux-mips/arch/mips64/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
9691 @@ -867,9 +867,16 @@
9692 * normally they'd suffer from aliases but magic in the hardware deals
9693 * with that for us so we don't need to take care ourselves.
9694 */
9695 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
9696 - if (c->dcache.waysize > PAGE_SIZE)
9697 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9698 + switch (c->cputype) {
9699 + case CPU_R10000:
9700 + case CPU_R12000:
9701 + break;
9702 + case CPU_24K:
9703 + if (!(read_c0_config7() & (1 << 16)))
9704 + default:
9705 + if (c->dcache.waysize > PAGE_SIZE)
9706 + c->dcache.flags |= MIPS_CACHE_ALIASES;
9707 + }
9708
9709 switch (c->cputype) {
9710 case CPU_20KC:
9711 @@ -1070,9 +1077,6 @@
9712 setup_scache();
9713 coherency_setup();
9714
9715 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
9716 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9717 -
9718 r4k_blast_dcache_page_setup();
9719 r4k_blast_dcache_page_indexed_setup();
9720 r4k_blast_dcache_setup();
9721 diff -Nur linux-2.4.29/arch/mips64/mm/tlbex-r4k.S linux-mips/arch/mips64/mm/tlbex-r4k.S
9722 --- linux-2.4.29/arch/mips64/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
9723 +++ linux-mips/arch/mips64/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
9724 @@ -151,11 +151,9 @@
9725 ld k0, 0(k1) # get even pte
9726 ld k1, 8(k1) # get odd pte
9727 PTE_RELOAD k0 k1
9728 - rm9000_tlb_hazard
9729 - b 1f
9730 - tlbwr
9731 -1: nop
9732 - rm9000_tlb_hazard
9733 + mtc0_tlbw_hazard
9734 + tlbwr
9735 +1: tlbw_eret_hazard
9736 eret
9737
9738 9: # handle the vmalloc range
9739 @@ -163,11 +161,9 @@
9740 ld k0, 0(k1) # get even pte
9741 ld k1, 8(k1) # get odd pte
9742 PTE_RELOAD k0 k1
9743 - rm9000_tlb_hazard
9744 - b 1f
9745 - tlbwr
9746 -1: nop
9747 - rm9000_tlb_hazard
9748 + mtc0_tlbw_hazard
9749 + tlbwr
9750 +1: tlbw_eret_hazard
9751 eret
9752 END(handle_vec1_r4k)
9753
9754 @@ -195,10 +191,9 @@
9755 ld k0, 0(k1) # get even pte
9756 ld k1, 8(k1) # get odd pte
9757 PTE_RELOAD k0 k1
9758 - rm9000_tlb_hazard
9759 - nop
9760 + mtc0_tlbw_hazard
9761 tlbwr
9762 - rm9000_tlb_hazard
9763 + tlbw_eret_hazard
9764 eret
9765
9766 9: # handle the vmalloc range
9767 @@ -206,10 +201,9 @@
9768 ld k0, 0(k1) # get even pte
9769 ld k1, 8(k1) # get odd pte
9770 PTE_RELOAD k0 k1
9771 - rm9000_tlb_hazard
9772 - nop
9773 + mtc0_tlbw_hazard
9774 tlbwr
9775 - rm9000_tlb_hazard
9776 + tlbw_eret_hazard
9777 eret
9778 END(handle_vec1_r10k)
9779
9780 diff -Nur linux-2.4.29/arch/mips64/mm/tlb-r4k.c linux-mips/arch/mips64/mm/tlb-r4k.c
9781 --- linux-2.4.29/arch/mips64/mm/tlb-r4k.c 2005-01-19 15:09:33.000000000 +0100
9782 +++ linux-mips/arch/mips64/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
9783 @@ -1,24 +1,12 @@
9784 /*
9785 - * Carsten Langgaard, carstenl@mips.com
9786 - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
9787 - *
9788 - * This program is free software; you can distribute it and/or modify it
9789 - * under the terms of the GNU General Public License (Version 2) as
9790 - * published by the Free Software Foundation.
9791 - *
9792 - * This program is distributed in the hope it will be useful, but WITHOUT
9793 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
9794 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9795 + * This file is subject to the terms and conditions of the GNU General Public
9796 + * License. See the file "COPYING" in the main directory of this archive
9797 * for more details.
9798 *
9799 - * You should have received a copy of the GNU General Public License along
9800 - * with this program; if not, write to the Free Software Foundation, Inc.,
9801 - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
9802 - *
9803 - * MIPS64 CPU variant specific MMU routines.
9804 - * These routine are not optimized in any way, they are done in a generic way
9805 - * so they can be used on all MIPS64 compliant CPUs, and also done in an
9806 - * attempt not to break anything for the R4xx0 style CPUs.
9807 + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9808 + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
9809 + * Carsten Langgaard, carstenl@mips.com
9810 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
9811 */
9812 #include <linux/init.h>
9813 #include <linux/sched.h>
9814 @@ -30,9 +18,6 @@
9815 #include <asm/pgtable.h>
9816 #include <asm/system.h>
9817
9818 -#undef DEBUG_TLB
9819 -#undef DEBUG_TLBUPDATE
9820 -
9821 extern void except_vec1_r4k(void);
9822
9823 /* CP0 hazard avoidance. */
9824 @@ -46,31 +31,23 @@
9825 unsigned long old_ctx;
9826 int entry;
9827
9828 -#ifdef DEBUG_TLB
9829 - printk("[tlball]");
9830 -#endif
9831 -
9832 local_irq_save(flags);
9833 /* Save old context and create impossible VPN2 value */
9834 old_ctx = read_c0_entryhi();
9835 - write_c0_entryhi(XKPHYS);
9836 write_c0_entrylo0(0);
9837 write_c0_entrylo1(0);
9838 - BARRIER;
9839
9840 entry = read_c0_wired();
9841
9842 /* Blast 'em all away. */
9843 - while(entry < current_cpu_data.tlbsize) {
9844 - /* Make sure all entries differ. */
9845 - write_c0_entryhi(XKPHYS+entry*0x2000);
9846 + while (entry < current_cpu_data.tlbsize) {
9847 + write_c0_entryhi(XKPHYS + entry*0x2000);
9848 write_c0_index(entry);
9849 - BARRIER;
9850 + mtc0_tlbw_hazard();
9851 tlb_write_indexed();
9852 - BARRIER;
9853 entry++;
9854 }
9855 - BARRIER;
9856 + tlbw_use_hazard();
9857 write_c0_entryhi(old_ctx);
9858 local_irq_restore(flags);
9859 }
9860 @@ -79,12 +56,8 @@
9861 {
9862 int cpu = smp_processor_id();
9863
9864 - if (cpu_context(cpu, mm) != 0) {
9865 -#ifdef DEBUG_TLB
9866 - printk("[tlbmm<%d>]", mm->context);
9867 -#endif
9868 + if (cpu_context(cpu, mm) != 0)
9869 drop_mmu_context(mm,cpu);
9870 - }
9871 }
9872
9873 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
9874 @@ -96,10 +69,6 @@
9875 unsigned long flags;
9876 int size;
9877
9878 -#ifdef DEBUG_TLB
9879 - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
9880 - start, end);
9881 -#endif
9882 local_irq_save(flags);
9883 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
9884 size = (size + 1) >> 1;
9885 @@ -110,25 +79,25 @@
9886 start &= (PAGE_MASK << 1);
9887 end += ((PAGE_SIZE << 1) - 1);
9888 end &= (PAGE_MASK << 1);
9889 - while(start < end) {
9890 + while (start < end) {
9891 int idx;
9892
9893 write_c0_entryhi(start | newpid);
9894 start += (PAGE_SIZE << 1);
9895 - BARRIER;
9896 + mtc0_tlbw_hazard();
9897 tlb_probe();
9898 BARRIER;
9899 idx = read_c0_index();
9900 write_c0_entrylo0(0);
9901 write_c0_entrylo1(0);
9902 - if(idx < 0)
9903 + if (idx < 0)
9904 continue;
9905 /* Make sure all entries differ. */
9906 write_c0_entryhi(XKPHYS+idx*0x2000);
9907 - BARRIER;
9908 + mtc0_tlbw_hazard();
9909 tlb_write_indexed();
9910 - BARRIER;
9911 }
9912 + tlbw_use_hazard();
9913 write_c0_entryhi(oldpid);
9914 } else {
9915 drop_mmu_context(mm, cpu);
9916 @@ -145,28 +114,26 @@
9917 unsigned long flags;
9918 unsigned long oldpid, newpid, idx;
9919
9920 -#ifdef DEBUG_TLB
9921 - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
9922 -#endif
9923 newpid = cpu_asid(cpu, vma->vm_mm);
9924 page &= (PAGE_MASK << 1);
9925 local_irq_save(flags);
9926 oldpid = read_c0_entryhi();
9927 write_c0_entryhi(page | newpid);
9928 - BARRIER;
9929 + mtc0_tlbw_hazard();
9930 tlb_probe();
9931 BARRIER;
9932 idx = read_c0_index();
9933 write_c0_entrylo0(0);
9934 write_c0_entrylo1(0);
9935 - if(idx < 0)
9936 + if (idx < 0)
9937 goto finish;
9938 /* Make sure all entries differ. */
9939 write_c0_entryhi(XKPHYS+idx*0x2000);
9940 - BARRIER;
9941 + mtc0_tlbw_hazard();
9942 tlb_write_indexed();
9943 + tlbw_use_hazard();
9944 +
9945 finish:
9946 - BARRIER;
9947 write_c0_entryhi(oldpid);
9948 local_irq_restore(flags);
9949 }
9950 @@ -186,7 +153,7 @@
9951
9952 local_irq_save(flags);
9953 write_c0_entryhi(page);
9954 - BARRIER;
9955 + mtc0_tlbw_hazard();
9956 tlb_probe();
9957 BARRIER;
9958 idx = read_c0_index();
9959 @@ -195,10 +162,12 @@
9960 if (idx >= 0) {
9961 /* Make sure all entries differ. */
9962 write_c0_entryhi(KSEG0+idx*0x2000);
9963 + mtc0_tlbw_hazard();
9964 tlb_write_indexed();
9965 + tlbw_use_hazard();
9966 }
9967 - BARRIER;
9968 write_c0_entryhi(oldpid);
9969 +
9970 local_irq_restore(flags);
9971 }
9972
9973 @@ -208,7 +177,6 @@
9974 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
9975 {
9976 unsigned long flags;
9977 - unsigned int asid;
9978 pgd_t *pgdp;
9979 pmd_t *pmdp;
9980 pte_t *ptep;
9981 @@ -222,70 +190,58 @@
9982
9983 pid = read_c0_entryhi() & ASID_MASK;
9984
9985 -#ifdef DEBUG_TLB
9986 - if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
9987 - (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
9988 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
9989 - "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
9990 - vma->vm_mm) & ASID_MASK), pid);
9991 - }
9992 -#endif
9993 -
9994 local_irq_save(flags);
9995 address &= (PAGE_MASK << 1);
9996 - write_c0_entryhi(address | (pid));
9997 + write_c0_entryhi(address | pid);
9998 pgdp = pgd_offset(vma->vm_mm, address);
9999 - BARRIER;
10000 + mtc0_tlbw_hazard();
10001 tlb_probe();
10002 BARRIER;
10003 pmdp = pmd_offset(pgdp, address);
10004 idx = read_c0_index();
10005 ptep = pte_offset(pmdp, address);
10006 - BARRIER;
10007 write_c0_entrylo0(pte_val(*ptep++) >> 6);
10008 write_c0_entrylo1(pte_val(*ptep) >> 6);
10009 - write_c0_entryhi(address | (pid));
10010 - BARRIER;
10011 - if(idx < 0) {
10012 + write_c0_entryhi(address | pid);
10013 + mtc0_tlbw_hazard();
10014 + if (idx < 0)
10015 tlb_write_random();
10016 - } else {
10017 + else
10018 tlb_write_indexed();
10019 - }
10020 - BARRIER;
10021 + tlbw_use_hazard();
10022 write_c0_entryhi(pid);
10023 - BARRIER;
10024 local_irq_restore(flags);
10025 }
10026
10027 -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
10028 - unsigned long entryhi, unsigned long pagemask)
10029 +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
10030 + unsigned long entryhi, unsigned long pagemask)
10031 {
10032 - unsigned long flags;
10033 - unsigned long wired;
10034 - unsigned long old_pagemask;
10035 - unsigned long old_ctx;
10036 -
10037 - local_irq_save(flags);
10038 - /* Save old context and create impossible VPN2 value */
10039 - old_ctx = (read_c0_entryhi() & ASID_MASK);
10040 - old_pagemask = read_c0_pagemask();
10041 - wired = read_c0_wired();
10042 - write_c0_wired(wired + 1);
10043 - write_c0_index(wired);
10044 - BARRIER;
10045 - write_c0_pagemask(pagemask);
10046 - write_c0_entryhi(entryhi);
10047 - write_c0_entrylo0(entrylo0);
10048 - write_c0_entrylo1(entrylo1);
10049 - BARRIER;
10050 - tlb_write_indexed();
10051 - BARRIER;
10052 -
10053 - write_c0_entryhi(old_ctx);
10054 - BARRIER;
10055 - write_c0_pagemask(old_pagemask);
10056 - local_flush_tlb_all();
10057 - local_irq_restore(flags);
10058 + unsigned long flags;
10059 + unsigned long wired;
10060 + unsigned long old_pagemask;
10061 + unsigned long old_ctx;
10062 +
10063 + local_irq_save(flags);
10064 + /* Save old context and create impossible VPN2 value */
10065 + old_ctx = read_c0_entryhi() & ASID_MASK;
10066 + old_pagemask = read_c0_pagemask();
10067 + wired = read_c0_wired();
10068 + write_c0_wired(wired + 1);
10069 + write_c0_index(wired);
10070 + BARRIER;
10071 + write_c0_pagemask(pagemask);
10072 + write_c0_entryhi(entryhi);
10073 + write_c0_entrylo0(entrylo0);
10074 + write_c0_entrylo1(entrylo1);
10075 + mtc0_tlbw_hazard();
10076 + tlb_write_indexed();
10077 + tlbw_use_hazard();
10078 +
10079 + write_c0_entryhi(old_ctx);
10080 + BARRIER;
10081 + write_c0_pagemask(old_pagemask);
10082 + local_flush_tlb_all();
10083 + local_irq_restore(flags);
10084 }
10085
10086 /*
10087 @@ -317,17 +273,15 @@
10088 }
10089
10090 write_c0_index(temp_tlb_entry);
10091 - BARRIER;
10092 write_c0_pagemask(pagemask);
10093 write_c0_entryhi(entryhi);
10094 write_c0_entrylo0(entrylo0);
10095 write_c0_entrylo1(entrylo1);
10096 - BARRIER;
10097 + mtc0_tlbw_hazard();
10098 tlb_write_indexed();
10099 - BARRIER;
10100 + tlbw_use_hazard();
10101
10102 write_c0_entryhi(old_ctx);
10103 - BARRIER;
10104 write_c0_pagemask(old_pagemask);
10105 out:
10106 local_irq_restore(flags);
10107 @@ -348,15 +302,23 @@
10108 return;
10109
10110 config1 = read_c0_config1();
10111 - if (!((config1 >> 7) & 3))
10112 - panic("No MMU present");
10113 + if (!((config >> 7) & 3))
10114 + panic("No TLB present");
10115
10116 c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
10117 }
10118
10119 void __init r4k_tlb_init(void)
10120 {
10121 - unsigned long config = read_c0_config();
10122 + unsigned int config = read_c0_config();
10123 +
10124 + /*
10125 + * You should never change this register:
10126 + * - On R4600 1.7 the tlbp never hits for pages smaller than
10127 + * the value in the c0_pagemask register.
10128 + * - The entire mm handling assumes the c0_pagemask register to
10129 + * be set for 4kb pages.
10130 + */
10131 probe_tlb(config);
10132 write_c0_pagemask(PM_DEFAULT_MASK);
10133 write_c0_wired(0);
10134 diff -Nur linux-2.4.29/drivers/char/au1000_gpio.c linux-mips/drivers/char/au1000_gpio.c
10135 --- linux-2.4.29/drivers/char/au1000_gpio.c 2003-08-25 13:44:41.000000000 +0200
10136 +++ linux-mips/drivers/char/au1000_gpio.c 2003-12-20 14:18:51.000000000 +0100
10137 @@ -246,7 +246,7 @@
10138
10139 static struct miscdevice au1000gpio_miscdev =
10140 {
10141 - GPIO_MINOR,
10142 + MISC_DYNAMIC_MINOR,
10143 "au1000_gpio",
10144 &au1000gpio_fops
10145 };
10146 diff -Nur linux-2.4.29/drivers/char/au1550_psc_spi.c linux-mips/drivers/char/au1550_psc_spi.c
10147 --- linux-2.4.29/drivers/char/au1550_psc_spi.c 1970-01-01 01:00:00.000000000 +0100
10148 +++ linux-mips/drivers/char/au1550_psc_spi.c 2005-02-11 21:37:24.000000000 +0100
10149 @@ -0,0 +1,466 @@
10150 +/*
10151 + * Driver for Alchemy Au1550 SPI on the PSC.
10152 + *
10153 + * Copyright 2004 Embedded Edge, LLC.
10154 + * dan@embeddededge.com
10155 + *
10156 + * This program is free software; you can redistribute it and/or modify it
10157 + * under the terms of the GNU General Public License as published by the
10158 + * Free Software Foundation; either version 2 of the License, or (at your
10159 + * option) any later version.
10160 + *
10161 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10162 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
10163 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10164 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
10165 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
10166 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
10167 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
10168 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10169 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
10170 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10171 + *
10172 + * You should have received a copy of the GNU General Public License along
10173 + * with this program; if not, write to the Free Software Foundation, Inc.,
10174 + * 675 Mass Ave, Cambridge, MA 02139, USA.
10175 + */
10176 +
10177 +#include <linux/module.h>
10178 +#include <linux/config.h>
10179 +#include <linux/types.h>
10180 +#include <linux/kernel.h>
10181 +#include <linux/miscdevice.h>
10182 +#include <linux/init.h>
10183 +#include <asm/uaccess.h>
10184 +#include <asm/io.h>
10185 +#include <asm/au1000.h>
10186 +#include <asm/au1550_spi.h>
10187 +#include <asm/au1xxx_psc.h>
10188 +
10189 +#ifdef CONFIG_MIPS_PB1550
10190 +#include <asm/pb1550.h>
10191 +#endif
10192 +
10193 +#ifdef CONFIG_MIPS_DB1550
10194 +#include <asm/db1x00.h>
10195 +#endif
10196 +
10197 +#ifdef CONFIG_MIPS_PB1200
10198 +#include <asm/pb1200.h>
10199 +#endif
10200 +
10201 +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
10202 + * We support open, close, write, and ioctl. The SPI is a full duplex
10203 + * interface, you can't read without writing. So, the write system call
10204 + * copies the bytes out to the SPI, and whatever is returned is placed
10205 + * in the same buffer. Kinda weird, maybe we'll change it, but for now
10206 + * it works OK.
10207 + * I didn't implement any DMA yet, and it's a debate about the necessity.
10208 + * The SPI clocks are usually quite fast, so data is sent/received as
10209 + * quickly as you can stuff the FIFO. The overhead of DMA and interrupts
10210 + * are usually far greater than the data transfer itself. If, however,
10211 + * we find applications that move large amounts of data, we may choose
10212 + * use the overhead of buffering and DMA to do the work.
10213 + */
10214 +
10215 +/* The maximum clock rate specified in the manual is 2mHz.
10216 +*/
10217 +#define MAX_BAUD_RATE (2 * 1000000)
10218 +#define PSC_INTCLK_RATE (32 * 1000000)
10219 +
10220 +static int inuse;
10221 +
10222 +/* We have to know what the user requested for the data length
10223 + * so we know how to stuff the fifo. The FIFO is 32 bits wide,
10224 + * and we have to load it with the bits to go in a single transfer.
10225 + */
10226 +static uint spi_datalen;
10227 +
10228 +static int
10229 +au1550spi_master_done( int ms )
10230 +{
10231 + int timeout=ms;
10232 + volatile psc_spi_t *sp;
10233 +
10234 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10235 +
10236 + /* Loop until MD is set or timeout has expired */
10237 + while(!(sp->psc_spievent & PSC_SPIEVNT_MD) && timeout--) udelay(1000);
10238 +
10239 + if ( !timeout )
10240 + return 0;
10241 + else
10242 + sp->psc_spievent |= PSC_SPIEVNT_MD;
10243 +
10244 + return 1;
10245 +}
10246 +
10247 +static int
10248 +au1550spi_open(struct inode *inode, struct file *file)
10249 +{
10250 + if (inuse)
10251 + return -EBUSY;
10252 +
10253 + inuse = 1;
10254 +
10255 + MOD_INC_USE_COUNT;
10256 +
10257 + return 0;
10258 +}
10259 +
10260 +static ssize_t
10261 +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
10262 +{
10263 + int bytelen, i;
10264 + size_t rcount, retval;
10265 + unsigned char sb, *rp, *wp;
10266 + uint fifoword, pcr, stat;
10267 + volatile psc_spi_t *sp;
10268 +
10269 + /* Get the number of bytes per transfer.
10270 + */
10271 + bytelen = ((spi_datalen - 1) / 8) + 1;
10272 +
10273 + /* User needs to send us multiple of this count.
10274 + */
10275 + if ((count % bytelen) != 0)
10276 + return -EINVAL;
10277 +
10278 + rp = wp = (unsigned char *)bp;
10279 + retval = rcount = count;
10280 +
10281 + /* Reset the FIFO.
10282 + */
10283 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10284 + sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
10285 + au_sync();
10286 + do {
10287 + pcr = sp->psc_spipcr;
10288 + au_sync();
10289 + } while (pcr != 0);
10290 +
10291 + /* Prime the transmit FIFO.
10292 + */
10293 + while (count > 0) {
10294 + fifoword = 0;
10295 + for (i=0; i<bytelen; i++) {
10296 + fifoword <<= 8;
10297 + if (get_user(sb, wp) < 0)
10298 + return -EFAULT;
10299 + fifoword |= sb;
10300 + wp++;
10301 + }
10302 + count -= bytelen;
10303 + if (count <= 0)
10304 + fifoword |= PSC_SPITXRX_LC;
10305 + sp->psc_spitxrx = fifoword;
10306 + au_sync();
10307 + stat = sp->psc_spistat;
10308 + au_sync();
10309 + if (stat & PSC_SPISTAT_TF)
10310 + break;
10311 + }
10312 +
10313 + /* Start the transfer.
10314 + */
10315 + sp->psc_spipcr = PSC_SPIPCR_MS;
10316 + au_sync();
10317 +
10318 + /* Now, just keep the transmit fifo full and empty the receive.
10319 + */
10320 + while (count > 0) {
10321 + stat = sp->psc_spistat;
10322 + au_sync();
10323 + while ((stat & PSC_SPISTAT_RE) == 0) {
10324 + fifoword = sp->psc_spitxrx;
10325 + au_sync();
10326 + for (i=0; i<bytelen; i++) {
10327 + sb = fifoword & 0xff;
10328 + if (put_user(sb, rp) < 0)
10329 + return -EFAULT;
10330 + fifoword >>= 8;
10331 + rp++;
10332 + }
10333 + rcount -= bytelen;
10334 + stat = sp->psc_spistat;
10335 + au_sync();
10336 + }
10337 + if ((stat & PSC_SPISTAT_TF) == 0) {
10338 + fifoword = 0;
10339 + for (i=0; i<bytelen; i++) {
10340 + fifoword <<= 8;
10341 + if (get_user(sb, wp) < 0)
10342 + return -EFAULT;
10343 + fifoword |= sb;
10344 + wp++;
10345 + }
10346 + count -= bytelen;
10347 + if (count <= 0)
10348 + fifoword |= PSC_SPITXRX_LC;
10349 + sp->psc_spitxrx = fifoword;
10350 + au_sync();
10351 + }
10352 + }
10353 +
10354 + /* All of the bytes for transmit have been written. Hang
10355 + * out waiting for any residual bytes that are yet to be
10356 + * read from the fifo.
10357 + */
10358 + while (rcount > 0) {
10359 + stat = sp->psc_spistat;
10360 + au_sync();
10361 + if ((stat & PSC_SPISTAT_RE) == 0) {
10362 + fifoword = sp->psc_spitxrx;
10363 + au_sync();
10364 + for (i=0; i<bytelen; i++) {
10365 + sb = fifoword & 0xff;
10366 + if (put_user(sb, rp) < 0)
10367 + return -EFAULT;
10368 + fifoword >>= 8;
10369 + rp++;
10370 + }
10371 + rcount -= bytelen;
10372 + }
10373 + }
10374 +
10375 + /* Wait for MasterDone event. 30ms timeout */
10376 + if (!au1550spi_master_done(30) ) retval = -EFAULT;
10377 + return retval;
10378 +}
10379 +
10380 +static int
10381 +au1550spi_release(struct inode *inode, struct file *file)
10382 +{
10383 + MOD_DEC_USE_COUNT;
10384 +
10385 + inuse = 0;
10386 +
10387 + return 0;
10388 +}
10389 +
10390 +/* Set the baud rate closest to the request, then return the actual
10391 + * value we are using.
10392 + */
10393 +static uint
10394 +set_baud_rate(uint baud)
10395 +{
10396 + uint rate, tmpclk, brg, ctl, stat;
10397 + volatile psc_spi_t *sp;
10398 +
10399 + /* For starters, the input clock is divided by two.
10400 + */
10401 + tmpclk = PSC_INTCLK_RATE/2;
10402 +
10403 + rate = tmpclk / baud;
10404 +
10405 + /* The dividers work as follows:
10406 + * baud = tmpclk / (2 * (brg + 1))
10407 + */
10408 + brg = (rate/2) - 1;
10409 +
10410 + /* Test BRG to ensure it will fit into the 6 bits allocated.
10411 + */
10412 +
10413 + /* Make sure the device is disabled while we make the change.
10414 + */
10415 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10416 + ctl = sp->psc_spicfg;
10417 + au_sync();
10418 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
10419 + au_sync();
10420 + ctl = PSC_SPICFG_CLR_BAUD(ctl);
10421 + ctl |= PSC_SPICFG_SET_BAUD(brg);
10422 + sp->psc_spicfg = ctl;
10423 + au_sync();
10424 +
10425 + /* If the device was running prior to getting here, wait for
10426 + * it to restart.
10427 + */
10428 + if (ctl & PSC_SPICFG_DE_ENABLE) {
10429 + do {
10430 + stat = sp->psc_spistat;
10431 + au_sync();
10432 + } while ((stat & PSC_SPISTAT_DR) == 0);
10433 + }
10434 +
10435 + /* Return the actual value.
10436 + */
10437 + rate = tmpclk / (2 * (brg + 1));
10438 +
10439 + return(rate);
10440 +}
10441 +
10442 +static uint
10443 +set_word_len(uint len)
10444 +{
10445 + uint ctl, stat;
10446 + volatile psc_spi_t *sp;
10447 +
10448 + if ((len < 4) || (len > 24))
10449 + return -EINVAL;
10450 +
10451 + /* Make sure the device is disabled while we make the change.
10452 + */
10453 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10454 + ctl = sp->psc_spicfg;
10455 + au_sync();
10456 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
10457 + au_sync();
10458 + ctl = PSC_SPICFG_CLR_LEN(ctl);
10459 + ctl |= PSC_SPICFG_SET_LEN(len);
10460 + sp->psc_spicfg = ctl;
10461 + au_sync();
10462 +
10463 + /* If the device was running prior to getting here, wait for
10464 + * it to restart.
10465 + */
10466 + if (ctl & PSC_SPICFG_DE_ENABLE) {
10467 + do {
10468 + stat = sp->psc_spistat;
10469 + au_sync();
10470 + } while ((stat & PSC_SPISTAT_DR) == 0);
10471 + }
10472 +
10473 + return 0;
10474 +}
10475 +
10476 +static int
10477 +au1550spi_ioctl(struct inode *inode, struct file *file,
10478 + unsigned int cmd, unsigned long arg)
10479 +{
10480 + int status;
10481 + u32 val;
10482 +
10483 + status = 0;
10484 +
10485 + switch(cmd) {
10486 + case AU1550SPI_WORD_LEN:
10487 + status = set_word_len(arg);
10488 + break;
10489 +
10490 + case AU1550SPI_SET_BAUD:
10491 + if (get_user(val, (u32 *)arg))
10492 + return -EFAULT;
10493 +
10494 + val = set_baud_rate(val);
10495 + if (put_user(val, (u32 *)arg))
10496 + return -EFAULT;
10497 + break;
10498 +
10499 + default:
10500 + status = -ENOIOCTLCMD;
10501 +
10502 + }
10503 +
10504 + return status;
10505 +}
10506 +
10507 +
10508 +static struct file_operations au1550spi_fops =
10509 +{
10510 + owner: THIS_MODULE,
10511 + write: au1550spi_write,
10512 + ioctl: au1550spi_ioctl,
10513 + open: au1550spi_open,
10514 + release: au1550spi_release,
10515 +};
10516 +
10517 +
10518 +static struct miscdevice au1550spi_miscdev =
10519 +{
10520 + MISC_DYNAMIC_MINOR,
10521 + "au1550_spi",
10522 + &au1550spi_fops
10523 +};
10524 +
10525 +
10526 +int __init
10527 +au1550spi_init(void)
10528 +{
10529 + uint clk, rate, stat;
10530 + volatile psc_spi_t *sp;
10531 +
10532 + /* Wire up Freq3 as a clock for the SPI. The PSC does
10533 + * factor of 2 divisor, so run a higher rate so we can
10534 + * get some granularity to the clock speeds.
10535 + * We can't do this in board set up because the frequency
10536 + * is computed too late.
10537 + */
10538 + rate = get_au1x00_speed();
10539 + rate /= PSC_INTCLK_RATE;
10540 +
10541 + /* The FRDIV in the frequency control is (FRDIV + 1) * 2
10542 + */
10543 + rate /=2;
10544 + rate--;
10545 + clk = au_readl(SYS_FREQCTRL1);
10546 + au_sync();
10547 + clk &= ~SYS_FC_FRDIV3_MASK;
10548 + clk |= (rate << SYS_FC_FRDIV3_BIT);
10549 + clk |= SYS_FC_FE3;
10550 + au_writel(clk, SYS_FREQCTRL1);
10551 + au_sync();
10552 +
10553 + /* Set up the clock source routing to get Freq3 to PSC0_intclk.
10554 + */
10555 + clk = au_readl(SYS_CLKSRC);
10556 + au_sync();
10557 + clk &= ~0x03e0;
10558 + clk |= (5 << 7);
10559 + au_writel(clk, SYS_CLKSRC);
10560 + au_sync();
10561 +
10562 + /* Set up GPIO pin function to drive PSC0_SYNC1, which is
10563 + * the SPI Select.
10564 + */
10565 + clk = au_readl(SYS_PINFUNC);
10566 + au_sync();
10567 + clk |= 1;
10568 + au_writel(clk, SYS_PINFUNC);
10569 + au_sync();
10570 +
10571 + /* Now, set up the PSC for SPI PIO mode.
10572 + */
10573 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10574 + sp->psc_ctrl = PSC_CTRL_DISABLE;
10575 + au_sync();
10576 + sp->psc_sel = PSC_SEL_PS_SPIMODE;
10577 + sp->psc_spicfg = 0;
10578 + au_sync();
10579 + sp->psc_ctrl = PSC_CTRL_ENABLE;
10580 + au_sync();
10581 + do {
10582 + stat = sp->psc_spistat;
10583 + au_sync();
10584 + } while ((stat & PSC_SPISTAT_SR) == 0);
10585 +
10586 + sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
10587 + PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
10588 + sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
10589 + spi_datalen = 8;
10590 + sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
10591 + au_sync();
10592 +
10593 + set_baud_rate(1000000);
10594 +
10595 + sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
10596 + do {
10597 + stat = sp->psc_spistat;
10598 + au_sync();
10599 + } while ((stat & PSC_SPISTAT_DR) == 0);
10600 +
10601 + misc_register(&au1550spi_miscdev);
10602 + printk("Au1550 SPI driver\n");
10603 + return 0;
10604 +}
10605 +
10606 +
10607 +void __exit
10608 +au1550spi_exit(void)
10609 +{
10610 + misc_deregister(&au1550spi_miscdev);
10611 +}
10612 +
10613 +
10614 +module_init(au1550spi_init);
10615 +module_exit(au1550spi_exit);
10616 diff -Nur linux-2.4.29/drivers/char/Config.in linux-mips/drivers/char/Config.in
10617 --- linux-2.4.29/drivers/char/Config.in 2004-08-08 01:26:04.000000000 +0200
10618 +++ linux-mips/drivers/char/Config.in 2005-02-11 22:09:56.000000000 +0100
10619 @@ -313,14 +313,11 @@
10620 if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
10621 bool 'Tadpole ANA H8 Support (OBSOLETE)' CONFIG_H8
10622 fi
10623 -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
10624 - tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
10625 -fi
10626 if [ "$CONFIG_SGI_IP22" = "y" ]; then
10627 - bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
10628 + tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
10629 fi
10630 if [ "$CONFIG_SGI_IP27" = "y" ]; then
10631 - bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
10632 + tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
10633 fi
10634 if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
10635 tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
10636 @@ -383,6 +380,11 @@
10637 source drivers/char/drm/Config.in
10638 fi
10639 fi
10640 +
10641 +if [ "$CONFIG_X86" = "y" ]; then
10642 + tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
10643 +fi
10644 +
10645 endmenu
10646
10647 if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
10648 @@ -391,6 +393,7 @@
10649 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
10650 tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
10651 tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
10652 + #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
10653 fi
10654 if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
10655 tristate ' ITE GPIO' CONFIG_ITE_GPIO
10656 diff -Nur linux-2.4.29/drivers/char/decserial.c linux-mips/drivers/char/decserial.c
10657 --- linux-2.4.29/drivers/char/decserial.c 2003-08-25 13:44:41.000000000 +0200
10658 +++ linux-mips/drivers/char/decserial.c 2004-09-28 02:53:01.000000000 +0200
10659 @@ -3,95 +3,105 @@
10660 * choose the right serial device at boot time
10661 *
10662 * triemer 6-SEP-1998
10663 - * sercons.c is designed to allow the three different kinds
10664 + * sercons.c is designed to allow the three different kinds
10665 * of serial devices under the decstation world to co-exist
10666 - * in the same kernel. The idea here is to abstract
10667 + * in the same kernel. The idea here is to abstract
10668 * the pieces of the drivers that are common to this file
10669 * so that they do not clash at compile time and runtime.
10670 *
10671 * HK 16-SEP-1998 v0.002
10672 * removed the PROM console as this is not a real serial
10673 * device. Added support for PROM console in drivers/char/tty_io.c
10674 - * instead. Although it may work to enable more than one
10675 + * instead. Although it may work to enable more than one
10676 * console device I strongly recommend to use only one.
10677 + *
10678 + * Copyright (C) 2004 Maciej W. Rozycki
10679 */
10680
10681 #include <linux/config.h>
10682 +#include <linux/errno.h>
10683 #include <linux/init.h>
10684 +
10685 #include <asm/dec/machtype.h>
10686 +#include <asm/dec/serial.h>
10687 +
10688 +extern int register_zs_hook(unsigned int channel,
10689 + struct dec_serial_hook *hook);
10690 +extern int unregister_zs_hook(unsigned int channel);
10691 +
10692 +extern int register_dz_hook(unsigned int channel,
10693 + struct dec_serial_hook *hook);
10694 +extern int unregister_dz_hook(unsigned int channel);
10695
10696 +int register_dec_serial_hook(unsigned int channel,
10697 + struct dec_serial_hook *hook)
10698 +{
10699 #ifdef CONFIG_ZS
10700 -extern int zs_init(void);
10701 + if (IOASIC)
10702 + return register_zs_hook(channel, hook);
10703 #endif
10704 -
10705 #ifdef CONFIG_DZ
10706 -extern int dz_init(void);
10707 + if (!IOASIC)
10708 + return register_dz_hook(channel, hook);
10709 #endif
10710 + return 0;
10711 +}
10712
10713 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
10714 -
10715 +int unregister_dec_serial_hook(unsigned int channel)
10716 +{
10717 #ifdef CONFIG_ZS
10718 -extern void zs_serial_console_init(void);
10719 + if (IOASIC)
10720 + return unregister_zs_hook(channel);
10721 #endif
10722 -
10723 #ifdef CONFIG_DZ
10724 -extern void dz_serial_console_init(void);
10725 -#endif
10726 -
10727 + if (!IOASIC)
10728 + return unregister_dz_hook(channel);
10729 #endif
10730 + return 0;
10731 +}
10732
10733 -/* rs_init - starts up the serial interface -
10734 - handle normal case of starting up the serial interface */
10735
10736 -#ifdef CONFIG_SERIAL_DEC
10737 +extern int zs_init(void);
10738 +extern int dz_init(void);
10739
10740 +/*
10741 + * rs_init - starts up the serial interface -
10742 + * handle normal case of starting up the serial interface
10743 + */
10744 int __init rs_init(void)
10745 {
10746 -
10747 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
10748 - if (IOASIC)
10749 - return zs_init();
10750 - else
10751 - return dz_init();
10752 -#else
10753 -
10754 #ifdef CONFIG_ZS
10755 - return zs_init();
10756 + if (IOASIC)
10757 + return zs_init();
10758 #endif
10759 -
10760 #ifdef CONFIG_DZ
10761 - return dz_init();
10762 -#endif
10763 -
10764 + if (!IOASIC)
10765 + return dz_init();
10766 #endif
10767 + return -ENXIO;
10768 }
10769
10770 __initcall(rs_init);
10771
10772 -#endif
10773
10774 #ifdef CONFIG_SERIAL_DEC_CONSOLE
10775
10776 -/* dec_serial_console_init handles the special case of starting
10777 - * up the console on the serial port
10778 +extern void zs_serial_console_init(void);
10779 +extern void dz_serial_console_init(void);
10780 +
10781 +/*
10782 + * dec_serial_console_init handles the special case of starting
10783 + * up the console on the serial port
10784 */
10785 void __init dec_serial_console_init(void)
10786 {
10787 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
10788 - if (IOASIC)
10789 - zs_serial_console_init();
10790 - else
10791 - dz_serial_console_init();
10792 -#else
10793 -
10794 #ifdef CONFIG_ZS
10795 - zs_serial_console_init();
10796 + if (IOASIC)
10797 + zs_serial_console_init();
10798 #endif
10799 -
10800 #ifdef CONFIG_DZ
10801 - dz_serial_console_init();
10802 -#endif
10803 -
10804 + if (!IOASIC)
10805 + dz_serial_console_init();
10806 #endif
10807 }
10808
10809 diff -Nur linux-2.4.29/drivers/char/ds1286.c linux-mips/drivers/char/ds1286.c
10810 --- linux-2.4.29/drivers/char/ds1286.c 2004-02-18 14:36:31.000000000 +0100
10811 +++ linux-mips/drivers/char/ds1286.c 2004-01-10 06:21:39.000000000 +0100
10812 @@ -1,6 +1,10 @@
10813 /*
10814 * DS1286 Real Time Clock interface for Linux
10815 *
10816 + * Copyright (C) 2003 TimeSys Corp.
10817 + * S. James Hill (James.Hill@timesys.com)
10818 + * (sjhill@realitydiluted.com)
10819 + *
10820 * Copyright (C) 1998, 1999, 2000 Ralf Baechle
10821 *
10822 * Based on code written by Paul Gortmaker.
10823 @@ -29,6 +33,7 @@
10824 #include <linux/types.h>
10825 #include <linux/errno.h>
10826 #include <linux/miscdevice.h>
10827 +#include <linux/module.h>
10828 #include <linux/slab.h>
10829 #include <linux/ioport.h>
10830 #include <linux/fcntl.h>
10831 @@ -95,6 +100,12 @@
10832 return -EIO;
10833 }
10834
10835 +void rtc_ds1286_wait(void)
10836 +{
10837 + unsigned char sec = CMOS_READ(RTC_SECONDS);
10838 + while (sec == CMOS_READ(RTC_SECONDS));
10839 +}
10840 +
10841 static int ds1286_ioctl(struct inode *inode, struct file *file,
10842 unsigned int cmd, unsigned long arg)
10843 {
10844 @@ -249,23 +260,22 @@
10845 {
10846 spin_lock_irq(&ds1286_lock);
10847
10848 - if (ds1286_status & RTC_IS_OPEN)
10849 - goto out_busy;
10850 + if (ds1286_status & RTC_IS_OPEN) {
10851 + spin_unlock_irq(&ds1286_lock);
10852 + return -EBUSY;
10853 + }
10854
10855 ds1286_status |= RTC_IS_OPEN;
10856
10857 - spin_lock_irq(&ds1286_lock);
10858 + spin_unlock_irq(&ds1286_lock);
10859 return 0;
10860 -
10861 -out_busy:
10862 - spin_lock_irq(&ds1286_lock);
10863 - return -EBUSY;
10864 }
10865
10866 static int ds1286_release(struct inode *inode, struct file *file)
10867 {
10868 + spin_lock_irq(&ds1286_lock);
10869 ds1286_status &= ~RTC_IS_OPEN;
10870 -
10871 + spin_unlock_irq(&ds1286_lock);
10872 return 0;
10873 }
10874
10875 @@ -276,32 +286,6 @@
10876 return 0;
10877 }
10878
10879 -/*
10880 - * The various file operations we support.
10881 - */
10882 -
10883 -static struct file_operations ds1286_fops = {
10884 - .llseek = no_llseek,
10885 - .read = ds1286_read,
10886 - .poll = ds1286_poll,
10887 - .ioctl = ds1286_ioctl,
10888 - .open = ds1286_open,
10889 - .release = ds1286_release,
10890 -};
10891 -
10892 -static struct miscdevice ds1286_dev=
10893 -{
10894 - .minor = RTC_MINOR,
10895 - .name = "rtc",
10896 - .fops = &ds1286_fops,
10897 -};
10898 -
10899 -int __init ds1286_init(void)
10900 -{
10901 - printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
10902 - return misc_register(&ds1286_dev);
10903 -}
10904 -
10905 static char *days[] = {
10906 "***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
10907 };
10908 @@ -528,3 +512,38 @@
10909 BCD_TO_BIN(alm_tm->tm_hour);
10910 alm_tm->tm_sec = 0;
10911 }
10912 +
10913 +static struct file_operations ds1286_fops = {
10914 + .owner = THIS_MODULE,
10915 + .llseek = no_llseek,
10916 + .read = ds1286_read,
10917 + .poll = ds1286_poll,
10918 + .ioctl = ds1286_ioctl,
10919 + .open = ds1286_open,
10920 + .release = ds1286_release,
10921 +};
10922 +
10923 +static struct miscdevice ds1286_dev =
10924 +{
10925 + .minor = RTC_MINOR,
10926 + .name = "rtc",
10927 + .fops = &ds1286_fops,
10928 +};
10929 +
10930 +static int __init ds1286_init(void)
10931 +{
10932 + printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
10933 + return misc_register(&ds1286_dev);
10934 +}
10935 +
10936 +static void __exit ds1286_exit(void)
10937 +{
10938 + misc_deregister(&ds1286_dev);
10939 +}
10940 +
10941 +module_init(ds1286_init);
10942 +module_exit(ds1286_exit);
10943 +EXPORT_NO_SYMBOLS;
10944 +
10945 +MODULE_AUTHOR("Ralf Baechle");
10946 +MODULE_LICENSE("GPL");
10947 diff -Nur linux-2.4.29/drivers/char/ds1742.c linux-mips/drivers/char/ds1742.c
10948 --- linux-2.4.29/drivers/char/ds1742.c 2004-02-18 14:36:31.000000000 +0100
10949 +++ linux-mips/drivers/char/ds1742.c 2004-01-09 20:27:16.000000000 +0100
10950 @@ -142,6 +142,7 @@
10951 CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
10952
10953 /* convert */
10954 + memset(&tm, 0, sizeof(struct rtc_time));
10955 to_tm(t, &tm);
10956
10957 /* check each field one by one */
10958 @@ -216,6 +217,7 @@
10959 unsigned long curr_time;
10960
10961 curr_time = rtc_ds1742_get_time();
10962 + memset(&tm, 0, sizeof(struct rtc_time));
10963 to_tm(curr_time, &tm);
10964
10965 p = buf;
10966 @@ -251,8 +253,8 @@
10967
10968 void rtc_ds1742_wait(void)
10969 {
10970 - while (CMOS_READ(RTC_SECONDS) & 1);
10971 - while (!(CMOS_READ(RTC_SECONDS) & 1));
10972 + unsigned char sec = CMOS_READ(RTC_SECONDS);
10973 + while (sec == CMOS_READ(RTC_SECONDS));
10974 }
10975
10976 static int ds1742_ioctl(struct inode *inode, struct file *file,
10977 @@ -264,6 +266,7 @@
10978 switch (cmd) {
10979 case RTC_RD_TIME: /* Read the time/date from RTC */
10980 curr_time = rtc_ds1742_get_time();
10981 + memset(&rtc_tm, 0, sizeof(struct rtc_time));
10982 to_tm(curr_time, &rtc_tm);
10983 rtc_tm.tm_year -= 1900;
10984 return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ?
10985 diff -Nur linux-2.4.29/drivers/char/dummy_keyb.c linux-mips/drivers/char/dummy_keyb.c
10986 --- linux-2.4.29/drivers/char/dummy_keyb.c 2003-08-25 13:44:41.000000000 +0200
10987 +++ linux-mips/drivers/char/dummy_keyb.c 2004-01-09 09:53:08.000000000 +0100
10988 @@ -140,3 +140,7 @@
10989 {
10990 printk("Dummy keyboard driver installed.\n");
10991 }
10992 +#ifdef CONFIG_MAGIC_SYSRQ
10993 +unsigned char kbd_sysrq_key;
10994 +unsigned char kbd_sysrq_xlate[128];
10995 +#endif
10996 diff -Nur linux-2.4.29/drivers/char/dz.c linux-mips/drivers/char/dz.c
10997 --- linux-2.4.29/drivers/char/dz.c 2005-01-19 15:09:44.000000000 +0100
10998 +++ linux-mips/drivers/char/dz.c 2004-12-27 05:13:42.000000000 +0100
10999 @@ -1,11 +1,13 @@
11000 /*
11001 - * dz.c: Serial port driver for DECStations equiped
11002 + * dz.c: Serial port driver for DECstations equipped
11003 * with the DZ chipset.
11004 *
11005 * Copyright (C) 1998 Olivier A. D. Lebaillif
11006 *
11007 * Email: olivier.lebaillif@ifrsys.com
11008 *
11009 + * Copyright (C) 2004 Maciej W. Rozycki
11010 + *
11011 * [31-AUG-98] triemer
11012 * Changed IRQ to use Harald's dec internals interrupts.h
11013 * removed base_addr code - moving address assignment to setup.c
11014 @@ -24,6 +26,7 @@
11015 #undef DEBUG_DZ
11016
11017 #include <linux/config.h>
11018 +#include <linux/delay.h>
11019 #include <linux/version.h>
11020 #include <linux/kernel.h>
11021 #include <linux/sched.h>
11022 @@ -54,33 +57,56 @@
11023 #include <asm/system.h>
11024 #include <asm/uaccess.h>
11025
11026 -#define CONSOLE_LINE (3) /* for definition of struct console */
11027 +#ifdef CONFIG_MAGIC_SYSRQ
11028 +#include <linux/sysrq.h>
11029 +#endif
11030
11031 #include "dz.h"
11032
11033 -#define DZ_INTR_DEBUG 1
11034 -
11035 DECLARE_TASK_QUEUE(tq_serial);
11036
11037 -static struct dz_serial *lines[4];
11038 -static unsigned char tmp_buffer[256];
11039 +static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
11040 +static struct tty_driver serial_driver, callout_driver;
11041 +
11042 +static struct tty_struct *serial_table[DZ_NB_PORT];
11043 +static struct termios *serial_termios[DZ_NB_PORT];
11044 +static struct termios *serial_termios_locked[DZ_NB_PORT];
11045 +
11046 +static int serial_refcount;
11047
11048 -#ifdef DEBUG_DZ
11049 /*
11050 - * debugging code to send out chars via prom
11051 + * tmp_buf is used as a temporary buffer by serial_write. We need to
11052 + * lock it in case the copy_from_user blocks while swapping in a page,
11053 + * and some other program tries to do a serial write at the same time.
11054 + * Since the lock will only come under contention when the system is
11055 + * swapping and available memory is low, it makes sense to share one
11056 + * buffer across all the serial ports, since it significantly saves
11057 + * memory if large numbers of serial ports are open.
11058 */
11059 -static void debug_console(const char *s, int count)
11060 -{
11061 - unsigned i;
11062 +static unsigned char *tmp_buf;
11063 +static DECLARE_MUTEX(tmp_buf_sem);
11064
11065 - for (i = 0; i < count; i++) {
11066 - if (*s == 10)
11067 - prom_printf("%c", 13);
11068 - prom_printf("%c", *s++);
11069 - }
11070 -}
11071 +static char *dz_name __initdata = "DECstation DZ serial driver version ";
11072 +static char *dz_version __initdata = "1.03";
11073 +
11074 +static struct dz_serial *lines[DZ_NB_PORT];
11075 +static unsigned char tmp_buffer[256];
11076 +
11077 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
11078 +static struct console dz_sercons;
11079 +#endif
11080 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
11081 + !defined(MODULE)
11082 +static unsigned long break_pressed; /* break, really ... */
11083 #endif
11084
11085 +static void change_speed (struct dz_serial *);
11086 +
11087 +static int baud_table[] = {
11088 + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
11089 + 9600, 0
11090 +};
11091 +
11092 /*
11093 * ------------------------------------------------------------
11094 * dz_in () and dz_out ()
11095 @@ -94,15 +120,16 @@
11096 {
11097 volatile unsigned short *addr =
11098 (volatile unsigned short *) (info->port + offset);
11099 +
11100 return *addr;
11101 }
11102
11103 static inline void dz_out(struct dz_serial *info, unsigned offset,
11104 unsigned short value)
11105 {
11106 -
11107 volatile unsigned short *addr =
11108 (volatile unsigned short *) (info->port + offset);
11109 +
11110 *addr = value;
11111 }
11112
11113 @@ -143,25 +170,24 @@
11114
11115 tmp |= mask; /* set the TX flag */
11116 dz_out(info, DZ_TCR, tmp);
11117 -
11118 }
11119
11120 /*
11121 * ------------------------------------------------------------
11122 - * Here starts the interrupt handling routines. All of the
11123 - * following subroutines are declared as inline and are folded
11124 - * into dz_interrupt. They were separated out for readability's
11125 - * sake.
11126 *
11127 - * Note: rs_interrupt() is a "fast" interrupt, which means that it
11128 + * Here starts the interrupt handling routines. All of the following
11129 + * subroutines are declared as inline and are folded into
11130 + * dz_interrupt(). They were separated out for readability's sake.
11131 + *
11132 + * Note: dz_interrupt() is a "fast" interrupt, which means that it
11133 * runs with interrupts turned off. People who may want to modify
11134 - * rs_interrupt() should try to keep the interrupt handler as fast as
11135 + * dz_interrupt() should try to keep the interrupt handler as fast as
11136 * possible. After you are done making modifications, it is not a bad
11137 * idea to do:
11138 *
11139 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
11140 *
11141 - * and look at the resulting assemble code in serial.s.
11142 + * and look at the resulting assemble code in dz.s.
11143 *
11144 * ------------------------------------------------------------
11145 */
11146 @@ -188,101 +214,97 @@
11147 * This routine deals with inputs from any lines.
11148 * ------------------------------------------------------------
11149 */
11150 -static inline void receive_chars(struct dz_serial *info_in)
11151 +static inline void receive_chars(struct dz_serial *info_in,
11152 + struct pt_regs *regs)
11153 {
11154 -
11155 struct dz_serial *info;
11156 - struct tty_struct *tty = 0;
11157 + struct tty_struct *tty;
11158 struct async_icount *icount;
11159 - int ignore = 0;
11160 - unsigned short status, tmp;
11161 - unsigned char ch;
11162 -
11163 - /* this code is going to be a problem...
11164 - the call to tty_flip_buffer is going to need
11165 - to be rethought...
11166 - */
11167 - do {
11168 - status = dz_in(info_in, DZ_RBUF);
11169 - info = lines[LINE(status)];
11170 + int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
11171 + unsigned short status;
11172 + unsigned char ch, flag;
11173 + int i;
11174
11175 - /* punt so we don't get duplicate characters */
11176 - if (!(status & DZ_DVAL))
11177 - goto ignore_char;
11178 -
11179 - ch = UCHAR(status); /* grab the char */
11180 -
11181 -#if 0
11182 - if (info->is_console) {
11183 - if (ch == 0)
11184 - return; /* it's a break ... */
11185 - }
11186 -#endif
11187 + while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
11188 + info = lines[LINE(status)];
11189 + tty = info->tty; /* point to the proper dev */
11190
11191 - tty = info->tty; /* now tty points to the proper dev */
11192 - icount = &info->icount;
11193 + ch = UCHAR(status); /* grab the char */
11194
11195 - if (!tty)
11196 - break;
11197 - if (tty->flip.count >= TTY_FLIPBUF_SIZE)
11198 - break;
11199 + if (!tty && (!info->hook || !info->hook->rx_char))
11200 + continue;
11201
11202 - *tty->flip.char_buf_ptr = ch;
11203 - *tty->flip.flag_buf_ptr = 0;
11204 + icount = &info->icount;
11205 icount->rx++;
11206
11207 - /* keep track of the statistics */
11208 - if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
11209 - if (status & DZ_PERR) /* parity error */
11210 - icount->parity++;
11211 - else if (status & DZ_FERR) /* frame error */
11212 - icount->frame++;
11213 - if (status & DZ_OERR) /* overrun error */
11214 - icount->overrun++;
11215 -
11216 - /* check to see if we should ignore the character
11217 - and mask off conditions that should be ignored
11218 + flag = 0;
11219 + if (status & DZ_FERR) { /* frame error */
11220 + /*
11221 + * There is no separate BREAK status bit, so
11222 + * treat framing errors as BREAKs for Magic SysRq
11223 + * and SAK; normally, otherwise.
11224 */
11225 -
11226 - if (status & info->ignore_status_mask) {
11227 - if (++ignore > 100)
11228 - break;
11229 - goto ignore_char;
11230 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
11231 + !defined(MODULE)
11232 + if (info->line == dz_sercons.index) {
11233 + if (!break_pressed)
11234 + break_pressed = jiffies;
11235 + continue;
11236 }
11237 - /* mask off the error conditions we want to ignore */
11238 - tmp = status & info->read_status_mask;
11239 -
11240 - if (tmp & DZ_PERR) {
11241 - *tty->flip.flag_buf_ptr = TTY_PARITY;
11242 -#ifdef DEBUG_DZ
11243 - debug_console("PERR\n", 5);
11244 -#endif
11245 - } else if (tmp & DZ_FERR) {
11246 - *tty->flip.flag_buf_ptr = TTY_FRAME;
11247 -#ifdef DEBUG_DZ
11248 - debug_console("FERR\n", 5);
11249 #endif
11250 + flag = TTY_BREAK;
11251 + if (info->flags & DZ_SAK)
11252 + do_SAK(tty);
11253 + else
11254 + flag = TTY_FRAME;
11255 + } else if (status & DZ_OERR) /* overrun error */
11256 + flag = TTY_OVERRUN;
11257 + else if (status & DZ_PERR) /* parity error */
11258 + flag = TTY_PARITY;
11259 +
11260 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
11261 + !defined(MODULE)
11262 + if (break_pressed && info->line == dz_sercons.index) {
11263 + if (time_before(jiffies, break_pressed + HZ * 5)) {
11264 + handle_sysrq(ch, regs, NULL, NULL);
11265 + break_pressed = 0;
11266 + continue;
11267 }
11268 - if (tmp & DZ_OERR) {
11269 -#ifdef DEBUG_DZ
11270 - debug_console("OERR\n", 5);
11271 + break_pressed = 0;
11272 + }
11273 #endif
11274 - if (tty->flip.count < TTY_FLIPBUF_SIZE) {
11275 - tty->flip.count++;
11276 - tty->flip.flag_buf_ptr++;
11277 - tty->flip.char_buf_ptr++;
11278 - *tty->flip.flag_buf_ptr = TTY_OVERRUN;
11279 - }
11280 - }
11281 +
11282 + if (info->hook && info->hook->rx_char) {
11283 + (*info->hook->rx_char)(ch, flag);
11284 + return;
11285 }
11286 - tty->flip.flag_buf_ptr++;
11287 - tty->flip.char_buf_ptr++;
11288 - tty->flip.count++;
11289 - ignore_char:
11290 - } while (status & DZ_DVAL);
11291
11292 - if (tty)
11293 - tty_flip_buffer_push(tty);
11294 + /* keep track of the statistics */
11295 + switch (flag) {
11296 + case TTY_FRAME:
11297 + icount->frame++;
11298 + break;
11299 + case TTY_PARITY:
11300 + icount->parity++;
11301 + break;
11302 + case TTY_OVERRUN:
11303 + icount->overrun++;
11304 + break;
11305 + case TTY_BREAK:
11306 + icount->brk++;
11307 + break;
11308 + default:
11309 + break;
11310 + }
11311 +
11312 + if ((status & info->ignore_status_mask) == 0) {
11313 + tty_insert_flip_char(tty, ch, flag);
11314 + lines_rx[LINE(status)] = 1;
11315 + }
11316 + }
11317 + for (i = 0; i < DZ_NB_PORT; i++)
11318 + if (lines_rx[i])
11319 + tty_flip_buffer_push(lines[i]->tty);
11320 }
11321
11322 /*
11323 @@ -292,20 +314,34 @@
11324 * This routine deals with outputs to any lines.
11325 * ------------------------------------------------------------
11326 */
11327 -static inline void transmit_chars(struct dz_serial *info)
11328 +static inline void transmit_chars(struct dz_serial *info_in)
11329 {
11330 + struct dz_serial *info;
11331 + unsigned short status;
11332 unsigned char tmp;
11333
11334 + status = dz_in(info_in, DZ_CSR);
11335 + info = lines[LINE(status)];
11336
11337 + if (info->hook || !info->tty) {
11338 + unsigned short mask, tmp;
11339
11340 - if (info->x_char) { /* XON/XOFF chars */
11341 + mask = 1 << info->line;
11342 + tmp = dz_in(info, DZ_TCR); /* read the TX flag */
11343 + tmp &= ~mask; /* clear the TX flag */
11344 + dz_out(info, DZ_TCR, tmp);
11345 + return;
11346 + }
11347 +
11348 + if (info->x_char) { /* XON/XOFF chars */
11349 dz_out(info, DZ_TDR, info->x_char);
11350 info->icount.tx++;
11351 info->x_char = 0;
11352 return;
11353 }
11354 /* if nothing to do or stopped or hardware stopped */
11355 - if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
11356 + if (info->xmit_cnt <= 0 ||
11357 + info->tty->stopped || info->tty->hw_stopped) {
11358 dz_stop(info->tty);
11359 return;
11360 }
11361 @@ -359,15 +395,14 @@
11362 */
11363 static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
11364 {
11365 - struct dz_serial *info;
11366 + struct dz_serial *info = (struct dz_serial *)dev;
11367 unsigned short status;
11368
11369 /* get the reason why we just got an irq */
11370 - status = dz_in((struct dz_serial *) dev, DZ_CSR);
11371 - info = lines[LINE(status)]; /* re-arrange info the proper port */
11372 + status = dz_in(info, DZ_CSR);
11373
11374 if (status & DZ_RDONE)
11375 - receive_chars(info); /* the receive function */
11376 + receive_chars(info, regs);
11377
11378 if (status & DZ_TRDY)
11379 transmit_chars(info);
11380 @@ -514,7 +549,7 @@
11381
11382
11383 info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
11384 - dz_out(info, DZ_LPR, info->cflags);
11385 + dz_out(info, DZ_LPR, info->cflags | info->line);
11386
11387 if (info->xmit_buf) { /* free Tx buffer */
11388 free_page((unsigned long) info->xmit_buf);
11389 @@ -545,18 +580,21 @@
11390 {
11391 unsigned long flags;
11392 unsigned cflag;
11393 - int baud;
11394 + int baud, i;
11395
11396 - if (!info->tty || !info->tty->termios)
11397 - return;
11398 + if (!info->hook) {
11399 + if (!info->tty || !info->tty->termios)
11400 + return;
11401 + cflag = info->tty->termios->c_cflag;
11402 + } else {
11403 + cflag = info->hook->cflags;
11404 + }
11405
11406 save_flags(flags);
11407 cli();
11408
11409 info->cflags = info->line;
11410
11411 - cflag = info->tty->termios->c_cflag;
11412 -
11413 switch (cflag & CSIZE) {
11414 case CS5:
11415 info->cflags |= DZ_CS5;
11416 @@ -579,7 +617,16 @@
11417 if (cflag & PARODD)
11418 info->cflags |= DZ_PARODD;
11419
11420 - baud = tty_get_baud_rate(info->tty);
11421 + i = cflag & CBAUD;
11422 + if (i & CBAUDEX) {
11423 + i &= ~CBAUDEX;
11424 + if (!info->hook)
11425 + info->tty->termios->c_cflag &= ~CBAUDEX;
11426 + else
11427 + info->hook->cflags &= ~CBAUDEX;
11428 + }
11429 + baud = baud_table[i];
11430 +
11431 switch (baud) {
11432 case 50:
11433 info->cflags |= DZ_B50;
11434 @@ -629,16 +676,16 @@
11435 }
11436
11437 info->cflags |= DZ_RXENAB;
11438 - dz_out(info, DZ_LPR, info->cflags);
11439 + dz_out(info, DZ_LPR, info->cflags | info->line);
11440
11441 /* setup accept flag */
11442 info->read_status_mask = DZ_OERR;
11443 - if (I_INPCK(info->tty))
11444 + if (info->tty && I_INPCK(info->tty))
11445 info->read_status_mask |= (DZ_FERR | DZ_PERR);
11446
11447 /* characters to ignore */
11448 info->ignore_status_mask = 0;
11449 - if (I_IGNPAR(info->tty))
11450 + if (info->tty && I_IGNPAR(info->tty))
11451 info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
11452
11453 restore_flags(flags);
11454 @@ -694,7 +741,7 @@
11455
11456 down(&tmp_buf_sem);
11457 while (1) {
11458 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11459 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11460 if (c <= 0)
11461 break;
11462
11463 @@ -707,7 +754,7 @@
11464 save_flags(flags);
11465 cli();
11466
11467 - c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11468 + c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11469 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
11470 info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
11471 info->xmit_cnt += c;
11472 @@ -727,7 +774,7 @@
11473 save_flags(flags);
11474 cli();
11475
11476 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11477 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11478 if (c <= 0) {
11479 restore_flags(flags);
11480 break;
11481 @@ -845,7 +892,7 @@
11482
11483 /*
11484 * ------------------------------------------------------------
11485 - * rs_ioctl () and friends
11486 + * dz_ioctl () and friends
11487 * ------------------------------------------------------------
11488 */
11489 static int get_serial_info(struct dz_serial *info,
11490 @@ -958,6 +1005,9 @@
11491 struct dz_serial *info = (struct dz_serial *) tty->driver_data;
11492 int retval;
11493
11494 + if (info->hook)
11495 + return -ENODEV;
11496 +
11497 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
11498 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
11499 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
11500 @@ -1252,19 +1302,14 @@
11501 int retval, line;
11502
11503 line = MINOR(tty->device) - tty->driver.minor_start;
11504 -
11505 - /* The dz lines for the mouse/keyboard must be
11506 - * opened using their respective drivers.
11507 - */
11508 if ((line < 0) || (line >= DZ_NB_PORT))
11509 return -ENODEV;
11510 + info = lines[line];
11511
11512 - if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
11513 + if (info->hook)
11514 return -ENODEV;
11515
11516 - info = lines[line];
11517 info->count++;
11518 -
11519 tty->driver_data = info;
11520 info->tty = tty;
11521
11522 @@ -1285,14 +1330,21 @@
11523 else
11524 *tty->termios = info->callout_termios;
11525 change_speed(info);
11526 -
11527 }
11528 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
11529 + if (dz_sercons.cflag && dz_sercons.index == line) {
11530 + tty->termios->c_cflag = dz_sercons.cflag;
11531 + dz_sercons.cflag = 0;
11532 + change_speed(info);
11533 + }
11534 +#endif
11535 +
11536 info->session = current->session;
11537 info->pgrp = current->pgrp;
11538 return 0;
11539 }
11540
11541 -static void show_serial_version(void)
11542 +static void __init show_serial_version(void)
11543 {
11544 printk("%s%s\n", dz_name, dz_version);
11545 }
11546 @@ -1300,7 +1352,6 @@
11547 int __init dz_init(void)
11548 {
11549 int i;
11550 - long flags;
11551 struct dz_serial *info;
11552
11553 /* Setup base handler, and timer table. */
11554 @@ -1311,9 +1362,9 @@
11555 memset(&serial_driver, 0, sizeof(struct tty_driver));
11556 serial_driver.magic = TTY_DRIVER_MAGIC;
11557 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
11558 - serial_driver.name = "ttyS";
11559 -#else
11560 serial_driver.name = "tts/%d";
11561 +#else
11562 + serial_driver.name = "ttyS";
11563 #endif
11564 serial_driver.major = TTY_MAJOR;
11565 serial_driver.minor_start = 64;
11566 @@ -1352,9 +1403,9 @@
11567 */
11568 callout_driver = serial_driver;
11569 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
11570 - callout_driver.name = "cua";
11571 -#else
11572 callout_driver.name = "cua/%d";
11573 +#else
11574 + callout_driver.name = "cua";
11575 #endif
11576 callout_driver.major = TTYAUX_MAJOR;
11577 callout_driver.subtype = SERIAL_TYPE_CALLOUT;
11578 @@ -1363,25 +1414,27 @@
11579 panic("Couldn't register serial driver");
11580 if (tty_register_driver(&callout_driver))
11581 panic("Couldn't register callout driver");
11582 - save_flags(flags);
11583 - cli();
11584
11585 for (i = 0; i < DZ_NB_PORT; i++) {
11586 info = &multi[i];
11587 lines[i] = info;
11588 - info->magic = SERIAL_MAGIC;
11589 -
11590 + info->tty = 0;
11591 + info->x_char = 0;
11592 if (mips_machtype == MACH_DS23100 ||
11593 mips_machtype == MACH_DS5100)
11594 info->port = (unsigned long) KN01_DZ11_BASE;
11595 else
11596 info->port = (unsigned long) KN02_DZ11_BASE;
11597 -
11598 info->line = i;
11599 - info->tty = 0;
11600 +
11601 + if (info->hook && info->hook->init_info) {
11602 + (*info->hook->init_info)(info);
11603 + continue;
11604 + }
11605 +
11606 + info->magic = SERIAL_MAGIC;
11607 info->close_delay = 50;
11608 info->closing_wait = 3000;
11609 - info->x_char = 0;
11610 info->event = 0;
11611 info->count = 0;
11612 info->blocked_open = 0;
11613 @@ -1393,25 +1446,16 @@
11614 info->normal_termios = serial_driver.init_termios;
11615 init_waitqueue_head(&info->open_wait);
11616 init_waitqueue_head(&info->close_wait);
11617 -
11618 - /*
11619 - * If we are pointing to address zero then punt - not correctly
11620 - * set up in setup.c to handle this.
11621 - */
11622 - if (!info->port)
11623 - return 0;
11624 -
11625 - printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
11626 - info->port, dec_interrupt[DEC_IRQ_DZ11]);
11627 -
11628 + printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
11629 + info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
11630 tty_register_devfs(&serial_driver, 0,
11631 - serial_driver.minor_start + info->line);
11632 + serial_driver.minor_start + info->line);
11633 tty_register_devfs(&callout_driver, 0,
11634 - callout_driver.minor_start + info->line);
11635 + callout_driver.minor_start + info->line);
11636 }
11637
11638 - /* reset the chip */
11639 #ifndef CONFIG_SERIAL_DEC_CONSOLE
11640 + /* reset the chip */
11641 dz_out(info, DZ_CSR, DZ_CLR);
11642 while (dz_in(info, DZ_CSR) & DZ_CLR);
11643 iob();
11644 @@ -1420,43 +1464,104 @@
11645 dz_out(info, DZ_CSR, DZ_MSE);
11646 #endif
11647
11648 - /* order matters here... the trick is that flags
11649 - is updated... in request_irq - to immediatedly obliterate
11650 - it is unwise. */
11651 - restore_flags(flags);
11652 -
11653 -
11654 if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
11655 - SA_INTERRUPT, "DZ", lines[0]))
11656 + 0, "DZ", lines[0]))
11657 panic("Unable to register DZ interrupt");
11658
11659 + for (i = 0; i < DZ_NB_PORT; i++)
11660 + if (lines[i]->hook) {
11661 + startup(lines[i]);
11662 + if (lines[i]->hook->init_channel)
11663 + (*lines[i]->hook->init_channel)(lines[i]);
11664 + }
11665 +
11666 return 0;
11667 }
11668
11669 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
11670 -static void dz_console_put_char(unsigned char ch)
11671 +/*
11672 + * polling I/O routines
11673 + */
11674 +static int dz_poll_tx_char(void *handle, unsigned char ch)
11675 {
11676 unsigned long flags;
11677 - int loops = 2500;
11678 - unsigned short tmp = ch;
11679 - /* this code sends stuff out to serial device - spinning its
11680 - wheels and waiting. */
11681 + struct dz_serial *info = handle;
11682 + unsigned short csr, tcr, trdy, mask;
11683 + int loops = 10000;
11684 + int ret;
11685
11686 - /* force the issue - point it at lines[3] */
11687 - dz_console = &multi[CONSOLE_LINE];
11688 + local_irq_save(flags);
11689 + csr = dz_in(info, DZ_CSR);
11690 + dz_out(info, DZ_CSR, csr & ~DZ_TIE);
11691 + tcr = dz_in(info, DZ_TCR);
11692 + tcr |= 1 << info->line;
11693 + mask = tcr;
11694 + dz_out(info, DZ_TCR, mask);
11695 + iob();
11696 + local_irq_restore(flags);
11697
11698 - save_flags(flags);
11699 - cli();
11700 + while (loops--) {
11701 + trdy = dz_in(info, DZ_CSR);
11702 + if (!(trdy & DZ_TRDY))
11703 + continue;
11704 + trdy = (trdy & DZ_TLINE) >> 8;
11705 + if (trdy == info->line)
11706 + break;
11707 + mask &= ~(1 << trdy);
11708 + dz_out(info, DZ_TCR, mask);
11709 + iob();
11710 + udelay(2);
11711 + }
11712
11713 + if (loops) {
11714 + dz_out(info, DZ_TDR, ch);
11715 + ret = 0;
11716 + } else
11717 + ret = -EAGAIN;
11718
11719 - /* spin our wheels */
11720 - while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
11721 + dz_out(info, DZ_TCR, tcr);
11722 + dz_out(info, DZ_CSR, csr);
11723
11724 - /* Actually transmit the character. */
11725 - dz_out(dz_console, DZ_TDR, tmp);
11726 + return ret;
11727 +}
11728
11729 - restore_flags(flags);
11730 +static int dz_poll_rx_char(void *handle)
11731 +{
11732 + return -ENODEV;
11733 +}
11734 +
11735 +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
11736 +{
11737 + struct dz_serial *info = multi + channel;
11738 +
11739 + if (info->hook) {
11740 + printk("%s: line %d has already a hook registered\n",
11741 + __FUNCTION__, channel);
11742 +
11743 + return 0;
11744 + } else {
11745 + hook->poll_rx_char = dz_poll_rx_char;
11746 + hook->poll_tx_char = dz_poll_tx_char;
11747 + info->hook = hook;
11748 +
11749 + return 1;
11750 + }
11751 +}
11752 +
11753 +int unregister_dz_hook(unsigned int channel)
11754 +{
11755 + struct dz_serial *info = &multi[channel];
11756 +
11757 + if (info->hook) {
11758 + info->hook = NULL;
11759 + return 1;
11760 + } else {
11761 + printk("%s: trying to unregister hook on line %d,"
11762 + " but none is registered\n", __FUNCTION__, channel);
11763 + return 0;
11764 + }
11765 }
11766 +
11767 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
11768 /*
11769 * -------------------------------------------------------------------
11770 * dz_console_print ()
11771 @@ -1465,17 +1570,19 @@
11772 * The console must be locked when we get here.
11773 * -------------------------------------------------------------------
11774 */
11775 -static void dz_console_print(struct console *cons,
11776 +static void dz_console_print(struct console *co,
11777 const char *str,
11778 unsigned int count)
11779 {
11780 + struct dz_serial *info = multi + co->index;
11781 +
11782 #ifdef DEBUG_DZ
11783 prom_printf((char *) str);
11784 #endif
11785 while (count--) {
11786 if (*str == '\n')
11787 - dz_console_put_char('\r');
11788 - dz_console_put_char(*str++);
11789 + dz_poll_tx_char(info, '\r');
11790 + dz_poll_tx_char(info, *str++);
11791 }
11792 }
11793
11794 @@ -1486,12 +1593,12 @@
11795
11796 static int __init dz_console_setup(struct console *co, char *options)
11797 {
11798 + struct dz_serial *info = multi + co->index;
11799 int baud = 9600;
11800 int bits = 8;
11801 int parity = 'n';
11802 int cflag = CREAD | HUPCL | CLOCAL;
11803 char *s;
11804 - unsigned short mask, tmp;
11805
11806 if (options) {
11807 baud = simple_strtoul(options, NULL, 10);
11808 @@ -1542,44 +1649,31 @@
11809 }
11810 co->cflag = cflag;
11811
11812 - /* TOFIX: force to console line */
11813 - dz_console = &multi[CONSOLE_LINE];
11814 if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
11815 - dz_console->port = KN01_DZ11_BASE;
11816 + info->port = KN01_DZ11_BASE;
11817 else
11818 - dz_console->port = KN02_DZ11_BASE;
11819 - dz_console->line = CONSOLE_LINE;
11820 + info->port = KN02_DZ11_BASE;
11821 + info->line = co->index;
11822
11823 - dz_out(dz_console, DZ_CSR, DZ_CLR);
11824 - while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
11825 + dz_out(info, DZ_CSR, DZ_CLR);
11826 + while (dz_in(info, DZ_CSR) & DZ_CLR);
11827
11828 /* enable scanning */
11829 - dz_out(dz_console, DZ_CSR, DZ_MSE);
11830 + dz_out(info, DZ_CSR, DZ_MSE);
11831
11832 /* Set up flags... */
11833 - dz_console->cflags = 0;
11834 - dz_console->cflags |= DZ_B9600;
11835 - dz_console->cflags |= DZ_CS8;
11836 - dz_console->cflags |= DZ_PARENB;
11837 - dz_out(dz_console, DZ_LPR, dz_console->cflags);
11838 -
11839 - mask = 1 << dz_console->line;
11840 - tmp = dz_in(dz_console, DZ_TCR); /* read the TX flag */
11841 - if (!(tmp & mask)) {
11842 - tmp |= mask; /* set the TX flag */
11843 - dz_out(dz_console, DZ_TCR, tmp);
11844 - }
11845 + dz_out(info, DZ_LPR, cflag | info->line);
11846 +
11847 return 0;
11848 }
11849
11850 -static struct console dz_sercons =
11851 -{
11852 - .name = "ttyS",
11853 - .write = dz_console_print,
11854 - .device = dz_console_device,
11855 - .setup = dz_console_setup,
11856 - .flags = CON_CONSDEV | CON_PRINTBUFFER,
11857 - .index = CONSOLE_LINE,
11858 +static struct console dz_sercons = {
11859 + .name = "ttyS",
11860 + .write = dz_console_print,
11861 + .device = dz_console_device,
11862 + .setup = dz_console_setup,
11863 + .flags = CON_PRINTBUFFER,
11864 + .index = -1,
11865 };
11866
11867 void __init dz_serial_console_init(void)
11868 diff -Nur linux-2.4.29/drivers/char/dz.h linux-mips/drivers/char/dz.h
11869 --- linux-2.4.29/drivers/char/dz.h 2002-08-03 02:39:43.000000000 +0200
11870 +++ linux-mips/drivers/char/dz.h 2004-09-28 02:53:01.000000000 +0200
11871 @@ -10,6 +10,8 @@
11872 #ifndef DZ_SERIAL_H
11873 #define DZ_SERIAL_H
11874
11875 +#include <asm/dec/serial.h>
11876 +
11877 #define SERIAL_MAGIC 0x5301
11878
11879 /*
11880 @@ -17,6 +19,7 @@
11881 */
11882 #define DZ_TRDY 0x8000 /* Transmitter empty */
11883 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
11884 +#define DZ_TLINE 0x0300 /* Transmitter Line Number */
11885 #define DZ_RDONE 0x0080 /* Receiver data ready */
11886 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
11887 #define DZ_MSE 0x0020 /* Master Scan Enable */
11888 @@ -37,19 +40,30 @@
11889 #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
11890
11891 /*
11892 - * Definitions for the Transmit Register.
11893 + * Definitions for the Transmit Control Register.
11894 */
11895 #define DZ_LINE_KEYBOARD 0x0001
11896 #define DZ_LINE_MOUSE 0x0002
11897 #define DZ_LINE_MODEM 0x0004
11898 #define DZ_LINE_PRINTER 0x0008
11899
11900 +#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
11901 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
11902 +#define DZ_PRINT_RTS 0x0200 /* RTS for the printer line (3) */
11903 +#define DZ_PRINT_DTR 0x0100 /* DTR for the printer line (3) */
11904 +#define DZ_LNENB 0x000f /* Transmitter Line Enable */
11905
11906 /*
11907 * Definitions for the Modem Status Register.
11908 */
11909 +#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
11910 +#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
11911 #define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
11912 +#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
11913 +#define DZ_PRINT_RI 0x0008 /* RI for the printer line (2) */
11914 +#define DZ_PRINT_CD 0x0004 /* CD for the printer line (2) */
11915 +#define DZ_PRINT_DSR 0x0002 /* DSR for the printer line (2) */
11916 +#define DZ_PRINT_CTS 0x0001 /* CTS for the printer line (2) */
11917
11918 /*
11919 * Definitions for the Transmit Data Register.
11920 @@ -115,9 +129,6 @@
11921
11922 #define DZ_EVENT_WRITE_WAKEUP 0
11923
11924 -#ifndef MIN
11925 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
11926 -
11927 #define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
11928 #define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
11929 #define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
11930 @@ -129,6 +140,7 @@
11931 #define DZ_CLOSING_WAIT_INF 0
11932 #define DZ_CLOSING_WAIT_NONE 65535
11933
11934 +#define DZ_SAK 0x0004 /* Secure Attention Key (Orange book) */
11935 #define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
11936 #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
11937 #define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
11938 @@ -166,79 +178,9 @@
11939 long session; /* Session of opening process */
11940 long pgrp; /* pgrp of opening process */
11941
11942 + struct dec_serial_hook *hook; /* Hook on this channel. */
11943 unsigned char is_console; /* flag indicating a serial console */
11944 unsigned char is_initialized;
11945 };
11946
11947 -static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
11948 -static struct dz_serial *dz_console;
11949 -static struct tty_driver serial_driver, callout_driver;
11950 -
11951 -static struct tty_struct *serial_table[DZ_NB_PORT];
11952 -static struct termios *serial_termios[DZ_NB_PORT];
11953 -static struct termios *serial_termios_locked[DZ_NB_PORT];
11954 -
11955 -static int serial_refcount;
11956 -
11957 -/*
11958 - * tmp_buf is used as a temporary buffer by serial_write. We need to
11959 - * lock it in case the copy_from_user blocks while swapping in a page,
11960 - * and some other program tries to do a serial write at the same time.
11961 - * Since the lock will only come under contention when the system is
11962 - * swapping and available memory is low, it makes sense to share one
11963 - * buffer across all the serial ports, since it significantly saves
11964 - * memory if large numbers of serial ports are open.
11965 - */
11966 -static unsigned char *tmp_buf;
11967 -static DECLARE_MUTEX(tmp_buf_sem);
11968 -
11969 -static char *dz_name = "DECstation DZ serial driver version ";
11970 -static char *dz_version = "1.02";
11971 -
11972 -static inline unsigned short dz_in (struct dz_serial *, unsigned);
11973 -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
11974 -
11975 -static inline void dz_sched_event (struct dz_serial *, int);
11976 -static inline void receive_chars (struct dz_serial *);
11977 -static inline void transmit_chars (struct dz_serial *);
11978 -static inline void check_modem_status (struct dz_serial *);
11979 -
11980 -static void dz_stop (struct tty_struct *);
11981 -static void dz_start (struct tty_struct *);
11982 -static void dz_interrupt (int, void *, struct pt_regs *);
11983 -static void do_serial_bh (void);
11984 -static void do_softint (void *);
11985 -static void do_serial_hangup (void *);
11986 -static void change_speed (struct dz_serial *);
11987 -static void dz_flush_chars (struct tty_struct *);
11988 -static void dz_console_print (struct console *, const char *, unsigned int);
11989 -static void dz_flush_buffer (struct tty_struct *);
11990 -static void dz_throttle (struct tty_struct *);
11991 -static void dz_unthrottle (struct tty_struct *);
11992 -static void dz_send_xchar (struct tty_struct *, char);
11993 -static void shutdown (struct dz_serial *);
11994 -static void send_break (struct dz_serial *, int);
11995 -static void dz_set_termios (struct tty_struct *, struct termios *);
11996 -static void dz_close (struct tty_struct *, struct file *);
11997 -static void dz_hangup (struct tty_struct *);
11998 -static void show_serial_version (void);
11999 -
12000 -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
12001 -static int dz_write_room (struct tty_struct *);
12002 -static int dz_chars_in_buffer (struct tty_struct *);
12003 -static int startup (struct dz_serial *);
12004 -static int get_serial_info (struct dz_serial *, struct serial_struct *);
12005 -static int set_serial_info (struct dz_serial *, struct serial_struct *);
12006 -static int get_lsr_info (struct dz_serial *, unsigned int *);
12007 -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
12008 -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
12009 -static int dz_open (struct tty_struct *, struct file *);
12010 -
12011 -#ifdef MODULE
12012 -int init_module (void)
12013 -void cleanup_module (void)
12014 -#endif
12015 -
12016 -#endif
12017 -
12018 #endif /* DZ_SERIAL_H */
12019 diff -Nur linux-2.4.29/drivers/char/ibm_workpad_keymap.map linux-mips/drivers/char/ibm_workpad_keymap.map
12020 --- linux-2.4.29/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
12021 +++ linux-mips/drivers/char/ibm_workpad_keymap.map 2003-12-20 15:20:44.000000000 +0100
12022 @@ -0,0 +1,343 @@
12023 +# Keymap for IBM Workpad z50
12024 +# US Mapping
12025 +#
12026 +# by Michael Klar <wyldfier@iname.com>
12027 +#
12028 +# This is a great big mess on account of how the Caps Lock key is handled as
12029 +# LeftShift-RightShift. Right shift key had to be broken out, so don't use
12030 +# use this map file as a basis for other keyboards that don't do the same
12031 +# thing with Caps Lock.
12032 +#
12033 +# This file is subject to the terms and conditions of the GNU General Public
12034 +# License. See the file "COPYING" in the main directory of this archive
12035 +# for more details.
12036 +
12037 +keymaps 0-2,4-5,8,12,32-33,36-37
12038 +strings as usual
12039 +
12040 +keycode 0 = F1 F11 Console_13
12041 + shiftr keycode 0 = F11
12042 + shift shiftr keycode 0 = F11
12043 + control keycode 0 = F1
12044 + alt keycode 0 = Console_1
12045 + control alt keycode 0 = Console_1
12046 +keycode 1 = F3 F13 Console_15
12047 + shiftr keycode 1 = F13
12048 + shift shiftr keycode 1 = F13
12049 + control keycode 1 = F3
12050 + alt keycode 1 = Console_3
12051 + control alt keycode 1 = Console_3
12052 +keycode 2 = F5 F15 Console_17
12053 + shiftr keycode 2 = F15
12054 + shift shiftr keycode 2 = F15
12055 + control keycode 2 = F5
12056 + alt keycode 2 = Console_5
12057 + control alt keycode 2 = Console_5
12058 +keycode 3 = F7 F17 Console_19
12059 + shiftr keycode 3 = F17
12060 + shift shiftr keycode 3 = F17
12061 + control keycode 3 = F7
12062 + alt keycode 3 = Console_7
12063 + control alt keycode 3 = Console_7
12064 +keycode 4 = F9 F19 Console_21
12065 + shiftr keycode 4 = F19
12066 + shift shiftr keycode 4 = F19
12067 + control keycode 4 = F9
12068 + alt keycode 4 = Console_9
12069 + control alt keycode 4 = Console_9
12070 +#keycode 5 is contrast down
12071 +#keycode 6 is contrast up
12072 +keycode 7 = F11 F11 Console_23
12073 + shiftr keycode 7 = F11
12074 + shift shiftr keycode 7 = F11
12075 + control keycode 7 = F11
12076 + alt keycode 7 = Console_11
12077 + control alt keycode 7 = Console_11
12078 +keycode 8 = F2 F12 Console_14
12079 + shiftr keycode 8 = F12
12080 + shift shiftr keycode 8 = F12
12081 + control keycode 8 = F2
12082 + alt keycode 8 = Console_2
12083 + control alt keycode 8 = Console_2
12084 +keycode 9 = F4 F14 Console_16
12085 + shiftr keycode 9 = F14
12086 + shift shiftr keycode 9 = F14
12087 + control keycode 9 = F4
12088 + alt keycode 9 = Console_4
12089 + control alt keycode 9 = Console_4
12090 +keycode 10 = F6 F16 Console_18
12091 + shiftr keycode 10 = F16
12092 + shift shiftr keycode 10 = F16
12093 + control keycode 10 = F6
12094 + alt keycode 10 = Console_6
12095 + control alt keycode 10 = Console_6
12096 +keycode 11 = F8 F18 Console_20
12097 + shiftr keycode 11 = F18
12098 + shift shiftr keycode 11 = F18
12099 + control keycode 11 = F8
12100 + alt keycode 11 = Console_8
12101 + control alt keycode 11 = Console_8
12102 +keycode 12 = F10 F20 Console_22
12103 + shiftr keycode 12 = F20
12104 + shift shiftr keycode 12 = F20
12105 + control keycode 12 = F10
12106 + alt keycode 12 = Console_10
12107 + control alt keycode 12 = Console_10
12108 +#keycode 13 is brightness down
12109 +#keycode 14 is brightness up
12110 +keycode 15 = F12 F12 Console_24
12111 + shiftr keycode 15 = F12
12112 + shift shiftr keycode 15 = F12
12113 + control keycode 15 = F12
12114 + alt keycode 15 = Console_12
12115 + control alt keycode 15 = Console_12
12116 +keycode 16 = apostrophe quotedbl
12117 + shiftr keycode 16 = quotedbl
12118 + shift shiftr keycode 16 = quotedbl
12119 + control keycode 16 = Control_g
12120 + alt keycode 16 = Meta_apostrophe
12121 +keycode 17 = bracketleft braceleft
12122 + shiftr keycode 17 = braceleft
12123 + shift shiftr keycode 17 = braceleft
12124 + control keycode 17 = Escape
12125 + alt keycode 17 = Meta_bracketleft
12126 +keycode 18 = minus underscore backslash
12127 + shiftr keycode 18 = underscore
12128 + shift shiftr keycode 18 = underscore
12129 + control keycode 18 = Control_underscore
12130 + shift control keycode 18 = Control_underscore
12131 + shiftr control keycode 18 = Control_underscore
12132 + shift shiftr control keycode 18 = Control_underscore
12133 + alt keycode 18 = Meta_minus
12134 +keycode 19 = zero parenright braceright
12135 + shiftr keycode 19 = parenright
12136 + shift shiftr keycode 19 = parenright
12137 + alt keycode 19 = Meta_zero
12138 +keycode 20 = p
12139 + shiftr keycode 20 = +P
12140 + shift shiftr keycode 20 = +p
12141 +keycode 21 = semicolon colon
12142 + shiftr keycode 21 = colon
12143 + shift shiftr keycode 21 = colon
12144 + alt keycode 21 = Meta_semicolon
12145 +keycode 22 = Up Scroll_Backward
12146 + shiftr keycode 22 = Scroll_Backward
12147 + shift shiftr keycode 22 = Scroll_Backward
12148 + alt keycode 22 = Prior
12149 +keycode 23 = slash question
12150 + shiftr keycode 23 = question
12151 + shift shiftr keycode 23 = question
12152 + control keycode 23 = Delete
12153 + alt keycode 23 = Meta_slash
12154 +
12155 +keycode 27 = nine parenleft bracketright
12156 + shiftr keycode 27 = parenleft
12157 + shift shiftr keycode 27 = parenleft
12158 + alt keycode 27 = Meta_nine
12159 +keycode 28 = o
12160 + shiftr keycode 28 = +O
12161 + shift shiftr keycode 28 = +o
12162 +keycode 29 = l
12163 + shiftr keycode 29 = +L
12164 + shift shiftr keycode 29 = +l
12165 +keycode 30 = period greater
12166 + shiftr keycode 30 = greater
12167 + shift shiftr keycode 30 = greater
12168 + control keycode 30 = Compose
12169 + alt keycode 30 = Meta_period
12170 +
12171 +keycode 32 = Left Decr_Console
12172 + shiftr keycode 32 = Decr_Console
12173 + shift shiftr keycode 32 = Decr_Console
12174 + alt keycode 32 = Home
12175 +keycode 33 = bracketright braceright asciitilde
12176 + shiftr keycode 33 = braceright
12177 + shift shiftr keycode 33 = braceright
12178 + control keycode 33 = Control_bracketright
12179 + alt keycode 33 = Meta_bracketright
12180 +keycode 34 = equal plus
12181 + shiftr keycode 34 = plus
12182 + shift shiftr keycode 34 = plus
12183 + alt keycode 34 = Meta_equal
12184 +keycode 35 = eight asterisk bracketleft
12185 + shiftr keycode 35 = asterisk
12186 + shift shiftr keycode 35 = asterisk
12187 + control keycode 35 = Delete
12188 + alt keycode 35 = Meta_eight
12189 +keycode 36 = i
12190 + shiftr keycode 36 = +I
12191 + shift shiftr keycode 36 = +i
12192 +keycode 37 = k
12193 + shiftr keycode 37 = +K
12194 + shift shiftr keycode 37 = +k
12195 +keycode 38 = comma less
12196 + shiftr keycode 38 = less
12197 + shift shiftr keycode 38 = less
12198 + alt keycode 38 = Meta_comma
12199 +
12200 +keycode 40 = h
12201 + shiftr keycode 40 = +H
12202 + shift shiftr keycode 40 = +h
12203 +keycode 41 = y
12204 + shiftr keycode 41 = +Y
12205 + shift shiftr keycode 41 = +y
12206 +keycode 42 = six asciicircum
12207 + shiftr keycode 42 = asciicircum
12208 + shift shiftr keycode 42 = asciicircum
12209 + control keycode 42 = Control_asciicircum
12210 + alt keycode 42 = Meta_six
12211 +keycode 43 = seven ampersand braceleft
12212 + shiftr keycode 43 = ampersand
12213 + shift shiftr keycode 43 = ampersand
12214 + control keycode 43 = Control_underscore
12215 + alt keycode 43 = Meta_seven
12216 +keycode 44 = u
12217 + shiftr keycode 44 = +U
12218 + shift shiftr keycode 44 = +u
12219 +keycode 45 = j
12220 + shiftr keycode 45 = +J
12221 + shift shiftr keycode 45 = +j
12222 +keycode 46 = m
12223 + shiftr keycode 46 = +M
12224 + shift shiftr keycode 46 = +m
12225 +keycode 47 = n
12226 + shiftr keycode 47 = +N
12227 + shift shiftr keycode 47 = +n
12228 +
12229 +# This is the "Backspace" key:
12230 +keycode 49 = Delete Delete
12231 + shiftr keycode 49 = Delete
12232 + shift shiftr keycode 49 = Delete
12233 + control keycode 49 = BackSpace
12234 + alt keycode 49 = Meta_Delete
12235 +keycode 50 = Num_Lock
12236 + shift keycode 50 = Bare_Num_Lock
12237 + shiftr keycode 50 = Bare_Num_Lock
12238 + shift shiftr keycode 50 = Bare_Num_Lock
12239 +# This is the "Delete" key:
12240 +keycode 51 = Remove
12241 + control alt keycode 51 = Boot
12242 +
12243 +keycode 53 = backslash bar
12244 + shiftr keycode 53 = bar
12245 + shift shiftr keycode 53 = bar
12246 + control keycode 53 = Control_backslash
12247 + alt keycode 53 = Meta_backslash
12248 +keycode 54 = Return
12249 + alt keycode 54 = Meta_Control_m
12250 +keycode 55 = space space
12251 + shiftr keycode 55 = space
12252 + shift shiftr keycode 55 = space
12253 + control keycode 55 = nul
12254 + alt keycode 55 = Meta_space
12255 +keycode 56 = g
12256 + shiftr keycode 56 = +G
12257 + shift shiftr keycode 56 = +g
12258 +keycode 57 = t
12259 + shiftr keycode 57 = +T
12260 + shift shiftr keycode 57 = +t
12261 +keycode 58 = five percent
12262 + shiftr keycode 58 = percent
12263 + shift shiftr keycode 58 = percent
12264 + control keycode 58 = Control_bracketright
12265 + alt keycode 58 = Meta_five
12266 +keycode 59 = four dollar dollar
12267 + shiftr keycode 59 = dollar
12268 + shift shiftr keycode 59 = dollar
12269 + control keycode 59 = Control_backslash
12270 + alt keycode 59 = Meta_four
12271 +keycode 60 = r
12272 + shiftr keycode 60 = +R
12273 + shift shiftr keycode 60 = +r
12274 +keycode 61 = f
12275 + shiftr keycode 61 = +F
12276 + shift shiftr keycode 61 = +f
12277 + altgr keycode 61 = Hex_F
12278 +keycode 62 = v
12279 + shiftr keycode 62 = +V
12280 + shift shiftr keycode 62 = +v
12281 +keycode 63 = b
12282 + shiftr keycode 63 = +B
12283 + shift shiftr keycode 63 = +b
12284 + altgr keycode 63 = Hex_B
12285 +
12286 +keycode 67 = three numbersign
12287 + shiftr keycode 67 = numbersign
12288 + shift shiftr keycode 67 = numbersign
12289 + control keycode 67 = Escape
12290 + alt keycode 67 = Meta_three
12291 +keycode 68 = e
12292 + shiftr keycode 68 = +E
12293 + shift shiftr keycode 68 = +e
12294 + altgr keycode 68 = Hex_E
12295 +keycode 69 = d
12296 + shiftr keycode 69 = +D
12297 + shift shiftr keycode 69 = +d
12298 + altgr keycode 69 = Hex_D
12299 +keycode 70 = c
12300 + shiftr keycode 70 = +C
12301 + shift shiftr keycode 70 = +c
12302 + altgr keycode 70 = Hex_C
12303 +keycode 71 = Right Incr_Console
12304 + shiftr keycode 71 = Incr_Console
12305 + shift shiftr keycode 71 = Incr_Console
12306 + alt keycode 71 = End
12307 +
12308 +keycode 75 = two at at
12309 + shiftr keycode 75 = at
12310 + shift shiftr keycode 75 = at
12311 + control keycode 75 = nul
12312 + shift control keycode 75 = nul
12313 + shiftr control keycode 75 = nul
12314 + shift shiftr control keycode 75 = nul
12315 + alt keycode 75 = Meta_two
12316 +keycode 76 = w
12317 + shiftr keycode 76 = +W
12318 + shift shiftr keycode 76 = +w
12319 +keycode 77 = s
12320 + shiftr keycode 77 = +S
12321 + shift shiftr keycode 77 = +s
12322 +keycode 78 = x
12323 + shiftr keycode 78 = +X
12324 + shift shiftr keycode 78 = +x
12325 +keycode 79 = Down Scroll_Forward
12326 + shiftr keycode 79 = Scroll_Forward
12327 + shift shiftr keycode 79 = Scroll_Forward
12328 + alt keycode 79 = Next
12329 +keycode 80 = Escape Escape
12330 + shiftr keycode 80 = Escape
12331 + shift shiftr keycode 80 = Escape
12332 + alt keycode 80 = Meta_Escape
12333 +keycode 81 = Tab Tab
12334 + shiftr keycode 81 = Tab
12335 + shift shiftr keycode 81 = Tab
12336 + alt keycode 81 = Meta_Tab
12337 +keycode 82 = grave asciitilde
12338 + shiftr keycode 82 = asciitilde
12339 + shift shiftr keycode 82 = asciitilde
12340 + control keycode 82 = nul
12341 + alt keycode 82 = Meta_grave
12342 +keycode 83 = one exclam
12343 + shiftr keycode 83 = exclam
12344 + shift shiftr keycode 83 = exclam
12345 + alt keycode 83 = Meta_one
12346 +keycode 84 = q
12347 + shiftr keycode 84 = +Q
12348 + shift shiftr keycode 84 = +q
12349 +keycode 85 = a
12350 + shiftr keycode 85 = +A
12351 + shift shiftr keycode 85 = +a
12352 + altgr keycode 85 = Hex_A
12353 +keycode 86 = z
12354 + shiftr keycode 86 = +Z
12355 + shift shiftr keycode 86 = +z
12356 +
12357 +# This is the windows key:
12358 +keycode 88 = Decr_Console
12359 +keycode 89 = Shift
12360 +keycode 90 = Control
12361 +keycode 91 = Control
12362 +keycode 92 = Alt
12363 +keycode 93 = AltGr
12364 +keycode 94 = ShiftR
12365 + shift keycode 94 = Caps_Lock
12366 diff -Nur linux-2.4.29/drivers/char/indydog.c linux-mips/drivers/char/indydog.c
12367 --- linux-2.4.29/drivers/char/indydog.c 2003-08-25 13:44:41.000000000 +0200
12368 +++ linux-mips/drivers/char/indydog.c 2004-06-22 17:32:07.000000000 +0200
12369 @@ -1,5 +1,5 @@
12370 /*
12371 - * IndyDog 0.2 A Hardware Watchdog Device for SGI IP22
12372 + * IndyDog 0.3 A Hardware Watchdog Device for SGI IP22
12373 *
12374 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
12375 *
12376 @@ -7,10 +7,10 @@
12377 * modify it under the terms of the GNU General Public License
12378 * as published by the Free Software Foundation; either version
12379 * 2 of the License, or (at your option) any later version.
12380 - *
12381 + *
12382 * based on softdog.c by Alan Cox <alan@redhat.com>
12383 */
12384 -
12385 +
12386 #include <linux/module.h>
12387 #include <linux/config.h>
12388 #include <linux/types.h>
12389 @@ -19,13 +19,12 @@
12390 #include <linux/mm.h>
12391 #include <linux/miscdevice.h>
12392 #include <linux/watchdog.h>
12393 -#include <linux/smp_lock.h>
12394 #include <linux/init.h>
12395 #include <asm/uaccess.h>
12396 #include <asm/sgi/mc.h>
12397
12398 -static unsigned long indydog_alive;
12399 -static int expect_close = 0;
12400 +#define PFX "indydog: "
12401 +static int indydog_alive;
12402
12403 #ifdef CONFIG_WATCHDOG_NOWAYOUT
12404 static int nowayout = 1;
12405 @@ -33,10 +32,30 @@
12406 static int nowayout = 0;
12407 #endif
12408
12409 +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
12410 +
12411 MODULE_PARM(nowayout,"i");
12412 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
12413
12414 -static inline void indydog_ping(void)
12415 +static void indydog_start(void)
12416 +{
12417 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12418 +
12419 + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
12420 + sgimc->cpuctrl0 = mc_ctrl0;
12421 +}
12422 +
12423 +static void indydog_stop(void)
12424 +{
12425 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12426 +
12427 + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
12428 + sgimc->cpuctrl0 = mc_ctrl0;
12429 +
12430 + printk(KERN_INFO PFX "Stopped watchdog timer.\n");
12431 +}
12432 +
12433 +static void indydog_ping(void)
12434 {
12435 sgimc->watchdogt = 0;
12436 }
12437 @@ -46,18 +65,14 @@
12438 */
12439 static int indydog_open(struct inode *inode, struct file *file)
12440 {
12441 - u32 mc_ctrl0;
12442 -
12443 - if (test_and_set_bit(0,&indydog_alive))
12444 + if (indydog_alive)
12445 return -EBUSY;
12446
12447 - if (nowayout) {
12448 + if (nowayout)
12449 MOD_INC_USE_COUNT;
12450 - }
12451
12452 /* Activate timer */
12453 - mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
12454 - sgimc->cpuctrl0 = mc_ctrl0;
12455 + indydog_start();
12456 indydog_ping();
12457
12458 indydog_alive = 1;
12459 @@ -69,63 +84,48 @@
12460 static int indydog_release(struct inode *inode, struct file *file)
12461 {
12462 /* Shut off the timer.
12463 - * Lock it in if it's a module and we set nowayout. */
12464 - lock_kernel();
12465 - if (expect_close) {
12466 - u32 mc_ctrl0 = sgimc->cpuctrl0;
12467 + * Lock it in if it's a module and we defined ...NOWAYOUT */
12468 + if (!nowayout) {
12469 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12470 mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
12471 sgimc->cpuctrl0 = mc_ctrl0;
12472 printk(KERN_INFO "Stopped watchdog timer.\n");
12473 - } else
12474 - printk(KERN_CRIT "WDT device closed unexpectedly. WDT will not stop!\n");
12475 - clear_bit(0, &indydog_alive);
12476 - unlock_kernel();
12477 + }
12478 + indydog_alive = 0;
12479
12480 return 0;
12481 }
12482
12483 static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
12484 {
12485 - /* Can't seek (pwrite) on this device */
12486 + /* Can't seek (pwrite) on this device */
12487 if (ppos != &file->f_pos)
12488 return -ESPIPE;
12489
12490 - /*
12491 - * Refresh the timer.
12492 - */
12493 + /* Refresh the timer. */
12494 if (len) {
12495 - if (!nowayout) {
12496 - size_t i;
12497 -
12498 - /* In case it was set long ago */
12499 - expect_close = 0;
12500 -
12501 - for (i = 0; i != len; i++) {
12502 - char c;
12503 - if (get_user(c, data + i))
12504 - return -EFAULT;
12505 - if (c == 'V')
12506 - expect_close = 1;
12507 - }
12508 - }
12509 indydog_ping();
12510 - return 1;
12511 }
12512 - return 0;
12513 + return len;
12514 }
12515
12516 static int indydog_ioctl(struct inode *inode, struct file *file,
12517 unsigned int cmd, unsigned long arg)
12518 {
12519 + int options, retval = -EINVAL;
12520 static struct watchdog_info ident = {
12521 - options: WDIOF_MAGICCLOSE,
12522 - identity: "Hardware Watchdog for SGI IP22",
12523 + .options = WDIOF_KEEPALIVEPING |
12524 + WDIOF_MAGICCLOSE,
12525 + .firmware_version = 0,
12526 + .identity = "Hardware Watchdog for SGI IP22",
12527 };
12528 +
12529 switch (cmd) {
12530 default:
12531 return -ENOIOCTLCMD;
12532 case WDIOC_GETSUPPORT:
12533 - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
12534 + if (copy_to_user((struct watchdog_info *)arg,
12535 + &ident, sizeof(ident)))
12536 return -EFAULT;
12537 return 0;
12538 case WDIOC_GETSTATUS:
12539 @@ -134,31 +134,53 @@
12540 case WDIOC_KEEPALIVE:
12541 indydog_ping();
12542 return 0;
12543 + case WDIOC_GETTIMEOUT:
12544 + return put_user(WATCHDOG_TIMEOUT,(int *)arg);
12545 + case WDIOC_SETOPTIONS:
12546 + {
12547 + if (get_user(options, (int *)arg))
12548 + return -EFAULT;
12549 +
12550 + if (options & WDIOS_DISABLECARD) {
12551 + indydog_stop();
12552 + retval = 0;
12553 + }
12554 +
12555 + if (options & WDIOS_ENABLECARD) {
12556 + indydog_start();
12557 + retval = 0;
12558 + }
12559 +
12560 + return retval;
12561 + }
12562 }
12563 }
12564
12565 static struct file_operations indydog_fops = {
12566 - owner: THIS_MODULE,
12567 - write: indydog_write,
12568 - ioctl: indydog_ioctl,
12569 - open: indydog_open,
12570 - release: indydog_release,
12571 + .owner = THIS_MODULE,
12572 + .write = indydog_write,
12573 + .ioctl = indydog_ioctl,
12574 + .open = indydog_open,
12575 + .release = indydog_release,
12576 };
12577
12578 static struct miscdevice indydog_miscdev = {
12579 - minor: WATCHDOG_MINOR,
12580 - name: "watchdog",
12581 - fops: &indydog_fops,
12582 + .minor = WATCHDOG_MINOR,
12583 + .name = "watchdog",
12584 + .fops = &indydog_fops,
12585 };
12586
12587 -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
12588 +static char banner[] __initdata =
12589 + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
12590
12591 static int __init watchdog_init(void)
12592 {
12593 int ret = misc_register(&indydog_miscdev);
12594 -
12595 - if (ret)
12596 + if (ret) {
12597 + printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
12598 + WATCHDOG_MINOR, ret);
12599 return ret;
12600 + }
12601
12602 printk(banner);
12603
12604 @@ -172,4 +194,7 @@
12605
12606 module_init(watchdog_init);
12607 module_exit(watchdog_exit);
12608 +
12609 +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
12610 +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
12611 MODULE_LICENSE("GPL");
12612 diff -Nur linux-2.4.29/drivers/char/ip27-rtc.c linux-mips/drivers/char/ip27-rtc.c
12613 --- linux-2.4.29/drivers/char/ip27-rtc.c 2004-02-18 14:36:31.000000000 +0100
12614 +++ linux-mips/drivers/char/ip27-rtc.c 2004-04-06 03:35:30.000000000 +0200
12615 @@ -44,6 +44,7 @@
12616 #include <asm/sn/klconfig.h>
12617 #include <asm/sn/sn0/ip27.h>
12618 #include <asm/sn/sn0/hub.h>
12619 +#include <asm/sn/sn_private.h>
12620
12621 static int rtc_ioctl(struct inode *inode, struct file *file,
12622 unsigned int cmd, unsigned long arg);
12623 @@ -209,11 +210,8 @@
12624
12625 static int __init rtc_init(void)
12626 {
12627 - nasid_t nid;
12628 -
12629 - nid = get_nasid();
12630 rtc = (struct m48t35_rtc *)
12631 - (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
12632 + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
12633
12634 printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
12635 if (misc_register(&rtc_dev)) {
12636 @@ -325,3 +323,7 @@
12637
12638 rtc_tm->tm_mon--;
12639 }
12640 +
12641 +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
12642 +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
12643 +MODULE_LICENSE("GPL");
12644 diff -Nur linux-2.4.29/drivers/char/Makefile linux-mips/drivers/char/Makefile
12645 --- linux-2.4.29/drivers/char/Makefile 2004-08-08 01:26:04.000000000 +0200
12646 +++ linux-mips/drivers/char/Makefile 2005-02-11 22:09:56.000000000 +0100
12647 @@ -48,7 +48,12 @@
12648 KEYBD =
12649 endif
12650 ifeq ($(CONFIG_VR41XX_KIU),y)
12651 - KEYMAP =
12652 + ifeq ($(CONFIG_IBM_WORKPAD),y)
12653 + KEYMAP = ibm_workpad_keymap.o
12654 + endif
12655 + ifeq ($(CONFIG_VICTOR_MPC30X),y)
12656 + KEYMAP = victor_mpc30x_keymap.o
12657 + endif
12658 KEYBD = vr41xx_keyb.o
12659 endif
12660 endif
12661 @@ -251,7 +256,6 @@
12662 obj-$(CONFIG_RTC) += rtc.o
12663 obj-$(CONFIG_GEN_RTC) += genrtc.o
12664 obj-$(CONFIG_EFI_RTC) += efirtc.o
12665 -obj-$(CONFIG_SGI_DS1286) += ds1286.o
12666 obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
12667 obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
12668 ifeq ($(CONFIG_PPC),)
12669 @@ -259,6 +263,7 @@
12670 endif
12671 obj-$(CONFIG_TOSHIBA) += toshiba.o
12672 obj-$(CONFIG_I8K) += i8k.o
12673 +obj-$(CONFIG_DS1286) += ds1286.o
12674 obj-$(CONFIG_DS1620) += ds1620.o
12675 obj-$(CONFIG_DS1742) += ds1742.o
12676 obj-$(CONFIG_INTEL_RNG) += i810_rng.o
12677 @@ -269,6 +274,7 @@
12678
12679 obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
12680 obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
12681 +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
12682 obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
12683 obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
12684 obj-$(CONFIG_COBALT_LCD) += lcd.o
12685 @@ -353,3 +359,9 @@
12686
12687 qtronixmap.c: qtronixmap.map
12688 set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
12689 +
12690 +ibm_workpad_keymap.c: ibm_workpad_keymap.map
12691 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
12692 +
12693 +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
12694 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
12695 diff -Nur linux-2.4.29/drivers/char/mips_rtc.c linux-mips/drivers/char/mips_rtc.c
12696 --- linux-2.4.29/drivers/char/mips_rtc.c 2004-01-05 14:53:56.000000000 +0100
12697 +++ linux-mips/drivers/char/mips_rtc.c 2004-06-28 14:54:53.000000000 +0200
12698 @@ -53,14 +53,6 @@
12699 #include <asm/io.h>
12700 #include <asm/uaccess.h>
12701 #include <asm/system.h>
12702 -
12703 -/*
12704 - * Check machine
12705 - */
12706 -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
12707 -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
12708 -#endif
12709 -
12710 #include <asm/time.h>
12711
12712 static unsigned long rtc_status = 0; /* bitmapped status byte. */
12713 diff -Nur linux-2.4.29/drivers/char/sb1250_duart.c linux-mips/drivers/char/sb1250_duart.c
12714 --- linux-2.4.29/drivers/char/sb1250_duart.c 2004-02-18 14:36:31.000000000 +0100
12715 +++ linux-mips/drivers/char/sb1250_duart.c 2004-09-17 01:25:44.000000000 +0200
12716 @@ -328,10 +328,11 @@
12717 if (c <= 0) break;
12718
12719 if (from_user) {
12720 + spin_unlock_irqrestore(&us->outp_lock, flags);
12721 if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
12722 - spin_unlock_irqrestore(&us->outp_lock, flags);
12723 return -EFAULT;
12724 }
12725 + spin_lock_irqsave(&us->outp_lock, flags);
12726 } else {
12727 memcpy(us->outp_buf + us->outp_tail, buf, c);
12728 }
12729 @@ -498,9 +499,31 @@
12730 duart_set_cflag(us->line, tty->termios->c_cflag);
12731 }
12732
12733 +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
12734 +
12735 + struct serial_struct tmp;
12736 +
12737 + memset(&tmp, 0, sizeof(tmp));
12738 +
12739 + tmp.type=PORT_SB1250;
12740 + tmp.line=us->line;
12741 + tmp.port=A_DUART_CHANREG(tmp.line,0);
12742 + tmp.irq=K_INT_UART_0 + tmp.line;
12743 + tmp.xmit_fifo_size=16; /* fixed by hw */
12744 + tmp.baud_base=5000000;
12745 + tmp.io_type=SERIAL_IO_MEM;
12746 +
12747 + if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
12748 + return -EFAULT;
12749 +
12750 + return 0;
12751 +}
12752 +
12753 static int duart_ioctl(struct tty_struct *tty, struct file * file,
12754 unsigned int cmd, unsigned long arg)
12755 {
12756 + uart_state_t *us = (uart_state_t *) tty->driver_data;
12757 +
12758 /* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
12759 return -ENODEV;*/
12760 switch (cmd) {
12761 @@ -517,7 +540,7 @@
12762 printk("Ignoring TIOCMSET\n");
12763 break;
12764 case TIOCGSERIAL:
12765 - printk("Ignoring TIOCGSERIAL\n");
12766 + return get_serial_info(us,(struct serial_struct *) arg);
12767 break;
12768 case TIOCSSERIAL:
12769 printk("Ignoring TIOCSSERIAL\n");
12770 diff -Nur linux-2.4.29/drivers/char/serial.c linux-mips/drivers/char/serial.c
12771 --- linux-2.4.29/drivers/char/serial.c 2005-01-19 15:09:50.000000000 +0100
12772 +++ linux-mips/drivers/char/serial.c 2004-12-27 05:13:43.000000000 +0100
12773 @@ -62,6 +62,12 @@
12774 * Robert Schwebel <robert@schwebel.de>,
12775 * Juergen Beisert <jbeisert@eurodsn.de>,
12776 * Theodore Ts'o <tytso@mit.edu>
12777 + *
12778 + * 10/00: Added suport for MIPS Atlas board.
12779 + * 11/00: Hooks for serial kernel debug port support added.
12780 + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
12781 + * carstenl@mips.com
12782 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
12783 */
12784
12785 static char *serial_version = "5.05c";
12786 @@ -413,6 +419,22 @@
12787 return 0;
12788 }
12789
12790 +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
12791 +
12792 +#include <asm/mips-boards/atlas.h>
12793 +
12794 +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
12795 +{
12796 + return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
12797 +}
12798 +
12799 +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
12800 +{
12801 + *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
12802 +}
12803 +
12804 +#else
12805 +
12806 static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
12807 {
12808 switch (info->io_type) {
12809 @@ -447,6 +469,8 @@
12810 outb(value, info->port+offset);
12811 }
12812 }
12813 +#endif
12814 +
12815
12816 /*
12817 * We used to support using pause I/O for certain machines. We
12818 diff -Nur linux-2.4.29/drivers/char/victor_mpc30x_keymap.map linux-mips/drivers/char/victor_mpc30x_keymap.map
12819 --- linux-2.4.29/drivers/char/victor_mpc30x_keymap.map 1970-01-01 01:00:00.000000000 +0100
12820 +++ linux-mips/drivers/char/victor_mpc30x_keymap.map 2004-02-05 18:04:42.000000000 +0100
12821 @@ -0,0 +1,102 @@
12822 +# Victor Interlink MP-C303/304 keyboard keymap
12823 +#
12824 +# Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
12825 +#
12826 +# This file is subject to the terms and conditions of the GNU General Public
12827 +# License. See the file "COPYING" in the main directory of this archive
12828 +# for more details.
12829 +keymaps 0-1,4-5,8-9,12
12830 +alt_is_meta
12831 +strings as usual
12832 +compose as usual for "iso-8859-1"
12833 +
12834 +# First line
12835 +keycode 89 = Escape
12836 +keycode 9 = Delete
12837 +
12838 +# 2nd line
12839 +keycode 73 = one exclam
12840 +keycode 18 = two quotedbl
12841 +keycode 92 = three numbersign
12842 + control keycode 92 = Escape
12843 +keycode 53 = four dollar
12844 + control keycode 53 = Control_backslash
12845 +keycode 21 = five percent
12846 + control keycode 21 = Control_bracketright
12847 +keycode 50 = six ampersand
12848 + control keycode 50 = Control_underscore
12849 +keycode 48 = seven apostrophe
12850 +keycode 51 = eight parenleft
12851 +keycode 16 = nine parenright
12852 +keycode 80 = zero asciitilde
12853 + control keycode 80 = nul
12854 +keycode 49 = minus equal
12855 +keycode 30 = asciicircum asciitilde
12856 + control keycode 30 = Control_asciicircum
12857 +keycode 5 = backslash bar
12858 + control keycode 5 = Control_backslash
12859 +keycode 13 = BackSpace
12860 +# 3rd line
12861 +keycode 57 = Tab
12862 +keycode 74 = q
12863 +keycode 26 = w
12864 +keycode 81 = e
12865 +keycode 29 = r
12866 +keycode 37 = t
12867 +keycode 45 = y
12868 +keycode 72 = u
12869 +keycode 24 = i
12870 +keycode 32 = o
12871 +keycode 41 = p
12872 +keycode 1 = at grave
12873 + control keycode 1 = nul
12874 +keycode 54 = bracketleft braceleft
12875 +keycode 63 = Return
12876 + alt keycode 63 = Meta_Control_m
12877 +# 4th line
12878 +keycode 23 = Caps_Lock
12879 +keycode 34 = a
12880 +keycode 66 = s
12881 +keycode 52 = d
12882 +keycode 20 = f
12883 +keycode 84 = g
12884 +keycode 67 = h
12885 +keycode 64 = j
12886 +keycode 17 = k
12887 +keycode 83 = l
12888 +keycode 22 = semicolon plus
12889 +keycode 61 = colon asterisk
12890 + control keycode 61 = Control_g
12891 +keycode 65 = bracketright braceright
12892 + control keycode 65 = Control_bracketright
12893 +# 5th line
12894 +keycode 91 = Shift
12895 +keycode 76 = z
12896 +keycode 68 = x
12897 +keycode 28 = c
12898 +keycode 36 = v
12899 +keycode 44 = b
12900 +keycode 19 = n
12901 +keycode 27 = m
12902 +keycode 35 = comma less
12903 +keycode 3 = period greater
12904 + control keycode 3 = Compose
12905 +keycode 38 = slash question
12906 + control keycode 38 = Delete
12907 + shift control keycode 38 = Delete
12908 +keycode 6 = backslash underscore
12909 + control keycode 6 = Control_backslash
12910 +keycode 55 = Up
12911 + alt keycode 55 = PageUp
12912 +keycode 14 = Shift
12913 +# 6th line
12914 +keycode 56 = Control
12915 +keycode 42 = Alt
12916 +keycode 33 = space
12917 + control keycode 33 = nul
12918 +keycode 7 = Left
12919 + alt keycode 7 = Home
12920 +keycode 31 = Down
12921 + alt keycode 31 = PageDown
12922 +keycode 47 = Right
12923 + alt keycode 47 = End
12924 diff -Nur linux-2.4.29/drivers/char/vr41xx_keyb.c linux-mips/drivers/char/vr41xx_keyb.c
12925 --- linux-2.4.29/drivers/char/vr41xx_keyb.c 2004-02-18 14:36:31.000000000 +0100
12926 +++ linux-mips/drivers/char/vr41xx_keyb.c 2004-02-17 13:08:55.000000000 +0100
12927 @@ -308,7 +308,7 @@
12928 if (found != 0) {
12929 kiu_base = VRC4173_KIU_OFFSET;
12930 mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
12931 - vrc4173_clock_supply(VRC4173_KIU_CLOCK);
12932 + vrc4173_supply_clock(VRC4173_KIU_CLOCK);
12933 }
12934 }
12935 #endif
12936 @@ -325,7 +325,7 @@
12937
12938 if (current_cpu_data.cputype == CPU_VR4111 ||
12939 current_cpu_data.cputype == CPU_VR4121)
12940 - vr41xx_clock_supply(KIU_CLOCK);
12941 + vr41xx_supply_clock(KIU_CLOCK);
12942
12943 kiu_writew(KIURST_KIURST, KIURST);
12944
12945 diff -Nur linux-2.4.29/drivers/i2c/Config.in linux-mips/drivers/i2c/Config.in
12946 --- linux-2.4.29/drivers/i2c/Config.in 2004-04-14 15:05:29.000000000 +0200
12947 +++ linux-mips/drivers/i2c/Config.in 2005-02-11 20:49:04.000000000 +0100
12948 @@ -57,6 +57,10 @@
12949 if [ "$CONFIG_SGI_IP22" = "y" ]; then
12950 dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
12951 fi
12952 +
12953 + if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
12954 + dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
12955 + fi
12956
12957 # This is needed for automatic patch generation: sensors code starts here
12958 # This is needed for automatic patch generation: sensors code ends here
12959 diff -Nur linux-2.4.29/drivers/i2c/i2c-algo-au1550.c linux-mips/drivers/i2c/i2c-algo-au1550.c
12960 --- linux-2.4.29/drivers/i2c/i2c-algo-au1550.c 1970-01-01 01:00:00.000000000 +0100
12961 +++ linux-mips/drivers/i2c/i2c-algo-au1550.c 2005-02-11 20:49:04.000000000 +0100
12962 @@ -0,0 +1,340 @@
12963 +/*
12964 + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
12965 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
12966 + *
12967 + * The documentation describes this as an SMBus controller, but it doesn't
12968 + * understand any of the SMBus protocol in hardware. It's really an I2C
12969 + * controller that could emulate most of the SMBus in software.
12970 + */
12971 +
12972 +#include <linux/kernel.h>
12973 +#include <linux/module.h>
12974 +#include <linux/init.h>
12975 +#include <linux/errno.h>
12976 +#include <linux/delay.h>
12977 +
12978 +#include <asm/au1000.h>
12979 +#include <asm/au1xxx_psc.h>
12980 +
12981 +#include <linux/i2c.h>
12982 +#include <linux/i2c-algo-au1550.h>
12983 +
12984 +static int
12985 +wait_xfer_done(struct i2c_algo_au1550_data *adap)
12986 +{
12987 + u32 stat;
12988 + int i;
12989 + volatile psc_smb_t *sp;
12990 +
12991 + sp = (volatile psc_smb_t *)(adap->psc_base);
12992 +
12993 + /* Wait for Tx FIFO Underflow.
12994 + */
12995 + for (i = 0; i < adap->xfer_timeout; i++) {
12996 + stat = sp->psc_smbevnt;
12997 + au_sync();
12998 + if ((stat & PSC_SMBEVNT_TU) != 0) {
12999 + /* Clear it. */
13000 + sp->psc_smbevnt = PSC_SMBEVNT_TU;
13001 + au_sync();
13002 + return 0;
13003 + }
13004 + udelay(1);
13005 + }
13006 +
13007 + return -ETIMEDOUT;
13008 +}
13009 +
13010 +static int
13011 +wait_ack(struct i2c_algo_au1550_data *adap)
13012 +{
13013 + u32 stat;
13014 + volatile psc_smb_t *sp;
13015 +
13016 + if (wait_xfer_done(adap))
13017 + return -ETIMEDOUT;
13018 +
13019 + sp = (volatile psc_smb_t *)(adap->psc_base);
13020 +
13021 + stat = sp->psc_smbevnt;
13022 + au_sync();
13023 +
13024 + if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
13025 + return -ETIMEDOUT;
13026 +
13027 + return 0;
13028 +}
13029 +
13030 +static int
13031 +wait_master_done(struct i2c_algo_au1550_data *adap)
13032 +{
13033 + u32 stat;
13034 + int i;
13035 + volatile psc_smb_t *sp;
13036 +
13037 + sp = (volatile psc_smb_t *)(adap->psc_base);
13038 +
13039 + /* Wait for Master Done.
13040 + */
13041 + for (i = 0; i < adap->xfer_timeout; i++) {
13042 + stat = sp->psc_smbevnt;
13043 + au_sync();
13044 + if ((stat & PSC_SMBEVNT_MD) != 0)
13045 + return 0;
13046 + udelay(1);
13047 + }
13048 +
13049 + return -ETIMEDOUT;
13050 +}
13051 +
13052 +static int
13053 +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
13054 +{
13055 + volatile psc_smb_t *sp;
13056 + u32 stat;
13057 +
13058 + sp = (volatile psc_smb_t *)(adap->psc_base);
13059 +
13060 + /* Reset the FIFOs, clear events.
13061 + */
13062 + sp->psc_smbpcr = PSC_SMBPCR_DC;
13063 + sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
13064 + au_sync();
13065 + do {
13066 + stat = sp->psc_smbpcr;
13067 + au_sync();
13068 + } while ((stat & PSC_SMBPCR_DC) != 0);
13069 +
13070 + /* Write out the i2c chip address and specify operation
13071 + */
13072 + addr <<= 1;
13073 + if (rd)
13074 + addr |= 1;
13075 +
13076 + /* Put byte into fifo, start up master.
13077 + */
13078 + sp->psc_smbtxrx = addr;
13079 + au_sync();
13080 + sp->psc_smbpcr = PSC_SMBPCR_MS;
13081 + au_sync();
13082 + if (wait_ack(adap))
13083 + return -EIO;
13084 + return 0;
13085 +}
13086 +
13087 +static u32
13088 +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
13089 +{
13090 + int j;
13091 + u32 data, stat;
13092 + volatile psc_smb_t *sp;
13093 +
13094 + if (wait_xfer_done(adap))
13095 + return -EIO;
13096 +
13097 + sp = (volatile psc_smb_t *)(adap->psc_base);
13098 +
13099 + j = adap->xfer_timeout * 100;
13100 + do {
13101 + j--;
13102 + if (j <= 0)
13103 + return -EIO;
13104 +
13105 + stat = sp->psc_smbstat;
13106 + au_sync();
13107 + if ((stat & PSC_SMBSTAT_RE) == 0)
13108 + j = 0;
13109 + else
13110 + udelay(1);
13111 + } while (j > 0);
13112 + data = sp->psc_smbtxrx;
13113 + au_sync();
13114 + *ret_data = data;
13115 +
13116 + return 0;
13117 +}
13118 +
13119 +static int
13120 +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
13121 + unsigned int len)
13122 +{
13123 + int i;
13124 + u32 data;
13125 + volatile psc_smb_t *sp;
13126 +
13127 + if (len == 0)
13128 + return 0;
13129 +
13130 + /* A read is performed by stuffing the transmit fifo with
13131 + * zero bytes for timing, waiting for bytes to appear in the
13132 + * receive fifo, then reading the bytes.
13133 + */
13134 +
13135 + sp = (volatile psc_smb_t *)(adap->psc_base);
13136 +
13137 + i = 0;
13138 + while (i < (len-1)) {
13139 + sp->psc_smbtxrx = 0;
13140 + au_sync();
13141 + if (wait_for_rx_byte(adap, &data))
13142 + return -EIO;
13143 +
13144 + buf[i] = data;
13145 + i++;
13146 + }
13147 +
13148 + /* The last byte has to indicate transfer done.
13149 + */
13150 + sp->psc_smbtxrx = PSC_SMBTXRX_STP;
13151 + au_sync();
13152 + if (wait_master_done(adap))
13153 + return -EIO;
13154 +
13155 + data = sp->psc_smbtxrx;
13156 + au_sync();
13157 + buf[i] = data;
13158 + return 0;
13159 +}
13160 +
13161 +static int
13162 +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
13163 + unsigned int len)
13164 +{
13165 + int i;
13166 + u32 data;
13167 + volatile psc_smb_t *sp;
13168 +
13169 + if (len == 0)
13170 + return 0;
13171 +
13172 + sp = (volatile psc_smb_t *)(adap->psc_base);
13173 +
13174 + i = 0;
13175 + while (i < (len-1)) {
13176 + data = buf[i];
13177 + sp->psc_smbtxrx = data;
13178 + au_sync();
13179 + if (wait_ack(adap))
13180 + return -EIO;
13181 + i++;
13182 + }
13183 +
13184 + /* The last byte has to indicate transfer done.
13185 + */
13186 + data = buf[i];
13187 + data |= PSC_SMBTXRX_STP;
13188 + sp->psc_smbtxrx = data;
13189 + au_sync();
13190 + if (wait_master_done(adap))
13191 + return -EIO;
13192 + return 0;
13193 +}
13194 +
13195 +static int
13196 +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
13197 +{
13198 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
13199 + struct i2c_msg *p;
13200 + int i, err = 0;
13201 +
13202 + for (i = 0; !err && i < num; i++) {
13203 + p = &msgs[i];
13204 + err = do_address(adap, p->addr, p->flags & I2C_M_RD);
13205 + if (err || !p->len)
13206 + continue;
13207 + if (p->flags & I2C_M_RD)
13208 + err = i2c_read(adap, p->buf, p->len);
13209 + else
13210 + err = i2c_write(adap, p->buf, p->len);
13211 + }
13212 +
13213 + /* Return the number of messages processed, or the error code.
13214 + */
13215 + if (err == 0)
13216 + err = num;
13217 + return err;
13218 +}
13219 +
13220 +static u32
13221 +au1550_func(struct i2c_adapter *adap)
13222 +{
13223 + return I2C_FUNC_I2C;
13224 +}
13225 +
13226 +static struct i2c_algorithm au1550_algo = {
13227 + .name = "Au1550 algorithm",
13228 + .id = I2C_ALGO_AU1550,
13229 + .master_xfer = au1550_xfer,
13230 + .functionality = au1550_func,
13231 +};
13232 +
13233 +/*
13234 + * registering functions to load algorithms at runtime
13235 + * Prior to calling us, the 50MHz clock frequency and routing
13236 + * must have been set up for the PSC indicated by the adapter.
13237 + */
13238 +int
13239 +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
13240 +{
13241 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
13242 + volatile psc_smb_t *sp;
13243 + u32 stat;
13244 +
13245 + i2c_adap->algo = &au1550_algo;
13246 +
13247 + /* Now, set up the PSC for SMBus PIO mode.
13248 + */
13249 + sp = (volatile psc_smb_t *)(adap->psc_base);
13250 + sp->psc_ctrl = PSC_CTRL_DISABLE;
13251 + au_sync();
13252 + sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
13253 + sp->psc_smbcfg = 0;
13254 + au_sync();
13255 + sp->psc_ctrl = PSC_CTRL_ENABLE;
13256 + au_sync();
13257 + do {
13258 + stat = sp->psc_smbstat;
13259 + au_sync();
13260 + } while ((stat & PSC_SMBSTAT_SR) == 0);
13261 +
13262 + sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
13263 + PSC_SMBCFG_DD_DISABLE);
13264 +
13265 + /* Divide by 8 to get a 6.25 MHz clock. The later protocol
13266 + * timings are based on this clock.
13267 + */
13268 + sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
13269 + sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
13270 + au_sync();
13271 +
13272 + /* Set the protocol timer values. See Table 71 in the
13273 + * Au1550 Data Book for standard timing values.
13274 + */
13275 + sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
13276 + PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
13277 + PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
13278 + PSC_SMBTMR_SET_CH(11);
13279 + au_sync();
13280 +
13281 + sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
13282 + do {
13283 + stat = sp->psc_smbstat;
13284 + au_sync();
13285 + } while ((stat & PSC_SMBSTAT_DR) == 0);
13286 +
13287 + return i2c_add_adapter(i2c_adap);
13288 +}
13289 +
13290 +
13291 +int
13292 +i2c_au1550_del_bus(struct i2c_adapter *adap)
13293 +{
13294 + return i2c_del_adapter(adap);
13295 +}
13296 +
13297 +EXPORT_SYMBOL(i2c_au1550_add_bus);
13298 +EXPORT_SYMBOL(i2c_au1550_del_bus);
13299 +
13300 +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
13301 +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
13302 +MODULE_LICENSE("GPL");
13303 diff -Nur linux-2.4.29/drivers/i2c/i2c-au1550.c linux-mips/drivers/i2c/i2c-au1550.c
13304 --- linux-2.4.29/drivers/i2c/i2c-au1550.c 1970-01-01 01:00:00.000000000 +0100
13305 +++ linux-mips/drivers/i2c/i2c-au1550.c 2005-02-11 20:49:04.000000000 +0100
13306 @@ -0,0 +1,154 @@
13307 +/*
13308 + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
13309 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
13310 + *
13311 + * This is just a skeleton adapter to use with the Au1550 PSC
13312 + * algorithm. It was developed for the Pb1550, but will work with
13313 + * any Au1550 board that has a similar PSC configuration.
13314 + *
13315 + * This program is free software; you can redistribute it and/or
13316 + * modify it under the terms of the GNU General Public License
13317 + * as published by the Free Software Foundation; either version 2
13318 + * of the License, or (at your option) any later version.
13319 + *
13320 + * This program is distributed in the hope that it will be useful,
13321 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
13322 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13323 + * GNU General Public License for more details.
13324 + *
13325 + * You should have received a copy of the GNU General Public License
13326 + * along with this program; if not, write to the Free Software
13327 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
13328 + */
13329 +
13330 +#include <linux/config.h>
13331 +#include <linux/kernel.h>
13332 +#include <linux/module.h>
13333 +#include <linux/init.h>
13334 +#include <linux/errno.h>
13335 +
13336 +#include <asm/au1000.h>
13337 +#include <asm/au1xxx_psc.h>
13338 +#if defined( CONFIG_MIPS_PB1550 )
13339 + #include <asm/pb1550.h>
13340 +#endif
13341 +#if defined( CONFIG_MIPS_PB1200 )
13342 + #include <asm/pb1200.h>
13343 +#endif
13344 +#if defined( CONFIG_MIPS_DB1200 )
13345 + #include <asm/db1200.h>
13346 +#endif
13347 +#if defined( CONFIG_MIPS_FICMMP )
13348 + #include <asm/ficmmp.h>
13349 +#endif
13350 +
13351 +#include <linux/i2c.h>
13352 +#include <linux/i2c-algo-au1550.h>
13353 +
13354 +
13355 +
13356 +static int
13357 +pb1550_reg(struct i2c_client *client)
13358 +{
13359 + return 0;
13360 +}
13361 +
13362 +static int
13363 +pb1550_unreg(struct i2c_client *client)
13364 +{
13365 + return 0;
13366 +}
13367 +
13368 +static void
13369 +pb1550_inc_use(struct i2c_adapter *adap)
13370 +{
13371 +#ifdef MODULE
13372 + MOD_INC_USE_COUNT;
13373 +#endif
13374 +}
13375 +
13376 +static void
13377 +pb1550_dec_use(struct i2c_adapter *adap)
13378 +{
13379 +#ifdef MODULE
13380 + MOD_DEC_USE_COUNT;
13381 +#endif
13382 +}
13383 +
13384 +static struct i2c_algo_au1550_data pb1550_i2c_info = {
13385 + SMBUS_PSC_BASE, 200, 200
13386 +};
13387 +
13388 +static struct i2c_adapter pb1550_board_adapter = {
13389 + name: "pb1550 adapter",
13390 + id: I2C_HW_AU1550_PSC,
13391 + algo: NULL,
13392 + algo_data: &pb1550_i2c_info,
13393 + inc_use: pb1550_inc_use,
13394 + dec_use: pb1550_dec_use,
13395 + client_register: pb1550_reg,
13396 + client_unregister: pb1550_unreg,
13397 + client_count: 0,
13398 +};
13399 +
13400 +int __init
13401 +i2c_pb1550_init(void)
13402 +{
13403 + /* This is where we would set up a 50MHz clock source
13404 + * and routing. On the Pb1550, the SMBus is PSC2, which
13405 + * uses a shared clock with USB. This has been already
13406 + * configured by Yamon as a 48MHz clock, close enough
13407 + * for our work.
13408 + */
13409 + if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
13410 + return -ENODEV;
13411 +
13412 + return 0;
13413 +}
13414 +
13415 +/* BIG hack to support the control interface on the Wolfson WM8731
13416 + * audio codec on the Pb1550 board. We get an address and two data
13417 + * bytes to write, create an i2c message, and send it across the
13418 + * i2c transfer function. We do this here because we have access to
13419 + * the i2c adapter structure.
13420 + */
13421 +static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */
13422 +static u8 i2cbuf[2];
13423 +
13424 +int
13425 +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
13426 +{
13427 + wm_i2c_msg.addr = addr;
13428 + wm_i2c_msg.flags = 0;
13429 + wm_i2c_msg.buf = i2cbuf;
13430 + wm_i2c_msg.len = 2;
13431 + i2cbuf[0] = reg;
13432 + i2cbuf[1] = val;
13433 +
13434 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
13435 +}
13436 +
13437 +/* the next function is needed by DVB driver. */
13438 +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
13439 +{
13440 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
13441 +}
13442 +
13443 +EXPORT_SYMBOL(pb1550_wm_codec_write);
13444 +EXPORT_SYMBOL(pb1550_i2c_xfer);
13445 +
13446 +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
13447 +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
13448 +MODULE_LICENSE("GPL");
13449 +
13450 +int
13451 +init_module(void)
13452 +{
13453 + return i2c_pb1550_init();
13454 +}
13455 +
13456 +void
13457 +cleanup_module(void)
13458 +{
13459 + i2c_au1550_del_bus(&pb1550_board_adapter);
13460 +}
13461 diff -Nur linux-2.4.29/drivers/i2c/i2c-core.c linux-mips/drivers/i2c/i2c-core.c
13462 --- linux-2.4.29/drivers/i2c/i2c-core.c 2005-01-19 15:09:54.000000000 +0100
13463 +++ linux-mips/drivers/i2c/i2c-core.c 2004-11-29 18:47:16.000000000 +0100
13464 @@ -1280,6 +1280,9 @@
13465 #ifdef CONFIG_I2C_MAX1617
13466 extern int i2c_max1617_init(void);
13467 #endif
13468 +#ifdef CONFIG_I2C_ALGO_AU1550
13469 + extern int i2c_pb1550_init(void);
13470 +#endif
13471
13472 #ifdef CONFIG_I2C_PROC
13473 extern int sensors_init(void);
13474 @@ -1335,6 +1338,10 @@
13475 i2c_max1617_init();
13476 #endif
13477
13478 +#ifdef CONFIG_I2C_ALGO_AU1550
13479 + i2c_pb1550_init();
13480 +#endif
13481 +
13482 /* -------------- proc interface ---- */
13483 #ifdef CONFIG_I2C_PROC
13484 sensors_init();
13485 diff -Nur linux-2.4.29/drivers/i2c/Makefile linux-mips/drivers/i2c/Makefile
13486 --- linux-2.4.29/drivers/i2c/Makefile 2004-02-18 14:36:31.000000000 +0100
13487 +++ linux-mips/drivers/i2c/Makefile 2005-02-11 20:49:04.000000000 +0100
13488 @@ -6,7 +6,7 @@
13489
13490 export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
13491 i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
13492 - i2c-proc.o
13493 + i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
13494
13495 obj-$(CONFIG_I2C) += i2c-core.o
13496 obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
13497 @@ -25,6 +25,7 @@
13498 obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
13499 obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
13500 obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
13501 +obj-$(CONFIG_I2C_ALGO_AU1550) += i2c-algo-au1550.o i2c-au1550.o
13502
13503 # This is needed for automatic patch generation: sensors code starts here
13504 # This is needed for automatic patch generation: sensors code ends here
13505 diff -Nur linux-2.4.29/drivers/media/video/indycam.c linux-mips/drivers/media/video/indycam.c
13506 --- linux-2.4.29/drivers/media/video/indycam.c 2004-02-18 14:36:31.000000000 +0100
13507 +++ linux-mips/drivers/media/video/indycam.c 2004-12-09 21:32:05.000000000 +0100
13508 @@ -50,13 +50,14 @@
13509 0x80, /* INDYCAM_GAMMA */
13510 };
13511
13512 - int err = 0;
13513 struct indycam *camera;
13514 struct i2c_client *client;
13515 + int err = 0;
13516
13517 client = kmalloc(sizeof(*client), GFP_KERNEL);
13518 - if (!client)
13519 + if (!client)
13520 return -ENOMEM;
13521 +
13522 camera = kmalloc(sizeof(*camera), GFP_KERNEL);
13523 if (!camera) {
13524 err = -ENOMEM;
13525 @@ -67,7 +68,7 @@
13526 client->adapter = adap;
13527 client->addr = addr;
13528 client->driver = &i2c_driver_indycam;
13529 - strcpy(client->name, "IndyCam client");
13530 + strcpy(client->name, "IndyCam client");
13531 camera->client = client;
13532
13533 err = i2c_attach_client(client);
13534 @@ -75,18 +76,18 @@
13535 goto out_free_camera;
13536
13537 camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
13538 - if (camera->version != CAMERA_VERSION_INDY &&
13539 - camera->version != CAMERA_VERSION_MOOSE) {
13540 + if ((camera->version != CAMERA_VERSION_INDY) &&
13541 + (camera->version != CAMERA_VERSION_MOOSE)) {
13542 err = -ENODEV;
13543 goto out_detach_client;
13544 }
13545 - printk(KERN_INFO "Indycam v%d.%d detected.\n",
13546 + printk(KERN_INFO "IndyCam v%d.%d detected.\n",
13547 INDYCAM_VERSION_MAJOR(camera->version),
13548 INDYCAM_VERSION_MINOR(camera->version));
13549
13550 err = i2c_master_send(client, initseq, sizeof(initseq));
13551 if (err)
13552 - printk(KERN_INFO "IndyCam initalization failed\n");
13553 + printk(KERN_ERR "IndyCam initalization failed.\n");
13554
13555 MOD_INC_USE_COUNT;
13556 return 0;
13557 diff -Nur linux-2.4.29/drivers/media/video/vino.c linux-mips/drivers/media/video/vino.c
13558 --- linux-2.4.29/drivers/media/video/vino.c 2004-02-18 14:36:31.000000000 +0100
13559 +++ linux-mips/drivers/media/video/vino.c 2004-12-10 05:02:54.000000000 +0100
13560 @@ -5,6 +5,8 @@
13561 * License version 2 as published by the Free Software Foundation.
13562 *
13563 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
13564 + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
13565 + *
13566 */
13567
13568 #include <linux/module.h>
13569 @@ -37,13 +39,23 @@
13570 #define DEBUG(x...)
13571 #endif
13572
13573 +/* Channels (who could have guessed) */
13574 +#define VINO_CHAN_NONE 0
13575 +#define VINO_CHAN_A 1
13576 +#define VINO_CHAN_B 2
13577 +
13578 /* VINO video size */
13579 #define VINO_PAL_WIDTH 768
13580 #define VINO_PAL_HEIGHT 576
13581 #define VINO_NTSC_WIDTH 646
13582 #define VINO_NTSC_HEIGHT 486
13583
13584 -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
13585 +/* Minimum value for Y-clipping (for smaller values the images
13586 + * will be corrupted) */
13587 +#define VINO_MIN_Y_CLIPPING 2
13588 +
13589 +/* Set these to some sensible values.
13590 + * Note: the picture width has to be divisible by 8 */
13591 #define VINO_MIN_WIDTH 32
13592 #define VINO_MIN_HEIGHT 32
13593
13594 @@ -64,9 +76,7 @@
13595
13596 struct vino_device {
13597 struct video_device vdev;
13598 -#define VINO_CHAN_A 1
13599 -#define VINO_CHAN_B 2
13600 - int chan;
13601 + int chan; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
13602 int alpha;
13603 /* clipping... */
13604 unsigned int left, right, top, bottom;
13605 @@ -106,7 +116,7 @@
13606
13607 struct vino_client {
13608 struct i2c_client *driver;
13609 - int owner;
13610 + int owner; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
13611 };
13612
13613 struct vino_video {
13614 @@ -362,6 +372,7 @@
13615 static int dma_setup(struct vino_device *v)
13616 {
13617 u32 ctrl, intr;
13618 + int ofs;
13619 struct sgi_vino_channel *ch;
13620
13621 ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
13622 @@ -377,14 +388,24 @@
13623 ch->line_size = v->line_size - 8;
13624 /* set the alpha register */
13625 ch->alpha = v->alpha;
13626 - /* set cliping registers */
13627 - ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
13628 + /* Set the clipping registers, this is the constant source of fun :)
13629 + * Y clipping start has to be >= 2 and end has to be start + height/2
13630 + * The values of top and bottom are even so dividing is not a problem
13631 + *
13632 + * The docs say that clipping values for the even field should be
13633 + * odd_end + something_to_skip_vertical_blanking + some_lines and
13634 + * even_start + height/2, though the image is good this way also
13635 + *
13636 + * TODO: for analog sources (SAA7191), the clipping values are a bit
13637 + * different and that case isn't yet handled
13638 + */
13639 + ofs = VINO_MIN_Y_CLIPPING; /* Should depend on input source */
13640 + ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
13641 + VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
13642 VINO_CLIP_X(v->left);
13643 - ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
13644 + ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
13645 + VINO_CLIP_EVEN(ofs + v->bottom / 2) |
13646 VINO_CLIP_X(v->right);
13647 - /* FIXME: end-of-field bug workaround
13648 - VINO_CLIP_X(VINO_PAL_WIDTH);
13649 - */
13650 /* init the frame rate and norm (full frame rate only for now...) */
13651 ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
13652 (get_capture_norm(v) == VIDEO_MODE_PAL ?
13653 @@ -510,6 +531,7 @@
13654 static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
13655 {
13656 u32 intr, ctrl;
13657 + int a_eof, b_eof;
13658
13659 spin_lock(&Vino->vino_lock);
13660 ctrl = vino->control;
13661 @@ -525,12 +547,14 @@
13662 vino->control = ctrl;
13663 clear_eod(&Vino->chB);
13664 }
13665 + a_eof = intr & VINO_INTSTAT_A_EOF;
13666 + b_eof = intr & VINO_INTSTAT_B_EOF;
13667 vino->intr_status = ~intr;
13668 spin_unlock(&Vino->vino_lock);
13669 - /* FIXME: For now we are assuming that interrupt means that frame is
13670 - * done. That's not true, but we can live with such brokeness for
13671 - * a while ;-) */
13672 - field_done(&Vino->chA);
13673 + if (a_eof)
13674 + field_done(&Vino->chA);
13675 + if (b_eof)
13676 + field_done(&Vino->chB);
13677 }
13678
13679 static int vino_grab(struct vino_device *v, int frame)
13680 diff -Nur linux-2.4.29/drivers/mtd/devices/docprobe.c linux-mips/drivers/mtd/devices/docprobe.c
13681 --- linux-2.4.29/drivers/mtd/devices/docprobe.c 2003-06-13 16:51:34.000000000 +0200
13682 +++ linux-mips/drivers/mtd/devices/docprobe.c 2003-06-16 01:42:21.000000000 +0200
13683 @@ -89,10 +89,10 @@
13684 0xe4000000,
13685 #elif defined(CONFIG_MOMENCO_OCELOT)
13686 0x2f000000,
13687 - 0xff000000,
13688 + 0xff000000,
13689 #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
13690 - 0xff000000,
13691 -##else
13692 + 0xff000000,
13693 +#else
13694 #warning Unknown architecture for DiskOnChip. No default probe locations defined
13695 #endif
13696 0 };
13697 diff -Nur linux-2.4.29/drivers/mtd/devices/ms02-nv.c linux-mips/drivers/mtd/devices/ms02-nv.c
13698 --- linux-2.4.29/drivers/mtd/devices/ms02-nv.c 2003-06-13 16:51:34.000000000 +0200
13699 +++ linux-mips/drivers/mtd/devices/ms02-nv.c 2004-07-30 12:22:40.000000000 +0200
13700 @@ -1,10 +1,10 @@
13701 /*
13702 - * Copyright (c) 2001 Maciej W. Rozycki
13703 + * Copyright (c) 2001 Maciej W. Rozycki
13704 *
13705 - * This program is free software; you can redistribute it and/or
13706 - * modify it under the terms of the GNU General Public License
13707 - * as published by the Free Software Foundation; either version
13708 - * 2 of the License, or (at your option) any later version.
13709 + * This program is free software; you can redistribute it and/or
13710 + * modify it under the terms of the GNU General Public License
13711 + * as published by the Free Software Foundation; either version
13712 + * 2 of the License, or (at your option) any later version.
13713 *
13714 * $Id: ms02-nv.c,v 1.2 2003/01/24 14:05:17 dwmw2 Exp $
13715 */
13716 @@ -29,18 +29,18 @@
13717
13718
13719 static char version[] __initdata =
13720 - "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
13721 + "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
13722
13723 -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
13724 +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
13725 MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
13726 MODULE_LICENSE("GPL");
13727
13728
13729 /*
13730 * Addresses we probe for an MS02-NV at. Modules may be located
13731 - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
13732 - * boundary within a 0MB up to 448MB range. We don't support a module
13733 - * at 0MB, though.
13734 + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
13735 + * boundary within a 0MiB up to 448MiB range. We don't support a module
13736 + * at 0MiB, though.
13737 */
13738 static ulong ms02nv_addrs[] __initdata = {
13739 0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
13740 @@ -130,7 +130,7 @@
13741
13742 int ret = -ENODEV;
13743
13744 - /* The module decodes 8MB of address space. */
13745 + /* The module decodes 8MiB of address space. */
13746 mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
13747 if (!mod_res)
13748 return -ENOMEM;
13749 @@ -233,7 +233,7 @@
13750 goto err_out_csr_res;
13751 }
13752
13753 - printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
13754 + printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
13755 mtd->index, ms02nv_name, addr, size >> 20);
13756
13757 mp->next = root_ms02nv_mtd;
13758 @@ -293,12 +293,12 @@
13759
13760 switch (mips_machtype) {
13761 case MACH_DS5000_200:
13762 - csr = (volatile u32 *)KN02_CSR_ADDR;
13763 + csr = (volatile u32 *)KN02_CSR_BASE;
13764 if (*csr & KN02_CSR_BNK32M)
13765 stride = 2;
13766 break;
13767 case MACH_DS5000_2X0:
13768 - case MACH_DS5000:
13769 + case MACH_DS5900:
13770 csr = (volatile u32 *)KN03_MCR_BASE;
13771 if (*csr & KN03_MCR_BNK32M)
13772 stride = 2;
13773 diff -Nur linux-2.4.29/drivers/mtd/devices/ms02-nv.h linux-mips/drivers/mtd/devices/ms02-nv.h
13774 --- linux-2.4.29/drivers/mtd/devices/ms02-nv.h 2002-11-29 00:53:13.000000000 +0100
13775 +++ linux-mips/drivers/mtd/devices/ms02-nv.h 2004-07-30 12:22:40.000000000 +0200
13776 @@ -1,32 +1,96 @@
13777 /*
13778 - * Copyright (c) 2001 Maciej W. Rozycki
13779 + * Copyright (c) 2001, 2003 Maciej W. Rozycki
13780 *
13781 - * This program is free software; you can redistribute it and/or
13782 - * modify it under the terms of the GNU General Public License
13783 - * as published by the Free Software Foundation; either version
13784 - * 2 of the License, or (at your option) any later version.
13785 + * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
13786 + * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
13787 + * systems.
13788 + *
13789 + * This program is free software; you can redistribute it and/or
13790 + * modify it under the terms of the GNU General Public License
13791 + * as published by the Free Software Foundation; either version
13792 + * 2 of the License, or (at your option) any later version.
13793 + *
13794 + * $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
13795 */
13796
13797 #include <linux/ioport.h>
13798 #include <linux/mtd/mtd.h>
13799
13800 +/*
13801 + * Addresses are decoded as follows:
13802 + *
13803 + * 0x000000 - 0x3fffff SRAM
13804 + * 0x400000 - 0x7fffff CSR
13805 + *
13806 + * Within the SRAM area the following ranges are forced by the system
13807 + * firmware:
13808 + *
13809 + * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
13810 + * 0x000400 - ENDofRAM storage area, available to operating systems
13811 + *
13812 + * but we can't really use the available area right from 0x000400 as
13813 + * the first word is used by the firmware as a status flag passed
13814 + * from an operating system. If anything but the valid data magic
13815 + * ID value is found, the firmware considers the SRAM clean, i.e.
13816 + * containing no valid data, and disables the battery resulting in
13817 + * data being erased as soon as power is switched off. So the choice
13818 + * for the start address of the user-available is 0x001000 which is
13819 + * nicely page aligned. The area between 0x000404 and 0x000fff may
13820 + * be used by the driver for own needs.
13821 + *
13822 + * The diagnostic area defines two status words to be read by an
13823 + * operating system, a magic ID to distinguish a MS02-NV board from
13824 + * anything else and a status information providing results of tests
13825 + * as well as the size of SRAM available, which can be 1MiB or 2MiB
13826 + * (that's what the firmware handles; no idea if 2MiB modules ever
13827 + * existed).
13828 + *
13829 + * The firmware only handles the MS02-NV board if installed in the
13830 + * last (15th) slot, so for any other location the status information
13831 + * stored in the SRAM cannot be relied upon. But from the hardware
13832 + * point of view there is no problem using up to 14 such boards in a
13833 + * system -- only the 1st slot needs to be filled with a DRAM module.
13834 + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
13835 + *
13836 + * The state of the battery as provided by the CSR is reflected on
13837 + * the two onboard LEDs. When facing the battery side of the board,
13838 + * with the LEDs at the top left and the battery at the bottom right
13839 + * (i.e. looking from the back side of the system box), their meaning
13840 + * is as follows (the system has to be powered on):
13841 + *
13842 + * left LED battery disable status: lit = enabled
13843 + * right LED battery condition status: lit = OK
13844 + */
13845 +
13846 /* MS02-NV iomem register offsets. */
13847 #define MS02NV_CSR 0x400000 /* control & status register */
13848
13849 +/* MS02-NV CSR status bits. */
13850 +#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
13851 +#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
13852 +
13853 +
13854 /* MS02-NV memory offsets. */
13855 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */
13856 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
13857 -#define MS02NV_RAM 0x000400 /* general-purpose RAM start */
13858 +#define MS02NV_VALID 0x000400 /* valid data magic ID */
13859 +#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
13860
13861 -/* MS02-NV diagnostic status constants. */
13862 -#define MS02NV_DIAG_SIZE_MASK 0xf0 /* RAM size mask */
13863 -#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* RAM size shift (left) */
13864 +/* MS02-NV diagnostic status bits. */
13865 +#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
13866 +#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
13867 +#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
13868 +#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
13869 +#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
13870 +#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
13871
13872 /* MS02-NV general constants. */
13873 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
13874 +#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
13875 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
13876 decoded by the module */
13877
13878 +
13879 typedef volatile u32 ms02nv_uint;
13880
13881 struct ms02nv_private {
13882 diff -Nur linux-2.4.29/drivers/mtd/maps/Config.in linux-mips/drivers/mtd/maps/Config.in
13883 --- linux-2.4.29/drivers/mtd/maps/Config.in 2003-06-13 16:51:34.000000000 +0200
13884 +++ linux-mips/drivers/mtd/maps/Config.in 2004-02-26 01:46:35.000000000 +0100
13885 @@ -51,11 +51,26 @@
13886 dep_tristate ' Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
13887 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
13888 dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
13889 + dep_tristate ' Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
13890 + dep_tristate ' XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
13891 + dep_tristate ' MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
13892 if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
13893 -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
13894 bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT
13895 bool ' Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
13896 fi
13897 + tristate ' Db1x00 MTD support' CONFIG_MTD_DB1X00
13898 + if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
13899 + bool ' Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT
13900 + bool ' Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
13901 + fi
13902 + tristate ' Pb1550 MTD support' CONFIG_MTD_PB1550
13903 + if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
13904 + bool ' Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
13905 + bool ' Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
13906 + fi
13907 + dep_tristate ' Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
13908 + dep_tristate ' Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
13909 dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
13910 if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
13911 hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
13912 diff -Nur linux-2.4.29/drivers/mtd/maps/db1x00-flash.c linux-mips/drivers/mtd/maps/db1x00-flash.c
13913 --- linux-2.4.29/drivers/mtd/maps/db1x00-flash.c 1970-01-01 01:00:00.000000000 +0100
13914 +++ linux-mips/drivers/mtd/maps/db1x00-flash.c 2005-02-03 07:35:29.000000000 +0100
13915 @@ -0,0 +1,283 @@
13916 +/*
13917 + * Flash memory access on Alchemy Db1xxx boards
13918 + *
13919 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
13920 + *
13921 + */
13922 +
13923 +#include <linux/config.h>
13924 +#include <linux/module.h>
13925 +#include <linux/types.h>
13926 +#include <linux/kernel.h>
13927 +
13928 +#include <linux/mtd/mtd.h>
13929 +#include <linux/mtd/map.h>
13930 +#include <linux/mtd/partitions.h>
13931 +
13932 +#include <asm/io.h>
13933 +#include <asm/au1000.h>
13934 +#include <asm/db1x00.h>
13935 +
13936 +#ifdef DEBUG_RW
13937 +#define DBG(x...) printk(x)
13938 +#else
13939 +#define DBG(x...)
13940 +#endif
13941 +
13942 +static unsigned long window_addr;
13943 +static unsigned long window_size;
13944 +static unsigned long flash_size;
13945 +
13946 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
13947 +{
13948 + __u8 ret;
13949 + ret = __raw_readb(map->map_priv_1 + ofs);
13950 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13951 + return ret;
13952 +}
13953 +
13954 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
13955 +{
13956 + __u16 ret;
13957 + ret = __raw_readw(map->map_priv_1 + ofs);
13958 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13959 + return ret;
13960 +}
13961 +
13962 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
13963 +{
13964 + __u32 ret;
13965 + ret = __raw_readl(map->map_priv_1 + ofs);
13966 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13967 + return ret;
13968 +}
13969 +
13970 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
13971 +{
13972 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
13973 + memcpy_fromio(to, map->map_priv_1 + from, len);
13974 +}
13975 +
13976 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
13977 +{
13978 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13979 + __raw_writeb(d, map->map_priv_1 + adr);
13980 + mb();
13981 +}
13982 +
13983 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
13984 +{
13985 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13986 + __raw_writew(d, map->map_priv_1 + adr);
13987 + mb();
13988 +}
13989 +
13990 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
13991 +{
13992 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13993 + __raw_writel(d, map->map_priv_1 + adr);
13994 + mb();
13995 +}
13996 +
13997 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
13998 +{
13999 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14000 + memcpy_toio(map->map_priv_1 + to, from, len);
14001 +}
14002 +
14003 +static struct map_info db1x00_map = {
14004 + name: "Db1x00 flash",
14005 + read8: physmap_read8,
14006 + read16: physmap_read16,
14007 + read32: physmap_read32,
14008 + copy_from: physmap_copy_from,
14009 + write8: physmap_write8,
14010 + write16: physmap_write16,
14011 + write32: physmap_write32,
14012 + copy_to: physmap_copy_to,
14013 +};
14014 +
14015 +static unsigned char flash_buswidth = 4;
14016 +
14017 +/*
14018 + * The Db1x boards support different flash densities. We setup
14019 + * the mtd_partition structures below for default of 64Mbit
14020 + * flash densities, and override the partitions sizes, if
14021 + * necessary, after we check the board status register.
14022 + */
14023 +
14024 +#ifdef DB1X00_BOTH_BANKS
14025 +/* both banks will be used. Combine the first bank and the first
14026 + * part of the second bank together into a single jffs/jffs2
14027 + * partition.
14028 + */
14029 +static struct mtd_partition db1x00_partitions[] = {
14030 + {
14031 + name: "User FS",
14032 + size: 0x1c00000,
14033 + offset: 0x0000000
14034 + },{
14035 + name: "yamon",
14036 + size: 0x0100000,
14037 + offset: MTDPART_OFS_APPEND,
14038 + mask_flags: MTD_WRITEABLE
14039 + },{
14040 + name: "raw kernel",
14041 + size: (0x300000-0x40000), /* last 256KB is yamon env */
14042 + offset: MTDPART_OFS_APPEND,
14043 + }
14044 +};
14045 +#elif defined(DB1X00_BOOT_ONLY)
14046 +static struct mtd_partition db1x00_partitions[] = {
14047 + {
14048 + name: "User FS",
14049 + size: 0x00c00000,
14050 + offset: 0x0000000
14051 + },{
14052 + name: "yamon",
14053 + size: 0x0100000,
14054 + offset: MTDPART_OFS_APPEND,
14055 + mask_flags: MTD_WRITEABLE
14056 + },{
14057 + name: "raw kernel",
14058 + size: (0x300000-0x40000), /* last 256KB is yamon env */
14059 + offset: MTDPART_OFS_APPEND,
14060 + }
14061 +};
14062 +#elif defined(DB1X00_USER_ONLY)
14063 +static struct mtd_partition db1x00_partitions[] = {
14064 + {
14065 + name: "User FS",
14066 + size: 0x0e00000,
14067 + offset: 0x0000000
14068 + },{
14069 + name: "raw kernel",
14070 + size: MTDPART_SIZ_FULL,
14071 + offset: MTDPART_OFS_APPEND,
14072 + }
14073 +};
14074 +#else
14075 +#error MTD_DB1X00 define combo error /* should never happen */
14076 +#endif
14077 +
14078 +
14079 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14080 +
14081 +static struct mtd_partition *parsed_parts;
14082 +static struct mtd_info *mymtd;
14083 +
14084 +/*
14085 + * Probe the flash density and setup window address and size
14086 + * based on user CONFIG options. There are times when we don't
14087 + * want the MTD driver to be probing the boot or user flash,
14088 + * so having the option to enable only one bank is important.
14089 + */
14090 +int setup_flash_params()
14091 +{
14092 + switch ((bcsr->status >> 14) & 0x3) {
14093 + case 0: /* 64Mbit devices */
14094 + flash_size = 0x800000; /* 8MB per part */
14095 +#if defined(DB1X00_BOTH_BANKS)
14096 + window_addr = 0x1E000000;
14097 + window_size = 0x2000000;
14098 +#elif defined(DB1X00_BOOT_ONLY)
14099 + window_addr = 0x1F000000;
14100 + window_size = 0x1000000;
14101 +#else /* USER ONLY */
14102 + window_addr = 0x1E000000;
14103 + window_size = 0x1000000;
14104 +#endif
14105 + break;
14106 + case 1:
14107 + /* 128 Mbit devices */
14108 + flash_size = 0x1000000; /* 16MB per part */
14109 +#if defined(DB1X00_BOTH_BANKS)
14110 + window_addr = 0x1C000000;
14111 + window_size = 0x4000000;
14112 + /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
14113 + db1x00_partitions[0].size = 0x3C00000;
14114 +#elif defined(DB1X00_BOOT_ONLY)
14115 + window_addr = 0x1E000000;
14116 + window_size = 0x2000000;
14117 + /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
14118 + db1x00_partitions[0].size = 0x1C00000;
14119 +#else /* USER ONLY */
14120 + window_addr = 0x1C000000;
14121 + window_size = 0x2000000;
14122 + /* USERFS from 0x1C00 0000 to 0x1DE00000 */
14123 + db1x00_partitions[0].size = 0x1DE0000;
14124 +#endif
14125 + break;
14126 + case 2:
14127 + /* 256 Mbit devices */
14128 + flash_size = 0x4000000; /* 64MB per part */
14129 +#if defined(DB1X00_BOTH_BANKS)
14130 + return 1;
14131 +#elif defined(DB1X00_BOOT_ONLY)
14132 + /* Boot ROM flash bank only; no user bank */
14133 + window_addr = 0x1C000000;
14134 + window_size = 0x4000000;
14135 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
14136 + db1x00_partitions[0].size = 0x3C00000;
14137 +#else /* USER ONLY */
14138 + return 1;
14139 +#endif
14140 + break;
14141 + default:
14142 + return 1;
14143 + }
14144 + return 0;
14145 +}
14146 +
14147 +int __init db1x00_mtd_init(void)
14148 +{
14149 + struct mtd_partition *parts;
14150 + int nb_parts = 0;
14151 + char *part_type;
14152 +
14153 + /* Default flash buswidth */
14154 + db1x00_map.buswidth = flash_buswidth;
14155 +
14156 + if (setup_flash_params())
14157 + return -ENXIO;
14158 +
14159 + /*
14160 + * Static partition definition selection
14161 + */
14162 + part_type = "static";
14163 + parts = db1x00_partitions;
14164 + nb_parts = NB_OF(db1x00_partitions);
14165 + db1x00_map.size = window_size;
14166 +
14167 + /*
14168 + * Now let's probe for the actual flash. Do it here since
14169 + * specific machine settings might have been set above.
14170 + */
14171 + printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
14172 + db1x00_map.buswidth*8);
14173 + db1x00_map.map_priv_1 =
14174 + (unsigned long)ioremap(window_addr, window_size);
14175 + mymtd = do_map_probe("cfi_probe", &db1x00_map);
14176 + if (!mymtd) return -ENXIO;
14177 + mymtd->module = THIS_MODULE;
14178 +
14179 + add_mtd_partitions(mymtd, parts, nb_parts);
14180 + return 0;
14181 +}
14182 +
14183 +static void __exit db1x00_mtd_cleanup(void)
14184 +{
14185 + if (mymtd) {
14186 + del_mtd_partitions(mymtd);
14187 + map_destroy(mymtd);
14188 + if (parsed_parts)
14189 + kfree(parsed_parts);
14190 + }
14191 +}
14192 +
14193 +module_init(db1x00_mtd_init);
14194 +module_exit(db1x00_mtd_cleanup);
14195 +
14196 +MODULE_AUTHOR("Pete Popov");
14197 +MODULE_DESCRIPTION("Db1x00 mtd map driver");
14198 +MODULE_LICENSE("GPL");
14199 diff -Nur linux-2.4.29/drivers/mtd/maps/hydrogen3-flash.c linux-mips/drivers/mtd/maps/hydrogen3-flash.c
14200 --- linux-2.4.29/drivers/mtd/maps/hydrogen3-flash.c 1970-01-01 01:00:00.000000000 +0100
14201 +++ linux-mips/drivers/mtd/maps/hydrogen3-flash.c 2004-01-10 23:40:18.000000000 +0100
14202 @@ -0,0 +1,189 @@
14203 +/*
14204 + * Flash memory access on Alchemy HydrogenIII boards
14205 + *
14206 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14207 + *
14208 + */
14209 +
14210 +#include <linux/config.h>
14211 +#include <linux/module.h>
14212 +#include <linux/types.h>
14213 +#include <linux/kernel.h>
14214 +
14215 +#include <linux/mtd/mtd.h>
14216 +#include <linux/mtd/map.h>
14217 +#include <linux/mtd/partitions.h>
14218 +
14219 +#include <asm/io.h>
14220 +#include <asm/au1000.h>
14221 +
14222 +#ifdef DEBUG_RW
14223 +#define DBG(x...) printk(x)
14224 +#else
14225 +#define DBG(x...)
14226 +#endif
14227 +
14228 +#define WINDOW_ADDR 0x1E000000
14229 +#define WINDOW_SIZE 0x02000000
14230 +
14231 +
14232 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14233 +{
14234 + __u8 ret;
14235 + ret = __raw_readb(map->map_priv_1 + ofs);
14236 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14237 + return ret;
14238 +}
14239 +
14240 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14241 +{
14242 + __u16 ret;
14243 + ret = __raw_readw(map->map_priv_1 + ofs);
14244 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14245 + return ret;
14246 +}
14247 +
14248 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14249 +{
14250 + __u32 ret;
14251 + ret = __raw_readl(map->map_priv_1 + ofs);
14252 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14253 + return ret;
14254 +}
14255 +
14256 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14257 +{
14258 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14259 + memcpy_fromio(to, map->map_priv_1 + from, len);
14260 +}
14261 +
14262 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14263 +{
14264 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14265 + __raw_writeb(d, map->map_priv_1 + adr);
14266 + mb();
14267 +}
14268 +
14269 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14270 +{
14271 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14272 + __raw_writew(d, map->map_priv_1 + adr);
14273 + mb();
14274 +}
14275 +
14276 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14277 +{
14278 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14279 + __raw_writel(d, map->map_priv_1 + adr);
14280 + mb();
14281 +}
14282 +
14283 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14284 +{
14285 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14286 + memcpy_toio(map->map_priv_1 + to, from, len);
14287 +}
14288 +
14289 +static struct map_info hydrogen3_map = {
14290 + name: "HydrogenIII flash",
14291 + read8: physmap_read8,
14292 + read16: physmap_read16,
14293 + read32: physmap_read32,
14294 + copy_from: physmap_copy_from,
14295 + write8: physmap_write8,
14296 + write16: physmap_write16,
14297 + write32: physmap_write32,
14298 + copy_to: physmap_copy_to,
14299 +};
14300 +
14301 +static unsigned char flash_buswidth = 4;
14302 +
14303 +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
14304 + * up the offsets. */
14305 +static struct mtd_partition hydrogen3_partitions[] = {
14306 + {
14307 + name: "User FS",
14308 + size: 0x1c00000,
14309 + offset: 0x0000000
14310 + },{
14311 + name: "yamon",
14312 + size: 0x0100000,
14313 + offset: MTDPART_OFS_APPEND,
14314 + mask_flags: MTD_WRITEABLE
14315 + },{
14316 + name: "raw kernel",
14317 + size: 0x02c0000,
14318 + offset: MTDPART_OFS_APPEND
14319 + }
14320 +};
14321 +
14322 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14323 +
14324 +static struct mtd_partition *parsed_parts;
14325 +static struct mtd_info *mymtd;
14326 +
14327 +int __init hydrogen3_mtd_init(void)
14328 +{
14329 + struct mtd_partition *parts;
14330 + int nb_parts = 0;
14331 + char *part_type;
14332 +
14333 + /* Default flash buswidth */
14334 + hydrogen3_map.buswidth = flash_buswidth;
14335 +
14336 + /*
14337 + * Static partition definition selection
14338 + */
14339 + part_type = "static";
14340 + parts = hydrogen3_partitions;
14341 + nb_parts = NB_OF(hydrogen3_partitions);
14342 + hydrogen3_map.size = WINDOW_SIZE;
14343 +
14344 + /*
14345 + * Now let's probe for the actual flash. Do it here since
14346 + * specific machine settings might have been set above.
14347 + */
14348 + printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n",
14349 + hydrogen3_map.buswidth*8);
14350 + hydrogen3_map.map_priv_1 =
14351 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
14352 + mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
14353 + if (!mymtd) return -ENXIO;
14354 + mymtd->module = THIS_MODULE;
14355 +
14356 + add_mtd_partitions(mymtd, parts, nb_parts);
14357 + return 0;
14358 +}
14359 +
14360 +static void __exit hydrogen3_mtd_cleanup(void)
14361 +{
14362 + if (mymtd) {
14363 + del_mtd_partitions(mymtd);
14364 + map_destroy(mymtd);
14365 + if (parsed_parts)
14366 + kfree(parsed_parts);
14367 + }
14368 +}
14369 +
14370 +/*#ifndef MODULE
14371 +
14372 +static int __init _bootflashonly(char *str)
14373 +{
14374 + bootflashonly = simple_strtol(str, NULL, 0);
14375 + return 1;
14376 +}
14377 +
14378 +
14379 +__setup("bootflashonly=", _bootflashonly);
14380 +
14381 +#endif*/
14382 +
14383 +
14384 +module_init(hydrogen3_mtd_init);
14385 +module_exit(hydrogen3_mtd_cleanup);
14386 +
14387 +MODULE_PARM(bootflashonly, "i");
14388 +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
14389 +MODULE_AUTHOR("Pete Popov");
14390 +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
14391 +MODULE_LICENSE("GPL");
14392 diff -Nur linux-2.4.29/drivers/mtd/maps/lasat.c linux-mips/drivers/mtd/maps/lasat.c
14393 --- linux-2.4.29/drivers/mtd/maps/lasat.c 2003-06-13 16:51:34.000000000 +0200
14394 +++ linux-mips/drivers/mtd/maps/lasat.c 2003-08-18 04:59:02.000000000 +0200
14395 @@ -1,15 +1,6 @@
14396 /*
14397 * Flash device on lasat 100 and 200 boards
14398 *
14399 - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
14400 - * works for.
14401 - *
14402 - * This program is free software; you can redistribute it and/or
14403 - * modify it under the terms of the GNU General Public License version
14404 - * 2 as published by the Free Software Foundation.
14405 - *
14406 - * $Id: lasat.c,v 1.1 2003/01/24 14:26:38 dwmw2 Exp $
14407 - *
14408 */
14409
14410 #include <linux/module.h>
14411 @@ -21,7 +12,6 @@
14412 #include <linux/mtd/partitions.h>
14413 #include <linux/config.h>
14414 #include <asm/lasat/lasat.h>
14415 -#include <asm/lasat/lasat_mtd.h>
14416
14417 static struct mtd_info *mymtd;
14418
14419 @@ -69,30 +59,33 @@
14420 }
14421
14422 static struct map_info sp_map = {
14423 - .name = "SP flash",
14424 - .buswidth = 4,
14425 - .read8 = sp_read8,
14426 - .read16 = sp_read16,
14427 - .read32 = sp_read32,
14428 - .copy_from = sp_copy_from,
14429 - .write8 = sp_write8,
14430 - .write16 = sp_write16,
14431 - .write32 = sp_write32,
14432 - .copy_to = sp_copy_to
14433 + name: "SP flash",
14434 + buswidth: 4,
14435 + read8: sp_read8,
14436 + read16: sp_read16,
14437 + read32: sp_read32,
14438 + copy_from: sp_copy_from,
14439 + write8: sp_write8,
14440 + write16: sp_write16,
14441 + write32: sp_write32,
14442 + copy_to: sp_copy_to
14443 };
14444
14445 static struct mtd_partition partition_info[LASAT_MTD_LAST];
14446 -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
14447 +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
14448
14449 static int __init init_sp(void)
14450 {
14451 int i;
14452 + int nparts = 0;
14453 /* this does not play well with the old flash code which
14454 * protects and uprotects the flash when necessary */
14455 printk(KERN_NOTICE "Unprotecting flash\n");
14456 *lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
14457
14458 - sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
14459 + sp_map.map_priv_1 = ioremap_nocache(
14460 + lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
14461 + lasat_board_info.li_flash_size);
14462 sp_map.size = lasat_board_info.li_flash_size;
14463
14464 printk(KERN_NOTICE "sp flash device: %lx at %lx\n",
14465 @@ -109,12 +102,15 @@
14466
14467 for (i=0; i < LASAT_MTD_LAST; i++) {
14468 size = lasat_flash_partition_size(i);
14469 - partition_info[i].size = size;
14470 - partition_info[i].offset = offset;
14471 - offset += size;
14472 + if (size != 0) {
14473 + nparts++;
14474 + partition_info[i].size = size;
14475 + partition_info[i].offset = offset;
14476 + offset += size;
14477 + }
14478 }
14479
14480 - add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
14481 + add_mtd_partitions( mymtd, partition_info, nparts );
14482 return 0;
14483 }
14484
14485 @@ -124,11 +120,11 @@
14486 static void __exit cleanup_sp(void)
14487 {
14488 if (mymtd) {
14489 - del_mtd_partitions(mymtd);
14490 - map_destroy(mymtd);
14491 + del_mtd_partitions(mymtd);
14492 + map_destroy(mymtd);
14493 }
14494 if (sp_map.map_priv_1) {
14495 - sp_map.map_priv_1 = 0;
14496 + sp_map.map_priv_1 = 0;
14497 }
14498 }
14499
14500 diff -Nur linux-2.4.29/drivers/mtd/maps/Makefile linux-mips/drivers/mtd/maps/Makefile
14501 --- linux-2.4.29/drivers/mtd/maps/Makefile 2003-06-13 16:51:34.000000000 +0200
14502 +++ linux-mips/drivers/mtd/maps/Makefile 2004-02-26 01:46:35.000000000 +0100
14503 @@ -52,7 +52,13 @@
14504 obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
14505 obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
14506 obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
14507 +obj-$(CONFIG_MTD_XXS1500) += xxs1500.o
14508 +obj-$(CONFIG_MTD_MTX1) += mtx-1.o
14509 obj-$(CONFIG_MTD_LASAT) += lasat.o
14510 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
14511 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
14512 +obj-$(CONFIG_MTD_HYDROGEN3) += hydrogen3-flash.o
14513 +obj-$(CONFIG_MTD_BOSPORUS) += pb1xxx-flash.o
14514 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
14515 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
14516 obj-$(CONFIG_MTD_IMPA7) += impa7.o
14517 @@ -61,5 +67,6 @@
14518 obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
14519 obj-$(CONFIG_MTD_NETtel) += nettel.o
14520 obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
14521 +obj-$(CONFIG_MTD_MIRAGE) += mirage-flash.o
14522
14523 include $(TOPDIR)/Rules.make
14524 diff -Nur linux-2.4.29/drivers/mtd/maps/mirage-flash.c linux-mips/drivers/mtd/maps/mirage-flash.c
14525 --- linux-2.4.29/drivers/mtd/maps/mirage-flash.c 1970-01-01 01:00:00.000000000 +0100
14526 +++ linux-mips/drivers/mtd/maps/mirage-flash.c 2003-12-22 04:37:22.000000000 +0100
14527 @@ -0,0 +1,194 @@
14528 +/*
14529 + * Flash memory access on AMD Mirage board.
14530 + *
14531 + * (C) 2003 Embedded Edge
14532 + * based on mirage-flash.c:
14533 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14534 + *
14535 + */
14536 +
14537 +#include <linux/config.h>
14538 +#include <linux/module.h>
14539 +#include <linux/types.h>
14540 +#include <linux/kernel.h>
14541 +
14542 +#include <linux/mtd/mtd.h>
14543 +#include <linux/mtd/map.h>
14544 +#include <linux/mtd/partitions.h>
14545 +
14546 +#include <asm/io.h>
14547 +#include <asm/au1000.h>
14548 +//#include <asm/mirage.h>
14549 +
14550 +#ifdef DEBUG_RW
14551 +#define DBG(x...) printk(x)
14552 +#else
14553 +#define DBG(x...)
14554 +#endif
14555 +
14556 +static unsigned long window_addr;
14557 +static unsigned long window_size;
14558 +static unsigned long flash_size;
14559 +
14560 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14561 +{
14562 + __u8 ret;
14563 + ret = __raw_readb(map->map_priv_1 + ofs);
14564 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14565 + return ret;
14566 +}
14567 +
14568 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14569 +{
14570 + __u16 ret;
14571 + ret = __raw_readw(map->map_priv_1 + ofs);
14572 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14573 + return ret;
14574 +}
14575 +
14576 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14577 +{
14578 + __u32 ret;
14579 + ret = __raw_readl(map->map_priv_1 + ofs);
14580 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14581 + return ret;
14582 +}
14583 +
14584 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14585 +{
14586 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14587 + memcpy_fromio(to, map->map_priv_1 + from, len);
14588 +}
14589 +
14590 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14591 +{
14592 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14593 + __raw_writeb(d, map->map_priv_1 + adr);
14594 + mb();
14595 +}
14596 +
14597 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14598 +{
14599 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14600 + __raw_writew(d, map->map_priv_1 + adr);
14601 + mb();
14602 +}
14603 +
14604 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14605 +{
14606 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14607 + __raw_writel(d, map->map_priv_1 + adr);
14608 + mb();
14609 +}
14610 +
14611 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14612 +{
14613 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14614 + memcpy_toio(map->map_priv_1 + to, from, len);
14615 +}
14616 +
14617 +static struct map_info mirage_map = {
14618 + name: "Mirage flash",
14619 + read8: physmap_read8,
14620 + read16: physmap_read16,
14621 + read32: physmap_read32,
14622 + copy_from: physmap_copy_from,
14623 + write8: physmap_write8,
14624 + write16: physmap_write16,
14625 + write32: physmap_write32,
14626 + copy_to: physmap_copy_to,
14627 +};
14628 +
14629 +static unsigned char flash_buswidth = 4;
14630 +
14631 +static struct mtd_partition mirage_partitions[] = {
14632 + {
14633 + name: "User FS",
14634 + size: 0x1c00000,
14635 + offset: 0x0000000
14636 + },{
14637 + name: "yamon",
14638 + size: 0x0100000,
14639 + offset: MTDPART_OFS_APPEND,
14640 + mask_flags: MTD_WRITEABLE
14641 + },{
14642 + name: "raw kernel",
14643 + size: (0x300000-0x40000), /* last 256KB is yamon env */
14644 + offset: MTDPART_OFS_APPEND,
14645 + }
14646 +};
14647 +
14648 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14649 +
14650 +static struct mtd_partition *parsed_parts;
14651 +static struct mtd_info *mymtd;
14652 +
14653 +/*
14654 + * Probe the flash density and setup window address and size
14655 + * based on user CONFIG options. There are times when we don't
14656 + * want the MTD driver to be probing the boot or user flash,
14657 + * so having the option to enable only one bank is important.
14658 + */
14659 +int setup_flash_params()
14660 +{
14661 + flash_size = 0x4000000; /* 64MB per part */
14662 + /* Boot ROM flash bank only; no user bank */
14663 + window_addr = 0x1C000000;
14664 + window_size = 0x4000000;
14665 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
14666 + mirage_partitions[0].size = 0x3C00000;
14667 + return 0;
14668 +}
14669 +
14670 +int __init mirage_mtd_init(void)
14671 +{
14672 + struct mtd_partition *parts;
14673 + int nb_parts = 0;
14674 + char *part_type;
14675 +
14676 + /* Default flash buswidth */
14677 + mirage_map.buswidth = flash_buswidth;
14678 +
14679 + if (setup_flash_params())
14680 + return -ENXIO;
14681 +
14682 + /*
14683 + * Static partition definition selection
14684 + */
14685 + part_type = "static";
14686 + parts = mirage_partitions;
14687 + nb_parts = NB_OF(mirage_partitions);
14688 + mirage_map.size = window_size;
14689 +
14690 + /*
14691 + * Now let's probe for the actual flash. Do it here since
14692 + * specific machine settings might have been set above.
14693 + */
14694 + printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n",
14695 + mirage_map.buswidth*8);
14696 + mirage_map.map_priv_1 =
14697 + (unsigned long)ioremap(window_addr, window_size);
14698 + mymtd = do_map_probe("cfi_probe", &mirage_map);
14699 + if (!mymtd) return -ENXIO;
14700 + mymtd->module = THIS_MODULE;
14701 +
14702 + add_mtd_partitions(mymtd, parts, nb_parts);
14703 + return 0;
14704 +}
14705 +
14706 +static void __exit mirage_mtd_cleanup(void)
14707 +{
14708 + if (mymtd) {
14709 + del_mtd_partitions(mymtd);
14710 + map_destroy(mymtd);
14711 + if (parsed_parts)
14712 + kfree(parsed_parts);
14713 + }
14714 +}
14715 +
14716 +module_init(mirage_mtd_init);
14717 +module_exit(mirage_mtd_cleanup);
14718 +
14719 +MODULE_AUTHOR("Embedded Edge");
14720 +MODULE_DESCRIPTION("Mirage mtd map driver");
14721 +MODULE_LICENSE("GPL");
14722 diff -Nur linux-2.4.29/drivers/mtd/maps/mtx-1.c linux-mips/drivers/mtd/maps/mtx-1.c
14723 --- linux-2.4.29/drivers/mtd/maps/mtx-1.c 1970-01-01 01:00:00.000000000 +0100
14724 +++ linux-mips/drivers/mtd/maps/mtx-1.c 2003-06-27 02:04:35.000000000 +0200
14725 @@ -0,0 +1,181 @@
14726 +/*
14727 + * Flash memory access on 4G Systems MTX-1 board
14728 + *
14729 + * (C) 2003 Pete Popov <ppopov@mvista.com>
14730 + * Bruno Randolf <bruno.randolf@4g-systems.de>
14731 + */
14732 +
14733 +#include <linux/config.h>
14734 +#include <linux/module.h>
14735 +#include <linux/types.h>
14736 +#include <linux/kernel.h>
14737 +
14738 +#include <linux/mtd/mtd.h>
14739 +#include <linux/mtd/map.h>
14740 +#include <linux/mtd/partitions.h>
14741 +
14742 +#include <asm/io.h>
14743 +#include <asm/au1000.h>
14744 +
14745 +#ifdef DEBUG_RW
14746 +#define DBG(x...) printk(x)
14747 +#else
14748 +#define DBG(x...)
14749 +#endif
14750 +
14751 +#ifdef CONFIG_MIPS_MTX1
14752 +#define WINDOW_ADDR 0x1E000000
14753 +#define WINDOW_SIZE 0x2000000
14754 +#endif
14755 +
14756 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14757 +{
14758 + __u8 ret;
14759 + ret = __raw_readb(map->map_priv_1 + ofs);
14760 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14761 + return ret;
14762 +}
14763 +
14764 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14765 +{
14766 + __u16 ret;
14767 + ret = __raw_readw(map->map_priv_1 + ofs);
14768 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14769 + return ret;
14770 +}
14771 +
14772 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14773 +{
14774 + __u32 ret;
14775 + ret = __raw_readl(map->map_priv_1 + ofs);
14776 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14777 + return ret;
14778 +}
14779 +
14780 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14781 +{
14782 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14783 + memcpy_fromio(to, map->map_priv_1 + from, len);
14784 +}
14785 +
14786 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14787 +{
14788 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14789 + __raw_writeb(d, map->map_priv_1 + adr);
14790 + mb();
14791 +}
14792 +
14793 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14794 +{
14795 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14796 + __raw_writew(d, map->map_priv_1 + adr);
14797 + mb();
14798 +}
14799 +
14800 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14801 +{
14802 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14803 + __raw_writel(d, map->map_priv_1 + adr);
14804 + mb();
14805 +}
14806 +
14807 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14808 +{
14809 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14810 + memcpy_toio(map->map_priv_1 + to, from, len);
14811 +}
14812 +
14813 +
14814 +
14815 +static struct map_info mtx1_map = {
14816 + name: "MTX-1 flash",
14817 + read8: physmap_read8,
14818 + read16: physmap_read16,
14819 + read32: physmap_read32,
14820 + copy_from: physmap_copy_from,
14821 + write8: physmap_write8,
14822 + write16: physmap_write16,
14823 + write32: physmap_write32,
14824 + copy_to: physmap_copy_to,
14825 +};
14826 +
14827 +
14828 +static unsigned long flash_size = 0x01000000;
14829 +static unsigned char flash_buswidth = 4;
14830 +static struct mtd_partition mtx1_partitions[] = {
14831 + {
14832 + name: "user fs",
14833 + size: 0x1c00000,
14834 + offset: 0,
14835 + },{
14836 + name: "yamon",
14837 + size: 0x0100000,
14838 + offset: MTDPART_OFS_APPEND,
14839 + mask_flags: MTD_WRITEABLE
14840 + },{
14841 + name: "raw kernel",
14842 + size: 0x02c0000,
14843 + offset: MTDPART_OFS_APPEND,
14844 + },{
14845 + name: "yamon env vars",
14846 + size: 0x0040000,
14847 + offset: MTDPART_OFS_APPEND,
14848 + mask_flags: MTD_WRITEABLE
14849 + }
14850 +};
14851 +
14852 +
14853 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14854 +
14855 +static struct mtd_partition *parsed_parts;
14856 +static struct mtd_info *mymtd;
14857 +
14858 +int __init mtx1_mtd_init(void)
14859 +{
14860 + struct mtd_partition *parts;
14861 + int nb_parts = 0;
14862 + char *part_type;
14863 +
14864 + /* Default flash buswidth */
14865 + mtx1_map.buswidth = flash_buswidth;
14866 +
14867 + /*
14868 + * Static partition definition selection
14869 + */
14870 + part_type = "static";
14871 + parts = mtx1_partitions;
14872 + nb_parts = NB_OF(mtx1_partitions);
14873 + mtx1_map.size = flash_size;
14874 +
14875 + /*
14876 + * Now let's probe for the actual flash. Do it here since
14877 + * specific machine settings might have been set above.
14878 + */
14879 + printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
14880 + mtx1_map.buswidth*8);
14881 + mtx1_map.map_priv_1 =
14882 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
14883 + mymtd = do_map_probe("cfi_probe", &mtx1_map);
14884 + if (!mymtd) return -ENXIO;
14885 + mymtd->module = THIS_MODULE;
14886 +
14887 + add_mtd_partitions(mymtd, parts, nb_parts);
14888 + return 0;
14889 +}
14890 +
14891 +static void __exit mtx1_mtd_cleanup(void)
14892 +{
14893 + if (mymtd) {
14894 + del_mtd_partitions(mymtd);
14895 + map_destroy(mymtd);
14896 + if (parsed_parts)
14897 + kfree(parsed_parts);
14898 + }
14899 +}
14900 +
14901 +module_init(mtx1_mtd_init);
14902 +module_exit(mtx1_mtd_cleanup);
14903 +
14904 +MODULE_AUTHOR("Pete Popov");
14905 +MODULE_DESCRIPTION("MTX-1 CFI map driver");
14906 +MODULE_LICENSE("GPL");
14907 diff -Nur linux-2.4.29/drivers/mtd/maps/pb1550-flash.c linux-mips/drivers/mtd/maps/pb1550-flash.c
14908 --- linux-2.4.29/drivers/mtd/maps/pb1550-flash.c 1970-01-01 01:00:00.000000000 +0100
14909 +++ linux-mips/drivers/mtd/maps/pb1550-flash.c 2004-02-26 01:48:48.000000000 +0100
14910 @@ -0,0 +1,270 @@
14911 +/*
14912 + * Flash memory access on Alchemy Pb1550 board
14913 + *
14914 + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
14915 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14916 + *
14917 + */
14918 +
14919 +#include <linux/config.h>
14920 +#include <linux/module.h>
14921 +#include <linux/types.h>
14922 +#include <linux/kernel.h>
14923 +
14924 +#include <linux/mtd/mtd.h>
14925 +#include <linux/mtd/map.h>
14926 +#include <linux/mtd/partitions.h>
14927 +
14928 +#include <asm/io.h>
14929 +#include <asm/au1000.h>
14930 +#include <asm/pb1550.h>
14931 +
14932 +#ifdef DEBUG_RW
14933 +#define DBG(x...) printk(x)
14934 +#else
14935 +#define DBG(x...)
14936 +#endif
14937 +
14938 +static unsigned long window_addr;
14939 +static unsigned long window_size;
14940 +
14941 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14942 +{
14943 + __u8 ret;
14944 + ret = __raw_readb(map->map_priv_1 + ofs);
14945 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14946 + return ret;
14947 +}
14948 +
14949 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14950 +{
14951 + __u16 ret;
14952 + ret = __raw_readw(map->map_priv_1 + ofs);
14953 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14954 + return ret;
14955 +}
14956 +
14957 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14958 +{
14959 + __u32 ret;
14960 + ret = __raw_readl(map->map_priv_1 + ofs);
14961 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14962 + return ret;
14963 +}
14964 +
14965 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14966 +{
14967 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14968 + memcpy_fromio(to, map->map_priv_1 + from, len);
14969 +}
14970 +
14971 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14972 +{
14973 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14974 + __raw_writeb(d, map->map_priv_1 + adr);
14975 + mb();
14976 +}
14977 +
14978 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14979 +{
14980 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14981 + __raw_writew(d, map->map_priv_1 + adr);
14982 + mb();
14983 +}
14984 +
14985 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14986 +{
14987 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14988 + __raw_writel(d, map->map_priv_1 + adr);
14989 + mb();
14990 +}
14991 +
14992 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14993 +{
14994 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14995 + memcpy_toio(map->map_priv_1 + to, from, len);
14996 +}
14997 +
14998 +static struct map_info pb1550_map = {
14999 + name: "Pb1550 flash",
15000 + read8: physmap_read8,
15001 + read16: physmap_read16,
15002 + read32: physmap_read32,
15003 + copy_from: physmap_copy_from,
15004 + write8: physmap_write8,
15005 + write16: physmap_write16,
15006 + write32: physmap_write32,
15007 + copy_to: physmap_copy_to,
15008 +};
15009 +
15010 +static unsigned char flash_buswidth = 4;
15011 +
15012 +/*
15013 + * Support only 64MB NOR Flash parts
15014 + */
15015 +
15016 +#ifdef PB1550_BOTH_BANKS
15017 +/* both banks will be used. Combine the first bank and the first
15018 + * part of the second bank together into a single jffs/jffs2
15019 + * partition.
15020 + */
15021 +static struct mtd_partition pb1550_partitions[] = {
15022 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
15023 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
15024 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
15025 + */
15026 + {
15027 + name: "User FS",
15028 + size: (0x1FC00000 - 0x18000000),
15029 + offset: 0x0000000
15030 + },{
15031 + name: "yamon",
15032 + size: 0x0100000,
15033 + offset: MTDPART_OFS_APPEND,
15034 + mask_flags: MTD_WRITEABLE
15035 + },{
15036 + name: "raw kernel",
15037 + size: (0x300000 - 0x40000), /* last 256KB is yamon env */
15038 + offset: MTDPART_OFS_APPEND,
15039 + }
15040 +};
15041 +#elif defined(PB1550_BOOT_ONLY)
15042 +static struct mtd_partition pb1550_partitions[] = {
15043 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
15044 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
15045 + */
15046 + {
15047 + name: "User FS",
15048 + size: 0x03c00000,
15049 + offset: 0x0000000
15050 + },{
15051 + name: "yamon",
15052 + size: 0x0100000,
15053 + offset: MTDPART_OFS_APPEND,
15054 + mask_flags: MTD_WRITEABLE
15055 + },{
15056 + name: "raw kernel",
15057 + size: (0x300000-0x40000), /* last 256KB is yamon env */
15058 + offset: MTDPART_OFS_APPEND,
15059 + }
15060 +};
15061 +#elif defined(PB1550_USER_ONLY)
15062 +static struct mtd_partition pb1550_partitions[] = {
15063 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
15064 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
15065 + */
15066 + {
15067 + name: "User FS",
15068 + size: (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
15069 + offset: 0x0000000
15070 + },{
15071 + name: "raw kernel",
15072 + size: MTDPART_SIZ_FULL,
15073 + offset: MTDPART_OFS_APPEND,
15074 + }
15075 +};
15076 +#else
15077 +#error MTD_PB1550 define combo error /* should never happen */
15078 +#endif
15079 +
15080 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15081 +
15082 +static struct mtd_partition *parsed_parts;
15083 +static struct mtd_info *mymtd;
15084 +
15085 +/*
15086 + * Probe the flash density and setup window address and size
15087 + * based on user CONFIG options. There are times when we don't
15088 + * want the MTD driver to be probing the boot or user flash,
15089 + * so having the option to enable only one bank is important.
15090 + */
15091 +int setup_flash_params()
15092 +{
15093 + u16 boot_swapboot;
15094 + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
15095 + ((bcsr->status >> 6) & 0x1);
15096 + printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
15097 +
15098 + switch (boot_swapboot) {
15099 + case 0: /* 512Mbit devices, both enabled */
15100 + case 1:
15101 + case 8:
15102 + case 9:
15103 +#if defined(PB1550_BOTH_BANKS)
15104 + window_addr = 0x18000000;
15105 + window_size = 0x8000000;
15106 +#elif defined(PB1550_BOOT_ONLY)
15107 + window_addr = 0x1C000000;
15108 + window_size = 0x4000000;
15109 +#else /* USER ONLY */
15110 + window_addr = 0x1E000000;
15111 + window_size = 0x1000000;
15112 +#endif
15113 + break;
15114 + case 0xC:
15115 + case 0xD:
15116 + case 0xE:
15117 + case 0xF:
15118 + /* 64 MB Boot NOR Flash is disabled */
15119 + /* and the start address is moved to 0x0C00000 */
15120 + window_addr = 0x0C000000;
15121 + window_size = 0x4000000;
15122 + default:
15123 + printk("Pb1550 MTD: unsupported boot:swap setting\n");
15124 + return 1;
15125 + }
15126 + return 0;
15127 +}
15128 +
15129 +int __init pb1550_mtd_init(void)
15130 +{
15131 + struct mtd_partition *parts;
15132 + int nb_parts = 0;
15133 + char *part_type;
15134 +
15135 + /* Default flash buswidth */
15136 + pb1550_map.buswidth = flash_buswidth;
15137 +
15138 + if (setup_flash_params())
15139 + return -ENXIO;
15140 +
15141 + /*
15142 + * Static partition definition selection
15143 + */
15144 + part_type = "static";
15145 + parts = pb1550_partitions;
15146 + nb_parts = NB_OF(pb1550_partitions);
15147 + pb1550_map.size = window_size;
15148 +
15149 + /*
15150 + * Now let's probe for the actual flash. Do it here since
15151 + * specific machine settings might have been set above.
15152 + */
15153 + printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
15154 + pb1550_map.buswidth*8);
15155 + pb1550_map.map_priv_1 =
15156 + (unsigned long)ioremap(window_addr, window_size);
15157 + mymtd = do_map_probe("cfi_probe", &pb1550_map);
15158 + if (!mymtd) return -ENXIO;
15159 + mymtd->module = THIS_MODULE;
15160 +
15161 + add_mtd_partitions(mymtd, parts, nb_parts);
15162 + return 0;
15163 +}
15164 +
15165 +static void __exit pb1550_mtd_cleanup(void)
15166 +{
15167 + if (mymtd) {
15168 + del_mtd_partitions(mymtd);
15169 + map_destroy(mymtd);
15170 + if (parsed_parts)
15171 + kfree(parsed_parts);
15172 + }
15173 +}
15174 +
15175 +module_init(pb1550_mtd_init);
15176 +module_exit(pb1550_mtd_cleanup);
15177 +
15178 +MODULE_AUTHOR("Embedded Edge, LLC");
15179 +MODULE_DESCRIPTION("Pb1550 mtd map driver");
15180 +MODULE_LICENSE("GPL");
15181 diff -Nur linux-2.4.29/drivers/mtd/maps/pb1xxx-flash.c linux-mips/drivers/mtd/maps/pb1xxx-flash.c
15182 --- linux-2.4.29/drivers/mtd/maps/pb1xxx-flash.c 2003-06-13 16:51:34.000000000 +0200
15183 +++ linux-mips/drivers/mtd/maps/pb1xxx-flash.c 2003-05-19 08:27:22.000000000 +0200
15184 @@ -192,6 +192,34 @@
15185 #else
15186 #error MTD_PB1500 define combo error /* should never happen */
15187 #endif
15188 +#elif defined(CONFIG_MTD_BOSPORUS)
15189 +static unsigned char flash_buswidth = 2;
15190 +static unsigned long flash_size = 0x02000000;
15191 +#define WINDOW_ADDR 0x1F000000
15192 +#define WINDOW_SIZE 0x2000000
15193 +static struct mtd_partition pb1xxx_partitions[] = {
15194 + {
15195 + name: "User FS",
15196 + size: 0x00400000,
15197 + offset: 0x00000000,
15198 + },{
15199 + name: "Yamon-2",
15200 + size: 0x00100000,
15201 + offset: 0x00400000,
15202 + },{
15203 + name: "Root FS",
15204 + size: 0x00700000,
15205 + offset: 0x00500000,
15206 + },{
15207 + name: "Yamon-1",
15208 + size: 0x00100000,
15209 + offset: 0x00C00000,
15210 + },{
15211 + name: "Kernel",
15212 + size: 0x00300000,
15213 + offset: 0x00D00000,
15214 + }
15215 +};
15216 #else
15217 #error Unsupported board
15218 #endif
15219 diff -Nur linux-2.4.29/drivers/mtd/maps/xxs1500.c linux-mips/drivers/mtd/maps/xxs1500.c
15220 --- linux-2.4.29/drivers/mtd/maps/xxs1500.c 1970-01-01 01:00:00.000000000 +0100
15221 +++ linux-mips/drivers/mtd/maps/xxs1500.c 2003-08-02 04:06:01.000000000 +0200
15222 @@ -0,0 +1,186 @@
15223 +/*
15224 + * Flash memory access on MyCable XXS1500 board
15225 + *
15226 + * (C) 2003 Pete Popov <ppopov@mvista.com>
15227 + *
15228 + * $Id: xxs1500.c,v 1.1.2.2 2003/08/02 02:06:01 ppopov Exp $
15229 + */
15230 +
15231 +#include <linux/config.h>
15232 +#include <linux/module.h>
15233 +#include <linux/types.h>
15234 +#include <linux/kernel.h>
15235 +
15236 +#include <linux/mtd/mtd.h>
15237 +#include <linux/mtd/map.h>
15238 +#include <linux/mtd/partitions.h>
15239 +
15240 +#include <asm/io.h>
15241 +#include <asm/au1000.h>
15242 +
15243 +#ifdef DEBUG_RW
15244 +#define DBG(x...) printk(x)
15245 +#else
15246 +#define DBG(x...)
15247 +#endif
15248 +
15249 +#ifdef CONFIG_MIPS_XXS1500
15250 +#define WINDOW_ADDR 0x1F000000
15251 +#define WINDOW_SIZE 0x1000000
15252 +#endif
15253 +
15254 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15255 +{
15256 + __u8 ret;
15257 + ret = __raw_readb(map->map_priv_1 + ofs);
15258 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15259 + return ret;
15260 +}
15261 +
15262 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15263 +{
15264 + __u16 ret;
15265 + ret = __raw_readw(map->map_priv_1 + ofs);
15266 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15267 + return ret;
15268 +}
15269 +
15270 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15271 +{
15272 + __u32 ret;
15273 + ret = __raw_readl(map->map_priv_1 + ofs);
15274 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15275 + return ret;
15276 +}
15277 +
15278 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15279 +{
15280 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15281 + memcpy_fromio(to, map->map_priv_1 + from, len);
15282 +}
15283 +
15284 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15285 +{
15286 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15287 + __raw_writeb(d, map->map_priv_1 + adr);
15288 + mb();
15289 +}
15290 +
15291 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15292 +{
15293 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15294 + __raw_writew(d, map->map_priv_1 + adr);
15295 + mb();
15296 +}
15297 +
15298 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15299 +{
15300 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15301 + __raw_writel(d, map->map_priv_1 + adr);
15302 + mb();
15303 +}
15304 +
15305 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15306 +{
15307 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15308 + memcpy_toio(map->map_priv_1 + to, from, len);
15309 +}
15310 +
15311 +
15312 +
15313 +static struct map_info xxs1500_map = {
15314 + name: "XXS1500 flash",
15315 + read8: physmap_read8,
15316 + read16: physmap_read16,
15317 + read32: physmap_read32,
15318 + copy_from: physmap_copy_from,
15319 + write8: physmap_write8,
15320 + write16: physmap_write16,
15321 + write32: physmap_write32,
15322 + copy_to: physmap_copy_to,
15323 +};
15324 +
15325 +
15326 +static unsigned long flash_size = 0x00800000;
15327 +static unsigned char flash_buswidth = 4;
15328 +static struct mtd_partition xxs1500_partitions[] = {
15329 + {
15330 + name: "kernel image",
15331 + size: 0x00200000,
15332 + offset: 0,
15333 + },{
15334 + name: "user fs 0",
15335 + size: (0x00C00000-0x200000),
15336 + offset: MTDPART_OFS_APPEND,
15337 + },{
15338 + name: "yamon",
15339 + size: 0x00100000,
15340 + offset: MTDPART_OFS_APPEND,
15341 + mask_flags: MTD_WRITEABLE
15342 + },{
15343 + name: "user fs 1",
15344 + size: 0x2c0000,
15345 + offset: MTDPART_OFS_APPEND,
15346 + },{
15347 + name: "yamon env vars",
15348 + size: 0x040000,
15349 + offset: MTDPART_OFS_APPEND,
15350 + mask_flags: MTD_WRITEABLE
15351 + }
15352 +};
15353 +
15354 +
15355 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15356 +
15357 +static struct mtd_partition *parsed_parts;
15358 +static struct mtd_info *mymtd;
15359 +
15360 +int __init xxs1500_mtd_init(void)
15361 +{
15362 + struct mtd_partition *parts;
15363 + int nb_parts = 0;
15364 + char *part_type;
15365 +
15366 + /* Default flash buswidth */
15367 + xxs1500_map.buswidth = flash_buswidth;
15368 +
15369 + /*
15370 + * Static partition definition selection
15371 + */
15372 + part_type = "static";
15373 + parts = xxs1500_partitions;
15374 + nb_parts = NB_OF(xxs1500_partitions);
15375 + xxs1500_map.size = flash_size;
15376 +
15377 + /*
15378 + * Now let's probe for the actual flash. Do it here since
15379 + * specific machine settings might have been set above.
15380 + */
15381 + printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n",
15382 + xxs1500_map.buswidth*8);
15383 + xxs1500_map.map_priv_1 =
15384 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
15385 + mymtd = do_map_probe("cfi_probe", &xxs1500_map);
15386 + if (!mymtd) return -ENXIO;
15387 + mymtd->module = THIS_MODULE;
15388 +
15389 + add_mtd_partitions(mymtd, parts, nb_parts);
15390 + return 0;
15391 +}
15392 +
15393 +static void __exit xxs1500_mtd_cleanup(void)
15394 +{
15395 + if (mymtd) {
15396 + del_mtd_partitions(mymtd);
15397 + map_destroy(mymtd);
15398 + if (parsed_parts)
15399 + kfree(parsed_parts);
15400 + }
15401 +}
15402 +
15403 +module_init(xxs1500_mtd_init);
15404 +module_exit(xxs1500_mtd_cleanup);
15405 +
15406 +MODULE_AUTHOR("Pete Popov");
15407 +MODULE_DESCRIPTION("XXS1500 CFI map driver");
15408 +MODULE_LICENSE("GPL");
15409 diff -Nur linux-2.4.29/drivers/net/defxx.c linux-mips/drivers/net/defxx.c
15410 --- linux-2.4.29/drivers/net/defxx.c 2004-11-17 12:54:21.000000000 +0100
15411 +++ linux-mips/drivers/net/defxx.c 2004-11-19 01:28:39.000000000 +0100
15412 @@ -10,24 +10,18 @@
15413 *
15414 * Abstract:
15415 * A Linux device driver supporting the Digital Equipment Corporation
15416 - * FDDI EISA and PCI controller families. Supported adapters include:
15417 + * FDDI TURBOchannel, EISA and PCI controller families. Supported
15418 + * adapters include:
15419 *
15420 - * DEC FDDIcontroller/EISA (DEFEA)
15421 - * DEC FDDIcontroller/PCI (DEFPA)
15422 + * DEC FDDIcontroller/TURBOchannel (DEFTA)
15423 + * DEC FDDIcontroller/EISA (DEFEA)
15424 + * DEC FDDIcontroller/PCI (DEFPA)
15425 *
15426 - * Maintainers:
15427 - * LVS Lawrence V. Stefani
15428 - *
15429 - * Contact:
15430 - * The author may be reached at:
15431 + * The original author:
15432 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
15433 *
15434 - * Inet: stefani@lkg.dec.com
15435 - * (NOTE! this address no longer works -jgarzik)
15436 - *
15437 - * Mail: Digital Equipment Corporation
15438 - * 550 King Street
15439 - * M/S: LKG1-3/M07
15440 - * Littleton, MA 01460
15441 + * Maintainers:
15442 + * macro Maciej W. Rozycki <macro@linux-mips.org>
15443 *
15444 * Credits:
15445 * I'd like to thank Patricia Cross for helping me get started with
15446 @@ -197,16 +191,16 @@
15447 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
15448 * Feb 2001 Skb allocation fixes
15449 * Feb 2001 davej PCI enable cleanups.
15450 + * 04 Aug 2003 macro Converted to the DMA API.
15451 + * 14 Aug 2004 macro Fix device names reported.
15452 + * 26 Sep 2004 macro TURBOchannel support.
15453 */
15454
15455 /* Include files */
15456
15457 #include <linux/module.h>
15458 -
15459 #include <linux/kernel.h>
15460 -#include <linux/sched.h>
15461 #include <linux/string.h>
15462 -#include <linux/ptrace.h>
15463 #include <linux/errno.h>
15464 #include <linux/ioport.h>
15465 #include <linux/slab.h>
15466 @@ -215,19 +209,33 @@
15467 #include <linux/delay.h>
15468 #include <linux/init.h>
15469 #include <linux/netdevice.h>
15470 +#include <linux/fddidevice.h>
15471 +#include <linux/skbuff.h>
15472 +
15473 #include <asm/byteorder.h>
15474 #include <asm/bitops.h>
15475 #include <asm/io.h>
15476
15477 -#include <linux/fddidevice.h>
15478 -#include <linux/skbuff.h>
15479 +#ifdef CONFIG_TC
15480 +#include <asm/dec/tc.h>
15481 +#else
15482 +static int search_tc_card(const char *name) { return -ENODEV; }
15483 +static void claim_tc_card(int slot) { }
15484 +static void release_tc_card(int slot) { }
15485 +static unsigned long get_tc_base_addr(int slot) { return 0; }
15486 +static unsigned long get_tc_irq_nr(int slot) { return -1; }
15487 +#endif
15488
15489 #include "defxx.h"
15490
15491 -/* Version information string - should be updated prior to each new release!!! */
15492 +/* Version information string should be updated prior to each new release! */
15493 +#define DRV_NAME "defxx"
15494 +#define DRV_VERSION "v1.07T"
15495 +#define DRV_RELDATE "2004/09/26"
15496
15497 static char version[] __devinitdata =
15498 - "defxx.c:v1.05e 2001/02/03 Lawrence V. Stefani and others\n";
15499 + DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
15500 + " Lawrence V. Stefani and others\n";
15501
15502 #define DYNAMIC_BUFFERS 1
15503
15504 @@ -243,7 +251,7 @@
15505 static void dfx_bus_init(struct net_device *dev);
15506 static void dfx_bus_config_check(DFX_board_t *bp);
15507
15508 -static int dfx_driver_init(struct net_device *dev);
15509 +static int dfx_driver_init(struct net_device *dev, const char *print_name);
15510 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
15511
15512 static int dfx_open(struct net_device *dev);
15513 @@ -337,48 +345,84 @@
15514 int offset,
15515 u8 data
15516 )
15517 +{
15518 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15519 + {
15520 + volatile u8 *addr = (void *)(bp->base_addr + offset);
15521
15522 + *addr = data;
15523 + mb();
15524 + }
15525 + else
15526 {
15527 u16 port = bp->base_addr + offset;
15528
15529 outb(data, port);
15530 }
15531 +}
15532
15533 static inline void dfx_port_read_byte(
15534 DFX_board_t *bp,
15535 int offset,
15536 u8 *data
15537 )
15538 +{
15539 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15540 + {
15541 + volatile u8 *addr = (void *)(bp->base_addr + offset);
15542
15543 + mb();
15544 + *data = *addr;
15545 + }
15546 + else
15547 {
15548 u16 port = bp->base_addr + offset;
15549
15550 *data = inb(port);
15551 }
15552 +}
15553
15554 static inline void dfx_port_write_long(
15555 DFX_board_t *bp,
15556 int offset,
15557 u32 data
15558 )
15559 +{
15560 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15561 + {
15562 + volatile u32 *addr = (void *)(bp->base_addr + offset);
15563
15564 + *addr = data;
15565 + mb();
15566 + }
15567 + else
15568 {
15569 u16 port = bp->base_addr + offset;
15570
15571 outl(data, port);
15572 }
15573 +}
15574
15575 static inline void dfx_port_read_long(
15576 DFX_board_t *bp,
15577 int offset,
15578 u32 *data
15579 )
15580 +{
15581 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15582 + {
15583 + volatile u32 *addr = (void *)(bp->base_addr + offset);
15584
15585 + mb();
15586 + *data = *addr;
15587 + }
15588 + else
15589 {
15590 u16 port = bp->base_addr + offset;
15591
15592 *data = inl(port);
15593 }
15594 +}
15595
15596 \f
15597 /*
15598 @@ -393,8 +437,9 @@
15599 * Condition code
15600 *
15601 * Arguments:
15602 - * pdev - pointer to pci device information (NULL for EISA)
15603 - * ioaddr - pointer to port (NULL for PCI)
15604 + * pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
15605 + * bus_type - bus type (one of DFX_BUS_TYPE_*)
15606 + * handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
15607 *
15608 * Functional Description:
15609 *
15610 @@ -410,54 +455,68 @@
15611 * initialized and the board resources are read and stored in
15612 * the device structure.
15613 */
15614 -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
15615 +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
15616 {
15617 + static int version_disp;
15618 + char *print_name = DRV_NAME;
15619 struct net_device *dev;
15620 DFX_board_t *bp; /* board pointer */
15621 + long ioaddr; /* pointer to port */
15622 + unsigned long len; /* resource length */
15623 + int alloc_size; /* total buffer size used */
15624 int err;
15625
15626 -#ifndef MODULE
15627 - static int version_disp;
15628 -
15629 - if (!version_disp) /* display version info if adapter is found */
15630 - {
15631 + if (!version_disp) { /* display version info if adapter is found */
15632 version_disp = 1; /* set display flag to TRUE so that */
15633 printk(version); /* we only display this string ONCE */
15634 }
15635 -#endif
15636
15637 - /*
15638 - * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
15639 - * and calls fddi_setup() and register_netdev(). Not much left to do for us here.
15640 - */
15641 - dev = init_fddidev(NULL, sizeof(*bp));
15642 + if (pdev != NULL)
15643 + print_name = pdev->slot_name;
15644 +
15645 + dev = alloc_fddidev(sizeof(*bp));
15646 if (!dev) {
15647 - printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
15648 + printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
15649 + print_name);
15650 return -ENOMEM;
15651 }
15652
15653 /* Enable PCI device. */
15654 - if (pdev != NULL) {
15655 + if (bus_type == DFX_BUS_TYPE_PCI) {
15656 err = pci_enable_device (pdev);
15657 if (err) goto err_out;
15658 ioaddr = pci_resource_start (pdev, 1);
15659 }
15660
15661 SET_MODULE_OWNER(dev);
15662 + SET_NETDEV_DEV(dev, &pdev->dev);
15663
15664 bp = dev->priv;
15665
15666 - if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
15667 - printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
15668 - dev->name, PFI_K_CSR_IO_LEN, ioaddr);
15669 + if (bus_type == DFX_BUS_TYPE_TC) {
15670 + /* TURBOchannel board */
15671 + bp->slot = handle;
15672 + claim_tc_card(bp->slot);
15673 + ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
15674 + len = PI_TC_K_CSR_LEN;
15675 + } else if (bus_type == DFX_BUS_TYPE_EISA) {
15676 + /* EISA board */
15677 + ioaddr = handle;
15678 + len = PI_ESIC_K_CSR_IO_LEN;
15679 + } else
15680 + /* PCI board */
15681 + len = PFI_K_CSR_IO_LEN;
15682 + dev->base_addr = ioaddr; /* save port (I/O) base address */
15683 +
15684 + if (!request_region(ioaddr, len, print_name)) {
15685 + printk(KERN_ERR "%s: Cannot reserve I/O resource "
15686 + "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
15687 err = -EBUSY;
15688 goto err_out;
15689 }
15690
15691 /* Initialize new device structure */
15692
15693 - dev->base_addr = ioaddr; /* save port (I/O) base address */
15694 -
15695 dev->get_stats = dfx_ctl_get_stats;
15696 dev->open = dfx_open;
15697 dev->stop = dfx_close;
15698 @@ -465,37 +524,54 @@
15699 dev->set_multicast_list = dfx_ctl_set_multicast_list;
15700 dev->set_mac_address = dfx_ctl_set_mac_address;
15701
15702 - if (pdev == NULL) {
15703 - /* EISA board */
15704 - bp->bus_type = DFX_BUS_TYPE_EISA;
15705 + bp->bus_type = bus_type;
15706 + if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
15707 + /* TURBOchannel or EISA board */
15708 bp->next = root_dfx_eisa_dev;
15709 root_dfx_eisa_dev = dev;
15710 } else {
15711 /* PCI board */
15712 - bp->bus_type = DFX_BUS_TYPE_PCI;
15713 bp->pci_dev = pdev;
15714 pci_set_drvdata (pdev, dev);
15715 pci_set_master (pdev);
15716 }
15717
15718 - if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
15719 +
15720 + if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
15721 err = -ENODEV;
15722 goto err_out_region;
15723 }
15724
15725 + err = register_netdev(dev);
15726 + if (err)
15727 + goto err_out_kfree;
15728 +
15729 + printk("%s: registered as %s\n", print_name, dev->name);
15730 return 0;
15731
15732 +err_out_kfree:
15733 + alloc_size = sizeof(PI_DESCR_BLOCK) +
15734 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
15735 +#ifndef DYNAMIC_BUFFERS
15736 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
15737 +#endif
15738 + sizeof(PI_CONSUMER_BLOCK) +
15739 + (PI_ALIGN_K_DESC_BLK - 1);
15740 + if (bp->kmalloced)
15741 + pci_free_consistent(pdev, alloc_size,
15742 + bp->kmalloced, bp->kmalloced_dma);
15743 err_out_region:
15744 - release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
15745 + release_region(ioaddr, len);
15746 err_out:
15747 - unregister_netdev(dev);
15748 - kfree(dev);
15749 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15750 + release_tc_card(bp->slot);
15751 + free_netdev(dev);
15752 return err;
15753 }
15754
15755 static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
15756 {
15757 - return dfx_init_one_pci_or_eisa(pdev, 0);
15758 + return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
15759 }
15760
15761 static int __init dfx_eisa_init(void)
15762 @@ -507,6 +583,7 @@
15763
15764 DBG_printk("In dfx_eisa_init...\n");
15765
15766 +#ifdef CONFIG_EISA
15767 /* Scan for FDDI EISA controllers */
15768
15769 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
15770 @@ -517,9 +594,27 @@
15771 {
15772 port = (i << 12); /* recalc base addr */
15773
15774 - if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
15775 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
15776 }
15777 }
15778 +#endif
15779 + return rc;
15780 +}
15781 +
15782 +static int __init dfx_tc_init(void)
15783 +{
15784 + int rc = -ENODEV;
15785 + int slot; /* TC slot number */
15786 +
15787 + DBG_printk("In dfx_tc_init...\n");
15788 +
15789 + /* Scan for FDDI TC controllers */
15790 + while ((slot = search_tc_card("PMAF-F")) >= 0) {
15791 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
15792 + rc = 0;
15793 + else
15794 + break;
15795 + }
15796 return rc;
15797 }
15798 \f
15799 @@ -583,8 +678,9 @@
15800
15801 /* Initialize adapter based on bus type */
15802
15803 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
15804 - {
15805 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
15806 + dev->irq = get_tc_irq_nr(bp->slot);
15807 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
15808 /* Get the interrupt level from the ESIC chip */
15809
15810 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
15811 @@ -766,6 +862,7 @@
15812 *
15813 * Arguments:
15814 * dev - pointer to device information
15815 + * print_name - printable device name
15816 *
15817 * Functional Description:
15818 * This function allocates additional resources such as the host memory
15819 @@ -780,20 +877,21 @@
15820 * or read adapter MAC address
15821 *
15822 * Assumptions:
15823 - * Memory allocated from kmalloc() call is physically contiguous, locked
15824 - * memory whose physical address equals its virtual address.
15825 + * Memory allocated from pci_alloc_consistent() call is physically
15826 + * contiguous, locked memory.
15827 *
15828 * Side Effects:
15829 * Adapter is reset and should be in DMA_UNAVAILABLE state before
15830 * returning from this routine.
15831 */
15832
15833 -static int __devinit dfx_driver_init(struct net_device *dev)
15834 +static int __devinit dfx_driver_init(struct net_device *dev,
15835 + const char *print_name)
15836 {
15837 DFX_board_t *bp = dev->priv;
15838 int alloc_size; /* total buffer size needed */
15839 char *top_v, *curr_v; /* virtual addrs into memory block */
15840 - u32 top_p, curr_p; /* physical addrs into memory block */
15841 + dma_addr_t top_p, curr_p; /* physical addrs into memory block */
15842 u32 data; /* host data register value */
15843
15844 DBG_printk("In dfx_driver_init...\n");
15845 @@ -837,26 +935,20 @@
15846
15847 /* Read the factory MAC address from the adapter then save it */
15848
15849 - if (dfx_hw_port_ctrl_req(bp,
15850 - PI_PCTRL_M_MLA,
15851 - PI_PDATA_A_MLA_K_LO,
15852 - 0,
15853 - &data) != DFX_K_SUCCESS)
15854 - {
15855 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
15856 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
15857 + &data) != DFX_K_SUCCESS) {
15858 + printk("%s: Could not read adapter factory MAC address!\n",
15859 + print_name);
15860 return(DFX_K_FAILURE);
15861 - }
15862 + }
15863 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
15864
15865 - if (dfx_hw_port_ctrl_req(bp,
15866 - PI_PCTRL_M_MLA,
15867 - PI_PDATA_A_MLA_K_HI,
15868 - 0,
15869 - &data) != DFX_K_SUCCESS)
15870 - {
15871 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
15872 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
15873 + &data) != DFX_K_SUCCESS) {
15874 + printk("%s: Could not read adapter factory MAC address!\n",
15875 + print_name);
15876 return(DFX_K_FAILURE);
15877 - }
15878 + }
15879 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
15880
15881 /*
15882 @@ -867,28 +959,27 @@
15883 */
15884
15885 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
15886 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
15887 - printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15888 - dev->name,
15889 - dev->base_addr,
15890 - dev->irq,
15891 - dev->dev_addr[0],
15892 - dev->dev_addr[1],
15893 - dev->dev_addr[2],
15894 - dev->dev_addr[3],
15895 - dev->dev_addr[4],
15896 - dev->dev_addr[5]);
15897 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15898 + printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
15899 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15900 + print_name, dev->base_addr, dev->irq,
15901 + dev->dev_addr[0], dev->dev_addr[1],
15902 + dev->dev_addr[2], dev->dev_addr[3],
15903 + dev->dev_addr[4], dev->dev_addr[5]);
15904 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
15905 + printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
15906 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15907 + print_name, dev->base_addr, dev->irq,
15908 + dev->dev_addr[0], dev->dev_addr[1],
15909 + dev->dev_addr[2], dev->dev_addr[3],
15910 + dev->dev_addr[4], dev->dev_addr[5]);
15911 else
15912 - printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15913 - dev->name,
15914 - dev->base_addr,
15915 - dev->irq,
15916 - dev->dev_addr[0],
15917 - dev->dev_addr[1],
15918 - dev->dev_addr[2],
15919 - dev->dev_addr[3],
15920 - dev->dev_addr[4],
15921 - dev->dev_addr[5]);
15922 + printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
15923 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15924 + print_name, dev->base_addr, dev->irq,
15925 + dev->dev_addr[0], dev->dev_addr[1],
15926 + dev->dev_addr[2], dev->dev_addr[3],
15927 + dev->dev_addr[4], dev->dev_addr[5]);
15928
15929 /*
15930 * Get memory for descriptor block, consumer block, and other buffers
15931 @@ -903,14 +994,15 @@
15932 #endif
15933 sizeof(PI_CONSUMER_BLOCK) +
15934 (PI_ALIGN_K_DESC_BLK - 1);
15935 - bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
15936 - if (top_v == NULL)
15937 - {
15938 - printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
15939 + bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
15940 + &bp->kmalloced_dma);
15941 + if (top_v == NULL) {
15942 + printk("%s: Could not allocate memory for host buffers "
15943 + "and structures!\n", print_name);
15944 return(DFX_K_FAILURE);
15945 - }
15946 + }
15947 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
15948 - top_p = virt_to_bus(top_v); /* get physical address of buffer */
15949 + top_p = bp->kmalloced_dma; /* get physical address of buffer */
15950
15951 /*
15952 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
15953 @@ -924,7 +1016,7 @@
15954 * for allocating the needed memory.
15955 */
15956
15957 - curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
15958 + curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
15959 curr_v = top_v + (curr_p - top_p);
15960
15961 /* Reserve space for descriptor block */
15962 @@ -965,14 +1057,20 @@
15963
15964 /* Display virtual and physical addresses if debug driver */
15965
15966 - DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", dev->name, (long)bp->descr_block_virt, bp->descr_block_phys);
15967 - DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
15968 - DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
15969 - DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
15970 - DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->cons_block_virt, bp->cons_block_phys);
15971 + DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
15972 + print_name,
15973 + (long)bp->descr_block_virt, bp->descr_block_phys);
15974 + DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
15975 + print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
15976 + DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
15977 + print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
15978 + DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
15979 + print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
15980 + DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
15981 + print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
15982
15983 return(DFX_K_SUCCESS);
15984 - }
15985 +}
15986
15987 \f
15988 /*
15989 @@ -1218,7 +1316,9 @@
15990
15991 /* Register IRQ - support shared interrupts by passing device ptr */
15992
15993 - ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
15994 + ret = request_irq(dev->irq, (void *)dfx_interrupt,
15995 + (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
15996 + dev->name, dev);
15997 if (ret) {
15998 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
15999 return ret;
16000 @@ -1737,7 +1837,7 @@
16001 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
16002 (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
16003 }
16004 - else
16005 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
16006 {
16007 /* Disable interrupts at the ESIC */
16008
16009 @@ -1755,6 +1855,13 @@
16010 tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
16011 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
16012 }
16013 + else {
16014 + /* TC doesn't share interrupts so no need to disable them */
16015 +
16016 + /* Call interrupt service routine for this adapter */
16017 +
16018 + dfx_int_common(dev);
16019 + }
16020
16021 spin_unlock(&bp->lock);
16022 }
16023 @@ -2663,12 +2770,12 @@
16024
16025 static void my_skb_align(struct sk_buff *skb, int n)
16026 {
16027 - u32 x=(u32)skb->data; /* We only want the low bits .. */
16028 - u32 v;
16029 + unsigned long x = (unsigned long)skb->data;
16030 + unsigned long v;
16031
16032 - v=(x+n-1)&~(n-1); /* Where we want to be */
16033 + v = ALIGN(x, n); /* Where we want to be */
16034
16035 - skb_reserve(skb, v-x);
16036 + skb_reserve(skb, v - x);
16037 }
16038
16039 \f
16040 @@ -2745,7 +2852,10 @@
16041 */
16042
16043 my_skb_align(newskb, 128);
16044 - bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
16045 + bp->descr_block_virt->rcv_data[i + j].long_1 =
16046 + (u32)pci_map_single(bp->pci_dev, newskb->data,
16047 + NEW_SKB_SIZE,
16048 + PCI_DMA_FROMDEVICE);
16049 /*
16050 * p_rcv_buff_va is only used inside the
16051 * kernel so we put the skb pointer here.
16052 @@ -2859,9 +2969,17 @@
16053
16054 my_skb_align(newskb, 128);
16055 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
16056 + pci_unmap_single(bp->pci_dev,
16057 + bp->descr_block_virt->rcv_data[entry].long_1,
16058 + NEW_SKB_SIZE,
16059 + PCI_DMA_FROMDEVICE);
16060 skb_reserve(skb, RCV_BUFF_K_PADDING);
16061 bp->p_rcv_buff_va[entry] = (char *)newskb;
16062 - bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
16063 + bp->descr_block_virt->rcv_data[entry].long_1 =
16064 + (u32)pci_map_single(bp->pci_dev,
16065 + newskb->data,
16066 + NEW_SKB_SIZE,
16067 + PCI_DMA_FROMDEVICE);
16068 } else
16069 skb = NULL;
16070 } else
16071 @@ -2934,7 +3052,7 @@
16072 * is contained in a single physically contiguous buffer
16073 * in which the virtual address of the start of packet
16074 * (skb->data) can be converted to a physical address
16075 - * by using virt_to_bus().
16076 + * by using pci_map_single().
16077 *
16078 * Since the adapter architecture requires a three byte
16079 * packet request header to prepend the start of packet,
16080 @@ -3082,12 +3200,13 @@
16081 * skb->data.
16082 * 6. The physical address of the start of packet
16083 * can be determined from the virtual address
16084 - * by using virt_to_bus() and is only 32-bits
16085 + * by using pci_map_single() and is only 32-bits
16086 * wide.
16087 */
16088
16089 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
16090 - p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
16091 + p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
16092 + skb->len, PCI_DMA_TODEVICE);
16093
16094 /*
16095 * Verify that descriptor is actually available
16096 @@ -3171,6 +3290,7 @@
16097 {
16098 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
16099 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
16100 + u8 comp; /* local transmit completion index */
16101 int freed = 0; /* buffers freed */
16102
16103 /* Service all consumed transmit frames */
16104 @@ -3188,7 +3308,11 @@
16105 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
16106
16107 /* Return skb to operating system */
16108 -
16109 + comp = bp->rcv_xmt_reg.index.xmt_comp;
16110 + pci_unmap_single(bp->pci_dev,
16111 + bp->descr_block_virt->xmt_data[comp].long_1,
16112 + p_xmt_drv_descr->p_skb->len,
16113 + PCI_DMA_TODEVICE);
16114 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
16115
16116 /*
16117 @@ -3297,6 +3421,7 @@
16118 {
16119 u32 prod_cons; /* rcv/xmt consumer block longword */
16120 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
16121 + u8 comp; /* local transmit completion index */
16122
16123 /* Flush all outstanding transmit frames */
16124
16125 @@ -3307,7 +3432,11 @@
16126 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
16127
16128 /* Return skb to operating system */
16129 -
16130 + comp = bp->rcv_xmt_reg.index.xmt_comp;
16131 + pci_unmap_single(bp->pci_dev,
16132 + bp->descr_block_virt->xmt_data[comp].long_1,
16133 + p_xmt_drv_descr->p_skb->len,
16134 + PCI_DMA_TODEVICE);
16135 dev_kfree_skb(p_xmt_drv_descr->p_skb);
16136
16137 /* Increment transmit error counter */
16138 @@ -3337,12 +3466,36 @@
16139
16140 static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
16141 {
16142 - DFX_board_t *bp = dev->priv;
16143 + DFX_board_t *bp = dev->priv;
16144 + unsigned long len; /* resource length */
16145 + int alloc_size; /* total buffer size used */
16146
16147 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
16148 + /* TURBOchannel board */
16149 + len = PI_TC_K_CSR_LEN;
16150 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
16151 + /* EISA board */
16152 + len = PI_ESIC_K_CSR_IO_LEN;
16153 + } else {
16154 + len = PFI_K_CSR_IO_LEN;
16155 + }
16156 unregister_netdev(dev);
16157 - release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
16158 - if (bp->kmalloced) kfree(bp->kmalloced);
16159 - kfree(dev);
16160 + release_region(dev->base_addr, len);
16161 +
16162 + if (bp->bus_type == DFX_BUS_TYPE_TC)
16163 + release_tc_card(bp->slot);
16164 +
16165 + alloc_size = sizeof(PI_DESCR_BLOCK) +
16166 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
16167 +#ifndef DYNAMIC_BUFFERS
16168 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
16169 +#endif
16170 + sizeof(PI_CONSUMER_BLOCK) +
16171 + (PI_ALIGN_K_DESC_BLK - 1);
16172 + if (bp->kmalloced)
16173 + pci_free_consistent(pdev, alloc_size, bp->kmalloced,
16174 + bp->kmalloced_dma);
16175 + free_netdev(dev);
16176 }
16177
16178 static void __devexit dfx_remove_one (struct pci_dev *pdev)
16179 @@ -3353,21 +3506,22 @@
16180 pci_set_drvdata(pdev, NULL);
16181 }
16182
16183 -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
16184 +static struct pci_device_id dfx_pci_tbl[] = {
16185 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
16186 { 0, }
16187 };
16188 MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
16189
16190 static struct pci_driver dfx_driver = {
16191 - name: "defxx",
16192 - probe: dfx_init_one,
16193 - remove: __devexit_p(dfx_remove_one),
16194 - id_table: dfx_pci_tbl,
16195 + .name = "defxx",
16196 + .probe = dfx_init_one,
16197 + .remove = __devexit_p(dfx_remove_one),
16198 + .id_table = dfx_pci_tbl,
16199 };
16200
16201 static int dfx_have_pci;
16202 static int dfx_have_eisa;
16203 +static int dfx_have_tc;
16204
16205
16206 static void __exit dfx_eisa_cleanup(void)
16207 @@ -3388,12 +3542,7 @@
16208
16209 static int __init dfx_init(void)
16210 {
16211 - int rc_pci, rc_eisa;
16212 -
16213 -/* when a module, this is printed whether or not devices are found in probe */
16214 -#ifdef MODULE
16215 - printk(version);
16216 -#endif
16217 + int rc_pci, rc_eisa, rc_tc;
16218
16219 rc_pci = pci_module_init(&dfx_driver);
16220 if (rc_pci >= 0) dfx_have_pci = 1;
16221 @@ -3401,20 +3550,27 @@
16222 rc_eisa = dfx_eisa_init();
16223 if (rc_eisa >= 0) dfx_have_eisa = 1;
16224
16225 - return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci);
16226 + rc_tc = dfx_tc_init();
16227 + if (rc_tc >= 0) dfx_have_tc = 1;
16228 +
16229 + return ((rc_tc < 0) ? 0 : rc_tc) +
16230 + ((rc_eisa < 0) ? 0 : rc_eisa) +
16231 + ((rc_pci < 0) ? 0 : rc_pci);
16232 }
16233
16234 static void __exit dfx_cleanup(void)
16235 {
16236 if (dfx_have_pci)
16237 pci_unregister_driver(&dfx_driver);
16238 - if (dfx_have_eisa)
16239 + if (dfx_have_eisa || dfx_have_tc)
16240 dfx_eisa_cleanup();
16241 -
16242 }
16243
16244 module_init(dfx_init);
16245 module_exit(dfx_cleanup);
16246 +MODULE_AUTHOR("Lawrence V. Stefani");
16247 +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
16248 + DRV_VERSION " " DRV_RELDATE);
16249 MODULE_LICENSE("GPL");
16250
16251 \f
16252 diff -Nur linux-2.4.29/drivers/net/defxx.h linux-mips/drivers/net/defxx.h
16253 --- linux-2.4.29/drivers/net/defxx.h 2001-02-13 22:15:05.000000000 +0100
16254 +++ linux-mips/drivers/net/defxx.h 2004-10-03 20:06:48.000000000 +0200
16255 @@ -12,17 +12,11 @@
16256 * Contains all definitions specified by port specification and required
16257 * by the defxx.c driver.
16258 *
16259 - * Maintainers:
16260 - * LVS Lawrence V. Stefani
16261 - *
16262 - * Contact:
16263 - * The author may be reached at:
16264 + * The original author:
16265 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
16266 *
16267 - * Inet: stefani@lkg.dec.com
16268 - * Mail: Digital Equipment Corporation
16269 - * 550 King Street
16270 - * M/S: LKG1-3/M07
16271 - * Littleton, MA 01460
16272 + * Maintainers:
16273 + * macro Maciej W. Rozycki <macro@linux-mips.org>
16274 *
16275 * Modification History:
16276 * Date Name Description
16277 @@ -30,6 +24,7 @@
16278 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
16279 * macros to DEFXX.C.
16280 * 12-Sep-96 LVS Removed packet request header pointers.
16281 + * 04 Aug 2003 macro Converted to the DMA API.
16282 */
16283
16284 #ifndef _DEFXX_H_
16285 @@ -1467,6 +1462,11 @@
16286
16287 #endif /* #ifndef BIG_ENDIAN */
16288
16289 +/* Define TC PDQ CSR offset and length */
16290 +
16291 +#define PI_TC_K_CSR_OFFSET 0x100000
16292 +#define PI_TC_K_CSR_LEN 0x80 /* 128 bytes */
16293 +
16294 /* Define EISA controller register offsets */
16295
16296 #define PI_ESIC_K_BURST_HOLDOFF 0x040
16297 @@ -1634,6 +1634,7 @@
16298
16299 #define DFX_BUS_TYPE_PCI 0 /* type code for DEC FDDIcontroller/PCI */
16300 #define DFX_BUS_TYPE_EISA 1 /* type code for DEC FDDIcontroller/EISA */
16301 +#define DFX_BUS_TYPE_TC 2 /* type code for DEC FDDIcontroller/TURBOchannel */
16302
16303 #define DFX_FC_PRH2_PRH1_PRH0 0x54003820 /* Packet Request Header bytes + FC */
16304 #define DFX_PRH0_BYTE 0x20 /* Packet Request Header byte 0 */
16305 @@ -1704,17 +1705,19 @@
16306 {
16307 /* Keep virtual and physical pointers to locked, physically contiguous memory */
16308
16309 - char *kmalloced; /* kfree this on unload */
16310 + char *kmalloced; /* pci_free_consistent this on unload */
16311 + dma_addr_t kmalloced_dma;
16312 + /* DMA handle for the above */
16313 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
16314 - u32 descr_block_phys; /* PDQ descriptor block phys address */
16315 + dma_addr_t descr_block_phys; /* PDQ descriptor block phys address */
16316 PI_DMA_CMD_REQ *cmd_req_virt; /* Command request buffer virt address */
16317 - u32 cmd_req_phys; /* Command request buffer phys address */
16318 + dma_addr_t cmd_req_phys; /* Command request buffer phys address */
16319 PI_DMA_CMD_RSP *cmd_rsp_virt; /* Command response buffer virt address */
16320 - u32 cmd_rsp_phys; /* Command response buffer phys address */
16321 + dma_addr_t cmd_rsp_phys; /* Command response buffer phys address */
16322 char *rcv_block_virt; /* LLC host receive queue buf blk virt */
16323 - u32 rcv_block_phys; /* LLC host receive queue buf blk phys */
16324 + dma_addr_t rcv_block_phys; /* LLC host receive queue buf blk phys */
16325 PI_CONSUMER_BLOCK *cons_block_virt; /* PDQ consumer block virt address */
16326 - u32 cons_block_phys; /* PDQ consumer block phys address */
16327 + dma_addr_t cons_block_phys; /* PDQ consumer block phys address */
16328
16329 /* Keep local copies of Type 1 and Type 2 register data */
16330
16331 @@ -1758,8 +1761,9 @@
16332
16333 struct net_device *dev; /* pointer to device structure */
16334 struct net_device *next;
16335 - u32 bus_type; /* bus type (0 == PCI, 1 == EISA) */
16336 - u16 base_addr; /* base I/O address (same as dev->base_addr) */
16337 + u32 bus_type; /* bus type (0 == PCI, 1 == EISA, 2 == TC) */
16338 + long base_addr; /* base I/O address (same as dev->base_addr) */
16339 + int slot; /* TC slot number */
16340 struct pci_dev * pci_dev;
16341 u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
16342 u32 req_ttrt; /* requested TTRT value (in 80ns units) */
16343 diff -Nur linux-2.4.29/drivers/net/hamradio/hdlcdrv.c linux-mips/drivers/net/hamradio/hdlcdrv.c
16344 --- linux-2.4.29/drivers/net/hamradio/hdlcdrv.c 2002-02-25 20:37:59.000000000 +0100
16345 +++ linux-mips/drivers/net/hamradio/hdlcdrv.c 2004-05-04 14:04:27.000000000 +0200
16346 @@ -587,6 +587,8 @@
16347 return -EINVAL;
16348 s = (struct hdlcdrv_state *)dev->priv;
16349
16350 + netif_stop_queue(dev);
16351 +
16352 if (s->ops && s->ops->close)
16353 i = s->ops->close(dev);
16354 if (s->skb)
16355 diff -Nur linux-2.4.29/drivers/net/irda/au1k_ir.c linux-mips/drivers/net/irda/au1k_ir.c
16356 --- linux-2.4.29/drivers/net/irda/au1k_ir.c 2004-02-18 14:36:31.000000000 +0100
16357 +++ linux-mips/drivers/net/irda/au1k_ir.c 2005-02-03 07:35:29.000000000 +0100
16358 @@ -81,10 +81,6 @@
16359
16360 #define RUN_AT(x) (jiffies + (x))
16361
16362 -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
16363 -static BCSR * const bcsr = (BCSR *)0xAE000000;
16364 -#endif
16365 -
16366 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
16367
16368 /*
16369 diff -Nur linux-2.4.29/drivers/pci/pci.c linux-mips/drivers/pci/pci.c
16370 --- linux-2.4.29/drivers/pci/pci.c 2004-11-17 12:54:21.000000000 +0100
16371 +++ linux-mips/drivers/pci/pci.c 2004-11-19 01:28:41.000000000 +0100
16372 @@ -1281,11 +1281,17 @@
16373 {
16374 unsigned int buses;
16375 unsigned short cr;
16376 + unsigned short bctl;
16377 struct pci_bus *child;
16378 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
16379
16380 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
16381 DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
16382 + /* Disable MasterAbortMode during probing to avoid reporting
16383 + of bus errors (in some architectures) */
16384 + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
16385 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
16386 + bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
16387 if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
16388 /*
16389 * Bus already configured by firmware, process it in the first
16390 @@ -1351,6 +1357,7 @@
16391 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
16392 pci_write_config_word(dev, PCI_COMMAND, cr);
16393 }
16394 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
16395 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
16396 return max;
16397 }
16398 diff -Nur linux-2.4.29/drivers/pcmcia/au1000_db1x00.c linux-mips/drivers/pcmcia/au1000_db1x00.c
16399 --- linux-2.4.29/drivers/pcmcia/au1000_db1x00.c 2005-01-19 15:09:57.000000000 +0100
16400 +++ linux-mips/drivers/pcmcia/au1000_db1x00.c 2005-02-03 07:35:30.000000000 +0100
16401 @@ -1,6 +1,6 @@
16402 /*
16403 *
16404 - * Alchemy Semi Db1x00 boards specific pcmcia routines.
16405 + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
16406 *
16407 * Copyright 2002 MontaVista Software Inc.
16408 * Author: MontaVista Software, Inc.
16409 @@ -54,9 +54,20 @@
16410 #include <asm/au1000.h>
16411 #include <asm/au1000_pcmcia.h>
16412
16413 +#if defined(CONFIG_MIPS_PB1200)
16414 +#include <asm/pb1200.h>
16415 +#elif defined(CONFIG_MIPS_DB1200)
16416 +#include <asm/db1200.h>
16417 +#else
16418 #include <asm/db1x00.h>
16419 +#endif
16420
16421 -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
16422 +#define PCMCIA_MAX_SOCK 1
16423 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
16424 +
16425 +/* VPP/VCC */
16426 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
16427 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
16428
16429 static int db1x00_pcmcia_init(struct pcmcia_init *init)
16430 {
16431 @@ -76,7 +87,7 @@
16432 db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
16433 {
16434 u32 inserted;
16435 - unsigned char vs;
16436 + u16 vs;
16437
16438 if(sock > PCMCIA_MAX_SOCK) return -1;
16439
16440 @@ -87,11 +98,11 @@
16441
16442 if (sock == 0) {
16443 vs = bcsr->status & 0x3;
16444 - inserted = !(bcsr->status & (1<<4));
16445 + inserted = BOARD_CARD_INSERTED(0);
16446 }
16447 else {
16448 vs = (bcsr->status & 0xC)>>2;
16449 - inserted = !(bcsr->status & (1<<5));
16450 + inserted = BOARD_CARD_INSERTED(1);
16451 }
16452
16453 DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n",
16454 @@ -144,16 +155,9 @@
16455 if(info->sock > PCMCIA_MAX_SOCK) return -1;
16456
16457 if(info->sock == 0)
16458 -#ifdef CONFIG_MIPS_DB1550
16459 - info->irq = AU1000_GPIO_3;
16460 + info->irq = BOARD_PC0_INT;
16461 else
16462 - info->irq = AU1000_GPIO_5;
16463 -#else
16464 - info->irq = AU1000_GPIO_2;
16465 - else
16466 - info->irq = AU1000_GPIO_5;
16467 -#endif
16468 -
16469 + info->irq = BOARD_PC1_INT;
16470 return 0;
16471 }
16472
16473 diff -Nur linux-2.4.29/drivers/pcmcia/Config.in linux-mips/drivers/pcmcia/Config.in
16474 --- linux-2.4.29/drivers/pcmcia/Config.in 2004-02-18 14:36:31.000000000 +0100
16475 +++ linux-mips/drivers/pcmcia/Config.in 2004-02-22 06:21:34.000000000 +0100
16476 @@ -30,16 +30,14 @@
16477 dep_tristate ' M8xx support' CONFIG_PCMCIA_M8XX $CONFIG_PCMCIA
16478 fi
16479 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
16480 - dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
16481 - if [ "$CONFIG_PCMCIA_AU1X00" != "n" ]; then
16482 - bool ' Pb1x00 board support' CONFIG_PCMCIA_PB1X00
16483 - bool ' Db1x00 board support' CONFIG_PCMCIA_DB1X00
16484 - bool ' XXS1500 board support' CONFIG_PCMCIA_XXS1500
16485 - fi
16486 + dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
16487 fi
16488 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
16489 dep_bool ' SiByte PCMCIA support' CONFIG_PCMCIA_SIBYTE $CONFIG_PCMCIA $CONFIG_BLK_DEV_IDE_SIBYTE
16490 fi
16491 + if [ "$CONFIG_VRC4171" = "y" -o "$CONFIG_VRC4171" = "m" ]; then
16492 + dep_tristate ' NEC VRC4171 Card Controllers support' CONFIG_PCMCIA_VRC4171 $CONFIG_PCMCIA
16493 + fi
16494 if [ "$CONFIG_VRC4173" = "y" -o "$CONFIG_VRC4173" = "m" ]; then
16495 dep_tristate ' NEC VRC4173 CARDU support' CONFIG_PCMCIA_VRC4173 $CONFIG_PCMCIA
16496 fi
16497 diff -Nur linux-2.4.29/drivers/pcmcia/Makefile linux-mips/drivers/pcmcia/Makefile
16498 --- linux-2.4.29/drivers/pcmcia/Makefile 2004-02-18 14:36:31.000000000 +0100
16499 +++ linux-mips/drivers/pcmcia/Makefile 2005-02-03 07:35:30.000000000 +0100
16500 @@ -61,9 +61,18 @@
16501
16502 obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o
16503 au1000_ss-objs-y := au1000_generic.o
16504 -au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00) += au1000_pb1x00.o
16505 -au1000_ss-objs-$(CONFIG_PCMCIA_DB1X00) += au1000_db1x00.o
16506 -au1000_ss-objs-$(CONFIG_PCMCIA_XXS1500) += au1000_xxs1500.o
16507 +au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
16508 +au1000_ss-objs-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
16509 +au1000_ss-objs-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
16510 +au1000_ss-objs-$(CONFIG_MIPS_PB1550) += au1000_pb1550.o
16511 +au1000_ss-objs-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
16512 +au1000_ss-objs-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
16513 +au1000_ss-objs-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
16514 +au1000_ss-objs-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
16515 +au1000_ss-objs-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
16516 +au1000_ss-objs-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
16517 +au1000_ss-objs-$(CONFIG_MIPS_HYDROGEN3) += au1000_hydrogen3.o
16518 +au1000_ss-objs-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
16519
16520 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
16521 obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
16522 @@ -89,6 +98,7 @@
16523 sa1100_cs-objs-$(CONFIG_SA1100_XP860) += sa1100_xp860.o sa1111_generic.o
16524 sa1100_cs-objs-$(CONFIG_SA1100_YOPY) += sa1100_yopy.o
16525
16526 +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o
16527 obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
16528
16529 include $(TOPDIR)/Rules.make
16530 diff -Nur linux-2.4.29/drivers/pcmcia/vrc4171_card.c linux-mips/drivers/pcmcia/vrc4171_card.c
16531 --- linux-2.4.29/drivers/pcmcia/vrc4171_card.c 1970-01-01 01:00:00.000000000 +0100
16532 +++ linux-mips/drivers/pcmcia/vrc4171_card.c 2004-01-19 16:54:58.000000000 +0100
16533 @@ -0,0 +1,886 @@
16534 +/*
16535 + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
16536 + *
16537 + * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
16538 + *
16539 + * This program is free software; you can redistribute it and/or modify
16540 + * it under the terms of the GNU General Public License as published by
16541 + * the Free Software Foundation; either version 2 of the License, or
16542 + * (at your option) any later version.
16543 + *
16544 + * This program is distributed in the hope that it will be useful,
16545 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
16546 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16547 + * GNU General Public License for more details.
16548 + *
16549 + * You should have received a copy of the GNU General Public License
16550 + * along with this program; if not, write to the Free Software
16551 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16552 + */
16553 +#include <linux/init.h>
16554 +#include <linux/ioport.h>
16555 +#include <linux/irq.h>
16556 +#include <linux/module.h>
16557 +#include <linux/spinlock.h>
16558 +#include <linux/sched.h>
16559 +#include <linux/types.h>
16560 +
16561 +#include <asm/io.h>
16562 +#include <asm/vr41xx/vrc4171.h>
16563 +
16564 +#include <pcmcia/ss.h>
16565 +
16566 +#include "i82365.h"
16567 +
16568 +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
16569 +MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
16570 +MODULE_LICENSE("GPL");
16571 +
16572 +#define CARD_MAX_SLOTS 2
16573 +#define CARD_SLOTA 0
16574 +#define CARD_SLOTB 1
16575 +#define CARD_SLOTB_OFFSET 0x40
16576 +
16577 +#define CARD_MEM_START 0x10000000
16578 +#define CARD_MEM_END 0x13ffffff
16579 +#define CARD_MAX_MEM_OFFSET 0x3ffffff
16580 +#define CARD_MAX_MEM_SPEED 1000
16581 +
16582 +#define CARD_CONTROLLER_INDEX 0x03e0
16583 +#define CARD_CONTROLLER_DATA 0x03e1
16584 +#define CARD_CONTROLLER_SIZE 2
16585 + /* Power register */
16586 + #define VPP_GET_VCC 0x01
16587 + #define POWER_ENABLE 0x10
16588 + #define CARD_VOLTAGE_SENSE 0x1f
16589 + #define VCC_3VORXV_CAPABLE 0x00
16590 + #define VCC_XV_ONLY 0x01
16591 + #define VCC_3V_CAPABLE 0x02
16592 + #define VCC_5V_ONLY 0x03
16593 + #define CARD_VOLTAGE_SELECT 0x2f
16594 + #define VCC_3V 0x01
16595 + #define VCC_5V 0x00
16596 + #define VCC_XV 0x02
16597 + #define VCC_STATUS_3V 0x02
16598 + #define VCC_STATUS_5V 0x01
16599 + #define VCC_STATUS_XV 0x03
16600 + #define GLOBAL_CONTROL 0x1e
16601 + #define EXWRBK 0x04
16602 + #define IRQPM_EN 0x08
16603 + #define CLRPMIRQ 0x10
16604 +
16605 +#define IO_MAX_MAPS 2
16606 +#define MEM_MAX_MAPS 5
16607 +
16608 +enum {
16609 + SLOTB_PROBE = 0,
16610 + SLOTB_NOPROBE_IO,
16611 + SLOTB_NOPROBE_MEM,
16612 + SLOTB_NOPROBE_ALL
16613 +};
16614 +
16615 +typedef struct vrc4171_socket {
16616 + int noprobe;
16617 + void (*handler)(void *, unsigned int);
16618 + void *info;
16619 + socket_cap_t cap;
16620 + spinlock_t event_lock;
16621 + uint16_t events;
16622 + struct socket_info_t *pcmcia_socket;
16623 + struct tq_struct tq_task;
16624 + char name[24];
16625 + int csc_irq;
16626 + int io_irq;
16627 +} vrc4171_socket_t;
16628 +
16629 +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
16630 +static int vrc4171_slotb = SLOTB_IS_NONE;
16631 +static unsigned int vrc4171_irq;
16632 +static uint16_t vrc4171_irq_mask = 0xdeb8;
16633 +
16634 +extern struct socket_info_t *pcmcia_register_socket(int slot,
16635 + struct pccard_operations *vtable,
16636 + int use_bus_pm);
16637 +extern void pcmcia_unregister_socket(struct socket_info_t *s);
16638 +
16639 +static inline uint8_t exca_read_byte(int slot, uint8_t index)
16640 +{
16641 + if (slot == CARD_SLOTB)
16642 + index += CARD_SLOTB_OFFSET;
16643 +
16644 + outb(index, CARD_CONTROLLER_INDEX);
16645 + return inb(CARD_CONTROLLER_DATA);
16646 +}
16647 +
16648 +static inline uint16_t exca_read_word(int slot, uint8_t index)
16649 +{
16650 + uint16_t data;
16651 +
16652 + if (slot == CARD_SLOTB)
16653 + index += CARD_SLOTB_OFFSET;
16654 +
16655 + outb(index++, CARD_CONTROLLER_INDEX);
16656 + data = inb(CARD_CONTROLLER_DATA);
16657 +
16658 + outb(index, CARD_CONTROLLER_INDEX);
16659 + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
16660 +
16661 + return data;
16662 +}
16663 +
16664 +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
16665 +{
16666 + if (slot == CARD_SLOTB)
16667 + index += CARD_SLOTB_OFFSET;
16668 +
16669 + outb(index, CARD_CONTROLLER_INDEX);
16670 + outb(data, CARD_CONTROLLER_DATA);
16671 +
16672 + return data;
16673 +}
16674 +
16675 +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
16676 +{
16677 + if (slot == CARD_SLOTB)
16678 + index += CARD_SLOTB_OFFSET;
16679 +
16680 + outb(index++, CARD_CONTROLLER_INDEX);
16681 + outb(data, CARD_CONTROLLER_DATA);
16682 +
16683 + outb(index, CARD_CONTROLLER_INDEX);
16684 + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
16685 +
16686 + return data;
16687 +}
16688 +
16689 +static inline int search_nonuse_irq(void)
16690 +{
16691 + int i;
16692 +
16693 + for (i = 0; i < 16; i++) {
16694 + if (vrc4171_irq_mask & (1 << i)) {
16695 + vrc4171_irq_mask &= ~(1 << i);
16696 + return i;
16697 + }
16698 + }
16699 +
16700 + return -1;
16701 +}
16702 +
16703 +static int pccard_init(unsigned int slot)
16704 +{
16705 + vrc4171_socket_t *socket = &vrc4171_sockets[slot];
16706 +
16707 + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
16708 + socket->cap.irq_mask = 0;
16709 + socket->cap.pci_irq = vrc4171_irq;
16710 + socket->cap.map_size = 0x1000;
16711 + socket->events = 0;
16712 + spin_lock_init(socket->event_lock);
16713 + socket->csc_irq = search_nonuse_irq();
16714 + socket->io_irq = search_nonuse_irq();
16715 +
16716 + return 0;
16717 +}
16718 +
16719 +static int pccard_suspend(unsigned int slot)
16720 +{
16721 + return -EINVAL;
16722 +}
16723 +
16724 +static int pccard_register_callback(unsigned int slot,
16725 + void (*handler)(void *, unsigned int),
16726 + void *info)
16727 +{
16728 + vrc4171_socket_t *socket;
16729 +
16730 + if (slot >= CARD_MAX_SLOTS)
16731 + return -EINVAL;
16732 +
16733 + socket = &vrc4171_sockets[slot];
16734 +
16735 + socket->handler = handler;
16736 + socket->info = info;
16737 +
16738 + if (handler)
16739 + MOD_INC_USE_COUNT;
16740 + else
16741 + MOD_DEC_USE_COUNT;
16742 +
16743 + return 0;
16744 +}
16745 +
16746 +static int pccard_inquire_socket(unsigned int slot, socket_cap_t *cap)
16747 +{
16748 + vrc4171_socket_t *socket;
16749 +
16750 + if (slot >= CARD_MAX_SLOTS || cap == NULL)
16751 + return -EINVAL;
16752 +
16753 + socket = &vrc4171_sockets[slot];
16754 +
16755 + *cap = socket->cap;
16756 +
16757 + return 0;
16758 +}
16759 +
16760 +static int pccard_get_status(unsigned int slot, u_int *value)
16761 +{
16762 + uint8_t status, sense;
16763 + u_int val = 0;
16764 +
16765 + if (slot >= CARD_MAX_SLOTS || value == NULL)
16766 + return -EINVAL;
16767 +
16768 + status = exca_read_byte(slot, I365_STATUS);
16769 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
16770 + if (status & I365_CS_STSCHG)
16771 + val |= SS_STSCHG;
16772 + } else {
16773 + if (!(status & I365_CS_BVD1))
16774 + val |= SS_BATDEAD;
16775 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
16776 + val |= SS_BATWARN;
16777 + }
16778 + if ((status & I365_CS_DETECT) == I365_CS_DETECT)
16779 + val |= SS_DETECT;
16780 + if (status & I365_CS_WRPROT)
16781 + val |= SS_WRPROT;
16782 + if (status & I365_CS_READY)
16783 + val |= SS_READY;
16784 + if (status & I365_CS_POWERON)
16785 + val |= SS_POWERON;
16786 +
16787 + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
16788 + switch (sense) {
16789 + case VCC_3VORXV_CAPABLE:
16790 + val |= SS_3VCARD | SS_XVCARD;
16791 + break;
16792 + case VCC_XV_ONLY:
16793 + val |= SS_XVCARD;
16794 + break;
16795 + case VCC_3V_CAPABLE:
16796 + val |= SS_3VCARD;
16797 + break;
16798 + default:
16799 + /* 5V only */
16800 + break;
16801 + }
16802 +
16803 + *value = val;
16804 +
16805 + return 0;
16806 +}
16807 +
16808 +static inline u_char get_Vcc_value(uint8_t voltage)
16809 +{
16810 + switch (voltage) {
16811 + case VCC_STATUS_3V:
16812 + return 33;
16813 + case VCC_STATUS_5V:
16814 + return 50;
16815 + default:
16816 + break;
16817 + }
16818 +
16819 + return 0;
16820 +}
16821 +
16822 +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc)
16823 +{
16824 + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02)
16825 + return Vcc;
16826 +
16827 + return 0;
16828 +}
16829 +
16830 +static int pccard_get_socket(unsigned int slot, socket_state_t *state)
16831 +{
16832 + vrc4171_socket_t *socket;
16833 + uint8_t power, voltage, control, cscint;
16834 +
16835 + if (slot >= CARD_MAX_SLOTS || state == NULL)
16836 + return -EINVAL;
16837 +
16838 + socket = &vrc4171_sockets[slot];
16839 +
16840 + power = exca_read_byte(slot, I365_POWER);
16841 + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT);
16842 +
16843 + state->Vcc = get_Vcc_value(voltage);
16844 + state->Vpp = get_Vpp_value(power, state->Vcc);
16845 +
16846 + state->flags = 0;
16847 + if (power & POWER_ENABLE)
16848 + state->flags |= SS_PWR_AUTO;
16849 + if (power & I365_PWR_OUT)
16850 + state->flags |= SS_OUTPUT_ENA;
16851 +
16852 + control = exca_read_byte(slot, I365_INTCTL);
16853 + if (control & I365_PC_IOCARD)
16854 + state->flags |= SS_IOCARD;
16855 + if (!(control & I365_PC_RESET))
16856 + state->flags |= SS_RESET;
16857 +
16858 + cscint = exca_read_byte(slot, I365_CSCINT);
16859 + state->csc_mask = 0;
16860 + if (state->flags & SS_IOCARD) {
16861 + if (cscint & I365_CSC_STSCHG)
16862 + state->flags |= SS_STSCHG;
16863 + } else {
16864 + if (cscint & I365_CSC_BVD1)
16865 + state->csc_mask |= SS_BATDEAD;
16866 + if (cscint & I365_CSC_BVD2)
16867 + state->csc_mask |= SS_BATWARN;
16868 + }
16869 + if (cscint & I365_CSC_READY)
16870 + state->csc_mask |= SS_READY;
16871 + if (cscint & I365_CSC_DETECT)
16872 + state->csc_mask |= SS_DETECT;
16873 +
16874 + return 0;
16875 +}
16876 +
16877 +static inline uint8_t set_Vcc_value(u_char Vcc)
16878 +{
16879 + switch (Vcc) {
16880 + case 33:
16881 + return VCC_3V;
16882 + case 50:
16883 + return VCC_5V;
16884 + }
16885 +
16886 + /* Small voltage is chosen for safety. */
16887 + return VCC_3V;
16888 +}
16889 +
16890 +static int pccard_set_socket(unsigned int slot, socket_state_t *state)
16891 +{
16892 + vrc4171_socket_t *socket;
16893 + uint8_t voltage, power, control, cscint;
16894 +
16895 + if (slot >= CARD_MAX_SLOTS ||
16896 + (state->Vpp != state->Vcc && state->Vpp != 0) ||
16897 + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
16898 + return -EINVAL;
16899 +
16900 + socket = &vrc4171_sockets[slot];
16901 +
16902 + spin_lock_irq(&socket->event_lock);
16903 +
16904 + voltage = set_Vcc_value(state->Vcc);
16905 + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
16906 +
16907 + power = POWER_ENABLE;
16908 + if (state->Vpp == state->Vcc)
16909 + power |= VPP_GET_VCC;
16910 + if (state->flags & SS_OUTPUT_ENA)
16911 + power |= I365_PWR_OUT;
16912 + exca_write_byte(slot, I365_POWER, power);
16913 +
16914 + control = 0;
16915 + if (state->io_irq != 0)
16916 + control |= socket->io_irq;
16917 + if (state->flags & SS_IOCARD)
16918 + control |= I365_PC_IOCARD;
16919 + if (state->flags & SS_RESET)
16920 + control &= ~I365_PC_RESET;
16921 + else
16922 + control |= I365_PC_RESET;
16923 + exca_write_byte(slot, I365_INTCTL, control);
16924 +
16925 + cscint = 0;
16926 + exca_write_byte(slot, I365_CSCINT, cscint);
16927 + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
16928 + if (state->csc_mask != 0)
16929 + cscint |= socket->csc_irq << 8;
16930 + if (state->flags & SS_IOCARD) {
16931 + if (state->csc_mask & SS_STSCHG)
16932 + cscint |= I365_CSC_STSCHG;
16933 + } else {
16934 + if (state->csc_mask & SS_BATDEAD)
16935 + cscint |= I365_CSC_BVD1;
16936 + if (state->csc_mask & SS_BATWARN)
16937 + cscint |= I365_CSC_BVD2;
16938 + }
16939 + if (state->csc_mask & SS_READY)
16940 + cscint |= I365_CSC_READY;
16941 + if (state->csc_mask & SS_DETECT)
16942 + cscint |= I365_CSC_DETECT;
16943 + exca_write_byte(slot, I365_CSCINT, cscint);
16944 +
16945 + spin_unlock_irq(&socket->event_lock);
16946 +
16947 + return 0;
16948 +}
16949 +
16950 +static int pccard_get_io_map(unsigned int slot, struct pccard_io_map *io)
16951 +{
16952 + vrc4171_socket_t *socket;
16953 + uint8_t ioctl, addrwin;
16954 + u_char map;
16955 +
16956 + if (slot >= CARD_MAX_SLOTS || io == NULL ||
16957 + io->map >= IO_MAX_MAPS)
16958 + return -EINVAL;
16959 +
16960 + socket = &vrc4171_sockets[slot];
16961 + map = io->map;
16962 +
16963 + io->start = exca_read_word(slot, I365_IO(map)+I365_W_START);
16964 + io->stop = exca_read_word(slot, I365_IO(map)+I365_W_STOP);
16965 +
16966 + ioctl = exca_read_byte(slot, I365_IOCTL);
16967 + if (io->flags & I365_IOCTL_WAIT(map))
16968 + io->speed = 1;
16969 + else
16970 + io->speed = 0;
16971 +
16972 + io->flags = 0;
16973 + if (ioctl & I365_IOCTL_16BIT(map))
16974 + io->flags |= MAP_16BIT;
16975 + if (ioctl & I365_IOCTL_IOCS16(map))
16976 + io->flags |= MAP_AUTOSZ;
16977 + if (ioctl & I365_IOCTL_0WS(map))
16978 + io->flags |= MAP_0WS;
16979 +
16980 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
16981 + if (addrwin & I365_ENA_IO(map))
16982 + io->flags |= MAP_ACTIVE;
16983 +
16984 + return 0;
16985 +}
16986 +
16987 +static int pccard_set_io_map(unsigned int slot, struct pccard_io_map *io)
16988 +{
16989 + vrc4171_socket_t *socket;
16990 + uint8_t ioctl, addrwin;
16991 + u_char map;
16992 +
16993 + if (slot >= CARD_MAX_SLOTS ||
16994 + io == NULL || io->map >= IO_MAX_MAPS ||
16995 + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
16996 + return -EINVAL;
16997 +
16998 + socket = &vrc4171_sockets[slot];
16999 + map = io->map;
17000 +
17001 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17002 + if (addrwin & I365_ENA_IO(map)) {
17003 + addrwin &= ~I365_ENA_IO(map);
17004 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17005 + }
17006 +
17007 + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
17008 + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
17009 +
17010 + ioctl = 0;
17011 + if (io->speed > 0)
17012 + ioctl |= I365_IOCTL_WAIT(map);
17013 + if (io->flags & MAP_16BIT)
17014 + ioctl |= I365_IOCTL_16BIT(map);
17015 + if (io->flags & MAP_AUTOSZ)
17016 + ioctl |= I365_IOCTL_IOCS16(map);
17017 + if (io->flags & MAP_0WS)
17018 + ioctl |= I365_IOCTL_0WS(map);
17019 + exca_write_byte(slot, I365_IOCTL, ioctl);
17020 +
17021 + if (io->flags & MAP_ACTIVE) {
17022 + addrwin |= I365_ENA_IO(map);
17023 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17024 + }
17025 +
17026 + return 0;
17027 +}
17028 +
17029 +static int pccard_get_mem_map(unsigned int slot, struct pccard_mem_map *mem)
17030 +{
17031 + vrc4171_socket_t *socket;
17032 + uint8_t addrwin;
17033 + u_long start, stop;
17034 + u_int offset;
17035 + u_char map;
17036 +
17037 + if (slot >= CARD_MAX_SLOTS || mem == NULL || mem->map >= MEM_MAX_MAPS)
17038 + return -EINVAL;
17039 +
17040 + socket = &vrc4171_sockets[slot];
17041 + map = mem->map;
17042 +
17043 + mem->flags = 0;
17044 + mem->speed = 0;
17045 +
17046 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17047 + if (addrwin & I365_ENA_MEM(map))
17048 + mem->flags |= MAP_ACTIVE;
17049 +
17050 + start = exca_read_word(slot, I365_MEM(map)+I365_W_START);
17051 + if (start & I365_MEM_16BIT)
17052 + mem->flags |= MAP_16BIT;
17053 + mem->sys_start = (start & 0x3fffUL) << 12;
17054 +
17055 + stop = exca_read_word(slot, I365_MEM(map)+I365_W_STOP);
17056 + if (start & I365_MEM_WS0)
17057 + mem->speed += 1;
17058 + if (start & I365_MEM_WS1)
17059 + mem->speed += 2;
17060 + mem->sys_stop = ((stop & 0x3fffUL) << 12) + 0xfffUL;
17061 +
17062 + offset = exca_read_word(slot, I365_MEM(map)+I365_W_OFF);
17063 + if (offset & I365_MEM_REG)
17064 + mem->flags |= MAP_ATTRIB;
17065 + if (offset & I365_MEM_WRPROT)
17066 + mem->flags |= MAP_WRPROT;
17067 + mem->card_start = (offset & 0x3fffUL) << 12;
17068 +
17069 + mem->sys_start += CARD_MEM_START;
17070 + mem->sys_stop += CARD_MEM_START;
17071 +
17072 + return 0;
17073 +}
17074 +
17075 +static int pccard_set_mem_map(unsigned int slot, struct pccard_mem_map *mem)
17076 +{
17077 + vrc4171_socket_t *socket;
17078 + uint16_t start, stop, offset;
17079 + uint8_t addrwin;
17080 + u_char map;
17081 +
17082 + if (slot >= CARD_MAX_SLOTS ||
17083 + mem == NULL || mem->map >= MEM_MAX_MAPS ||
17084 + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
17085 + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
17086 + mem->sys_start > mem->sys_stop ||
17087 + mem->card_start > CARD_MAX_MEM_OFFSET ||
17088 + mem->speed > CARD_MAX_MEM_SPEED)
17089 + return -EINVAL;
17090 +
17091 + socket = &vrc4171_sockets[slot];
17092 + map = mem->map;
17093 +
17094 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17095 + if (addrwin & I365_ENA_MEM(map)) {
17096 + addrwin &= ~I365_ENA_MEM(map);
17097 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17098 + }
17099 +
17100 + start = (mem->sys_start >> 12) & 0x3fff;
17101 + if (mem->flags & MAP_16BIT)
17102 + start |= I365_MEM_16BIT;
17103 + exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
17104 +
17105 + stop = (mem->sys_stop >> 12) & 0x3fff;
17106 + switch (mem->speed) {
17107 + case 0:
17108 + break;
17109 + case 1:
17110 + stop |= I365_MEM_WS0;
17111 + break;
17112 + case 2:
17113 + stop |= I365_MEM_WS1;
17114 + break;
17115 + default:
17116 + stop |= I365_MEM_WS0 | I365_MEM_WS1;
17117 + break;
17118 + }
17119 + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
17120 +
17121 + offset = (mem->card_start >> 12) & 0x3fff;
17122 + if (mem->flags & MAP_ATTRIB)
17123 + offset |= I365_MEM_REG;
17124 + if (mem->flags & MAP_WRPROT)
17125 + offset |= I365_MEM_WRPROT;
17126 + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
17127 +
17128 + if (mem->flags & MAP_ACTIVE) {
17129 + addrwin |= I365_ENA_MEM(map);
17130 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17131 + }
17132 +
17133 + return 0;
17134 +}
17135 +
17136 +static void pccard_proc_setup(unsigned int slot, struct proc_dir_entry *base)
17137 +{
17138 +}
17139 +
17140 +static struct pccard_operations vrc4171_pccard_operations = {
17141 + .init = pccard_init,
17142 + .suspend = pccard_suspend,
17143 + .register_callback = pccard_register_callback,
17144 + .inquire_socket = pccard_inquire_socket,
17145 + .get_status = pccard_get_status,
17146 + .get_socket = pccard_get_socket,
17147 + .set_socket = pccard_set_socket,
17148 + .get_io_map = pccard_get_io_map,
17149 + .set_io_map = pccard_set_io_map,
17150 + .get_mem_map = pccard_get_mem_map,
17151 + .set_mem_map = pccard_set_mem_map,
17152 + .proc_setup = pccard_proc_setup,
17153 +};
17154 +
17155 +static void pccard_bh(void *data)
17156 +{
17157 + vrc4171_socket_t *socket = (vrc4171_socket_t *)data;
17158 + uint16_t events;
17159 +
17160 + spin_lock_irq(&socket->event_lock);
17161 + events = socket->events;
17162 + socket->events = 0;
17163 + spin_unlock_irq(&socket->event_lock);
17164 +
17165 + if (socket->handler)
17166 + socket->handler(socket->info, events);
17167 +}
17168 +
17169 +static inline uint16_t get_events(int slot)
17170 +{
17171 + uint16_t events = 0;
17172 + uint8_t status, csc;
17173 +
17174 + status = exca_read_byte(slot, I365_STATUS);
17175 + csc = exca_read_byte(slot, I365_CSC);
17176 +
17177 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
17178 + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
17179 + events |= SS_STSCHG;
17180 + } else {
17181 + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
17182 + if (!(status & I365_CS_BVD1))
17183 + events |= SS_BATDEAD;
17184 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
17185 + events |= SS_BATWARN;
17186 + }
17187 + }
17188 + if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
17189 + events |= SS_READY;
17190 + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
17191 + events |= SS_DETECT;
17192 +
17193 + return events;
17194 +}
17195 +
17196 +static void pccard_status_change(int slot, vrc4171_socket_t *socket)
17197 +{
17198 + uint16_t events;
17199 +
17200 + socket->tq_task.routine = pccard_bh;
17201 + socket->tq_task.data = socket;
17202 +
17203 + events = get_events(slot);
17204 + if (events) {
17205 + spin_lock(&socket->event_lock);
17206 + socket->events |= events;
17207 + spin_unlock(&socket->event_lock);
17208 + schedule_task(&socket->tq_task);
17209 + }
17210 +}
17211 +
17212 +static void pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
17213 +{
17214 + vrc4171_socket_t *socket;
17215 + uint16_t status;
17216 +
17217 + status = vrc4171_get_irq_status();
17218 + if (status & IRQ_A) {
17219 + socket = &vrc4171_sockets[CARD_SLOTA];
17220 + if (socket->noprobe == SLOTB_PROBE) {
17221 + if (status & (1 << socket->csc_irq))
17222 + pccard_status_change(CARD_SLOTA, socket);
17223 + }
17224 + }
17225 +
17226 + if (status & IRQ_B) {
17227 + socket = &vrc4171_sockets[CARD_SLOTB];
17228 + if (socket->noprobe == SLOTB_PROBE) {
17229 + if (status & (1 << socket->csc_irq))
17230 + pccard_status_change(CARD_SLOTB, socket);
17231 + }
17232 + }
17233 +}
17234 +
17235 +static inline void reserve_using_irq(int slot)
17236 +{
17237 + unsigned int irq;
17238 +
17239 + irq = exca_read_byte(slot, I365_INTCTL);
17240 + irq &= 0x0f;
17241 + vrc4171_irq_mask &= ~(1 << irq);
17242 +
17243 + irq = exca_read_byte(slot, I365_CSCINT);
17244 + irq = (irq & 0xf0) >> 4;
17245 + vrc4171_irq_mask &= ~(1 << irq);
17246 +}
17247 +
17248 +static int __devinit vrc4171_add_socket(int slot)
17249 +{
17250 + vrc4171_socket_t *socket;
17251 +
17252 + if (slot >= CARD_MAX_SLOTS)
17253 + return -EINVAL;
17254 +
17255 + socket = &vrc4171_sockets[slot];
17256 + if (socket->noprobe != SLOTB_PROBE) {
17257 + uint8_t addrwin;
17258 +
17259 + switch (socket->noprobe) {
17260 + case SLOTB_NOPROBE_MEM:
17261 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17262 + addrwin &= 0x1f;
17263 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17264 + break;
17265 + case SLOTB_NOPROBE_IO:
17266 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17267 + addrwin &= 0xc0;
17268 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17269 + break;
17270 + default:
17271 + break;
17272 + }
17273 +
17274 + reserve_using_irq(slot);
17275 +
17276 + return 0;
17277 + }
17278 +
17279 + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
17280 +
17281 + socket->pcmcia_socket = pcmcia_register_socket(slot, &vrc4171_pccard_operations, 1);
17282 + if (socket->pcmcia_socket == NULL)
17283 + return -ENOMEM;
17284 +
17285 + exca_write_byte(slot, I365_ADDRWIN, 0);
17286 +
17287 + exca_write_byte(slot, GLOBAL_CONTROL, 0);
17288 +
17289 + return 0;
17290 +}
17291 +
17292 +static void vrc4171_remove_socket(int slot)
17293 +{
17294 + vrc4171_socket_t *socket;
17295 +
17296 + if (slot >= CARD_MAX_SLOTS)
17297 + return;
17298 +
17299 + socket = &vrc4171_sockets[slot];
17300 +
17301 + if (socket->pcmcia_socket != NULL) {
17302 + pcmcia_unregister_socket(socket->pcmcia_socket);
17303 + socket->pcmcia_socket = NULL;
17304 + }
17305 +}
17306 +
17307 +static int __devinit vrc4171_card_setup(char *options)
17308 +{
17309 + if (options == NULL || *options == '\0')
17310 + return 0;
17311 +
17312 + if (strncmp(options, "irq:", 4) == 0) {
17313 + int irq;
17314 + options += 4;
17315 + irq = simple_strtoul(options, &options, 0);
17316 + if (irq >= 0 && irq < NR_IRQS)
17317 + vrc4171_irq = irq;
17318 +
17319 + if (*options != ',')
17320 + return 0;
17321 + options++;
17322 + }
17323 +
17324 + if (strncmp(options, "slota:", 6) == 0) {
17325 + options += 6;
17326 + if (*options != '\0') {
17327 + if (strncmp(options, "noprobe", 7) == 0) {
17328 + vrc4171_sockets[CARD_SLOTA].noprobe = 1;
17329 + options += 7;
17330 + }
17331 +
17332 + if (*options != ',')
17333 + return 0;
17334 + options++;
17335 + } else
17336 + return 0;
17337 +
17338 + }
17339 +
17340 + if (strncmp(options, "slotb:", 6) == 0) {
17341 + options += 6;
17342 + if (*options != '\0') {
17343 + if (strncmp(options, "pccard", 6) == 0) {
17344 + vrc4171_slotb = SLOTB_IS_PCCARD;
17345 + options += 6;
17346 + } else if (strncmp(options, "cf", 2) == 0) {
17347 + vrc4171_slotb = SLOTB_IS_CF;
17348 + options += 2;
17349 + } else if (strncmp(options, "flashrom", 8) == 0) {
17350 + vrc4171_slotb = SLOTB_IS_FLASHROM;
17351 + options += 8;
17352 + } else if (strncmp(options, "none", 4) == 0) {
17353 + vrc4171_slotb = SLOTB_IS_NONE;
17354 + options += 4;
17355 + }
17356 +
17357 + if (*options != ',')
17358 + return 0;
17359 + options++;
17360 +
17361 + if ( strncmp(options, "memnoprobe", 10) == 0)
17362 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_MEM;
17363 + if ( strncmp(options, "ionoprobe", 9) == 0)
17364 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_IO;
17365 + if ( strncmp(options, "noprobe", 7) == 0)
17366 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_ALL;
17367 + }
17368 + }
17369 +
17370 + return 0;
17371 +}
17372 +
17373 +__setup("vrc4171_card=", vrc4171_card_setup);
17374 +
17375 +static int __devinit vrc4171_card_init(void)
17376 +{
17377 + int retval, slot;
17378 +
17379 + vrc4171_set_multifunction_pin(vrc4171_slotb);
17380 +
17381 + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
17382 + "NEC VRC4171 Card Controller") == NULL)
17383 + return -EBUSY;
17384 +
17385 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
17386 + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
17387 + break;
17388 +
17389 + retval = vrc4171_add_socket(slot);
17390 + if (retval != 0)
17391 + return retval;
17392 + }
17393 +
17394 + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
17395 + "NEC VRC4171 Card Controller", vrc4171_sockets);
17396 + if (retval < 0) {
17397 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
17398 + vrc4171_remove_socket(slot);
17399 +
17400 + return retval;
17401 + }
17402 +
17403 + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
17404 +
17405 + return 0;
17406 +}
17407 +
17408 +static void __devexit vrc4171_card_exit(void)
17409 +{
17410 + int slot;
17411 +
17412 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
17413 + vrc4171_remove_socket(slot);
17414 +
17415 + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
17416 +}
17417 +
17418 +module_init(vrc4171_card_init);
17419 +module_exit(vrc4171_card_exit);
17420 diff -Nur linux-2.4.29/drivers/scsi/NCR53C9x.h linux-mips/drivers/scsi/NCR53C9x.h
17421 --- linux-2.4.29/drivers/scsi/NCR53C9x.h 2004-02-18 14:36:31.000000000 +0100
17422 +++ linux-mips/drivers/scsi/NCR53C9x.h 2003-12-15 19:19:51.000000000 +0100
17423 @@ -144,12 +144,7 @@
17424
17425 #ifndef MULTIPLE_PAD_SIZES
17426
17427 -#ifdef CONFIG_CPU_HAS_WB
17428 -#include <asm/wbflush.h>
17429 -#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
17430 -#else
17431 -#define esp_write(__reg, __val) ((__reg) = (__val))
17432 -#endif
17433 +#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
17434 #define esp_read(__reg) (__reg)
17435
17436 struct ESP_regs {
17437 diff -Nur linux-2.4.29/drivers/sound/au1550_i2s.c linux-mips/drivers/sound/au1550_i2s.c
17438 --- linux-2.4.29/drivers/sound/au1550_i2s.c 2005-01-19 15:10:04.000000000 +0100
17439 +++ linux-mips/drivers/sound/au1550_i2s.c 2005-02-08 08:07:50.000000000 +0100
17440 @@ -41,6 +41,7 @@
17441 * 675 Mass Ave, Cambridge, MA 02139, USA.
17442 *
17443 */
17444 +
17445 #include <linux/version.h>
17446 #include <linux/module.h>
17447 #include <linux/string.h>
17448 @@ -62,7 +63,45 @@
17449 #include <asm/uaccess.h>
17450 #include <asm/hardirq.h>
17451 #include <asm/au1000.h>
17452 +
17453 +#if defined(CONFIG_SOC_AU1550)
17454 #include <asm/pb1550.h>
17455 +#endif
17456 +
17457 +#if defined(CONFIG_MIPS_PB1200)
17458 +#define WM8731
17459 +#define WM_MODE_USB
17460 +#include <asm/pb1200.h>
17461 +#endif
17462 +
17463 +#if defined(CONFIG_MIPS_FICMMP)
17464 +#define WM8721
17465 +#define WM_MODE_NORMAL
17466 +#include <asm/ficmmp.h>
17467 +#endif
17468 +
17469 +
17470 +#define WM_VOLUME_MIN 47
17471 +#define WM_VOLUME_SCALE 80
17472 +
17473 +#if defined(WM8731)
17474 + /* OSS interface to the wm i2s.. */
17475 + #define CODEC_NAME "Wolfson WM8731 I2S"
17476 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM | SOUND_MASK_LINE)
17477 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK | SOUND_MASK_MIC)
17478 + #define WM_I2S_RECORD_MASK (SOUND_MASK_MIC | SOUND_MASK_LINE1 | SOUND_MASK_LINE)
17479 +#elif defined(WM8721)
17480 + #define CODEC_NAME "Wolfson WM8721 I2S"
17481 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM)
17482 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK)
17483 + #define WM_I2S_RECORD_MASK (0)
17484 +#endif
17485 +
17486 +
17487 +#define supported_mixer(FOO) ((FOO >= 0) && \
17488 + (FOO < SOUND_MIXER_NRDEVICES) && \
17489 + WM_I2S_SUPPORTED_MASK & (1<<FOO) )
17490 +
17491 #include <asm/au1xxx_psc.h>
17492 #include <asm/au1xxx_dbdma.h>
17493
17494 @@ -98,13 +137,51 @@
17495 * 0 = no VRA, 1 = use VRA if codec supports it
17496 * The framework is here, but we currently force no VRA.
17497 */
17498 +#if defined(CONFIG_MIPS_PB1200) | defined(CONFIG_MIPS_PB1550)
17499 static int vra = 0;
17500 +#elif defined(CONFIG_MIPS_FICMMP)
17501 +static int vra = 1;
17502 +#endif
17503 +
17504 +#define WM_REG_L_HEADPHONE_OUT 0x02
17505 +#define WM_REG_R_HEADPHONE_OUT 0x03
17506 +#define WM_REG_ANALOGUE_AUDIO_PATH_CTRL 0x04
17507 +#define WM_REG_DIGITAL_AUDIO_PATH_CTRL 0x05
17508 +#define WM_REG_POWER_DOWN_CTRL 0x06
17509 +#define WM_REG_DIGITAL_AUDIO_IF 0x07
17510 +#define WM_REG_SAMPLING_CONTROL 0x08
17511 +#define WM_REG_ACTIVE_CTRL 0x09
17512 +#define WM_REG_RESET 0x0F
17513 +#define WM_SC_SR_96000 (0x7<<2)
17514 +#define WM_SC_SR_88200 (0xF<<2)
17515 +#define WM_SC_SR_48000 (0x0<<2)
17516 +#define WM_SC_SR_44100 (0x8<<2)
17517 +#define WM_SC_SR_32000 (0x6<<2)
17518 +#define WM_SC_SR_8018 (0x9<<2)
17519 +#define WM_SC_SR_8000 (0x1<<2)
17520 +#define WM_SC_MODE_USB 1
17521 +#define WM_SC_MODE_NORMAL 0
17522 +#define WM_SC_BOSR_250FS (0<<1)
17523 +#define WM_SC_BOSR_272FS (1<<1)
17524 +#define WM_SC_BOSR_256FS (0<<1)
17525 +#define WM_SC_BOSR_128FS (0<<1)
17526 +#define WM_SC_BOSR_384FS (1<<1)
17527 +#define WM_SC_BOSR_192FS (1<<1)
17528 +
17529 +#define WS_64FS 31
17530 +#define WS_96FS 47
17531 +#define WS_128FS 63
17532 +#define WS_192FS 95
17533 +
17534 +#define MIN_Q_COUNT 2
17535 +
17536 MODULE_PARM(vra, "i");
17537 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
17538
17539 static struct au1550_state {
17540 /* soundcore stuff */
17541 int dev_audio;
17542 + int dev_mixer;
17543
17544 spinlock_t lock;
17545 struct semaphore open_sem;
17546 @@ -114,6 +191,11 @@
17547 int no_vra;
17548 volatile psc_i2s_t *psc_addr;
17549
17550 + int level_line;
17551 + int level_mic;
17552 + int level_left;
17553 + int level_right;
17554 +
17555 struct dmabuf {
17556 u32 dmanr;
17557 unsigned sample_rate;
17558 @@ -195,60 +277,224 @@
17559 }
17560 }
17561
17562 -/* Just a place holder. The Wolfson codec is a write only device,
17563 - * so we would have to keep a local copy of the data.
17564 - */
17565 -#if 0
17566 -static u8
17567 -rdcodec(u8 addr)
17568 -{
17569 - return 0 /* data */;
17570 -}
17571 -#endif
17572 -
17573 -
17574 static void
17575 -wrcodec(u8 ctlreg, u8 val)
17576 +wrcodec(u8 ctlreg, u16 val)
17577 {
17578 int rcnt;
17579 extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val);
17580 -
17581 /* The codec is a write only device, with a 16-bit control/data
17582 * word. Although it is written as two bytes on the I2C, the
17583 * format is actually 7 bits of register and 9 bits of data.
17584 * The ls bit of the first byte is the ms bit of the data.
17585 */
17586 rcnt = 0;
17587 - while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1)
17588 - && (rcnt < 50)) {
17589 + while ((pb1550_wm_codec_write((0x36 >> 1),
17590 + (ctlreg << 1) | ((val >> 8) & 0x01),
17591 + (u8) (val & 0x00FF)) != 1) &&
17592 + (rcnt < 50)) {
17593 rcnt++;
17594 -#if 0
17595 - printk("Codec write retry %02x %02x\n", ctlreg, val);
17596 -#endif
17597 }
17598 +
17599 + au1550_delay(10);
17600 +}
17601 +
17602 +static int
17603 +au1550_open_mixdev(struct inode *inode, struct file *file)
17604 +{
17605 + file->private_data = &au1550_state;
17606 + return 0;
17607 +}
17608 +
17609 +static int
17610 +au1550_release_mixdev(struct inode *inode, struct file *file)
17611 +{
17612 + return 0;
17613 +}
17614 +
17615 +static int wm_i2s_read_mixer(struct au1550_state *s, int oss_channel)
17616 +{
17617 + int ret = 0;
17618 +
17619 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
17620 + /* nice stereo mixers .. */
17621 +
17622 + ret = s->level_left | (s->level_right << 8);
17623 + } else if (oss_channel == SOUND_MIXER_MIC) {
17624 + ret = 0;
17625 + /* TODO: Implement read mixer for input/output codecs */
17626 + }
17627 +
17628 + return ret;
17629 }
17630
17631 +static void wm_i2s_write_mixer(struct au1550_state *s, int oss_channel, unsigned int left, unsigned int right)
17632 +{
17633 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
17634 + /* stereo mixers */
17635 + s->level_left = left;
17636 + s->level_right = right;
17637 +
17638 + right = (right * WM_VOLUME_SCALE) / 100;
17639 + left = (left * WM_VOLUME_SCALE) / 100;
17640 + if (right > WM_VOLUME_SCALE)
17641 + right = WM_VOLUME_SCALE;
17642 + if (left > WM_VOLUME_SCALE)
17643 + left = WM_VOLUME_SCALE;
17644 +
17645 + right += WM_VOLUME_MIN;
17646 + left += WM_VOLUME_MIN;
17647 +
17648 + wrcodec(WM_REG_L_HEADPHONE_OUT, left);
17649 + wrcodec(WM_REG_R_HEADPHONE_OUT, right);
17650 +
17651 + }else if (oss_channel == SOUND_MIXER_MIC) {
17652 + /* TODO: implement write mixer for input/output codecs */
17653 + }
17654 +}
17655 +
17656 +/* a thin wrapper for write_mixer */
17657 +static void wm_i2s_set_mixer(struct au1550_state *s, unsigned int oss_mixer, unsigned int val )
17658 +{
17659 + unsigned int left,right;
17660 +
17661 + /* cleanse input a little */
17662 + right = ((val >> 8) & 0xff) ;
17663 + left = (val & 0xff) ;
17664 +
17665 + if (right > 100) right = 100;
17666 + if (left > 100) left = 100;
17667 +
17668 + wm_i2s_write_mixer(s, oss_mixer, left, right);
17669 +}
17670 +
17671 +static int
17672 +au1550_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
17673 +{
17674 + struct au1550_state *s = (struct au1550_state *)file->private_data;
17675 +
17676 + int i, val = 0;
17677 +
17678 + if (cmd == SOUND_MIXER_INFO) {
17679 + mixer_info info;
17680 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
17681 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
17682 + info.modify_counter = 0;
17683 + if (copy_to_user((void *)arg, &info, sizeof(info)))
17684 + return -EFAULT;
17685 + return 0;
17686 + }
17687 + if (cmd == SOUND_OLD_MIXER_INFO) {
17688 + _old_mixer_info info;
17689 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
17690 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
17691 + if (copy_to_user((void *)arg, &info, sizeof(info)))
17692 + return -EFAULT;
17693 + return 0;
17694 + }
17695 +
17696 + if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
17697 + return -EINVAL;
17698 +
17699 + if (cmd == OSS_GETVERSION)
17700 + return put_user(SOUND_VERSION, (int *)arg);
17701 +
17702 + if (_SIOC_DIR(cmd) == _SIOC_READ) {
17703 + switch (_IOC_NR(cmd)) {
17704 + case SOUND_MIXER_RECSRC: /* give them the current record src */
17705 + val = 0;
17706 + /*
17707 + if (!codec->recmask_io) {
17708 + val = 0;
17709 + } else {
17710 + val = codec->recmask_io(codec, 1, 0);
17711 + }*/
17712 + break;
17713 +
17714 + case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
17715 + val = WM_I2S_SUPPORTED_MASK;
17716 + break;
17717 +
17718 + case SOUND_MIXER_RECMASK:
17719 + /* Arg contains a bit for each supported recording
17720 + * source */
17721 + val = WM_I2S_RECORD_MASK;
17722 + break;
17723 +
17724 + case SOUND_MIXER_STEREODEVS:
17725 + /* Mixer channels supporting stereo */
17726 + val = WM_I2S_STEREO_MASK;
17727 + break;
17728 +
17729 + case SOUND_MIXER_CAPS:
17730 + val = SOUND_CAP_EXCL_INPUT;
17731 + break;
17732 +
17733 + default: /* read a specific mixer */
17734 + i = _IOC_NR(cmd);
17735 +
17736 + if (!supported_mixer(i))
17737 + return -EINVAL;
17738 +
17739 + val = wm_i2s_read_mixer(s, i);
17740 + break;
17741 + }
17742 + return put_user(val, (int *)arg);
17743 + }
17744 +
17745 + if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
17746 + if (get_user(val, (int *)arg))
17747 + return -EFAULT;
17748 +
17749 + switch (_IOC_NR(cmd)) {
17750 + case SOUND_MIXER_RECSRC:
17751 + /* Arg contains a bit for each recording source */
17752 + if (!WM_I2S_RECORD_MASK)
17753 + return -EINVAL;
17754 + if (!val)
17755 + return 0;
17756 + if (!(val &= WM_I2S_RECORD_MASK))
17757 + return -EINVAL;
17758 +
17759 + return 0;
17760 + default: /* write a specific mixer */
17761 + i = _IOC_NR(cmd);
17762 +
17763 + if (!supported_mixer(i))
17764 + return -EINVAL;
17765 +
17766 + wm_i2s_set_mixer(s, i, val);
17767 +
17768 + return 0;
17769 + }
17770 +}
17771 + return -EINVAL;
17772 +}
17773 +
17774 +static loff_t
17775 +au1550_llseek(struct file *file, loff_t offset, int origin)
17776 +{
17777 + return -ESPIPE;
17778 +}
17779 +
17780 +static /*const */ struct file_operations au1550_mixer_fops = {
17781 + owner:THIS_MODULE,
17782 + llseek:au1550_llseek,
17783 + ioctl:au1550_ioctl_mixdev,
17784 + open:au1550_open_mixdev,
17785 + release:au1550_release_mixdev,
17786 +};
17787 +
17788 void
17789 -codec_init(void)
17790 +codec_init(struct au1550_state *s)
17791 {
17792 - wrcodec(0x1e, 0x00); /* Reset */
17793 - au1550_delay(200);
17794 - wrcodec(0x0c, 0x00); /* Power up everything */
17795 - au1550_delay(10);
17796 - wrcodec(0x12, 0x00); /* Deactivate codec */
17797 - au1550_delay(10);
17798 - wrcodec(0x08, 0x10); /* Select DAC outputs to line out */
17799 - au1550_delay(10);
17800 - wrcodec(0x0a, 0x00); /* Disable output mute */
17801 - au1550_delay(10);
17802 - wrcodec(0x05, 0x70); /* lower output volume on headphone */
17803 - au1550_delay(10);
17804 - wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */
17805 - au1550_delay(10);
17806 - wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */
17807 - au1550_delay(10);
17808 - wrcodec(0x12, 0x01); /* Activate codec */
17809 - au1550_delay(10);
17810 + wrcodec(WM_REG_RESET, 0x00); /* Reset */
17811 + wrcodec(WM_REG_POWER_DOWN_CTRL, 0x00); /* Power up everything */
17812 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00); /* Deactivate codec */
17813 + wrcodec(WM_REG_ANALOGUE_AUDIO_PATH_CTRL, 0x10); /* Select DAC outputs to line out */
17814 + wrcodec(WM_REG_DIGITAL_AUDIO_PATH_CTRL, 0x00); /* Disable output mute */
17815 + wm_i2s_write_mixer(s, SOUND_MIXER_PCM, 74, 74);
17816 + wrcodec(WM_REG_DIGITAL_AUDIO_IF, 0x02); /* Set slave, 16-bit, I2S modes */
17817 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01); /* Activate codec */
17818 }
17819
17820 /* stop the ADC before calling */
17821 @@ -256,27 +502,16 @@
17822 set_adc_rate(struct au1550_state *s, unsigned rate)
17823 {
17824 struct dmabuf *adc = &s->dma_adc;
17825 - struct dmabuf *dac = &s->dma_dac;
17826
17827 - if (s->no_vra) {
17828 - /* calc SRC factor
17829 - */
17830 + #if defined(WM_MODE_USB)
17831 adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
17832 adc->sample_rate = SAMP_RATE / adc->src_factor;
17833 return;
17834 - }
17835 + #else
17836 + //TODO: Need code for normal mode
17837 + #endif
17838
17839 adc->src_factor = 1;
17840 -
17841 -
17842 -#if 0
17843 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
17844 -
17845 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
17846 -
17847 - adc->sample_rate = rate;
17848 - dac->sample_rate = rate;
17849 -#endif
17850 }
17851
17852 /* stop the DAC before calling */
17853 @@ -284,26 +519,89 @@
17854 set_dac_rate(struct au1550_state *s, unsigned rate)
17855 {
17856 struct dmabuf *dac = &s->dma_dac;
17857 - struct dmabuf *adc = &s->dma_adc;
17858
17859 - if (s->no_vra) {
17860 - /* calc SRC factor
17861 - */
17862 - dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
17863 - dac->sample_rate = SAMP_RATE / dac->src_factor;
17864 - return;
17865 + u16 sr, ws, div, bosr, mode;
17866 + volatile psc_i2s_t* ip = (volatile psc_i2s_t *)I2S_PSC_BASE;
17867 + u32 cfg;
17868 +
17869 + #if defined(CONFIG_MIPS_FICMMP)
17870 + rate = ficmmp_set_i2s_sample_rate(rate);
17871 + #endif
17872 +
17873 + switch(rate)
17874 + {
17875 + case 96000:
17876 + sr = WM_SC_SR_96000;
17877 + ws = WS_64FS;
17878 + div = PSC_I2SCFG_DIV2;
17879 + break;
17880 + case 88200:
17881 + sr = WM_SC_SR_88200;
17882 + ws = WS_64FS;
17883 + div = PSC_I2SCFG_DIV2;
17884 + break;
17885 + case 44100:
17886 + sr = WM_SC_SR_44100;
17887 + ws = WS_128FS;
17888 + div = PSC_I2SCFG_DIV2;
17889 + break;
17890 + case 48000:
17891 + sr = WM_SC_SR_48000;
17892 + ws = WS_128FS;
17893 + div = PSC_I2SCFG_DIV2;
17894 + break;
17895 + case 32000:
17896 + sr = WM_SC_SR_32000;
17897 + ws = WS_96FS;
17898 + div = PSC_I2SCFG_DIV4;
17899 + break;
17900 + case 8018:
17901 + sr = WM_SC_SR_8018;
17902 + ws = WS_128FS;
17903 + div = PSC_I2SCFG_DIV2;
17904 + break;
17905 + case 8000:
17906 + default:
17907 + sr = WM_SC_SR_8000;
17908 + ws = WS_96FS;
17909 + div = PSC_I2SCFG_DIV16;
17910 + break;
17911 }
17912
17913 + #if defined(WM_MODE_USB)
17914 + mode = WM_SC_MODE_USB;
17915 + #else
17916 + mode = WM_SC_MODE_NORMAL;
17917 + #endif
17918 +
17919 + bosr = 0;
17920 +
17921 dac->src_factor = 1;
17922 + dac->sample_rate = rate;
17923
17924 -#if 0
17925 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
17926 + /* Deactivate codec */
17927 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00);
17928
17929 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
17930 + /* Disable I2S controller */
17931 + ip->psc_i2scfg &= ~PSC_I2SCFG_DE_ENABLE;
17932 + /* Wait for device disabled */
17933 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 1);
17934 +
17935 + cfg = ip->psc_i2scfg;
17936 + /* Clear WS and DIVIDER values */
17937 + cfg &= ~(PSC_I2SCFG_WS_MASK | PSC_I2SCFG_DIV_MASK);
17938 + cfg |= PSC_I2SCFG_WS(ws) | div;
17939 + /* Reconfigure and enable */
17940 + ip->psc_i2scfg = cfg | PSC_I2SCFG_DE_ENABLE;
17941
17942 - adc->sample_rate = rate;
17943 - dac->sample_rate = rate;
17944 -#endif
17945 + /* Wait for device enabled */
17946 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 0);
17947 +
17948 + /* Set appropriate sampling rate */
17949 + wrcodec(WM_REG_SAMPLING_CONTROL, bosr | mode | sr);
17950 +
17951 + /* Activate codec */
17952 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01);
17953 }
17954
17955 static void
17956 @@ -354,8 +652,7 @@
17957 ip->psc_i2spcr = PSC_I2SPCR_RP;
17958 au_sync();
17959
17960 - /* Wait for Receive Busy to show disabled.
17961 - */
17962 + /* Wait for Receive Busy to show disabled. */
17963 do {
17964 stat = ip->psc_i2sstat;
17965 au_sync();
17966 @@ -463,7 +760,6 @@
17967 if (db->num_channels == 1)
17968 db->cnt_factor *= 2;
17969 db->cnt_factor *= db->src_factor;
17970 -
17971 db->count = 0;
17972 db->dma_qcount = 0;
17973 db->nextIn = db->nextOut = db->rawbuf;
17974 @@ -546,12 +842,13 @@
17975 if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF))
17976 dbg("I2S status = 0x%08x", i2s_stat);
17977 #endif
17978 +
17979 db->dma_qcount--;
17980
17981 if (db->count >= db->fragsize) {
17982 - if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
17983 - db->fragsize) == 0) {
17984 - err("qcount < 2 and no ring room!");
17985 + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, db->fragsize) == 0)
17986 + {
17987 + err("qcount < MIN_Q_COUNT and no ring room!");
17988 }
17989 db->nextOut += db->fragsize;
17990 if (db->nextOut >= db->rawbuf + db->dmasize)
17991 @@ -606,65 +903,43 @@
17992
17993 }
17994
17995 -static loff_t
17996 -au1550_llseek(struct file *file, loff_t offset, int origin)
17997 -{
17998 - return -ESPIPE;
17999 -}
18000 -
18001 -
18002 -#if 0
18003 -static int
18004 -au1550_open_mixdev(struct inode *inode, struct file *file)
18005 -{
18006 - file->private_data = &au1550_state;
18007 - return 0;
18008 -}
18009 -
18010 -static int
18011 -au1550_release_mixdev(struct inode *inode, struct file *file)
18012 -{
18013 - return 0;
18014 -}
18015 -
18016 -static int
18017 -mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
18018 - unsigned long arg)
18019 -{
18020 - return codec->mixer_ioctl(codec, cmd, arg);
18021 -}
18022 -
18023 -static int
18024 -au1550_ioctl_mixdev(struct inode *inode, struct file *file,
18025 - unsigned int cmd, unsigned long arg)
18026 -{
18027 - struct au1550_state *s = (struct au1550_state *)file->private_data;
18028 - struct ac97_codec *codec = s->codec;
18029 -
18030 - return mixdev_ioctl(codec, cmd, arg);
18031 -}
18032 -
18033 -static /*const */ struct file_operations au1550_mixer_fops = {
18034 - owner:THIS_MODULE,
18035 - llseek:au1550_llseek,
18036 - ioctl:au1550_ioctl_mixdev,
18037 - open:au1550_open_mixdev,
18038 - release:au1550_release_mixdev,
18039 -};
18040 -#endif
18041 -
18042 static int
18043 drain_dac(struct au1550_state *s, int nonblock)
18044 {
18045 unsigned long flags;
18046 int count, tmo;
18047
18048 + struct dmabuf *db = &s->dma_dac;
18049 +
18050 + //DPRINTF();
18051 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
18052 return 0;
18053
18054 for (;;) {
18055 spin_lock_irqsave(&s->lock, flags);
18056 - count = s->dma_dac.count;
18057 + count = db->count;
18058 +
18059 + /* Pad the ddma buffer with zeros if the amount remaining
18060 + * is not a multiple of fragsize */
18061 + if(count % db->fragsize != 0)
18062 + {
18063 + int pad = db->fragsize - (count % db->fragsize);
18064 + char* bufptr = db->nextIn;
18065 + char* bufend = db->rawbuf + db->dmasize;
18066 +
18067 + if((bufend - bufptr) < pad)
18068 + printk("Error! ddma padding is bigger than available ring space!\n");
18069 + else
18070 + {
18071 + memset((void*)bufptr, 0, pad);
18072 + count += pad;
18073 + db->nextIn += pad;
18074 + db->count += pad;
18075 + if (db->dma_qcount == 0)
18076 + start_dac(s);
18077 + db->dma_qcount++;
18078 + }
18079 + }
18080 spin_unlock_irqrestore(&s->lock, flags);
18081 if (count <= 0)
18082 break;
18083 @@ -672,9 +947,9 @@
18084 break;
18085 if (nonblock)
18086 return -EBUSY;
18087 - tmo = 1000 * count / (s->no_vra ?
18088 - SAMP_RATE : s->dma_dac.sample_rate);
18089 + tmo = 1000 * count / s->dma_dac.sample_rate;
18090 tmo /= s->dma_dac.dma_bytes_per_sample;
18091 +
18092 au1550_delay(tmo);
18093 }
18094 if (signal_pending(current))
18095 @@ -698,8 +973,7 @@
18096 * If interpolating (no VRA), duplicate every audio frame src_factor times.
18097 */
18098 static int
18099 -translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
18100 - int dmacount)
18101 +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, int dmacount)
18102 {
18103 int sample, i;
18104 int interp_bytes_per_sample;
18105 @@ -737,11 +1011,12 @@
18106
18107 /* duplicate every audio frame src_factor times
18108 */
18109 - for (i = 0; i < db->src_factor; i++)
18110 + for (i = 0; i < db->src_factor; i++) {
18111 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
18112 + dmabuf += interp_bytes_per_sample;
18113 + }
18114
18115 userbuf += db->user_bytes_per_sample;
18116 - dmabuf += interp_bytes_per_sample;
18117 }
18118
18119 return num_samples * interp_bytes_per_sample;
18120 @@ -996,15 +1271,14 @@
18121 * on the dma queue. If the queue count reaches zero,
18122 * we know the dma has stopped.
18123 */
18124 - while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
18125 + while ((db->dma_qcount < MIN_Q_COUNT) && (db->count >= db->fragsize)) {
18126 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
18127 db->fragsize) == 0) {
18128 - err("qcount < 2 and no ring room!");
18129 + err("qcount < MIN_Q_COUNT and no ring room!");
18130 }
18131 db->nextOut += db->fragsize;
18132 if (db->nextOut >= db->rawbuf + db->dmasize)
18133 db->nextOut -= db->dmasize;
18134 - db->count -= db->fragsize;
18135 db->total_bytes += db->dma_fragsize;
18136 if (db->dma_qcount == 0)
18137 start_dac(s);
18138 @@ -1017,7 +1291,6 @@
18139 buffer += usercnt;
18140 ret += usercnt;
18141 } /* while (count > 0) */
18142 -
18143 out:
18144 up(&s->sem);
18145 out2:
18146 @@ -1371,9 +1644,6 @@
18147 s->dma_dac.cnt_factor;
18148 abinfo.fragstotal = s->dma_dac.numfrag;
18149 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
18150 -#ifdef AU1000_VERBOSE_DEBUG
18151 - dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
18152 -#endif
18153 return copy_to_user((void *) arg, &abinfo,
18154 sizeof(abinfo)) ? -EFAULT : 0;
18155
18156 @@ -1536,13 +1806,9 @@
18157 case SNDCTL_DSP_SETSYNCRO:
18158 case SOUND_PCM_READ_FILTER:
18159 return -EINVAL;
18160 + default: break;
18161 }
18162 -
18163 -#if 0
18164 - return mixdev_ioctl(s->codec, cmd, arg);
18165 -#else
18166 return 0;
18167 -#endif
18168 }
18169
18170
18171 @@ -1664,15 +1930,15 @@
18172 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
18173 MODULE_DESCRIPTION("Au1550 Audio Driver");
18174
18175 +#if defined(WM_MODE_USB)
18176 /* Set up an internal clock for the PSC3. This will then get
18177 * driven out of the Au1550 as the master.
18178 */
18179 static void
18180 intclk_setup(void)
18181 {
18182 - uint clk, rate, stat;
18183 -
18184 - /* Wire up Freq4 as a clock for the PSC3.
18185 + uint clk, rate;
18186 + /* Wire up Freq4 as a clock for the PSC.
18187 * We know SMBus uses Freq3.
18188 * By making changes to this rate, plus the word strobe
18189 * size, we can make fine adjustments to the actual data rate.
18190 @@ -1700,11 +1966,17 @@
18191 */
18192 clk = au_readl(SYS_CLKSRC);
18193 au_sync();
18194 +#if defined(CONFIG_SOC_AU1550)
18195 clk &= ~0x01f00000;
18196 clk |= (6 << 22);
18197 +#elif defined(CONFIG_SOC_AU1200)
18198 + clk &= ~0x3e000000;
18199 + clk |= (6 << 27);
18200 +#endif
18201 au_writel(clk, SYS_CLKSRC);
18202 au_sync();
18203 }
18204 +#endif
18205
18206 static int __devinit
18207 au1550_probe(void)
18208 @@ -1724,6 +1996,11 @@
18209 init_MUTEX(&s->open_sem);
18210 spin_lock_init(&s->lock);
18211
18212 + /* CPLD Mux for I2s */
18213 +
18214 +#if defined(CONFIG_MIPS_PB1200)
18215 + bcsr->resets |= BCSR_RESETS_PCS1MUX;
18216 +#endif
18217
18218 s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE;
18219 ip = s->psc_addr;
18220 @@ -1765,9 +2042,8 @@
18221
18222 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
18223 goto err_dev1;
18224 -#if 0
18225 - if ((s->codec->dev_mixer =
18226 - register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
18227 +#if 1
18228 + if ((s->dev_mixer = register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
18229 goto err_dev2;
18230 #endif
18231
18232 @@ -1777,7 +2053,6 @@
18233 proc_au1550_dump, NULL);
18234 #endif /* AU1550_DEBUG */
18235
18236 - intclk_setup();
18237
18238 /* The GPIO for the appropriate PSC was configured by the
18239 * board specific start up.
18240 @@ -1786,7 +2061,12 @@
18241 */
18242 ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */
18243 au_sync();
18244 +#if defined(WM_MODE_USB)
18245 + intclk_setup();
18246 ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE);
18247 +#else
18248 + ip->psc_sel = (PSC_SEL_CLK_EXTCLK | PSC_SEL_PS_I2SMODE);
18249 +#endif
18250 au_sync();
18251
18252 /* Enable PSC
18253 @@ -1806,42 +2086,18 @@
18254 * Actual I2S mode (first bit delayed by one clock).
18255 * Master mode (We provide the clock from the PSC).
18256 */
18257 - val = PSC_I2SCFG_SET_LEN(16);
18258 -#ifdef TRY_441KHz
18259 - /* This really should be 250, but it appears that all of the
18260 - * PLLs, dividers and so on in the chain shift it. That's the
18261 - * problem with sourceing the clock instead of letting the very
18262 - * stable codec provide it. But, the PSC doesn't appear to want
18263 - * to work in slave mode, so this is what we get. It's not
18264 - * studio quality timing, but it's good enough for listening
18265 - * to mp3s.
18266 - */
18267 - val |= PSC_I2SCFG_SET_WS(252);
18268 -#else
18269 - val |= PSC_I2SCFG_SET_WS(250);
18270 -#endif
18271 - val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
18272 +
18273 + val = PSC_I2SCFG_SET_LEN(16) | PSC_I2SCFG_WS(WS_128FS) | PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
18274 PSC_I2SCFG_BI | PSC_I2SCFG_XM;
18275
18276 - ip->psc_i2scfg = val;
18277 - au_sync();
18278 - val |= PSC_I2SCFG_DE_ENABLE;
18279 - ip->psc_i2scfg = val;
18280 - au_sync();
18281 + ip->psc_i2scfg = val | PSC_I2SCFG_DE_ENABLE;
18282
18283 - /* Wait for Device ready.
18284 - */
18285 - do {
18286 - val = ip->psc_i2sstat;
18287 - au_sync();
18288 - } while ((val & PSC_I2SSTAT_DR) == 0);
18289 + set_dac_rate(s, 8000); //Set default rate
18290
18291 - val = ip->psc_i2scfg;
18292 - au_sync();
18293 + codec_init(s);
18294
18295 - codec_init();
18296 + s->no_vra = vra ? 0 : 1;
18297
18298 - s->no_vra = 1;
18299 if (s->no_vra)
18300 info("no VRA, interpolating and decimating");
18301
18302 @@ -1866,6 +2122,8 @@
18303 err_dev2:
18304 unregister_sound_dsp(s->dev_audio);
18305 #endif
18306 + err_dev2:
18307 + unregister_sound_dsp(s->dev_audio);
18308 err_dev1:
18309 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
18310 err_dma2:
18311 diff -Nur linux-2.4.29/drivers/sound/au1550_psc.c linux-mips/drivers/sound/au1550_psc.c
18312 --- linux-2.4.29/drivers/sound/au1550_psc.c 2005-01-19 15:10:04.000000000 +0100
18313 +++ linux-mips/drivers/sound/au1550_psc.c 2005-01-30 09:01:28.000000000 +0100
18314 @@ -30,6 +30,7 @@
18315 * 675 Mass Ave, Cambridge, MA 02139, USA.
18316 *
18317 */
18318 +
18319 #include <linux/version.h>
18320 #include <linux/module.h>
18321 #include <linux/string.h>
18322 @@ -63,6 +64,14 @@
18323 #include <asm/db1x00.h>
18324 #endif
18325
18326 +#ifdef CONFIG_MIPS_PB1200
18327 +#include <asm/pb1200.h>
18328 +#endif
18329 +
18330 +#ifdef CONFIG_MIPS_DB1200
18331 +#include <asm/db1200.h>
18332 +#endif
18333 +
18334 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
18335
18336 #define AU1550_MODULE_NAME "Au1550 psc audio"
18337 @@ -521,7 +530,14 @@
18338 spin_unlock_irqrestore(&s->lock, flags);
18339 }
18340
18341 -
18342 +/*
18343 + NOTE: The xmit slots cannot be changed on the fly when in full-duplex
18344 + because the AC'97 block must be stopped/started. When using this driver
18345 + in full-duplex (in & out at the same time), the DMA engine will stop if
18346 + you disable the block.
18347 + TODO: change implementation to properly restart adc/dac after setting
18348 + xmit slots.
18349 +*/
18350 static void
18351 set_xmit_slots(int num_channels)
18352 {
18353 @@ -565,6 +581,14 @@
18354 } while ((stat & PSC_AC97STAT_DR) == 0);
18355 }
18356
18357 +/*
18358 + NOTE: The recv slots cannot be changed on the fly when in full-duplex
18359 + because the AC'97 block must be stopped/started. When using this driver
18360 + in full-duplex (in & out at the same time), the DMA engine will stop if
18361 + you disable the block.
18362 + TODO: change implementation to properly restart adc/dac after setting
18363 + recv slots.
18364 +*/
18365 static void
18366 set_recv_slots(int num_channels)
18367 {
18368 @@ -608,7 +632,6 @@
18369
18370 spin_lock_irqsave(&s->lock, flags);
18371
18372 - set_xmit_slots(db->num_channels);
18373 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
18374 au_sync();
18375 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
18376 @@ -640,7 +663,6 @@
18377 db->nextIn -= db->dmasize;
18378 }
18379
18380 - set_recv_slots(db->num_channels);
18381 au1xxx_dbdma_start(db->dmanr);
18382 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
18383 au_sync();
18384 @@ -752,12 +774,16 @@
18385 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
18386 dbg("AC97C status = 0x%08x", ac97c_stat);
18387 #endif
18388 + /* There is a possiblity that we are getting 1 interrupt for
18389 + multiple descriptors. Use ddma api to find out how many
18390 + completed.
18391 + */
18392 db->dma_qcount--;
18393
18394 if (db->count >= db->fragsize) {
18395 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
18396 db->fragsize) == 0) {
18397 - err("qcount < 2 and no ring room!");
18398 + err("qcount < 2 and no ring room1!");
18399 }
18400 db->nextOut += db->fragsize;
18401 if (db->nextOut >= db->rawbuf + db->dmasize)
18402 @@ -941,11 +967,12 @@
18403
18404 /* duplicate every audio frame src_factor times
18405 */
18406 - for (i = 0; i < db->src_factor; i++)
18407 + for (i = 0; i < db->src_factor; i++) {
18408 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
18409 + dmabuf += interp_bytes_per_sample;
18410 + }
18411
18412 userbuf += db->user_bytes_per_sample;
18413 - dmabuf += interp_bytes_per_sample;
18414 }
18415
18416 return num_samples * interp_bytes_per_sample;
18417 @@ -1203,7 +1230,7 @@
18418 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
18419 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
18420 db->fragsize) == 0) {
18421 - err("qcount < 2 and no ring room!");
18422 + err("qcount < 2 and no ring room!0");
18423 }
18424 db->nextOut += db->fragsize;
18425 if (db->nextOut >= db->rawbuf + db->dmasize)
18426 @@ -1481,6 +1508,7 @@
18427 return -EINVAL;
18428 stop_adc(s);
18429 s->dma_adc.num_channels = val;
18430 + set_recv_slots(val);
18431 if ((ret = prog_dmabuf_adc(s)))
18432 return ret;
18433 }
18434 @@ -1538,6 +1566,7 @@
18435 }
18436
18437 s->dma_dac.num_channels = val;
18438 + set_xmit_slots(val);
18439 if ((ret = prog_dmabuf_dac(s)))
18440 return ret;
18441 }
18442 @@ -1832,10 +1861,8 @@
18443 down(&s->open_sem);
18444 }
18445
18446 - stop_dac(s);
18447 - stop_adc(s);
18448 -
18449 if (file->f_mode & FMODE_READ) {
18450 + stop_adc(s);
18451 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
18452 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
18453 s->dma_adc.num_channels = 1;
18454 @@ -1846,6 +1873,7 @@
18455 }
18456
18457 if (file->f_mode & FMODE_WRITE) {
18458 + stop_dac(s);
18459 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
18460 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
18461 s->dma_dac.num_channels = 1;
18462 @@ -2091,6 +2119,9 @@
18463 ac97_read_proc, &s->codec);
18464 #endif
18465
18466 + set_xmit_slots(1);
18467 + set_recv_slots(1);
18468 +
18469 return 0;
18470
18471 err_dev3:
18472 diff -Nur linux-2.4.29/drivers/tc/lk201.c linux-mips/drivers/tc/lk201.c
18473 --- linux-2.4.29/drivers/tc/lk201.c 2004-02-18 14:36:31.000000000 +0100
18474 +++ linux-mips/drivers/tc/lk201.c 2004-09-28 02:53:04.000000000 +0200
18475 @@ -5,7 +5,7 @@
18476 * for more details.
18477 *
18478 * Copyright (C) 1999-2002 Harald Koerfgen <hkoerfg@web.de>
18479 - * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
18480 + * Copyright (C) 2001, 2002, 2003, 2004 Maciej W. Rozycki
18481 */
18482
18483 #include <linux/config.h>
18484 @@ -23,8 +23,8 @@
18485 #include <asm/keyboard.h>
18486 #include <asm/dec/tc.h>
18487 #include <asm/dec/machtype.h>
18488 +#include <asm/dec/serial.h>
18489
18490 -#include "zs.h"
18491 #include "lk201.h"
18492
18493 /*
18494 @@ -55,19 +55,20 @@
18495 unsigned char kbd_sysrq_key = -1;
18496 #endif
18497
18498 -#define KEYB_LINE 3
18499 +#define KEYB_LINE_ZS 3
18500 +#define KEYB_LINE_DZ 0
18501
18502 -static int __init lk201_init(struct dec_serial *);
18503 -static void __init lk201_info(struct dec_serial *);
18504 -static void lk201_kbd_rx_char(unsigned char, unsigned char);
18505 +static int __init lk201_init(void *);
18506 +static void __init lk201_info(void *);
18507 +static void lk201_rx_char(unsigned char, unsigned char);
18508
18509 -struct zs_hook lk201_kbdhook = {
18510 +static struct dec_serial_hook lk201_hook = {
18511 .init_channel = lk201_init,
18512 .init_info = lk201_info,
18513 .rx_char = NULL,
18514 .poll_rx_char = NULL,
18515 .poll_tx_char = NULL,
18516 - .cflags = B4800 | CS8 | CSTOPB | CLOCAL
18517 + .cflags = B4800 | CS8 | CSTOPB | CLOCAL,
18518 };
18519
18520 /*
18521 @@ -93,28 +94,28 @@
18522 LK_CMD_ENB_BELL, LK_PARAM_VOLUME(4),
18523 };
18524
18525 -static struct dec_serial* lk201kbd_info;
18526 +static void *lk201_handle;
18527
18528 -static int lk201_send(struct dec_serial *info, unsigned char ch)
18529 +static int lk201_send(unsigned char ch)
18530 {
18531 - if (info->hook->poll_tx_char(info, ch)) {
18532 + if (lk201_hook.poll_tx_char(lk201_handle, ch)) {
18533 printk(KERN_ERR "lk201: transmit timeout\n");
18534 return -EIO;
18535 }
18536 return 0;
18537 }
18538
18539 -static inline int lk201_get_id(struct dec_serial *info)
18540 +static inline int lk201_get_id(void)
18541 {
18542 - return lk201_send(info, LK_CMD_REQ_ID);
18543 + return lk201_send(LK_CMD_REQ_ID);
18544 }
18545
18546 -static int lk201_reset(struct dec_serial *info)
18547 +static int lk201_reset(void)
18548 {
18549 int i, r;
18550
18551 for (i = 0; i < sizeof(lk201_reset_string); i++) {
18552 - r = lk201_send(info, lk201_reset_string[i]);
18553 + r = lk201_send(lk201_reset_string[i]);
18554 if (r < 0)
18555 return r;
18556 }
18557 @@ -203,24 +204,26 @@
18558
18559 static int write_kbd_rate(struct kbd_repeat *rep)
18560 {
18561 - struct dec_serial* info = lk201kbd_info;
18562 int delay, rate;
18563 int i;
18564
18565 delay = rep->delay / 5;
18566 rate = rep->rate;
18567 for (i = 0; i < 4; i++) {
18568 - if (info->hook->poll_tx_char(info, LK_CMD_RPT_RATE(i)))
18569 + if (lk201_hook.poll_tx_char(lk201_handle,
18570 + LK_CMD_RPT_RATE(i)))
18571 return 1;
18572 - if (info->hook->poll_tx_char(info, LK_PARAM_DELAY(delay)))
18573 + if (lk201_hook.poll_tx_char(lk201_handle,
18574 + LK_PARAM_DELAY(delay)))
18575 return 1;
18576 - if (info->hook->poll_tx_char(info, LK_PARAM_RATE(rate)))
18577 + if (lk201_hook.poll_tx_char(lk201_handle,
18578 + LK_PARAM_RATE(rate)))
18579 return 1;
18580 }
18581 return 0;
18582 }
18583
18584 -static int lk201kbd_rate(struct kbd_repeat *rep)
18585 +static int lk201_kbd_rate(struct kbd_repeat *rep)
18586 {
18587 if (rep == NULL)
18588 return -EINVAL;
18589 @@ -237,10 +240,8 @@
18590 return 0;
18591 }
18592
18593 -static void lk201kd_mksound(unsigned int hz, unsigned int ticks)
18594 +static void lk201_kd_mksound(unsigned int hz, unsigned int ticks)
18595 {
18596 - struct dec_serial* info = lk201kbd_info;
18597 -
18598 if (!ticks)
18599 return;
18600
18601 @@ -253,20 +254,19 @@
18602 ticks = 7;
18603 ticks = 7 - ticks;
18604
18605 - if (info->hook->poll_tx_char(info, LK_CMD_ENB_BELL))
18606 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_ENB_BELL))
18607 return;
18608 - if (info->hook->poll_tx_char(info, LK_PARAM_VOLUME(ticks)))
18609 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_VOLUME(ticks)))
18610 return;
18611 - if (info->hook->poll_tx_char(info, LK_CMD_BELL))
18612 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_BELL))
18613 return;
18614 }
18615
18616 void kbd_leds(unsigned char leds)
18617 {
18618 - struct dec_serial* info = lk201kbd_info;
18619 unsigned char l = 0;
18620
18621 - if (!info) /* FIXME */
18622 + if (!lk201_handle) /* FIXME */
18623 return;
18624
18625 /* FIXME -- Only Hold and Lock LEDs for now. --macro */
18626 @@ -275,13 +275,13 @@
18627 if (leds & LED_CAP)
18628 l |= LK_LED_LOCK;
18629
18630 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_ON))
18631 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_ON))
18632 return;
18633 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(l)))
18634 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(l)))
18635 return;
18636 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_OFF))
18637 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_OFF))
18638 return;
18639 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(~l)))
18640 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(~l)))
18641 return;
18642 }
18643
18644 @@ -307,7 +307,7 @@
18645 return 0x80;
18646 }
18647
18648 -static void lk201_kbd_rx_char(unsigned char ch, unsigned char stat)
18649 +static void lk201_rx_char(unsigned char ch, unsigned char fl)
18650 {
18651 static unsigned char id[6];
18652 static int id_i;
18653 @@ -316,9 +316,8 @@
18654 static int prev_scancode;
18655 unsigned char c = scancodeRemap[ch];
18656
18657 - if (stat && stat != TTY_OVERRUN) {
18658 - printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n",
18659 - stat);
18660 + if (fl != TTY_NORMAL && fl != TTY_OVERRUN) {
18661 + printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n", fl);
18662 return;
18663 }
18664
18665 @@ -335,7 +334,7 @@
18666 /* OK, the power-up concluded. */
18667 lk201_report(id);
18668 if (id[2] == LK_STAT_PWRUP_OK)
18669 - lk201_get_id(lk201kbd_info);
18670 + lk201_get_id();
18671 else {
18672 id_i = 0;
18673 printk(KERN_ERR "lk201: keyboard power-up "
18674 @@ -345,7 +344,7 @@
18675 /* We got the ID; report it and start operation. */
18676 id_i = 0;
18677 lk201_id(id);
18678 - lk201_reset(lk201kbd_info);
18679 + lk201_reset();
18680 }
18681 return;
18682 }
18683 @@ -398,29 +397,28 @@
18684 tasklet_schedule(&keyboard_tasklet);
18685 }
18686
18687 -static void __init lk201_info(struct dec_serial *info)
18688 +static void __init lk201_info(void *handle)
18689 {
18690 }
18691
18692 -static int __init lk201_init(struct dec_serial *info)
18693 +static int __init lk201_init(void *handle)
18694 {
18695 /* First install handlers. */
18696 - lk201kbd_info = info;
18697 - kbd_rate = lk201kbd_rate;
18698 - kd_mksound = lk201kd_mksound;
18699 + lk201_handle = handle;
18700 + kbd_rate = lk201_kbd_rate;
18701 + kd_mksound = lk201_kd_mksound;
18702
18703 - info->hook->rx_char = lk201_kbd_rx_char;
18704 + lk201_hook.rx_char = lk201_rx_char;
18705
18706 /* Then just issue a reset -- the handlers will do the rest. */
18707 - lk201_send(info, LK_CMD_POWER_UP);
18708 + lk201_send(LK_CMD_POWER_UP);
18709
18710 return 0;
18711 }
18712
18713 void __init kbd_init_hw(void)
18714 {
18715 - extern int register_zs_hook(unsigned int, struct zs_hook *);
18716 - extern int unregister_zs_hook(unsigned int);
18717 + int keyb_line;
18718
18719 /* Maxine uses LK501 at the Access.Bus. */
18720 if (!LK_IFACE)
18721 @@ -428,19 +426,15 @@
18722
18723 printk(KERN_INFO "lk201: DECstation LK keyboard driver v0.05.\n");
18724
18725 - if (LK_IFACE_ZS) {
18726 - /*
18727 - * kbd_init_hw() is being called before
18728 - * rs_init() so just register the kbd hook
18729 - * and let zs_init do the rest :-)
18730 - */
18731 - if(!register_zs_hook(KEYB_LINE, &lk201_kbdhook))
18732 - unregister_zs_hook(KEYB_LINE);
18733 - } else {
18734 - /*
18735 - * TODO: modify dz.c to allow similar hooks
18736 - * for LK201 handling on DS2100, DS3100, and DS5000/200
18737 - */
18738 - printk(KERN_ERR "lk201: support for DZ11 not yet ready.\n");
18739 - }
18740 + /*
18741 + * kbd_init_hw() is being called before
18742 + * rs_init() so just register the kbd hook
18743 + * and let zs_init do the rest :-)
18744 + */
18745 + if (LK_IFACE_ZS)
18746 + keyb_line = KEYB_LINE_ZS;
18747 + else
18748 + keyb_line = KEYB_LINE_DZ;
18749 + if (!register_dec_serial_hook(keyb_line, &lk201_hook))
18750 + unregister_dec_serial_hook(keyb_line);
18751 }
18752 diff -Nur linux-2.4.29/drivers/tc/zs.c linux-mips/drivers/tc/zs.c
18753 --- linux-2.4.29/drivers/tc/zs.c 2005-01-19 15:10:05.000000000 +0100
18754 +++ linux-mips/drivers/tc/zs.c 2004-12-27 05:13:50.000000000 +0100
18755 @@ -68,6 +68,8 @@
18756 #include <asm/bitops.h>
18757 #include <asm/uaccess.h>
18758 #include <asm/bootinfo.h>
18759 +#include <asm/dec/serial.h>
18760 +
18761 #ifdef CONFIG_DECSTATION
18762 #include <asm/dec/interrupts.h>
18763 #include <asm/dec/machtype.h>
18764 @@ -160,8 +162,8 @@
18765 #ifdef CONFIG_SERIAL_DEC_CONSOLE
18766 static struct console sercons;
18767 #endif
18768 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) \
18769 - && !defined(MODULE)
18770 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18771 + !defined(MODULE)
18772 static unsigned long break_pressed; /* break, really ... */
18773 #endif
18774
18775 @@ -196,7 +198,6 @@
18776 /*
18777 * Debugging.
18778 */
18779 -#undef SERIAL_DEBUG_INTR
18780 #undef SERIAL_DEBUG_OPEN
18781 #undef SERIAL_DEBUG_FLOW
18782 #undef SERIAL_DEBUG_THROTTLE
18783 @@ -221,10 +222,6 @@
18784 static struct termios *serial_termios[NUM_CHANNELS];
18785 static struct termios *serial_termios_locked[NUM_CHANNELS];
18786
18787 -#ifndef MIN
18788 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
18789 -#endif
18790 -
18791 /*
18792 * tmp_buf is used as a temporary buffer by serial_write. We need to
18793 * lock it in case the copy_from_user blocks while swapping in a page,
18794 @@ -386,8 +383,6 @@
18795 * -----------------------------------------------------------------------
18796 */
18797
18798 -static int tty_break; /* Set whenever BREAK condition is detected. */
18799 -
18800 /*
18801 * This routine is used by the interrupt handler to schedule
18802 * processing in the software interrupt portion of the driver.
18803 @@ -414,20 +409,15 @@
18804 if (!tty && (!info->hook || !info->hook->rx_char))
18805 continue;
18806
18807 - if (tty_break) {
18808 - tty_break = 0;
18809 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18810 - if (info->line == sercons.index) {
18811 - if (!break_pressed) {
18812 - break_pressed = jiffies;
18813 - goto ignore_char;
18814 - }
18815 - break_pressed = 0;
18816 - }
18817 -#endif
18818 + flag = TTY_NORMAL;
18819 + if (info->tty_break) {
18820 + info->tty_break = 0;
18821 flag = TTY_BREAK;
18822 if (info->flags & ZILOG_SAK)
18823 do_SAK(tty);
18824 + /* Ignore the null char got when BREAK is removed. */
18825 + if (ch == 0)
18826 + continue;
18827 } else {
18828 if (stat & Rx_OVR) {
18829 flag = TTY_OVERRUN;
18830 @@ -435,20 +425,22 @@
18831 flag = TTY_FRAME;
18832 } else if (stat & PAR_ERR) {
18833 flag = TTY_PARITY;
18834 - } else
18835 - flag = 0;
18836 - if (flag)
18837 + }
18838 + if (flag != TTY_NORMAL)
18839 /* reset the error indication */
18840 write_zsreg(info->zs_channel, R0, ERR_RES);
18841 }
18842
18843 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18844 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18845 + !defined(MODULE)
18846 if (break_pressed && info->line == sercons.index) {
18847 - if (ch != 0 &&
18848 - time_before(jiffies, break_pressed + HZ*5)) {
18849 + /* Ignore the null char got when BREAK is removed. */
18850 + if (ch == 0)
18851 + continue;
18852 + if (time_before(jiffies, break_pressed + HZ * 5)) {
18853 handle_sysrq(ch, regs, NULL, NULL);
18854 break_pressed = 0;
18855 - goto ignore_char;
18856 + continue;
18857 }
18858 break_pressed = 0;
18859 }
18860 @@ -459,23 +451,7 @@
18861 return;
18862 }
18863
18864 - if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
18865 - static int flip_buf_ovf;
18866 - ++flip_buf_ovf;
18867 - continue;
18868 - }
18869 - tty->flip.count++;
18870 - {
18871 - static int flip_max_cnt;
18872 - if (flip_max_cnt < tty->flip.count)
18873 - flip_max_cnt = tty->flip.count;
18874 - }
18875 -
18876 - *tty->flip.flag_buf_ptr++ = flag;
18877 - *tty->flip.char_buf_ptr++ = ch;
18878 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18879 - ignore_char:
18880 -#endif
18881 + tty_insert_flip_char(tty, ch, flag);
18882 }
18883 if (tty)
18884 tty_flip_buffer_push(tty);
18885 @@ -517,11 +493,15 @@
18886 /* Get status from Read Register 0 */
18887 stat = read_zsreg(info->zs_channel, R0);
18888
18889 - if (stat & BRK_ABRT) {
18890 -#ifdef SERIAL_DEBUG_INTR
18891 - printk("handling break....");
18892 + if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
18893 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18894 + !defined(MODULE)
18895 + if (info->line == sercons.index) {
18896 + if (!break_pressed)
18897 + break_pressed = jiffies;
18898 + } else
18899 #endif
18900 - tty_break = 1;
18901 + info->tty_break = 1;
18902 }
18903
18904 if (info->zs_channel != info->zs_chan_a) {
18905 @@ -957,7 +937,7 @@
18906 save_flags(flags);
18907 while (1) {
18908 cli();
18909 - c = MIN(count, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18910 + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18911 SERIAL_XMIT_SIZE - info->xmit_head));
18912 if (c <= 0)
18913 break;
18914 @@ -965,7 +945,7 @@
18915 if (from_user) {
18916 down(&tmp_buf_sem);
18917 copy_from_user(tmp_buf, buf, c);
18918 - c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18919 + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18920 SERIAL_XMIT_SIZE - info->xmit_head));
18921 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
18922 up(&tmp_buf_sem);
18923 @@ -1282,46 +1262,48 @@
18924 }
18925
18926 switch (cmd) {
18927 - case TIOCMGET:
18928 - error = verify_area(VERIFY_WRITE, (void *) arg,
18929 - sizeof(unsigned int));
18930 - if (error)
18931 - return error;
18932 - return get_modem_info(info, (unsigned int *) arg);
18933 - case TIOCMBIS:
18934 - case TIOCMBIC:
18935 - case TIOCMSET:
18936 - return set_modem_info(info, cmd, (unsigned int *) arg);
18937 - case TIOCGSERIAL:
18938 - error = verify_area(VERIFY_WRITE, (void *) arg,
18939 - sizeof(struct serial_struct));
18940 - if (error)
18941 - return error;
18942 - return get_serial_info(info,
18943 - (struct serial_struct *) arg);
18944 - case TIOCSSERIAL:
18945 - return set_serial_info(info,
18946 - (struct serial_struct *) arg);
18947 - case TIOCSERGETLSR: /* Get line status register */
18948 - error = verify_area(VERIFY_WRITE, (void *) arg,
18949 - sizeof(unsigned int));
18950 - if (error)
18951 - return error;
18952 - else
18953 - return get_lsr_info(info, (unsigned int *) arg);
18954 + case TIOCMGET:
18955 + error = verify_area(VERIFY_WRITE, (void *)arg,
18956 + sizeof(unsigned int));
18957 + if (error)
18958 + return error;
18959 + return get_modem_info(info, (unsigned int *)arg);
18960
18961 - case TIOCSERGSTRUCT:
18962 - error = verify_area(VERIFY_WRITE, (void *) arg,
18963 - sizeof(struct dec_serial));
18964 - if (error)
18965 - return error;
18966 - copy_from_user((struct dec_serial *) arg,
18967 - info, sizeof(struct dec_serial));
18968 - return 0;
18969 + case TIOCMBIS:
18970 + case TIOCMBIC:
18971 + case TIOCMSET:
18972 + return set_modem_info(info, cmd, (unsigned int *)arg);
18973
18974 - default:
18975 - return -ENOIOCTLCMD;
18976 - }
18977 + case TIOCGSERIAL:
18978 + error = verify_area(VERIFY_WRITE, (void *)arg,
18979 + sizeof(struct serial_struct));
18980 + if (error)
18981 + return error;
18982 + return get_serial_info(info, (struct serial_struct *)arg);
18983 +
18984 + case TIOCSSERIAL:
18985 + return set_serial_info(info, (struct serial_struct *)arg);
18986 +
18987 + case TIOCSERGETLSR: /* Get line status register */
18988 + error = verify_area(VERIFY_WRITE, (void *)arg,
18989 + sizeof(unsigned int));
18990 + if (error)
18991 + return error;
18992 + else
18993 + return get_lsr_info(info, (unsigned int *)arg);
18994 +
18995 + case TIOCSERGSTRUCT:
18996 + error = verify_area(VERIFY_WRITE, (void *)arg,
18997 + sizeof(struct dec_serial));
18998 + if (error)
18999 + return error;
19000 + copy_from_user((struct dec_serial *)arg, info,
19001 + sizeof(struct dec_serial));
19002 + return 0;
19003 +
19004 + default:
19005 + return -ENOIOCTLCMD;
19006 + }
19007 return 0;
19008 }
19009
19010 @@ -1446,7 +1428,8 @@
19011 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
19012 {
19013 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
19014 - unsigned long orig_jiffies, char_time;
19015 + unsigned long orig_jiffies;
19016 + int char_time;
19017
19018 if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
19019 return;
19020 @@ -1462,7 +1445,7 @@
19021 if (char_time == 0)
19022 char_time = 1;
19023 if (timeout)
19024 - char_time = MIN(char_time, timeout);
19025 + char_time = min(char_time, timeout);
19026 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
19027 current->state = TASK_INTERRUPTIBLE;
19028 schedule_timeout(char_time);
19029 @@ -1714,7 +1697,7 @@
19030
19031 static void __init show_serial_version(void)
19032 {
19033 - printk("DECstation Z8530 serial driver version 0.08\n");
19034 + printk("DECstation Z8530 serial driver version 0.09\n");
19035 }
19036
19037 /* Initialize Z8530s zs_channels
19038 @@ -1994,8 +1977,9 @@
19039 * polling I/O routines
19040 */
19041 static int
19042 -zs_poll_tx_char(struct dec_serial *info, unsigned char ch)
19043 +zs_poll_tx_char(void *handle, unsigned char ch)
19044 {
19045 + struct dec_serial *info = handle;
19046 struct dec_zschannel *chan = info->zs_channel;
19047 int ret;
19048
19049 @@ -2017,8 +2001,9 @@
19050 }
19051
19052 static int
19053 -zs_poll_rx_char(struct dec_serial *info)
19054 +zs_poll_rx_char(void *handle)
19055 {
19056 + struct dec_serial *info = handle;
19057 struct dec_zschannel *chan = info->zs_channel;
19058 int ret;
19059
19060 @@ -2038,12 +2023,13 @@
19061 return -ENODEV;
19062 }
19063
19064 -unsigned int register_zs_hook(unsigned int channel, struct zs_hook *hook)
19065 +int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
19066 {
19067 struct dec_serial *info = &zs_soft[channel];
19068
19069 if (info->hook) {
19070 - printk(__FUNCTION__": line %d has already a hook registered\n", channel);
19071 + printk("%s: line %d has already a hook registered\n",
19072 + __FUNCTION__, channel);
19073
19074 return 0;
19075 } else {
19076 @@ -2055,7 +2041,7 @@
19077 }
19078 }
19079
19080 -unsigned int unregister_zs_hook(unsigned int channel)
19081 +int unregister_zs_hook(unsigned int channel)
19082 {
19083 struct dec_serial *info = &zs_soft[channel];
19084
19085 @@ -2063,8 +2049,8 @@
19086 info->hook = NULL;
19087 return 1;
19088 } else {
19089 - printk(__FUNCTION__": trying to unregister hook on line %d,"
19090 - " but none is registered\n", channel);
19091 + printk("%s: trying to unregister hook on line %d,"
19092 + " but none is registered\n", __FUNCTION__, channel);
19093 return 0;
19094 }
19095 }
19096 @@ -2319,22 +2305,23 @@
19097 write_zsreg(chan, 9, nine);
19098 }
19099
19100 -static int kgdbhook_init_channel(struct dec_serial* info)
19101 +static int kgdbhook_init_channel(void *handle)
19102 {
19103 return 0;
19104 }
19105
19106 -static void kgdbhook_init_info(struct dec_serial* info)
19107 +static void kgdbhook_init_info(void *handle)
19108 {
19109 }
19110
19111 -static void kgdbhook_rx_char(struct dec_serial* info,
19112 - unsigned char ch, unsigned char stat)
19113 +static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
19114 {
19115 + struct dec_serial *info = handle;
19116 +
19117 + if (fl != TTY_NORMAL)
19118 + return;
19119 if (ch == 0x03 || ch == '$')
19120 breakpoint();
19121 - if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
19122 - write_zsreg(info->zs_channel, 0, ERR_RES);
19123 }
19124
19125 /* This sets up the serial port we're using, and turns on
19126 @@ -2360,11 +2347,11 @@
19127 * for /dev/ttyb which is determined in setup_arch() from the
19128 * boot command line flags.
19129 */
19130 -struct zs_hook zs_kgdbhook = {
19131 - init_channel : kgdbhook_init_channel,
19132 - init_info : kgdbhook_init_info,
19133 - cflags : B38400|CS8|CLOCAL,
19134 - rx_char : kgdbhook_rx_char,
19135 +struct dec_serial_hook zs_kgdbhook = {
19136 + .init_channel = kgdbhook_init_channel,
19137 + .init_info = kgdbhook_init_info,
19138 + .rx_char = kgdbhook_rx_char,
19139 + .cflags = B38400 | CS8 | CLOCAL,
19140 }
19141
19142 void __init zs_kgdb_hook(int tty_num)
19143 diff -Nur linux-2.4.29/drivers/tc/zs.h linux-mips/drivers/tc/zs.h
19144 --- linux-2.4.29/drivers/tc/zs.h 2004-02-18 14:36:31.000000000 +0100
19145 +++ linux-mips/drivers/tc/zs.h 2004-07-01 15:28:54.000000000 +0200
19146 @@ -1,14 +1,18 @@
19147 /*
19148 - * macserial.h: Definitions for the Macintosh Z8530 serial driver.
19149 + * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
19150 *
19151 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
19152 + * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
19153 *
19154 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
19155 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
19156 + * Copyright (C) 2004 Maciej W. Rozycki
19157 */
19158 #ifndef _DECSERIAL_H
19159 #define _DECSERIAL_H
19160
19161 +#include <asm/dec/serial.h>
19162 +
19163 #define NUM_ZSREGS 16
19164
19165 struct serial_struct {
19166 @@ -89,63 +93,50 @@
19167 unsigned char curregs[NUM_ZSREGS];
19168 };
19169
19170 -struct dec_serial;
19171 -
19172 -struct zs_hook {
19173 - int (*init_channel)(struct dec_serial* info);
19174 - void (*init_info)(struct dec_serial* info);
19175 - void (*rx_char)(unsigned char ch, unsigned char stat);
19176 - int (*poll_rx_char)(struct dec_serial* info);
19177 - int (*poll_tx_char)(struct dec_serial* info,
19178 - unsigned char ch);
19179 - unsigned cflags;
19180 -};
19181 -
19182 struct dec_serial {
19183 - struct dec_serial *zs_next; /* For IRQ servicing chain */
19184 - struct dec_zschannel *zs_channel; /* Channel registers */
19185 - struct dec_zschannel *zs_chan_a; /* A side registers */
19186 - unsigned char read_reg_zero;
19187 -
19188 - char soft_carrier; /* Use soft carrier on this channel */
19189 - char break_abort; /* Is serial console in, so process brk/abrt */
19190 - struct zs_hook *hook; /* Hook on this channel */
19191 - char is_cons; /* Is this our console. */
19192 - unsigned char tx_active; /* character is being xmitted */
19193 - unsigned char tx_stopped; /* output is suspended */
19194 -
19195 - /* We need to know the current clock divisor
19196 - * to read the bps rate the chip has currently
19197 - * loaded.
19198 + struct dec_serial *zs_next; /* For IRQ servicing chain. */
19199 + struct dec_zschannel *zs_channel; /* Channel registers. */
19200 + struct dec_zschannel *zs_chan_a; /* A side registers. */
19201 + unsigned char read_reg_zero;
19202 +
19203 + struct dec_serial_hook *hook; /* Hook on this channel. */
19204 + int tty_break; /* Set on BREAK condition. */
19205 + int is_cons; /* Is this our console. */
19206 + int tx_active; /* Char is being xmitted. */
19207 + int tx_stopped; /* Output is suspended. */
19208 +
19209 + /*
19210 + * We need to know the current clock divisor
19211 + * to read the bps rate the chip has currently loaded.
19212 */
19213 - unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
19214 - int zs_baud;
19215 + int clk_divisor; /* May be 1, 16, 32, or 64. */
19216 + int zs_baud;
19217
19218 - char change_needed;
19219 + char change_needed;
19220
19221 int magic;
19222 int baud_base;
19223 int port;
19224 int irq;
19225 - int flags; /* defined in tty.h */
19226 - int type; /* UART type */
19227 + int flags; /* Defined in tty.h. */
19228 + int type; /* UART type. */
19229 struct tty_struct *tty;
19230 int read_status_mask;
19231 int ignore_status_mask;
19232 int timeout;
19233 int xmit_fifo_size;
19234 int custom_divisor;
19235 - int x_char; /* xon/xoff character */
19236 + int x_char; /* XON/XOFF character. */
19237 int close_delay;
19238 unsigned short closing_wait;
19239 unsigned short closing_wait2;
19240 unsigned long event;
19241 unsigned long last_active;
19242 int line;
19243 - int count; /* # of fd on device */
19244 - int blocked_open; /* # of blocked opens */
19245 - long session; /* Session of opening process */
19246 - long pgrp; /* pgrp of opening process */
19247 + int count; /* # of fds on device. */
19248 + int blocked_open; /* # of blocked opens. */
19249 + long session; /* Sess of opening process. */
19250 + long pgrp; /* Pgrp of opening process. */
19251 unsigned char *xmit_buf;
19252 int xmit_head;
19253 int xmit_tail;
19254 diff -Nur linux-2.4.29/drivers/video/au1200fb.c linux-mips/drivers/video/au1200fb.c
19255 --- linux-2.4.29/drivers/video/au1200fb.c 1970-01-01 01:00:00.000000000 +0100
19256 +++ linux-mips/drivers/video/au1200fb.c 2005-03-13 09:04:16.000000000 +0100
19257 @@ -0,0 +1,1564 @@
19258 +/*
19259 + * BRIEF MODULE DESCRIPTION
19260 + * Au1200 LCD Driver.
19261 + *
19262 + * Copyright 2004 AMD
19263 + * Author: AMD
19264 + *
19265 + * Based on:
19266 + * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
19267 + * Created 28 Dec 1997 by Geert Uytterhoeven
19268 + *
19269 + * This program is free software; you can redistribute it and/or modify it
19270 + * under the terms of the GNU General Public License as published by the
19271 + * Free Software Foundation; either version 2 of the License, or (at your
19272 + * option) any later version.
19273 + *
19274 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19275 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19276 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
19277 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19278 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19279 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19280 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19281 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19282 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19283 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19284 + *
19285 + * You should have received a copy of the GNU General Public License along
19286 + * with this program; if not, write to the Free Software Foundation, Inc.,
19287 + * 675 Mass Ave, Cambridge, MA 02139, USA.
19288 + */
19289 +
19290 +#include <linux/module.h>
19291 +#include <linux/kernel.h>
19292 +#include <linux/errno.h>
19293 +#include <linux/string.h>
19294 +#include <linux/mm.h>
19295 +#include <linux/tty.h>
19296 +#include <linux/slab.h>
19297 +#include <linux/delay.h>
19298 +#include <linux/fb.h>
19299 +#include <linux/init.h>
19300 +#include <asm/uaccess.h>
19301 +
19302 +#include <asm/au1000.h>
19303 +#include <asm/au1xxx_gpio.h>
19304 +#include "au1200fb.h"
19305 +
19306 +#include <video/fbcon.h>
19307 +#include <video/fbcon-cfb16.h>
19308 +#include <video/fbcon-cfb32.h>
19309 +#define CMAPSIZE 16
19310 +
19311 +#define AU1200_LCD_GET_WINENABLE 1
19312 +#define AU1200_LCD_SET_WINENABLE 2
19313 +#define AU1200_LCD_GET_WINLOCATION 3
19314 +#define AU1200_LCD_SET_WINLOCATION 4
19315 +#define AU1200_LCD_GET_WINSIZE 5
19316 +#define AU1200_LCD_SET_WINSIZE 6
19317 +#define AU1200_LCD_GET_BACKCOLOR 7
19318 +#define AU1200_LCD_SET_BACKCOLOR 8
19319 +#define AU1200_LCD_GET_COLORKEY 9
19320 +#define AU1200_LCD_SET_COLORKEY 10
19321 +#define AU1200_LCD_GET_PANEL 11
19322 +#define AU1200_LCD_SET_PANEL 12
19323 +
19324 +typedef struct au1200_lcd_getset_t
19325 +{
19326 + unsigned int subcmd;
19327 + union {
19328 + struct {
19329 + int enable;
19330 + } winenable;
19331 + struct {
19332 + int x, y;
19333 + } winlocation;
19334 + struct {
19335 + int hsz, vsz;
19336 + } winsize;
19337 + struct {
19338 + unsigned int color;
19339 + } backcolor;
19340 + struct {
19341 + unsigned int key;
19342 + unsigned int mask;
19343 + } colorkey;
19344 + struct {
19345 + int panel;
19346 + char desc[80];
19347 + } panel;
19348 + };
19349 +} au1200_lcd_getset_t;
19350 +
19351 +AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;
19352 +static int window_index = 0; /* default is zero */
19353 +static int panel_index = -1; /* default is call board_au1200fb_panel */
19354 +
19355 +struct window_settings
19356 +{
19357 + unsigned char name[64];
19358 + uint32 mode_backcolor;
19359 + uint32 mode_colorkey;
19360 + uint32 mode_colorkeymsk;
19361 + struct
19362 + {
19363 + int xres;
19364 + int yres;
19365 + int xpos;
19366 + int ypos;
19367 + uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
19368 + uint32 mode_winenable;
19369 + } w[4];
19370 +};
19371 +
19372 +struct panel_settings
19373 +{
19374 + unsigned char name[64];
19375 + /* panel physical dimensions */
19376 + uint32 Xres;
19377 + uint32 Yres;
19378 + /* panel timings */
19379 + uint32 mode_screen;
19380 + uint32 mode_horztiming;
19381 + uint32 mode_verttiming;
19382 + uint32 mode_clkcontrol;
19383 + uint32 mode_pwmdiv;
19384 + uint32 mode_pwmhi;
19385 + uint32 mode_outmask;
19386 + uint32 mode_fifoctrl;
19387 + uint32 mode_toyclksrc;
19388 + uint32 mode_backlight;
19389 + uint32 mode_auxpll;
19390 + int (*device_init)(void);
19391 + int (*device_shutdown)(void);
19392 +};
19393 +
19394 +#if defined(__BIG_ENDIAN)
19395 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
19396 +#else
19397 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
19398 +#endif
19399 +
19400 +extern int board_au1200fb_panel (void);
19401 +extern int board_au1200fb_panel_init (void);
19402 +extern int board_au1200fb_panel_shutdown (void);
19403 +
19404 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
19405 +extern int board_au1200fb_focus_init_hdtv(void);
19406 +extern int board_au1200fb_focus_init_component(void);
19407 +extern int board_au1200fb_focus_init_cvsv(void);
19408 +extern int board_au1200fb_focus_shutdown(void);
19409 +#endif
19410 +
19411 +/*
19412 + * Default window configurations
19413 + */
19414 +static struct window_settings windows[] =
19415 +{
19416 + { /* Index 0 */
19417 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
19418 + /* mode_backcolor */ 0x006600ff,
19419 + /* mode_colorkey,msk*/ 0, 0,
19420 + {
19421 + {
19422 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19423 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19424 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
19425 + },
19426 + {
19427 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19428 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19429 + /* mode_winenable*/ 0,
19430 + },
19431 + {
19432 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19433 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19434 + /* mode_winenable*/ 0,
19435 + },
19436 + {
19437 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19438 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19439 + /* mode_winenable*/ 0,
19440 + },
19441 + },
19442 + },
19443 +
19444 + { /* Index 1 */
19445 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
19446 + /* mode_backcolor */ 0x006600ff,
19447 + /* mode_colorkey,msk*/ 0, 0,
19448 + {
19449 + {
19450 + /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
19451 +#if 0
19452 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19453 +#endif
19454 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00,
19455 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
19456 + },
19457 + {
19458 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19459 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19460 + /* mode_winenable*/ 0,
19461 + },
19462 + {
19463 + /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
19464 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19465 + /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
19466 + },
19467 + {
19468 + /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
19469 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19470 + /* mode_winenable*/ 0,
19471 + },
19472 + },
19473 + },
19474 + /* Need VGA 640 @ 24bpp, @ 32bpp */
19475 + /* Need VGA 800 @ 24bpp, @ 32bpp */
19476 + /* Need VGA 1024 @ 24bpp, @ 32bpp */
19477 +} ;
19478 +
19479 +/*
19480 + * Controller configurations for various panels.
19481 + */
19482 +static struct panel_settings panels[] =
19483 +{
19484 + { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */
19485 + "VGA_320x240",
19486 + 320, 240,
19487 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
19488 + /* mode_horztiming */ 0x00c4623b,
19489 + /* mode_verttiming */ 0x00502814,
19490 + /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */
19491 + /* mode_pwmdiv */ 0x00000000,
19492 + /* mode_pwmhi */ 0x00000000,
19493 + /* mode_outmask */ 0x00FFFFFF,
19494 + /* mode_fifoctrl */ 0x2f2f2f2f,
19495 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19496 + /* mode_backlight */ 0x00000000,
19497 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19498 + /* device_init */ NULL,
19499 + /* device_shutdown */ NULL,
19500 + },
19501 +
19502 + { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */
19503 + "VGA_640x480",
19504 + 640, 480,
19505 + /* mode_screen */ 0x13f9df80,
19506 + /* mode_horztiming */ 0x003c5859,
19507 + /* mode_verttiming */ 0x00741201,
19508 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
19509 + /* mode_pwmdiv */ 0x00000000,
19510 + /* mode_pwmhi */ 0x00000000,
19511 + /* mode_outmask */ 0x00FFFFFF,
19512 + /* mode_fifoctrl */ 0x2f2f2f2f,
19513 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19514 + /* mode_backlight */ 0x00000000,
19515 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19516 + /* device_init */ NULL,
19517 + /* device_shutdown */ NULL,
19518 + },
19519 +
19520 + { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */
19521 + "SVGA_800x600",
19522 + 800, 600,
19523 + /* mode_screen */ 0x18fa5780,
19524 + /* mode_horztiming */ 0x00dc7e77,
19525 + /* mode_verttiming */ 0x00584805,
19526 + /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */
19527 + /* mode_pwmdiv */ 0x00000000,
19528 + /* mode_pwmhi */ 0x00000000,
19529 + /* mode_outmask */ 0x00FFFFFF,
19530 + /* mode_fifoctrl */ 0x2f2f2f2f,
19531 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19532 + /* mode_backlight */ 0x00000000,
19533 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19534 + /* device_init */ NULL,
19535 + /* device_shutdown */ NULL,
19536 + },
19537 +
19538 + { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */
19539 + "XVGA_1024x768",
19540 + 1024, 768,
19541 + /* mode_screen */ 0x1ffaff80,
19542 + /* mode_horztiming */ 0x007d0e57,
19543 + /* mode_verttiming */ 0x00740a01,
19544 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
19545 + /* mode_pwmdiv */ 0x00000000,
19546 + /* mode_pwmhi */ 0x00000000,
19547 + /* mode_outmask */ 0x00FFFFFF,
19548 + /* mode_fifoctrl */ 0x2f2f2f2f,
19549 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19550 + /* mode_backlight */ 0x00000000,
19551 + /* mode_auxpll */ 6, /* 72MHz AUXPLL */
19552 + /* device_init */ NULL,
19553 + /* device_shutdown */ NULL,
19554 + },
19555 +
19556 + { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */
19557 + "XVGA_1280x1024",
19558 + 1280, 1024,
19559 + /* mode_screen */ 0x27fbff80,
19560 + /* mode_horztiming */ 0x00cdb2c7,
19561 + /* mode_verttiming */ 0x00600002,
19562 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
19563 + /* mode_pwmdiv */ 0x00000000,
19564 + /* mode_pwmhi */ 0x00000000,
19565 + /* mode_outmask */ 0x00FFFFFF,
19566 + /* mode_fifoctrl */ 0x2f2f2f2f,
19567 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19568 + /* mode_backlight */ 0x00000000,
19569 + /* mode_auxpll */ 10, /* 120MHz AUXPLL */
19570 + /* device_init */ NULL,
19571 + /* device_shutdown */ NULL,
19572 + },
19573 +
19574 + { /* Index 5: Samsung 1024x768 TFT */
19575 + "Samsung_1024x768_TFT",
19576 + 1024, 768,
19577 + /* mode_screen */ 0x1ffaff80,
19578 + /* mode_horztiming */ 0x018cc677,
19579 + /* mode_verttiming */ 0x00241217,
19580 + /* mode_clkcontrol */ 0x00000000, /* SCB 0x1 /4=24Mhz */
19581 + /* mode_pwmdiv */ 0x8000063f, /* SCB 0x0 */
19582 + /* mode_pwmhi */ 0x03400000, /* SCB 0x0 */
19583 + /* mode_outmask */ 0x00fcfcfc,
19584 + /* mode_fifoctrl */ 0x2f2f2f2f,
19585 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19586 + /* mode_backlight */ 0x00000000,
19587 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19588 + /* device_init */ board_au1200fb_panel_init,
19589 + /* device_shutdown */ board_au1200fb_panel_shutdown,
19590 + },
19591 +
19592 + { /* Index 6: Toshiba 640x480 TFT */
19593 + "Toshiba_640x480_TFT",
19594 + 640, 480,
19595 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19596 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
19597 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) ,
19598 + /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */
19599 + /* mode_pwmdiv */ 0x8000063f,
19600 + /* mode_pwmhi */ 0x03400000,
19601 + /* mode_outmask */ 0x00fcfcfc,
19602 + /* mode_fifoctrl */ 0x2f2f2f2f,
19603 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19604 + /* mode_backlight */ 0x00000000,
19605 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19606 + /* device_init */ board_au1200fb_panel_init,
19607 + /* device_shutdown */ board_au1200fb_panel_shutdown,
19608 + },
19609 +
19610 + { /* Index 7: Sharp 320x240 TFT */
19611 + "Sharp_320x240_TFT",
19612 + 320, 240,
19613 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
19614 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
19615 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) ,
19616 + /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */
19617 + /* mode_pwmdiv */ 0x8000063f,
19618 + /* mode_pwmhi */ 0x03400000,
19619 + /* mode_outmask */ 0x00fcfcfc,
19620 + /* mode_fifoctrl */ 0x2f2f2f2f,
19621 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19622 + /* mode_backlight */ 0x00000000,
19623 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19624 + /* device_init */ board_au1200fb_panel_init,
19625 + /* device_shutdown */ board_au1200fb_panel_shutdown,
19626 + },
19627 + { /* Index 8: Toppoly TD070WGCB2 7" 854x480 TFT */
19628 + "Toppoly_TD070WGCB2",
19629 + 854, 480,
19630 + /* mode_screen */ LCD_SCREEN_SX_N(854) | LCD_SCREEN_SY_N(480),
19631 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(44) | LCD_HORZTIMING_HND1_N(44) | LCD_HORZTIMING_HPW_N(114),
19632 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(20) | LCD_VERTTIMING_VND1_N(21) | LCD_VERTTIMING_VPW_N(4),
19633 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
19634 + /* mode_pwmdiv */ 0x8000063f,
19635 + /* mode_pwmhi */ 0x03400000,
19636 + /* mode_outmask */ 0x00FCFCFC,
19637 + /* mode_fifoctrl */ 0x2f2f2f2f,
19638 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19639 + /* mode_backlight */ 0x00000000,
19640 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19641 + /* device_init */ board_au1200fb_panel_init,
19642 + /* device_shutdown */ board_au1200fb_panel_shutdown,
19643 + },
19644 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
19645 + { /* Index 9: Focus FS453 TV-Out 640x480 */
19646 + "FS453_640x480 (Composite/S-Video)",
19647 + 640, 480,
19648 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19649 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
19650 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
19651 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19652 + /* mode_pwmdiv */ 0x00000000,
19653 + /* mode_pwmhi */ 0x00000000,
19654 + /* mode_outmask */ 0x00FFFFFF,
19655 + /* mode_fifoctrl */ 0x2f2f2f2f,
19656 + /* mode_toyclksrc */ 0x00000000,
19657 + /* mode_backlight */ 0x00000000,
19658 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19659 + /* device_init */ board_au1200fb_focus_init_cvsv,
19660 + /* device_shutdown */ board_au1200fb_focus_shutdown,
19661 + },
19662 +
19663 + { /* Index 10: Focus FS453 TV-Out 640x480 */
19664 + "FS453_640x480 (Component Video)",
19665 + 640, 480,
19666 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19667 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
19668 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
19669 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19670 + /* mode_pwmdiv */ 0x00000000,
19671 + /* mode_pwmhi */ 0x00000000,
19672 + /* mode_outmask */ 0x00FFFFFF,
19673 + /* mode_fifoctrl */ 0x2f2f2f2f,
19674 + /* mode_toyclksrc */ 0x00000000,
19675 + /* mode_backlight */ 0x00000000,
19676 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19677 + /* device_init */ board_au1200fb_focus_init_component,
19678 + /* device_shutdown */ board_au1200fb_focus_shutdown,
19679 + },
19680 +
19681 + { /* Index 11: Focus FS453 TV-Out 640x480 */
19682 + "FS453_640x480 (HDTV)",
19683 + 720, 480,
19684 + /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480),
19685 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64),
19686 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7),
19687 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19688 + /* mode_pwmdiv */ 0x00000000,
19689 + /* mode_pwmhi */ 0x00000000,
19690 + /* mode_outmask */ 0x00FFFFFF,
19691 + /* mode_fifoctrl */ 0x2f2f2f2f,
19692 + /* mode_toyclksrc */ 0x00000000,
19693 + /* mode_backlight */ 0x00000000,
19694 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19695 + /* device_init */ board_au1200fb_focus_init_hdtv,
19696 + /* device_shutdown */ board_au1200fb_focus_shutdown,
19697 + },
19698 +#endif
19699 +};
19700 +
19701 +#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))
19702 +
19703 +static struct window_settings *win;
19704 +static struct panel_settings *panel;
19705 +
19706 +struct au1200fb_info {
19707 + struct fb_info_gen gen;
19708 + unsigned long fb_virt_start;
19709 + unsigned long fb_size;
19710 + unsigned long fb_phys;
19711 + int mmaped;
19712 + int nohwcursor;
19713 + int noblanking;
19714 +
19715 + struct { unsigned red, green, blue, pad; } palette[256];
19716 +
19717 +#if defined(FBCON_HAS_CFB16)
19718 + u16 fbcon_cmap16[16];
19719 +#endif
19720 +#if defined(FBCON_HAS_CFB32)
19721 + u32 fbcon_cmap32[16];
19722 +#endif
19723 +};
19724 +
19725 +
19726 +struct au1200fb_par {
19727 + struct fb_var_screeninfo var;
19728 +
19729 + int line_length; /* in bytes */
19730 + int cmap_len; /* color-map length */
19731 +};
19732 +
19733 +#ifndef CONFIG_FB_AU1200_DEVS
19734 +#define CONFIG_FB_AU1200_DEVS 1
19735 +#endif
19736 +
19737 +static struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];
19738 +static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];
19739 +static struct display disps[CONFIG_FB_AU1200_DEVS];
19740 +
19741 +int au1200fb_init(void);
19742 +void au1200fb_setup(char *options, int *ints);
19743 +static int au1200fb_mmap(struct fb_info *fb, struct file *file,
19744 + struct vm_area_struct *vma);
19745 +static int au1200_blank(int blank_mode, struct fb_info_gen *info);
19746 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
19747 + u_long arg, int con, struct fb_info *info);
19748 +
19749 +void au1200_nocursor(struct display *p, int mode, int xx, int yy){};
19750 +
19751 +static int au1200_setlocation (int plane, int xpos, int ypos);
19752 +static int au1200_setsize (int plane, int xres, int yres);
19753 +static void au1200_setmode(int plane);
19754 +static void au1200_setpanel (struct panel_settings *newpanel);
19755 +
19756 +static struct fb_ops au1200fb_ops = {
19757 + owner: THIS_MODULE,
19758 + fb_get_fix: fbgen_get_fix,
19759 + fb_get_var: fbgen_get_var,
19760 + fb_set_var: fbgen_set_var,
19761 + fb_get_cmap: fbgen_get_cmap,
19762 + fb_set_cmap: fbgen_set_cmap,
19763 + fb_pan_display: fbgen_pan_display,
19764 + fb_ioctl: au1200fb_ioctl,
19765 + fb_mmap: au1200fb_mmap,
19766 +};
19767 +
19768 +
19769 +static int
19770 +winbpp (unsigned int winctrl1)
19771 +{
19772 + /* how many bytes of memory are needed for each pixel format */
19773 + switch (winctrl1 & LCD_WINCTRL1_FRM)
19774 + {
19775 + case LCD_WINCTRL1_FRM_1BPP: return 1; break;
19776 + case LCD_WINCTRL1_FRM_2BPP: return 2; break;
19777 + case LCD_WINCTRL1_FRM_4BPP: return 4; break;
19778 + case LCD_WINCTRL1_FRM_8BPP: return 8; break;
19779 + case LCD_WINCTRL1_FRM_12BPP: return 16; break;
19780 + case LCD_WINCTRL1_FRM_16BPP655: return 16; break;
19781 + case LCD_WINCTRL1_FRM_16BPP565: return 16; break;
19782 + case LCD_WINCTRL1_FRM_16BPP556: return 16; break;
19783 + case LCD_WINCTRL1_FRM_16BPPI1555: return 16; break;
19784 + case LCD_WINCTRL1_FRM_16BPPI5551: return 16; break;
19785 + case LCD_WINCTRL1_FRM_16BPPA1555: return 16; break;
19786 + case LCD_WINCTRL1_FRM_16BPPA5551: return 16; break;
19787 + case LCD_WINCTRL1_FRM_24BPP: return 32; break;
19788 + case LCD_WINCTRL1_FRM_32BPP: return 32; break;
19789 + default: return 0; break;
19790 + }
19791 +}
19792 +
19793 +static int
19794 +fbinfo2index (struct fb_info *fb_info)
19795 +{
19796 + int i;
19797 + for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i)
19798 + {
19799 + if (fb_info == (struct fb_info *)(&fb_infos[i]))
19800 + return i;
19801 + }
19802 + printk("au1200fb: ERROR: fbinfo2index failed!\n");
19803 + return -1;
19804 +}
19805 +
19806 +static void au1200_detect(void)
19807 +{
19808 + /*
19809 + * This function should detect the current video mode settings
19810 + * and store it as the default video mode
19811 + * Yeh, well, we're not going to change any settings so we're
19812 + * always stuck with the default ...
19813 + */
19814 +}
19815 +
19816 +static int au1200_encode_fix(struct fb_fix_screeninfo *fix,
19817 + const void *_par, struct fb_info_gen *_info)
19818 +{
19819 + struct au1200fb_info *info = (struct au1200fb_info *) _info;
19820 + struct au1200fb_par *par = (struct au1200fb_par *) _par;
19821 + int plane;
19822 +
19823 + plane = fbinfo2index(info);
19824 +
19825 + memset(fix, 0, sizeof(struct fb_fix_screeninfo));
19826 +
19827 + fix->smem_start = info->fb_phys;
19828 + fix->smem_len = info->fb_size;
19829 + fix->type = FB_TYPE_PACKED_PIXELS;
19830 + fix->type_aux = 0;
19831 + fix->visual = (par->var.bits_per_pixel == 8) ?
19832 + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
19833 + fix->ywrapstep = 0;
19834 + fix->xpanstep = 1;
19835 + fix->ypanstep = 1;
19836 + /* FIX!!!! why doesn't par->line_length work???? it does for au1100 */
19837 + fix->line_length = fb_pars[plane].line_length; /*par->line_length;*/
19838 + return 0;
19839 +}
19840 +
19841 +static void set_color_bitfields(struct fb_var_screeninfo *var, int plane)
19842 +{
19843 + if (var->bits_per_pixel == 8)
19844 + {
19845 + var->red.offset = 0;
19846 + var->red.length = 8;
19847 + var->green.offset = 0;
19848 + var->green.length = 8;
19849 + var->blue.offset = 0;
19850 + var->blue.length = 8;
19851 + var->transp.offset = 0;
19852 + var->transp.length = 0;
19853 + }
19854 + else
19855 +
19856 + if (var->bits_per_pixel == 16)
19857 + {
19858 + /* FIX!!! How does CCO affect this ? */
19859 + /* FIX!!! Not exactly sure how many of these work with FB */
19860 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
19861 + {
19862 + case LCD_WINCTRL1_FRM_16BPP655:
19863 + var->red.offset = 10;
19864 + var->red.length = 6;
19865 + var->green.offset = 5;
19866 + var->green.length = 5;
19867 + var->blue.offset = 0;
19868 + var->blue.length = 5;
19869 + var->transp.offset = 0;
19870 + var->transp.length = 0;
19871 + break;
19872 +
19873 + case LCD_WINCTRL1_FRM_16BPP565:
19874 + var->red.offset = 11;
19875 + var->red.length = 5;
19876 + var->green.offset = 5;
19877 + var->green.length = 6;
19878 + var->blue.offset = 0;
19879 + var->blue.length = 5;
19880 + var->transp.offset = 0;
19881 + var->transp.length = 0;
19882 + break;
19883 +
19884 + case LCD_WINCTRL1_FRM_16BPP556:
19885 + var->red.offset = 11;
19886 + var->red.length = 5;
19887 + var->green.offset = 6;
19888 + var->green.length = 5;
19889 + var->blue.offset = 0;
19890 + var->blue.length = 6;
19891 + var->transp.offset = 0;
19892 + var->transp.length = 0;
19893 + break;
19894 +
19895 + case LCD_WINCTRL1_FRM_16BPPI1555:
19896 + var->red.offset = 10;
19897 + var->red.length = 5;
19898 + var->green.offset = 5;
19899 + var->green.length = 5;
19900 + var->blue.offset = 0;
19901 + var->blue.length = 5;
19902 + var->transp.offset = 0;
19903 + var->transp.length = 0;
19904 + break;
19905 +
19906 + case LCD_WINCTRL1_FRM_16BPPI5551:
19907 + var->red.offset = 11;
19908 + var->red.length = 5;
19909 + var->green.offset = 6;
19910 + var->green.length = 5;
19911 + var->blue.offset = 1;
19912 + var->blue.length = 5;
19913 + var->transp.offset = 0;
19914 + var->transp.length = 0;
19915 + break;
19916 +
19917 + case LCD_WINCTRL1_FRM_16BPPA1555:
19918 + var->red.offset = 10;
19919 + var->red.length = 5;
19920 + var->green.offset = 5;
19921 + var->green.length = 5;
19922 + var->blue.offset = 0;
19923 + var->blue.length = 5;
19924 + var->transp.offset = 15;
19925 + var->transp.length = 1;
19926 + break;
19927 +
19928 + case LCD_WINCTRL1_FRM_16BPPA5551:
19929 + var->red.offset = 11;
19930 + var->red.length = 5;
19931 + var->green.offset = 6;
19932 + var->green.length = 5;
19933 + var->blue.offset = 1;
19934 + var->blue.length = 5;
19935 + var->transp.offset = 0;
19936 + var->transp.length = 1;
19937 + break;
19938 +
19939 + default:
19940 + printk("ERROR: Invalid PIXEL FORMAT!!!\n"); break;
19941 + }
19942 + }
19943 + else
19944 +
19945 + if (var->bits_per_pixel == 32)
19946 + {
19947 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
19948 + {
19949 + case LCD_WINCTRL1_FRM_24BPP:
19950 + var->red.offset = 16;
19951 + var->red.length = 8;
19952 + var->green.offset = 8;
19953 + var->green.length = 8;
19954 + var->blue.offset = 0;
19955 + var->blue.length = 8;
19956 + var->transp.offset = 0;
19957 + var->transp.length = 0;
19958 + break;
19959 +
19960 + case LCD_WINCTRL1_FRM_32BPP:
19961 + var->red.offset = 16;
19962 + var->red.length = 8;
19963 + var->green.offset = 8;
19964 + var->green.length = 8;
19965 + var->blue.offset = 0;
19966 + var->blue.length = 8;
19967 + var->transp.offset = 24;
19968 + var->transp.length = 8;
19969 + break;
19970 + }
19971 + }
19972 + var->red.msb_right = 0;
19973 + var->green.msb_right = 0;
19974 + var->blue.msb_right = 0;
19975 + var->transp.msb_right = 0;
19976 +#if 0
19977 +printk("set_color_bitfields(a=%d, r=%d..%d, g=%d..%d, b=%d..%d)\n",
19978 + var->transp.offset,
19979 + var->red.offset+var->red.length-1, var->red.offset,
19980 + var->green.offset+var->green.length-1, var->green.offset,
19981 + var->blue.offset+var->blue.length-1, var->blue.offset);
19982 +#endif
19983 +}
19984 +
19985 +static int au1200_decode_var(const struct fb_var_screeninfo *var,
19986 + void *_par, struct fb_info_gen *_info)
19987 +{
19988 + struct au1200fb_par *par = (struct au1200fb_par *)_par;
19989 + int plane, bpp;
19990 +
19991 + plane = fbinfo2index((struct fb_info *)_info);
19992 +
19993 + /*
19994 + * Don't allow setting any of these yet: xres and yres don't
19995 + * make sense for LCD panels.
19996 + */
19997 + if (var->xres != win->w[plane].xres ||
19998 + var->yres != win->w[plane].yres ||
19999 + var->xres != win->w[plane].xres ||
20000 + var->yres != win->w[plane].yres) {
20001 + return -EINVAL;
20002 + }
20003 +
20004 + bpp = winbpp(win->w[plane].mode_winctrl1);
20005 + if(var->bits_per_pixel != bpp) {
20006 + /* on au1200, window pixel format is independent of panel pixel */
20007 + printk("WARNING: bits_per_pizel != panel->bpp\n");
20008 + }
20009 +
20010 + memset(par, 0, sizeof(struct au1200fb_par));
20011 + par->var = *var;
20012 +
20013 + /* FIX!!! */
20014 + switch (var->bits_per_pixel) {
20015 + case 8:
20016 + par->var.bits_per_pixel = 8;
20017 + break;
20018 + case 16:
20019 + par->var.bits_per_pixel = 16;
20020 + break;
20021 + case 24:
20022 + case 32:
20023 + par->var.bits_per_pixel = 32;
20024 + break;
20025 + default:
20026 + printk("color depth %d bpp not supported\n",
20027 + var->bits_per_pixel);
20028 + return -EINVAL;
20029 +
20030 + }
20031 + set_color_bitfields(&par->var, plane);
20032 + /* FIX!!! what is this for 24/32bpp? */
20033 + par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
20034 + return 0;
20035 +}
20036 +
20037 +static int au1200_encode_var(struct fb_var_screeninfo *var,
20038 + const void *par, struct fb_info_gen *_info)
20039 +{
20040 + *var = ((struct au1200fb_par *)par)->var;
20041 + return 0;
20042 +}
20043 +
20044 +static void
20045 +au1200_get_par(void *_par, struct fb_info_gen *_info)
20046 +{
20047 + int index;
20048 +
20049 + index = fbinfo2index((struct fb_info *)_info);
20050 + *(struct au1200fb_par *)_par = fb_pars[index];
20051 +}
20052 +
20053 +static void au1200_set_par(const void *par, struct fb_info_gen *info)
20054 +{
20055 + /* nothing to do: we don't change any settings */
20056 +}
20057 +
20058 +static int au1200_getcolreg(unsigned regno, unsigned *red, unsigned *green,
20059 + unsigned *blue, unsigned *transp,
20060 + struct fb_info *info)
20061 +{
20062 + struct au1200fb_info* i = (struct au1200fb_info*)info;
20063 +
20064 + if (regno > 255)
20065 + return 1;
20066 +
20067 + *red = i->palette[regno].red;
20068 + *green = i->palette[regno].green;
20069 + *blue = i->palette[regno].blue;
20070 + *transp = 0;
20071 +
20072 + return 0;
20073 +}
20074 +
20075 +static int au1200_setcolreg(unsigned regno, unsigned red, unsigned green,
20076 + unsigned blue, unsigned transp,
20077 + struct fb_info *info)
20078 +{
20079 + struct au1200fb_info* i = (struct au1200fb_info *)info;
20080 + u32 rgbcol;
20081 + int plane, bpp;
20082 +
20083 + plane = fbinfo2index((struct fb_info *)info);
20084 + bpp = winbpp(win->w[plane].mode_winctrl1);
20085 +
20086 + if (regno > 255)
20087 + return 1;
20088 +
20089 + i->palette[regno].red = red;
20090 + i->palette[regno].green = green;
20091 + i->palette[regno].blue = blue;
20092 +
20093 + switch(bpp) {
20094 +#ifdef FBCON_HAS_CFB8
20095 + case 8:
20096 + red >>= 10;
20097 + green >>= 10;
20098 + blue >>= 10;
20099 + panel_reg->lcd_pallettebase[regno] = (blue&0x1f) |
20100 + ((green&0x3f)<<5) | ((red&0x1f)<<11);
20101 + break;
20102 +#endif
20103 +#ifdef FBCON_HAS_CFB16
20104 +/* FIX!!!! depends upon pixel format */
20105 + case 16:
20106 + i->fbcon_cmap16[regno] =
20107 + ((red & 0xf800) >> 0) |
20108 + ((green & 0xfc00) >> 5) |
20109 + ((blue & 0xf800) >> 11);
20110 + break;
20111 +#endif
20112 +#ifdef FBCON_HAS_CFB32
20113 + case 32:
20114 + i->fbcon_cmap32[regno] =
20115 + (((u32 )transp & 0xff00) << 16) |
20116 + (((u32 )red & 0xff00) << 8) |
20117 + (((u32 )green & 0xff00)) |
20118 + (((u32 )blue & 0xff00) >> 8);
20119 + break;
20120 +#endif
20121 + default:
20122 + printk("unsupported au1200_setcolreg(%d)\n", bpp);
20123 + break;
20124 + }
20125 +
20126 + return 0;
20127 +}
20128 +
20129 +
20130 +static int au1200_blank(int blank_mode, struct fb_info_gen *_info)
20131 +{
20132 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_info;
20133 + int plane;
20134 +
20135 + /* Short-circuit screen blanking */
20136 + if (fb_info->noblanking)
20137 + return 0;
20138 +
20139 + plane = fbinfo2index((struct fb_info *)_info);
20140 +
20141 + switch (blank_mode) {
20142 + case VESA_NO_BLANKING:
20143 + /* printk("turn on panel\n"); */
20144 + au1200_setpanel(panel);
20145 + break;
20146 +
20147 + case VESA_VSYNC_SUSPEND:
20148 + case VESA_HSYNC_SUSPEND:
20149 + case VESA_POWERDOWN:
20150 + /* printk("turn off panel\n"); */
20151 + au1200_setpanel(NULL);
20152 + break;
20153 + default:
20154 + break;
20155 +
20156 + }
20157 + return 0;
20158 +}
20159 +
20160 +static void au1200_set_disp(const void *unused, struct display *disp,
20161 + struct fb_info_gen *info)
20162 +{
20163 + struct au1200fb_info *fb_info;
20164 + int plane;
20165 +
20166 + fb_info = (struct au1200fb_info *)info;
20167 +
20168 + disp->screen_base = (char *)fb_info->fb_virt_start;
20169 +
20170 + switch (disp->var.bits_per_pixel) {
20171 +#ifdef FBCON_HAS_CFB8
20172 + case 8:
20173 + disp->dispsw = &fbcon_cfb8;
20174 + if (fb_info->nohwcursor)
20175 + fbcon_cfb8.cursor = au1200_nocursor;
20176 + break;
20177 +#endif
20178 +#ifdef FBCON_HAS_CFB16
20179 + case 16:
20180 + disp->dispsw = &fbcon_cfb16;
20181 + disp->dispsw_data = fb_info->fbcon_cmap16;
20182 + if (fb_info->nohwcursor)
20183 + fbcon_cfb16.cursor = au1200_nocursor;
20184 + break;
20185 +#endif
20186 +#ifdef FBCON_HAS_CFB32
20187 + case 32:
20188 + disp->dispsw = &fbcon_cfb32;
20189 + disp->dispsw_data = fb_info->fbcon_cmap32;
20190 + if (fb_info->nohwcursor)
20191 + fbcon_cfb32.cursor = au1200_nocursor;
20192 + break;
20193 +#endif
20194 + default:
20195 + disp->dispsw = &fbcon_dummy;
20196 + disp->dispsw_data = NULL;
20197 + break;
20198 + }
20199 +}
20200 +
20201 +static int
20202 +au1200fb_mmap(struct fb_info *_fb,
20203 + struct file *file,
20204 + struct vm_area_struct *vma)
20205 +{
20206 + unsigned int len;
20207 + unsigned long start=0, off;
20208 +
20209 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_fb;
20210 +
20211 + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
20212 + return -EINVAL;
20213 + }
20214 +
20215 + start = fb_info->fb_phys & PAGE_MASK;
20216 + len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info->fb_size);
20217 +
20218 + off = vma->vm_pgoff << PAGE_SHIFT;
20219 +
20220 + if ((vma->vm_end - vma->vm_start + off) > len) {
20221 + return -EINVAL;
20222 + }
20223 +
20224 + off += start;
20225 + vma->vm_pgoff = off >> PAGE_SHIFT;
20226 +
20227 + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
20228 + pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
20229 +
20230 + /* This is an IO map - tell maydump to skip this VMA */
20231 + vma->vm_flags |= VM_IO;
20232 +
20233 + if (io_remap_page_range(vma->vm_start, off,
20234 + vma->vm_end - vma->vm_start,
20235 + vma->vm_page_prot)) {
20236 + return -EAGAIN;
20237 + }
20238 +
20239 + fb_info->mmaped = 1;
20240 + return 0;
20241 +}
20242 +
20243 +int au1200_pan_display(const struct fb_var_screeninfo *var,
20244 + struct fb_info_gen *info)
20245 +{
20246 + return 0;
20247 +}
20248 +
20249 +
20250 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
20251 + u_long arg, int con, struct fb_info *info)
20252 +{
20253 + int plane;
20254 +
20255 + plane = fbinfo2index(info);
20256 +
20257 + /* printk("au1200fb: ioctl %d on plane %d\n", cmd, plane); */
20258 +
20259 + if (cmd == 0x46FF)
20260 + {
20261 + au1200_lcd_getset_t iodata;
20262 +
20263 + if (copy_from_user(&iodata, (void *) arg, sizeof(au1200_lcd_getset_t)))
20264 + return -EFAULT;
20265 +
20266 + switch (iodata.subcmd)
20267 + {
20268 + case AU1200_LCD_GET_WINENABLE:
20269 + iodata.winenable.enable = (lcd->winenable & (1<<plane)) ? 1 : 0;
20270 + break;
20271 + case AU1200_LCD_SET_WINENABLE:
20272 + {
20273 + u32 winenable;
20274 + winenable = lcd->winenable;
20275 + winenable &= ~(1<<plane);
20276 + winenable |= (iodata.winenable.enable) ? (1<<plane) : 0;
20277 + lcd->winenable = winenable;
20278 + }
20279 + break;
20280 + case AU1200_LCD_GET_WINLOCATION:
20281 + iodata.winlocation.x =
20282 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
20283 + iodata.winlocation.y =
20284 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
20285 + break;
20286 + case AU1200_LCD_SET_WINLOCATION:
20287 + au1200_setlocation(plane, iodata.winlocation.x, iodata.winlocation.y);
20288 + break;
20289 + case AU1200_LCD_GET_WINSIZE:
20290 + iodata.winsize.hsz =
20291 + (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11;
20292 + iodata.winsize.vsz =
20293 + (lcd->window[plane].winctrl0 & LCD_WINCTRL1_SZY) >> 0;
20294 + break;
20295 + case AU1200_LCD_SET_WINSIZE:
20296 + au1200_setsize(plane, iodata.winsize.hsz, iodata.winsize.vsz);
20297 + break;
20298 + case AU1200_LCD_GET_BACKCOLOR:
20299 + iodata.backcolor.color = lcd->backcolor;
20300 + break;
20301 + case AU1200_LCD_SET_BACKCOLOR:
20302 + lcd->backcolor = iodata.backcolor.color;
20303 + break;
20304 + case AU1200_LCD_GET_COLORKEY:
20305 + iodata.colorkey.key = lcd->colorkey;
20306 + iodata.colorkey.mask = lcd->colorkeymsk;
20307 + break;
20308 + case AU1200_LCD_SET_COLORKEY:
20309 + lcd->colorkey = iodata.colorkey.key;
20310 + lcd->colorkeymsk = iodata.colorkey.mask;
20311 + break;
20312 + case AU1200_LCD_GET_PANEL:
20313 + iodata.panel.panel = panel_index;
20314 + break;
20315 + case AU1200_LCD_SET_PANEL:
20316 + if ((iodata.panel.panel >= 0) && (iodata.panel.panel < NUM_PANELS))
20317 + {
20318 + struct panel_settings *newpanel;
20319 + panel_index = iodata.panel.panel;
20320 + newpanel = &panels[panel_index];
20321 + au1200_setpanel(newpanel);
20322 + }
20323 + break;
20324 + }
20325 +
20326 + return copy_to_user((void *) arg, &iodata, sizeof(au1200_lcd_getset_t)) ? -EFAULT : 0;
20327 + }
20328 +
20329 + return -EINVAL;
20330 +}
20331 +
20332 +static struct fbgen_hwswitch au1200_switch = {
20333 + au1200_detect,
20334 + au1200_encode_fix,
20335 + au1200_decode_var,
20336 + au1200_encode_var,
20337 + au1200_get_par,
20338 + au1200_set_par,
20339 + au1200_getcolreg,
20340 + au1200_setcolreg,
20341 + au1200_pan_display,
20342 + au1200_blank,
20343 + au1200_set_disp
20344 +};
20345 +
20346 +static void au1200_setpanel (struct panel_settings *newpanel)
20347 +{
20348 + /*
20349 + * Perform global setup/init of LCD controller
20350 + */
20351 + uint32 winenable;
20352 +
20353 + /* Make sure all windows disabled */
20354 + winenable = lcd->winenable;
20355 + lcd->winenable = 0;
20356 +
20357 + /*
20358 + * Ensure everything is disabled before reconfiguring
20359 + */
20360 + if (lcd->screen & LCD_SCREEN_SEN)
20361 + {
20362 + /* Wait for vertical sync period */
20363 + lcd->intstatus = LCD_INT_SS;
20364 + while ((lcd->intstatus & LCD_INT_SS) == 0)
20365 + ;
20366 +
20367 + lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
20368 +
20369 + do
20370 + {
20371 + lcd->intstatus = lcd->intstatus; /*clear interrupts*/
20372 + }
20373 + /*wait for controller to shut down*/
20374 + while ((lcd->intstatus & LCD_INT_SD) == 0);
20375 +
20376 + /* Call shutdown of current panel (if up) */
20377 + /* this must occur last, because if an external clock is driving
20378 + the controller, the clock cannot be turned off before first
20379 + shutting down the controller.
20380 + */
20381 + if (panel->device_shutdown != NULL) panel->device_shutdown();
20382 + }
20383 +
20384 + /* Check if only needing to turn off panel */
20385 + if (panel == NULL) return;
20386 +
20387 + panel = newpanel;
20388 +
20389 + printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
20390 +
20391 + /*
20392 + * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
20393 + */
20394 + if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT))
20395 + {
20396 + uint32 sys_clksrc;
20397 + /* WARNING! This should really be a check since other peripherals can
20398 + be affected by changins sys_auxpll */
20399 + au_writel(panel->mode_auxpll, SYS_AUXPLL);
20400 + sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
20401 + sys_clksrc |= panel->mode_toyclksrc;
20402 + au_writel(sys_clksrc, SYS_CLKSRC);
20403 + }
20404 +
20405 + /*
20406 + * Configure panel timings
20407 + */
20408 + lcd->screen = panel->mode_screen;
20409 + lcd->horztiming = panel->mode_horztiming;
20410 + lcd->verttiming = panel->mode_verttiming;
20411 + lcd->clkcontrol = panel->mode_clkcontrol;
20412 + lcd->pwmdiv = panel->mode_pwmdiv;
20413 + lcd->pwmhi = panel->mode_pwmhi;
20414 + lcd->outmask = panel->mode_outmask;
20415 + lcd->fifoctrl = panel->mode_fifoctrl;
20416 + au_sync();
20417 +
20418 + /* FIX!!! Check window settings to make sure still valid for new geometry */
20419 + au1200_setlocation(0, win->w[0].xpos, win->w[0].ypos);
20420 + au1200_setlocation(1, win->w[1].xpos, win->w[1].ypos);
20421 + au1200_setlocation(2, win->w[2].xpos, win->w[2].ypos);
20422 + au1200_setlocation(3, win->w[3].xpos, win->w[3].ypos);
20423 + lcd->winenable = winenable;
20424 +
20425 + /*
20426 + * Re-enable screen now that it is configured
20427 + */
20428 + lcd->screen |= LCD_SCREEN_SEN;
20429 + au_sync();
20430 +
20431 + /* Call init of panel */
20432 + if (panel->device_init != NULL) panel->device_init();
20433 +
20434 +#if 0
20435 +#define D(X) printk("%25s: %08X\n", #X, X)
20436 + D(lcd->screen);
20437 + D(lcd->horztiming);
20438 + D(lcd->verttiming);
20439 + D(lcd->clkcontrol);
20440 + D(lcd->pwmdiv);
20441 + D(lcd->pwmhi);
20442 + D(lcd->outmask);
20443 + D(lcd->fifoctrl);
20444 + D(lcd->window[0].winctrl0);
20445 + D(lcd->window[0].winctrl1);
20446 + D(lcd->window[0].winctrl2);
20447 + D(lcd->window[0].winbuf0);
20448 + D(lcd->window[0].winbuf1);
20449 + D(lcd->window[0].winbufctrl);
20450 + D(lcd->window[1].winctrl0);
20451 + D(lcd->window[1].winctrl1);
20452 + D(lcd->window[1].winctrl2);
20453 + D(lcd->window[1].winbuf0);
20454 + D(lcd->window[1].winbuf1);
20455 + D(lcd->window[1].winbufctrl);
20456 + D(lcd->window[2].winctrl0);
20457 + D(lcd->window[2].winctrl1);
20458 + D(lcd->window[2].winctrl2);
20459 + D(lcd->window[2].winbuf0);
20460 + D(lcd->window[2].winbuf1);
20461 + D(lcd->window[2].winbufctrl);
20462 + D(lcd->window[3].winctrl0);
20463 + D(lcd->window[3].winctrl1);
20464 + D(lcd->window[3].winctrl2);
20465 + D(lcd->window[3].winbuf0);
20466 + D(lcd->window[3].winbuf1);
20467 + D(lcd->window[3].winbufctrl);
20468 + D(lcd->winenable);
20469 + D(lcd->intenable);
20470 + D(lcd->intstatus);
20471 + D(lcd->backcolor);
20472 + D(lcd->winenable);
20473 + D(lcd->colorkey);
20474 + D(lcd->colorkeymsk);
20475 + D(lcd->hwc.cursorctrl);
20476 + D(lcd->hwc.cursorpos);
20477 + D(lcd->hwc.cursorcolor0);
20478 + D(lcd->hwc.cursorcolor1);
20479 + D(lcd->hwc.cursorcolor2);
20480 + D(lcd->hwc.cursorcolor3);
20481 +#endif
20482 +}
20483 +
20484 +static int au1200_setsize (int plane, int xres, int yres)
20485 +{
20486 +#if 0
20487 + uint32 winctrl0, winctrl1, winenable;
20488 + int xsz, ysz;
20489 +
20490 + /* FIX!!! X*Y can not surpass allocated memory */
20491 +
20492 + printk("setsize: x %d y %d\n", xres, yres);
20493 + winctrl1 = lcd->window[plane].winctrl1;
20494 + printk("org winctrl1 %08X\n", winctrl1);
20495 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
20496 +
20497 + xres -= 1;
20498 + yres -= 1;
20499 + winctrl1 |= (xres << 11);
20500 + winctrl1 |= (yres << 0);
20501 +
20502 + printk("new winctrl1 %08X\n", winctrl1);
20503 +
20504 + /*winenable = lcd->winenable & (1 << plane); */
20505 + /*lcd->winenable &= ~(1 << plane); */
20506 + lcd->window[plane].winctrl1 = winctrl1;
20507 + /*lcd->winenable |= winenable; */
20508 +#endif
20509 + return 0;
20510 +}
20511 +
20512 +static int au1200_setlocation (int plane, int xpos, int ypos)
20513 +{
20514 + uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
20515 + int xsz, ysz;
20516 +
20517 + /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
20518 +
20519 + winctrl0 = lcd->window[plane].winctrl0;
20520 + winctrl1 = lcd->window[plane].winctrl1;
20521 + winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
20522 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
20523 +
20524 + /* Check for off-screen adjustments */
20525 + xsz = win->w[plane].xres;
20526 + ysz = win->w[plane].yres;
20527 + if ((xpos + win->w[plane].xres) > panel->Xres)
20528 + {
20529 + /* Off-screen to the right */
20530 + xsz = panel->Xres - xpos; /* off by 1 ??? */
20531 + /*printk("off screen right\n");*/
20532 + }
20533 +
20534 + if ((ypos + win->w[plane].yres) > panel->Yres)
20535 + {
20536 + /* Off-screen to the bottom */
20537 + ysz = panel->Yres - ypos; /* off by 1 ??? */
20538 + /*printk("off screen bottom\n");*/
20539 + }
20540 +
20541 + if (xpos < 0)
20542 + {
20543 + /* Off-screen to the left */
20544 + xsz = win->w[plane].xres + xpos;
20545 + fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
20546 + xpos = 0;
20547 + /*printk("off screen left\n");*/
20548 + }
20549 +
20550 + if (ypos < 0)
20551 + {
20552 + /* Off-screen to the top */
20553 + ysz = win->w[plane].yres + ypos;
20554 + fb_offset += ((0 - ypos) * fb_pars[plane].line_length);
20555 + ypos = 0;
20556 + /*printk("off screen top\n");*/
20557 + }
20558 +
20559 + /* record settings */
20560 + win->w[plane].xpos = xpos;
20561 + win->w[plane].ypos = ypos;
20562 +
20563 + xsz -= 1;
20564 + ysz -= 1;
20565 + winctrl0 |= (xpos << 21);
20566 + winctrl0 |= (ypos << 10);
20567 + winctrl1 |= (xsz << 11);
20568 + winctrl1 |= (ysz << 0);
20569 +
20570 + /* Disable the window while making changes, then restore WINEN */
20571 + winenable = lcd->winenable & (1 << plane);
20572 + lcd->winenable &= ~(1 << plane);
20573 + lcd->window[plane].winctrl0 = winctrl0;
20574 + lcd->window[plane].winctrl1 = winctrl1;
20575 + lcd->window[plane].winbuf0 =
20576 + lcd->window[plane].winbuf1 = fb_infos[plane].fb_phys + fb_offset;
20577 + lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
20578 + lcd->winenable |= winenable;
20579 +
20580 + return 0;
20581 +}
20582 +
20583 +static void au1200_setmode(int plane)
20584 +{
20585 + /* Window/plane setup */
20586 + lcd->window[plane].winctrl1 = ( 0
20587 + | LCD_WINCTRL1_PRI_N(plane)
20588 + | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
20589 + ) ;
20590 +
20591 + au1200_setlocation(plane, win->w[plane].xpos, win->w[plane].ypos);
20592 +
20593 + lcd->window[plane].winctrl2 = ( 0
20594 + | LCD_WINCTRL2_CKMODE_00
20595 + | LCD_WINCTRL2_DBM
20596 +/* | LCD_WINCTRL2_RAM */
20597 + | LCD_WINCTRL2_BX_N(fb_pars[plane].line_length)
20598 + | LCD_WINCTRL2_SCX_1
20599 + | LCD_WINCTRL2_SCY_1
20600 + ) ;
20601 + lcd->winenable |= win->w[plane].mode_winenable;
20602 + au_sync();
20603 +
20604 +}
20605 +
20606 +static unsigned long
20607 +au1200fb_alloc_fbmem (unsigned long size)
20608 +{
20609 + /* __get_free_pages() fulfills a max request of 2MB */
20610 + /* do multiple requests to obtain large contigous mem */
20611 +#define MAX_GFP 0x00200000
20612 +
20613 + unsigned long mem, amem, alloced = 0, allocsize;
20614 +
20615 + size += 0x1000;
20616 + allocsize = (size < MAX_GFP) ? size : MAX_GFP;
20617 +
20618 + /* Get first chunk */
20619 + mem = (unsigned long )
20620 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
20621 + if (mem != 0) alloced = allocsize;
20622 +
20623 + /* Get remaining, contiguous chunks */
20624 + while (alloced < size)
20625 + {
20626 + amem = (unsigned long )
20627 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
20628 + if (amem != 0)
20629 + alloced += allocsize;
20630 +
20631 + /* check for contiguous mem alloced */
20632 + if ((amem == 0) || (amem + allocsize) != mem)
20633 + break;
20634 + else
20635 + mem = amem;
20636 + }
20637 + return mem;
20638 +}
20639 +
20640 +int __init au1200fb_init(void)
20641 +{
20642 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
20643 + struct au1200fb_info *fb_info;
20644 + struct display *disp;
20645 + struct au1200fb_par *par;
20646 + unsigned long page;
20647 + int plane, bpp;
20648 +
20649 + /*
20650 + * Get the panel information/display mode
20651 + */
20652 + if (panel_index < 0)
20653 + panel_index = board_au1200fb_panel();
20654 + if ((panel_index < 0) || (panel_index >= num_panels)) {
20655 + printk("ERROR: INVALID PANEL %d\n", panel_index);
20656 + return -EINVAL;
20657 + }
20658 + panel = &panels[panel_index];
20659 + win = &windows[window_index];
20660 +
20661 + printk("au1200fb: Panel %d %s\n", panel_index, panel->name);
20662 + printk("au1200fb: Win %d %s\n", window_index, win->name);
20663 +
20664 + /* Global setup/init */
20665 + au1200_setpanel(panel);
20666 + lcd->intenable = 0;
20667 + lcd->intstatus = ~0;
20668 + lcd->backcolor = win->mode_backcolor;
20669 + lcd->winenable = 0;
20670 +
20671 + /* Setup Color Key - FIX!!! */
20672 + lcd->colorkey = win->mode_colorkey;
20673 + lcd->colorkeymsk = win->mode_colorkeymsk;
20674 +
20675 + /* Setup HWCursor - FIX!!! Need to support this eventually */
20676 + lcd->hwc.cursorctrl = 0;
20677 + lcd->hwc.cursorpos = 0;
20678 + lcd->hwc.cursorcolor0 = 0;
20679 + lcd->hwc.cursorcolor1 = 0;
20680 + lcd->hwc.cursorcolor2 = 0;
20681 + lcd->hwc.cursorcolor3 = 0;
20682 +
20683 + /* Register each plane as a frame buffer device */
20684 + for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
20685 + {
20686 + fb_info = &fb_infos[plane];
20687 + disp = &disps[plane];
20688 + par = &fb_pars[plane];
20689 +
20690 + bpp = winbpp(win->w[plane].mode_winctrl1);
20691 + if (win->w[plane].xres == 0)
20692 + win->w[plane].xres = panel->Xres;
20693 + if (win->w[plane].yres == 0)
20694 + win->w[plane].yres = panel->Yres;
20695 +
20696 + par->var.xres =
20697 + par->var.xres_virtual = win->w[plane].xres;
20698 + par->var.yres =
20699 + par->var.yres_virtual = win->w[plane].yres;
20700 + par->var.bits_per_pixel = bpp;
20701 + par->line_length = win->w[plane].xres * bpp / 8; /* in bytes */
20702 + /*
20703 + * Allocate LCD framebuffer from system memory
20704 + * Set page reserved so that mmap will work. This is necessary
20705 + * since we'll be remapping normal memory.
20706 + */
20707 + fb_info->fb_size = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
20708 + fb_info->fb_virt_start = au1200fb_alloc_fbmem(fb_info->fb_size);
20709 + if (!fb_info->fb_virt_start) {
20710 + printk("Unable to allocate fb memory\n");
20711 + return -ENOMEM;
20712 + }
20713 + fb_info->fb_phys = virt_to_bus((void *)fb_info->fb_virt_start);
20714 + for (page = fb_info->fb_virt_start;
20715 + page < PAGE_ALIGN(fb_info->fb_virt_start + fb_info->fb_size);
20716 + page += PAGE_SIZE) {
20717 + SetPageReserved(virt_to_page(page));
20718 + }
20719 + /* Convert to kseg1 */
20720 + fb_info->fb_virt_start =
20721 + (void *)((u32)fb_info->fb_virt_start | 0xA0000000);
20722 + /* FIX!!! may wish to avoid this to save startup time??? */
20723 + memset((void *)fb_info->fb_virt_start, 0, fb_info->fb_size);
20724 +
20725 + fb_info->gen.parsize = sizeof(struct au1200fb_par);
20726 + fb_info->gen.fbhw = &au1200_switch;
20727 + strcpy(fb_info->gen.info.modename, "Au1200 LCD");
20728 + fb_info->gen.info.changevar = NULL;
20729 + fb_info->gen.info.node = -1;
20730 +
20731 + fb_info->gen.info.fbops = &au1200fb_ops;
20732 + fb_info->gen.info.disp = disp;
20733 + fb_info->gen.info.switch_con = &fbgen_switch;
20734 + fb_info->gen.info.updatevar = &fbgen_update_var;
20735 + fb_info->gen.info.blank = &fbgen_blank;
20736 + fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
20737 +
20738 + fb_info->nohwcursor = 1;
20739 + fb_info->noblanking = 1;
20740 +
20741 + /* This should give a reasonable default video mode */
20742 + fbgen_get_var(&disp->var, -1, &fb_info->gen.info);
20743 + fbgen_do_set_var(&disp->var, 1, &fb_info->gen);
20744 + fbgen_set_disp(-1, &fb_info->gen);
20745 + fbgen_install_cmap(0, &fb_info->gen);
20746 +
20747 + /* Turn on plane */
20748 + au1200_setmode(plane);
20749 +
20750 + if (register_framebuffer(&fb_info->gen.info) < 0)
20751 + return -EINVAL;
20752 +
20753 + printk(KERN_INFO "fb%d: %s plane %d @ %08X (%d x %d x %d)\n",
20754 + GET_FB_IDX(fb_info->gen.info.node),
20755 + fb_info->gen.info.modename, plane, fb_info->fb_phys,
20756 + win->w[plane].xres, win->w[plane].yres, bpp);
20757 + }
20758 + /* uncomment this if your driver cannot be unloaded */
20759 + /* MOD_INC_USE_COUNT; */
20760 + return 0;
20761 +}
20762 +
20763 +void au1200fb_setup(char *options, int *ints)
20764 +{
20765 + char* this_opt;
20766 + int i;
20767 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
20768 +
20769 + if (!options || !*options)
20770 + return;
20771 +
20772 + for(this_opt=strtok(options, ","); this_opt;
20773 + this_opt=strtok(NULL, ",")) {
20774 + if (!strncmp(this_opt, "panel:", 6)) {
20775 + int i;
20776 + long int li;
20777 + char *endptr;
20778 + this_opt += 6;
20779 +
20780 + /* Panel name can be name, "bs" for board-switch, or number/index */
20781 + li = simple_strtol(this_opt, &endptr, 0);
20782 + if (*endptr == '\0') {
20783 + panel_index = (int)li;
20784 + }
20785 + else if (strcmp(this_opt, "bs") == 0) {
20786 + panel_index = board_au1200fb_panel();
20787 + }
20788 + else
20789 + for (i=0; i<num_panels; i++) {
20790 + if (!strcmp(this_opt, panels[i].name)) {
20791 + panel_index = i;
20792 + break;
20793 + }
20794 + }
20795 + }
20796 + else if (!strncmp(this_opt, "nohwcursor", 10)) {
20797 + printk("nohwcursor\n");
20798 + fb_infos[0].nohwcursor = 1;
20799 + }
20800 + }
20801 +
20802 + printk("au1200fb: Panel %d %s\n", panel_index,
20803 + panels[panel_index].name);
20804 +}
20805 +
20806 +
20807 +
20808 +#ifdef MODULE
20809 +MODULE_LICENSE("GPL");
20810 +MODULE_DESCRIPTION("Au1200 LCD framebuffer driver");
20811 +
20812 +void au1200fb_cleanup(struct fb_info *info)
20813 +{
20814 + unregister_framebuffer(info);
20815 +}
20816 +
20817 +module_init(au1200fb_init);
20818 +module_exit(au1200fb_cleanup);
20819 +#endif /* MODULE */
20820 +
20821 +
20822 diff -Nur linux-2.4.29/drivers/video/au1200fb.h linux-mips/drivers/video/au1200fb.h
20823 --- linux-2.4.29/drivers/video/au1200fb.h 1970-01-01 01:00:00.000000000 +0100
20824 +++ linux-mips/drivers/video/au1200fb.h 2005-02-11 22:16:44.000000000 +0100
20825 @@ -0,0 +1,288 @@
20826 +/*
20827 + * BRIEF MODULE DESCRIPTION
20828 + * Hardware definitions for the Au1200 LCD controller
20829 + *
20830 + * Copyright 2004 AMD
20831 + * Author: AMD
20832 + *
20833 + * This program is free software; you can redistribute it and/or modify it
20834 + * under the terms of the GNU General Public License as published by the
20835 + * Free Software Foundation; either version 2 of the License, or (at your
20836 + * option) any later version.
20837 + *
20838 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
20839 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20840 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20841 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20842 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20843 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20844 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20845 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20846 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20847 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20848 + *
20849 + * You should have received a copy of the GNU General Public License along
20850 + * with this program; if not, write to the Free Software Foundation, Inc.,
20851 + * 675 Mass Ave, Cambridge, MA 02139, USA.
20852 + */
20853 +
20854 +#ifndef _AU1200LCD_H
20855 +#define _AU1200LCD_H
20856 +
20857 +/********************************************************************/
20858 +#define AU1200_LCD_ADDR 0xB5000000
20859 +
20860 +#define uint8 unsigned char
20861 +#define uint32 unsigned int
20862 +
20863 +typedef volatile struct
20864 +{
20865 + uint32 reserved0;
20866 + uint32 screen;
20867 + uint32 backcolor;
20868 + uint32 horztiming;
20869 + uint32 verttiming;
20870 + uint32 clkcontrol;
20871 + uint32 pwmdiv;
20872 + uint32 pwmhi;
20873 + uint32 reserved1;
20874 + uint32 winenable;
20875 + uint32 colorkey;
20876 + uint32 colorkeymsk;
20877 + struct
20878 + {
20879 + uint32 cursorctrl;
20880 + uint32 cursorpos;
20881 + uint32 cursorcolor0;
20882 + uint32 cursorcolor1;
20883 + uint32 cursorcolor2;
20884 + uint32 cursorcolor3;
20885 + } hwc;
20886 + uint32 intstatus;
20887 + uint32 intenable;
20888 + uint32 outmask;
20889 + uint32 fifoctrl;
20890 + uint32 reserved2[(0x0100-0x0058)/4];
20891 + struct
20892 + {
20893 + uint32 winctrl0;
20894 + uint32 winctrl1;
20895 + uint32 winctrl2;
20896 + uint32 winbuf0;
20897 + uint32 winbuf1;
20898 + uint32 winbufctrl;
20899 + uint32 winreserved0;
20900 + uint32 winreserved1;
20901 + } window[4];
20902 +
20903 + uint32 reserved3[(0x0400-0x0180)/4];
20904 +
20905 + uint32 palette[(0x0800-0x0400)/4];
20906 +
20907 + uint8 cursorpattern[256];
20908 +
20909 +} AU1200_LCD;
20910 +
20911 +/* lcd_screen */
20912 +#define LCD_SCREEN_SEN (1<<31)
20913 +#define LCD_SCREEN_SX (0x07FF<<19)
20914 +#define LCD_SCREEN_SY (0x07FF<< 8)
20915 +#define LCD_SCREEN_SWP (1<<7)
20916 +#define LCD_SCREEN_SWD (1<<6)
20917 +#define LCD_SCREEN_ST (7<<0)
20918 +#define LCD_SCREEN_ST_TFT (0<<0)
20919 +#define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
20920 +#define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
20921 +#define LCD_SCREEN_ST_CSTN (1<<0)
20922 +#define LCD_SCREEN_ST_CDSTN (2<<0)
20923 +#define LCD_SCREEN_ST_M8STN (3<<0)
20924 +#define LCD_SCREEN_ST_M4STN (4<<0)
20925 +
20926 +/* lcd_backcolor */
20927 +#define LCD_BACKCOLOR_SBGR (0xFF<<16)
20928 +#define LCD_BACKCOLOR_SBGG (0xFF<<8)
20929 +#define LCD_BACKCOLOR_SBGB (0xFF<<0)
20930 +#define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16)
20931 +#define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8)
20932 +#define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0)
20933 +
20934 +/* lcd_winenable */
20935 +#define LCD_WINENABLE_WEN3 (1<<3)
20936 +#define LCD_WINENABLE_WEN2 (1<<2)
20937 +#define LCD_WINENABLE_WEN1 (1<<1)
20938 +#define LCD_WINENABLE_WEN0 (1<<0)
20939 +
20940 +/* lcd_colorkey */
20941 +#define LCD_COLORKEY_CKR (0xFF<<16)
20942 +#define LCD_COLORKEY_CKG (0xFF<<8)
20943 +#define LCD_COLORKEY_CKB (0xFF<<0)
20944 +#define LCD_COLORKEY_CKR_N(N) ((N)<<16)
20945 +#define LCD_COLORKEY_CKG_N(N) ((N)<<8)
20946 +#define LCD_COLORKEY_CKB_N(N) ((N)<<0)
20947 +
20948 +/* lcd_colorkeymsk */
20949 +#define LCD_COLORKEYMSK_CKMR (0xFF<<16)
20950 +#define LCD_COLORKEYMSK_CKMG (0xFF<<8)
20951 +#define LCD_COLORKEYMSK_CKMB (0xFF<<0)
20952 +#define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16)
20953 +#define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8)
20954 +#define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0)
20955 +
20956 +/* lcd windows control 0 */
20957 +#define LCD_WINCTRL0_OX (0x07FF<<21)
20958 +#define LCD_WINCTRL0_OY (0x07FF<<10)
20959 +#define LCD_WINCTRL0_A (0x00FF<<2)
20960 +#define LCD_WINCTRL0_AEN (1<<1)
20961 +#define LCD_WINCTRL0_OX_N(N) ((N)<<21)
20962 +#define LCD_WINCTRL0_OY_N(N) ((N)<<10)
20963 +#define LCD_WINCTRL0_A_N(N) ((N)<<2)
20964 +
20965 +/* lcd windows control 1 */
20966 +#define LCD_WINCTRL1_PRI (3<<30)
20967 +#define LCD_WINCTRL1_PIPE (1<<29)
20968 +#define LCD_WINCTRL1_FRM (0xF<<25)
20969 +#define LCD_WINCTRL1_CCO (1<<24)
20970 +#define LCD_WINCTRL1_PO (3<<22)
20971 +#define LCD_WINCTRL1_SZX (0x07FF<<11)
20972 +#define LCD_WINCTRL1_SZY (0x07FF<<0)
20973 +#define LCD_WINCTRL1_FRM_1BPP (0<<25)
20974 +#define LCD_WINCTRL1_FRM_2BPP (1<<25)
20975 +#define LCD_WINCTRL1_FRM_4BPP (2<<25)
20976 +#define LCD_WINCTRL1_FRM_8BPP (3<<25)
20977 +#define LCD_WINCTRL1_FRM_12BPP (4<<25)
20978 +#define LCD_WINCTRL1_FRM_16BPP655 (5<<25)
20979 +#define LCD_WINCTRL1_FRM_16BPP565 (6<<25)
20980 +#define LCD_WINCTRL1_FRM_16BPP556 (7<<25)
20981 +#define LCD_WINCTRL1_FRM_16BPPI1555 (8<<25)
20982 +#define LCD_WINCTRL1_FRM_16BPPI5551 (9<<25)
20983 +#define LCD_WINCTRL1_FRM_16BPPA1555 (10<<25)
20984 +#define LCD_WINCTRL1_FRM_16BPPA5551 (11<<25)
20985 +#define LCD_WINCTRL1_FRM_24BPP (12<<25)
20986 +#define LCD_WINCTRL1_FRM_32BPP (13<<25)
20987 +#define LCD_WINCTRL1_PRI_N(N) ((N)<<30)
20988 +#define LCD_WINCTRL1_PO_00 (0<<22)
20989 +#define LCD_WINCTRL1_PO_01 (1<<22)
20990 +#define LCD_WINCTRL1_PO_10 (2<<22)
20991 +#define LCD_WINCTRL1_PO_11 (3<<22)
20992 +#define LCD_WINCTRL1_SZX_N(N) ((N-1)<<11)
20993 +#define LCD_WINCTRL1_SZY_N(N) ((N-1)<<0)
20994 +
20995 +/* lcd windows control 2 */
20996 +#define LCD_WINCTRL2_CKMODE (3<<24)
20997 +#define LCD_WINCTRL2_DBM (1<<23)
20998 +#define LCD_WINCTRL2_RAM (3<<21)
20999 +#define LCD_WINCTRL2_BX (0x1FFF<<8)
21000 +#define LCD_WINCTRL2_SCX (0xF<<4)
21001 +#define LCD_WINCTRL2_SCY (0xF<<0)
21002 +#define LCD_WINCTRL2_CKMODE_00 (0<<24)
21003 +#define LCD_WINCTRL2_CKMODE_01 (1<<24)
21004 +#define LCD_WINCTRL2_CKMODE_10 (2<<24)
21005 +#define LCD_WINCTRL2_CKMODE_11 (3<<24)
21006 +#define LCD_WINCTRL2_RAM_NONE (0<<21)
21007 +#define LCD_WINCTRL2_RAM_PALETTE (1<<21)
21008 +#define LCD_WINCTRL2_RAM_GAMMA (2<<21)
21009 +#define LCD_WINCTRL2_RAM_BUFFER (3<<21)
21010 +#define LCD_WINCTRL2_BX_N(N) ((N)<<8)
21011 +#define LCD_WINCTRL2_SCX_1 (0<<4)
21012 +#define LCD_WINCTRL2_SCX_2 (1<<4)
21013 +#define LCD_WINCTRL2_SCX_4 (2<<4)
21014 +#define LCD_WINCTRL2_SCY_1 (0<<0)
21015 +#define LCD_WINCTRL2_SCY_2 (1<<0)
21016 +#define LCD_WINCTRL2_SCY_4 (2<<0)
21017 +
21018 +/* lcd windows buffer control */
21019 +#define LCD_WINBUFCTRL_DB (1<<1)
21020 +#define LCD_WINBUFCTRL_DBN (1<<0)
21021 +
21022 +/* lcd_intstatus, lcd_intenable */
21023 +#define LCD_INT_IFO (0xF<<14)
21024 +#define LCD_INT_IFU (0xF<<10)
21025 +#define LCD_INT_OFO (1<<9)
21026 +#define LCD_INT_OFU (1<<8)
21027 +#define LCD_INT_WAIT (1<<3)
21028 +#define LCD_INT_SD (1<<2)
21029 +#define LCD_INT_SA (1<<1)
21030 +#define LCD_INT_SS (1<<0)
21031 +
21032 +/* lcd_horztiming */
21033 +#define LCD_HORZTIMING_HND2 (0x1FF<<18)
21034 +#define LCD_HORZTIMING_HND1 (0x1FF<<9)
21035 +#define LCD_HORZTIMING_HPW (0x1FF<<0)
21036 +#define LCD_HORZTIMING_HND2_N(N)(((N)-1)<<18)
21037 +#define LCD_HORZTIMING_HND1_N(N)(((N)-1)<<9)
21038 +#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<0)
21039 +
21040 +/* lcd_verttiming */
21041 +#define LCD_VERTTIMING_VND2 (0x1FF<<18)
21042 +#define LCD_VERTTIMING_VND1 (0x1FF<<9)
21043 +#define LCD_VERTTIMING_VPW (0x1FF<<0)
21044 +#define LCD_VERTTIMING_VND2_N(N)(((N)-1)<<18)
21045 +#define LCD_VERTTIMING_VND1_N(N)(((N)-1)<<9)
21046 +#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<0)
21047 +
21048 +/* lcd_clkcontrol */
21049 +#define LCD_CLKCONTROL_EXT (1<<22)
21050 +#define LCD_CLKCONTROL_DELAY (3<<20)
21051 +#define LCD_CLKCONTROL_CDD (1<<19)
21052 +#define LCD_CLKCONTROL_IB (1<<18)
21053 +#define LCD_CLKCONTROL_IC (1<<17)
21054 +#define LCD_CLKCONTROL_IH (1<<16)
21055 +#define LCD_CLKCONTROL_IV (1<<15)
21056 +#define LCD_CLKCONTROL_BF (0x1F<<10)
21057 +#define LCD_CLKCONTROL_PCD (0x3FF<<0)
21058 +#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
21059 +#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
21060 +
21061 +/* lcd_pwmdiv */
21062 +#define LCD_PWMDIV_EN (1<<31)
21063 +#define LCD_PWMDIV_PWMDIV (0x1FFFF<<0)
21064 +#define LCD_PWMDIV_PWMDIV_N(N) ((N)<<0)
21065 +
21066 +/* lcd_pwmhi */
21067 +#define LCD_PWMHI_PWMHI1 (0xFFFF<<16)
21068 +#define LCD_PWMHI_PWMHI0 (0xFFFF<<0)
21069 +#define LCD_PWMHI_PWMHI1_N(N) ((N)<<16)
21070 +#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
21071 +
21072 +/* lcd_hwccon */
21073 +#define LCD_HWCCON_EN (1<<0)
21074 +
21075 +/* lcd_cursorpos */
21076 +#define LCD_CURSORPOS_HWCXOFF (0x1F<<27)
21077 +#define LCD_CURSORPOS_HWCXPOS (0x07FF<<16)
21078 +#define LCD_CURSORPOS_HWCYOFF (0x1F<<11)
21079 +#define LCD_CURSORPOS_HWCYPOS (0x07FF<<0)
21080 +#define LCD_CURSORPOS_HWCXOFF_N(N) ((N)<<27)
21081 +#define LCD_CURSORPOS_HWCXPOS_N(N) ((N)<<16)
21082 +#define LCD_CURSORPOS_HWCYOFF_N(N) ((N)<<11)
21083 +#define LCD_CURSORPOS_HWCYPOS_N(N) ((N)<<0)
21084 +
21085 +/* lcd_cursorcolor */
21086 +#define LCD_CURSORCOLOR_HWCA (0xFF<<24)
21087 +#define LCD_CURSORCOLOR_HWCR (0xFF<<16)
21088 +#define LCD_CURSORCOLOR_HWCG (0xFF<<8)
21089 +#define LCD_CURSORCOLOR_HWCB (0xFF<<0)
21090 +#define LCD_CURSORCOLOR_HWCA_N(N) ((N)<<24)
21091 +#define LCD_CURSORCOLOR_HWCR_N(N) ((N)<<16)
21092 +#define LCD_CURSORCOLOR_HWCG_N(N) ((N)<<8)
21093 +#define LCD_CURSORCOLOR_HWCB_N(N) ((N)<<0)
21094 +
21095 +/* lcd_fifoctrl */
21096 +#define LCD_FIFOCTRL_F3IF (1<<29)
21097 +#define LCD_FIFOCTRL_F3REQ (0x1F<<24)
21098 +#define LCD_FIFOCTRL_F2IF (1<<29)
21099 +#define LCD_FIFOCTRL_F2REQ (0x1F<<16)
21100 +#define LCD_FIFOCTRL_F1IF (1<<29)
21101 +#define LCD_FIFOCTRL_F1REQ (0x1F<<8)
21102 +#define LCD_FIFOCTRL_F0IF (1<<29)
21103 +#define LCD_FIFOCTRL_F0REQ (0x1F<<0)
21104 +#define LCD_FIFOCTRL_F3REQ_N(N) ((N-1)<<24)
21105 +#define LCD_FIFOCTRL_F2REQ_N(N) ((N-1)<<16)
21106 +#define LCD_FIFOCTRL_F1REQ_N(N) ((N-1)<<8)
21107 +#define LCD_FIFOCTRL_F0REQ_N(N) ((N-1)<<0)
21108 +
21109 +/* lcd_outmask */
21110 +#define LCD_OUTMASK_MASK (0x00FFFFFF)
21111 +
21112 +/********************************************************************/
21113 +#endif /* _AU1200LCD_H */
21114 diff -Nur linux-2.4.29/drivers/video/Config.in linux-mips/drivers/video/Config.in
21115 --- linux-2.4.29/drivers/video/Config.in 2004-02-18 14:36:31.000000000 +0100
21116 +++ linux-mips/drivers/video/Config.in 2005-02-11 22:16:44.000000000 +0100
21117 @@ -87,8 +87,8 @@
21118 if [ "$CONFIG_HP300" = "y" ]; then
21119 define_bool CONFIG_FB_HP300 y
21120 fi
21121 - if [ "$ARCH" = "alpha" ]; then
21122 - tristate ' TGA framebuffer support' CONFIG_FB_TGA
21123 + if [ "$ARCH" = "alpha" -o "$CONFIG_TC" = "y" ]; then
21124 + tristate ' TGA/SFB+ framebuffer support' CONFIG_FB_TGA
21125 fi
21126 if [ "$CONFIG_X86" = "y" ]; then
21127 bool ' VESA VGA graphics console' CONFIG_FB_VESA
21128 @@ -121,6 +121,17 @@
21129 hex ' Framebuffer Base Address' CONFIG_E1355_FB_BASE a8200000
21130 fi
21131 fi
21132 + if [ "$CONFIG_SOC_AU1100" = "y" ]; then
21133 + bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
21134 + fi
21135 +
21136 + if [ "$CONFIG_SOC_AU1200" = "y" ]; then
21137 + bool ' Au1200 LCD Driver' CONFIG_FB_AU1200
21138 + if [ "$CONFIG_FB_AU1200" = "y" ]; then
21139 + int ' Number of planes (1 to 4)' CONFIG_FB_AU1200_DEVS 1
21140 + fi
21141 + fi
21142 +
21143 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
21144 if [ "$CONFIG_PCI" != "n" ]; then
21145 tristate ' Matrox acceleration (EXPERIMENTAL)' CONFIG_FB_MATROX
21146 @@ -178,9 +189,6 @@
21147 bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
21148 bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
21149 fi
21150 - if [ "$CONFIG_SOC_AU1100" = "y" ]; then
21151 - bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
21152 - fi
21153 fi
21154 fi
21155 fi
21156 diff -Nur linux-2.4.29/drivers/video/fbmem.c linux-mips/drivers/video/fbmem.c
21157 --- linux-2.4.29/drivers/video/fbmem.c 2005-01-19 15:10:09.000000000 +0100
21158 +++ linux-mips/drivers/video/fbmem.c 2005-02-11 22:16:44.000000000 +0100
21159 @@ -139,6 +139,8 @@
21160 extern int e1356fb_setup(char*);
21161 extern int au1100fb_init(void);
21162 extern int au1100fb_setup(char*);
21163 +extern int au1200fb_init(void);
21164 +extern int au1200fb_setup(char*);
21165 extern int pvr2fb_init(void);
21166 extern int pvr2fb_setup(char*);
21167 extern int sstfb_init(void);
21168 @@ -331,6 +333,9 @@
21169 #ifdef CONFIG_FB_AU1100
21170 { "au1100fb", au1100fb_init, au1100fb_setup },
21171 #endif
21172 +#ifdef CONFIG_FB_AU1200
21173 + { "au1200fb", au1200fb_init, au1200fb_setup },
21174 +#endif
21175 #ifdef CONFIG_FB_IT8181
21176 { "it8181fb", it8181fb_init, it8181fb_setup },
21177 #endif
21178 diff -Nur linux-2.4.29/drivers/video/ims332.h linux-mips/drivers/video/ims332.h
21179 --- linux-2.4.29/drivers/video/ims332.h 1970-01-01 01:00:00.000000000 +0100
21180 +++ linux-mips/drivers/video/ims332.h 2003-12-22 17:02:20.000000000 +0100
21181 @@ -0,0 +1,275 @@
21182 +/*
21183 + * linux/drivers/video/ims332.h
21184 + *
21185 + * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
21186 + *
21187 + * This file is subject to the terms and conditions of the GNU General
21188 + * Public License. See the file COPYING in the main directory of this
21189 + * archive for more details.
21190 + */
21191 +#include <linux/types.h>
21192 +
21193 +/*
21194 + * IMS332 16-bit wide, 128-bit aligned registers.
21195 + */
21196 +struct _ims332_reg {
21197 + volatile u16 r;
21198 + u16 pad[7];
21199 +};
21200 +
21201 +struct _ims332_regs {
21202 +#define IMS332_BOOT_PLL_MUTLIPLIER 0x00001f
21203 +#define IMS332_BOOT_CLOCK_SOURCE_SEL 0x000020
21204 +#define IMS332_BOOT_ADDRESS_ALIGNMENT 0x000040
21205 +#define IMS332_BOOT_WRITE_ZERO 0xffff80
21206 + struct _ims332_reg boot;
21207 + struct _ims332_reg pad0[0x020 - 0x000];
21208 + struct _ims332_reg half_sync;
21209 + struct _ims332_reg back_porch;
21210 + struct _ims332_reg display;
21211 + struct _ims332_reg short_display;
21212 + struct _ims332_reg broad_pulse;
21213 + struct _ims332_reg vsync;
21214 + struct _ims332_reg vpre_equalise;
21215 + struct _ims332_reg vpost_equalise;
21216 + struct _ims332_reg vblank;
21217 + struct _ims332_reg vdisplay;
21218 + struct _ims332_reg line_time;
21219 + struct _ims332_reg line_start;
21220 + struct _ims332_reg mem_init;
21221 + struct _ims332_reg transfer_delay;
21222 + struct _ims332_reg pad1[0x03f - 0x02e];
21223 + struct _ims332_reg pixel_address_mask;
21224 + struct _ims332_reg pad2[0x05f - 0x040];
21225 +
21226 +#define IMS332_CTRL_A_BOOT_ENABLE_VTG 0x000001
21227 +#define IMS332_CTRL_A_SCREEN_FORMAT 0x000002
21228 +#define IMS332_CTRL_A_INTERLACED_STANDARD 0x000004
21229 +#define IMS332_CTRL_A_OPERATING_MODE 0x000008
21230 +#define IMS332_CTRL_A_FRAME_FLYBACK_PATTERN 0x000010
21231 +#define IMS332_CTRL_A_DIGITAL_SYNC_FORMAT 0x000020
21232 +#define IMS332_CTRL_A_ANALOGUE_VIDEO_FORMAT 0x000040
21233 +#define IMS332_CTRL_A_BLANK_LEVEL 0x000080
21234 +#define IMS332_CTRL_A_BLANK_IO 0x000100
21235 +#define IMS332_CTRL_A_BLANK_FUNCTION_SWITCH 0x000200
21236 +#define IMS332_CTRL_A_FORCE_BLANKING 0x000400
21237 +#define IMS332_CTRL_A_TURN_OFF_BLANKING 0x000800
21238 +#define IMS332_CTRL_A_VRAM_ADDRESS_INCREMENT 0x003000
21239 +#define IMS332_CTRL_A_TURN_OFF_DMA 0x004000
21240 +#define IMS332_CTRL_A_SYNC_DELAY 0x038000
21241 +#define IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING 0x040000
21242 +#define IMS332_CTRL_A_DELAYED_SAMPLING 0x080000
21243 +#define IMS332_CTRL_A_BITS_PER_PIXEL 0x700000
21244 +#define IMS332_CTRL_A_CURSOR_DISABLE 0x800000
21245 + struct _ims332_reg config_control_a;
21246 + struct _ims332_reg pad3[0x06f - 0x060];
21247 +
21248 +#define IMS332_CTRL_B_WRITE_ZERO 0xffffff
21249 + struct _ims332_reg config_control_b;
21250 + struct _ims332_reg pad4[0x07f - 0x070];
21251 + struct _ims332_reg screen_top;
21252 + struct _ims332_reg pad5[0x0a0 - 0x080];
21253 + /* cursor color palette, 3 entries, reg no. 0xa1 - 0xa3 */
21254 + struct _ims332_reg cursor_color_palette0;
21255 + struct _ims332_reg cursor_color_palette1;
21256 + struct _ims332_reg cursor_color_palette2;
21257 + struct _ims332_reg pad6[0x0bf - 0x0a3];
21258 + struct _ims332_reg rgb_frame_checksum0;
21259 + struct _ims332_reg rgb_frame_checksum1;
21260 + struct _ims332_reg rgb_frame_checksum2;
21261 + struct _ims332_reg pad7[0x0c6 - 0x0c2];
21262 + struct _ims332_reg cursor_start;
21263 + struct _ims332_reg pad8[0x0ff - 0x0c7];
21264 + /* color palette, 256 entries of form 0x00BBGGRR, reg no. 0x100 - 0x1ff */
21265 + struct _ims332_reg color_palette[0x1ff - 0x0ff];
21266 + /* hardware cursor bitmap, reg no. 0x200 - 0x3ff */
21267 + struct _ims332_reg cursor_ram[0x3ff - 0x1ff];
21268 +};
21269 +
21270 +/*
21271 + * In the functions below we use some weird looking helper variables to
21272 + * access most members of this struct, otherwise the compiler splits
21273 + * the read/write in two byte accesses.
21274 + */
21275 +struct ims332_regs {
21276 + struct _ims332_regs rw;
21277 + char pad0[0x80000 - sizeof (struct _ims332_regs)];
21278 + struct _ims332_regs r;
21279 + char pad1[0xa0000 - (sizeof (struct _ims332_regs) + 0x80000)];
21280 + struct _ims332_regs w;
21281 +} __attribute__((packed));
21282 +
21283 +static inline void ims332_control_reg_bits(struct ims332_regs *regs, u32 mask,
21284 + u32 val)
21285 +{
21286 + volatile u16 *ctr = &(regs->r.config_control_a.r);
21287 + volatile u16 *ctw = &(regs->w.config_control_a.r);
21288 + u32 ctrl;
21289 +
21290 + mb();
21291 + ctrl = *ctr;
21292 + rmb();
21293 + ctrl |= ((regs->rw.boot.r << 8) & 0x00ff0000);
21294 + ctrl |= val & mask;
21295 + ctrl &= ~(~val & mask);
21296 + wmb();
21297 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
21298 + wmb();
21299 + *ctw = ctrl & 0xffff;
21300 +}
21301 +
21302 +/* FIXME: This is maxinefb specific. */
21303 +static inline void ims332_bootstrap(struct ims332_regs *regs)
21304 +{
21305 + volatile u16 *ctw = &(regs->w.config_control_a.r);
21306 + u32 ctrl = IMS332_CTRL_A_BOOT_ENABLE_VTG | IMS332_CTRL_A_TURN_OFF_DMA;
21307 +
21308 + /* bootstrap sequence */
21309 + mb();
21310 + regs->rw.boot.r = 0;
21311 + wmb();
21312 + *ctw = 0;
21313 +
21314 + /* init control A register */
21315 + wmb();
21316 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
21317 + wmb();
21318 + *ctw = ctrl & 0xffff;
21319 +}
21320 +
21321 +static inline void ims332_blank_screen(struct ims332_regs *regs, int blank)
21322 +{
21323 + ims332_control_reg_bits(regs, IMS332_CTRL_A_FORCE_BLANKING,
21324 + blank ? IMS332_CTRL_A_FORCE_BLANKING : 0);
21325 +}
21326 +
21327 +static inline void ims332_set_color_depth(struct ims332_regs *regs, u32 depth)
21328 +{
21329 + u32 dp;
21330 + u32 mask = (IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING
21331 + | IMS332_CTRL_A_DELAYED_SAMPLING
21332 + | IMS332_CTRL_A_BITS_PER_PIXEL);
21333 +
21334 + switch (depth) {
21335 + case 1: dp = 0 << 20; break;
21336 + case 2: dp = 1 << 20; break;
21337 + case 4: dp = 2 << 20; break;
21338 + case 8: dp = 3 << 20; break;
21339 + case 15: dp = (4 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
21340 + case 16: dp = (5 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
21341 + default: return;
21342 + }
21343 + ims332_control_reg_bits(regs, mask, dp);
21344 +
21345 + if (depth <= 8) {
21346 + volatile u16 *pmask = &(regs->w.pixel_address_mask.r);
21347 + u32 dm = (1 << depth) - 1;
21348 +
21349 + wmb();
21350 + regs->rw.boot.r = dm << 8;
21351 + wmb();
21352 + *pmask = dm << 8 | dm;
21353 + }
21354 +}
21355 +
21356 +static inline void ims332_set_screen_top(struct ims332_regs *regs, u16 top)
21357 +{
21358 + volatile u16 *st = &(regs->w.screen_top.r);
21359 +
21360 + mb();
21361 + *st = top & 0xffff;
21362 +}
21363 +
21364 +static inline void ims332_enable_cursor(struct ims332_regs *regs, int on)
21365 +{
21366 + ims332_control_reg_bits(regs, IMS332_CTRL_A_CURSOR_DISABLE,
21367 + on ? 0 : IMS332_CTRL_A_CURSOR_DISABLE);
21368 +}
21369 +
21370 +static inline void ims332_position_cursor(struct ims332_regs *regs,
21371 + u16 x, u16 y)
21372 +{
21373 + volatile u16 *cp = &(regs->w.cursor_start.r);
21374 + u32 val = ((x & 0xfff) << 12) | (y & 0xfff);
21375 +
21376 + if (x > 2303 || y > 2303)
21377 + return;
21378 +
21379 + mb();
21380 + regs->rw.boot.r = (val >> 8) & 0xff00;
21381 + wmb();
21382 + *cp = val & 0xffff;
21383 +}
21384 +
21385 +static inline void ims332_set_font(struct ims332_regs *regs, u8 fgc,
21386 + u16 width, u16 height)
21387 +{
21388 + volatile u16 *cp0 = &(regs->w.cursor_color_palette0.r);
21389 + int i;
21390 +
21391 + mb();
21392 + for (i = 0; i < 0x200; i++) {
21393 + volatile u16 *cram = &(regs->w.cursor_ram[i].r);
21394 +
21395 + if (height << 6 <= i << 3)
21396 + *cram = 0x0000;
21397 + else if (width <= i % 8 << 3)
21398 + *cram = 0x0000;
21399 + else if (((width >> 3) & 0xffff) > i % 8)
21400 + *cram = 0x5555;
21401 + else
21402 + *cram = 0x5555 & ~(0xffff << (width % 8 << 1));
21403 + wmb();
21404 + }
21405 + regs->rw.boot.r = fgc << 8;
21406 + wmb();
21407 + *cp0 = fgc << 8 | fgc;
21408 +}
21409 +
21410 +static inline void ims332_read_cmap(struct ims332_regs *regs, u8 reg,
21411 + u8* red, u8* green, u8* blue)
21412 +{
21413 + volatile u16 *rptr = &(regs->r.color_palette[reg].r);
21414 + u16 val;
21415 +
21416 + mb();
21417 + val = *rptr;
21418 + *red = val & 0xff;
21419 + *green = (val >> 8) & 0xff;
21420 + rmb();
21421 + *blue = (regs->rw.boot.r >> 8) & 0xff;
21422 +}
21423 +
21424 +static inline void ims332_write_cmap(struct ims332_regs *regs, u8 reg,
21425 + u8 red, u8 green, u8 blue)
21426 +{
21427 + volatile u16 *wptr = &(regs->w.color_palette[reg].r);
21428 +
21429 + mb();
21430 + regs->rw.boot.r = blue << 8;
21431 + wmb();
21432 + *wptr = (green << 8) + red;
21433 +}
21434 +
21435 +static inline void ims332_dump_regs(struct ims332_regs *regs)
21436 +{
21437 + int i;
21438 +
21439 + printk(__FUNCTION__);
21440 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG, 0);
21441 + for (i = 0; i < 0x100; i++) {
21442 + volatile u16 *cpad = (u16 *)((char *)(&regs->r) + sizeof(struct _ims332_reg) * i);
21443 + u32 val;
21444 +
21445 + val = *cpad;
21446 + rmb();
21447 + val |= regs->rw.boot.r << 8;
21448 + rmb();
21449 + if (! (i % 8))
21450 + printk("\n%02x:", i);
21451 + printk(" %06x", val);
21452 + }
21453 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG,
21454 + IMS332_CTRL_A_BOOT_ENABLE_VTG);
21455 + printk("\n");
21456 +}
21457 diff -Nur linux-2.4.29/drivers/video/Makefile linux-mips/drivers/video/Makefile
21458 --- linux-2.4.29/drivers/video/Makefile 2004-02-18 14:36:31.000000000 +0100
21459 +++ linux-mips/drivers/video/Makefile 2005-02-11 22:16:44.000000000 +0100
21460 @@ -87,6 +87,7 @@
21461 obj-$(CONFIG_FB_MAXINE) += maxinefb.o
21462 obj-$(CONFIG_FB_TX3912) += tx3912fb.o
21463 obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
21464 +obj-$(CONFIG_FB_AU1200) += au1200fb.o fbgen.o
21465 obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
21466
21467 subdir-$(CONFIG_STI_CONSOLE) += sti
21468 diff -Nur linux-2.4.29/drivers/video/maxinefb.h linux-mips/drivers/video/maxinefb.h
21469 --- linux-2.4.29/drivers/video/maxinefb.h 2003-08-25 13:44:42.000000000 +0200
21470 +++ linux-mips/drivers/video/maxinefb.h 1970-01-01 01:00:00.000000000 +0100
21471 @@ -1,38 +0,0 @@
21472 -/*
21473 - * linux/drivers/video/maxinefb.h
21474 - *
21475 - * DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
21476 - * Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
21477 - * This file is subject to the terms and conditions of the GNU General
21478 - * Public License. See the file COPYING in the main directory of this
21479 - * archive for more details.
21480 - */
21481 -
21482 -#include <asm/addrspace.h>
21483 -
21484 -/*
21485 - * IMS332 video controller register base address
21486 - */
21487 -#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)
21488 -
21489 -/*
21490 - * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
21491 - * is 1024x768x8
21492 - */
21493 -#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)
21494 -
21495 -/*
21496 - * The IMS 332 video controller used in the DECstation 5000/xx series
21497 - * uses 32 bits wide registers; the following defines declare the
21498 - * register numbers, to get the real offset, these have to be multiplied
21499 - * by four.
21500 - */
21501 -
21502 -#define IMS332_REG_CURSOR_RAM 0x200 /* hardware cursor bitmap */
21503 -
21504 -/*
21505 - * The color palette entries have the form 0x00BBGGRR
21506 - */
21507 -#define IMS332_REG_COLOR_PALETTE 0x100 /* color palette, 256 entries */
21508 -#define IMS332_REG_CURSOR_COLOR_PALETTE 0x0a1 /* cursor color palette, */
21509 - /* 3 entries */
21510 diff -Nur linux-2.4.29/drivers/video/newport_con.c linux-mips/drivers/video/newport_con.c
21511 --- linux-2.4.29/drivers/video/newport_con.c 2003-08-25 13:44:42.000000000 +0200
21512 +++ linux-mips/drivers/video/newport_con.c 2004-09-23 15:32:29.000000000 +0200
21513 @@ -22,6 +22,7 @@
21514 #include <linux/module.h>
21515 #include <linux/slab.h>
21516
21517 +#include <asm/io.h>
21518 #include <asm/uaccess.h>
21519 #include <asm/system.h>
21520 #include <asm/page.h>
21521 @@ -77,7 +78,7 @@
21522 static inline void newport_render_background(int xstart, int ystart,
21523 int xend, int yend, int ci)
21524 {
21525 - newport_wait();
21526 + newport_wait(npregs);
21527 npregs->set.wrmask = 0xffffffff;
21528 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21529 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21530 @@ -94,7 +95,7 @@
21531 unsigned short i;
21532
21533 for (i = 0; i < 16; i++) {
21534 - newport_bfwait();
21535 + newport_bfwait(npregs);
21536 newport_cmap_setaddr(npregs, color_table[i]);
21537 newport_cmap_setrgb(npregs,
21538 default_red[i],
21539 @@ -107,7 +108,7 @@
21540 unsigned long i;
21541
21542 for (i = 0; i < LINUX_LOGO_COLORS; i++) {
21543 - newport_bfwait();
21544 + newport_bfwait(npregs);
21545 newport_cmap_setaddr(npregs, i + 0x20);
21546 newport_cmap_setrgb(npregs,
21547 linux_logo_red[i],
21548 @@ -115,13 +116,13 @@
21549 linux_logo_blue[i]);
21550 }
21551
21552 - newport_wait();
21553 + newport_wait(npregs);
21554 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21555 NPORT_DMODE0_CHOST);
21556
21557 npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
21558 npregs->set.xyendi = ((newport_xsize - 1) << 16);
21559 - newport_wait();
21560 + newport_wait(npregs);
21561
21562 for (i = 0; i < LOGO_W * LOGO_H; i++)
21563 npregs->go.hostrw0 = linux_logo[i] << 24;
21564 @@ -133,7 +134,7 @@
21565 if (logo_active)
21566 return;
21567
21568 - newport_wait();
21569 + newport_wait(npregs);
21570 npregs->set.wrmask = 0xffffffff;
21571 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21572 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21573 @@ -155,7 +156,7 @@
21574 unsigned short treg;
21575 int i;
21576
21577 - newport_wait();
21578 + newport_wait(npregs);
21579 treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
21580 newport_vc2_set(npregs, VC2_IREG_CONTROL,
21581 (treg | VC2_CTRL_EVIDEO));
21582 @@ -165,7 +166,7 @@
21583 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21584 NPORT_DMODE_W2 | VC2_PROTOCOL);
21585 for (i = 0; i < 128; i++) {
21586 - newport_bfwait();
21587 + newport_bfwait(npregs);
21588 if (i == 92 || i == 94)
21589 npregs->set.dcbdata0.byshort.s1 = 0xff00;
21590 else
21591 @@ -205,7 +206,7 @@
21592 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21593 NPORT_DMODE_W2 | VC2_PROTOCOL);
21594 for (i = 0; i < 128; i++) {
21595 - newport_bfwait();
21596 + newport_bfwait(npregs);
21597 linetable[i] = npregs->set.dcbdata0.byshort.s1;
21598 }
21599
21600 @@ -216,12 +217,12 @@
21601 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21602 NPORT_DMODE_W2 | VC2_PROTOCOL);
21603 do {
21604 - newport_bfwait();
21605 + newport_bfwait(npregs);
21606 treg = npregs->set.dcbdata0.byshort.s1;
21607 if ((treg & 1) == 0)
21608 cols += (treg >> 7) & 0xfe;
21609 if ((treg & 0x80) == 0) {
21610 - newport_bfwait();
21611 + newport_bfwait(npregs);
21612 treg = npregs->set.dcbdata0.byshort.s1;
21613 }
21614 } while ((treg & 0x8000) == 0);
21615 @@ -291,16 +292,16 @@
21616
21617 if (!sgi_gfxaddr)
21618 return NULL;
21619 - npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
21620 + npregs = (struct newport_regs *) /* ioremap cannot fail */
21621 + ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
21622 npregs->cset.config = NPORT_CFG_GD0;
21623
21624 - if (newport_wait()) {
21625 - return NULL;
21626 - }
21627 + if (newport_wait(npregs))
21628 + goto out_unmap;
21629
21630 npregs->set.xstarti = TESTVAL;
21631 if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
21632 - return NULL;
21633 + goto out_unmap;
21634
21635 for (i = 0; i < MAX_NR_CONSOLES; i++)
21636 font_data[i] = FONT_DATA;
21637 @@ -310,6 +311,10 @@
21638 newport_get_screensize();
21639
21640 return "SGI Newport";
21641 +
21642 +out_unmap:
21643 + iounmap((void *)npregs);
21644 + return NULL;
21645 }
21646
21647 static void newport_init(struct vc_data *vc, int init)
21648 @@ -363,7 +368,7 @@
21649 (charattr & 0xf0) >> 4);
21650
21651 /* Set the color and drawing mode. */
21652 - newport_wait();
21653 + newport_wait(npregs);
21654 npregs->set.colori = charattr & 0xf;
21655 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21656 NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
21657 @@ -372,7 +377,7 @@
21658 /* Set coordinates for bitmap operation. */
21659 npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
21660 npregs->set.xyendi = ((xpos + 7) << 16);
21661 - newport_wait();
21662 + newport_wait(npregs);
21663
21664 /* Go, baby, go... */
21665 RENDER(npregs, p);
21666 @@ -396,7 +401,7 @@
21667 xpos + ((count - 1) << 3), ypos,
21668 (charattr & 0xf0) >> 4);
21669
21670 - newport_wait();
21671 + newport_wait(npregs);
21672
21673 /* Set the color and drawing mode. */
21674 npregs->set.colori = charattr & 0xf;
21675 @@ -407,7 +412,7 @@
21676 for (i = 0; i < count; i++, xpos += 8) {
21677 p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
21678
21679 - newport_wait();
21680 + newport_wait(npregs);
21681
21682 /* Set coordinates for bitmap operation. */
21683 npregs->set.xystarti =
21684 @@ -689,7 +694,7 @@
21685 xe = xs;
21686 xs = tmp;
21687 }
21688 - newport_wait();
21689 + newport_wait(npregs);
21690 npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
21691 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21692 | NPORT_DMODE0_STOPY);
21693 @@ -706,35 +711,35 @@
21694 #define DUMMY (void *) newport_dummy
21695
21696 const struct consw newport_con = {
21697 - con_startup: newport_startup,
21698 - con_init: newport_init,
21699 - con_deinit: newport_deinit,
21700 - con_clear: newport_clear,
21701 - con_putc: newport_putc,
21702 - con_putcs: newport_putcs,
21703 - con_cursor: newport_cursor,
21704 - con_scroll: newport_scroll,
21705 - con_bmove: newport_bmove,
21706 - con_switch: newport_switch,
21707 - con_blank: newport_blank,
21708 - con_font_op: newport_font_op,
21709 - con_set_palette: newport_set_palette,
21710 - con_scrolldelta: newport_scrolldelta,
21711 - con_set_origin: DUMMY,
21712 - con_save_screen: DUMMY
21713 + .con_startup = newport_startup,
21714 + .con_init = newport_init,
21715 + .con_deinit = newport_deinit,
21716 + .con_clear = newport_clear,
21717 + .con_putc = newport_putc,
21718 + .con_putcs = newport_putcs,
21719 + .con_cursor = newport_cursor,
21720 + .con_scroll = newport_scroll,
21721 + .con_bmove = newport_bmove,
21722 + .con_switch = newport_switch,
21723 + .con_blank = newport_blank,
21724 + .con_font_op = newport_font_op,
21725 + .con_set_palette = newport_set_palette,
21726 + .con_scrolldelta = newport_scrolldelta,
21727 + .con_set_origin = DUMMY,
21728 + .con_save_screen = DUMMY
21729 };
21730
21731 #ifdef MODULE
21732 static int __init newport_console_init(void)
21733 {
21734 take_over_console(&newport_con, 0, MAX_NR_CONSOLES - 1, 1);
21735 -
21736 return 0;
21737 }
21738
21739 static void __exit newport_console_exit(void)
21740 {
21741 give_up_console(&newport_con);
21742 + iounmap((void *)npregs);
21743 }
21744
21745 module_init(newport_console_init);
21746 diff -Nur linux-2.4.29/drivers/video/tgafb.c linux-mips/drivers/video/tgafb.c
21747 --- linux-2.4.29/drivers/video/tgafb.c 2001-11-14 23:52:20.000000000 +0100
21748 +++ linux-mips/drivers/video/tgafb.c 2004-10-30 01:15:02.000000000 +0200
21749 @@ -45,6 +45,15 @@
21750 #include <linux/console.h>
21751 #include <asm/io.h>
21752
21753 +#ifdef CONFIG_TC
21754 +#include <asm/dec/tc.h>
21755 +#else
21756 +static int search_tc_card(const char *) { return -1; }
21757 +static void claim_tc_card(int) { }
21758 +static void release_tc_card(int) { }
21759 +static unsigned long get_tc_base_addr(int) { return 0; }
21760 +#endif
21761 +
21762 #include <video/fbcon.h>
21763 #include <video/fbcon-cfb8.h>
21764 #include <video/fbcon-cfb32.h>
21765 @@ -84,10 +93,10 @@
21766 };
21767
21768 static unsigned int deep_presets[4] = {
21769 - 0x00014000,
21770 - 0x0001440d,
21771 + 0x00004000,
21772 + 0x0000440d,
21773 0xffffffff,
21774 - 0x0001441d
21775 + 0x0000441d
21776 };
21777
21778 static unsigned int rasterop_presets[4] = {
21779 @@ -131,6 +140,13 @@
21780 0,
21781 FB_VMODE_NONINTERLACED
21782 }},
21783 + { "1280x1024-72", { /* mode #0 of PMAGD boards */
21784 + 1280, 1024, 1280, 1024, 0, 0, 0, 0,
21785 + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
21786 + 0, 0, -1, -1, FB_ACCELF_TEXT, 7692, 232, 32, 34, 3, 160, 3,
21787 + FB_SYNC_ON_GREEN,
21788 + FB_VMODE_NONINTERLACED
21789 + }},
21790 { "800x600-56", {
21791 800, 600, 800, 600, 0, 0, 0, 0,
21792 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
21793 @@ -488,7 +504,8 @@
21794 continue;
21795
21796 mb();
21797 - TGA_WRITE_REG(deep_presets[fb_info.tga_type], TGA_DEEP_REG);
21798 + TGA_WRITE_REG(deep_presets[fb_info.tga_type] |
21799 + (par->sync_on_green ? 0x0 : 0x00010000), TGA_DEEP_REG);
21800 while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
21801 continue;
21802 mb();
21803 @@ -548,7 +565,7 @@
21804 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
21805 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
21806 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2,
21807 - (par->sync_on_green ? 0x80 : 0x40));
21808 + (par->sync_on_green ? 0xc0 : 0x40));
21809
21810 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
21811 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
21812 @@ -921,19 +938,34 @@
21813 int __init tgafb_init(void)
21814 {
21815 struct pci_dev *pdev;
21816 + int slot;
21817
21818 pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
21819 if (!pdev)
21820 + slot = search_tc_card("PMAGD");
21821 + if (!pdev && slot < 0)
21822 return -ENXIO;
21823
21824 /* divine board type */
21825
21826 - fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
21827 - fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
21828 - fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21829 - fb_info.tga_fb_base = (fb_info.tga_mem_base
21830 + if (pdev) {
21831 + fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start,
21832 + 0);
21833 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
21834 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21835 + fb_info.tga_fb_base = (fb_info.tga_mem_base
21836 + fb_offset_presets[fb_info.tga_type]);
21837 - pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
21838 + pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
21839 +
21840 + } else {
21841 + claim_tc_card(slot);
21842 + fb_info.tga_mem_base = get_tc_base_addr(slot);
21843 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f; /* ? */
21844 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21845 + fb_info.tga_fb_base = (fb_info.tga_mem_base
21846 + + fb_offset_presets[fb_info.tga_type]);
21847 + fb_info.tga_chip_rev = TGA_READ_REG(TGA_START_REG) & 0xff;
21848 + }
21849
21850 /* setup framebuffer */
21851
21852 @@ -950,40 +982,62 @@
21853 fb_info.gen.fbhw = &tgafb_hwswitch;
21854 fb_info.gen.fbhw->detect();
21855
21856 - printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
21857 - printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
21858 - pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
21859 + if (pdev) {
21860 + printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
21861 + fb_info.tga_chip_rev);
21862 + printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
21863 + pdev->bus->number,
21864 + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
21865 + } else {
21866 + printk (KERN_INFO "tgafb: SFB+ detected, rev=0x%02x\n",
21867 + fb_info.tga_chip_rev);
21868 + }
21869
21870 switch (fb_info.tga_type)
21871 {
21872 case TGA_TYPE_8PLANE:
21873 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
21874 + if (pdev)
21875 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
21876 + else
21877 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E1");
21878 break;
21879
21880 case TGA_TYPE_24PLANE:
21881 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
21882 + if (pdev)
21883 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
21884 + else
21885 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E2");
21886 break;
21887
21888 case TGA_TYPE_24PLUSZ:
21889 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
21890 + if (pdev)
21891 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
21892 + else
21893 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E3");
21894 break;
21895 }
21896
21897 /* This should give a reasonable default video mode */
21898
21899 if (!default_var_valid) {
21900 - default_var = tgafb_predefined[0].var;
21901 + if (pdev)
21902 + default_var = tgafb_predefined[0].var;
21903 + else
21904 + default_var = tgafb_predefined[1].var;
21905 }
21906 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
21907 disp.var.activate = FB_ACTIVATE_NOW;
21908 fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
21909 fbgen_set_disp(-1, &fb_info.gen);
21910 fbgen_install_cmap(0, &fb_info.gen);
21911 - if (register_framebuffer(&fb_info.gen.info) < 0)
21912 + if (register_framebuffer(&fb_info.gen.info) < 0) {
21913 + if (slot >= 0)
21914 + release_tc_card(slot);
21915 return -EINVAL;
21916 - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
21917 + }
21918 + printk(KERN_INFO "fb%d: %s frame buffer device at 0x%llx\n",
21919 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,
21920 - pdev->resource[0].start);
21921 + fb_info.tga_mem_base);
21922 return 0;
21923 }
21924
21925 diff -Nur linux-2.4.29/drivers/video/tgafb.h linux-mips/drivers/video/tgafb.h
21926 --- linux-2.4.29/drivers/video/tgafb.h 2000-04-12 18:47:28.000000000 +0200
21927 +++ linux-mips/drivers/video/tgafb.h 2004-10-30 01:15:02.000000000 +0200
21928 @@ -36,6 +36,7 @@
21929 #define TGA_RASTEROP_REG 0x0034
21930 #define TGA_PIXELSHIFT_REG 0x0038
21931 #define TGA_DEEP_REG 0x0050
21932 +#define TGA_START_REG 0x0054
21933 #define TGA_PIXELMASK_REG 0x005c
21934 #define TGA_CURSOR_BASE_REG 0x0060
21935 #define TGA_HORIZ_REG 0x0064
21936 diff -Nur linux-2.4.29/fs/binfmt_elf.c linux-mips/fs/binfmt_elf.c
21937 --- linux-2.4.29/fs/binfmt_elf.c 2005-01-19 15:10:10.000000000 +0100
21938 +++ linux-mips/fs/binfmt_elf.c 2005-01-13 11:59:03.000000000 +0100
21939 @@ -660,6 +660,9 @@
21940 bprm->argc++;
21941 }
21942 }
21943 + } else {
21944 + /* Executables without an interpreter also need a personality */
21945 + SET_PERSONALITY(elf_ex, ibcs2_interpreter);
21946 }
21947
21948 /* Flush all traces of the currently running executable */
21949 @@ -1208,7 +1211,11 @@
21950 elf.e_entry = 0;
21951 elf.e_phoff = sizeof(elf);
21952 elf.e_shoff = 0;
21953 +#ifdef ELF_CORE_EFLAGS
21954 + elf.e_flags = ELF_CORE_EFLAGS;
21955 +#else
21956 elf.e_flags = 0;
21957 +#endif
21958 elf.e_ehsize = sizeof(elf);
21959 elf.e_phentsize = sizeof(struct elf_phdr);
21960 elf.e_phnum = segs+1; /* Include notes */
21961 diff -Nur linux-2.4.29/fs/partitions/sgi.c linux-mips/fs/partitions/sgi.c
21962 --- linux-2.4.29/fs/partitions/sgi.c 2001-10-02 05:03:26.000000000 +0200
21963 +++ linux-mips/fs/partitions/sgi.c 2004-08-11 22:30:07.000000000 +0200
21964 @@ -17,6 +17,11 @@
21965 #include "check.h"
21966 #include "sgi.h"
21967
21968 +#if CONFIG_BLK_DEV_MD
21969 +extern void md_autodetect_dev(kdev_t dev);
21970 +#endif
21971 +
21972 +
21973 int sgi_partition(struct gendisk *hd, struct block_device *bdev, unsigned long first_sector, int current_minor)
21974 {
21975 int i, csum, magic;
21976 @@ -77,6 +82,10 @@
21977 if(!blocks)
21978 continue;
21979 add_gd_partition(hd, current_minor, start, blocks);
21980 +#ifdef CONFIG_BLK_DEV_MD
21981 + if (be32_to_cpu(p->type) == LINUX_RAID_PARTITION)
21982 + md_autodetect_dev(MKDEV(hd->major, current_minor));
21983 +#endif
21984 current_minor++;
21985 }
21986 printk("\n");
21987 diff -Nur linux-2.4.29/fs/proc/array.c linux-mips/fs/proc/array.c
21988 --- linux-2.4.29/fs/proc/array.c 2005-01-19 15:10:11.000000000 +0100
21989 +++ linux-mips/fs/proc/array.c 2004-11-29 18:47:18.000000000 +0100
21990 @@ -368,15 +368,15 @@
21991 task->cmin_flt,
21992 task->maj_flt,
21993 task->cmaj_flt,
21994 - task->times.tms_utime,
21995 - task->times.tms_stime,
21996 - task->times.tms_cutime,
21997 - task->times.tms_cstime,
21998 + hz_to_std(task->times.tms_utime),
21999 + hz_to_std(task->times.tms_stime),
22000 + hz_to_std(task->times.tms_cutime),
22001 + hz_to_std(task->times.tms_cstime),
22002 priority,
22003 nice,
22004 0UL /* removed */,
22005 task->it_real_value,
22006 - task->start_time,
22007 + hz_to_std(task->start_time),
22008 vsize,
22009 mm ? mm->rss : 0, /* you might want to shift this left 3 */
22010 task->rlim[RLIMIT_RSS].rlim_cur,
22011 @@ -615,14 +615,14 @@
22012
22013 len = sprintf(buffer,
22014 "cpu %lu %lu\n",
22015 - task->times.tms_utime,
22016 - task->times.tms_stime);
22017 + hz_to_std(task->times.tms_utime),
22018 + hz_to_std(task->times.tms_stime));
22019
22020 for (i = 0 ; i < smp_num_cpus; i++)
22021 len += sprintf(buffer + len, "cpu%d %lu %lu\n",
22022 i,
22023 - task->per_cpu_utime[cpu_logical_map(i)],
22024 - task->per_cpu_stime[cpu_logical_map(i)]);
22025 + hz_to_std(task->per_cpu_utime[cpu_logical_map(i)]),
22026 + hz_to_std(task->per_cpu_stime[cpu_logical_map(i)]));
22027
22028 return len;
22029 }
22030 diff -Nur linux-2.4.29/fs/proc/proc_misc.c linux-mips/fs/proc/proc_misc.c
22031 --- linux-2.4.29/fs/proc/proc_misc.c 2004-08-08 01:26:06.000000000 +0200
22032 +++ linux-mips/fs/proc/proc_misc.c 2004-08-14 20:39:01.000000000 +0200
22033 @@ -308,16 +308,16 @@
22034 {
22035 int i, len = 0;
22036 extern unsigned long total_forks;
22037 - unsigned long jif = jiffies;
22038 + unsigned long jif = hz_to_std(jiffies);
22039 unsigned int sum = 0, user = 0, nice = 0, system = 0;
22040 int major, disk;
22041
22042 for (i = 0 ; i < smp_num_cpus; i++) {
22043 int cpu = cpu_logical_map(i), j;
22044
22045 - user += kstat.per_cpu_user[cpu];
22046 - nice += kstat.per_cpu_nice[cpu];
22047 - system += kstat.per_cpu_system[cpu];
22048 + user += hz_to_std(kstat.per_cpu_user[cpu]);
22049 + nice += hz_to_std(kstat.per_cpu_nice[cpu]);
22050 + system += hz_to_std(kstat.per_cpu_system[cpu]);
22051 #if !defined(CONFIG_ARCH_S390)
22052 for (j = 0 ; j < NR_IRQS ; j++)
22053 sum += kstat.irqs[cpu][j];
22054 @@ -331,10 +331,10 @@
22055 proc_sprintf(page, &off, &len,
22056 "cpu%d %u %u %u %lu\n",
22057 i,
22058 - kstat.per_cpu_user[cpu_logical_map(i)],
22059 - kstat.per_cpu_nice[cpu_logical_map(i)],
22060 - kstat.per_cpu_system[cpu_logical_map(i)],
22061 - jif - ( kstat.per_cpu_user[cpu_logical_map(i)] \
22062 + hz_to_std(kstat.per_cpu_user[cpu_logical_map(i)]),
22063 + hz_to_std(kstat.per_cpu_nice[cpu_logical_map(i)]),
22064 + hz_to_std(kstat.per_cpu_system[cpu_logical_map(i)]),
22065 + jif - hz_to_std( kstat.per_cpu_user[cpu_logical_map(i)] \
22066 + kstat.per_cpu_nice[cpu_logical_map(i)] \
22067 + kstat.per_cpu_system[cpu_logical_map(i)]));
22068 proc_sprintf(page, &off, &len,
22069 diff -Nur linux-2.4.29/include/asm-alpha/param.h linux-mips/include/asm-alpha/param.h
22070 --- linux-2.4.29/include/asm-alpha/param.h 2000-11-08 08:37:31.000000000 +0100
22071 +++ linux-mips/include/asm-alpha/param.h 2000-11-28 04:59:03.000000000 +0100
22072 @@ -13,6 +13,9 @@
22073 # else
22074 # define HZ 1200
22075 # endif
22076 +#ifdef __KERNEL__
22077 +# define hz_to_std(a) (a)
22078 +#endif
22079 #endif
22080
22081 #define EXEC_PAGESIZE 8192
22082 diff -Nur linux-2.4.29/include/asm-i386/param.h linux-mips/include/asm-i386/param.h
22083 --- linux-2.4.29/include/asm-i386/param.h 2000-10-27 20:04:43.000000000 +0200
22084 +++ linux-mips/include/asm-i386/param.h 2000-11-23 03:00:55.000000000 +0100
22085 @@ -3,6 +3,9 @@
22086
22087 #ifndef HZ
22088 #define HZ 100
22089 +#ifdef __KERNEL__
22090 +#define hz_to_std(a) (a)
22091 +#endif
22092 #endif
22093
22094 #define EXEC_PAGESIZE 4096
22095 diff -Nur linux-2.4.29/include/asm-ia64/param.h linux-mips/include/asm-ia64/param.h
22096 --- linux-2.4.29/include/asm-ia64/param.h 2004-04-14 15:05:40.000000000 +0200
22097 +++ linux-mips/include/asm-ia64/param.h 2004-04-16 05:14:20.000000000 +0200
22098 @@ -7,9 +7,15 @@
22099 * Based on <asm-i386/param.h>.
22100 *
22101 * Modified 1998, 1999, 2002-2003
22102 - * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
22103 + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
22104 */
22105
22106 +#include <linux/config.h>
22107 +
22108 +#ifdef __KERNEL__
22109 +#define hz_to_std(a) (a)
22110 +#endif
22111 +
22112 #define EXEC_PAGESIZE 65536
22113
22114 #ifndef NGROUPS
22115 diff -Nur linux-2.4.29/include/asm-m68k/param.h linux-mips/include/asm-m68k/param.h
22116 --- linux-2.4.29/include/asm-m68k/param.h 2001-01-04 22:00:55.000000000 +0100
22117 +++ linux-mips/include/asm-m68k/param.h 2001-01-11 05:02:45.000000000 +0100
22118 @@ -3,6 +3,9 @@
22119
22120 #ifndef HZ
22121 #define HZ 100
22122 +#ifdef __KERNEL__
22123 +#define hz_to_std(a) (a)
22124 +#endif
22125 #endif
22126
22127 #define EXEC_PAGESIZE 8192
22128 diff -Nur linux-2.4.29/include/asm-mips/au1000_gpio.h linux-mips/include/asm-mips/au1000_gpio.h
22129 --- linux-2.4.29/include/asm-mips/au1000_gpio.h 2002-11-29 00:53:15.000000000 +0100
22130 +++ linux-mips/include/asm-mips/au1000_gpio.h 2005-01-30 09:01:28.000000000 +0100
22131 @@ -30,6 +30,13 @@
22132 * 675 Mass Ave, Cambridge, MA 02139, USA.
22133 */
22134
22135 +/*
22136 + * Revision history
22137 + * 01/31/02 0.01 Initial release. Steve Longerbeam, MontaVista
22138 + * 10/12/03 0.1 Added Au1100/Au1500, GPIO2, and bit operations. K.C. Nishio, AMD
22139 + * 08/05/04 0.11 Added Au1550 and Au1200. K.C. Nishio
22140 + */
22141 +
22142 #ifndef __AU1000_GPIO_H
22143 #define __AU1000_GPIO_H
22144
22145 @@ -44,13 +51,94 @@
22146 #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
22147 #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
22148
22149 +// bit operations
22150 +#define AU1000GPIO_BIT_READ _IOW (AU1000GPIO_IOC_MAGIC, 6, int)
22151 +#define AU1000GPIO_BIT_SET _IOW (AU1000GPIO_IOC_MAGIC, 7, int)
22152 +#define AU1000GPIO_BIT_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 8, int)
22153 +#define AU1000GPIO_BIT_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 9, int)
22154 +#define AU1000GPIO_BIT_INIT _IOW (AU1000GPIO_IOC_MAGIC, 10, int)
22155 +#define AU1000GPIO_BIT_TERM _IOW (AU1000GPIO_IOC_MAGIC, 11, int)
22156 +
22157 +/* set this major numer same as the CRIS GPIO driver */
22158 +#define AU1X00_GPIO_MAJOR (120)
22159 +
22160 +#define ENABLED_ZERO (0)
22161 +#define ENABLED_ONE (1)
22162 +#define ENABLED_10 (0x2)
22163 +#define ENABLED_11 (0x3)
22164 +#define ENABLED_111 (0x7)
22165 +#define NOT_AVAIL (-1)
22166 +#define AU1X00_MAX_PRIMARY_GPIO (32)
22167 +
22168 +#define AU1000_GPIO_MINOR_MAX AU1X00_MAX_PRIMARY_GPIO
22169 +/* Au1100, 1500, 1550 and 1200 have the secondary GPIO block */
22170 +#define AU1XX0_GPIO_MINOR_MAX (48)
22171 +
22172 +#define AU1X00_GPIO_NAME "gpio"
22173 +
22174 +/* GPIO pins which are not multiplexed */
22175 +#if defined(CONFIG_SOC_AU1000)
22176 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
22177 + #define NATIVE_GPIO2PIN (0)
22178 +#elif defined(CONFIG_SOC_AU1100)
22179 + #define NATIVE_GPIOPIN ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) | (1 << 18) | \
22180 + (1 << 17) | (1 << 16) | (1 << 7) | (1 << 1) | (1 << 0))
22181 + #define NATIVE_GPIO2PIN (0)
22182 +#elif defined(CONFIG_SOC_AU1500)
22183 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
22184 + /* exclude the PCI reset output signal: GPIO[200], DMA_REQ2 and DMA_REQ3 */
22185 + #define NATIVE_GPIO2PIN (0xfffe & ~((1 << 9) | (1 << 8)))
22186 +#elif defined(CONFIG_SOC_AU1550)
22187 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 6) | (1 << 1) | (1 << 0))
22188 + /* please refere Au1550 Data Book, chapter 15 */
22189 + #define NATIVE_GPIO2PIN (1 << 5)
22190 +#elif defined(CONFIG_SOC_AU1200)
22191 + #define NATIVE_GPIOPIN ((1 << 7) | (1 << 5))
22192 + #define NATIVE_GPIO2PIN (0)
22193 +#endif
22194 +
22195 +/* minor as u32 */
22196 +#define MINOR_TO_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? minor : (minor - AU1X00_MAX_PRIMARY_GPIO))
22197 +#define IS_PRIMARY_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? 1 : 0)
22198 +
22199 +/*
22200 + * pin to minor mapping.
22201 + * GPIO0-GPIO31, minor=0-31.
22202 + * GPIO200-GPIO215, minor=32-47.
22203 + */
22204 +typedef struct _au1x00_gpio_bit_ctl {
22205 + int direction; // The direction of this GPIO pin. 0: IN, 1: OUT.
22206 + int data; // Pin output when itized (0/1), or at the term. 0/1/-1 (tristate).
22207 +} au1x00_gpio_bit_ctl;
22208 +
22209 +typedef struct _au1x00_gpio_driver {
22210 + const char *driver_name;
22211 + const char *name;
22212 + int name_base; /* offset of printed name */
22213 + short major; /* major device number */
22214 + short minor_start; /* start of minor device number*/
22215 + short num; /* number of devices */
22216 +} au1x00_gpio_driver;
22217 +
22218 #ifdef __KERNEL__
22219 -extern u32 get_au1000_avail_gpio_mask(void);
22220 -extern int au1000gpio_tristate(u32 data);
22221 -extern int au1000gpio_in(u32 *data);
22222 -extern int au1000gpio_set(u32 data);
22223 -extern int au1000gpio_clear(u32 data);
22224 -extern int au1000gpio_out(u32 data);
22225 +extern u32 get_au1000_avail_gpio_mask(u32 *avail_gpio2);
22226 +extern int au1000gpio_tristate(u32 minor, u32 data);
22227 +extern int au1000gpio_in(u32 minor, u32 *data);
22228 +extern int au1000gpio_set(u32 minor, u32 data);
22229 +extern int au1000gpio_clear(u32 minor, u32 data);
22230 +extern int au1000gpio_out(u32 minor, u32 data);
22231 +extern int au1000gpio_bit_read(u32 minor, u32 *read_data);
22232 +extern int au1000gpio_bit_set(u32 minor);
22233 +extern int au1000gpio_bit_clear(u32 minor);
22234 +extern int au1000gpio_bit_tristate(u32 minor);
22235 +extern int check_minor_to_gpio(u32 minor);
22236 +extern int au1000gpio_bit_init(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
22237 +extern int au1000gpio_bit_term(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
22238 +
22239 +extern void gpio_register_devfs (au1x00_gpio_driver *driver, unsigned int flags, unsigned minor);
22240 +extern void gpio_unregister_devfs (au1x00_gpio_driver *driver, unsigned minor);
22241 +extern int gpio_register_driver(au1x00_gpio_driver *driver);
22242 +extern int gpio_unregister_driver(au1x00_gpio_driver *driver);
22243 #endif
22244
22245 #endif
22246 diff -Nur linux-2.4.29/include/asm-mips/au1000.h linux-mips/include/asm-mips/au1000.h
22247 --- linux-2.4.29/include/asm-mips/au1000.h 2005-01-19 15:10:11.000000000 +0100
22248 +++ linux-mips/include/asm-mips/au1000.h 2005-01-30 09:01:28.000000000 +0100
22249 @@ -160,28 +160,356 @@
22250 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
22251 #endif
22252
22253 -/* SDRAM Controller */
22254 +/*
22255 + * SDRAM Register Offsets
22256 + */
22257 #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
22258 -#define MEM_SDMODE0 0xB4000000
22259 -#define MEM_SDMODE1 0xB4000004
22260 -#define MEM_SDMODE2 0xB4000008
22261 -
22262 -#define MEM_SDADDR0 0xB400000C
22263 -#define MEM_SDADDR1 0xB4000010
22264 -#define MEM_SDADDR2 0xB4000014
22265 -
22266 -#define MEM_SDREFCFG 0xB4000018
22267 -#define MEM_SDPRECMD 0xB400001C
22268 -#define MEM_SDAUTOREF 0xB4000020
22269 -
22270 -#define MEM_SDWRMD0 0xB4000024
22271 -#define MEM_SDWRMD1 0xB4000028
22272 -#define MEM_SDWRMD2 0xB400002C
22273 +#define MEM_SDMODE0 (0x0000)
22274 +#define MEM_SDMODE1 (0x0004)
22275 +#define MEM_SDMODE2 (0x0008)
22276 +#define MEM_SDADDR0 (0x000C)
22277 +#define MEM_SDADDR1 (0x0010)
22278 +#define MEM_SDADDR2 (0x0014)
22279 +#define MEM_SDREFCFG (0x0018)
22280 +#define MEM_SDPRECMD (0x001C)
22281 +#define MEM_SDAUTOREF (0x0020)
22282 +#define MEM_SDWRMD0 (0x0024)
22283 +#define MEM_SDWRMD1 (0x0028)
22284 +#define MEM_SDWRMD2 (0x002C)
22285 +#define MEM_SDSLEEP (0x0030)
22286 +#define MEM_SDSMCKE (0x0034)
22287 +
22288 +#ifndef ASSEMBLER
22289 +/*typedef volatile struct
22290 +{
22291 + uint32 sdmode0;
22292 + uint32 sdmode1;
22293 + uint32 sdmode2;
22294 + uint32 sdaddr0;
22295 + uint32 sdaddr1;
22296 + uint32 sdaddr2;
22297 + uint32 sdrefcfg;
22298 + uint32 sdautoref;
22299 + uint32 sdwrmd0;
22300 + uint32 sdwrmd1;
22301 + uint32 sdwrmd2;
22302 + uint32 sdsleep;
22303 + uint32 sdsmcke;
22304 +
22305 +} AU1X00_SDRAM;*/
22306 +#endif
22307 +
22308 +/*
22309 + * MEM_SDMODE register content definitions
22310 + */
22311 +#define MEM_SDMODE_F (1<<22)
22312 +#define MEM_SDMODE_SR (1<<21)
22313 +#define MEM_SDMODE_BS (1<<20)
22314 +#define MEM_SDMODE_RS (3<<18)
22315 +#define MEM_SDMODE_CS (7<<15)
22316 +#define MEM_SDMODE_TRAS (15<<11)
22317 +#define MEM_SDMODE_TMRD (3<<9)
22318 +#define MEM_SDMODE_TWR (3<<7)
22319 +#define MEM_SDMODE_TRP (3<<5)
22320 +#define MEM_SDMODE_TRCD (3<<3)
22321 +#define MEM_SDMODE_TCL (7<<0)
22322 +
22323 +#define MEM_SDMODE_BS_2Bank (0<<20)
22324 +#define MEM_SDMODE_BS_4Bank (1<<20)
22325 +#define MEM_SDMODE_RS_11Row (0<<18)
22326 +#define MEM_SDMODE_RS_12Row (1<<18)
22327 +#define MEM_SDMODE_RS_13Row (2<<18)
22328 +#define MEM_SDMODE_RS_N(N) ((N)<<18)
22329 +#define MEM_SDMODE_CS_7Col (0<<15)
22330 +#define MEM_SDMODE_CS_8Col (1<<15)
22331 +#define MEM_SDMODE_CS_9Col (2<<15)
22332 +#define MEM_SDMODE_CS_10Col (3<<15)
22333 +#define MEM_SDMODE_CS_11Col (4<<15)
22334 +#define MEM_SDMODE_CS_N(N) ((N)<<15)
22335 +#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
22336 +#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
22337 +#define MEM_SDMODE_TWR_N(N) ((N)<<7)
22338 +#define MEM_SDMODE_TRP_N(N) ((N)<<5)
22339 +#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
22340 +#define MEM_SDMODE_TCL_N(N) ((N)<<0)
22341 +
22342 +/*
22343 + * MEM_SDADDR register contents definitions
22344 + */
22345 +#define MEM_SDADDR_E (1<<20)
22346 +#define MEM_SDADDR_CSBA (0x03FF<<10)
22347 +#define MEM_SDADDR_CSMASK (0x03FF<<0)
22348 +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
22349 +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
22350 +
22351 +/*
22352 + * MEM_SDREFCFG register content definitions
22353 + */
22354 +#define MEM_SDREFCFG_TRC (15<<28)
22355 +#define MEM_SDREFCFG_TRPM (3<<26)
22356 +#define MEM_SDREFCFG_E (1<<25)
22357 +#define MEM_SDREFCFG_RE (0x1ffffff<<0)
22358 +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
22359 +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
22360 +#define MEM_SDREFCFG_REF_N(N) (N)
22361 +#endif
22362 +
22363 +/***********************************************************************/
22364 +
22365 +/*
22366 + * Au1550 SDRAM Register Offsets
22367 + */
22368 +
22369 +/***********************************************************************/
22370 +
22371 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
22372 +#define MEM_SDMODE0 (0x0800)
22373 +#define MEM_SDMODE1 (0x0808)
22374 +#define MEM_SDMODE2 (0x0810)
22375 +#define MEM_SDADDR0 (0x0820)
22376 +#define MEM_SDADDR1 (0x0828)
22377 +#define MEM_SDADDR2 (0x0830)
22378 +#define MEM_SDCONFIGA (0x0840)
22379 +#define MEM_SDCONFIGB (0x0848)
22380 +#define MEM_SDSTAT (0x0850)
22381 +#define MEM_SDERRADDR (0x0858)
22382 +#define MEM_SDSTRIDE0 (0x0860)
22383 +#define MEM_SDSTRIDE1 (0x0868)
22384 +#define MEM_SDSTRIDE2 (0x0870)
22385 +#define MEM_SDWRMD0 (0x0880)
22386 +#define MEM_SDWRMD1 (0x0888)
22387 +#define MEM_SDWRMD2 (0x0890)
22388 +#define MEM_SDPRECMD (0x08C0)
22389 +#define MEM_SDAUTOREF (0x08C8)
22390 +#define MEM_SDSREF (0x08D0)
22391 +#define MEM_SDSLEEP MEM_SDSREF
22392 +
22393 +#ifndef ASSEMBLER
22394 +/*typedef volatile struct
22395 +{
22396 + uint32 sdmode0;
22397 + uint32 reserved0;
22398 + uint32 sdmode1;
22399 + uint32 reserved1;
22400 + uint32 sdmode2;
22401 + uint32 reserved2[3];
22402 + uint32 sdaddr0;
22403 + uint32 reserved3;
22404 + uint32 sdaddr1;
22405 + uint32 reserved4;
22406 + uint32 sdaddr2;
22407 + uint32 reserved5[3];
22408 + uint32 sdconfiga;
22409 + uint32 reserved6;
22410 + uint32 sdconfigb;
22411 + uint32 reserved7;
22412 + uint32 sdstat;
22413 + uint32 reserved8;
22414 + uint32 sderraddr;
22415 + uint32 reserved9;
22416 + uint32 sdstride0;
22417 + uint32 reserved10;
22418 + uint32 sdstride1;
22419 + uint32 reserved11;
22420 + uint32 sdstride2;
22421 + uint32 reserved12[3];
22422 + uint32 sdwrmd0;
22423 + uint32 reserved13;
22424 + uint32 sdwrmd1;
22425 + uint32 reserved14;
22426 + uint32 sdwrmd2;
22427 + uint32 reserved15[11];
22428 + uint32 sdprecmd;
22429 + uint32 reserved16;
22430 + uint32 sdautoref;
22431 + uint32 reserved17;
22432 + uint32 sdsref;
22433 +
22434 +} AU1550_SDRAM;*/
22435 +#endif
22436 +#endif
22437 +
22438 +/*
22439 + * Physical base addresses for integrated peripherals
22440 + */
22441 +
22442 +#ifdef CONFIG_SOC_AU1000
22443 +#define MEM_PHYS_ADDR 0x14000000
22444 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22445 +#define DMA0_PHYS_ADDR 0x14002000
22446 +#define DMA1_PHYS_ADDR 0x14002100
22447 +#define DMA2_PHYS_ADDR 0x14002200
22448 +#define DMA3_PHYS_ADDR 0x14002300
22449 +#define DMA4_PHYS_ADDR 0x14002400
22450 +#define DMA5_PHYS_ADDR 0x14002500
22451 +#define DMA6_PHYS_ADDR 0x14002600
22452 +#define DMA7_PHYS_ADDR 0x14002700
22453 +#define IC0_PHYS_ADDR 0x10400000
22454 +#define IC1_PHYS_ADDR 0x11800000
22455 +#define AC97_PHYS_ADDR 0x10000000
22456 +#define USBH_PHYS_ADDR 0x10100000
22457 +#define USBD_PHYS_ADDR 0x10200000
22458 +#define IRDA_PHYS_ADDR 0x10300000
22459 +#define MAC0_PHYS_ADDR 0x10500000
22460 +#define MAC1_PHYS_ADDR 0x10510000
22461 +#define MACEN_PHYS_ADDR 0x10520000
22462 +#define MACDMA0_PHYS_ADDR 0x14004000
22463 +#define MACDMA1_PHYS_ADDR 0x14004200
22464 +#define I2S_PHYS_ADDR 0x11000000
22465 +#define UART0_PHYS_ADDR 0x11100000
22466 +#define UART1_PHYS_ADDR 0x11200000
22467 +#define UART2_PHYS_ADDR 0x11300000
22468 +#define UART3_PHYS_ADDR 0x11400000
22469 +#define SSI0_PHYS_ADDR 0x11600000
22470 +#define SSI1_PHYS_ADDR 0x11680000
22471 +#define SYS_PHYS_ADDR 0x11900000
22472 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22473 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22474 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22475 +#endif
22476 +
22477 +/********************************************************************/
22478
22479 -#define MEM_SDSLEEP 0xB4000030
22480 -#define MEM_SDSMCKE 0xB4000034
22481 +#ifdef CONFIG_SOC_AU1500
22482 +#define MEM_PHYS_ADDR 0x14000000
22483 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22484 +#define DMA0_PHYS_ADDR 0x14002000
22485 +#define DMA1_PHYS_ADDR 0x14002100
22486 +#define DMA2_PHYS_ADDR 0x14002200
22487 +#define DMA3_PHYS_ADDR 0x14002300
22488 +#define DMA4_PHYS_ADDR 0x14002400
22489 +#define DMA5_PHYS_ADDR 0x14002500
22490 +#define DMA6_PHYS_ADDR 0x14002600
22491 +#define DMA7_PHYS_ADDR 0x14002700
22492 +#define IC0_PHYS_ADDR 0x10400000
22493 +#define IC1_PHYS_ADDR 0x11800000
22494 +#define AC97_PHYS_ADDR 0x10000000
22495 +#define USBH_PHYS_ADDR 0x10100000
22496 +#define USBD_PHYS_ADDR 0x10200000
22497 +#define PCI_PHYS_ADDR 0x14005000
22498 +#define MAC0_PHYS_ADDR 0x11500000
22499 +#define MAC1_PHYS_ADDR 0x11510000
22500 +#define MACEN_PHYS_ADDR 0x11520000
22501 +#define MACDMA0_PHYS_ADDR 0x14004000
22502 +#define MACDMA1_PHYS_ADDR 0x14004200
22503 +#define I2S_PHYS_ADDR 0x11000000
22504 +#define UART0_PHYS_ADDR 0x11100000
22505 +#define UART3_PHYS_ADDR 0x11400000
22506 +#define GPIO2_PHYS_ADDR 0x11700000
22507 +#define SYS_PHYS_ADDR 0x11900000
22508 +#define PCI_MEM_PHYS_ADDR 0x400000000
22509 +#define PCI_IO_PHYS_ADDR 0x500000000
22510 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
22511 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
22512 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22513 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22514 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22515 #endif
22516
22517 +/********************************************************************/
22518 +
22519 +#ifdef CONFIG_SOC_AU1100
22520 +#define MEM_PHYS_ADDR 0x14000000
22521 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22522 +#define DMA0_PHYS_ADDR 0x14002000
22523 +#define DMA1_PHYS_ADDR 0x14002100
22524 +#define DMA2_PHYS_ADDR 0x14002200
22525 +#define DMA3_PHYS_ADDR 0x14002300
22526 +#define DMA4_PHYS_ADDR 0x14002400
22527 +#define DMA5_PHYS_ADDR 0x14002500
22528 +#define DMA6_PHYS_ADDR 0x14002600
22529 +#define DMA7_PHYS_ADDR 0x14002700
22530 +#define IC0_PHYS_ADDR 0x10400000
22531 +#define SD0_PHYS_ADDR 0x10600000
22532 +#define SD1_PHYS_ADDR 0x10680000
22533 +#define IC1_PHYS_ADDR 0x11800000
22534 +#define AC97_PHYS_ADDR 0x10000000
22535 +#define USBH_PHYS_ADDR 0x10100000
22536 +#define USBD_PHYS_ADDR 0x10200000
22537 +#define IRDA_PHYS_ADDR 0x10300000
22538 +#define MAC0_PHYS_ADDR 0x10500000
22539 +#define MACEN_PHYS_ADDR 0x10520000
22540 +#define MACDMA0_PHYS_ADDR 0x14004000
22541 +#define MACDMA1_PHYS_ADDR 0x14004200
22542 +#define I2S_PHYS_ADDR 0x11000000
22543 +#define UART0_PHYS_ADDR 0x11100000
22544 +#define UART1_PHYS_ADDR 0x11200000
22545 +#define UART3_PHYS_ADDR 0x11400000
22546 +#define SSI0_PHYS_ADDR 0x11600000
22547 +#define SSI1_PHYS_ADDR 0x11680000
22548 +#define GPIO2_PHYS_ADDR 0x11700000
22549 +#define SYS_PHYS_ADDR 0x11900000
22550 +#define LCD_PHYS_ADDR 0x15000000
22551 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22552 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22553 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22554 +#endif
22555 +
22556 +/***********************************************************************/
22557 +
22558 +#ifdef CONFIG_SOC_AU1550
22559 +#define MEM_PHYS_ADDR 0x14000000
22560 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22561 +#define IC0_PHYS_ADDR 0x10400000
22562 +#define IC1_PHYS_ADDR 0x11800000
22563 +#define USBH_PHYS_ADDR 0x14020000
22564 +#define USBD_PHYS_ADDR 0x10200000
22565 +#define PCI_PHYS_ADDR 0x14005000
22566 +#define MAC0_PHYS_ADDR 0x10500000
22567 +#define MAC1_PHYS_ADDR 0x10510000
22568 +#define MACEN_PHYS_ADDR 0x10520000
22569 +#define MACDMA0_PHYS_ADDR 0x14004000
22570 +#define MACDMA1_PHYS_ADDR 0x14004200
22571 +#define UART0_PHYS_ADDR 0x11100000
22572 +#define UART1_PHYS_ADDR 0x11200000
22573 +#define UART3_PHYS_ADDR 0x11400000
22574 +#define GPIO2_PHYS_ADDR 0x11700000
22575 +#define SYS_PHYS_ADDR 0x11900000
22576 +#define DDMA_PHYS_ADDR 0x14002000
22577 +#define PE_PHYS_ADDR 0x14008000
22578 +#define PSC0_PHYS_ADDR 0x11A00000
22579 +#define PSC1_PHYS_ADDR 0x11B00000
22580 +#define PSC2_PHYS_ADDR 0x10A00000
22581 +#define PSC3_PHYS_ADDR 0x10B00000
22582 +#define PCI_MEM_PHYS_ADDR 0x400000000
22583 +#define PCI_IO_PHYS_ADDR 0x500000000
22584 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
22585 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
22586 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22587 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22588 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22589 +#endif
22590 +
22591 +/***********************************************************************/
22592 +
22593 +#ifdef CONFIG_SOC_AU1200
22594 +#define MEM_PHYS_ADDR 0x14000000
22595 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22596 +#define AES_PHYS_ADDR 0x10300000
22597 +#define CIM_PHYS_ADDR 0x14004000
22598 +#define IC0_PHYS_ADDR 0x10400000
22599 +#define IC1_PHYS_ADDR 0x11800000
22600 +#define USBM_PHYS_ADDR 0x14020000
22601 +#define USBH_PHYS_ADDR 0x14020100
22602 +#define UART0_PHYS_ADDR 0x11100000
22603 +#define UART1_PHYS_ADDR 0x11200000
22604 +#define GPIO2_PHYS_ADDR 0x11700000
22605 +#define SYS_PHYS_ADDR 0x11900000
22606 +#define DDMA_PHYS_ADDR 0x14002000
22607 +#define PSC0_PHYS_ADDR 0x11A00000
22608 +#define PSC1_PHYS_ADDR 0x11B00000
22609 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22610 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22611 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22612 +#define SD0_PHYS_ADDR 0x10600000
22613 +#define SD1_PHYS_ADDR 0x10680000
22614 +#define LCD_PHYS_ADDR 0x15000000
22615 +#define SWCNT_PHYS_ADDR 0x1110010C
22616 +#define MAEFE_PHYS_ADDR 0x14012000
22617 +#define MAEBE_PHYS_ADDR 0x14010000
22618 +#endif
22619 +
22620 +
22621 /* Static Bus Controller */
22622 #define MEM_STCFG0 0xB4001000
22623 #define MEM_STTIME0 0xB4001004
22624 @@ -367,7 +695,7 @@
22625 #define AU1000_MAC0_ENABLE 0xB0520000
22626 #define AU1000_MAC1_ENABLE 0xB0520004
22627 #define NUM_ETH_INTERFACES 2
22628 -#endif // CONFIG_SOC_AU1000
22629 +#endif /* CONFIG_SOC_AU1000 */
22630
22631 /* Au1500 */
22632 #ifdef CONFIG_SOC_AU1500
22633 @@ -438,7 +766,7 @@
22634 #define AU1500_MAC0_ENABLE 0xB1520000
22635 #define AU1500_MAC1_ENABLE 0xB1520004
22636 #define NUM_ETH_INTERFACES 2
22637 -#endif // CONFIG_SOC_AU1500
22638 +#endif /* CONFIG_SOC_AU1500 */
22639
22640 /* Au1100 */
22641 #ifdef CONFIG_SOC_AU1100
22642 @@ -483,6 +811,22 @@
22643 #define AU1000_GPIO_13 45
22644 #define AU1000_GPIO_14 46
22645 #define AU1000_GPIO_15 47
22646 +#define AU1000_GPIO_16 48
22647 +#define AU1000_GPIO_17 49
22648 +#define AU1000_GPIO_18 50
22649 +#define AU1000_GPIO_19 51
22650 +#define AU1000_GPIO_20 52
22651 +#define AU1000_GPIO_21 53
22652 +#define AU1000_GPIO_22 54
22653 +#define AU1000_GPIO_23 55
22654 +#define AU1000_GPIO_24 56
22655 +#define AU1000_GPIO_25 57
22656 +#define AU1000_GPIO_26 58
22657 +#define AU1000_GPIO_27 59
22658 +#define AU1000_GPIO_28 60
22659 +#define AU1000_GPIO_29 61
22660 +#define AU1000_GPIO_30 62
22661 +#define AU1000_GPIO_31 63
22662
22663 #define UART0_ADDR 0xB1100000
22664 #define UART1_ADDR 0xB1200000
22665 @@ -494,7 +838,7 @@
22666 #define AU1100_ETH0_BASE 0xB0500000
22667 #define AU1100_MAC0_ENABLE 0xB0520000
22668 #define NUM_ETH_INTERFACES 1
22669 -#endif // CONFIG_SOC_AU1100
22670 +#endif /* CONFIG_SOC_AU1100 */
22671
22672 #ifdef CONFIG_SOC_AU1550
22673 #define AU1550_UART0_INT 0
22674 @@ -511,14 +855,14 @@
22675 #define AU1550_PSC1_INT 11
22676 #define AU1550_PSC2_INT 12
22677 #define AU1550_PSC3_INT 13
22678 -#define AU1550_TOY_INT 14
22679 -#define AU1550_TOY_MATCH0_INT 15
22680 -#define AU1550_TOY_MATCH1_INT 16
22681 -#define AU1550_TOY_MATCH2_INT 17
22682 -#define AU1550_RTC_INT 18
22683 -#define AU1550_RTC_MATCH0_INT 19
22684 -#define AU1550_RTC_MATCH1_INT 20
22685 -#define AU1550_RTC_MATCH2_INT 21
22686 +#define AU1000_TOY_INT 14
22687 +#define AU1000_TOY_MATCH0_INT 15
22688 +#define AU1000_TOY_MATCH1_INT 16
22689 +#define AU1000_TOY_MATCH2_INT 17
22690 +#define AU1000_RTC_INT 18
22691 +#define AU1000_RTC_MATCH0_INT 19
22692 +#define AU1000_RTC_MATCH1_INT 20
22693 +#define AU1000_RTC_MATCH2_INT 21
22694 #define AU1550_NAND_INT 23
22695 #define AU1550_USB_DEV_REQ_INT 24
22696 #define AU1550_USB_DEV_SUS_INT 25
22697 @@ -573,7 +917,7 @@
22698 #define AU1550_MAC0_ENABLE 0xB0520000
22699 #define AU1550_MAC1_ENABLE 0xB0520004
22700 #define NUM_ETH_INTERFACES 2
22701 -#endif // CONFIG_SOC_AU1550
22702 +#endif /* CONFIG_SOC_AU1550 */
22703
22704 #ifdef CONFIG_SOC_AU1200
22705 #define AU1200_UART0_INT 0
22706 @@ -590,14 +934,14 @@
22707 #define AU1200_PSC1_INT 11
22708 #define AU1200_AES_INT 12
22709 #define AU1200_CAMERA_INT 13
22710 -#define AU1200_TOY_INT 14
22711 -#define AU1200_TOY_MATCH0_INT 15
22712 -#define AU1200_TOY_MATCH1_INT 16
22713 -#define AU1200_TOY_MATCH2_INT 17
22714 -#define AU1200_RTC_INT 18
22715 -#define AU1200_RTC_MATCH0_INT 19
22716 -#define AU1200_RTC_MATCH1_INT 20
22717 -#define AU1200_RTC_MATCH2_INT 21
22718 +#define AU1000_TOY_INT 14
22719 +#define AU1000_TOY_MATCH0_INT 15
22720 +#define AU1000_TOY_MATCH1_INT 16
22721 +#define AU1000_TOY_MATCH2_INT 17
22722 +#define AU1000_RTC_INT 18
22723 +#define AU1000_RTC_MATCH0_INT 19
22724 +#define AU1000_RTC_MATCH1_INT 20
22725 +#define AU1000_RTC_MATCH2_INT 21
22726 #define AU1200_NAND_INT 23
22727 #define AU1200_GPIO_204 24
22728 #define AU1200_GPIO_205 25
22729 @@ -605,6 +949,7 @@
22730 #define AU1200_GPIO_207 27
22731 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
22732 #define AU1200_USB_INT 29
22733 +#define AU1000_USB_HOST_INT AU1200_USB_INT
22734 #define AU1200_LCD_INT 30
22735 #define AU1200_MAE_BOTH_INT 31
22736 #define AU1000_GPIO_0 32
22737 @@ -643,21 +988,36 @@
22738 #define UART0_ADDR 0xB1100000
22739 #define UART1_ADDR 0xB1200000
22740
22741 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
22742 -#define USB_HOST_CONFIG 0xB4027ffc
22743 +#define USB_UOC_BASE 0x14020020
22744 +#define USB_UOC_LEN 0x20
22745 +#define USB_OHCI_BASE 0x14020100
22746 +#define USB_OHCI_LEN 0x100
22747 +#define USB_EHCI_BASE 0x14020200
22748 +#define USB_EHCI_LEN 0x100
22749 +#define USB_UDC_BASE 0x14022000
22750 +#define USB_UDC_LEN 0x2000
22751 +#define USB_MSR_BASE 0xB4020000
22752 +#define USB_MSR_MCFG 4
22753 +#define USBMSRMCFG_OMEMEN 0
22754 +#define USBMSRMCFG_OBMEN 1
22755 +#define USBMSRMCFG_EMEMEN 2
22756 +#define USBMSRMCFG_EBMEN 3
22757 +#define USBMSRMCFG_DMEMEN 4
22758 +#define USBMSRMCFG_DBMEN 5
22759 +#define USBMSRMCFG_GMEMEN 6
22760 +#define USBMSRMCFG_OHCCLKEN 16
22761 +#define USBMSRMCFG_EHCCLKEN 17
22762 +#define USBMSRMCFG_UDCCLKEN 18
22763 +#define USBMSRMCFG_PHYPLLEN 19
22764 +#define USBMSRMCFG_RDCOMB 30
22765 +#define USBMSRMCFG_PFEN 31
22766
22767 -// these are here for prototyping on au1550 (do not exist on au1200)
22768 -#define AU1200_ETH0_BASE 0xB0500000
22769 -#define AU1200_ETH1_BASE 0xB0510000
22770 -#define AU1200_MAC0_ENABLE 0xB0520000
22771 -#define AU1200_MAC1_ENABLE 0xB0520004
22772 -#define NUM_ETH_INTERFACES 2
22773 -#endif // CONFIG_SOC_AU1200
22774 +#endif /* CONFIG_SOC_AU1200 */
22775
22776 #define AU1000_LAST_INTC0_INT 31
22777 +#define AU1000_LAST_INTC1_INT 63
22778 #define AU1000_MAX_INTR 63
22779
22780 -
22781 /* Programmable Counters 0 and 1 */
22782 #define SYS_BASE 0xB1900000
22783 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
22784 @@ -728,6 +1088,8 @@
22785 #define I2S_CONTROL_D (1<<1)
22786 #define I2S_CONTROL_CE (1<<0)
22787
22788 +#ifndef CONFIG_SOC_AU1200
22789 +
22790 /* USB Host Controller */
22791 #define USB_OHCI_LEN 0x00100000
22792
22793 @@ -773,6 +1135,8 @@
22794 #define USBDEV_ENABLE (1<<1)
22795 #define USBDEV_CE (1<<0)
22796
22797 +#endif /* !CONFIG_SOC_AU1200 */
22798 +
22799 /* Ethernet Controllers */
22800
22801 /* 4 byte offsets from AU1000_ETH_BASE */
22802 @@ -1171,6 +1535,37 @@
22803 #define SYS_PF_PSC1_S1 (1 << 1)
22804 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
22805
22806 +/* Au1200 Only */
22807 +#ifdef CONFIG_SOC_AU1200
22808 +#define SYS_PINFUNC_DMA (1<<31)
22809 +#define SYS_PINFUNC_S0A (1<<30)
22810 +#define SYS_PINFUNC_S1A (1<<29)
22811 +#define SYS_PINFUNC_LP0 (1<<28)
22812 +#define SYS_PINFUNC_LP1 (1<<27)
22813 +#define SYS_PINFUNC_LD16 (1<<26)
22814 +#define SYS_PINFUNC_LD8 (1<<25)
22815 +#define SYS_PINFUNC_LD1 (1<<24)
22816 +#define SYS_PINFUNC_LD0 (1<<23)
22817 +#define SYS_PINFUNC_P1A (3<<21)
22818 +#define SYS_PINFUNC_P1B (1<<20)
22819 +#define SYS_PINFUNC_FS3 (1<<19)
22820 +#define SYS_PINFUNC_P0A (3<<17)
22821 +#define SYS_PINFUNC_CS (1<<16)
22822 +#define SYS_PINFUNC_CIM (1<<15)
22823 +#define SYS_PINFUNC_P1C (1<<14)
22824 +#define SYS_PINFUNC_U1T (1<<12)
22825 +#define SYS_PINFUNC_U1R (1<<11)
22826 +#define SYS_PINFUNC_EX1 (1<<10)
22827 +#define SYS_PINFUNC_EX0 (1<<9)
22828 +#define SYS_PINFUNC_U0R (1<<8)
22829 +#define SYS_PINFUNC_MC (1<<7)
22830 +#define SYS_PINFUNC_S0B (1<<6)
22831 +#define SYS_PINFUNC_S0C (1<<5)
22832 +#define SYS_PINFUNC_P0B (1<<4)
22833 +#define SYS_PINFUNC_U0T (1<<3)
22834 +#define SYS_PINFUNC_S1B (1<<2)
22835 +#endif
22836 +
22837 #define SYS_TRIOUTRD 0xB1900100
22838 #define SYS_TRIOUTCLR 0xB1900100
22839 #define SYS_OUTPUTRD 0xB1900108
22840 @@ -1298,7 +1693,6 @@
22841 #define SD1_XMIT_FIFO 0xB0680000
22842 #define SD1_RECV_FIFO 0xB0680004
22843
22844 -
22845 #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
22846 /* Au1500 PCI Controller */
22847 #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
22848 @@ -1388,9 +1782,60 @@
22849
22850 #endif
22851
22852 +#ifndef _LANGUAGE_ASSEMBLY
22853 +typedef volatile struct
22854 +{
22855 + /* 0x0000 */ u32 toytrim;
22856 + /* 0x0004 */ u32 toywrite;
22857 + /* 0x0008 */ u32 toymatch0;
22858 + /* 0x000C */ u32 toymatch1;
22859 + /* 0x0010 */ u32 toymatch2;
22860 + /* 0x0014 */ u32 cntrctrl;
22861 + /* 0x0018 */ u32 scratch0;
22862 + /* 0x001C */ u32 scratch1;
22863 + /* 0x0020 */ u32 freqctrl0;
22864 + /* 0x0024 */ u32 freqctrl1;
22865 + /* 0x0028 */ u32 clksrc;
22866 + /* 0x002C */ u32 pinfunc;
22867 + /* 0x0030 */ u32 reserved0;
22868 + /* 0x0034 */ u32 wakemsk;
22869 + /* 0x0038 */ u32 endian;
22870 + /* 0x003C */ u32 powerctrl;
22871 + /* 0x0040 */ u32 toyread;
22872 + /* 0x0044 */ u32 rtctrim;
22873 + /* 0x0048 */ u32 rtcwrite;
22874 + /* 0x004C */ u32 rtcmatch0;
22875 + /* 0x0050 */ u32 rtcmatch1;
22876 + /* 0x0054 */ u32 rtcmatch2;
22877 + /* 0x0058 */ u32 rtcread;
22878 + /* 0x005C */ u32 wakesrc;
22879 + /* 0x0060 */ u32 cpupll;
22880 + /* 0x0064 */ u32 auxpll;
22881 + /* 0x0068 */ u32 reserved1;
22882 + /* 0x006C */ u32 reserved2;
22883 + /* 0x0070 */ u32 reserved3;
22884 + /* 0x0074 */ u32 reserved4;
22885 + /* 0x0078 */ u32 slppwr;
22886 + /* 0x007C */ u32 sleep;
22887 + /* 0x0080 */ u32 reserved5[32];
22888 + /* 0x0100 */ u32 trioutrd;
22889 +#define trioutclr trioutrd
22890 + /* 0x0104 */ u32 reserved6;
22891 + /* 0x0108 */ u32 outputrd;
22892 +#define outputset outputrd
22893 + /* 0x010C */ u32 outputclr;
22894 + /* 0x0110 */ u32 pinstaterd;
22895 +#define pininputen pinstaterd
22896 +
22897 +} AU1X00_SYS;
22898 +
22899 +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
22900 +
22901 +#endif
22902 /* Processor information base on prid.
22903 * Copied from PowerPC.
22904 */
22905 +#ifndef _LANGUAGE_ASSEMBLY
22906 struct cpu_spec {
22907 /* CPU is matched via (PRID & prid_mask) == prid_value */
22908 unsigned int prid_mask;
22909 @@ -1404,3 +1849,6 @@
22910 extern struct cpu_spec cpu_specs[];
22911 extern struct cpu_spec *cur_cpu_spec[];
22912 #endif
22913 +
22914 +#endif
22915 +
22916 diff -Nur linux-2.4.29/include/asm-mips/au1000_pcmcia.h linux-mips/include/asm-mips/au1000_pcmcia.h
22917 --- linux-2.4.29/include/asm-mips/au1000_pcmcia.h 2005-01-19 15:10:11.000000000 +0100
22918 +++ linux-mips/include/asm-mips/au1000_pcmcia.h 2005-01-30 09:01:28.000000000 +0100
22919 @@ -38,16 +38,41 @@
22920 #define AU1X_SOCK0_PHYS_MEM 0xF80000000
22921
22922 /* pcmcia socket 1 needs external glue logic so the memory map
22923 - * differs from board to board.
22924 + * differs from board to board. the general rule is that
22925 + * static bus address bit 26 should be used to decode socket 0
22926 + * from socket 1. alas, some boards dont follow this...
22927 + * These really belong in a board-specific header file...
22928 */
22929 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
22930 -#define AU1X_SOCK1_IO 0xF08000000
22931 -#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
22932 -#define AU1X_SOCK1_PHYS_MEM 0xF88000000
22933 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
22934 -#define AU1X_SOCK1_IO 0xF04000000
22935 -#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
22936 -#define AU1X_SOCK1_PHYS_MEM 0xF84000000
22937 +#ifdef CONFIG_MIPS_PB1000
22938 +#define SOCK1_DECODE (1<<27)
22939 +#endif
22940 +#ifdef CONFIG_MIPS_DB1000
22941 +#define SOCK1_DECODE (1<<26)
22942 +#endif
22943 +#ifdef CONFIG_MIPS_DB1500
22944 +#define SOCK1_DECODE (1<<26)
22945 +#endif
22946 +#ifdef CONFIG_MIPS_DB1100
22947 +#define SOCK1_DECODE (1<<26)
22948 +#endif
22949 +#ifdef CONFIG_MIPS_DB1550
22950 +#define SOCK1_DECODE (1<<26)
22951 +#endif
22952 +#ifdef CONFIG_MIPS_DB1200
22953 +#define SOCK1_DECODE (1<<26)
22954 +#endif
22955 +#ifdef CONFIG_MIPS_PB1550
22956 +#define SOCK1_DECODE (1<<26)
22957 +#endif
22958 +#ifdef CONFIG_MIPS_PB1200
22959 +#define SOCK1_DECODE (1<<26)
22960 +#endif
22961 +
22962 +/* The board has a second PCMCIA socket */
22963 +#ifdef SOCK1_DECODE
22964 +#define AU1X_SOCK1_IO (0xF00000000|SOCK1_DECODE)
22965 +#define AU1X_SOCK1_PHYS_ATTR (0xF40000000|SOCK1_DECODE)
22966 +#define AU1X_SOCK1_PHYS_MEM (0xF80000000|SOCK1_DECODE)
22967 #endif
22968
22969 struct pcmcia_state {
22970 diff -Nur linux-2.4.29/include/asm-mips/au1100_mmc.h linux-mips/include/asm-mips/au1100_mmc.h
22971 --- linux-2.4.29/include/asm-mips/au1100_mmc.h 2005-01-19 15:10:11.000000000 +0100
22972 +++ linux-mips/include/asm-mips/au1100_mmc.h 2005-01-30 09:01:28.000000000 +0100
22973 @@ -39,16 +39,22 @@
22974 #define __ASM_AU1100_MMC_H
22975
22976
22977 -#define NUM_AU1100_MMC_CONTROLLERS 2
22978 -
22979 -
22980 -#define AU1100_SD_IRQ 2
22981 -
22982 +#if defined(CONFIG_SOC_AU1100)
22983 +#define NUM_MMC_CONTROLLERS 2
22984 +#define AU1X_MMC_INT AU1100_SD_INT
22985 +#endif
22986 +
22987 +#if defined(CONFIG_SOC_AU1200)
22988 +#define NUM_MMC_CONTROLLERS 2
22989 +#define AU1X_MMC_INT AU1200_SD_INT
22990 +#endif
22991
22992 #define SD0_BASE 0xB0600000
22993 #define SD1_BASE 0xB0680000
22994
22995
22996 +
22997 +
22998 /*
22999 * Register offsets.
23000 */
23001 @@ -201,5 +207,12 @@
23002 #define SD_CMD_RT_1B (0x00810000)
23003
23004
23005 +/* support routines required on a platform-specific basis */
23006 +extern void mmc_card_inserted(int _n_, int *_res_);
23007 +extern void mmc_card_writable(int _n_, int *_res_);
23008 +extern void mmc_power_on(int _n_);
23009 +extern void mmc_power_off(int _n_);
23010 +
23011 +
23012 #endif /* __ASM_AU1100_MMC_H */
23013
23014 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_dbdma.h linux-mips/include/asm-mips/au1xxx_dbdma.h
23015 --- linux-2.4.29/include/asm-mips/au1xxx_dbdma.h 2005-01-19 15:10:11.000000000 +0100
23016 +++ linux-mips/include/asm-mips/au1xxx_dbdma.h 2005-01-30 09:01:28.000000000 +0100
23017 @@ -43,7 +43,7 @@
23018 #define DDMA_GLOBAL_BASE 0xb4003000
23019 #define DDMA_CHANNEL_BASE 0xb4002000
23020
23021 -typedef struct dbdma_global {
23022 +typedef volatile struct dbdma_global {
23023 u32 ddma_config;
23024 u32 ddma_intstat;
23025 u32 ddma_throttle;
23026 @@ -60,7 +60,7 @@
23027
23028 /* The structure of a DMA Channel.
23029 */
23030 -typedef struct au1xxx_dma_channel {
23031 +typedef volatile struct au1xxx_dma_channel {
23032 u32 ddma_cfg; /* See below */
23033 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
23034 u32 ddma_statptr; /* word aligned pointer to status word */
23035 @@ -96,7 +96,7 @@
23036 /* "Standard" DDMA Descriptor.
23037 * Must be 32-byte aligned.
23038 */
23039 -typedef struct au1xxx_ddma_desc {
23040 +typedef volatile struct au1xxx_ddma_desc {
23041 u32 dscr_cmd0; /* See below */
23042 u32 dscr_cmd1; /* See below */
23043 u32 dscr_source0; /* source phys address */
23044 @@ -105,6 +105,12 @@
23045 u32 dscr_dest1; /* See below */
23046 u32 dscr_stat; /* completion status */
23047 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
23048 + /* First 32bytes are HW specific!!!
23049 + Lets have some SW data following.. make sure its 32bytes
23050 + */
23051 + u32 sw_status;
23052 + u32 sw_context;
23053 + u32 sw_reserved[6];
23054 } au1x_ddma_desc_t;
23055
23056 #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
23057 @@ -123,6 +129,8 @@
23058 #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
23059 #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
23060
23061 +#define SW_STATUS_INUSE (1<<0)
23062 +
23063 /* Command 0 device IDs.
23064 */
23065 #ifdef CONFIG_SOC_AU1550
23066 @@ -169,8 +177,8 @@
23067 #define DSCR_CMD0_SDMS_RX0 9
23068 #define DSCR_CMD0_SDMS_TX1 10
23069 #define DSCR_CMD0_SDMS_RX1 11
23070 -#define DSCR_CMD0_AES_TX 12
23071 -#define DSCR_CMD0_AES_RX 13
23072 +#define DSCR_CMD0_AES_TX 13
23073 +#define DSCR_CMD0_AES_RX 12
23074 #define DSCR_CMD0_PSC0_TX 14
23075 #define DSCR_CMD0_PSC0_RX 15
23076 #define DSCR_CMD0_PSC1_TX 16
23077 @@ -189,6 +197,10 @@
23078 #define DSCR_CMD0_THROTTLE 30
23079 #define DSCR_CMD0_ALWAYS 31
23080 #define DSCR_NDEV_IDS 32
23081 +/* THis macro is used to find/create custom device types */
23082 +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
23083 +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
23084 +
23085
23086 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
23087 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
23088 @@ -277,6 +289,43 @@
23089 */
23090 #define NUM_DBDMA_CHANS 16
23091
23092 +/*
23093 + * Ddma API definitions
23094 + * FIXME: may not fit to this header file
23095 + */
23096 +typedef struct dbdma_device_table {
23097 + u32 dev_id;
23098 + u32 dev_flags;
23099 + u32 dev_tsize;
23100 + u32 dev_devwidth;
23101 + u32 dev_physaddr; /* If FIFO */
23102 + u32 dev_intlevel;
23103 + u32 dev_intpolarity;
23104 +} dbdev_tab_t;
23105 +
23106 +
23107 +typedef struct dbdma_chan_config {
23108 + spinlock_t lock;
23109 +
23110 + u32 chan_flags;
23111 + u32 chan_index;
23112 + dbdev_tab_t *chan_src;
23113 + dbdev_tab_t *chan_dest;
23114 + au1x_dma_chan_t *chan_ptr;
23115 + au1x_ddma_desc_t *chan_desc_base;
23116 + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
23117 + void *chan_callparam;
23118 + void (*chan_callback)(int, void *, struct pt_regs *);
23119 +} chan_tab_t;
23120 +
23121 +#define DEV_FLAGS_INUSE (1 << 0)
23122 +#define DEV_FLAGS_ANYUSE (1 << 1)
23123 +#define DEV_FLAGS_OUT (1 << 2)
23124 +#define DEV_FLAGS_IN (1 << 3)
23125 +#define DEV_FLAGS_BURSTABLE (1 << 4)
23126 +#define DEV_FLAGS_SYNC (1 << 5)
23127 +/* end Ddma API definitions */
23128 +
23129 /* External functions for drivers to use.
23130 */
23131 /* Use this to allocate a dbdma channel. The device ids are one of the
23132 @@ -299,8 +348,8 @@
23133
23134 /* Put buffers on source/destination descriptors.
23135 */
23136 -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
23137 -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
23138 +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
23139 +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
23140
23141 /* Get a buffer from the destination descriptor.
23142 */
23143 @@ -314,5 +363,25 @@
23144 void au1xxx_dbdma_chan_free(u32 chanid);
23145 void au1xxx_dbdma_dump(u32 chanid);
23146
23147 +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
23148 +
23149 +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
23150 +
23151 +/*
23152 + Some compatibilty macros --
23153 + Needed to make changes to API without breaking existing drivers
23154 +*/
23155 +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
23156 +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
23157 +
23158 +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
23159 +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
23160 +
23161 +/*
23162 + * Flags for the put_source/put_dest functions.
23163 + */
23164 +#define DDMA_FLAGS_IE (1<<0)
23165 +#define DDMA_FLAGS_NOIE (1<<1)
23166 +
23167 #endif /* _LANGUAGE_ASSEMBLY */
23168 #endif /* _AU1000_DBDMA_H_ */
23169 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_gpio.h linux-mips/include/asm-mips/au1xxx_gpio.h
23170 --- linux-2.4.29/include/asm-mips/au1xxx_gpio.h 1970-01-01 01:00:00.000000000 +0100
23171 +++ linux-mips/include/asm-mips/au1xxx_gpio.h 2005-01-30 09:01:28.000000000 +0100
23172 @@ -0,0 +1,22 @@
23173 +
23174 +
23175 +#ifndef __AU1XXX_GPIO_H
23176 +#define __AU1XXX_GPIO_H
23177 +
23178 +void au1xxx_gpio1_set_inputs(void);
23179 +void au1xxx_gpio_tristate(int signal);
23180 +void au1xxx_gpio_write(int signal, int value);
23181 +int au1xxx_gpio_read(int signal);
23182 +
23183 +typedef volatile struct
23184 +{
23185 + u32 dir;
23186 + u32 reserved;
23187 + u32 output;
23188 + u32 pinstate;
23189 + u32 inten;
23190 + u32 enable;
23191 +
23192 +} AU1X00_GPIO2;
23193 +
23194 +#endif //__AU1XXX_GPIO_H
23195 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_psc.h linux-mips/include/asm-mips/au1xxx_psc.h
23196 --- linux-2.4.29/include/asm-mips/au1xxx_psc.h 2005-01-19 15:10:11.000000000 +0100
23197 +++ linux-mips/include/asm-mips/au1xxx_psc.h 2005-01-30 09:01:28.000000000 +0100
23198 @@ -41,6 +41,11 @@
23199 #define PSC3_BASE_ADDR 0xb0d00000
23200 #endif
23201
23202 +#ifdef CONFIG_SOC_AU1200
23203 +#define PSC0_BASE_ADDR 0xb1a00000
23204 +#define PSC1_BASE_ADDR 0xb1b00000
23205 +#endif
23206 +
23207 /* The PSC select and control registers are common to
23208 * all protocols.
23209 */
23210 @@ -226,6 +231,8 @@
23211 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
23212 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
23213 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
23214 +#define PSC_I2SCFG_WS(n) ((n&0xFF)<<16)
23215 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
23216 #define PSC_I2SCFG_WI (1 << 15)
23217
23218 #define PSC_I2SCFG_DIV_MASK (3 << 13)
23219 diff -Nur linux-2.4.29/include/asm-mips/bootinfo.h linux-mips/include/asm-mips/bootinfo.h
23220 --- linux-2.4.29/include/asm-mips/bootinfo.h 2004-02-18 14:36:32.000000000 +0100
23221 +++ linux-mips/include/asm-mips/bootinfo.h 2005-01-30 09:01:28.000000000 +0100
23222 @@ -180,6 +180,9 @@
23223 #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
23224 #define MACH_CSB250 8 /* Cogent Au1500 */
23225 #define MACH_PB1550 9 /* Au1550-based eval board */
23226 +#define MACH_PB1200 10 /* Au1200-based eval board */
23227 +#define MACH_DB1550 11 /* Au1550-based eval board */
23228 +#define MACH_DB1200 12 /* Au1200-based eval board */
23229
23230 /*
23231 * Valid machtype for group NEC_VR41XX
23232 diff -Nur linux-2.4.29/include/asm-mips/db1200.h linux-mips/include/asm-mips/db1200.h
23233 --- linux-2.4.29/include/asm-mips/db1200.h 1970-01-01 01:00:00.000000000 +0100
23234 +++ linux-mips/include/asm-mips/db1200.h 2005-01-30 09:02:45.000000000 +0100
23235 @@ -0,0 +1,214 @@
23236 +/*
23237 + * AMD Alchemy DB1200 Referrence Board
23238 + * Board Registers defines.
23239 + *
23240 + * ########################################################################
23241 + *
23242 + * This program is free software; you can distribute it and/or modify it
23243 + * under the terms of the GNU General Public License (Version 2) as
23244 + * published by the Free Software Foundation.
23245 + *
23246 + * This program is distributed in the hope it will be useful, but WITHOUT
23247 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
23248 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23249 + * for more details.
23250 + *
23251 + * You should have received a copy of the GNU General Public License along
23252 + * with this program; if not, write to the Free Software Foundation, Inc.,
23253 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23254 + *
23255 + * ########################################################################
23256 + *
23257 + *
23258 + */
23259 +#ifndef __ASM_DB1200_H
23260 +#define __ASM_DB1200_H
23261 +
23262 +#include <linux/types.h>
23263 +
23264 +// This is defined in au1000.h with bogus value
23265 +#undef AU1X00_EXTERNAL_INT
23266 +
23267 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
23268 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
23269 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
23270 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
23271 +
23272 +/* SPI and SMB are muxed on the Pb1200 board.
23273 + Refer to board documentation.
23274 + */
23275 +#define SPI_PSC_BASE PSC0_BASE_ADDR
23276 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
23277 +/* AC97 and I2S are muxed on the Pb1200 board.
23278 + Refer to board documentation.
23279 + */
23280 +#define AC97_PSC_BASE PSC1_BASE_ADDR
23281 +#define I2S_PSC_BASE PSC1_BASE_ADDR
23282 +
23283 +#define BCSR_KSEG1_ADDR 0xB9800000
23284 +
23285 +typedef volatile struct
23286 +{
23287 + /*00*/ u16 whoami;
23288 + u16 reserved0;
23289 + /*04*/ u16 status;
23290 + u16 reserved1;
23291 + /*08*/ u16 switches;
23292 + u16 reserved2;
23293 + /*0C*/ u16 resets;
23294 + u16 reserved3;
23295 +
23296 + /*10*/ u16 pcmcia;
23297 + u16 reserved4;
23298 + /*14*/ u16 board;
23299 + u16 reserved5;
23300 + /*18*/ u16 disk_leds;
23301 + u16 reserved6;
23302 + /*1C*/ u16 system;
23303 + u16 reserved7;
23304 +
23305 + /*20*/ u16 intclr;
23306 + u16 reserved8;
23307 + /*24*/ u16 intset;
23308 + u16 reserved9;
23309 + /*28*/ u16 intclr_mask;
23310 + u16 reserved10;
23311 + /*2C*/ u16 intset_mask;
23312 + u16 reserved11;
23313 +
23314 + /*30*/ u16 sig_status;
23315 + u16 reserved12;
23316 + /*34*/ u16 int_status;
23317 + u16 reserved13;
23318 + /*38*/ u16 reserved14;
23319 + u16 reserved15;
23320 + /*3C*/ u16 reserved16;
23321 + u16 reserved17;
23322 +
23323 +} BCSR;
23324 +
23325 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
23326 +
23327 +/*
23328 + * Register bit definitions for the BCSRs
23329 + */
23330 +#define BCSR_WHOAMI_DCID 0x000F
23331 +#define BCSR_WHOAMI_CPLD 0x00F0
23332 +#define BCSR_WHOAMI_BOARD 0x0F00
23333 +
23334 +#define BCSR_STATUS_PCMCIA0VS 0x0003
23335 +#define BCSR_STATUS_PCMCIA1VS 0x000C
23336 +#define BCSR_STATUS_SWAPBOOT 0x0040
23337 +#define BCSR_STATUS_FLASHBUSY 0x0100
23338 +#define BCSR_STATUS_IDECBLID 0x0200
23339 +#define BCSR_STATUS_SD0WP 0x0400
23340 +#define BCSR_STATUS_U0RXD 0x1000
23341 +#define BCSR_STATUS_U1RXD 0x2000
23342 +
23343 +#define BCSR_SWITCHES_OCTAL 0x00FF
23344 +#define BCSR_SWITCHES_DIP_1 0x0080
23345 +#define BCSR_SWITCHES_DIP_2 0x0040
23346 +#define BCSR_SWITCHES_DIP_3 0x0020
23347 +#define BCSR_SWITCHES_DIP_4 0x0010
23348 +#define BCSR_SWITCHES_DIP_5 0x0008
23349 +#define BCSR_SWITCHES_DIP_6 0x0004
23350 +#define BCSR_SWITCHES_DIP_7 0x0002
23351 +#define BCSR_SWITCHES_DIP_8 0x0001
23352 +#define BCSR_SWITCHES_ROTARY 0x0F00
23353 +
23354 +#define BCSR_RESETS_ETH 0x0001
23355 +#define BCSR_RESETS_CAMERA 0x0002
23356 +#define BCSR_RESETS_DC 0x0004
23357 +#define BCSR_RESETS_IDE 0x0008
23358 +#define BCSR_RESETS_TV 0x0010
23359 +/* not resets but in the same register */
23360 +#define BCSR_RESETS_PWMR1mUX 0x0800
23361 +#define BCSR_RESETS_PCS0MUX 0x1000
23362 +#define BCSR_RESETS_PCS1MUX 0x2000
23363 +#define BCSR_RESETS_SPISEL 0x4000
23364 +
23365 +#define BCSR_PCMCIA_PC0VPP 0x0003
23366 +#define BCSR_PCMCIA_PC0VCC 0x000C
23367 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
23368 +#define BCSR_PCMCIA_PC0RST 0x0080
23369 +#define BCSR_PCMCIA_PC1VPP 0x0300
23370 +#define BCSR_PCMCIA_PC1VCC 0x0C00
23371 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
23372 +#define BCSR_PCMCIA_PC1RST 0x8000
23373 +
23374 +#define BCSR_BOARD_LCDVEE 0x0001
23375 +#define BCSR_BOARD_LCDVDD 0x0002
23376 +#define BCSR_BOARD_LCDBL 0x0004
23377 +#define BCSR_BOARD_CAMSNAP 0x0010
23378 +#define BCSR_BOARD_CAMPWR 0x0020
23379 +#define BCSR_BOARD_SD0PWR 0x0040
23380 +
23381 +#define BCSR_LEDS_DECIMALS 0x0003
23382 +#define BCSR_LEDS_LED0 0x0100
23383 +#define BCSR_LEDS_LED1 0x0200
23384 +#define BCSR_LEDS_LED2 0x0400
23385 +#define BCSR_LEDS_LED3 0x0800
23386 +
23387 +#define BCSR_SYSTEM_POWEROFF 0x4000
23388 +#define BCSR_SYSTEM_RESET 0x8000
23389 +
23390 +/* Bit positions for the different interrupt sources */
23391 +#define BCSR_INT_IDE 0x0001
23392 +#define BCSR_INT_ETH 0x0002
23393 +#define BCSR_INT_PC0 0x0004
23394 +#define BCSR_INT_PC0STSCHG 0x0008
23395 +#define BCSR_INT_PC1 0x0010
23396 +#define BCSR_INT_PC1STSCHG 0x0020
23397 +#define BCSR_INT_DC 0x0040
23398 +#define BCSR_INT_FLASHBUSY 0x0080
23399 +#define BCSR_INT_PC0INSERT 0x0100
23400 +#define BCSR_INT_PC0EJECT 0x0200
23401 +#define BCSR_INT_PC1INSERT 0x0400
23402 +#define BCSR_INT_PC1EJECT 0x0800
23403 +#define BCSR_INT_SD0INSERT 0x1000
23404 +#define BCSR_INT_SD0EJECT 0x2000
23405 +
23406 +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
23407 +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
23408 +
23409 +#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
23410 +#define AU1XXX_ATA_PHYS_LEN (0x100)
23411 +#define AU1XXX_ATA_REG_OFFSET (5)
23412 +#define AU1XXX_ATA_INT DB1200_IDE_INT
23413 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
23414 +#define AU1XXX_ATA_RQSIZE 128
23415 +
23416 +#define NAND_PHYS_ADDR 0x20000000
23417 +
23418 +/*
23419 + * External Interrupts for Pb1200 as of 8/6/2004.
23420 + * Bit positions in the CPLD registers can be calculated by taking
23421 + * the interrupt define and subtracting the DB1200_INT_BEGIN value.
23422 + * *example: IDE bis pos is = 64 - 64
23423 + ETH bit pos is = 65 - 64
23424 + */
23425 +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
23426 +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
23427 +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
23428 +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
23429 +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
23430 +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
23431 +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
23432 +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
23433 +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
23434 +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
23435 +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
23436 +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
23437 +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
23438 +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
23439 +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
23440 +
23441 +#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
23442 +
23443 +/* For drivers/pcmcia/au1000_db1x00.c */
23444 +#define BOARD_PC0_INT DB1200_PC0_INT
23445 +#define BOARD_PC1_INT DB1200_PC1_INT
23446 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
23447 +
23448 +#endif /* __ASM_DB1200_H */
23449 +
23450 diff -Nur linux-2.4.29/include/asm-mips/db1x00.h linux-mips/include/asm-mips/db1x00.h
23451 --- linux-2.4.29/include/asm-mips/db1x00.h 2005-01-19 15:10:11.000000000 +0100
23452 +++ linux-mips/include/asm-mips/db1x00.h 2005-01-30 09:06:19.000000000 +0100
23453 @@ -1,5 +1,5 @@
23454 /*
23455 - * AMD Alchemy DB1x00 Reference Boards
23456 + * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
23457 *
23458 * Copyright 2001 MontaVista Software Inc.
23459 * Author: MontaVista Software, Inc.
23460 @@ -36,9 +36,18 @@
23461 #define AC97_PSC_BASE PSC1_BASE_ADDR
23462 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
23463 #define I2S_PSC_BASE PSC3_BASE_ADDR
23464 +#define NAND_CS 1
23465 +/* for drivers/pcmcia/au1000_db1x00.c */
23466 +#define BOARD_PC0_INT AU1000_GPIO_3
23467 +#define BOARD_PC1_INT AU1000_GPIO_5
23468 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
23469
23470 #else
23471 #define BCSR_KSEG1_ADDR 0xAE000000
23472 +/* for drivers/pcmcia/au1000_db1x00.c */
23473 +#define BOARD_PC0_INT AU1000_GPIO_2
23474 +#define BOARD_PC1_INT AU1000_GPIO_5
23475 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
23476 #endif
23477
23478 /*
23479 @@ -66,6 +75,7 @@
23480
23481 } BCSR;
23482
23483 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
23484
23485 /*
23486 * Register/mask bit definitions for the BCSRs
23487 @@ -130,14 +140,6 @@
23488
23489 #define BCSR_SWRESET_RESET 0x0080
23490
23491 -/* PCMCIA Db1x00 specific defines */
23492 -#define PCMCIA_MAX_SOCK 1
23493 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
23494 -
23495 -/* VPP/VCC */
23496 -#define SET_VCC_VPP(VCC, VPP, SLOT)\
23497 - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
23498 -
23499 /* MTD CONFIG OPTIONS */
23500 #if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
23501 #define DB1X00_BOTH_BANKS
23502 @@ -147,48 +149,15 @@
23503 #define DB1X00_USER_ONLY
23504 #endif
23505
23506 -/* SD controller macros */
23507 -/*
23508 - * Detect card.
23509 - */
23510 -#define mmc_card_inserted(_n_, _res_) \
23511 - do { \
23512 - BCSR * const bcsr = (BCSR *)0xAE000000; \
23513 - unsigned long mmc_wp, board_specific; \
23514 - if ((_n_)) { \
23515 - mmc_wp = BCSR_BOARD_SD1_WP; \
23516 - } else { \
23517 - mmc_wp = BCSR_BOARD_SD0_WP; \
23518 - } \
23519 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
23520 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
23521 - *(int *)(_res_) = 1; \
23522 - } else { \
23523 - *(int *)(_res_) = 0; \
23524 - } \
23525 - } while (0)
23526 -
23527 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
23528 /*
23529 - * Apply power to card slot(s).
23530 + * Daughter card information.
23531 */
23532 -#define mmc_power_on(_n_) \
23533 - do { \
23534 - BCSR * const bcsr = (BCSR *)0xAE000000; \
23535 - unsigned long mmc_pwr, mmc_wp, board_specific; \
23536 - if ((_n_)) { \
23537 - mmc_pwr = BCSR_BOARD_SD1_PWR; \
23538 - mmc_wp = BCSR_BOARD_SD1_WP; \
23539 - } else { \
23540 - mmc_pwr = BCSR_BOARD_SD0_PWR; \
23541 - mmc_wp = BCSR_BOARD_SD0_WP; \
23542 - } \
23543 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
23544 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
23545 - board_specific |= mmc_pwr; \
23546 - au_writel(board_specific, (int)(&bcsr->specific)); \
23547 - au_sync(); \
23548 - } \
23549 - } while (0)
23550 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
23551 +/* DC_IDE */
23552 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
23553 +#define AU1XXX_ATA_REG_OFFSET (5)
23554 +#endif /* CONFIG_MIPS_DB1550 */
23555
23556 #endif /* __ASM_DB1X00_H */
23557
23558 diff -Nur linux-2.4.29/include/asm-mips/ficmmp.h linux-mips/include/asm-mips/ficmmp.h
23559 --- linux-2.4.29/include/asm-mips/ficmmp.h 1970-01-01 01:00:00.000000000 +0100
23560 +++ linux-mips/include/asm-mips/ficmmp.h 2005-01-30 09:01:28.000000000 +0100
23561 @@ -0,0 +1,156 @@
23562 +/*
23563 + * FIC MMP
23564 + *
23565 + * ########################################################################
23566 + *
23567 + * This program is free software; you can distribute it and/or modify it
23568 + * under the terms of the GNU General Public License (Version 2) as
23569 + * published by the Free Software Foundation.
23570 + *
23571 + * This program is distributed in the hope it will be useful, but WITHOUT
23572 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
23573 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23574 + * for more details.
23575 + *
23576 + * You should have received a copy of the GNU General Public License along
23577 + * with this program; if not, write to the Free Software Foundation, Inc.,
23578 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23579 + *
23580 + * ########################################################################
23581 + *
23582 + *
23583 + */
23584 +#ifndef __ASM_FICMMP_H
23585 +#define __ASM_FICMMP_H
23586 +
23587 +#include <linux/types.h>
23588 +#include <asm/au1000.h>
23589 +#include <asm/au1xxx_gpio.h>
23590 +
23591 +// This is defined in au1000.h with bogus value
23592 +#undef AU1X00_EXTERNAL_INT
23593 +
23594 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
23595 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
23596 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
23597 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
23598 +/* SPI and SMB are muxed on the Pb1200 board.
23599 + Refer to board documentation.
23600 + */
23601 +#define SPI_PSC_BASE PSC0_BASE_ADDR
23602 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
23603 +/* AC97 and I2S are muxed on the Pb1200 board.
23604 + Refer to board documentation.
23605 + */
23606 +#define AC97_PSC_BASE PSC1_BASE_ADDR
23607 +#define I2S_PSC_BASE PSC1_BASE_ADDR
23608 +
23609 +
23610 +/*
23611 + * SMSC LAN91C111
23612 + */
23613 +#define AU1XXX_SMC91111_PHYS_ADDR (0xAC000300)
23614 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_5
23615 +
23616 +/* DC_IDE and DC_ETHERNET */
23617 +#define FICMMP_IDE_INT AU1000_GPIO_4
23618 +
23619 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
23620 +#define AU1XXX_ATA_REG_OFFSET (5)
23621 +/*
23622 +#define AU1XXX_ATA_BASE (0x0C800000)
23623 +#define AU1XXX_ATA_END (0x0CFFFFFF)
23624 +#define AU1XXX_ATA_MEM_SIZE (AU1XXX_ATA_END - AU1XXX_ATA_BASE +1)
23625 +
23626 +#define AU1XXX_ATA_REG_OFFSET (5)
23627 +*/
23628 +/* VPP/VCC */
23629 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
23630 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
23631 +
23632 +
23633 +#define FICMMP_CONFIG_BASE 0xAD000000
23634 +#define FICMMP_CONFIG_ENABLE 13
23635 +
23636 +#define FICMMP_CONFIG_I2SFREQ(N) (N<<0)
23637 +#define FICMMP_CONFIG_I2SXTAL0 (1<<0)
23638 +#define FICMMP_CONFIG_I2SXTAL1 (1<<1)
23639 +#define FICMMP_CONFIG_I2SXTAL2 (1<<2)
23640 +#define FICMMP_CONFIG_I2SXTAL3 (1<<3)
23641 +#define FICMMP_CONFIG_ADV1 (1<<4)
23642 +#define FICMMP_CONFIG_IDERST (1<<5)
23643 +#define FICMMP_CONFIG_LCMEN (1<<6)
23644 +#define FICMMP_CONFIG_CAMPWDN (1<<7)
23645 +#define FICMMP_CONFIG_USBPWREN (1<<8)
23646 +#define FICMMP_CONFIG_LCMPWREN (1<<9)
23647 +#define FICMMP_CONFIG_TVOUTPWREN (1<<10)
23648 +#define FICMMP_CONFIG_RS232PWREN (1<<11)
23649 +#define FICMMP_CONFIG_LCMDATAOUT (1<<12)
23650 +#define FICMMP_CONFIG_TVODATAOUT (1<<13)
23651 +#define FICMMP_CONFIG_ADV3 (1<<14)
23652 +#define FICMMP_CONFIG_ADV4 (1<<15)
23653 +
23654 +#define I2S_FREQ_8_192 (0x0)
23655 +#define I2S_FREQ_11_2896 (0x1)
23656 +#define I2S_FREQ_12_288 (0x2)
23657 +#define I2S_FREQ_24_576 (0x3)
23658 +//#define I2S_FREQ_12_288 (0x4)
23659 +#define I2S_FREQ_16_9344 (0x5)
23660 +#define I2S_FREQ_18_432 (0x6)
23661 +#define I2S_FREQ_36_864 (0x7)
23662 +#define I2S_FREQ_16_384 (0x8)
23663 +#define I2S_FREQ_22_5792 (0x9)
23664 +//#define I2S_FREQ_24_576 (0x10)
23665 +#define I2S_FREQ_49_152 (0x11)
23666 +//#define I2S_FREQ_24_576 (0x12)
23667 +#define I2S_FREQ_33_8688 (0x13)
23668 +//#define I2S_FREQ_36_864 (0x14)
23669 +#define I2S_FREQ_73_728 (0x15)
23670 +
23671 +#define FICMMP_IDE_PWR 9
23672 +#define FICMMP_FOCUS_RST 2
23673 +
23674 +static __inline void ficmmp_config_set(u16 bits)
23675 +{
23676 + extern u16 ficmmp_config;
23677 + //printk("set_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config | bits);
23678 + ficmmp_config |= bits;
23679 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
23680 +}
23681 +
23682 +static __inline void ficmmp_config_clear(u16 bits)
23683 +{
23684 + extern u16 ficmmp_config;
23685 +// printk("clear_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config & ~bits);
23686 + ficmmp_config &= ~bits;
23687 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
23688 +}
23689 +
23690 +static __inline void ficmmp_config_init(void)
23691 +{
23692 + au1xxx_gpio_write(FICMMP_CONFIG_ENABLE, 0); //Enable configuration latch
23693 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT | FICMMP_CONFIG_TVODATAOUT | FICMMP_CONFIG_IDERST); //Disable display data buffers
23694 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(I2S_FREQ_36_864));
23695 +}
23696 +
23697 +static __inline u32 ficmmp_set_i2s_sample_rate(u32 rate)
23698 +{
23699 + u32 freq;
23700 +
23701 + switch(rate)
23702 + {
23703 + case 88200:
23704 + case 44100:
23705 + case 8018: freq = I2S_FREQ_11_2896; break;
23706 + case 48000:
23707 + case 32000: //freq = I2S_FREQ_18_432; break;
23708 + case 8000: freq = I2S_FREQ_12_288; break;
23709 + default: freq = I2S_FREQ_12_288; rate = 8000;
23710 + }
23711 + ficmmp_config_clear(FICMMP_CONFIG_I2SFREQ(0xF));
23712 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(freq));
23713 + return rate;
23714 +}
23715 +
23716 +#endif /* __ASM_FICMMP_H */
23717 +
23718 diff -Nur linux-2.4.29/include/asm-mips/hazards.h linux-mips/include/asm-mips/hazards.h
23719 --- linux-2.4.29/include/asm-mips/hazards.h 2004-02-18 14:36:32.000000000 +0100
23720 +++ linux-mips/include/asm-mips/hazards.h 2004-11-25 23:18:38.000000000 +0100
23721 @@ -3,7 +3,7 @@
23722 * License. See the file "COPYING" in the main directory of this archive
23723 * for more details.
23724 *
23725 - * Copyright (C) 2003 Ralf Baechle
23726 + * Copyright (C) 2003, 2004 Ralf Baechle
23727 */
23728 #ifndef _ASM_HAZARDS_H
23729 #define _ASM_HAZARDS_H
23730 @@ -12,38 +12,185 @@
23731
23732 #ifdef __ASSEMBLY__
23733
23734 + .macro _ssnop
23735 + sll $0, $0, 1
23736 + .endm
23737 +
23738 /*
23739 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
23740 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
23741 * for data translations should not occur for 3 cpu cycles.
23742 */
23743 #ifdef CONFIG_CPU_RM9000
23744 -#define rm9000_tlb_hazard \
23745 +
23746 +#define mtc0_tlbw_hazard \
23747 + .set push; \
23748 + .set mips32; \
23749 + _ssnop; _ssnop; _ssnop; _ssnop; \
23750 + .set pop
23751 +
23752 +#define tlbw_eret_hazard \
23753 .set push; \
23754 .set mips32; \
23755 - ssnop; ssnop; ssnop; ssnop; \
23756 + _ssnop; _ssnop; _ssnop; _ssnop; \
23757 .set pop
23758 +
23759 #else
23760 -#define rm9000_tlb_hazard
23761 +
23762 +/*
23763 + * The taken branch will result in a two cycle penalty for the two killed
23764 + * instructions on R4000 / R4400. Other processors only have a single cycle
23765 + * hazard so this is nice trick to have an optimal code for a range of
23766 + * processors.
23767 + */
23768 +#define mtc0_tlbw_hazard \
23769 + b . + 8
23770 +#define tlbw_eret_hazard
23771 #endif
23772
23773 +/*
23774 + * mtc0->mfc0 hazard
23775 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
23776 + * It is a MIPS32R2 processor so ehb will clear the hazard.
23777 + */
23778 +
23779 +#ifdef CONFIG_CPU_MIPSR2
23780 +/*
23781 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
23782 + */
23783 + .macro ehb
23784 + sll $0, $0, 3
23785 + .endm
23786 +
23787 +#define irq_enable_hazard \
23788 + ehb # irq_enable_hazard
23789 +
23790 +#define irq_disable_hazard \
23791 + ehb # irq_disable_hazard
23792 +
23793 #else
23794
23795 +#define irq_enable_hazard
23796 +#define irq_disable_hazard
23797 +
23798 +#endif
23799 +
23800 +#else /* __ASSEMBLY__ */
23801 +
23802 /*
23803 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
23804 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
23805 * for data translations should not occur for 3 cpu cycles.
23806 */
23807 #ifdef CONFIG_CPU_RM9000
23808 -#define rm9000_tlb_hazard() \
23809 +
23810 +#define mtc0_tlbw_hazard() \
23811 __asm__ __volatile__( \
23812 ".set\tmips32\n\t" \
23813 - "ssnop; ssnop; ssnop; ssnop\n\t" \
23814 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
23815 + ".set\tmips0")
23816 +
23817 +#define tlbw_use_hazard() \
23818 + __asm__ __volatile__( \
23819 + ".set\tmips32\n\t" \
23820 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
23821 ".set\tmips0")
23822 #else
23823 -#define rm9000_tlb_hazard() do { } while (0)
23824 +
23825 +/*
23826 + * Overkill warning ...
23827 + */
23828 +#define mtc0_tlbw_hazard() \
23829 + __asm__ __volatile__( \
23830 + ".set noreorder\n\t" \
23831 + "nop; nop; nop; nop; nop; nop;\n\t" \
23832 + ".set reorder\n\t")
23833 +
23834 +#define tlbw_use_hazard() \
23835 + __asm__ __volatile__( \
23836 + ".set noreorder\n\t" \
23837 + "nop; nop; nop; nop; nop; nop;\n\t" \
23838 + ".set reorder\n\t")
23839 +
23840 #endif
23841
23842 +/*
23843 + * mtc0->mfc0 hazard
23844 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
23845 + * It is a MIPS32R2 processor so ehb will clear the hazard.
23846 + */
23847 +
23848 +#ifdef CONFIG_CPU_MIPSR2
23849 +/*
23850 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
23851 + */
23852 +__asm__(
23853 + " .macro ehb \n\t"
23854 + " sll $0, $0, 3 \n\t"
23855 + " .endm \n\t"
23856 + " \n\t"
23857 + " .macro\tirq_enable_hazard \n\t"
23858 + " ehb \n\t"
23859 + " .endm \n\t"
23860 + " \n\t"
23861 + " .macro\tirq_disable_hazard \n\t"
23862 + " ehb \n\t"
23863 + " .endm");
23864 +
23865 +#define irq_enable_hazard() \
23866 + __asm__ __volatile__( \
23867 + "ehb\t\t\t\t# irq_enable_hazard")
23868 +
23869 +#define irq_disable_hazard() \
23870 + __asm__ __volatile__( \
23871 + "ehb\t\t\t\t# irq_disable_hazard")
23872 +
23873 +#elif defined(CONFIG_CPU_R10000)
23874 +
23875 +/*
23876 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
23877 + */
23878 +
23879 +__asm__(
23880 + " .macro\tirq_enable_hazard \n\t"
23881 + " .endm \n\t"
23882 + " \n\t"
23883 + " .macro\tirq_disable_hazard \n\t"
23884 + " .endm");
23885 +
23886 +#define irq_enable_hazard() do { } while (0)
23887 +#define irq_disable_hazard() do { } while (0)
23888 +
23889 +#else
23890 +
23891 +/*
23892 + * Default for classic MIPS processors. Assume worst case hazards but don't
23893 + * care about the irq_enable_hazard - sooner or later the hardware will
23894 + * enable it and we don't care when exactly.
23895 + */
23896 +
23897 +__asm__(
23898 + " .macro _ssnop \n\t"
23899 + " sll $0, $2, 1 \n\t"
23900 + " .endm \n\t"
23901 + " \n\t"
23902 + " # \n\t"
23903 + " # There is a hazard but we do not care \n\t"
23904 + " # \n\t"
23905 + " .macro\tirq_enable_hazard \n\t"
23906 + " .endm \n\t"
23907 + " \n\t"
23908 + " .macro\tirq_disable_hazard \n\t"
23909 + " _ssnop; _ssnop; _ssnop \n\t"
23910 + " .endm");
23911 +
23912 +#define irq_enable_hazard() do { } while (0)
23913 +#define irq_disable_hazard() \
23914 + __asm__ __volatile__( \
23915 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
23916 +
23917 #endif
23918
23919 +#endif /* __ASSEMBLY__ */
23920 +
23921 #endif /* _ASM_HAZARDS_H */
23922 diff -Nur linux-2.4.29/include/asm-mips/mipsregs.h linux-mips/include/asm-mips/mipsregs.h
23923 --- linux-2.4.29/include/asm-mips/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
23924 +++ linux-mips/include/asm-mips/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
23925 @@ -757,10 +757,18 @@
23926 #define read_c0_config1() __read_32bit_c0_register($16, 1)
23927 #define read_c0_config2() __read_32bit_c0_register($16, 2)
23928 #define read_c0_config3() __read_32bit_c0_register($16, 3)
23929 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
23930 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
23931 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
23932 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
23933 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
23934 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
23935 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
23936 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
23937 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
23938 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
23939 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
23940 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
23941
23942 /*
23943 * The WatchLo register. There may be upto 8 of them.
23944 @@ -874,42 +882,34 @@
23945 */
23946 static inline void tlb_probe(void)
23947 {
23948 - rm9000_tlb_hazard();
23949 __asm__ __volatile__(
23950 ".set noreorder\n\t"
23951 "tlbp\n\t"
23952 ".set reorder");
23953 - rm9000_tlb_hazard();
23954 }
23955
23956 static inline void tlb_read(void)
23957 {
23958 - rm9000_tlb_hazard();
23959 __asm__ __volatile__(
23960 ".set noreorder\n\t"
23961 "tlbr\n\t"
23962 ".set reorder");
23963 - rm9000_tlb_hazard();
23964 }
23965
23966 static inline void tlb_write_indexed(void)
23967 {
23968 - rm9000_tlb_hazard();
23969 __asm__ __volatile__(
23970 ".set noreorder\n\t"
23971 "tlbwi\n\t"
23972 ".set reorder");
23973 - rm9000_tlb_hazard();
23974 }
23975
23976 static inline void tlb_write_random(void)
23977 {
23978 - rm9000_tlb_hazard();
23979 __asm__ __volatile__(
23980 ".set noreorder\n\t"
23981 "tlbwr\n\t"
23982 ".set reorder");
23983 - rm9000_tlb_hazard();
23984 }
23985
23986 /*
23987 diff -Nur linux-2.4.29/include/asm-mips/mmu_context.h linux-mips/include/asm-mips/mmu_context.h
23988 --- linux-2.4.29/include/asm-mips/mmu_context.h 2005-01-19 15:10:12.000000000 +0100
23989 +++ linux-mips/include/asm-mips/mmu_context.h 2004-11-22 14:38:29.000000000 +0100
23990 @@ -27,7 +27,7 @@
23991 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
23992 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
23993 #define TLBMISS_HANDLER_SETUP() \
23994 - write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
23995 + write_c0_context((unsigned long) smp_processor_id() << 23); \
23996 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
23997 extern unsigned long pgd_current[];
23998
23999 diff -Nur linux-2.4.29/include/asm-mips/pb1100.h linux-mips/include/asm-mips/pb1100.h
24000 --- linux-2.4.29/include/asm-mips/pb1100.h 2003-08-25 13:44:44.000000000 +0200
24001 +++ linux-mips/include/asm-mips/pb1100.h 2005-01-30 09:10:29.000000000 +0100
24002 @@ -1,5 +1,5 @@
24003 /*
24004 - * Alchemy Semi PB1100 Referrence Board
24005 + * AMD Alchemy PB1100 Reference Boards
24006 *
24007 * Copyright 2001 MontaVista Software Inc.
24008 * Author: MontaVista Software, Inc.
24009 @@ -27,55 +27,108 @@
24010 #ifndef __ASM_PB1100_H
24011 #define __ASM_PB1100_H
24012
24013 -#define PB1100_IDENT 0xAE000000
24014 -#define BOARD_STATUS_REG 0xAE000004
24015 - #define PB1100_ROM_SEL (1<<15)
24016 - #define PB1100_ROM_SIZ (1<<14)
24017 - #define PB1100_SWAP_BOOT (1<<13)
24018 - #define PB1100_FLASH_WP (1<<12)
24019 - #define PB1100_ROM_H_STS (1<<11)
24020 - #define PB1100_ROM_L_STS (1<<10)
24021 - #define PB1100_FLASH_H_STS (1<<9)
24022 - #define PB1100_FLASH_L_STS (1<<8)
24023 - #define PB1100_SRAM_SIZ (1<<7)
24024 - #define PB1100_TSC_BUSY (1<<6)
24025 - #define PB1100_PCMCIA_VS_MASK (3<<4)
24026 - #define PB1100_RS232_CD (1<<3)
24027 - #define PB1100_RS232_CTS (1<<2)
24028 - #define PB1100_RS232_DSR (1<<1)
24029 - #define PB1100_RS232_RI (1<<0)
24030 -
24031 -#define PB1100_IRDA_RS232 0xAE00000C
24032 - #define PB1100_IRDA_FULL (0<<14) /* full power */
24033 - #define PB1100_IRDA_SHUTDOWN (1<<14)
24034 - #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
24035 - #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
24036 - #define PB1100_IRDA_FIR (1<<13)
24037 -
24038 -#define PCMCIA_BOARD_REG 0xAE000010
24039 - #define PB1100_SD_WP1_RO (1<<15) /* read only */
24040 - #define PB1100_SD_WP0_RO (1<<14) /* read only */
24041 - #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
24042 - #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
24043 - #define PB1100_SEL_SD_CONN1 (1<<9)
24044 - #define PB1100_SEL_SD_CONN0 (1<<8)
24045 - #define PC_DEASSERT_RST (1<<7)
24046 - #define PC_DRV_EN (1<<4)
24047 -
24048 -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
24049 -
24050 -#define PB1100_RST_VDDI 0xAE00001C
24051 - #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
24052 - #define PB1100_VDDI_MASK (0x1F)
24053 +#define BCSR_KSEG1_ADDR 0xAE000000
24054 +
24055 +/*
24056 + * Overlay data structure of the Pb1100 board registers.
24057 + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
24058 + */
24059 +typedef volatile struct
24060 +{
24061 + /*00*/ unsigned short whoami;
24062 + unsigned short reserved0;
24063 + /*04*/ unsigned short status;
24064 + unsigned short reserved1;
24065 + /*08*/ unsigned short switches;
24066 + unsigned short reserved2;
24067 + /*0C*/ unsigned short resets;
24068 + unsigned short reserved3;
24069 + /*10*/ unsigned short pcmcia;
24070 + unsigned short reserved4;
24071 + /*14*/ unsigned short graphics;
24072 + unsigned short reserved5;
24073 + /*18*/ unsigned short leds;
24074 + unsigned short reserved6;
24075 + /*1C*/ unsigned short swreset;
24076 + unsigned short reserved7;
24077 +
24078 +} BCSR;
24079
24080 -#define PB1100_LEDS 0xAE000018
24081
24082 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
24083 - * 7:0 is the LED Display's decimal points.
24084 +/*
24085 + * Register/mask bit definitions for the BCSRs
24086 */
24087 -#define PB1100_HEX_LED 0xAE000018
24088 +#define BCSR_WHOAMI_DCID 0x000F
24089 +#define BCSR_WHOAMI_CPLD 0x00F0
24090 +#define BCSR_WHOAMI_BOARD 0x0F00
24091 +
24092 +#define BCSR_STATUS_RS232_RI 0x0001
24093 +#define BCSR_STATUS_RS232_DSR 0x0002
24094 +#define BCSR_STATUS_RS232_CTS 0x0004
24095 +#define BCSR_STATUS_RS232_CD 0x0008
24096 +#define BCSR_STATUS_PCMCIA_VS_MASK 0x0030
24097 +#define BCSR_STATUS_TSC_BUSY 0x0040
24098 +#define BCSR_STATUS_SRAM_SIZ 0x0080
24099 +#define BCSR_STATUS_FLASH_L_STS 0x0100
24100 +#define BCSR_STATUS_FLASH_H_STS 0x0200
24101 +#define BCSR_STATUS_ROM_H_STS 0x0400
24102 +#define BCSR_STATUS_ROM_L_STS 0x0800
24103 +#define BCSR_STATUS_FLASH_WP 0x1000
24104 +#define BCSR_STATUS_SWAP_BOOT 0x2000
24105 +#define BCSR_STATUS_ROM_SIZ 0x4000
24106 +#define BCSR_STATUS_ROM_SEL 0x8000
24107 +
24108 +#define BCSR_SWITCHES_DIP 0x00FF
24109 +#define BCSR_SWITCHES_DIP_1 0x0080
24110 +#define BCSR_SWITCHES_DIP_2 0x0040
24111 +#define BCSR_SWITCHES_DIP_3 0x0020
24112 +#define BCSR_SWITCHES_DIP_4 0x0010
24113 +#define BCSR_SWITCHES_DIP_5 0x0008
24114 +#define BCSR_SWITCHES_DIP_6 0x0004
24115 +#define BCSR_SWITCHES_DIP_7 0x0002
24116 +#define BCSR_SWITCHES_DIP_8 0x0001
24117 +#define BCSR_SWITCHES_ROTARY 0x0F00
24118 +#define BCSR_SWITCHES_SDO_CL 0x8000
24119 +
24120 +#define BCSR_RESETS_PHY0 0x0001
24121 +#define BCSR_RESETS_PHY1 0x0002
24122 +#define BCSR_RESETS_DC 0x0004
24123 +#define BCSR_RESETS_RS232_RTS 0x0100
24124 +#define BCSR_RESETS_RS232_DTR 0x0200
24125 +#define BCSR_RESETS_FIR_SEL 0x2000
24126 +#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
24127 +#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
24128 +#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
24129 +#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
24130 +#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
24131 +
24132 +#define BCSR_PCMCIA_PC0VPP 0x0003
24133 +#define BCSR_PCMCIA_PC0VCC 0x000C
24134 +#define BCSR_PCMCIA_PC0_DR_VEN 0x0010
24135 +#define BCSR_PCMCIA_PC0RST 0x0080
24136 +#define BCSR_PCMCIA_SEL_SD_CON0 0x0100
24137 +#define BCSR_PCMCIA_SEL_SD_CON1 0x0200
24138 +#define BCSR_PCMCIA_SD0_PWR 0x0400
24139 +#define BCSR_PCMCIA_SD1_PWR 0x0800
24140 +#define BCSR_PCMCIA_SD0_WP 0x4000
24141 +#define BCSR_PCMCIA_SD1_WP 0x8000
24142 +
24143 +#define PB1100_G_CONTROL 0xAE000014
24144 +#define BCSR_GRAPHICS_GPX_SMPASS 0x0010
24145 +#define BCSR_GRAPHICS_GPX_BIG_ENDIAN 0x0020
24146 +#define BCSR_GRAPHICS_GPX_RST 0x0040
24147 +
24148 +#define BCSR_LEDS_DECIMALS 0x00FF
24149 +#define BCSR_LEDS_LED0 0x0100
24150 +#define BCSR_LEDS_LED1 0x0200
24151 +#define BCSR_LEDS_LED2 0x0400
24152 +#define BCSR_LEDS_LED3 0x0800
24153 +
24154 +#define BCSR_SWRESET_RESET 0x0080
24155 +#define BCSR_VDDI_VDI 0x001F
24156
24157 -/* PCMCIA PB1100 specific defines */
24158 +
24159 + /* PCMCIA Pb1x00 specific defines */
24160 #define PCMCIA_MAX_SOCK 0
24161 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
24162
24163 @@ -83,3 +136,4 @@
24164 #define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
24165
24166 #endif /* __ASM_PB1100_H */
24167 +
24168 diff -Nur linux-2.4.29/include/asm-mips/pb1200.h linux-mips/include/asm-mips/pb1200.h
24169 --- linux-2.4.29/include/asm-mips/pb1200.h 1970-01-01 01:00:00.000000000 +0100
24170 +++ linux-mips/include/asm-mips/pb1200.h 2005-01-30 09:01:28.000000000 +0100
24171 @@ -0,0 +1,244 @@
24172 +/*
24173 + * AMD Alchemy PB1200 Referrence Board
24174 + * Board Registers defines.
24175 + *
24176 + * ########################################################################
24177 + *
24178 + * This program is free software; you can distribute it and/or modify it
24179 + * under the terms of the GNU General Public License (Version 2) as
24180 + * published by the Free Software Foundation.
24181 + *
24182 + * This program is distributed in the hope it will be useful, but WITHOUT
24183 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24184 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24185 + * for more details.
24186 + *
24187 + * You should have received a copy of the GNU General Public License along
24188 + * with this program; if not, write to the Free Software Foundation, Inc.,
24189 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24190 + *
24191 + * ########################################################################
24192 + *
24193 + *
24194 + */
24195 +#ifndef __ASM_PB1200_H
24196 +#define __ASM_PB1200_H
24197 +
24198 +#include <linux/types.h>
24199 +
24200 +// This is defined in au1000.h with bogus value
24201 +#undef AU1X00_EXTERNAL_INT
24202 +
24203 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
24204 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
24205 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
24206 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
24207 +
24208 +/* SPI and SMB are muxed on the Pb1200 board.
24209 + Refer to board documentation.
24210 + */
24211 +#define SPI_PSC_BASE PSC0_BASE_ADDR
24212 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
24213 +/* AC97 and I2S are muxed on the Pb1200 board.
24214 + Refer to board documentation.
24215 + */
24216 +#define AC97_PSC_BASE PSC1_BASE_ADDR
24217 +#define I2S_PSC_BASE PSC1_BASE_ADDR
24218 +
24219 +#define BCSR_KSEG1_ADDR 0xAD800000
24220 +
24221 +typedef volatile struct
24222 +{
24223 + /*00*/ u16 whoami;
24224 + u16 reserved0;
24225 + /*04*/ u16 status;
24226 + u16 reserved1;
24227 + /*08*/ u16 switches;
24228 + u16 reserved2;
24229 + /*0C*/ u16 resets;
24230 + u16 reserved3;
24231 +
24232 + /*10*/ u16 pcmcia;
24233 + u16 reserved4;
24234 + /*14*/ u16 board;
24235 + u16 reserved5;
24236 + /*18*/ u16 disk_leds;
24237 + u16 reserved6;
24238 + /*1C*/ u16 system;
24239 + u16 reserved7;
24240 +
24241 + /*20*/ u16 intclr;
24242 + u16 reserved8;
24243 + /*24*/ u16 intset;
24244 + u16 reserved9;
24245 + /*28*/ u16 intclr_mask;
24246 + u16 reserved10;
24247 + /*2C*/ u16 intset_mask;
24248 + u16 reserved11;
24249 +
24250 + /*30*/ u16 sig_status;
24251 + u16 reserved12;
24252 + /*34*/ u16 int_status;
24253 + u16 reserved13;
24254 + /*38*/ u16 reserved14;
24255 + u16 reserved15;
24256 + /*3C*/ u16 reserved16;
24257 + u16 reserved17;
24258 +
24259 +} BCSR;
24260 +
24261 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
24262 +
24263 +/*
24264 + * Register bit definitions for the BCSRs
24265 + */
24266 +#define BCSR_WHOAMI_DCID 0x000F
24267 +#define BCSR_WHOAMI_CPLD 0x00F0
24268 +#define BCSR_WHOAMI_BOARD 0x0F00
24269 +
24270 +#define BCSR_STATUS_PCMCIA0VS 0x0003
24271 +#define BCSR_STATUS_PCMCIA1VS 0x000C
24272 +#define BCSR_STATUS_SWAPBOOT 0x0040
24273 +#define BCSR_STATUS_FLASHBUSY 0x0100
24274 +#define BCSR_STATUS_IDECBLID 0x0200
24275 +#define BCSR_STATUS_SD0WP 0x0400
24276 +#define BCSR_STATUS_SD1WP 0x0800
24277 +#define BCSR_STATUS_U0RXD 0x1000
24278 +#define BCSR_STATUS_U1RXD 0x2000
24279 +
24280 +#define BCSR_SWITCHES_OCTAL 0x00FF
24281 +#define BCSR_SWITCHES_DIP_1 0x0080
24282 +#define BCSR_SWITCHES_DIP_2 0x0040
24283 +#define BCSR_SWITCHES_DIP_3 0x0020
24284 +#define BCSR_SWITCHES_DIP_4 0x0010
24285 +#define BCSR_SWITCHES_DIP_5 0x0008
24286 +#define BCSR_SWITCHES_DIP_6 0x0004
24287 +#define BCSR_SWITCHES_DIP_7 0x0002
24288 +#define BCSR_SWITCHES_DIP_8 0x0001
24289 +#define BCSR_SWITCHES_ROTARY 0x0F00
24290 +
24291 +#define BCSR_RESETS_ETH 0x0001
24292 +#define BCSR_RESETS_CAMERA 0x0002
24293 +#define BCSR_RESETS_DC 0x0004
24294 +#define BCSR_RESETS_IDE 0x0008
24295 +/* not resets but in the same register */
24296 +#define BCSR_RESETS_WSCFSM 0x0800
24297 +#define BCSR_RESETS_PCS0MUX 0x1000
24298 +#define BCSR_RESETS_PCS1MUX 0x2000
24299 +#define BCSR_RESETS_SPISEL 0x4000
24300 +#define BCSR_RESETS_SD1MUX 0x8000
24301 +
24302 +#define BCSR_PCMCIA_PC0VPP 0x0003
24303 +#define BCSR_PCMCIA_PC0VCC 0x000C
24304 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
24305 +#define BCSR_PCMCIA_PC0RST 0x0080
24306 +#define BCSR_PCMCIA_PC1VPP 0x0300
24307 +#define BCSR_PCMCIA_PC1VCC 0x0C00
24308 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
24309 +#define BCSR_PCMCIA_PC1RST 0x8000
24310 +
24311 +#define BCSR_BOARD_LCDVEE 0x0001
24312 +#define BCSR_BOARD_LCDVDD 0x0002
24313 +#define BCSR_BOARD_LCDBL 0x0004
24314 +#define BCSR_BOARD_CAMSNAP 0x0010
24315 +#define BCSR_BOARD_CAMPWR 0x0020
24316 +#define BCSR_BOARD_SD0PWR 0x0040
24317 +#define BCSR_BOARD_SD1PWR 0x0080
24318 +
24319 +#define BCSR_LEDS_DECIMALS 0x00FF
24320 +#define BCSR_LEDS_LED0 0x0100
24321 +#define BCSR_LEDS_LED1 0x0200
24322 +#define BCSR_LEDS_LED2 0x0400
24323 +#define BCSR_LEDS_LED3 0x0800
24324 +
24325 +#define BCSR_SYSTEM_VDDI 0x001F
24326 +#define BCSR_SYSTEM_POWEROFF 0x4000
24327 +#define BCSR_SYSTEM_RESET 0x8000
24328 +
24329 +/* Bit positions for the different interrupt sources */
24330 +#define BCSR_INT_IDE 0x0001
24331 +#define BCSR_INT_ETH 0x0002
24332 +#define BCSR_INT_PC0 0x0004
24333 +#define BCSR_INT_PC0STSCHG 0x0008
24334 +#define BCSR_INT_PC1 0x0010
24335 +#define BCSR_INT_PC1STSCHG 0x0020
24336 +#define BCSR_INT_DC 0x0040
24337 +#define BCSR_INT_FLASHBUSY 0x0080
24338 +#define BCSR_INT_PC0INSERT 0x0100
24339 +#define BCSR_INT_PC0EJECT 0x0200
24340 +#define BCSR_INT_PC1INSERT 0x0400
24341 +#define BCSR_INT_PC1EJECT 0x0800
24342 +#define BCSR_INT_SD0INSERT 0x1000
24343 +#define BCSR_INT_SD0EJECT 0x2000
24344 +#define BCSR_INT_SD1INSERT 0x4000
24345 +#define BCSR_INT_SD1EJECT 0x8000
24346 +
24347 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
24348 +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
24349 +
24350 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
24351 +#define AU1XXX_ATA_PHYS_LEN (0x100)
24352 +#define AU1XXX_ATA_REG_OFFSET (5)
24353 +#define AU1XXX_ATA_INT PB1200_IDE_INT
24354 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
24355 +#define AU1XXX_ATA_RQSIZE 128
24356 +
24357 +#define NAND_PHYS_ADDR 0x1C000000
24358 +
24359 +/* Timing values as described in databook, * ns value stripped of
24360 + * lower 2 bits.
24361 + * These defines are here rather than an SOC1200 generic file because
24362 + * the parts chosen on another board may be different and may require
24363 + * different timings.
24364 + */
24365 +#define NAND_T_H (18 >> 2)
24366 +#define NAND_T_PUL (30 >> 2)
24367 +#define NAND_T_SU (30 >> 2)
24368 +#define NAND_T_WH (30 >> 2)
24369 +
24370 +/* Bitfield shift amounts */
24371 +#define NAND_T_H_SHIFT 0
24372 +#define NAND_T_PUL_SHIFT 4
24373 +#define NAND_T_SU_SHIFT 8
24374 +#define NAND_T_WH_SHIFT 12
24375 +
24376 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24377 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24378 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24379 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24380 +
24381 +
24382 +/*
24383 + * External Interrupts for Pb1200 as of 8/6/2004.
24384 + * Bit positions in the CPLD registers can be calculated by taking
24385 + * the interrupt define and subtracting the PB1200_INT_BEGIN value.
24386 + * *example: IDE bis pos is = 64 - 64
24387 + ETH bit pos is = 65 - 64
24388 + */
24389 +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
24390 +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
24391 +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
24392 +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
24393 +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
24394 +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
24395 +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
24396 +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
24397 +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
24398 +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
24399 +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
24400 +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
24401 +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
24402 +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
24403 +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
24404 +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
24405 +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
24406 +
24407 +#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
24408 +
24409 +/* For drivers/pcmcia/au1000_db1x00.c */
24410 +#define BOARD_PC0_INT PB1200_PC0_INT
24411 +#define BOARD_PC1_INT PB1200_PC1_INT
24412 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
24413 +
24414 +#endif /* __ASM_PB1200_H */
24415 +
24416 diff -Nur linux-2.4.29/include/asm-mips/pb1550.h linux-mips/include/asm-mips/pb1550.h
24417 --- linux-2.4.29/include/asm-mips/pb1550.h 2005-01-19 15:10:12.000000000 +0100
24418 +++ linux-mips/include/asm-mips/pb1550.h 2005-01-30 09:01:28.000000000 +0100
24419 @@ -30,13 +30,11 @@
24420
24421 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
24422 #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
24423 -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
24424 -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
24425 -
24426 #define SPI_PSC_BASE PSC0_BASE_ADDR
24427 #define AC97_PSC_BASE PSC1_BASE_ADDR
24428 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
24429 #define I2S_PSC_BASE PSC3_BASE_ADDR
24430 +#define NAND_CS 1
24431
24432 #define BCSR_PHYS_ADDR 0xAF000000
24433
24434 @@ -160,9 +158,23 @@
24435 #define NAND_T_SU_SHIFT 8
24436 #define NAND_T_WH_SHIFT 12
24437
24438 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24439 - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24440 - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24441 - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24442 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24443 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24444 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24445 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24446 +
24447 +/*
24448 + * Daughter card information.
24449 + */
24450 +#define DAUGHTER_CARD_BASE (0xAC000000)
24451 +#define DAUGHTER_CARD_MEM_SIZE (0xADFFFFFF - DAUGHTER_CARD_BASE + 1)
24452 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_3)
24453 +
24454 +/* DC_IDE and DC_ETHERNET */
24455 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
24456 +#define AU1XXX_ATA_REG_OFFSET (5)
24457 +
24458 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0C000300)
24459 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_3
24460
24461 #endif /* __ASM_PB1550_H */
24462 diff -Nur linux-2.4.29/include/asm-mips/tx4927/tx4927.h linux-mips/include/asm-mips/tx4927/tx4927.h
24463 --- linux-2.4.29/include/asm-mips/tx4927/tx4927.h 2003-08-25 13:44:44.000000000 +0200
24464 +++ linux-mips/include/asm-mips/tx4927/tx4927.h 2004-11-22 19:02:10.000000000 +0100
24465 @@ -88,8 +88,8 @@
24466
24467
24468 /* TX4927 Configuration registers (64-bit registers) */
24469 -#define TX4927_CONFIG_BASE 0xe300
24470 -#define TX4927_CONFIG_CCFG 0xe300
24471 +#define TX4927_CONFIG_BASE 0xe000
24472 +#define TX4927_CONFIG_CCFG 0xe000
24473 #define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
24474 #define TX4927_CONFIG_CCFG_WDRST BM_41_41
24475 #define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
24476 @@ -124,14 +124,14 @@
24477 #define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
24478 #define TX4927_CONFIG_CCFG_ARMODE BM_01_01
24479 #define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
24480 -#define TX4927_CONFIG_REVID 0xe308
24481 +#define TX4927_CONFIG_REVID 0xe008
24482 #define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
24483 #define TX4927_CONFIG_REVID_PCODE BM_16_31
24484 #define TX4927_CONFIG_REVID_MJERREV BM_12_15
24485 #define TX4927_CONFIG_REVID_MINEREV BM_08_11
24486 #define TX4927_CONFIG_REVID_MJREV BM_04_07
24487 #define TX4927_CONFIG_REVID_MINREV BM_00_03
24488 -#define TX4927_CONFIG_PCFG 0xe310
24489 +#define TX4927_CONFIG_PCFG 0xe010
24490 #define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
24491 #define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
24492 #define TX4927_CONFIG_PCFG_DRVCB BM_55_55
24493 @@ -197,10 +197,10 @@
24494 #define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
24495 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
24496 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
24497 -#define TX4927_CONFIG_TOEA 0xe318
24498 +#define TX4927_CONFIG_TOEA 0xe018
24499 #define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
24500 #define TX4927_CONFIG_TOEA_TOEA BM_00_35
24501 -#define TX4927_CONFIG_CLKCTR 0xe320
24502 +#define TX4927_CONFIG_CLKCTR 0xe020
24503 #define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
24504 #define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
24505 #define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
24506 @@ -223,7 +223,7 @@
24507 #define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
24508 #define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
24509 #define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
24510 -#define TX4927_CONFIG_GARBC 0xe330
24511 +#define TX4927_CONFIG_GARBC 0xe030
24512 #define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
24513 #define TX4927_CONFIG_GARBC_SET_09 BM_09_09
24514 #define TX4927_CONFIG_GARBC_ARBMD BM_08_08
24515 @@ -243,7 +243,7 @@
24516 #define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
24517 #define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
24518 #define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
24519 -#define TX4927_CONFIG_RAMP 0xe348
24520 +#define TX4927_CONFIG_RAMP 0xe048
24521 #define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
24522 #define TX4927_CONFIG_RAMP_RAMP BM_00_19
24523 #define TX4927_CONFIG_LIMIT 0xefff
24524 @@ -456,7 +456,7 @@
24525 #define TX4927_ACLC_ACINTSTS 0xf710
24526 #define TX4927_ACLC_ACINTMSTS 0xf714
24527 #define TX4927_ACLC_ACINTEN 0xf718
24528 -#define TX4927_ACLC_ACINTDIS 0xfR71c
24529 +#define TX4927_ACLC_ACINTDIS 0xf71c
24530 #define TX4927_ACLC_ACSEMAPH 0xf720
24531 #define TX4927_ACLC_ACGPIDAT 0xf740
24532 #define TX4927_ACLC_ACGPODAT 0xf744
24533 diff -Nur linux-2.4.29/include/asm-mips/unistd.h linux-mips/include/asm-mips/unistd.h
24534 --- linux-2.4.29/include/asm-mips/unistd.h 2005-01-19 15:10:12.000000000 +0100
24535 +++ linux-mips/include/asm-mips/unistd.h 2004-11-24 21:30:06.000000000 +0100
24536 @@ -760,7 +760,7 @@
24537 if (__a3 == 0) \
24538 return (type) __v0; \
24539 errno = __v0; \
24540 - return -1; \
24541 + return (type)-1; \
24542 }
24543
24544 /*
24545 @@ -788,7 +788,7 @@
24546 if (__a3 == 0) \
24547 return (type) __v0; \
24548 errno = __v0; \
24549 - return -1; \
24550 + return (type)-1; \
24551 }
24552
24553 #define _syscall2(type,name,atype,a,btype,b) \
24554 @@ -813,7 +813,7 @@
24555 if (__a3 == 0) \
24556 return (type) __v0; \
24557 errno = __v0; \
24558 - return -1; \
24559 + return (type)-1; \
24560 }
24561
24562 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
24563 @@ -839,7 +839,7 @@
24564 if (__a3 == 0) \
24565 return (type) __v0; \
24566 errno = __v0; \
24567 - return -1; \
24568 + return (type)-1; \
24569 }
24570
24571 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
24572 @@ -865,7 +865,7 @@
24573 if (__a3 == 0) \
24574 return (type) __v0; \
24575 errno = __v0; \
24576 - return -1; \
24577 + return (type)-1; \
24578 }
24579
24580 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
24581 @@ -902,7 +902,7 @@
24582 if (__a3 == 0) \
24583 return (type) __v0; \
24584 errno = __v0; \
24585 - return -1; \
24586 + return (type)-1; \
24587 }
24588
24589 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24590 @@ -935,7 +935,7 @@
24591 if (__a3 == 0) \
24592 return (type) __v0; \
24593 errno = __v0; \
24594 - return -1; \
24595 + return (type)-1; \
24596 }
24597
24598 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
24599 @@ -966,7 +966,7 @@
24600 if (__a3 == 0) \
24601 return (type) __v0; \
24602 errno = __v0; \
24603 - return -1; \
24604 + return (type)-1; \
24605 }
24606
24607 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24608 @@ -995,7 +995,7 @@
24609 if (__a3 == 0) \
24610 return (type) __v0; \
24611 errno = __v0; \
24612 - return -1; \
24613 + return (type)-1; \
24614 }
24615
24616 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
24617 diff -Nur linux-2.4.29/include/asm-mips64/hazards.h linux-mips/include/asm-mips64/hazards.h
24618 --- linux-2.4.29/include/asm-mips64/hazards.h 2004-02-18 14:36:32.000000000 +0100
24619 +++ linux-mips/include/asm-mips64/hazards.h 2004-11-25 23:18:38.000000000 +0100
24620 @@ -3,7 +3,7 @@
24621 * License. See the file "COPYING" in the main directory of this archive
24622 * for more details.
24623 *
24624 - * Copyright (C) 2003 Ralf Baechle
24625 + * Copyright (C) 2003, 2004 Ralf Baechle
24626 */
24627 #ifndef _ASM_HAZARDS_H
24628 #define _ASM_HAZARDS_H
24629 @@ -12,37 +12,185 @@
24630
24631 #ifdef __ASSEMBLY__
24632
24633 + .macro _ssnop
24634 + sll $0, $0, 1
24635 + .endm
24636 +
24637 /*
24638 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
24639 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
24640 * for data translations should not occur for 3 cpu cycles.
24641 */
24642 #ifdef CONFIG_CPU_RM9000
24643 -#define rm9000_tlb_hazard \
24644 +
24645 +#define mtc0_tlbw_hazard \
24646 + .set push; \
24647 + .set mips32; \
24648 + _ssnop; _ssnop; _ssnop; _ssnop; \
24649 + .set pop
24650 +
24651 +#define tlbw_eret_hazard \
24652 + .set push; \
24653 .set mips32; \
24654 - ssnop; ssnop; ssnop; ssnop; \
24655 - .set mips0
24656 + _ssnop; _ssnop; _ssnop; _ssnop; \
24657 + .set pop
24658 +
24659 #else
24660 -#define rm9000_tlb_hazard
24661 +
24662 +/*
24663 + * The taken branch will result in a two cycle penalty for the two killed
24664 + * instructions on R4000 / R4400. Other processors only have a single cycle
24665 + * hazard so this is nice trick to have an optimal code for a range of
24666 + * processors.
24667 + */
24668 +#define mtc0_tlbw_hazard \
24669 + b . + 8
24670 +#define tlbw_eret_hazard
24671 #endif
24672
24673 +/*
24674 + * mtc0->mfc0 hazard
24675 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
24676 + * It is a MIPS32R2 processor so ehb will clear the hazard.
24677 + */
24678 +
24679 +#ifdef CONFIG_CPU_MIPSR2
24680 +/*
24681 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
24682 + */
24683 + .macro ehb
24684 + sll $0, $0, 3
24685 + .endm
24686 +
24687 +#define irq_enable_hazard \
24688 + ehb # irq_enable_hazard
24689 +
24690 +#define irq_disable_hazard \
24691 + ehb # irq_disable_hazard
24692 +
24693 #else
24694
24695 +#define irq_enable_hazard
24696 +#define irq_disable_hazard
24697 +
24698 +#endif
24699 +
24700 +#else /* __ASSEMBLY__ */
24701 +
24702 /*
24703 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
24704 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
24705 * for data translations should not occur for 3 cpu cycles.
24706 */
24707 #ifdef CONFIG_CPU_RM9000
24708 -#define rm9000_tlb_hazard() \
24709 +
24710 +#define mtc0_tlbw_hazard() \
24711 + __asm__ __volatile__( \
24712 + ".set\tmips32\n\t" \
24713 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
24714 + ".set\tmips0")
24715 +
24716 +#define tlbw_use_hazard() \
24717 __asm__ __volatile__( \
24718 ".set\tmips32\n\t" \
24719 - "ssnop; ssnop; ssnop; ssnop\n\t" \
24720 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
24721 ".set\tmips0")
24722 #else
24723 -#define rm9000_tlb_hazard() do { } while (0)
24724 +
24725 +/*
24726 + * Overkill warning ...
24727 + */
24728 +#define mtc0_tlbw_hazard() \
24729 + __asm__ __volatile__( \
24730 + ".set noreorder\n\t" \
24731 + "nop; nop; nop; nop; nop; nop;\n\t" \
24732 + ".set reorder\n\t")
24733 +
24734 +#define tlbw_use_hazard() \
24735 + __asm__ __volatile__( \
24736 + ".set noreorder\n\t" \
24737 + "nop; nop; nop; nop; nop; nop;\n\t" \
24738 + ".set reorder\n\t")
24739 +
24740 #endif
24741
24742 +/*
24743 + * mtc0->mfc0 hazard
24744 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
24745 + * It is a MIPS32R2 processor so ehb will clear the hazard.
24746 + */
24747 +
24748 +#ifdef CONFIG_CPU_MIPSR2
24749 +/*
24750 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
24751 + */
24752 +__asm__(
24753 + " .macro ehb \n\t"
24754 + " sll $0, $0, 3 \n\t"
24755 + " .endm \n\t"
24756 + " \n\t"
24757 + " .macro\tirq_enable_hazard \n\t"
24758 + " ehb \n\t"
24759 + " .endm \n\t"
24760 + " \n\t"
24761 + " .macro\tirq_disable_hazard \n\t"
24762 + " ehb \n\t"
24763 + " .endm");
24764 +
24765 +#define irq_enable_hazard() \
24766 + __asm__ __volatile__( \
24767 + "ehb\t\t\t\t# irq_enable_hazard")
24768 +
24769 +#define irq_disable_hazard() \
24770 + __asm__ __volatile__( \
24771 + "ehb\t\t\t\t# irq_disable_hazard")
24772 +
24773 +#elif defined(CONFIG_CPU_R10000)
24774 +
24775 +/*
24776 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
24777 + */
24778 +
24779 +__asm__(
24780 + " .macro\tirq_enable_hazard \n\t"
24781 + " .endm \n\t"
24782 + " \n\t"
24783 + " .macro\tirq_disable_hazard \n\t"
24784 + " .endm");
24785 +
24786 +#define irq_enable_hazard() do { } while (0)
24787 +#define irq_disable_hazard() do { } while (0)
24788 +
24789 +#else
24790 +
24791 +/*
24792 + * Default for classic MIPS processors. Assume worst case hazards but don't
24793 + * care about the irq_enable_hazard - sooner or later the hardware will
24794 + * enable it and we don't care when exactly.
24795 + */
24796 +
24797 +__asm__(
24798 + " .macro _ssnop \n\t"
24799 + " sll $0, $2, 1 \n\t"
24800 + " .endm \n\t"
24801 + " \n\t"
24802 + " # \n\t"
24803 + " # There is a hazard but we do not care \n\t"
24804 + " # \n\t"
24805 + " .macro\tirq_enable_hazard \n\t"
24806 + " .endm \n\t"
24807 + " \n\t"
24808 + " .macro\tirq_disable_hazard \n\t"
24809 + " _ssnop; _ssnop; _ssnop \n\t"
24810 + " .endm");
24811 +
24812 +#define irq_enable_hazard() do { } while (0)
24813 +#define irq_disable_hazard() \
24814 + __asm__ __volatile__( \
24815 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
24816 +
24817 #endif
24818
24819 +#endif /* __ASSEMBLY__ */
24820 +
24821 #endif /* _ASM_HAZARDS_H */
24822 diff -Nur linux-2.4.29/include/asm-mips64/mipsregs.h linux-mips/include/asm-mips64/mipsregs.h
24823 --- linux-2.4.29/include/asm-mips64/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
24824 +++ linux-mips/include/asm-mips64/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
24825 @@ -757,10 +757,18 @@
24826 #define read_c0_config1() __read_32bit_c0_register($16, 1)
24827 #define read_c0_config2() __read_32bit_c0_register($16, 2)
24828 #define read_c0_config3() __read_32bit_c0_register($16, 3)
24829 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
24830 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
24831 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
24832 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
24833 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
24834 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
24835 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
24836 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
24837 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
24838 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
24839 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
24840 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
24841
24842 /*
24843 * The WatchLo register. There may be upto 8 of them.
24844 @@ -856,42 +864,34 @@
24845 */
24846 static inline void tlb_probe(void)
24847 {
24848 - rm9000_tlb_hazard();
24849 __asm__ __volatile__(
24850 ".set noreorder\n\t"
24851 "tlbp\n\t"
24852 ".set reorder");
24853 - rm9000_tlb_hazard();
24854 }
24855
24856 static inline void tlb_read(void)
24857 {
24858 - rm9000_tlb_hazard();
24859 __asm__ __volatile__(
24860 ".set noreorder\n\t"
24861 "tlbr\n\t"
24862 ".set reorder");
24863 - rm9000_tlb_hazard();
24864 }
24865
24866 static inline void tlb_write_indexed(void)
24867 {
24868 - rm9000_tlb_hazard();
24869 __asm__ __volatile__(
24870 ".set noreorder\n\t"
24871 "tlbwi\n\t"
24872 ".set reorder");
24873 - rm9000_tlb_hazard();
24874 }
24875
24876 static inline void tlb_write_random(void)
24877 {
24878 - rm9000_tlb_hazard();
24879 __asm__ __volatile__(
24880 ".set noreorder\n\t"
24881 "tlbwr\n\t"
24882 ".set reorder");
24883 - rm9000_tlb_hazard();
24884 }
24885
24886 /*
24887 diff -Nur linux-2.4.29/include/asm-mips64/unistd.h linux-mips/include/asm-mips64/unistd.h
24888 --- linux-2.4.29/include/asm-mips64/unistd.h 2005-01-19 15:10:12.000000000 +0100
24889 +++ linux-mips/include/asm-mips64/unistd.h 2004-11-24 21:30:06.000000000 +0100
24890 @@ -760,7 +760,7 @@
24891 if (__a3 == 0) \
24892 return (type) __v0; \
24893 errno = __v0; \
24894 - return -1; \
24895 + return (type)-1; \
24896 }
24897
24898 /*
24899 @@ -788,7 +788,7 @@
24900 if (__a3 == 0) \
24901 return (type) __v0; \
24902 errno = __v0; \
24903 - return -1; \
24904 + return (type)-1; \
24905 }
24906
24907 #define _syscall2(type,name,atype,a,btype,b) \
24908 @@ -813,7 +813,7 @@
24909 if (__a3 == 0) \
24910 return (type) __v0; \
24911 errno = __v0; \
24912 - return -1; \
24913 + return (type)-1; \
24914 }
24915
24916 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
24917 @@ -839,7 +839,7 @@
24918 if (__a3 == 0) \
24919 return (type) __v0; \
24920 errno = __v0; \
24921 - return -1; \
24922 + return (type)-1; \
24923 }
24924
24925 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
24926 @@ -865,7 +865,7 @@
24927 if (__a3 == 0) \
24928 return (type) __v0; \
24929 errno = __v0; \
24930 - return -1; \
24931 + return (type)-1; \
24932 }
24933
24934 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
24935 @@ -902,7 +902,7 @@
24936 if (__a3 == 0) \
24937 return (type) __v0; \
24938 errno = __v0; \
24939 - return -1; \
24940 + return (type)-1; \
24941 }
24942
24943 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24944 @@ -935,7 +935,7 @@
24945 if (__a3 == 0) \
24946 return (type) __v0; \
24947 errno = __v0; \
24948 - return -1; \
24949 + return (type)-1; \
24950 }
24951
24952 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
24953 @@ -966,7 +966,7 @@
24954 if (__a3 == 0) \
24955 return (type) __v0; \
24956 errno = __v0; \
24957 - return -1; \
24958 + return (type)-1; \
24959 }
24960
24961 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24962 @@ -995,7 +995,7 @@
24963 if (__a3 == 0) \
24964 return (type) __v0; \
24965 errno = __v0; \
24966 - return -1; \
24967 + return (type)-1; \
24968 }
24969
24970 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
24971 diff -Nur linux-2.4.29/include/asm-ppc/param.h linux-mips/include/asm-ppc/param.h
24972 --- linux-2.4.29/include/asm-ppc/param.h 2003-06-13 16:51:38.000000000 +0200
24973 +++ linux-mips/include/asm-ppc/param.h 2003-07-05 05:23:46.000000000 +0200
24974 @@ -3,6 +3,9 @@
24975
24976 #ifndef HZ
24977 #define HZ 100
24978 +#ifdef __KERNEL__
24979 +#define hz_to_std(a) (a)
24980 +#endif
24981 #endif
24982
24983 #define EXEC_PAGESIZE 4096
24984 diff -Nur linux-2.4.29/include/asm-s390/param.h linux-mips/include/asm-s390/param.h
24985 --- linux-2.4.29/include/asm-s390/param.h 2001-02-13 23:13:44.000000000 +0100
24986 +++ linux-mips/include/asm-s390/param.h 2001-03-09 21:34:48.000000000 +0100
24987 @@ -11,6 +11,9 @@
24988
24989 #ifndef HZ
24990 #define HZ 100
24991 +#ifdef __KERNEL__
24992 +#define hz_to_std(a) (a)
24993 +#endif
24994 #endif
24995
24996 #define EXEC_PAGESIZE 4096
24997 diff -Nur linux-2.4.29/include/asm-sh/param.h linux-mips/include/asm-sh/param.h
24998 --- linux-2.4.29/include/asm-sh/param.h 2001-01-04 22:19:13.000000000 +0100
24999 +++ linux-mips/include/asm-sh/param.h 2001-01-11 05:02:45.000000000 +0100
25000 @@ -3,6 +3,9 @@
25001
25002 #ifndef HZ
25003 #define HZ 100
25004 +#ifdef __KERNEL__
25005 +#define hz_to_std(a) (a)
25006 +#endif
25007 #endif
25008
25009 #define EXEC_PAGESIZE 4096
25010 diff -Nur linux-2.4.29/include/asm-sparc/param.h linux-mips/include/asm-sparc/param.h
25011 --- linux-2.4.29/include/asm-sparc/param.h 2000-10-30 23:34:12.000000000 +0100
25012 +++ linux-mips/include/asm-sparc/param.h 2000-11-23 03:00:56.000000000 +0100
25013 @@ -4,6 +4,9 @@
25014
25015 #ifndef HZ
25016 #define HZ 100
25017 +#ifdef __KERNEL__
25018 +#define hz_to_std(a) (a)
25019 +#endif
25020 #endif
25021
25022 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
25023 diff -Nur linux-2.4.29/include/asm-sparc64/param.h linux-mips/include/asm-sparc64/param.h
25024 --- linux-2.4.29/include/asm-sparc64/param.h 2000-10-30 23:34:12.000000000 +0100
25025 +++ linux-mips/include/asm-sparc64/param.h 2000-11-23 03:00:56.000000000 +0100
25026 @@ -4,6 +4,9 @@
25027
25028 #ifndef HZ
25029 #define HZ 100
25030 +#ifdef __KERNEL__
25031 +#define hz_to_std(a) (a)
25032 +#endif
25033 #endif
25034
25035 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
25036 diff -Nur linux-2.4.29/include/linux/i2c-algo-au1550.h linux-mips/include/linux/i2c-algo-au1550.h
25037 --- linux-2.4.29/include/linux/i2c-algo-au1550.h 1970-01-01 01:00:00.000000000 +0100
25038 +++ linux-mips/include/linux/i2c-algo-au1550.h 2004-07-07 02:38:02.000000000 +0200
25039 @@ -0,0 +1,31 @@
25040 +/*
25041 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
25042 + *
25043 + * This program is free software; you can redistribute it and/or modify
25044 + * it under the terms of the GNU General Public License as published by
25045 + * the Free Software Foundation; either version 2 of the License, or
25046 + * (at your option) any later version.
25047 + *
25048 + * This program is distributed in the hope that it will be useful,
25049 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
25050 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25051 + * GNU General Public License for more details.
25052 + *
25053 + * You should have received a copy of the GNU General Public License
25054 + * along with this program; if not, write to the Free Software
25055 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25056 + */
25057 +
25058 +#ifndef I2C_ALGO_AU1550_H
25059 +#define I2C_ALGO_AU1550_H 1
25060 +
25061 +struct i2c_algo_au1550_data {
25062 + u32 psc_base;
25063 + int xfer_timeout;
25064 + int ack_timeout;
25065 +};
25066 +
25067 +int i2c_au1550_add_bus(struct i2c_adapter *);
25068 +int i2c_au1550_del_bus(struct i2c_adapter *);
25069 +
25070 +#endif /* I2C_ALGO_AU1550_H */
25071 diff -Nur linux-2.4.29/include/linux/i2c-id.h linux-mips/include/linux/i2c-id.h
25072 --- linux-2.4.29/include/linux/i2c-id.h 2004-02-18 14:36:32.000000000 +0100
25073 +++ linux-mips/include/linux/i2c-id.h 2004-07-07 02:38:02.000000000 +0200
25074 @@ -156,6 +156,8 @@
25075
25076 #define I2C_ALGO_SGI 0x130000 /* SGI algorithm */
25077
25078 +#define I2C_ALGO_AU1550 0x140000 /* Alchemy Au1550 PSC */
25079 +
25080 #define I2C_ALGO_EXP 0x800000 /* experimental */
25081
25082 #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
25083 @@ -204,6 +206,9 @@
25084 #define I2C_HW_SGI_VINO 0x00
25085 #define I2C_HW_SGI_MACE 0x01
25086
25087 +/* --- Au1550 PSC adapters */
25088 +#define I2C_HW_AU1550_PSC 0x00
25089 +
25090 /* --- SMBus only adapters */
25091 #define I2C_HW_SMBUS_PIIX4 0x00
25092 #define I2C_HW_SMBUS_ALI15X3 0x01
25093 diff -Nur linux-2.4.29/include/linux/sched.h linux-mips/include/linux/sched.h
25094 --- linux-2.4.29/include/linux/sched.h 2005-01-19 15:10:12.000000000 +0100
25095 +++ linux-mips/include/linux/sched.h 2004-11-29 18:47:18.000000000 +0100
25096 @@ -617,6 +617,10 @@
25097 extern int in_group_p(gid_t);
25098 extern int in_egroup_p(gid_t);
25099
25100 +extern ATTRIB_NORET void cpu_idle(void);
25101 +
25102 +extern void release_task(struct task_struct * p);
25103 +
25104 extern void proc_caches_init(void);
25105 extern void flush_signals(struct task_struct *);
25106 extern void flush_signal_handlers(struct task_struct *);
25107 diff -Nur linux-2.4.29/include/linux/serial.h linux-mips/include/linux/serial.h
25108 --- linux-2.4.29/include/linux/serial.h 2002-08-03 02:39:45.000000000 +0200
25109 +++ linux-mips/include/linux/serial.h 2004-07-31 02:17:57.000000000 +0200
25110 @@ -75,7 +75,8 @@
25111 #define PORT_16654 11
25112 #define PORT_16850 12
25113 #define PORT_RSA 13 /* RSA-DV II/S card */
25114 -#define PORT_MAX 13
25115 +#define PORT_SB1250 14
25116 +#define PORT_MAX 14
25117
25118 #define SERIAL_IO_PORT 0
25119 #define SERIAL_IO_HUB6 1
25120 diff -Nur linux-2.4.29/include/linux/swap.h linux-mips/include/linux/swap.h
25121 --- linux-2.4.29/include/linux/swap.h 2005-01-19 15:10:12.000000000 +0100
25122 +++ linux-mips/include/linux/swap.h 2004-11-29 18:47:18.000000000 +0100
25123 @@ -1,6 +1,12 @@
25124 #ifndef _LINUX_SWAP_H
25125 #define _LINUX_SWAP_H
25126
25127 +#include <linux/config.h>
25128 +
25129 +#define MAX_SWAPFILES 32
25130 +
25131 +#ifdef __KERNEL__
25132 +
25133 #include <linux/spinlock.h>
25134 #include <asm/page.h>
25135
25136 @@ -8,8 +14,6 @@
25137 #define SWAP_FLAG_PRIO_MASK 0x7fff
25138 #define SWAP_FLAG_PRIO_SHIFT 0
25139
25140 -#define MAX_SWAPFILES 32
25141 -
25142 /*
25143 * Magic header for a swap area. The first part of the union is
25144 * what the swap magic looks like for the old (limited to 128MB)
25145 @@ -39,8 +43,6 @@
25146 } info;
25147 };
25148
25149 -#ifdef __KERNEL__
25150 -
25151 /*
25152 * Max bad pages in the new format..
25153 */
25154 diff -Nur linux-2.4.29/include/video/newport.h linux-mips/include/video/newport.h
25155 --- linux-2.4.29/include/video/newport.h 2001-04-12 21:20:31.000000000 +0200
25156 +++ linux-mips/include/video/newport.h 2004-09-23 15:32:29.000000000 +0200
25157 @@ -291,8 +291,6 @@
25158 unsigned int _unused2[0x1ef];
25159 struct newport_cregs cgo;
25160 };
25161 -extern struct newport_regs *npregs;
25162 -
25163
25164 typedef struct {
25165 unsigned int drawmode1;
25166 @@ -450,38 +448,26 @@
25167
25168 /* Miscellaneous NEWPORT routines. */
25169 #define BUSY_TIMEOUT 100000
25170 -static __inline__ int newport_wait(void)
25171 +static __inline__ int newport_wait(struct newport_regs *regs)
25172 {
25173 - int i = 0;
25174 + int t = BUSY_TIMEOUT;
25175
25176 - while(i < BUSY_TIMEOUT)
25177 - if(!(npregs->cset.status & NPORT_STAT_GBUSY))
25178 + while (t--)
25179 + if (!(regs->cset.status & NPORT_STAT_GBUSY))
25180 break;
25181 - if(i == BUSY_TIMEOUT)
25182 - return 1;
25183 - return 0;
25184 + return !t;
25185 }
25186
25187 -static __inline__ int newport_bfwait(void)
25188 +static __inline__ int newport_bfwait(struct newport_regs *regs)
25189 {
25190 - int i = 0;
25191 + int t = BUSY_TIMEOUT;
25192
25193 - while(i < BUSY_TIMEOUT)
25194 - if(!(npregs->cset.status & NPORT_STAT_BBUSY))
25195 + while (t--)
25196 + if(!(regs->cset.status & NPORT_STAT_BBUSY))
25197 break;
25198 - if(i == BUSY_TIMEOUT)
25199 - return 1;
25200 - return 0;
25201 + return !t;
25202 }
25203
25204 -/* newport.c and cons_newport.c routines */
25205 -extern struct graphics_ops *newport_probe (int, const char **);
25206 -
25207 -void newport_save (void *);
25208 -void newport_restore (void *);
25209 -void newport_reset (void);
25210 -int newport_ioctl (int card, int cmd, unsigned long arg);
25211 -
25212 /*
25213 * DCBMODE register defines:
25214 */
25215 @@ -564,7 +550,7 @@
25216 {
25217 rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
25218 DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
25219 - newport_bfwait ();
25220 + newport_bfwait (rex);
25221
25222 while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
25223 ;
25224 diff -Nur linux-2.4.29/init/main.c linux-mips/init/main.c
25225 --- linux-2.4.29/init/main.c 2004-11-17 12:54:22.000000000 +0100
25226 +++ linux-mips/init/main.c 2004-11-19 01:28:52.000000000 +0100
25227 @@ -296,7 +296,6 @@
25228
25229
25230 extern void setup_arch(char **);
25231 -extern void cpu_idle(void);
25232
25233 unsigned long wait_init_idle;
25234
25235 diff -Nur linux-2.4.29/kernel/exit.c linux-mips/kernel/exit.c
25236 --- linux-2.4.29/kernel/exit.c 2002-11-29 00:53:15.000000000 +0100
25237 +++ linux-mips/kernel/exit.c 2003-01-11 18:53:18.000000000 +0100
25238 @@ -26,7 +26,7 @@
25239
25240 int getrusage(struct task_struct *, int, struct rusage *);
25241
25242 -static void release_task(struct task_struct * p)
25243 +void release_task(struct task_struct * p)
25244 {
25245 if (p != current) {
25246 #ifdef CONFIG_SMP
25247 diff -Nur linux-2.4.29/kernel/signal.c linux-mips/kernel/signal.c
25248 --- linux-2.4.29/kernel/signal.c 2004-02-18 14:36:32.000000000 +0100
25249 +++ linux-mips/kernel/signal.c 2004-01-20 16:10:34.000000000 +0100
25250 @@ -14,6 +14,7 @@
25251 #include <linux/init.h>
25252 #include <linux/sched.h>
25253
25254 +#include <asm/param.h>
25255 #include <asm/uaccess.h>
25256
25257 /*
25258 @@ -28,6 +29,14 @@
25259 #define SIG_SLAB_DEBUG 0
25260 #endif
25261
25262 +#define DEBUG_SIG 0
25263 +
25264 +#if DEBUG_SIG
25265 +#define SIG_SLAB_DEBUG (SLAB_DEBUG_FREE | SLAB_RED_ZONE /* | SLAB_POISON */)
25266 +#else
25267 +#define SIG_SLAB_DEBUG 0
25268 +#endif
25269 +
25270 static kmem_cache_t *sigqueue_cachep;
25271
25272 atomic_t nr_queued_signals;
25273 @@ -270,6 +279,11 @@
25274 signal_pending(current));
25275 #endif
25276
25277 +#if DEBUG_SIG
25278 +printk("SIG dequeue (%s:%d): %d ", current->comm, current->pid,
25279 + signal_pending(current));
25280 +#endif
25281 +
25282 sig = next_signal(current, mask);
25283 if (sig) {
25284 if (current->notifier) {
25285 @@ -293,6 +307,10 @@
25286 printk(" %d -> %d\n", signal_pending(current), sig);
25287 #endif
25288
25289 +#if DEBUG_SIG
25290 +printk(" %d -> %d\n", signal_pending(current), sig);
25291 +#endif
25292 +
25293 return sig;
25294 }
25295
25296 @@ -540,6 +558,11 @@
25297 printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
25298 #endif
25299
25300 +
25301 +#if DEBUG_SIG
25302 +printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
25303 +#endif
25304 +
25305 ret = -EINVAL;
25306 if (sig < 0 || sig > _NSIG)
25307 goto out_nolock;
25308 @@ -778,8 +801,8 @@
25309 info.si_uid = tsk->uid;
25310
25311 /* FIXME: find out whether or not this is supposed to be c*time. */
25312 - info.si_utime = tsk->times.tms_utime;
25313 - info.si_stime = tsk->times.tms_stime;
25314 + info.si_utime = hz_to_std(tsk->times.tms_utime);
25315 + info.si_stime = hz_to_std(tsk->times.tms_stime);
25316
25317 status = tsk->exit_code & 0x7f;
25318 why = SI_KERNEL; /* shouldn't happen */
25319 diff -Nur linux-2.4.29/kernel/sys.c linux-mips/kernel/sys.c
25320 --- linux-2.4.29/kernel/sys.c 2003-11-28 19:26:21.000000000 +0100
25321 +++ linux-mips/kernel/sys.c 2003-11-17 02:07:47.000000000 +0100
25322 @@ -801,16 +801,23 @@
25323
25324 asmlinkage long sys_times(struct tms * tbuf)
25325 {
25326 + struct tms temp;
25327 +
25328 /*
25329 * In the SMP world we might just be unlucky and have one of
25330 * the times increment as we use it. Since the value is an
25331 * atomically safe type this is just fine. Conceptually its
25332 * as if the syscall took an instant longer to occur.
25333 */
25334 - if (tbuf)
25335 - if (copy_to_user(tbuf, &current->times, sizeof(struct tms)))
25336 + if (tbuf) {
25337 + temp.tms_utime = hz_to_std(current->times.tms_utime);
25338 + temp.tms_stime = hz_to_std(current->times.tms_stime);
25339 + temp.tms_cutime = hz_to_std(current->times.tms_cutime);
25340 + temp.tms_cstime = hz_to_std(current->times.tms_cstime);
25341 + if (copy_to_user(tbuf, &temp, sizeof(struct tms)))
25342 return -EFAULT;
25343 - return jiffies;
25344 + }
25345 + return hz_to_std(jiffies);
25346 }
25347
25348 /*
25349 diff -Nur linux-2.4.29/lib/Makefile linux-mips/lib/Makefile
25350 --- linux-2.4.29/lib/Makefile 2004-04-14 15:05:40.000000000 +0200
25351 +++ linux-mips/lib/Makefile 2004-04-16 05:14:21.000000000 +0200
25352 @@ -27,6 +27,7 @@
25353 subdir-$(CONFIG_ZLIB_INFLATE) += zlib_inflate
25354 subdir-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate
25355
25356 +-include $(TOPDIR)/arch/$(ARCH)/Makefile.lib
25357 include $(TOPDIR)/drivers/net/Makefile.lib
25358 include $(TOPDIR)/drivers/usb/Makefile.lib
25359 include $(TOPDIR)/drivers/bluetooth/Makefile.lib
25360 diff -Nur linux-2.4.29/Makefile linux-mips/Makefile
25361 --- linux-2.4.29/Makefile 2005-01-19 15:10:14.000000000 +0100
25362 +++ linux-mips/Makefile 2005-01-20 03:19:21.000000000 +0100
25363 @@ -5,7 +5,7 @@
25364
25365 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
25366
25367 -ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
25368 +ARCH = mips
25369 KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
25370
25371 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
25372 @@ -462,10 +462,11 @@
25373 $(MAKE) -C Documentation/DocBook mrproper
25374
25375 distclean: mrproper
25376 - rm -f core `find . \( -not -type d \) -and \
25377 - \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
25378 - -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
25379 - -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
25380 + find . \( -not -type d \) -and \
25381 + \( -name core -o -name '*.orig' -o -name '*.rej' \
25382 + -o -name '*~' -o -name '*.bak' -o -name '#*#' \
25383 + -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \
25384 + -o -name TAGS -o -name tags \) -print | env -i xargs rm -f
25385
25386 backup: mrproper
25387 cd .. && tar cf - linux/ | gzip -9 > backup.gz
25388 @@ -492,7 +493,7 @@
25389 $(MAKE) -C Documentation/DocBook man
25390
25391 sums:
25392 - find . -type f -print | sort | xargs sum > .SUMS
25393 + find . -type f -print | sort | env -i xargs sum > .SUMS
25394
25395 dep-files: scripts/mkdep archdep include/linux/version.h
25396 rm -f .depend .hdepend
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