brcm47xx: prepare brcm47xx patches for sending to mainline.
[openwrt.git] / target / linux / brcm47xx / patches-2.6.34 / 022-USB-Add-ehci-ssb-driver.patch
1 From cb269cf1f97c316a5184080814a751687c72b718 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 18 Jul 2010 21:29:40 +0200
4 Subject: [PATCH 2/2] USB: Add ehci ssb driver
5
6 Support for the Sonics Silicon Backplane (SSB) attached Broadcom USB EHCI core.
7
8 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
9 ---
10 drivers/usb/host/Kconfig | 13 ++
11 drivers/usb/host/ehci-hcd.c | 23 ++++-
12 drivers/usb/host/ehci-ssb.c | 258 +++++++++++++++++++++++++++++++++++++++++++
13 3 files changed, 292 insertions(+), 2 deletions(-)
14 create mode 100644 drivers/usb/host/ehci-ssb.c
15
16 --- a/drivers/usb/host/Kconfig
17 +++ b/drivers/usb/host/Kconfig
18 @@ -150,6 +150,19 @@ config USB_OXU210HP_HCD
19 To compile this driver as a module, choose M here: the
20 module will be called oxu210hp-hcd.
21
22 +config USB_EHCI_HCD_SSB
23 + bool "EHCI support for Broadcom SSB EHCI core"
24 + depends on USB_EHCI_HCD && (SSB = y || SSB = USB_EHCI_HCD) && EXPERIMENTAL
25 + default n
26 + ---help---
27 + Support for the Sonics Silicon Backplane (SSB) attached
28 + Broadcom USB EHCI core.
29 +
30 + This device is present in some embedded devices with
31 + Broadcom based SSB bus.
32 +
33 + If unsure, say N.
34 +
35 config USB_ISP116X_HCD
36 tristate "ISP116X HCD support"
37 depends on USB
38 --- a/drivers/usb/host/ehci-hcd.c
39 +++ b/drivers/usb/host/ehci-hcd.c
40 @@ -1159,8 +1159,14 @@ MODULE_LICENSE ("GPL");
41 #define PLATFORM_DRIVER ehci_atmel_driver
42 #endif
43
44 +#ifdef CONFIG_USB_EHCI_HCD_SSB
45 +#include "ehci-ssb.c"
46 +#define SSB_EHCI_DRIVER ssb_ehci_driver
47 +#endif
48 +
49 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
50 - !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
51 + !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
52 + !defined(SSB_EHCI_DRIVER)
53 #error "missing bus glue for ehci-hcd"
54 #endif
55
56 @@ -1214,10 +1220,20 @@ static int __init ehci_hcd_init(void)
57 if (retval < 0)
58 goto clean3;
59 #endif
60 +
61 +#ifdef SSB_EHCI_DRIVER
62 + retval = ssb_driver_register(&SSB_EHCI_DRIVER);
63 + if (retval < 0)
64 + goto clean4;
65 +#endif
66 return retval;
67
68 +#ifdef SSB_EHCI_DRIVER
69 + /* ssb_driver_unregister(&SSB_EHCI_DRIVER); */
70 +clean4:
71 +#endif
72 #ifdef OF_PLATFORM_DRIVER
73 - /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
74 + of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
75 clean3:
76 #endif
77 #ifdef PS3_SYSTEM_BUS_DRIVER
78 @@ -1256,6 +1272,9 @@ static void __exit ehci_hcd_cleanup(void
79 #ifdef PS3_SYSTEM_BUS_DRIVER
80 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
81 #endif
82 +#ifdef SSB_EHCI_DRIVER
83 + ssb_driver_unregister(&SSB_EHCI_DRIVER);
84 +#endif
85 #ifdef DEBUG
86 debugfs_remove(ehci_debug_root);
87 #endif
88 --- /dev/null
89 +++ b/drivers/usb/host/ehci-ssb.c
90 @@ -0,0 +1,258 @@
91 +/*
92 + * Sonics Silicon Backplane
93 + * Broadcom USB-core EHCI driver (SSB bus glue)
94 + *
95 + * Copyright 2007 Steven Brown <sbrown@cortland.com>
96 + * Copyright 2010 Hauke Mehrtens <hauke@hauke-m.de>
97 + *
98 + * Derived from the OHCI-SSB driver
99 + * Copyright 2007 Michael Buesch <mb@bu3sch.de>
100 + *
101 + * Derived from the EHCI-PCI driver
102 + * Copyright (c) 2000-2004 by David Brownell
103 + *
104 + * Derived from the OHCI-PCI driver
105 + * Copyright 1999 Roman Weissgaerber
106 + * Copyright 2000-2002 David Brownell
107 + * Copyright 1999 Linus Torvalds
108 + * Copyright 1999 Gregory P. Smith
109 + *
110 + * Derived from the USBcore related parts of Broadcom-SB
111 + * Copyright 2005 Broadcom Corporation
112 + *
113 + * Licensed under the GNU/GPL. See COPYING for details.
114 + */
115 +#include <linux/ssb/ssb.h>
116 +
117 +
118 +struct ssb_ehci_device {
119 + struct ehci_hcd ehci; /* _must_ be at the beginning. */
120 +};
121 +
122 +static inline
123 +struct ssb_ehci_device *hcd_to_ssb_ehci(struct usb_hcd *hcd)
124 +{
125 + return (struct ssb_ehci_device *)(hcd->hcd_priv);
126 +}
127 +
128 +static int ssb_ehci_reset(struct usb_hcd *hcd)
129 +{
130 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
131 + int err;
132 +
133 + ehci->caps = hcd->regs;
134 + ehci->regs = hcd->regs +
135 + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
136 +
137 + dbg_hcs_params(ehci, "reset");
138 + dbg_hcc_params(ehci, "reset");
139 +
140 + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
141 +
142 + err = ehci_halt(ehci);
143 +
144 + if (err)
145 + return err;
146 +
147 + err = ehci_init(hcd);
148 +
149 + if (err)
150 + return err;
151 +
152 + ehci_reset(ehci);
153 +
154 + return err;
155 +}
156 +
157 +static const struct hc_driver ssb_ehci_hc_driver = {
158 + .description = "ssb-usb-ehci",
159 + .product_desc = "SSB EHCI Controller",
160 + .hcd_priv_size = sizeof(struct ssb_ehci_device),
161 +
162 + .irq = ehci_irq,
163 + .flags = HCD_MEMORY | HCD_USB2,
164 +
165 + .reset = ssb_ehci_reset,
166 + .start = ehci_run,
167 + .stop = ehci_stop,
168 + .shutdown = ehci_shutdown,
169 +
170 + .urb_enqueue = ehci_urb_enqueue,
171 + .urb_dequeue = ehci_urb_dequeue,
172 + .endpoint_disable = ehci_endpoint_disable,
173 + .endpoint_reset = ehci_endpoint_reset,
174 +
175 + .get_frame_number = ehci_get_frame,
176 +
177 + .hub_status_data = ehci_hub_status_data,
178 + .hub_control = ehci_hub_control,
179 +#if defined(CONFIG_PM)
180 + .bus_suspend = ehci_bus_suspend,
181 + .bus_resume = ehci_bus_resume,
182 +#endif
183 + .relinquish_port = ehci_relinquish_port,
184 + .port_handed_over = ehci_port_handed_over,
185 +
186 + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
187 +};
188 +
189 +static void ssb_ehci_detach(struct ssb_device *dev)
190 +{
191 + struct usb_hcd *hcd = ssb_get_drvdata(dev);
192 + if (hcd->driver->shutdown)
193 + hcd->driver->shutdown(hcd);
194 +
195 + usb_remove_hcd(hcd);
196 + iounmap(hcd->regs);
197 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
198 + usb_put_hcd(hcd);
199 + ssb_device_disable(dev, 0);
200 +}
201 +
202 +static int ssb_ehci_attach(struct ssb_device *dev)
203 +{
204 + struct ssb_ehci_device *ehcidev;
205 + struct usb_hcd *hcd;
206 + int err = -ENOMEM;
207 + u32 tmp;
208 +
209 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
210 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
211 + return -EOPNOTSUPP;
212 +
213 + /*
214 + * USB 2.0 special considerations:
215 + *
216 + * 1. Since the core supports both ehci and EHCI functions, it must
217 + * only be reset once.
218 + *
219 + * 2. In addition to the standard SSB reset sequence, the Host Control
220 + * Register must be programmed to bring the USB core and various
221 + * phy components out of reset.
222 + */
223 + ssb_device_enable(dev, 0);
224 + ssb_write32(dev, 0x200, 0x7ff);
225 +
226 + /* Change Flush control reg */
227 + tmp = ssb_read32(dev, 0x400);
228 + tmp &= ~8;
229 + ssb_write32(dev, 0x400, tmp);
230 + tmp = ssb_read32(dev, 0x400);
231 +
232 + /* Change Shim control reg */
233 + tmp = ssb_read32(dev, 0x304);
234 + tmp &= ~0x100;
235 + ssb_write32(dev, 0x304, tmp);
236 + tmp = ssb_read32(dev, 0x304);
237 +
238 + udelay(1);
239 +
240 + /* Work around for 5354 failures */
241 + if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
242 + /* Change syn01 reg */
243 + tmp = 0x00fe00fe;
244 + ssb_write32(dev, 0x894, tmp);
245 +
246 + /* Change syn03 reg */
247 + tmp = ssb_read32(dev, 0x89c);
248 + tmp |= 0x1;
249 + ssb_write32(dev, 0x89c, tmp);
250 + }
251 +
252 + hcd = usb_create_hcd(&ssb_ehci_hc_driver, dev->dev,
253 + dev_name(dev->dev));
254 + if (!hcd)
255 + goto err_dev_disable;
256 +
257 + ehcidev = hcd_to_ssb_ehci(hcd);
258 + tmp = ssb_read32(dev, SSB_ADMATCH0);
259 + hcd->rsrc_start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */
260 + hcd->rsrc_len = 0x100; /* ehci reg block size */
261 + /*
262 + * start & size modified per sbutils.c
263 + */
264 + hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
265 + if (!hcd->regs)
266 + goto err_put_hcd;
267 + err = usb_add_hcd(hcd, dev->irq, IRQF_DISABLED | IRQF_SHARED);
268 + if (err)
269 + goto err_iounmap;
270 +
271 + ssb_set_drvdata(dev, hcd);
272 +
273 + return err;
274 +
275 +err_iounmap:
276 + iounmap(hcd->regs);
277 +err_put_hcd:
278 + usb_put_hcd(hcd);
279 +err_dev_disable:
280 + ssb_device_disable(dev, 0);
281 + return err;
282 +}
283 +
284 +static int ssb_ehci_probe(struct ssb_device *dev,
285 + const struct ssb_device_id *id)
286 +{
287 + int err;
288 + u16 chipid_top;
289 +
290 + /* USBcores are only connected on embedded devices. */
291 + chipid_top = (dev->bus->chip_id & 0xFF00);
292 + if (chipid_top != 0x4700 && chipid_top != 0x5300)
293 + return -ENODEV;
294 +
295 + /* TODO: Probably need checks here; is the core connected? */
296 +
297 + if (usb_disabled())
298 + return -ENODEV;
299 +
300 + err = ssb_ehci_attach(dev);
301 +
302 + return err;
303 +}
304 +
305 +static void ssb_ehci_remove(struct ssb_device *dev)
306 +{
307 + ssb_ehci_detach(dev);
308 +}
309 +
310 +#ifdef CONFIG_PM
311 +
312 +static int ssb_ehci_suspend(struct ssb_device *dev, pm_message_t state)
313 +{
314 + ssb_device_disable(dev, 0);
315 +
316 + return 0;
317 +}
318 +
319 +static int ssb_ehci_resume(struct ssb_device *dev)
320 +{
321 + struct usb_hcd *hcd = ssb_get_drvdata(dev);
322 + struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd);
323 +
324 + ssb_device_enable(dev, 0);
325 +
326 + ehci_finish_controller_resume(hcd);
327 + return 0;
328 +}
329 +
330 +#else /* !CONFIG_PM */
331 +#define ssb_ehci_suspend NULL
332 +#define ssb_ehci_resume NULL
333 +#endif /* CONFIG_PM */
334 +
335 +static const struct ssb_device_id ssb_ehci_table[] = {
336 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
337 + SSB_DEVTABLE_END
338 +};
339 +MODULE_DEVICE_TABLE(ssb, ssb_ehci_table);
340 +
341 +static struct ssb_driver ssb_ehci_driver = {
342 + .name = KBUILD_MODNAME,
343 + .id_table = ssb_ehci_table,
344 + .probe = ssb_ehci_probe,
345 + .remove = ssb_ehci_remove,
346 + .suspend = ssb_ehci_suspend,
347 + .resume = ssb_ehci_resume,
348 +};
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