2 * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * This file was based on the patches for Linux 2.6.27.39 published by
7 * MikroTik for their RouterBoard 4xx series devices.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/device.h>
19 #include <linux/bitops.h>
20 #include <linux/spi/spi.h>
21 #include <linux/gpio.h>
22 #include <linux/slab.h>
24 #include <asm/mach-ar71xx/rb4xx_cpld.h>
26 #define DRV_NAME "spi-rb4xx-cpld"
27 #define DRV_DESC "RB4xx CPLD driver"
28 #define DRV_VERSION "0.1.0"
30 #define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */
31 #define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
32 #define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
33 #define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
34 #define CPLD_CMD_LED5_ON 0x0c /* send cmd */
35 #define CPLD_CMD_LED5_OFF 0x0d /* send cmd */
38 struct spi_device
*spi
;
40 struct gpio_chip chip
;
44 static struct rb4xx_cpld
*rb4xx_cpld
;
46 static inline struct rb4xx_cpld
*gpio_to_cpld(struct gpio_chip
*chip
)
48 return container_of(chip
, struct rb4xx_cpld
, chip
);
51 static int rb4xx_cpld_write_cmd(struct rb4xx_cpld
*cpld
, unsigned char cmd
)
53 struct spi_transfer t
[1];
55 unsigned char tx_buf
[1];
59 memset(&t
, 0, sizeof(t
));
62 t
[0].len
= sizeof(tx_buf
);
63 spi_message_add_tail(&t
[0], &m
);
67 err
= spi_sync(cpld
->spi
, &m
);
71 static int rb4xx_cpld_write_cfg(struct rb4xx_cpld
*cpld
, unsigned char config
)
73 struct spi_transfer t
[1];
79 memset(&t
, 0, sizeof(t
));
82 t
[0].len
= sizeof(cmd
);
83 spi_message_add_tail(&t
[0], &m
);
85 cmd
[0] = CPLD_CMD_WRITE_CFG
;
88 err
= spi_sync(cpld
->spi
, &m
);
92 static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld
*cpld
, unsigned mask
,
98 config
= cpld
->config
& ~mask
;
101 if ((cpld
->config
^ config
) & 0xff) {
102 err
= rb4xx_cpld_write_cfg(cpld
, config
);
107 if ((cpld
->config
^ config
) & CPLD_CFG_nLED5
) {
108 err
= rb4xx_cpld_write_cmd(cpld
, (value
) ? CPLD_CMD_LED5_ON
:
114 cpld
->config
= config
;
118 int rb4xx_cpld_change_cfg(unsigned mask
, unsigned value
)
122 if (rb4xx_cpld
== NULL
)
125 mutex_lock(&rb4xx_cpld
->lock
);
126 ret
= __rb4xx_cpld_change_cfg(rb4xx_cpld
, mask
, value
);
127 mutex_unlock(&rb4xx_cpld
->lock
);
131 EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg
);
133 int rb4xx_cpld_read_from(unsigned addr
, unsigned char *rx_buf
,
134 const unsigned char *verify_buf
, unsigned count
)
136 const unsigned char cmd
[5] = {
143 struct spi_transfer t
[2] = {
149 .tx_buf
= verify_buf
,
152 .verify
= (verify_buf
!= NULL
),
155 struct spi_message m
;
157 if (rb4xx_cpld
== NULL
)
160 spi_message_init(&m
);
162 spi_message_add_tail(&t
[0], &m
);
163 spi_message_add_tail(&t
[1], &m
);
164 return spi_sync(rb4xx_cpld
->spi
, &m
);
166 EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from
);
169 int rb4xx_cpld_read(unsigned char *buf
, unsigned char *verify_buf
,
172 struct spi_transfer t
[2];
173 struct spi_message m
;
174 unsigned char cmd
[2];
176 if (rb4xx_cpld
== NULL
)
179 spi_message_init(&m
);
180 memset(&t
, 0, sizeof(t
));
184 t
[0].len
= sizeof(cmd
);
185 spi_message_add_tail(&t
[0], &m
);
187 cmd
[0] = CPLD_CMD_READ_NAND
;
193 spi_message_add_tail(&t
[1], &m
);
195 return spi_sync(rb4xx_cpld
->spi
, &m
);
198 int rb4xx_cpld_read(unsigned char *rx_buf
, const unsigned char *verify_buf
,
201 static const unsigned char cmd
[2] = { CPLD_CMD_READ_NAND
, 0 };
202 struct spi_transfer t
[2] = {
207 .tx_buf
= verify_buf
,
210 .verify
= (verify_buf
!= NULL
),
213 struct spi_message m
;
215 if (rb4xx_cpld
== NULL
)
218 spi_message_init(&m
);
219 spi_message_add_tail(&t
[0], &m
);
220 spi_message_add_tail(&t
[1], &m
);
221 return spi_sync(rb4xx_cpld
->spi
, &m
);
224 EXPORT_SYMBOL_GPL(rb4xx_cpld_read
);
226 int rb4xx_cpld_write(const unsigned char *buf
, unsigned count
)
229 struct spi_transfer t
[3];
230 struct spi_message m
;
231 unsigned char cmd
[1];
233 if (rb4xx_cpld
== NULL
)
236 memset(&t
, 0, sizeof(t
));
237 spi_message_init(&m
);
241 t
[0].len
= sizeof(cmd
);
242 spi_message_add_tail(&t
[0], &m
);
244 cmd
[0] = CPLD_CMD_WRITE_NAND
;
249 spi_message_add_tail(&t
[1], &m
);
253 spi_message_add_tail(&t
[2], &m
);
255 return spi_sync(rb4xx_cpld
->spi
, &m
);
257 static const unsigned char cmd
= CPLD_CMD_WRITE_NAND
;
258 struct spi_transfer t
[3] = {
271 struct spi_message m
;
273 if (rb4xx_cpld
== NULL
)
276 spi_message_init(&m
);
277 spi_message_add_tail(&t
[0], &m
);
278 spi_message_add_tail(&t
[1], &m
);
279 spi_message_add_tail(&t
[2], &m
);
280 return spi_sync(rb4xx_cpld
->spi
, &m
);
283 EXPORT_SYMBOL_GPL(rb4xx_cpld_write
);
285 static int rb4xx_cpld_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
287 struct rb4xx_cpld
*cpld
= gpio_to_cpld(chip
);
290 mutex_lock(&cpld
->lock
);
291 ret
= (cpld
->config
>> offset
) & 1;
292 mutex_unlock(&cpld
->lock
);
297 static void rb4xx_cpld_gpio_set(struct gpio_chip
*chip
, unsigned offset
,
300 struct rb4xx_cpld
*cpld
= gpio_to_cpld(chip
);
302 mutex_lock(&cpld
->lock
);
303 __rb4xx_cpld_change_cfg(cpld
, (1 << offset
), !!value
<< offset
);
304 mutex_unlock(&cpld
->lock
);
307 static int rb4xx_cpld_gpio_direction_input(struct gpio_chip
*chip
,
313 static int rb4xx_cpld_gpio_direction_output(struct gpio_chip
*chip
,
317 struct rb4xx_cpld
*cpld
= gpio_to_cpld(chip
);
320 mutex_lock(&cpld
->lock
);
321 ret
= __rb4xx_cpld_change_cfg(cpld
, (1 << offset
), !!value
<< offset
);
322 mutex_unlock(&cpld
->lock
);
327 static int rb4xx_cpld_gpio_init(struct rb4xx_cpld
*cpld
, unsigned int base
)
332 cpld
->config
= CPLD_CFG_nLED1
| CPLD_CFG_nLED2
| CPLD_CFG_nLED3
|
333 CPLD_CFG_nLED4
| CPLD_CFG_nCE
;
334 rb4xx_cpld_write_cfg(cpld
, cpld
->config
);
336 /* setup GPIO chip */
337 cpld
->chip
.label
= DRV_NAME
;
339 cpld
->chip
.get
= rb4xx_cpld_gpio_get
;
340 cpld
->chip
.set
= rb4xx_cpld_gpio_set
;
341 cpld
->chip
.direction_input
= rb4xx_cpld_gpio_direction_input
;
342 cpld
->chip
.direction_output
= rb4xx_cpld_gpio_direction_output
;
344 cpld
->chip
.base
= base
;
345 cpld
->chip
.ngpio
= CPLD_NUM_GPIOS
;
346 cpld
->chip
.can_sleep
= 1;
347 cpld
->chip
.dev
= &cpld
->spi
->dev
;
348 cpld
->chip
.owner
= THIS_MODULE
;
350 err
= gpiochip_add(&cpld
->chip
);
352 dev_err(&cpld
->spi
->dev
, "adding GPIO chip failed, err=%d\n",
358 static int __devinit
rb4xx_cpld_probe(struct spi_device
*spi
)
360 struct rb4xx_cpld
*cpld
;
361 struct rb4xx_cpld_platform_data
*pdata
;
364 pdata
= spi
->dev
.platform_data
;
366 dev_dbg(&spi
->dev
, "no platform data\n");
370 cpld
= kzalloc(sizeof(*cpld
), GFP_KERNEL
);
372 dev_err(&spi
->dev
, "no memory for private data\n");
376 mutex_init(&cpld
->lock
);
377 cpld
->spi
= spi_dev_get(spi
);
378 dev_set_drvdata(&spi
->dev
, cpld
);
380 spi
->mode
= SPI_MODE_0
;
381 spi
->bits_per_word
= 8;
382 err
= spi_setup(spi
);
384 dev_err(&spi
->dev
, "spi_setup failed, err=%d\n", err
);
388 err
= rb4xx_cpld_gpio_init(cpld
, pdata
->gpio_base
);
397 dev_set_drvdata(&spi
->dev
, NULL
);
403 static int __devexit
rb4xx_cpld_remove(struct spi_device
*spi
)
405 struct rb4xx_cpld
*cpld
;
408 cpld
= dev_get_drvdata(&spi
->dev
);
409 dev_set_drvdata(&spi
->dev
, NULL
);
415 static struct spi_driver rb4xx_cpld_driver
= {
418 .bus
= &spi_bus_type
,
419 .owner
= THIS_MODULE
,
421 .probe
= rb4xx_cpld_probe
,
422 .remove
= __devexit_p(rb4xx_cpld_remove
),
425 static int __init
rb4xx_cpld_init(void)
427 return spi_register_driver(&rb4xx_cpld_driver
);
429 module_init(rb4xx_cpld_init
);
431 static void __exit
rb4xx_cpld_exit(void)
433 spi_unregister_driver(&rb4xx_cpld_driver
);
435 module_exit(rb4xx_cpld_exit
);
437 MODULE_DESCRIPTION(DRV_DESC
);
438 MODULE_VERSION(DRV_VERSION
);
439 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
440 MODULE_LICENSE("GPL v2");