target/linux/amazon-2.6/files/arch/mips/amazon/dma-core.h

   1 #ifndef DMA_CORE_H
   2 #define DMA_CORE_H
   3
   4 #define AMAZON_DMA_REG32(reg_num)  *((volatile u32*)(reg_num))
   5 #define AMAZON_DMA_CH_STEP            4
   6
   7 #define COMB_ISR_RX_MASK 0xfe000000
   8 #define COMB_ISR_TX_MASK 0x01f00000
   9
  10
  11 #define DMA_OWN   1
  12 #define CPU_OWN   0
  13 #define DMA_MAJOR 250
  14
  15 //Descriptors
  16 #define DMA_DESC_OWN_CPU                0x0
  17 #define DMA_DESC_OWN_DMA                0x80000000
  18 #define DMA_DESC_CPT_SET                0x40000000
  19 #define DMA_DESC_SOP_SET                0x20000000
  20 #define DMA_DESC_EOP_SET                0x10000000
  21
  22 #define switch_rx_chan_base 0
  23 #define switch_tx_chan_base 7
  24 #define switch2_rx_chan_base 2
  25 #define switch2_tx_chan_base 8
  26 #define TPE_rx_chan_base    4
  27 #define TPE_tx_chan_base    9
  28 #define DPLus2FPI_rx_chan_base  6
  29 #define DPLus2FPI_tx_chan_base  11
  30
  31 #define RX_CHAN_NUM 7
  32 #define TX_CHAN_NUM 5
  33 #define CHAN_TOTAL_NUM       (RX_CHAN_NUM+TX_CHAN_NUM)
  34 #define DEFAULT_OFFSET 20
  35 #define DESCRIPTOR_SIZE 8
  36
  37 typedef struct dev_list{
  38    struct dma_device_info* dev;
  39    int weight;
  40    struct dev_list* prev;
  41    struct dev_list* next;
  42 }dev_list;
  43
  44 typedef struct channel_info{
  45    char device_name[16];
  46    int occupied;
  47    enum attr_t attr;
  48    int current_desc;
  49    int weight;
  50    int default_weight;
  51    int desc_num;
  52    int burst_len;
  53    int desc_len;
  54    int desc_ofst;
  55    int packet_size;
  56    int offset_from_base;
  57    int control;
  58    void* opt[DEFAULT_OFFSET];
  59    u8* (*buffer_alloc)(int len,int* offset, void** opt);
  60    int (*buffer_free)(u8* dataptr,void* opt);
  61    int (*intr_handler)(struct dma_device_info* info,int status);
  62
  63    struct dma_device_info* dma_dev;
  64 }channel_info;
  65
  66
  67
  68 #endif
  69