Consolidated all the ixp4xx i2c gpio patches into a copy of the patch from nslu2...
[openwrt.git] / target / linux / ixp4xx / patches-2.6.23 / 105-ixp4xx_fsg_board_support.patch
1 Index: linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-pci.c
2 ===================================================================
3 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
4 +++ linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-pci.c 2008-01-09 12:49:07.000000000 +1030
5 @@ -0,0 +1,71 @@
6 +/*
7 + * arch/arch/mach-ixp4xx/fsg-pci.c
8 + *
9 + * FSG board-level PCI initialization
10 + *
11 + * Author: Rod Whitby <rod@whitby.id.au>
12 + * Maintainer: http://www.nslu2-linux.org/
13 + *
14 + * based on ixdp425-pci.c:
15 + * Copyright (C) 2002 Intel Corporation.
16 + * Copyright (C) 2003-2004 MontaVista Software, Inc.
17 + *
18 + * This program is free software; you can redistribute it and/or modify
19 + * it under the terms of the GNU General Public License version 2 as
20 + * published by the Free Software Foundation.
21 + *
22 + */
23 +
24 +#include <linux/pci.h>
25 +#include <linux/init.h>
26 +#include <linux/irq.h>
27 +
28 +#include <asm/mach/pci.h>
29 +#include <asm/mach-types.h>
30 +
31 +void __init fsg_pci_preinit(void)
32 +{
33 + set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
34 + set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
35 + set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
36 +
37 + ixp4xx_pci_preinit();
38 +}
39 +
40 +static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
41 +{
42 + static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
43 + IRQ_FSG_PCI_INTC,
44 + IRQ_FSG_PCI_INTB,
45 + IRQ_FSG_PCI_INTA,
46 + };
47 +
48 + int irq = -1;
49 + slot = slot - 11;
50 +
51 + if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
52 + pin >= 1 && pin <= FSG_PCI_IRQ_LINES) {
53 + irq = pci_irq_table[(slot - 1)];
54 + }
55 + printk("%s: Mapped slot %d pin %d to IRQ %d\n", __FUNCTION__,slot, pin, irq);
56 +
57 + return irq;
58 +}
59 +
60 +struct hw_pci fsg_pci __initdata = {
61 + .nr_controllers = 1,
62 + .preinit = fsg_pci_preinit,
63 + .swizzle = pci_std_swizzle,
64 + .setup = ixp4xx_setup,
65 + .scan = ixp4xx_scan_bus,
66 + .map_irq = fsg_map_irq,
67 +};
68 +
69 +int __init fsg_pci_init(void)
70 +{
71 + if (machine_is_fsg())
72 + pci_common_init(&fsg_pci);
73 + return 0;
74 +}
75 +
76 +subsys_initcall(fsg_pci_init);
77 Index: linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-setup.c
78 ===================================================================
79 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
80 +++ linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-setup.c 2008-01-09 12:49:07.000000000 +1030
81 @@ -0,0 +1,220 @@
82 +/*
83 + * arch/arm/mach-ixp4xx/fsg-setup.c
84 + *
85 + * FSG board-setup
86 + *
87 + * based ixdp425-setup.c:
88 + * Copyright (C) 2003-2004 MontaVista Software, Inc.
89 + *
90 + * Author: Rod Whitby <rod@whitby.id.au>
91 + * Maintainers: http://www.nslu2-linux.org/
92 + *
93 + */
94 +
95 +#include <linux/kernel.h>
96 +#include <linux/serial.h>
97 +#include <linux/serial_8250.h>
98 +#include <linux/leds.h>
99 +#include <linux/reboot.h>
100 +#include <linux/i2c-gpio.h>
101 +
102 +#include <asm/mach-types.h>
103 +#include <asm/mach/arch.h>
104 +#include <asm/mach/flash.h>
105 +#include <asm/io.h>
106 +
107 +static struct flash_platform_data fsg_flash_data = {
108 + .map_name = "cfi_probe",
109 + .width = 2,
110 +};
111 +
112 +static struct resource fsg_flash_resource = {
113 + .flags = IORESOURCE_MEM,
114 +};
115 +
116 +static struct platform_device fsg_flash = {
117 + .name = "IXP4XX-Flash",
118 + .id = 0,
119 + .dev.platform_data = &fsg_flash_data,
120 + .num_resources = 1,
121 + .resource = &fsg_flash_resource,
122 +};
123 +
124 +static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
125 + .sda_pin = FSG_SDA_PIN,
126 + .scl_pin = FSG_SCL_PIN,
127 +};
128 +
129 +static struct platform_device fsg_i2c_gpio = {
130 + .name = "i2c-gpio",
131 + .id = 0,
132 + .dev = {
133 + .platform_data = &fsg_i2c_gpio_data,
134 + },
135 +};
136 +
137 +static struct resource fsg_uart_resources[] = {
138 + {
139 + .start = IXP4XX_UART1_BASE_PHYS,
140 + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
141 + .flags = IORESOURCE_MEM,
142 + },
143 + {
144 + .start = IXP4XX_UART2_BASE_PHYS,
145 + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
146 + .flags = IORESOURCE_MEM,
147 + }
148 +};
149 +
150 +static struct plat_serial8250_port fsg_uart_data[] = {
151 + {
152 + .mapbase = IXP4XX_UART1_BASE_PHYS,
153 + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
154 + .irq = IRQ_IXP4XX_UART1,
155 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
156 + .iotype = UPIO_MEM,
157 + .regshift = 2,
158 + .uartclk = IXP4XX_UART_XTAL,
159 + },
160 + {
161 + .mapbase = IXP4XX_UART2_BASE_PHYS,
162 + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
163 + .irq = IRQ_IXP4XX_UART2,
164 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
165 + .iotype = UPIO_MEM,
166 + .regshift = 2,
167 + .uartclk = IXP4XX_UART_XTAL,
168 + },
169 + { }
170 +};
171 +
172 +static struct platform_device fsg_uart = {
173 + .name = "serial8250",
174 + .id = PLAT8250_DEV_PLATFORM,
175 + .dev.platform_data = fsg_uart_data,
176 + .num_resources = ARRAY_SIZE(fsg_uart_resources),
177 + .resource = fsg_uart_resources,
178 +};
179 +
180 +static struct platform_device fsg_leds = {
181 + .name = "fsg-led",
182 + .id = -1,
183 +};
184 +
185 +/* Built-in 10/100 Ethernet MAC interfaces */
186 +static struct eth_plat_info fsg_plat_eth[] = {
187 + {
188 + .phy = 5,
189 + .rxq = 3,
190 + .txreadyq = 20,
191 + }, {
192 + .phy = 4,
193 + .rxq = 4,
194 + .txreadyq = 21,
195 + }
196 +};
197 +
198 +static struct platform_device fsg_eth[] = {
199 + {
200 + .name = "ixp4xx_eth",
201 + .id = IXP4XX_ETH_NPEB,
202 + .dev.platform_data = fsg_plat_eth,
203 + }, {
204 + .name = "ixp4xx_eth",
205 + .id = IXP4XX_ETH_NPEC,
206 + .dev.platform_data = fsg_plat_eth + 1,
207 + }
208 +};
209 +
210 +static struct platform_device *fsg_devices[] __initdata = {
211 + &fsg_i2c_gpio,
212 + &fsg_flash,
213 + &fsg_leds,
214 + &fsg_eth[0],
215 + &fsg_eth[1],
216 +};
217 +
218 +static void fsg_power_off(void)
219 +{
220 + printk("Restarting system.\n");
221 + machine_restart(NULL);
222 +}
223 +
224 +static void __init fsg_init(void)
225 +{
226 + uint8_t __iomem *f;
227 + int i;
228 +
229 + ixp4xx_sys_init();
230 +
231 + pm_power_off = fsg_power_off;
232 +
233 + fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
234 + fsg_flash_resource.end =
235 + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
236 +
237 + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
238 + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
239 +
240 + /* Configure CS2 for operation, 8bit and writable */
241 + *IXP4XX_EXP_CS2 = 0xbfff0002;
242 +
243 + /* This is only useful on a modified machine, but it is valuable
244 + * to have it first in order to see debug messages, and so that
245 + * it does *not* get removed if platform_add_devices fails!
246 + */
247 + (void)platform_device_register(&fsg_uart);
248 +
249 + platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
250 +
251 +
252 + /*
253 + * Map in a portion of the flash and read the MAC addresses.
254 + * Since it is stored in BE in the flash itself, we need to
255 + * byteswap it if we're in LE mode.
256 + */
257 + if ((f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000))) {
258 +#ifdef __ARMEB__
259 + for (i = 0; i < 6; i++) {
260 + fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
261 + fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
262 + }
263 +#else
264 + fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0422 + 3);
265 + fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0422 + 2);
266 + fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0422 + 1);
267 + fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0422 + 0);
268 + fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0422 + 7);
269 + fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0422 + 6);
270 +
271 + fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0422 + 3);
272 + fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C0422 + 2);
273 + fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C0422 + 1);
274 + fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C0422 + 0);
275 + fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C0422 + 7);
276 + fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0422 + 6);
277 +#endif
278 + iounmap(f);
279 + }
280 + printk(KERN_INFO "FSG: Using MAC address %.2x:%.2x:%.2x:%.2x:%.2x:%.2x for port 0\n",
281 + fsg_plat_eth[0].hwaddr[0], fsg_plat_eth[0].hwaddr[1],
282 + fsg_plat_eth[0].hwaddr[2], fsg_plat_eth[0].hwaddr[3],
283 + fsg_plat_eth[0].hwaddr[4], fsg_plat_eth[0].hwaddr[5]);
284 + printk(KERN_INFO "FSG: Using MAC address %.2x:%.2x:%.2x:%.2x:%.2x:%.2x for port 1\n",
285 + fsg_plat_eth[1].hwaddr[0], fsg_plat_eth[1].hwaddr[1],
286 + fsg_plat_eth[1].hwaddr[2], fsg_plat_eth[1].hwaddr[3],
287 + fsg_plat_eth[1].hwaddr[4], fsg_plat_eth[1].hwaddr[5]);
288 +
289 +}
290 +
291 +MACHINE_START(FSG, "Freecom FSG-3")
292 + /* Maintainer: www.nslu2-linux.org */
293 + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
294 + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
295 + .map_io = ixp4xx_map_io,
296 + .init_irq = ixp4xx_init_irq,
297 + .timer = &ixp4xx_timer,
298 + .boot_params = 0x0100,
299 + .init_machine = fsg_init,
300 +MACHINE_END
301 +
302 Index: linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/Kconfig
303 ===================================================================
304 --- linux-2.6.23.12-armeb.orig/arch/arm/mach-ixp4xx/Kconfig 2008-01-09 12:49:04.000000000 +1030
305 +++ linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/Kconfig 2008-01-09 12:49:07.000000000 +1030
306 @@ -125,6 +125,15 @@
307 depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
308 default y
309
310 +config MACH_FSG
311 + bool
312 + prompt "Freecom FSG-3"
313 + select PCI
314 + help
315 + Say 'Y' here if you want your kernel to support Freecom's
316 + FSG-3 device. For more information on this platform
317 + see http://www.nslu2-linux.org/wiki/FSG3/HomePage
318 +
319 #
320 # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
321 #
322 Index: linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/Makefile
323 ===================================================================
324 --- linux-2.6.23.12-armeb.orig/arch/arm/mach-ixp4xx/Makefile 2008-01-09 12:49:04.000000000 +1030
325 +++ linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/Makefile 2008-01-09 12:49:07.000000000 +1030
326 @@ -15,6 +15,7 @@
327 obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
328 obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
329 obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
330 +obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
331
332 obj-y += common.o
333
334 @@ -28,6 +29,7 @@
335 obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o dsmg600-power.o
336 obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
337 obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
338 +obj-$(CONFIG_MACH_FSG) += fsg-setup.o fsg-power.o
339
340 obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
341 obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
342 Index: linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/fsg.h
343 ===================================================================
344 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
345 +++ linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/fsg.h 2008-01-09 12:49:07.000000000 +1030
346 @@ -0,0 +1,74 @@
347 +/*
348 + * include/asm-arm/arch-ixp4xx/fsg.h
349 + *
350 + * Freecom FSG-3 platform specific definitions
351 + *
352 + * Author: Rod Whitby <rod@whitby.id.au>
353 + * Author: Tomasz Chmielewski <mangoo@wpkg.org>
354 + * Maintainers: http://www.nslu2-linux.org
355 + *
356 + * Based on coyote.h by
357 + * Copyright 2004 (c) MontaVista, Software, Inc.
358 + *
359 + * This file is licensed under the terms of the GNU General Public
360 + * License version 2. This program is licensed "as is" without any
361 + * warranty of any kind, whether express or implied.
362 + */
363 +
364 +#ifndef __ASM_ARCH_HARDWARE_H__
365 +#error "Do not include this directly, instead #include <asm/hardware.h>"
366 +#endif
367 +
368 +#define FSG_SDA_PIN 12
369 +#define FSG_SCL_PIN 13
370 +
371 +/*
372 + * FSG PCI IRQs
373 + */
374 +#define FSG_PCI_MAX_DEV 3
375 +#define FSG_PCI_IRQ_LINES 3
376 +
377 +
378 +/* PCI controller GPIO to IRQ pin mappings */
379 +#define FSG_PCI_INTA_PIN 6
380 +#define FSG_PCI_INTB_PIN 7
381 +#define FSG_PCI_INTC_PIN 5
382 +
383 +/* Buttons */
384 +
385 +#define FSG_SB_GPIO 4
386 +#define FSG_RB_GPIO 9
387 +#define FSG_UB_GPIO 10
388 +
389 +#define FSG_SB_IRQ IRQ_IXP4XX_GPIO4
390 +#define FSG_RB_IRQ IRQ_IXP4XX_GPIO9
391 +#define FSG_UB_IRQ IRQ_IXP4XX_GPIO10
392 +
393 +#define FSG_SB_BM (1L << FSG_SB_GPIO)
394 +#define FSG_RB_BM (1L << FSG_RB_GPIO)
395 +#define FSG_UB_BM (1L << FSG_UB_GPIO)
396 +
397 +/* LEDs */
398 +
399 +#define FSG_LED_RING_GPIO 0
400 +#define FSG_LED_SYNC_GPIO 1
401 +#define FSG_LED_USB_GPIO 2
402 +#define FSG_LED_SATA_GPIO 3
403 +#define FSG_LED_WAN_GPIO 4
404 +#define FSG_LED_WLAN_GPIO 5
405 +
406 +/* %%% REMOVE %%%
407 +#define FSG_PCI_SLOT0_PIN 6
408 +#define FSG_PCI_SLOT1_PIN 7
409 +
410 +#define FSG_PCI_SLOT0_DEVID 14
411 +#define FSG_PCI_SLOT1_DEVID 15
412 +
413 +#define FSG_IDE_BASE_PHYS IXP4XX_EXP_BUS_BASE(3)
414 +#define FSG_IDE_BASE_VIRT 0xFFFE1000
415 +#define FSG_IDE_REGION_SIZE 0x1000
416 +
417 +#define FSG_IDE_DATA_PORT 0xFFFE10E0
418 +#define FSG_IDE_CTRL_PORT 0xFFFE10FC
419 +#define FSG_IDE_ERROR_PORT 0xFFFE10E2
420 +*/
421 Index: linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/hardware.h
422 ===================================================================
423 --- linux-2.6.23.12-armeb.orig/include/asm-arm/arch-ixp4xx/hardware.h 2008-01-09 12:49:04.000000000 +1030
424 +++ linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/hardware.h 2008-01-09 12:49:07.000000000 +1030
425 @@ -45,5 +45,6 @@
426 #include "nslu2.h"
427 #include "nas100d.h"
428 #include "dsmg600.h"
429 +#include "fsg.h"
430
431 #endif /* _ASM_ARCH_HARDWARE_H */
432 Index: linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/irqs.h
433 ===================================================================
434 --- linux-2.6.23.12-armeb.orig/include/asm-arm/arch-ixp4xx/irqs.h 2008-01-09 12:49:04.000000000 +1030
435 +++ linux-2.6.23.12-armeb/include/asm-arm/arch-ixp4xx/irqs.h 2008-01-09 12:49:07.000000000 +1030
436 @@ -128,4 +128,17 @@
437 #define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
438 #define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
439
440 +/*
441 + * Freecom FSG-3 Board IRQs
442 + */
443 +#define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6
444 +#define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7
445 +#define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5
446 +
447 +/* %%% REMOVE %%%
448 +#define IRQ_FSG_PCI_SLOT0 IRQ_IXP4XX_GPIO6
449 +#define IRQ_FSG_PCI_SLOT1 IRQ_IXP4XX_GPIO7
450 +#define IRQ_FSG_IDE IRQ_IXP4XX_GPIO5
451 +*/
452 +
453 #endif
454 Index: linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-power.c
455 ===================================================================
456 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
457 +++ linux-2.6.23.12-armeb/arch/arm/mach-ixp4xx/fsg-power.c 2008-01-09 12:49:07.000000000 +1030
458 @@ -0,0 +1,87 @@
459 +/*
460 + * arch/arm/mach-ixp4xx/fsg-power.c
461 + *
462 + * FSG Power/Reset driver
463 + *
464 + * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
465 + *
466 + * based on nslu2-power.c
467 + * Copyright (C) 2005 Tower Technologies
468 + *
469 + * This program is free software; you can redistribute it and/or modify
470 + * it under the terms of the GNU General Public License version 2 as
471 + * published by the Free Software Foundation.
472 + *
473 + */
474 +
475 +#include <linux/module.h>
476 +#include <linux/reboot.h>
477 +#include <linux/irq.h>
478 +#include <linux/interrupt.h>
479 +#include <linux/kernel.h>
480 +
481 +#include <asm/mach-types.h>
482 +
483 +static irqreturn_t fsg_power_handler(int irq, void *dev_id)
484 +{
485 + /* Signal init to do the ctrlaltdel action, this will bypass init if
486 + * it hasn't started and do a kernel_restart.
487 + */
488 + ctrl_alt_del();
489 +
490 + return IRQ_HANDLED;
491 +}
492 +
493 +static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
494 +{
495 + /* This is the paper-clip reset, it shuts the machine down directly.
496 + */
497 + machine_power_off();
498 +
499 + return IRQ_HANDLED;
500 +}
501 +
502 +static int __init fsg_power_init(void)
503 +{
504 + if (!(machine_is_fsg()))
505 + return 0;
506 +
507 + set_irq_type(FSG_RB_IRQ, IRQT_LOW);
508 + set_irq_type(FSG_SB_IRQ, IRQT_LOW);
509 +
510 + if (request_irq(FSG_RB_IRQ, &fsg_reset_handler,
511 + IRQF_DISABLED, "FSG reset button", NULL) < 0) {
512 +
513 + printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
514 + FSG_RB_IRQ);
515 +
516 + return -EIO;
517 + }
518 +
519 + if (request_irq(FSG_SB_IRQ, &fsg_power_handler,
520 + IRQF_DISABLED, "FSG power button", NULL) < 0) {
521 +
522 + printk(KERN_DEBUG "Power Button IRQ %d not available\n",
523 + FSG_SB_IRQ);
524 +
525 + return -EIO;
526 + }
527 +
528 + return 0;
529 +}
530 +
531 +static void __exit fsg_power_exit(void)
532 +{
533 + if (!(machine_is_fsg()))
534 + return;
535 +
536 + free_irq(FSG_SB_IRQ, NULL);
537 + free_irq(FSG_RB_IRQ, NULL);
538 +}
539 +
540 +module_init(fsg_power_init);
541 +module_exit(fsg_power_exit);
542 +
543 +MODULE_AUTHOR("Rod Whitby <rod@whitby.id.au>");
544 +MODULE_DESCRIPTION("FSG Power/Reset driver");
545 +MODULE_LICENSE("GPL");
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