target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c

   1 /*
   2  * Ralink RT305x SoC specific setup
   3  *
   4  * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  * Parts of this file are based on Ralink's 2.6.21 BSP
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published
  11  * by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/gpio.h>
  18
  19 #include <asm/mach-ralink/common.h>
  20 #include <asm/mach-ralink/rt305x.h>
  21 #include <asm/mach-ralink/rt305x_regs.h>
  22
  23 void __iomem * rt305x_sysc_base;
  24 void __iomem * rt305x_memc_base;
  25
  26 void __init rt305x_detect_sys_type(void)
  27 {
  28         u32 n0;
  29         u32 n1;
  30         u32 id;
  31
  32         n0 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME0);
  33         n1 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME1);
  34         id = rt305x_sysc_rr(SYSC_REG_CHIP_ID);
  35
  36         snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
  37                 "Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
  38                 (char) (n0 & 0xff), (char) ((n0 >> 8) & 0xff),
  39                 (char) ((n0 >> 16) & 0xff), (char) ((n0 >> 24) & 0xff),
  40                 (char) (n1 & 0xff), (char) ((n1 >> 8) & 0xff),
  41                 (char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
  42                 (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
  43                 (id & CHIP_ID_REV_MASK));
  44 }
  45
  46 static void rt305x_gpio_reserve(int first, int last)
  47 {
  48         for (; first <= last; first++)
  49                 gpio_request(first, "reserved");
  50 }
  51
  52 void __init rt305x_gpio_init(u32 mode)
  53 {
  54         u32 t;
  55
  56         rt305x_sysc_wr(mode, SYSC_REG_GPIO_MODE);
  57
  58         ramips_gpio_init();
  59         if ((mode & RT305X_GPIO_MODE_I2C) == 0)
  60                 rt305x_gpio_reserve(RT305X_GPIO_I2C_SD, RT305X_GPIO_I2C_SCLK);
  61
  62         if ((mode & RT305X_GPIO_MODE_SPI) == 0)
  63                 rt305x_gpio_reserve(RT305X_GPIO_SPI_EN, RT305X_GPIO_SPI_CLK);
  64
  65         t = mode >> RT305X_GPIO_MODE_UART0_SHIFT;
  66         t &= RT305X_GPIO_MODE_UART0_MASK;
  67         switch (t) {
  68         case RT305X_GPIO_MODE_UARTF:
  69         case RT305X_GPIO_MODE_PCM_UARTF:
  70         case RT305X_GPIO_MODE_PCM_I2S:
  71         case RT305X_GPIO_MODE_I2S_UARTF:
  72                 rt305x_gpio_reserve(RT305X_GPIO_7, RT305X_GPIO_14);
  73                 break;
  74         case RT305X_GPIO_MODE_PCM_GPIO:
  75                 rt305x_gpio_reserve(RT305X_GPIO_10, RT305X_GPIO_14);
  76                 break;
  77         case RT305X_GPIO_MODE_GPIO_UARTF:
  78         case RT305X_GPIO_MODE_GPIO_I2S:
  79                 rt305x_gpio_reserve(RT305X_GPIO_7, RT305X_GPIO_10);
  80                 break;
  81         }
  82
  83         if ((mode & RT305X_GPIO_MODE_UART1) == 0)
  84                 rt305x_gpio_reserve(RT305X_GPIO_UART1_TXD,
  85                                     RT305X_GPIO_UART1_RXD);
  86
  87         if ((mode & RT305X_GPIO_MODE_JTAG) == 0)
  88                 rt305x_gpio_reserve(RT305X_GPIO_JTAG_TDO, RT305X_GPIO_JTAG_TDI);
  89
  90         if ((mode & RT305X_GPIO_MODE_MDIO) == 0)
  91                 rt305x_gpio_reserve(RT305X_GPIO_MDIO_MDC,
  92                                     RT305X_GPIO_MDIO_MDIO);
  93
  94         if ((mode & RT305X_GPIO_MODE_SDRAM) == 0)
  95                 rt305x_gpio_reserve(RT305X_GPIO_SDRAM_MD16,
  96                                     RT305X_GPIO_SDRAM_MD31);
  97
  98         if ((mode & RT305X_GPIO_MODE_RGMII) == 0)
  99                 rt305x_gpio_reserve(RT305X_GPIO_GE0_TXD0,
 100                                     RT305X_GPIO_GE0_RXCLK);
 101 }