[ramips] add common setup code
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt288x / setup.c
1 /*
2 * Ralink RT288x SoC specific setup
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Ralink's 2.6.21 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/serial_8250.h>
18
19 #include <asm/bootinfo.h>
20 #include <asm/mips_machine.h>
21 #include <asm/reboot.h>
22 #include <asm/time.h>
23
24 #include <asm/mach-ralink/common.h>
25 #include <asm/mach-ralink/rt288x.h>
26 #include <asm/mach-ralink/rt288x_regs.h>
27
28 #define RT288X_MEM_SIZE_MIN (2 * 1024 * 1024)
29 #define RT288X_MEM_SIZE_MAX (128 * 1024 * 1024)
30
31 unsigned long rt288x_mach_type;
32
33 static void rt288x_restart(char *command)
34 {
35 rt288x_sysc_wr(RT2880_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
36 while (1)
37 if (cpu_wait)
38 cpu_wait();
39 }
40
41 static void rt288x_halt(void)
42 {
43 while (1)
44 cpu_wait();
45 }
46
47 static void __init rt288x_detect_mem_size(void)
48 {
49 unsigned long size;
50
51 for (size = RT288X_MEM_SIZE_MIN; size < RT288X_MEM_SIZE_MAX;
52 size <<= 1 ) {
53 if (!memcmp(rt288x_detect_mem_size,
54 rt288x_detect_mem_size + size, 1024))
55 break;
56 }
57
58 add_memory_region(RT2880_SDRAM_BASE, size, BOOT_MEM_RAM);
59 }
60
61 static void __init rt288x_early_serial_setup(void)
62 {
63 struct uart_port p;
64 int err;
65
66 memset(&p, 0, sizeof(p));
67 p.flags = UPF_SKIP_TEST;
68 p.iotype = UPIO_AU;
69 p.uartclk = rt288x_sys_freq;
70 p.regshift = 2;
71 p.type = PORT_16550A;
72
73 p.mapbase = RT2880_UART0_BASE;
74 p.membase = ioremap_nocache(p.mapbase, RT2880_UART0_SIZE);
75 p.line = 0;
76 p.irq = RT2880_INTC_IRQ_UART0;
77
78 err = early_serial_setup(&p);
79 if (err)
80 printk(KERN_ERR "RT288x: early UART0 registration failed %d\n",
81 err);
82
83 p.mapbase = RT2880_UART1_BASE;
84 p.membase = ioremap_nocache(p.mapbase, RT2880_UART1_SIZE);
85 p.line = 1;
86 p.irq = RT2880_INTC_IRQ_UART1;
87
88 err = early_serial_setup(&p);
89 if (err)
90 printk(KERN_ERR "RT288x: early UART1 registration failed %d\n",
91 err);
92 }
93
94 const char *get_system_type(void)
95 {
96 return rt288x_sys_type;
97 }
98
99 unsigned int __cpuinit get_c0_compare_irq(void)
100 {
101 return CP0_LEGACY_COMPARE_IRQ;
102 }
103
104 void __init ramips_soc_setup(void)
105 {
106 rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
107 rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
108
109 rt288x_detect_mem_size();
110 rt288x_detect_sys_type();
111 rt288x_detect_sys_freq();
112
113 printk(KERN_INFO "%s running at %lu.%02lu MHz\n", get_system_type(),
114 rt288x_cpu_freq / 1000000,
115 (rt288x_cpu_freq % 1000000) * 100 / 1000000);
116
117 _machine_restart = rt288x_restart;
118 _machine_halt = rt288x_halt;
119 pm_power_off = rt288x_halt;
120
121 rt288x_early_serial_setup();
122 }
123
124 void __init plat_time_init(void)
125 {
126 mips_hpt_frequency = rt288x_cpu_freq / 2;
127 }
128
129 static int __init rt288x_machine_setup(void)
130 {
131 mips_machine_setup(rt288x_mach_type);
132
133 return 0;
134 }
135
136 arch_initcall(rt288x_machine_setup);
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