fix the wan phy on the GW2355 - thanks, Chris ;)
[openwrt.git] / target / linux / at91 / patches-2.6.22 / 009-fdl-uartinit.patch
1 diff -urN linux-2.6.22.1.old/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c
2 --- linux-2.6.22.1.old/arch/arm/mach-at91/at91rm9200_devices.c 2007-07-29 06:46:13.000000000 +0200
3 +++ linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-07-29 07:23:35.000000000 +0200
4 @@ -721,6 +721,10 @@
5 * We need to drive the pin manually. Default is off (RTS is active low).
6 */
7 at91_set_gpio_output(AT91_PIN_PA21, 1);
8 + at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
9 + at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
10 + at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
11 + at91_set_deglitch(AT91_PIN_PA19, 1);
12 }
13
14 static struct resource uart1_resources[] = {
15 @@ -832,6 +836,12 @@
16 {
17 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
18 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
19 + at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
20 + at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
21 + at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
22 + at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
23 + at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
24 + at91_set_deglitch(AT91_PIN_PA24, 1);
25 }
26
27 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
This page took 0.041651 seconds and 5 git commands to generate.