lua: Fixed some cross-platform issues for PPC (and probably other architectures)
[openwrt.git] / target / linux / orion / patches / 099-add_netgear_wnr854t_support.patch
1 --- a/arch/arm/mach-orion5x/Kconfig
2 +++ b/arch/arm/mach-orion5x/Kconfig
3 @@ -74,6 +74,12 @@
4 Say 'Y' here if you want your kernel to support the
5 Maxtor Shared Storage II platform.
6
7 +config MACH_WNR854T
8 + bool "Netgear WNR854T"
9 + help
10 + Say 'Y' here if you want your kernel to support the
11 + Netgear WNR854T platform.
12 +
13 endmenu
14
15 endif
16 --- a/arch/arm/mach-orion5x/Makefile
17 +++ b/arch/arm/mach-orion5x/Makefile
18 @@ -10,3 +10,4 @@
19 obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
20 obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
21 obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
22 +obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
23 --- /dev/null
24 +++ b/arch/arm/mach-orion5x/wnr854t-setup.c
25 @@ -0,0 +1,164 @@
26 +/*
27 + * arch/arm/mach-orion5x/wnr854t-setup.c
28 + *
29 + * This file is licensed under the terms of the GNU General Public
30 + * License version 2. This program is licensed "as is" without any
31 + * warranty of any kind, whether express or implied.
32 + */
33 +
34 +#include <linux/kernel.h>
35 +#include <linux/init.h>
36 +#include <linux/platform_device.h>
37 +#include <linux/pci.h>
38 +#include <linux/irq.h>
39 +#include <linux/delay.h>
40 +#include <linux/mtd/physmap.h>
41 +#include <linux/mv643xx_eth.h>
42 +#include <asm/mach-types.h>
43 +#include <asm/gpio.h>
44 +#include <asm/mach/arch.h>
45 +#include <asm/mach/pci.h>
46 +#include <asm/arch/orion5x.h>
47 +#include "common.h"
48 +#include "mpp.h"
49 +
50 +static struct orion5x_mpp_mode wnr854t_mpp_modes[] __initdata = {
51 + { 0, MPP_GPIO }, /* Power LED green (0=on) */
52 + { 1, MPP_GPIO }, /* Reset Button (0=off) */
53 + { 2, MPP_GPIO }, /* Power LED blink (0=off) */
54 + { 3, MPP_GPIO }, /* WAN Status LED amber (0=off) */
55 + { 4, MPP_GPIO }, /* PCI int */
56 + { 5, MPP_GPIO }, /* ??? */
57 + { 6, MPP_GPIO }, /* ??? */
58 + { 7, MPP_GPIO }, /* ??? */
59 + { 8, MPP_UNUSED }, /* ??? */
60 + { 9, MPP_GIGE }, /* GE_RXERR */
61 + { 10, MPP_UNUSED }, /* ??? */
62 + { 11, MPP_UNUSED }, /* ??? */
63 + { 12, MPP_GIGE }, /* GE_TXD[4] */
64 + { 13, MPP_GIGE }, /* GE_TXD[5] */
65 + { 14, MPP_GIGE }, /* GE_TXD[6] */
66 + { 15, MPP_GIGE }, /* GE_TXD[7] */
67 + { 16, MPP_GIGE }, /* GE_RXD[4] */
68 + { 17, MPP_GIGE }, /* GE_RXD[5] */
69 + { 18, MPP_GIGE }, /* GE_RXD[6] */
70 + { 19, MPP_GIGE }, /* GE_RXD[7] */
71 + { -1 },
72 +};
73 +
74 +/*
75 + * 8M NOR flash Device bus boot chip select
76 + */
77 +#define WNR854T_NOR_BOOT_BASE 0xf4000000
78 +#define WNR854T_NOR_BOOT_SIZE SZ_8M
79 +
80 +static struct mtd_partition wnr854t_nor_flash_partitions[] = {
81 + {
82 + .name = "kernel",
83 + .offset = 0x00000000,
84 + .size = 0x00100000,
85 + }, {
86 + .name = "rootfs",
87 + .offset = 0x00100000,
88 + .size = 0x00660000,
89 + }, {
90 + .name = "uboot",
91 + .offset = 0x00760000,
92 + .size = 0x00040000,
93 + },
94 +};
95 +
96 +static struct physmap_flash_data wnr854t_nor_flash_data = {
97 + .width = 2,
98 + .parts = wnr854t_nor_flash_partitions,
99 + .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions),
100 +};
101 +
102 +static struct resource wnr854t_nor_flash_resource = {
103 + .flags = IORESOURCE_MEM,
104 + .start = WNR854T_NOR_BOOT_BASE,
105 + .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
106 +};
107 +
108 +static struct platform_device wnr854t_nor_flash = {
109 + .name = "physmap-flash",
110 + .id = 0,
111 + .dev = {
112 + .platform_data = &wnr854t_nor_flash_data,
113 + },
114 + .num_resources = 1,
115 + .resource = &wnr854t_nor_flash_resource,
116 +};
117 +
118 +static struct mv643xx_eth_platform_data wnr854t_eth_data = {
119 + .phy_addr = -1,
120 +};
121 +
122 +static void __init wnr854t_init(void)
123 +{
124 + /*
125 + * Setup basic Orion functions. Need to be called early.
126 + */
127 + orion5x_init();
128 +
129 + orion5x_mpp_conf(wnr854t_mpp_modes);
130 +
131 + /*
132 + * Configure peripherals.
133 + */
134 + orion5x_eth_init(&wnr854t_eth_data);
135 + orion5x_uart0_init();
136 +
137 + orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE,
138 + WNR854T_NOR_BOOT_SIZE);
139 + platform_device_register(&wnr854t_nor_flash);
140 +}
141 +
142 +static int __init wnr854t_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
143 +{
144 + int irq;
145 +
146 + /*
147 + * Check for devices with hard-wired IRQs.
148 + */
149 + irq = orion5x_pci_map_irq(dev, slot, pin);
150 + if (irq != -1)
151 + return irq;
152 +
153 + /*
154 + * Mini-PCI slot.
155 + */
156 + if (slot == 7)
157 + return gpio_to_irq(4);
158 +
159 + return -1;
160 +}
161 +
162 +static struct hw_pci wnr854t_pci __initdata = {
163 + .nr_controllers = 2,
164 + .swizzle = pci_std_swizzle,
165 + .setup = orion5x_pci_sys_setup,
166 + .scan = orion5x_pci_sys_scan_bus,
167 + .map_irq = wnr854t_pci_map_irq,
168 +};
169 +
170 +static int __init wnr854t_pci_init(void)
171 +{
172 + if (machine_is_wnr854t())
173 + pci_common_init(&wnr854t_pci);
174 +
175 + return 0;
176 +}
177 +subsys_initcall(wnr854t_pci_init);
178 +
179 +MACHINE_START(WNR854T, "Netgear WNR854T")
180 + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
181 + .phys_io = ORION5X_REGS_PHYS_BASE,
182 + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
183 + .boot_params = 0x00000100,
184 + .init_machine = wnr854t_init,
185 + .map_io = orion5x_map_io,
186 + .init_irq = orion5x_init_irq,
187 + .timer = &orion5x_timer,
188 + .fixup = tag_fixup_mem32,
189 +MACHINE_END
190 --- a/arch/arm/configs/orion5x_defconfig
191 +++ b/arch/arm/configs/orion5x_defconfig
192 @@ -166,6 +166,7 @@
193 CONFIG_MACH_DNS323=y
194 CONFIG_MACH_TS209=y
195 CONFIG_MACH_LINKSTATION_PRO=y
196 +CONFIG_MACH_WNR854T=y
197
198 #
199 # Boot options
This page took 0.05061 seconds and 5 git commands to generate.