[brcm63xx] define bcm6338 SDRAM base register and make sure that the right CPU id...
[openwrt.git] / target / linux / ar7 / patches / 500-serial_kludge.patch
1 --- a/drivers/serial/8250.c
2 +++ b/drivers/serial/8250.c
3 @@ -286,6 +286,13 @@ static const struct serial8250_config ua
4 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
5 .flags = UART_CAP_FIFO,
6 },
7 + [PORT_AR7] = {
8 + .name = "TI-AR7",
9 + .fifo_size = 16,
10 + .tx_loadsz = 16,
11 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
12 + .flags = UART_CAP_FIFO | UART_CAP_AFE,
13 + },
14 };
15
16 #if defined (CONFIG_SERIAL_8250_AU1X00)
17 @@ -2687,7 +2694,11 @@ static void serial8250_console_putchar(s
18 {
19 struct uart_8250_port *up = (struct uart_8250_port *)port;
20
21 +#ifdef CONFIG_AR7
22 + wait_for_xmitr(up, BOTH_EMPTY);
23 +#else
24 wait_for_xmitr(up, UART_LSR_THRE);
25 +#endif
26 serial_out(up, UART_TX, ch);
27 }
28
29 --- a/include/linux/serial_core.h
30 +++ b/include/linux/serial_core.h
31 @@ -41,7 +41,8 @@
32 #define PORT_XSCALE 15
33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
35 -#define PORT_MAX_8250 17 /* max port ID */
36 +#define PORT_AR7 18 /* TI AR7 internal UART */
37 +#define PORT_MAX_8250 18 /* max port ID */
38
39 /*
40 * ARM specific type numbers. These are not currently guaranteed
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