target/linux/xburst/patches-2.6.35/014-platform-devices.patch

   1 From c7efc7b27ca91012c99618ad5efeec705671bd66 Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Sat, 17 Jul 2010 11:13:29 +0000
   4 Subject: [PATCH] MIPS: JZ4740: Add platform devices
   5
   6 Add platform devices for all the JZ4740 platform drivers.
   7
   8 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
   9 Cc: linux-mips@linux-mips.org
  10 Cc: linux-kernel@vger.kernel.org
  11 Patchwork: https://patchwork.linux-mips.org/patch/1469/
  12 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  13 ---
  14  arch/mips/include/asm/mach-jz4740/platform.h |   36 ++++
  15  arch/mips/jz4740/platform.c                  |  291 ++++++++++++++++++++++++++
  16  2 files changed, 327 insertions(+), 0 deletions(-)
  17  create mode 100644 arch/mips/include/asm/mach-jz4740/platform.h
  18  create mode 100644 arch/mips/jz4740/platform.c
  19
  20 --- /dev/null
  21 +++ b/arch/mips/include/asm/mach-jz4740/platform.h
  22 @@ -0,0 +1,36 @@
  23 +/*
  24 + *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
  25 + *  JZ4740 platform device definitions
  26 + *
  27 + *  This program is free software; you can redistribute it and/or modify it
  28 + *  under  the terms of the GNU General  Public License as published by the
  29 + *  Free Software Foundation;  either version 2 of the License, or (at your
  30 + *  option) any later version.
  31 + *
  32 + *  You should have received a copy of the GNU General Public License along
  33 + *  with this program; if not, write to the Free Software Foundation, Inc.,
  34 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  35 + *
  36 + */
  37 +
  38 +
  39 +#ifndef __JZ4740_PLATFORM_H
  40 +#define __JZ4740_PLATFORM_H
  41 +
  42 +#include <linux/platform_device.h>
  43 +
  44 +extern struct platform_device jz4740_usb_ohci_device;
  45 +extern struct platform_device jz4740_udc_device;
  46 +extern struct platform_device jz4740_mmc_device;
  47 +extern struct platform_device jz4740_rtc_device;
  48 +extern struct platform_device jz4740_i2c_device;
  49 +extern struct platform_device jz4740_nand_device;
  50 +extern struct platform_device jz4740_framebuffer_device;
  51 +extern struct platform_device jz4740_i2s_device;
  52 +extern struct platform_device jz4740_pcm_device;
  53 +extern struct platform_device jz4740_codec_device;
  54 +extern struct platform_device jz4740_adc_device;
  55 +
  56 +void jz4740_serial_device_register(void);
  57 +
  58 +#endif
  59 --- /dev/null
  60 +++ b/arch/mips/jz4740/platform.c
  61 @@ -0,0 +1,291 @@
  62 +/*
  63 + *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
  64 + *  JZ4740 platform devices
  65 + *
  66 + *  This program is free software; you can redistribute it and/or modify it
  67 + *  under  the terms of the GNU General  Public License as published by the
  68 + *  Free Software Foundation;  either version 2 of the License, or (at your
  69 + *  option) any later version.
  70 + *
  71 + *  You should have received a copy of the GNU General Public License along
  72 + *  with this program; if not, write to the Free Software Foundation, Inc.,
  73 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  74 + *
  75 + */
  76 +
  77 +#include <linux/device.h>
  78 +#include <linux/init.h>
  79 +#include <linux/kernel.h>
  80 +#include <linux/platform_device.h>
  81 +#include <linux/resource.h>
  82 +
  83 +#include <linux/dma-mapping.h>
  84 +
  85 +#include <asm/mach-jz4740/platform.h>
  86 +#include <asm/mach-jz4740/base.h>
  87 +#include <asm/mach-jz4740/irq.h>
  88 +
  89 +#include <linux/serial_core.h>
  90 +#include <linux/serial_8250.h>
  91 +
  92 +#include "serial.h"
  93 +#include "clock.h"
  94 +
  95 +/* OHCI controller */
  96 +static struct resource jz4740_usb_ohci_resources[] = {
  97 +       {
  98 +               .start  = JZ4740_UHC_BASE_ADDR,
  99 +               .end    = JZ4740_UHC_BASE_ADDR + 0x1000 - 1,
 100 +               .flags  = IORESOURCE_MEM,
 101 +       },
 102 +       {
 103 +               .start  = JZ4740_IRQ_UHC,
 104 +               .end    = JZ4740_IRQ_UHC,
 105 +               .flags  = IORESOURCE_IRQ,
 106 +       },
 107 +};
 108 +
 109 +struct platform_device jz4740_usb_ohci_device = {
 110 +       .name           = "jz4740-ohci",
 111 +       .id             = -1,
 112 +       .dev = {
 113 +               .dma_mask = &jz4740_usb_ohci_device.dev.coherent_dma_mask,
 114 +               .coherent_dma_mask = DMA_BIT_MASK(32),
 115 +       },
 116 +       .num_resources  = ARRAY_SIZE(jz4740_usb_ohci_resources),
 117 +       .resource       = jz4740_usb_ohci_resources,
 118 +};
 119 +
 120 +/* UDC (USB gadget controller) */
 121 +static struct resource jz4740_usb_gdt_resources[] = {
 122 +       {
 123 +               .start  = JZ4740_UDC_BASE_ADDR,
 124 +               .end    = JZ4740_UDC_BASE_ADDR + 0x1000 - 1,
 125 +               .flags  = IORESOURCE_MEM,
 126 +       },
 127 +       {
 128 +               .start  = JZ4740_IRQ_UDC,
 129 +               .end    = JZ4740_IRQ_UDC,
 130 +               .flags  = IORESOURCE_IRQ,
 131 +       },
 132 +};
 133 +
 134 +struct platform_device jz4740_udc_device = {
 135 +       .name           = "jz-udc",
 136 +       .id             = -1,
 137 +       .dev = {
 138 +               .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
 139 +               .coherent_dma_mask = DMA_BIT_MASK(32),
 140 +       },
 141 +       .num_resources  = ARRAY_SIZE(jz4740_usb_gdt_resources),
 142 +       .resource       = jz4740_usb_gdt_resources,
 143 +};
 144 +
 145 +/* MMC/SD controller */
 146 +static struct resource jz4740_mmc_resources[] = {
 147 +       {
 148 +               .start  = JZ4740_MSC_BASE_ADDR,
 149 +               .end    = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
 150 +               .flags  = IORESOURCE_MEM,
 151 +       },
 152 +       {
 153 +               .start  = JZ4740_IRQ_MSC,
 154 +               .end    = JZ4740_IRQ_MSC,
 155 +               .flags  = IORESOURCE_IRQ,
 156 +       }
 157 +};
 158 +
 159 +struct platform_device jz4740_mmc_device = {
 160 +       .name           = "jz4740-mmc",
 161 +       .id             = 0,
 162 +       .dev = {
 163 +               .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
 164 +               .coherent_dma_mask = DMA_BIT_MASK(32),
 165 +       },
 166 +       .num_resources  = ARRAY_SIZE(jz4740_mmc_resources),
 167 +       .resource       = jz4740_mmc_resources,
 168 +};
 169 +
 170 +/* RTC controller */
 171 +static struct resource jz4740_rtc_resources[] = {
 172 +       {
 173 +               .start  = JZ4740_RTC_BASE_ADDR,
 174 +               .end    = JZ4740_RTC_BASE_ADDR + 0x38 - 1,
 175 +               .flags  = IORESOURCE_MEM,
 176 +       },
 177 +       {
 178 +               .start  = JZ4740_IRQ_RTC,
 179 +               .end    = JZ4740_IRQ_RTC,
 180 +               .flags  = IORESOURCE_IRQ,
 181 +       },
 182 +};
 183 +
 184 +struct platform_device jz4740_rtc_device = {
 185 +       .name           = "jz4740-rtc",
 186 +       .id             = -1,
 187 +       .num_resources  = ARRAY_SIZE(jz4740_rtc_resources),
 188 +       .resource       = jz4740_rtc_resources,
 189 +};
 190 +
 191 +/* I2C controller */
 192 +static struct resource jz4740_i2c_resources[] = {
 193 +       {
 194 +               .start  = JZ4740_I2C_BASE_ADDR,
 195 +               .end    = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
 196 +               .flags  = IORESOURCE_MEM,
 197 +       },
 198 +       {
 199 +               .start  = JZ4740_IRQ_I2C,
 200 +               .end    = JZ4740_IRQ_I2C,
 201 +               .flags  = IORESOURCE_IRQ,
 202 +       }
 203 +};
 204 +
 205 +struct platform_device jz4740_i2c_device = {
 206 +       .name           = "jz4740-i2c",
 207 +       .id             = 0,
 208 +       .num_resources  = ARRAY_SIZE(jz4740_i2c_resources),
 209 +       .resource       = jz4740_i2c_resources,
 210 +};
 211 +
 212 +/* NAND controller */
 213 +static struct resource jz4740_nand_resources[] = {
 214 +       {
 215 +               .name   = "mmio",
 216 +               .start  = JZ4740_EMC_BASE_ADDR,
 217 +               .end    = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
 218 +               .flags  = IORESOURCE_MEM,
 219 +       },
 220 +       {
 221 +               .name   = "bank",
 222 +               .start  = 0x18000000,
 223 +               .end    = 0x180C0000 - 1,
 224 +               .flags = IORESOURCE_MEM,
 225 +       },
 226 +};
 227 +
 228 +struct platform_device jz4740_nand_device = {
 229 +       .name = "jz4740-nand",
 230 +       .num_resources = ARRAY_SIZE(jz4740_nand_resources),
 231 +       .resource = jz4740_nand_resources,
 232 +};
 233 +
 234 +/* LCD controller */
 235 +static struct resource jz4740_framebuffer_resources[] = {
 236 +       {
 237 +               .start  = JZ4740_LCD_BASE_ADDR,
 238 +               .end    = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
 239 +               .flags  = IORESOURCE_MEM,
 240 +       },
 241 +};
 242 +
 243 +struct platform_device jz4740_framebuffer_device = {
 244 +       .name           = "jz4740-fb",
 245 +       .id             = -1,
 246 +       .num_resources  = ARRAY_SIZE(jz4740_framebuffer_resources),
 247 +       .resource       = jz4740_framebuffer_resources,
 248 +       .dev = {
 249 +               .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
 250 +               .coherent_dma_mask = DMA_BIT_MASK(32),
 251 +       },
 252 +};
 253 +
 254 +/* I2S controller */
 255 +static struct resource jz4740_i2s_resources[] = {
 256 +       {
 257 +               .start  = JZ4740_AIC_BASE_ADDR,
 258 +               .end    = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
 259 +               .flags  = IORESOURCE_MEM,
 260 +       },
 261 +};
 262 +
 263 +struct platform_device jz4740_i2s_device = {
 264 +       .name           = "jz4740-i2s",
 265 +       .id             = -1,
 266 +       .num_resources  = ARRAY_SIZE(jz4740_i2s_resources),
 267 +       .resource       = jz4740_i2s_resources,
 268 +};
 269 +
 270 +/* PCM */
 271 +struct platform_device jz4740_pcm_device = {
 272 +       .name           = "jz4740-pcm",
 273 +       .id             = -1,
 274 +};
 275 +
 276 +/* Codec */
 277 +static struct resource jz4740_codec_resources[] = {
 278 +       {
 279 +               .start  = JZ4740_AIC_BASE_ADDR + 0x80,
 280 +               .end    = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
 281 +               .flags  = IORESOURCE_MEM,
 282 +       },
 283 +};
 284 +
 285 +struct platform_device jz4740_codec_device = {
 286 +       .name           = "jz4740-codec",
 287 +       .id             = -1,
 288 +       .num_resources  = ARRAY_SIZE(jz4740_codec_resources),
 289 +       .resource       = jz4740_codec_resources,
 290 +};
 291 +
 292 +/* ADC controller */
 293 +static struct resource jz4740_adc_resources[] = {
 294 +       {
 295 +               .start  = JZ4740_SADC_BASE_ADDR,
 296 +               .end    = JZ4740_SADC_BASE_ADDR + 0x30,
 297 +               .flags  = IORESOURCE_MEM,
 298 +       },
 299 +       {
 300 +               .start  = JZ4740_IRQ_SADC,
 301 +               .end    = JZ4740_IRQ_SADC,
 302 +               .flags  = IORESOURCE_IRQ,
 303 +       },
 304 +       {
 305 +               .start  = JZ4740_IRQ_ADC_BASE,
 306 +               .end    = JZ4740_IRQ_ADC_BASE,
 307 +               .flags  = IORESOURCE_IRQ,
 308 +       },
 309 +};
 310 +
 311 +struct platform_device jz4740_adc_device = {
 312 +       .name           = "jz4740-adc",
 313 +       .id             = -1,
 314 +       .num_resources  = ARRAY_SIZE(jz4740_adc_resources),
 315 +       .resource       = jz4740_adc_resources,
 316 +};
 317 +
 318 +/* Serial */
 319 +#define JZ4740_UART_DATA(_id) \
 320 +       { \
 321 +               .flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \
 322 +               .iotype = UPIO_MEM, \
 323 +               .regshift = 2, \
 324 +               .serial_out = jz4740_serial_out, \
 325 +               .type = PORT_16550, \
 326 +               .mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \
 327 +               .irq = JZ4740_IRQ_UART ## _id, \
 328 +       }
 329 +
 330 +static struct plat_serial8250_port jz4740_uart_data[] = {
 331 +       JZ4740_UART_DATA(0),
 332 +       JZ4740_UART_DATA(1),
 333 +       {},
 334 +};
 335 +
 336 +static struct platform_device jz4740_uart_device = {
 337 +       .name = "serial8250",
 338 +       .id = 0,
 339 +       .dev = {
 340 +               .platform_data = jz4740_uart_data,
 341 +       },
 342 +};
 343 +
 344 +void jz4740_serial_device_register(void)
 345 +{
 346 +       struct plat_serial8250_port *p;
 347 +
 348 +       for (p = jz4740_uart_data; p->flags != 0; ++p)
 349 +               p->uartclk = jz4740_clock_bdata.ext_rate;
 350 +
 351 +       platform_device_register(&jz4740_uart_device);
 352 +}