ar71xx: use a different pll value on DB120
[openwrt.git] / target / linux / ar71xx / patches-3.2 / 521-MIPS-ath79-enable-UART-for-early_serial.patch
1 --- a/arch/mips/ath79/early_printk.c
2 +++ b/arch/mips/ath79/early_printk.c
3 @@ -56,6 +56,46 @@ static void prom_putchar_dummy(unsigned
4 /* nothing to do */
5 }
6
7 +static void prom_enable_uart(u32 id)
8 +{
9 + void __iomem *gpio_base;
10 + u32 uart_en;
11 + u32 t;
12 +
13 + switch (id) {
14 + case REV_ID_MAJOR_AR71XX:
15 + uart_en = AR71XX_GPIO_FUNC_UART_EN;
16 + break;
17 +
18 + case REV_ID_MAJOR_AR7240:
19 + case REV_ID_MAJOR_AR7241:
20 + case REV_ID_MAJOR_AR7242:
21 + uart_en = AR724X_GPIO_FUNC_UART_EN;
22 + break;
23 +
24 + case REV_ID_MAJOR_AR913X:
25 + uart_en = AR913X_GPIO_FUNC_UART_EN;
26 + break;
27 +
28 + case REV_ID_MAJOR_AR9330:
29 + case REV_ID_MAJOR_AR9331:
30 + uart_en = AR933X_GPIO_FUNC_UART_EN;
31 + break;
32 +
33 + case REV_ID_MAJOR_AR9341:
34 + case REV_ID_MAJOR_AR9342:
35 + case REV_ID_MAJOR_AR9344:
36 + /* TODO */
37 + default:
38 + return;
39 + }
40 +
41 + gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE));
42 + t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC);
43 + t |= uart_en;
44 + __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC);
45 +}
46 +
47 static void prom_putchar_init(void)
48 {
49 void __iomem *base;
50 @@ -84,8 +124,10 @@ static void prom_putchar_init(void)
51
52 default:
53 _prom_putchar = prom_putchar_dummy;
54 - break;
55 + return;
56 }
57 +
58 + prom_enable_uart(id);
59 }
60
61 void prom_putchar(unsigned char ch)
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