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b43: Make probing of NPHY devices possible.
[openwrt.git] / target / linux / generic-2.6 / files / drivers / ssb / main.c
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/ssb/ssb.h>
15 #include <linux/ssb/ssb_regs.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pci.h>
18
19 #include <pcmcia/cs_types.h>
20 #include <pcmcia/cs.h>
21 #include <pcmcia/cistpl.h>
22 #include <pcmcia/ds.h>
23
24
25 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
26 MODULE_LICENSE("GPL");
27
28
29 /* Temporary list of yet-to-be-attached buses */
30 static LIST_HEAD(attach_queue);
31 /* List if running buses */
32 static LIST_HEAD(buses);
33 /* Software ID counter */
34 static unsigned int next_busnumber;
35 /* buses_mutes locks the two buslists and the next_busnumber.
36 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
37 static DEFINE_MUTEX(buses_mutex);
38
39 /* There are differences in the codeflow, if the bus is
40 * initialized from early boot, as various needed services
41 * are not available early. This is a mechanism to delay
42 * these initializations to after early boot has finished.
43 * It's also used to avoid mutex locking, as that's not
44 * available and needed early. */
45 static bool ssb_is_early_boot = 1;
46
47 static void ssb_buses_lock(void);
48 static void ssb_buses_unlock(void);
49
50
51 #ifdef CONFIG_SSB_PCIHOST
52 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
53 {
54 struct ssb_bus *bus;
55
56 ssb_buses_lock();
57 list_for_each_entry(bus, &buses, list) {
58 if (bus->bustype == SSB_BUSTYPE_PCI &&
59 bus->host_pci == pdev)
60 goto found;
61 }
62 bus = NULL;
63 found:
64 ssb_buses_unlock();
65
66 return bus;
67 }
68 #endif /* CONFIG_SSB_PCIHOST */
69
70 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
71 {
72 if (dev)
73 get_device(dev->dev);
74 return dev;
75 }
76
77 static void ssb_device_put(struct ssb_device *dev)
78 {
79 if (dev)
80 put_device(dev->dev);
81 }
82
83 static int ssb_bus_resume(struct ssb_bus *bus)
84 {
85 int err;
86
87 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
88 err = ssb_pcmcia_init(bus);
89 if (err) {
90 /* No need to disable XTAL, as we don't have one on PCMCIA. */
91 return err;
92 }
93 ssb_chipco_resume(&bus->chipco);
94
95 return 0;
96 }
97
98 static int ssb_device_resume(struct device *dev)
99 {
100 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
101 struct ssb_driver *ssb_drv;
102 struct ssb_bus *bus;
103 int err = 0;
104
105 bus = ssb_dev->bus;
106 if (bus->suspend_cnt == bus->nr_devices) {
107 err = ssb_bus_resume(bus);
108 if (err)
109 return err;
110 }
111 bus->suspend_cnt--;
112 if (dev->driver) {
113 ssb_drv = drv_to_ssb_drv(dev->driver);
114 if (ssb_drv && ssb_drv->resume)
115 err = ssb_drv->resume(ssb_dev);
116 if (err)
117 goto out;
118 }
119 out:
120 return err;
121 }
122
123 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
124 {
125 ssb_chipco_suspend(&bus->chipco, state);
126 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
127
128 /* Reset HW state information in memory, so that HW is
129 * completely reinitialized on resume. */
130 bus->mapped_device = NULL;
131 #ifdef CONFIG_SSB_DRIVER_PCICORE
132 bus->pcicore.setup_done = 0;
133 #endif
134 #ifdef CONFIG_SSB_DEBUG
135 bus->powered_up = 0;
136 #endif
137 }
138
139 static int ssb_device_suspend(struct device *dev, pm_message_t state)
140 {
141 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
142 struct ssb_driver *ssb_drv;
143 struct ssb_bus *bus;
144 int err = 0;
145
146 if (dev->driver) {
147 ssb_drv = drv_to_ssb_drv(dev->driver);
148 if (ssb_drv && ssb_drv->suspend)
149 err = ssb_drv->suspend(ssb_dev, state);
150 if (err)
151 goto out;
152 }
153
154 bus = ssb_dev->bus;
155 bus->suspend_cnt++;
156 if (bus->suspend_cnt == bus->nr_devices) {
157 /* All devices suspended. Shutdown the bus. */
158 ssb_bus_suspend(bus, state);
159 }
160
161 out:
162 return err;
163 }
164
165 #ifdef CONFIG_SSB_PCIHOST
166 int ssb_devices_freeze(struct ssb_bus *bus)
167 {
168 struct ssb_device *dev;
169 struct ssb_driver *drv;
170 int err = 0;
171 int i;
172 pm_message_t state = PMSG_FREEZE;
173
174 /* First check that we are capable to freeze all devices. */
175 for (i = 0; i < bus->nr_devices; i++) {
176 dev = &(bus->devices[i]);
177 if (!dev->dev ||
178 !dev->dev->driver ||
179 !device_is_registered(dev->dev))
180 continue;
181 drv = drv_to_ssb_drv(dev->dev->driver);
182 if (!drv)
183 continue;
184 if (!drv->suspend) {
185 /* Nope, can't suspend this one. */
186 return -EOPNOTSUPP;
187 }
188 }
189 /* Now suspend all devices */
190 for (i = 0; i < bus->nr_devices; i++) {
191 dev = &(bus->devices[i]);
192 if (!dev->dev ||
193 !dev->dev->driver ||
194 !device_is_registered(dev->dev))
195 continue;
196 drv = drv_to_ssb_drv(dev->dev->driver);
197 if (!drv)
198 continue;
199 err = drv->suspend(dev, state);
200 if (err) {
201 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
202 dev->dev->bus_id);
203 goto err_unwind;
204 }
205 }
206
207 return 0;
208 err_unwind:
209 for (i--; i >= 0; i--) {
210 dev = &(bus->devices[i]);
211 if (!dev->dev ||
212 !dev->dev->driver ||
213 !device_is_registered(dev->dev))
214 continue;
215 drv = drv_to_ssb_drv(dev->dev->driver);
216 if (!drv)
217 continue;
218 if (drv->resume)
219 drv->resume(dev);
220 }
221 return err;
222 }
223
224 int ssb_devices_thaw(struct ssb_bus *bus)
225 {
226 struct ssb_device *dev;
227 struct ssb_driver *drv;
228 int err;
229 int i;
230
231 for (i = 0; i < bus->nr_devices; i++) {
232 dev = &(bus->devices[i]);
233 if (!dev->dev ||
234 !dev->dev->driver ||
235 !device_is_registered(dev->dev))
236 continue;
237 drv = drv_to_ssb_drv(dev->dev->driver);
238 if (!drv)
239 continue;
240 if (SSB_WARN_ON(!drv->resume))
241 continue;
242 err = drv->resume(dev);
243 if (err) {
244 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
245 dev->dev->bus_id);
246 }
247 }
248
249 return 0;
250 }
251 #endif /* CONFIG_SSB_PCIHOST */
252
253 static void ssb_device_shutdown(struct device *dev)
254 {
255 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
256 struct ssb_driver *ssb_drv;
257
258 if (!dev->driver)
259 return;
260 ssb_drv = drv_to_ssb_drv(dev->driver);
261 if (ssb_drv && ssb_drv->shutdown)
262 ssb_drv->shutdown(ssb_dev);
263 }
264
265 static int ssb_device_remove(struct device *dev)
266 {
267 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
268 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
269
270 if (ssb_drv && ssb_drv->remove)
271 ssb_drv->remove(ssb_dev);
272 ssb_device_put(ssb_dev);
273
274 return 0;
275 }
276
277 static int ssb_device_probe(struct device *dev)
278 {
279 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
280 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
281 int err = 0;
282
283 ssb_device_get(ssb_dev);
284 if (ssb_drv && ssb_drv->probe)
285 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
286 if (err)
287 ssb_device_put(ssb_dev);
288
289 return err;
290 }
291
292 static int ssb_match_devid(const struct ssb_device_id *tabid,
293 const struct ssb_device_id *devid)
294 {
295 if ((tabid->vendor != devid->vendor) &&
296 tabid->vendor != SSB_ANY_VENDOR)
297 return 0;
298 if ((tabid->coreid != devid->coreid) &&
299 tabid->coreid != SSB_ANY_ID)
300 return 0;
301 if ((tabid->revision != devid->revision) &&
302 tabid->revision != SSB_ANY_REV)
303 return 0;
304 return 1;
305 }
306
307 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
308 {
309 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
310 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
311 const struct ssb_device_id *id;
312
313 for (id = ssb_drv->id_table;
314 id->vendor || id->coreid || id->revision;
315 id++) {
316 if (ssb_match_devid(id, &ssb_dev->id))
317 return 1; /* found */
318 }
319
320 return 0;
321 }
322
323 static int ssb_device_uevent(struct device *dev, char **envp, int num_envp,
324 char *buffer, int buffer_size)
325 {
326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
327 int ret, i = 0, length = 0;
328
329 if (!dev)
330 return -ENODEV;
331
332 ret = add_uevent_var(envp, num_envp, &i,
333 buffer, buffer_size, &length,
334 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
335 ssb_dev->id.vendor, ssb_dev->id.coreid,
336 ssb_dev->id.revision);
337 envp[i] = NULL;
338
339 return ret;
340 }
341
342 static struct bus_type ssb_bustype = {
343 .name = "ssb",
344 .match = ssb_bus_match,
345 .probe = ssb_device_probe,
346 .remove = ssb_device_remove,
347 .shutdown = ssb_device_shutdown,
348 .suspend = ssb_device_suspend,
349 .resume = ssb_device_resume,
350 .uevent = ssb_device_uevent,
351 };
352
353 static void ssb_buses_lock(void)
354 {
355 /* See the comment at the ssb_is_early_boot definition */
356 if (!ssb_is_early_boot)
357 mutex_lock(&buses_mutex);
358 }
359
360 static void ssb_buses_unlock(void)
361 {
362 /* See the comment at the ssb_is_early_boot definition */
363 if (!ssb_is_early_boot)
364 mutex_unlock(&buses_mutex);
365 }
366
367 static void ssb_devices_unregister(struct ssb_bus *bus)
368 {
369 struct ssb_device *sdev;
370 int i;
371
372 for (i = bus->nr_devices - 1; i >= 0; i--) {
373 sdev = &(bus->devices[i]);
374 if (sdev->dev)
375 device_unregister(sdev->dev);
376 }
377 }
378
379 void ssb_bus_unregister(struct ssb_bus *bus)
380 {
381 ssb_buses_lock();
382 ssb_devices_unregister(bus);
383 list_del(&bus->list);
384 ssb_buses_unlock();
385
386 /* ssb_pcmcia_exit(bus); */
387 ssb_pci_exit(bus);
388 ssb_iounmap(bus);
389 }
390 EXPORT_SYMBOL(ssb_bus_unregister);
391
392 static void ssb_release_dev(struct device *dev)
393 {
394 struct __ssb_dev_wrapper *devwrap;
395
396 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
397 kfree(devwrap);
398 }
399
400 static int ssb_devices_register(struct ssb_bus *bus)
401 {
402 struct ssb_device *sdev;
403 struct device *dev;
404 struct __ssb_dev_wrapper *devwrap;
405 int i, err = 0;
406 int dev_idx = 0;
407
408 for (i = 0; i < bus->nr_devices; i++) {
409 sdev = &(bus->devices[i]);
410
411 /* We don't register SSB-system devices to the kernel,
412 * as the drivers for them are built into SSB. */
413 switch (sdev->id.coreid) {
414 case SSB_DEV_CHIPCOMMON:
415 case SSB_DEV_PCI:
416 case SSB_DEV_PCIE:
417 case SSB_DEV_PCMCIA:
418 case SSB_DEV_MIPS:
419 case SSB_DEV_MIPS_3302:
420 case SSB_DEV_EXTIF:
421 continue;
422 }
423
424 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
425 if (!devwrap) {
426 ssb_printk(KERN_ERR PFX
427 "Could not allocate device\n");
428 err = -ENOMEM;
429 goto error;
430 }
431 dev = &devwrap->dev;
432 devwrap->sdev = sdev;
433
434 dev->release = ssb_release_dev;
435 dev->bus = &ssb_bustype;
436 snprintf(dev->bus_id, sizeof(dev->bus_id),
437 "ssb%u:%d", bus->busnumber, dev_idx);
438
439 switch (bus->bustype) {
440 case SSB_BUSTYPE_PCI:
441 #ifdef CONFIG_SSB_PCIHOST
442 sdev->irq = bus->host_pci->irq;
443 dev->parent = &bus->host_pci->dev;
444 #endif
445 break;
446 case SSB_BUSTYPE_PCMCIA:
447 #ifdef CONFIG_SSB_PCMCIAHOST
448 dev->parent = &bus->host_pcmcia->dev;
449 #endif
450 break;
451 case SSB_BUSTYPE_SSB:
452 break;
453 }
454
455 sdev->dev = dev;
456 err = device_register(dev);
457 if (err) {
458 ssb_printk(KERN_ERR PFX
459 "Could not register %s\n",
460 dev->bus_id);
461 /* Set dev to NULL to not unregister
462 * dev on error unwinding. */
463 sdev->dev = NULL;
464 kfree(devwrap);
465 goto error;
466 }
467 dev_idx++;
468 }
469
470 return 0;
471 error:
472 /* Unwind the already registered devices. */
473 ssb_devices_unregister(bus);
474 return err;
475 }
476
477 /* Needs ssb_buses_lock() */
478 static int ssb_attach_queued_buses(void)
479 {
480 struct ssb_bus *bus, *n;
481 int err = 0;
482 int drop_them_all = 0;
483
484 list_for_each_entry_safe(bus, n, &attach_queue, list) {
485 if (drop_them_all) {
486 list_del(&bus->list);
487 continue;
488 }
489 /* Can't init the PCIcore in ssb_bus_register(), as that
490 * is too early in boot for embedded systems
491 * (no udelay() available). So do it here in attach stage.
492 */
493 err = ssb_bus_powerup(bus, 0);
494 if (err)
495 goto error;
496 ssb_pcicore_init(&bus->pcicore);
497 ssb_bus_may_powerdown(bus);
498
499 err = ssb_devices_register(bus);
500 error:
501 if (err) {
502 drop_them_all = 1;
503 list_del(&bus->list);
504 continue;
505 }
506 list_move_tail(&bus->list, &buses);
507 }
508
509 return err;
510 }
511
512 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
513 {
514 struct ssb_bus *bus = dev->bus;
515
516 offset += dev->core_index * SSB_CORE_SIZE;
517 return readw(bus->mmio + offset);
518 }
519
520 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
521 {
522 struct ssb_bus *bus = dev->bus;
523
524 offset += dev->core_index * SSB_CORE_SIZE;
525 return readl(bus->mmio + offset);
526 }
527
528 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
529 {
530 struct ssb_bus *bus = dev->bus;
531
532 offset += dev->core_index * SSB_CORE_SIZE;
533 writew(value, bus->mmio + offset);
534 }
535
536 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
537 {
538 struct ssb_bus *bus = dev->bus;
539
540 offset += dev->core_index * SSB_CORE_SIZE;
541 writel(value, bus->mmio + offset);
542 }
543
544 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
545 static const struct ssb_bus_ops ssb_ssb_ops = {
546 .read16 = ssb_ssb_read16,
547 .read32 = ssb_ssb_read32,
548 .write16 = ssb_ssb_write16,
549 .write32 = ssb_ssb_write32,
550 };
551
552 static int ssb_fetch_invariants(struct ssb_bus *bus,
553 ssb_invariants_func_t get_invariants)
554 {
555 struct ssb_init_invariants iv;
556 int err;
557
558 memset(&iv, 0, sizeof(iv));
559 err = get_invariants(bus, &iv);
560 if (err)
561 goto out;
562 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
563 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
564 out:
565 return err;
566 }
567
568 static int ssb_bus_register(struct ssb_bus *bus,
569 ssb_invariants_func_t get_invariants,
570 unsigned long baseaddr)
571 {
572 int err;
573
574 spin_lock_init(&bus->bar_lock);
575 INIT_LIST_HEAD(&bus->list);
576
577 /* Powerup the bus */
578 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
579 if (err)
580 goto out;
581 ssb_buses_lock();
582 bus->busnumber = next_busnumber;
583 /* Scan for devices (cores) */
584 err = ssb_bus_scan(bus, baseaddr);
585 if (err)
586 goto err_disable_xtal;
587
588 /* Init PCI-host device (if any) */
589 err = ssb_pci_init(bus);
590 if (err)
591 goto err_unmap;
592 /* Init PCMCIA-host device (if any) */
593 err = ssb_pcmcia_init(bus);
594 if (err)
595 goto err_pci_exit;
596
597 /* Initialize basic system devices (if available) */
598 err = ssb_bus_powerup(bus, 0);
599 if (err)
600 goto err_pcmcia_exit;
601 ssb_chipcommon_init(&bus->chipco);
602 ssb_mipscore_init(&bus->mipscore);
603 err = ssb_fetch_invariants(bus, get_invariants);
604 if (err) {
605 ssb_bus_may_powerdown(bus);
606 goto err_pcmcia_exit;
607 }
608 ssb_bus_may_powerdown(bus);
609
610 /* Queue it for attach.
611 * See the comment at the ssb_is_early_boot definition. */
612 list_add_tail(&bus->list, &attach_queue);
613 if (!ssb_is_early_boot) {
614 /* This is not early boot, so we must attach the bus now */
615 err = ssb_attach_queued_buses();
616 if (err)
617 goto err_dequeue;
618 }
619 next_busnumber++;
620 ssb_buses_unlock();
621
622 out:
623 return err;
624
625 err_dequeue:
626 list_del(&bus->list);
627 err_pcmcia_exit:
628 /* ssb_pcmcia_exit(bus); */
629 err_pci_exit:
630 ssb_pci_exit(bus);
631 err_unmap:
632 ssb_iounmap(bus);
633 err_disable_xtal:
634 ssb_buses_unlock();
635 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
636 return err;
637 }
638
639 #ifdef CONFIG_SSB_PCIHOST
640 int ssb_bus_pcibus_register(struct ssb_bus *bus,
641 struct pci_dev *host_pci)
642 {
643 int err;
644
645 bus->bustype = SSB_BUSTYPE_PCI;
646 bus->host_pci = host_pci;
647 bus->ops = &ssb_pci_ops;
648
649 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
650 if (!err) {
651 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
652 "PCI device %s\n", host_pci->dev.bus_id);
653 }
654
655 return err;
656 }
657 EXPORT_SYMBOL(ssb_bus_pcibus_register);
658 #endif /* CONFIG_SSB_PCIHOST */
659
660 #ifdef CONFIG_SSB_PCMCIAHOST
661 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
662 struct pcmcia_device *pcmcia_dev,
663 unsigned long baseaddr)
664 {
665 int err;
666
667 bus->bustype = SSB_BUSTYPE_PCMCIA;
668 bus->host_pcmcia = pcmcia_dev;
669 bus->ops = &ssb_pcmcia_ops;
670
671 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
672 if (!err) {
673 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
674 "PCMCIA device %s\n", pcmcia_dev->devname);
675 }
676
677 return err;
678 }
679 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
680 #endif /* CONFIG_SSB_PCMCIAHOST */
681
682 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
683 unsigned long baseaddr,
684 ssb_invariants_func_t get_invariants)
685 {
686 int err;
687
688 bus->bustype = SSB_BUSTYPE_SSB;
689 bus->ops = &ssb_ssb_ops;
690
691 err = ssb_bus_register(bus, get_invariants, baseaddr);
692 if (!err) {
693 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
694 "address 0x%08lX\n", baseaddr);
695 }
696
697 return err;
698 }
699
700 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
701 {
702 drv->drv.name = drv->name;
703 drv->drv.bus = &ssb_bustype;
704 drv->drv.owner = owner;
705
706 return driver_register(&drv->drv);
707 }
708 EXPORT_SYMBOL(__ssb_driver_register);
709
710 void ssb_driver_unregister(struct ssb_driver *drv)
711 {
712 driver_unregister(&drv->drv);
713 }
714 EXPORT_SYMBOL(ssb_driver_unregister);
715
716 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
717 {
718 struct ssb_bus *bus = dev->bus;
719 struct ssb_device *ent;
720 int i;
721
722 for (i = 0; i < bus->nr_devices; i++) {
723 ent = &(bus->devices[i]);
724 if (ent->id.vendor != dev->id.vendor)
725 continue;
726 if (ent->id.coreid != dev->id.coreid)
727 continue;
728
729 ent->devtypedata = data;
730 }
731 }
732 EXPORT_SYMBOL(ssb_set_devtypedata);
733
734 static u32 clkfactor_f6_resolve(u32 v)
735 {
736 /* map the magic values */
737 switch (v) {
738 case SSB_CHIPCO_CLK_F6_2:
739 return 2;
740 case SSB_CHIPCO_CLK_F6_3:
741 return 3;
742 case SSB_CHIPCO_CLK_F6_4:
743 return 4;
744 case SSB_CHIPCO_CLK_F6_5:
745 return 5;
746 case SSB_CHIPCO_CLK_F6_6:
747 return 6;
748 case SSB_CHIPCO_CLK_F6_7:
749 return 7;
750 }
751 return 0;
752 }
753
754 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
755 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
756 {
757 u32 n1, n2, clock, m1, m2, m3, mc;
758
759 n1 = (n & SSB_CHIPCO_CLK_N1);
760 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
761
762 switch (plltype) {
763 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
764 if (m & SSB_CHIPCO_CLK_T6_MMASK)
765 return SSB_CHIPCO_CLK_T6_M0;
766 return SSB_CHIPCO_CLK_T6_M1;
767 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
768 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
769 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
770 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
771 n1 = clkfactor_f6_resolve(n1);
772 n2 += SSB_CHIPCO_CLK_F5_BIAS;
773 break;
774 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
775 n1 += SSB_CHIPCO_CLK_T2_BIAS;
776 n2 += SSB_CHIPCO_CLK_T2_BIAS;
777 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
778 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
779 break;
780 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
781 return 100000000;
782 default:
783 SSB_WARN_ON(1);
784 }
785
786 switch (plltype) {
787 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
788 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
789 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
790 break;
791 default:
792 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
793 }
794 if (!clock)
795 return 0;
796
797 m1 = (m & SSB_CHIPCO_CLK_M1);
798 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
799 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
800 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
801
802 switch (plltype) {
803 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
804 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
805 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
806 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
807 m1 = clkfactor_f6_resolve(m1);
808 if ((plltype == SSB_PLLTYPE_1) ||
809 (plltype == SSB_PLLTYPE_3))
810 m2 += SSB_CHIPCO_CLK_F5_BIAS;
811 else
812 m2 = clkfactor_f6_resolve(m2);
813 m3 = clkfactor_f6_resolve(m3);
814
815 switch (mc) {
816 case SSB_CHIPCO_CLK_MC_BYPASS:
817 return clock;
818 case SSB_CHIPCO_CLK_MC_M1:
819 return (clock / m1);
820 case SSB_CHIPCO_CLK_MC_M1M2:
821 return (clock / (m1 * m2));
822 case SSB_CHIPCO_CLK_MC_M1M2M3:
823 return (clock / (m1 * m2 * m3));
824 case SSB_CHIPCO_CLK_MC_M1M3:
825 return (clock / (m1 * m3));
826 }
827 return 0;
828 case SSB_PLLTYPE_2:
829 m1 += SSB_CHIPCO_CLK_T2_BIAS;
830 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
831 m3 += SSB_CHIPCO_CLK_T2_BIAS;
832 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
833 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
834 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
835
836 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
837 clock /= m1;
838 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
839 clock /= m2;
840 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
841 clock /= m3;
842 return clock;
843 default:
844 SSB_WARN_ON(1);
845 }
846 return 0;
847 }
848
849 /* Get the current speed the backplane is running at */
850 u32 ssb_clockspeed(struct ssb_bus *bus)
851 {
852 u32 rate;
853 u32 plltype;
854 u32 clkctl_n, clkctl_m;
855
856 if (ssb_extif_available(&bus->extif))
857 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
858 &clkctl_n, &clkctl_m);
859 else if (bus->chipco.dev)
860 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
861 &clkctl_n, &clkctl_m);
862 else
863 return 0;
864
865 if (bus->chip_id == 0x5365) {
866 rate = 100000000;
867 } else {
868 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
869 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
870 rate /= 2;
871 }
872
873 return rate;
874 }
875 EXPORT_SYMBOL(ssb_clockspeed);
876
877 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
878 {
879 /* The REJECT bit changed position in TMSLOW between
880 * Backplane revisions. */
881 switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) {
882 case SSB_IDLOW_SSBREV_22:
883 return SSB_TMSLOW_REJECT_22;
884 case SSB_IDLOW_SSBREV_23:
885 return SSB_TMSLOW_REJECT_23;
886 default:
887 WARN_ON(1);
888 }
889 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
890 }
891
892 int ssb_device_is_enabled(struct ssb_device *dev)
893 {
894 u32 val;
895 u32 reject;
896
897 reject = ssb_tmslow_reject_bitmask(dev);
898 val = ssb_read32(dev, SSB_TMSLOW);
899 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
900
901 return (val == SSB_TMSLOW_CLOCK);
902 }
903 EXPORT_SYMBOL(ssb_device_is_enabled);
904
905 static void ssb_flush_tmslow(struct ssb_device *dev)
906 {
907 /* Make _really_ sure the device has finished the TMSLOW
908 * register write transaction, as we risk running into
909 * a machine check exception otherwise.
910 * Do this by reading the register back to commit the
911 * PCI write and delay an additional usec for the device
912 * to react to the change. */
913 ssb_read32(dev, SSB_TMSLOW);
914 udelay(1);
915 }
916
917 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
918 {
919 u32 val;
920
921 ssb_device_disable(dev, core_specific_flags);
922 ssb_write32(dev, SSB_TMSLOW,
923 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
924 SSB_TMSLOW_FGC | core_specific_flags);
925 ssb_flush_tmslow(dev);
926
927 /* Clear SERR if set. This is a hw bug workaround. */
928 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
929 ssb_write32(dev, SSB_TMSHIGH, 0);
930
931 val = ssb_read32(dev, SSB_IMSTATE);
932 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
933 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
934 ssb_write32(dev, SSB_IMSTATE, val);
935 }
936
937 ssb_write32(dev, SSB_TMSLOW,
938 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
939 core_specific_flags);
940 ssb_flush_tmslow(dev);
941
942 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
943 core_specific_flags);
944 ssb_flush_tmslow(dev);
945 }
946 EXPORT_SYMBOL(ssb_device_enable);
947
948 /* Wait for a bit in a register to get set or unset.
949 * timeout is in units of ten-microseconds */
950 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
951 int timeout, int set)
952 {
953 int i;
954 u32 val;
955
956 for (i = 0; i < timeout; i++) {
957 val = ssb_read32(dev, reg);
958 if (set) {
959 if (val & bitmask)
960 return 0;
961 } else {
962 if (!(val & bitmask))
963 return 0;
964 }
965 udelay(10);
966 }
967 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
968 "register %04X to %s.\n",
969 bitmask, reg, (set ? "set" : "clear"));
970
971 return -ETIMEDOUT;
972 }
973
974 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
975 {
976 u32 reject;
977
978 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
979 return;
980
981 reject = ssb_tmslow_reject_bitmask(dev);
982 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
983 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
984 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
985 ssb_write32(dev, SSB_TMSLOW,
986 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
987 reject | SSB_TMSLOW_RESET |
988 core_specific_flags);
989 ssb_flush_tmslow(dev);
990
991 ssb_write32(dev, SSB_TMSLOW,
992 reject | SSB_TMSLOW_RESET |
993 core_specific_flags);
994 ssb_flush_tmslow(dev);
995 }
996 EXPORT_SYMBOL(ssb_device_disable);
997
998 u32 ssb_dma_translation(struct ssb_device *dev)
999 {
1000 switch (dev->bus->bustype) {
1001 case SSB_BUSTYPE_SSB:
1002 return 0;
1003 case SSB_BUSTYPE_PCI:
1004 case SSB_BUSTYPE_PCMCIA:
1005 return SSB_PCI_DMA;
1006 }
1007 return 0;
1008 }
1009 EXPORT_SYMBOL(ssb_dma_translation);
1010
1011 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1012 {
1013 struct device *dev = ssb_dev->dev;
1014
1015 #ifdef CONFIG_SSB_PCIHOST
1016 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1017 !dma_supported(dev, mask))
1018 return -EIO;
1019 #endif
1020 dev->coherent_dma_mask = mask;
1021 dev->dma_mask = &dev->coherent_dma_mask;
1022
1023 return 0;
1024 }
1025 EXPORT_SYMBOL(ssb_dma_set_mask);
1026
1027 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1028 {
1029 struct ssb_chipcommon *cc;
1030 int err = 0;
1031
1032 /* On buses where more than one core may be working
1033 * at a time, we must not powerdown stuff if there are
1034 * still cores that may want to run. */
1035 if (bus->bustype == SSB_BUSTYPE_SSB)
1036 goto out;
1037
1038 cc = &bus->chipco;
1039 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1040 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1041 if (err)
1042 goto error;
1043 out:
1044 #ifdef CONFIG_SSB_DEBUG
1045 bus->powered_up = 0;
1046 #endif
1047 return err;
1048 error:
1049 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1050 goto out;
1051 }
1052 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1053
1054 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1055 {
1056 struct ssb_chipcommon *cc;
1057 int err;
1058 enum ssb_clkmode mode;
1059
1060 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1061 if (err)
1062 goto error;
1063 cc = &bus->chipco;
1064 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1065 ssb_chipco_set_clockmode(cc, mode);
1066
1067 #ifdef CONFIG_SSB_DEBUG
1068 bus->powered_up = 1;
1069 #endif
1070 return 0;
1071 error:
1072 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1073 return err;
1074 }
1075 EXPORT_SYMBOL(ssb_bus_powerup);
1076
1077 u32 ssb_admatch_base(u32 adm)
1078 {
1079 u32 base = 0;
1080
1081 switch (adm & SSB_ADM_TYPE) {
1082 case SSB_ADM_TYPE0:
1083 base = (adm & SSB_ADM_BASE0);
1084 break;
1085 case SSB_ADM_TYPE1:
1086 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1087 base = (adm & SSB_ADM_BASE1);
1088 break;
1089 case SSB_ADM_TYPE2:
1090 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1091 base = (adm & SSB_ADM_BASE2);
1092 break;
1093 default:
1094 SSB_WARN_ON(1);
1095 }
1096
1097 return base;
1098 }
1099 EXPORT_SYMBOL(ssb_admatch_base);
1100
1101 u32 ssb_admatch_size(u32 adm)
1102 {
1103 u32 size = 0;
1104
1105 switch (adm & SSB_ADM_TYPE) {
1106 case SSB_ADM_TYPE0:
1107 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1108 break;
1109 case SSB_ADM_TYPE1:
1110 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1111 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1112 break;
1113 case SSB_ADM_TYPE2:
1114 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1115 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1116 break;
1117 default:
1118 SSB_WARN_ON(1);
1119 }
1120 size = (1 << (size + 1));
1121
1122 return size;
1123 }
1124 EXPORT_SYMBOL(ssb_admatch_size);
1125
1126 static int __init ssb_modinit(void)
1127 {
1128 int err;
1129
1130 /* See the comment at the ssb_is_early_boot definition */
1131 ssb_is_early_boot = 0;
1132 err = bus_register(&ssb_bustype);
1133 if (err)
1134 return err;
1135
1136 /* Maybe we already registered some buses at early boot.
1137 * Check for this and attach them
1138 */
1139 ssb_buses_lock();
1140 err = ssb_attach_queued_buses();
1141 ssb_buses_unlock();
1142 if (err)
1143 bus_unregister(&ssb_bustype);
1144
1145 err = b43_pci_ssb_bridge_init();
1146 if (err) {
1147 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1148 "initialization failed");
1149 /* don't fail SSB init because of this */
1150 err = 0;
1151 }
1152
1153 return err;
1154 }
1155 subsys_initcall(ssb_modinit);
1156
1157 static void __exit ssb_modexit(void)
1158 {
1159 b43_pci_ssb_bridge_exit();
1160 bus_unregister(&ssb_bustype);
1161 }
1162 module_exit(ssb_modexit)
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