4 * ADM5120 specific PCI operations
6 * Copyright (C) ADMtek Incorporated.
7 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
8 * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
9 * Copyright (C) 2007 OpenWrt.org
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the
23 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
24 * Boston, MA 02110-1301, USA.
28 #include <linux/types.h>
29 #include <linux/kernel.h>
30 #include <linux/pci.h>
32 #include <asm/mach-adm5120/adm5120_defs.h>
36 #define DBG(f, ...) printk(f, ## __VA_ARGS__ )
41 #define PCI_ENABLE 0x80000000
43 static inline void write_cfgaddr(u32 addr
)
45 *(volatile u32
*)KSEG1ADDR(ADM5120_PCICFG_ADDR
) = (addr
| PCI_ENABLE
);
48 static inline void write_cfgdata(u32 data
)
50 *(volatile u32
*)KSEG1ADDR(ADM5120_PCICFG_DATA
) = data
;
54 static inline u32
read_cfgdata(void)
56 return (*(volatile u32
*)KSEG1ADDR(ADM5120_PCICFG_DATA
));
59 static inline u32
mkaddr(struct pci_bus
*bus
, unsigned int devfn
, int where
)
61 return (((bus
->number
& 0xFF) << 16) | ((devfn
& 0xFF) << 8) | \
65 static int pci_config_read(struct pci_bus
*bus
, unsigned int devfn
, int where
,
70 write_cfgaddr(mkaddr(bus
,devfn
,where
));
71 data
= read_cfgdata();
73 DBG("PCI: cfg_read %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
74 bus
->number
, PCI_SLOT(devfn
), PCI_FUNC(devfn
), where
, size
, data
);
92 DBG(", 0x%08X returned\n", data
);
94 return PCIBIOS_SUCCESSFUL
;
97 static int pci_config_write(struct pci_bus
*bus
, unsigned int devfn
, int where
,
103 write_cfgaddr(mkaddr(bus
,devfn
,where
));
104 data
= read_cfgdata();
106 DBG("PCI: cfg_write %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
107 bus
->number
, PCI_SLOT(devfn
), PCI_FUNC(devfn
), where
, size
, data
);
111 s
= ((where
& 3) << 3);
112 data
&= ~(0xFF << s
);
113 data
|= ((val
& 0xFF) << s
);
116 s
= ((where
& 2) << 4);
117 data
&= ~(0xFFFF << s
);
118 data
|= ((val
& 0xFFFF) << s
);
126 DBG(", 0x%08X written\n", data
);
128 return PCIBIOS_SUCCESSFUL
;
131 struct pci_ops adm5120_pci_ops
= {
132 .read
= pci_config_read
,
133 .write
= pci_config_write
,
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