1 --- a/arch/mips/amazon/interrupt.c
2 +++ b/arch/mips/amazon/interrupt.c
3 @@ -177,12 +177,11 @@ void __init arch_init_irq(void)
4 setup_irq(i, &cascade);
7 - for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
8 - irq_desc[i].status = IRQ_DISABLED;
9 - irq_desc[i].action = 0;
10 - irq_desc[i].depth = 1;
11 - set_irq_chip(i, &amazon_irq_type);
13 + for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
14 + set_irq_chip_and_handler(i, &amazon_irq_type,
17 + set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
20 void __cpuinit arch_fixup_c0_irqs(void)