2 * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions.
5 * Copyright 2004, Broadcom Corporation
8 * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
9 * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
10 * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
11 * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
18 /* All the addresses that are offsets in attribute space are divided
19 * by two to account for the fact that odd bytes are invalid in
20 * attribute space and our read/write routines make the space appear
21 * as if they didn't exist. Still we want to show the original numbers
22 * as documented in the hnd_pcmcia core manual.
25 /* PCMCIA Function Configuration Registers */
26 #define PCMCIA_FCR (0x700 / 2)
29 #define FCR1_OFF (0x40 / 2)
30 #define FCR2_OFF (0x80 / 2)
31 #define FCR3_OFF (0xc0 / 2)
33 #define PCMCIA_FCR0 (0x700 / 2)
34 #define PCMCIA_FCR1 (0x740 / 2)
35 #define PCMCIA_FCR2 (0x780 / 2)
36 #define PCMCIA_FCR3 (0x7c0 / 2)
38 /* Standard PCMCIA FCR registers */
44 #define COR_IRQEN 0x04
45 #define COR_BLREN 0x01
46 #define COR_FUNEN 0x01
49 #define PCICIA_FCSR (2 / 2)
50 #define PCICIA_PRR (4 / 2)
51 #define PCICIA_SCR (6 / 2)
52 #define PCICIA_ESR (8 / 2)
55 #define PCM_MEMOFF 0x0000
56 #define F0_MEMOFF 0x1000
57 #define F1_MEMOFF 0x2000
58 #define F2_MEMOFF 0x3000
59 #define F3_MEMOFF 0x4000
61 /* Memory base in the function fcr's */
62 #define MEM_ADDR0 (0x728 / 2)
63 #define MEM_ADDR1 (0x72a / 2)
64 #define MEM_ADDR2 (0x72c / 2)
66 /* PCMCIA base plus Srom access in fcr0: */
67 #define PCMCIA_ADDR0 (0x072e / 2)
68 #define PCMCIA_ADDR1 (0x0730 / 2)
69 #define PCMCIA_ADDR2 (0x0732 / 2)
71 #define MEM_SEG (0x0734 / 2)
72 #define SROM_CS (0x0736 / 2)
73 #define SROM_DATAL (0x0738 / 2)
74 #define SROM_DATAH (0x073a / 2)
75 #define SROM_ADDRL (0x073c / 2)
76 #define SROM_ADDRH (0x073e / 2)
78 /* Values for srom_cs: */
88 /* The CIS stops where the FCRs start */
89 #define CIS_SIZE PCMCIA_FCR
91 /* Standard tuples we know about */
93 #define CISTPL_MANFID 0x20 /* Manufacturer and device id */
94 #define CISTPL_FUNCE 0x22 /* Function extensions */
95 #define CISTPL_CFTABLE 0x1b /* Config table entry */
97 /* Function extensions for LANs */
99 #define LAN_TECH 1 /* Technology type */
100 #define LAN_SPEED 2 /* Raw bit rate */
101 #define LAN_MEDIA 3 /* Transmission media */
102 #define LAN_NID 4 /* Node identification (aka MAC addr) */
103 #define LAN_CONN 5 /* Connector standard */
107 #define CFTABLE_REGWIN_2K 0x08 /* 2k reg windows size */
108 #define CFTABLE_REGWIN_4K 0x10 /* 4k reg windows size */
109 #define CFTABLE_REGWIN_8K 0x20 /* 8k reg windows size */
111 /* Vendor unique tuples are 0x80-0x8f. Within Broadcom we'll
112 * take one for HNBU, and use "extensions" (a la FUNCE) within it.
115 #define CISTPL_BRCM_HNBU 0x80
117 /* Subtypes of BRCM_HNBU: */
119 #define HNBU_CHIPID 0x01 /* Six bytes with PCI vendor &
120 * device id and chiprev
122 #define HNBU_BOARDREV 0x02 /* Two bytes board revision */
123 #define HNBU_PAPARMS 0x03 /* Eleven bytes PA parameters */
124 #define HNBU_OEM 0x04 /* Eight bytes OEM data */
125 #define HNBU_CC 0x05 /* Default country code */
126 #define HNBU_AA 0x06 /* Antennas available */
127 #define HNBU_AG 0x07 /* Antenna gain */
128 #define HNBU_BOARDFLAGS 0x08 /* board flags */
129 #define HNBU_LED 0x09 /* LED set */
133 #define SBTML_INT_ACK 0x40000 /* ack the sb interrupt */
134 #define SBTML_INT_EN 0x20000 /* enable sb interrupt */
137 #define SBTMH_INT_STATUS 0x40000 /* sb interrupt status */
139 #endif /* _SBPCMCIA_H */
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