3 @@ -2307,6 +2307,17 @@ ath_intr(int irq, void *dev_id, struct p
6 status &= sc->sc_imask; /* discard unasked for bits */
8 + /* Treat RXORN as non-fatal. Either the bus is busy or the CPU
9 + * is not fast enough to process all frames. Treat it like
12 + if (status & HAL_INT_RXORN) {
13 + sc->sc_stats.ast_rxorn++;
14 + status &= ~HAL_INT_RXORN;
15 + status |= HAL_INT_RX;
18 /* As soon as we know we have a real interrupt we intend to service,
19 * we will check to see if we need an initial hardware TSF reading.
20 * Normally we would just populate this all the time to keep things
21 @@ -2319,10 +2330,6 @@ ath_intr(int irq, void *dev_id, struct p
22 sc->sc_stats.ast_hardware++;
23 ath_hal_intrset(ah, 0); /* disable intr's until reset */
24 ATH_SCHEDULE_TQUEUE(&sc->sc_fataltq, &needmark);
25 - } else if (status & HAL_INT_RXORN) {
26 - sc->sc_stats.ast_rxorn++;
27 - ath_hal_intrset(ah, 0); /* disable intr's until reset */
28 - ATH_SCHEDULE_TQUEUE(&sc->sc_rxorntq, &needmark);
30 if (status & HAL_INT_SWBA) {
31 struct ieee80211vap * vap;