linux/atheros: add preliminary 2.6.36 kernel support (refresh patches)
[openwrt.git] / target / linux / brcm47xx / patches-2.6.34 / 021-USB-Add-USB-2.0-to-ssb-ohci-driver.patch
1 From ca00adabb88dd1194891624836d7574aab2d7c05 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 18 Jul 2010 21:25:03 +0200
4 Subject: [PATCH 1/2] USB: Add USB 2.0 to ssb ohci driver
5
6 This adds USB 2.0 support to ssb ohci driver.
7 This patch was used in OpenWRT for a long time now.
8
9 CC: Steve Brown <sbrown@cortland.com>
10 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
11 ---
12 drivers/usb/host/ohci-ssb.c | 52 ++++++++++++++++++++++++++++++++++++++++--
13 1 files changed, 49 insertions(+), 3 deletions(-)
14
15 --- a/drivers/usb/host/ohci-ssb.c
16 +++ b/drivers/usb/host/ohci-ssb.c
17 @@ -93,8 +93,11 @@ static void ssb_ohci_detach(struct ssb_d
18 {
19 struct usb_hcd *hcd = ssb_get_drvdata(dev);
20
21 + if (hcd->driver->shutdown)
22 + hcd->driver->shutdown(hcd);
23 usb_remove_hcd(hcd);
24 iounmap(hcd->regs);
25 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
26 usb_put_hcd(hcd);
27 ssb_device_disable(dev, 0);
28 }
29 @@ -106,10 +109,52 @@ static int ssb_ohci_attach(struct ssb_de
30 int err = -ENOMEM;
31 u32 tmp, flags = 0;
32
33 - if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV)
34 - flags |= SSB_OHCI_TMSLOW_HOSTMODE;
35 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
36 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
37 + return -EOPNOTSUPP;
38
39 - ssb_device_enable(dev, flags);
40 + if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) {
41 + /* Put the device into host-mode. */
42 + flags |= SSB_OHCI_TMSLOW_HOSTMODE;
43 + ssb_device_enable(dev, flags);
44 + } else if (dev->id.coreid == SSB_DEV_USB20_HOST) {
45 + /*
46 + * USB 2.0 special considerations:
47 + *
48 + * In addition to the standard SSB reset sequence, the Host
49 + * Control Register must be programmed to bring the USB core
50 + * and various phy components out of reset.
51 + */
52 + ssb_device_enable(dev, 0);
53 + ssb_write32(dev, 0x200, 0x7ff);
54 +
55 + /* Change Flush control reg */
56 + tmp = ssb_read32(dev, 0x400);
57 + tmp &= ~8;
58 + ssb_write32(dev, 0x400, tmp);
59 + tmp = ssb_read32(dev, 0x400);
60 +
61 + /* Change Shim control reg */
62 + tmp = ssb_read32(dev, 0x304);
63 + tmp &= ~0x100;
64 + ssb_write32(dev, 0x304, tmp);
65 + tmp = ssb_read32(dev, 0x304);
66 +
67 + udelay(1);
68 +
69 + /* Work around for 5354 failures */
70 + if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
71 + /* Change syn01 reg */
72 + tmp = 0x00fe00fe;
73 + ssb_write32(dev, 0x894, tmp);
74 +
75 + /* Change syn03 reg */
76 + tmp = ssb_read32(dev, 0x89c);
77 + tmp |= 0x1;
78 + ssb_write32(dev, 0x89c, tmp);
79 + }
80 + } else
81 + ssb_device_enable(dev, 0);
82
83 hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev,
84 dev_name(dev->dev));
85 @@ -200,6 +245,7 @@ static int ssb_ohci_resume(struct ssb_de
86 static const struct ssb_device_id ssb_ohci_table[] = {
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
88 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
89 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
90 SSB_DEVTABLE_END
91 };
92 MODULE_DEVICE_TABLE(ssb, ssb_ohci_table);
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