target/linux/s3c24xx/patches-2.6.30/060-spi-gpio-non-blocking.patch

   1 Index: linux-2.6.30-rc6/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
   2 ===================================================================
   3 --- linux-2.6.30-rc6.orig/arch/arm/mach-s3c2410/include/mach/spi-gpio.h 2009-05-16 06:12:57.000000000 +0200
   4 +++ linux-2.6.30-rc6/arch/arm/mach-s3c2410/include/mach/spi-gpio.h      2009-05-18 19:08:34.000000000 +0200
   5 @@ -21,7 +21,8 @@
   6         int                      num_chipselect;
   7         int                      bus_num;
   8
   9 -       void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
  10 +       int                      non_blocking_transfer;
  11 +       void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs);
  12  };
  13
  14
  15 Index: linux-2.6.30-rc6/drivers/spi/spi_bitbang.c
  16 ===================================================================
  17 --- linux-2.6.30-rc6.orig/drivers/spi/spi_bitbang.c     2009-05-16 06:12:57.000000000 +0200
  18 +++ linux-2.6.30-rc6/drivers/spi/spi_bitbang.c  2009-05-18 19:08:34.000000000 +0200
  19 @@ -264,6 +264,123 @@
  20   * Drivers can provide word-at-a-time i/o primitives, or provide
  21   * transfer-at-a-time ones to leverage dma or fifo hardware.
  22   */
  23 +
  24 +/* Synchronous non blocking transfer */
  25 +int
  26 +spi_bitbang_transfer_sync(struct spi_device *spi, struct spi_message *m)
  27 +{
  28 +       struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
  29 +       struct spi_transfer *t;
  30 +       unsigned long flags;
  31 +       int cs_change = 1;
  32 +       int status;
  33 +       int nsecs;
  34 +       int (*setup_transfer)(struct spi_device *, struct spi_transfer *);
  35 +
  36 +       /* FIXME this is made-up ... the correct value is known to
  37 +        * word-at-a-time bitbang code, and presumably chipselect()
  38 +        * should enforce these requirements too?
  39 +        */
  40 +       nsecs = 100;
  41 +       cs_change = 1;
  42 +       status = 0;
  43 +       setup_transfer = NULL;
  44 +
  45 +       local_irq_save(flags);
  46 +       list_for_each_entry (t, &m->transfers, transfer_list) {
  47 +               /* override or restore speed and wordsize */
  48 +               if (t->speed_hz || t->bits_per_word) {
  49 +                       setup_transfer = bitbang->setup_transfer;
  50 +                       if (!setup_transfer) {
  51 +                               status = -ENOPROTOOPT;
  52 +                               break;
  53 +                       }
  54 +               }
  55 +               if (setup_transfer) {
  56 +                       status = setup_transfer(spi, t);
  57 +                       if (status < 0)
  58 +                               break;
  59 +               }
  60 +
  61 +               /* set up default clock polarity, and activate chip;
  62 +                * this implicitly updates clock and spi modes as
  63 +                * previously recorded for this device via setup().
  64 +                * (and also deselects any other chip that might be
  65 +                * selected ...)
  66 +                */
  67 +
  68 +               if (cs_change) {
  69 +                       bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
  70 +                       ndelay(nsecs);
  71 +               }
  72 +
  73 +               cs_change = t->cs_change;
  74 +               if (!t->tx_buf && !t->rx_buf && t->len) {
  75 +                       status = -EINVAL;
  76 +                       break;
  77 +               }
  78 +
  79 +               /* transfer data.  the lower level code handles any
  80 +                * new dma mappings it needs. our caller always gave
  81 +                * us dma-safe buffers.
  82 +                */
  83 +               if (t->len) {
  84 +                       /* REVISIT dma API still needs a designated
  85 +                        * DMA_ADDR_INVALID; ~0 might be better.
  86 +                        */
  87 +                       if (!m->is_dma_mapped)
  88 +                               t->rx_dma = t->tx_dma = 0;
  89 +                       status = bitbang->txrx_bufs(spi, t);
  90 +               }
  91 +
  92 +               if (status > 0)
  93 +                       m->actual_length += status;
  94 +               if (status != t->len) {
  95 +                       /* always report some kind of error */
  96 +                       if (status >= 0)
  97 +                               status = -EREMOTEIO;
  98 +                       break;
  99 +               }
 100 +               status = 0;
 101 +                       /* protocol tweaks before next transfer */
 102 +               if (t->delay_usecs)
 103 +                       udelay(t->delay_usecs);
 104 +                       if (!cs_change)
 105 +                       continue;
 106 +               if (t->transfer_list.next == &m->transfers)
 107 +                       break;
 108 +                       /* sometimes a short mid-message deselect of the chip
 109 +                * may be needed to terminate a mode or command
 110 +                */
 111 +               ndelay(nsecs);
 112 +               bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 113 +               ndelay(nsecs);
 114 +       }
 115 +
 116 +       m->status = status;
 117 +       if (m->complete)
 118 +               m->complete(m->context);
 119 +
 120 +       /* restore speed and wordsize */
 121 +       if (setup_transfer)
 122 +               setup_transfer(spi, NULL);
 123 +
 124 +       /* normally deactivate chipselect ... unless no error and
 125 +        * cs_change has hinted that the next message will probably
 126 +        * be for this chip too.
 127 +        */
 128 +       if (!(status == 0 && cs_change)) {
 129 +               ndelay(nsecs);
 130 +               bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 131 +               ndelay(nsecs);
 132 +       }
 133 +
 134 +       local_irq_restore(flags);
 135 +
 136 +       return status;
 137 +}
 138 +EXPORT_SYMBOL_GPL(spi_bitbang_transfer_sync);
 139 +
 140  static void bitbang_work(struct work_struct *work)
 141  {
 142         struct spi_bitbang      *bitbang =
 143 @@ -274,120 +391,13 @@
 144         bitbang->busy = 1;
 145         while (!list_empty(&bitbang->queue)) {
 146                 struct spi_message      *m;
 147 -               struct spi_device       *spi;
 148 -               unsigned                nsecs;
 149 -               struct spi_transfer     *t = NULL;
 150 -               unsigned                tmp;
 151 -               unsigned                cs_change;
 152 -               int                     status;
 153 -               int                     (*setup_transfer)(struct spi_device *,
 154 -                                               struct spi_transfer *);
 155
 156                 m = container_of(bitbang->queue.next, struct spi_message,
 157                                 queue);
 158                 list_del_init(&m->queue);
 159 -               spin_unlock_irqrestore(&bitbang->lock, flags);
 160 -
 161 -               /* FIXME this is made-up ... the correct value is known to
 162 -                * word-at-a-time bitbang code, and presumably chipselect()
 163 -                * should enforce these requirements too?
 164 -                */
 165 -               nsecs = 100;
 166 -
 167 -               spi = m->spi;
 168 -               tmp = 0;
 169 -               cs_change = 1;
 170 -               status = 0;
 171 -               setup_transfer = NULL;
 172 -
 173 -               list_for_each_entry (t, &m->transfers, transfer_list) {
 174 -
 175 -                       /* override or restore speed and wordsize */
 176 -                       if (t->speed_hz || t->bits_per_word) {
 177 -                               setup_transfer = bitbang->setup_transfer;
 178 -                               if (!setup_transfer) {
 179 -                                       status = -ENOPROTOOPT;
 180 -                                       break;
 181 -                               }
 182 -                       }
 183 -                       if (setup_transfer) {
 184 -                               status = setup_transfer(spi, t);
 185 -                               if (status < 0)
 186 -                                       break;
 187 -                       }
 188 -
 189 -                       /* set up default clock polarity, and activate chip;
 190 -                        * this implicitly updates clock and spi modes as
 191 -                        * previously recorded for this device via setup().
 192 -                        * (and also deselects any other chip that might be
 193 -                        * selected ...)
 194 -                        */
 195 -                       if (cs_change) {
 196 -                               bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
 197 -                               ndelay(nsecs);
 198 -                       }
 199 -                       cs_change = t->cs_change;
 200 -                       if (!t->tx_buf && !t->rx_buf && t->len) {
 201 -                               status = -EINVAL;
 202 -                               break;
 203 -                       }
 204 -
 205 -                       /* transfer data.  the lower level code handles any
 206 -                        * new dma mappings it needs. our caller always gave
 207 -                        * us dma-safe buffers.
 208 -                        */
 209 -                       if (t->len) {
 210 -                               /* REVISIT dma API still needs a designated
 211 -                                * DMA_ADDR_INVALID; ~0 might be better.
 212 -                                */
 213 -                               if (!m->is_dma_mapped)
 214 -                                       t->rx_dma = t->tx_dma = 0;
 215 -                               status = bitbang->txrx_bufs(spi, t);
 216 -                       }
 217 -                       if (status > 0)
 218 -                               m->actual_length += status;
 219 -                       if (status != t->len) {
 220 -                               /* always report some kind of error */
 221 -                               if (status >= 0)
 222 -                                       status = -EREMOTEIO;
 223 -                               break;
 224 -                       }
 225 -                       status = 0;
 226 -
 227 -                       /* protocol tweaks before next transfer */
 228 -                       if (t->delay_usecs)
 229 -                               udelay(t->delay_usecs);
 230 -
 231 -                       if (!cs_change)
 232 -                               continue;
 233 -                       if (t->transfer_list.next == &m->transfers)
 234 -                               break;
 235 -
 236 -                       /* sometimes a short mid-message deselect of the chip
 237 -                        * may be needed to terminate a mode or command
 238 -                        */
 239 -                       ndelay(nsecs);
 240 -                       bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 241 -                       ndelay(nsecs);
 242 -               }
 243 -
 244 -               m->status = status;
 245 -               m->complete(m->context);
 246 -
 247 -               /* restore speed and wordsize */
 248 -               if (setup_transfer)
 249 -                       setup_transfer(spi, NULL);
 250 -
 251 -               /* normally deactivate chipselect ... unless no error and
 252 -                * cs_change has hinted that the next message will probably
 253 -                * be for this chip too.
 254 -                */
 255 -               if (!(status == 0 && cs_change)) {
 256 -                       ndelay(nsecs);
 257 -                       bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 258 -                       ndelay(nsecs);
 259 -               }
 260
 261 +               spin_unlock_irqrestore(&bitbang->lock, flags);
 262 +               spi_bitbang_transfer_sync(m->spi, m);
 263                 spin_lock_irqsave(&bitbang->lock, flags);
 264         }
 265         bitbang->busy = 0;
 266 @@ -459,6 +469,9 @@
 267
 268         if (!bitbang->master->transfer)
 269                 bitbang->master->transfer = spi_bitbang_transfer;
 270 +       if (!bitbang->master->transfer_sync && bitbang->non_blocking_transfer)
 271 +               bitbang->master->transfer_sync = spi_bitbang_transfer_sync;
 272 +
 273         if (!bitbang->txrx_bufs) {
 274                 bitbang->use_dma = 0;
 275                 bitbang->txrx_bufs = spi_bitbang_bufs;
 276 Index: linux-2.6.30-rc6/drivers/spi/spi_s3c24xx_gpio.c
 277 ===================================================================
 278 --- linux-2.6.30-rc6.orig/drivers/spi/spi_s3c24xx_gpio.c        2009-05-16 06:12:57.000000000 +0200
 279 +++ linux-2.6.30-rc6/drivers/spi/spi_s3c24xx_gpio.c     2009-05-18 19:08:34.000000000 +0200
 280 @@ -91,7 +91,7 @@
 281         struct s3c2410_spigpio *sg = spidev_to_sg(dev);
 282
 283         if (sg->info && sg->info->chip_select)
 284 -               (sg->info->chip_select)(sg->info, value);
 285 +               (sg->info->chip_select)(sg->info, dev->chip_select, value);
 286  }
 287
 288  static int s3c2410_spigpio_probe(struct platform_device *dev)
 289 @@ -112,14 +112,17 @@
 290
 291         platform_set_drvdata(dev, sp);
 292
 293 -       /* copy in the plkatform data */
 294 +       /* copy in the platform data */
 295         info = sp->info = dev->dev.platform_data;
 296
 297 +       master->num_chipselect = info->num_chipselect;
 298 +
 299         /* setup spi bitbang adaptor */
 300         sp->bitbang.master = spi_master_get(master);
 301         sp->bitbang.master->bus_num = info->bus_num;
 302         sp->bitbang.master->num_chipselect = info->num_chipselect;
 303         sp->bitbang.chipselect = s3c2410_spigpio_chipselect;
 304 +       sp->bitbang.non_blocking_transfer = info->non_blocking_transfer;
 305
 306         sp->bitbang.txrx_word[SPI_MODE_0] = s3c2410_spigpio_txrx_mode0;
 307         sp->bitbang.txrx_word[SPI_MODE_1] = s3c2410_spigpio_txrx_mode1;
 308 Index: linux-2.6.30-rc6/include/linux/mmc/core.h
 309 ===================================================================
 310 --- linux-2.6.30-rc6.orig/include/linux/mmc/core.h      2009-05-16 06:12:57.000000000 +0200
 311 +++ linux-2.6.30-rc6/include/linux/mmc/core.h   2009-05-18 19:08:34.000000000 +0200
 312 @@ -129,6 +129,8 @@
 313  struct mmc_host;
 314  struct mmc_card;
 315
 316 +extern void mmc_flush_scheduled_work(void);
 317 +
 318  extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
 319  extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
 320  extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
 321 Index: linux-2.6.30-rc6/include/linux/mmc/sdio_ids.h
 322 ===================================================================
 323 --- linux-2.6.30-rc6.orig/include/linux/mmc/sdio_ids.h  2009-05-16 06:12:57.000000000 +0200
 324 +++ linux-2.6.30-rc6/include/linux/mmc/sdio_ids.h       2009-05-18 19:08:34.000000000 +0200
 325 @@ -25,5 +25,9 @@
 326
 327  #define SDIO_VENDOR_ID_MARVELL                 0x02df
 328  #define SDIO_DEVICE_ID_MARVELL_LIBERTAS                0x9103
 329 +#define SDIO_DEVICE_ID_MARVELL_88W8688         0x9104
 330 +#define SDIO_VENDOR_ID_ATHEROS                 0x0271
 331 +#define SDIO_DEVICE_ID_ATHEROS_AR6001          0x0100
 332 +#define SDIO_DEVICE_ID_ATHEROS_AR6002          0x0200
 333
 334  #endif
 335 Index: linux-2.6.30-rc6/include/linux/spi/spi_bitbang.h
 336 ===================================================================
 337 --- linux-2.6.30-rc6.orig/include/linux/spi/spi_bitbang.h       2009-05-16 06:12:57.000000000 +0200
 338 +++ linux-2.6.30-rc6/include/linux/spi/spi_bitbang.h    2009-05-18 19:08:34.000000000 +0200
 339 @@ -31,6 +31,9 @@
 340         u8                      use_dma;
 341         u8                      flags;          /* extra spi->mode support */
 342
 343 +       /* Support for synchronous non blocking transfers */
 344 +       int                     non_blocking_transfer;
 345 +
 346         struct spi_master       *master;
 347
 348         /* setup_transfer() changes clock and/or wordsize to match settings
 349 @@ -62,6 +65,8 @@
 350  extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
 351  extern int spi_bitbang_setup_transfer(struct spi_device *spi,
 352                                       struct spi_transfer *t);
 353 +extern int spi_bitbang_transfer_sync(struct spi_device *spi,
 354 +                                     struct spi_message *m);
 355
 356  /* start or stop queue processing */
 357  extern int spi_bitbang_start(struct spi_bitbang *spi);
 358 Index: linux-2.6.30-rc6/include/linux/spi/spi.h
 359 ===================================================================
 360 --- linux-2.6.30-rc6.orig/include/linux/spi/spi.h       2009-05-16 06:12:57.000000000 +0200
 361 +++ linux-2.6.30-rc6/include/linux/spi/spi.h    2009-05-18 19:08:34.000000000 +0200
 362 @@ -204,7 +204,6 @@
 363   *     SPI slaves, and are numbered from zero to num_chipselects.
 364   *     each slave has a chipselect signal, but it's common that not
 365   *     every chipselect is connected to a slave.
 366 - * @dma_alignment: SPI controller constraint on DMA buffers alignment.
 367   * @setup: updates the device mode and clocking records used by a
 368   *     device's SPI controller; protocol code may call this.  This
 369   *     must fail if an unrecognized or unsupported mode is requested.
 370 @@ -240,17 +239,7 @@
 371          */
 372         u16                     num_chipselect;
 373
 374 -       /* some SPI controllers pose alignment requirements on DMAable
 375 -        * buffers; let protocol drivers know about these requirements.
 376 -        */
 377 -       u16                     dma_alignment;
 378 -
 379 -       /* Setup mode and clock, etc (spi driver may call many times).
 380 -        *
 381 -        * IMPORTANT:  this may be called when transfers to another
 382 -        * device are active.  DO NOT UPDATE SHARED REGISTERS in ways
 383 -        * which could break those transfers.
 384 -        */
 385 +       /* setup mode and clock, etc (spi driver may call many times) */
 386         int                     (*setup)(struct spi_device *spi);
 387
 388         /* bidirectional bulk transfers
 389 @@ -275,6 +264,13 @@
 390         int                     (*transfer)(struct spi_device *spi,
 391                                                 struct spi_message *mesg);
 392
 393 +       /*
 394 +        * Synchronous non blocking transfer function. Should guarantee
 395 +        * data availability when it returns
 396 +        */
 397 +       int                     (*transfer_sync)(struct spi_device *spi,
 398 +                                               struct spi_message *mesg);
 399 +
 400         /* called on release() to free memory provided by spi_master */
 401         void                    (*cleanup)(struct spi_device *spi);
 402  };
 403 @@ -584,6 +580,29 @@
 404         return spi->master->transfer(spi, message);
 405  }
 406
 407 +/**
 408 + * spi_non_blocking_transfer - Synchronous, non blocking transfer
 409 + * @spi: device with which data will be exchanged
 410 + * @message: describes the data transfers with optional completion handlers
 411 + * Context: any (irqs may be blocked, etc)
 412 + *
 413 + * Data is guaranteed to be written or read when this function returns.
 414 + *
 415 + * Note : This may not be supported by all spi masters.
 416 + */
 417 +
 418 +static inline int
 419 +spi_non_blocking_transfer(struct spi_device *spi, struct spi_message *message)
 420 +{
 421 +       if (unlikely(!spi->master->transfer_sync)) {
 422 +               dev_err(&spi->master->dev,
 423 +                               "non-blocking transfers not supported\n");
 424 +               return -EIO;
 425 +       }
 426 +
 427 +       return spi->master->transfer_sync(spi, message);
 428 +}
 429 +
 430  /*---------------------------------------------------------------------------*/
 431
 432  /* All these synchronous SPI transfer routines are utilities layered