1 The DRAM base address and size fields in the CPU's MBUS bridge have
2 64KiB granularity, instead of the currently used 16MiB. Since all
3 of the currently supported MBUS peripherals support 64KiB granularity
4 as well, this patch changes the Orion address map code to stop
5 rounding base addresses down and sizes up to multiples of 16MiB.
7 Found by Ke Wei <kewei@marvell.com>.
9 Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
11 arch/arm/mach-orion5x/addr-map.c | 4 ++--
12 1 files changed, 2 insertions(+), 2 deletions(-)
14 --- a/arch/arm/mach-orion5x/addr-map.c
15 +++ b/arch/arm/mach-orion5x/addr-map.c
17 w = &orion5x_mbus_dram_info.cs[cs++];
19 w->mbus_attr = 0xf & ~(1 << i);
20 - w->base = base & 0xff000000;
21 - w->size = (size | 0x00ffffff) + 1;
22 + w->base = base & 0xffff0000;
23 + w->size = (size | 0x0000ffff) + 1;
26 orion5x_mbus_dram_info.num_cs = cs;