4 * Mikrotik RouterBOARD 1xx series
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
9 * NAND initialization code was based on a driver for Linux 2.6.19+ which
10 * was derived from the driver for Linux 2.4.xx published by Mikrotik for
11 * their RouterBoard 1xx and 5xx series boards.
12 * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
13 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
14 * The original Mikrotik code seems not to have a license.
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version 2
19 * of the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the
28 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
29 * Boston, MA 02110-1301, USA.
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
37 #include <asm/bootinfo.h>
40 #include <adm5120_defs.h>
41 #include <adm5120_irq.h>
42 #include <adm5120_nand.h>
43 #include <adm5120_board.h>
44 #include <adm5120_platform.h>
45 #include <adm5120_info.h>
47 #include <prom/routerboot.h>
49 #define RB1XX_NAND_CHIP_DELAY 25
51 #define RB150_NAND_BASE 0x1FC80000
52 #define RB150_NAND_SIZE 1
54 #define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0
55 #define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1
56 #define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2
57 #define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
59 #define RB150_NAND_DELAY 100
61 #define RB150_NAND_WRITE(v) \
62 writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
64 #define RB153_GPIO_CF_RDY ADM5120_GPIO_P1L1
65 #define RB153_GPIO_CF_WT ADM5120_GPIO_P0L0
67 extern struct rb_hard_settings rb_hs
;
69 /*--------------------------------------------------------------------------*/
71 static struct adm5120_pci_irq rb1xx_pci_irqs
[] __initdata
= {
72 PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0
),
73 PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1
),
74 PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2
)
77 static struct mtd_partition rb1xx_nor_parts
[] = {
82 .mask_flags
= MTD_WRITEABLE
,
85 .offset
= MTDPART_OFS_APPEND
,
86 .size
= MTDPART_SIZ_FULL
,
90 static struct mtd_partition rb1xx_nand_parts
[] = {
94 .size
= 4 * 1024 * 1024,
97 .offset
= MTDPART_OFS_NXTBLK
,
98 .size
= MTDPART_SIZ_FULL
102 static struct platform_device
*rb1xx_devices
[] __initdata
= {
103 &adm5120_flash0_device
,
104 &adm5120_nand_device
,
108 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
109 * will not be able to find the kernel that we load. So set the oobinfo
110 * when creating the partitions
112 static struct nand_ecclayout rb1xx_nand_ecclayout
= {
114 .eccpos
= { 8, 9, 10, 13, 14, 15 },
116 .oobfree
= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
119 static struct resource rb150_nand_resource
[] = {
121 .start
= RB150_NAND_BASE
,
122 .end
= RB150_NAND_BASE
+ RB150_NAND_SIZE
-1,
123 .flags
= IORESOURCE_MEM
,
127 static struct resource rb153_cf_resources
[] = {
129 .name
= "cf_membase",
130 .start
= ADM5120_EXTIO1_BASE
,
131 .end
= ADM5120_EXTIO1_BASE
+ ADM5120_EXTIO1_SIZE
-1 ,
132 .flags
= IORESOURCE_MEM
135 .start
= ADM5120_IRQ_GPIO4
,
136 .end
= ADM5120_IRQ_GPIO4
,
137 .flags
= IORESOURCE_IRQ
141 static struct platform_device rb153_cf_device
= {
142 .name
= "pata-rb153-cf",
144 .resource
= rb153_cf_resources
,
145 .num_resources
= ARRAY_SIZE(rb153_cf_resources
),
148 static struct platform_device
*rb153_devices
[] __initdata
= {
149 &adm5120_flash0_device
,
150 &adm5120_nand_device
,
156 * RB1xx boards have bad network performance with the default VLAN matrixes.
157 * Disable it while the ethernet driver gets fixed.
159 static unsigned char rb11x_vlans
[6] __initdata
= {
160 /* FIXME: untested */
161 0x41, 0x00, 0x00, 0x00, 0x00, 0x00
164 static unsigned char rb133_vlans
[6] __initdata
= {
165 /* FIXME: untested */
166 0x44, 0x42, 0x41, 0x00, 0x00, 0x00
169 static unsigned char rb133c_vlans
[6] __initdata
= {
170 /* FIXME: untested */
171 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
174 static unsigned char rb15x_vlans
[6] __initdata
= {
175 /* FIXME: untested */
176 0x41, 0x42, 0x44, 0x48, 0x50, 0x00
179 static unsigned char rb192_vlans
[6] __initdata
= {
180 /* FIXME: untested */
181 0x41, 0x50, 0x48, 0x44, 0x42, 0x00
184 static unsigned char rb_vlans
[6] __initdata
= {
185 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
187 #define rb11x_vlans rb_vlans
188 #define rb133_vlans rb_vlans
189 #define rb133c_vlans rb_vlans
190 #define rb15x_vlans rb_vlans
191 #define rb192_vlans rb_vlans
194 /*--------------------------------------------------------------------------*/
196 static int rb150_nand_ready(struct mtd_info
*mtd
)
198 return gpio_get_value(RB150_GPIO_NAND_READY
);
201 static void rb150_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
,
204 if (ctrl
& NAND_CTRL_CHANGE
) {
205 gpio_set_value(RB150_GPIO_NAND_CLE
, (ctrl
& NAND_CLE
) ? 1 : 0);
206 gpio_set_value(RB150_GPIO_NAND_ALE
, (ctrl
& NAND_ALE
) ? 1 : 0);
207 gpio_set_value(RB150_GPIO_NAND_NCE
, (ctrl
& NAND_NCE
) ? 0 : 1);
210 udelay(RB150_NAND_DELAY
);
212 if (cmd
!= NAND_CMD_NONE
)
213 RB150_NAND_WRITE(cmd
);
216 /*--------------------------------------------------------------------------*/
218 static void __init
rb1xx_mac_setup(void)
222 for (i
= 0; i
< rb_hs
.mac_count
; i
++) {
223 for (j
= 0; j
< RB_MAC_SIZE
; j
++)
224 adm5120_eth_macs
[i
][j
] = rb_hs
.macs
[i
][j
];
228 static void __init
rb1xx_flash_setup(void)
230 /* setup data for flash0 device */
231 adm5120_flash0_data
.nr_parts
= ARRAY_SIZE(rb1xx_nor_parts
);
232 adm5120_flash0_data
.parts
= rb1xx_nor_parts
;
234 /* setup data for NAND device */
235 adm5120_nand_data
.chip
.nr_chips
= 1;
236 adm5120_nand_data
.chip
.nr_partitions
= ARRAY_SIZE(rb1xx_nand_parts
);
237 adm5120_nand_data
.chip
.partitions
= rb1xx_nand_parts
;
238 adm5120_nand_data
.chip
.ecclayout
= &rb1xx_nand_ecclayout
;
239 adm5120_nand_data
.chip
.chip_delay
= RB1XX_NAND_CHIP_DELAY
;
240 adm5120_nand_data
.chip
.options
= NAND_NO_AUTOINCR
;
243 static void __init
rb153_cf_setup(void)
245 /* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
246 adm5120_gpio_csx1_enable();
247 /* enable the wait state pin GPIO[0] for external I/O control */
248 adm5120_gpio_ew_enable();
250 gpio_request(RB153_GPIO_CF_RDY
, "cf-ready");
251 gpio_direction_input(RB153_GPIO_CF_RDY
);
252 gpio_request(RB153_GPIO_CF_WT
, "cf-wait");
253 gpio_direction_output(RB153_GPIO_CF_WT
, 1);
254 gpio_direction_input(RB153_GPIO_CF_WT
);
257 static void __init
rb1xx_setup(void)
259 /* enable NAND flash interface */
260 adm5120_nand_enable();
262 /* initialize NAND chip */
263 adm5120_nand_set_spn(1);
264 adm5120_nand_set_wpn(0);
270 static void __init
rb150_setup(void)
272 /* setup GPIO pins for NAND flash chip */
273 gpio_request(RB150_GPIO_NAND_READY
, "nand-ready");
274 gpio_direction_input(RB150_GPIO_NAND_READY
);
275 gpio_request(RB150_GPIO_NAND_NCE
, "nand-nce");
276 gpio_direction_output(RB150_GPIO_NAND_NCE
, 1);
277 gpio_request(RB150_GPIO_NAND_CLE
, "nand-cle");
278 gpio_direction_output(RB150_GPIO_NAND_CLE
, 0);
279 gpio_request(RB150_GPIO_NAND_ALE
, "nand-ale");
280 gpio_direction_output(RB150_GPIO_NAND_ALE
, 0);
282 adm5120_nand_device
.num_resources
= ARRAY_SIZE(rb150_nand_resource
);
283 adm5120_nand_device
.resource
= rb150_nand_resource
;
284 adm5120_nand_data
.ctrl
.cmd_ctrl
= rb150_nand_cmd_ctrl
;
285 adm5120_nand_data
.ctrl
.dev_ready
= rb150_nand_ready
;
287 adm5120_flash0_data
.window_size
= 512*1024;
293 static void __init
rb153_setup(void)
299 /*--------------------------------------------------------------------------*/
301 ADM5120_BOARD_START(RB_111
, "Mikrotik RouterBOARD 111")
302 .board_setup
= rb1xx_setup
,
304 .eth_vlans
= rb11x_vlans
,
305 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
306 .devices
= rb1xx_devices
,
307 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
308 .pci_irq_map
= rb1xx_pci_irqs
,
311 ADM5120_BOARD_START(RB_112
, "Mikrotik RouterBOARD 112")
312 .board_setup
= rb1xx_setup
,
314 .eth_vlans
= rb11x_vlans
,
315 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
316 .devices
= rb1xx_devices
,
317 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
318 .pci_irq_map
= rb1xx_pci_irqs
,
321 ADM5120_BOARD_START(RB_133
, "Mikrotik RouterBOARD 133")
322 .board_setup
= rb1xx_setup
,
324 .eth_vlans
= rb133_vlans
,
325 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
326 .devices
= rb1xx_devices
,
327 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
328 .pci_irq_map
= rb1xx_pci_irqs
,
331 ADM5120_BOARD_START(RB_133C
, "Mikrotik RouterBOARD 133C")
332 .board_setup
= rb1xx_setup
,
334 .eth_vlans
= rb133c_vlans
,
335 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
336 .devices
= rb1xx_devices
,
337 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
338 .pci_irq_map
= rb1xx_pci_irqs
,
341 ADM5120_BOARD_START(RB_150
, "Mikrotik RouterBOARD 150")
342 .board_setup
= rb150_setup
,
344 .eth_vlans
= rb15x_vlans
,
345 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
346 .devices
= rb1xx_devices
,
349 ADM5120_BOARD_START(RB_153
, "Mikrotik RouterBOARD 153")
350 .board_setup
= rb153_setup
,
352 .eth_vlans
= rb15x_vlans
,
353 .num_devices
= ARRAY_SIZE(rb153_devices
),
354 .devices
= rb153_devices
,
355 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
356 .pci_irq_map
= rb1xx_pci_irqs
,
359 ADM5120_BOARD_START(RB_192
, "Mikrotik RouterBOARD 192")
360 .board_setup
= rb1xx_setup
,
362 .eth_vlans
= rb192_vlans
,
363 .num_devices
= ARRAY_SIZE(rb1xx_devices
),
364 .devices
= rb1xx_devices
,
365 .pci_nr_irqs
= ARRAY_SIZE(rb1xx_pci_irqs
),
366 .pci_irq_map
= rb1xx_pci_irqs
,