2 * NAND flash driver for the MikroTik RouterBOARD 750
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/mtd/nand.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/platform_device.h>
18 #include <asm/mach-ar71xx/ar71xx.h>
19 #include <asm/mach-ar71xx/mach-rb750.h>
21 #define DRV_NAME "rb750-nand"
22 #define DRV_VERSION "0.1.0"
23 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
25 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
26 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
27 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
28 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
29 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
30 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
31 #define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE)
33 #define RB750_NAND_DATA_SHIFT 1
34 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
35 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
36 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
37 RB750_NAND_NRE | RB750_NAND_NWE | \
40 struct rb750_nand_info
{
41 struct nand_chip chip
;
46 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
47 * will not be able to find the kernel that we load.
49 static struct nand_ecclayout rb750_nand_ecclayout
= {
51 .eccpos
= { 8, 9, 10, 13, 14, 15 },
53 .oobfree
= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
56 static struct mtd_partition rb750_nand_partitions
[] = {
61 .mask_flags
= MTD_WRITEABLE
,
64 .offset
= (256 * 1024),
65 .size
= (4 * 1024 * 1024) - (256 * 1024),
68 .offset
= MTDPART_OFS_NXTBLK
,
69 .size
= MTDPART_SIZ_FULL
,
73 static void rb750_nand_write(const u8
*buf
, unsigned len
)
75 void __iomem
*base
= ar71xx_gpio_base
;
79 /* set data lines to output mode */
80 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) | RB750_NAND_DATA_BITS
,
83 out
= __raw_readl(base
+ GPIO_REG_OUT
);
84 out
&= ~(RB750_NAND_DATA_BITS
| RB750_NAND_NWE
);
85 for (i
= 0; i
!= len
; i
++) {
89 data
<<= RB750_NAND_DATA_SHIFT
;
91 __raw_writel(data
, base
+ GPIO_REG_OUT
);
93 __raw_writel(data
| RB750_NAND_NWE
, base
+ GPIO_REG_OUT
);
95 __raw_readl(base
+ GPIO_REG_OUT
);
98 /* set data lines to input mode */
99 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) & ~RB750_NAND_DATA_BITS
,
102 __raw_readl(base
+ GPIO_REG_OE
);
105 static int rb750_nand_read_verify(u8
*read_buf
, unsigned len
,
106 const u8
*verify_buf
)
108 void __iomem
*base
= ar71xx_gpio_base
;
111 for (i
= 0; i
< len
; i
++) {
114 /* activate RE line */
115 __raw_writel(RB750_NAND_NRE
, base
+ GPIO_REG_CLEAR
);
117 __raw_readl(base
+ GPIO_REG_CLEAR
);
119 /* read input lines */
120 data
= __raw_readl(base
+ GPIO_REG_IN
) >> RB750_NAND_DATA_SHIFT
;
122 /* deactivate RE line */
123 __raw_writel(RB750_NAND_NRE
, base
+ GPIO_REG_SET
);
127 else if (verify_buf
&& verify_buf
[i
] != data
)
134 static void rb750_nand_select_chip(struct mtd_info
*mtd
, int chip
)
136 void __iomem
*base
= ar71xx_gpio_base
;
139 func
= __raw_readl(base
+ GPIO_REG_FUNC
);
142 rb750_latch_change(RB750_LVC573_LE
, 0);
144 /* disable alternate functions */
145 ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE
,
146 AR724X_GPIO_FUNC_SPI_EN
);
148 /* set input mode for data lines */
149 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) &
150 ~RB750_NAND_INPUT_BITS
,
153 /* deactivate RE and WE lines */
154 __raw_writel(RB750_NAND_NRE
| RB750_NAND_NWE
,
155 base
+ GPIO_REG_SET
);
157 (void) __raw_readl(base
+ GPIO_REG_SET
);
159 /* activate CE line */
160 __raw_writel(RB750_NAND_NCE
, base
+ GPIO_REG_CLEAR
);
162 /* deactivate CE line */
163 __raw_writel(RB750_NAND_NCE
, base
+ GPIO_REG_SET
);
165 (void) __raw_readl(base
+ GPIO_REG_SET
);
167 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) |
168 RB750_NAND_IO0
| RB750_NAND_RDY
,
171 /* restore alternate functions */
172 ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN
,
173 AR724X_GPIO_FUNC_JTAG_DISABLE
);
176 rb750_latch_change(0, RB750_LVC573_LE
);
180 static int rb750_nand_dev_ready(struct mtd_info
*mtd
)
182 void __iomem
*base
= ar71xx_gpio_base
;
184 return !!(__raw_readl(base
+ GPIO_REG_IN
) & RB750_NAND_RDY
);
187 static void rb750_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
,
190 if (ctrl
& NAND_CTRL_CHANGE
) {
191 void __iomem
*base
= ar71xx_gpio_base
;
194 t
= __raw_readl(base
+ GPIO_REG_OUT
);
196 t
&= ~(RB750_NAND_CLE
| RB750_NAND_ALE
);
197 t
|= (ctrl
& NAND_CLE
) ? RB750_NAND_CLE
: 0;
198 t
|= (ctrl
& NAND_ALE
) ? RB750_NAND_ALE
: 0;
200 __raw_writel(t
, base
+ GPIO_REG_OUT
);
202 __raw_readl(base
+ GPIO_REG_OUT
);
205 if (cmd
!= NAND_CMD_NONE
) {
207 rb750_nand_write(&t
, 1);
211 static u8
rb750_nand_read_byte(struct mtd_info
*mtd
)
214 rb750_nand_read_verify(&data
, 1, NULL
);
218 static void rb750_nand_read_buf(struct mtd_info
*mtd
, u8
*buf
, int len
)
220 rb750_nand_read_verify(buf
, len
, NULL
);
223 static void rb750_nand_write_buf(struct mtd_info
*mtd
, const u8
*buf
, int len
)
225 rb750_nand_write(buf
, len
);
228 static int rb750_nand_verify_buf(struct mtd_info
*mtd
, const u8
*buf
, int len
)
230 return rb750_nand_read_verify(NULL
, len
, buf
);
233 static void __init
rb750_nand_gpio_init(void)
235 void __iomem
*base
= ar71xx_gpio_base
;
238 out
= __raw_readl(base
+ GPIO_REG_OUT
);
240 /* setup output levels */
241 __raw_writel(RB750_NAND_NCE
| RB750_NAND_NRE
| RB750_NAND_NWE
,
242 base
+ GPIO_REG_SET
);
244 __raw_writel(RB750_NAND_ALE
| RB750_NAND_CLE
,
245 base
+ GPIO_REG_CLEAR
);
247 /* setup input lines */
248 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) & ~(RB750_NAND_INPUT_BITS
),
251 /* setup output lines */
252 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) | RB750_NAND_OUTPUT_BITS
,
255 rb750_latch_change(~out
& RB750_NAND_IO0
, out
& RB750_NAND_IO0
);
258 static int __init
rb750_nand_probe(struct platform_device
*pdev
)
260 struct rb750_nand_info
*info
;
263 printk(KERN_INFO DRV_DESC
" version " DRV_VERSION
"\n");
265 rb750_nand_gpio_init();
267 info
= kzalloc(sizeof(*info
), GFP_KERNEL
);
271 info
->chip
.priv
= &info
;
272 info
->mtd
.priv
= &info
->chip
;
273 info
->mtd
.owner
= THIS_MODULE
;
275 info
->chip
.select_chip
= rb750_nand_select_chip
;
276 info
->chip
.cmd_ctrl
= rb750_nand_cmd_ctrl
;
277 info
->chip
.dev_ready
= rb750_nand_dev_ready
;
278 info
->chip
.read_byte
= rb750_nand_read_byte
;
279 info
->chip
.write_buf
= rb750_nand_write_buf
;
280 info
->chip
.read_buf
= rb750_nand_read_buf
;
281 info
->chip
.verify_buf
= rb750_nand_verify_buf
;
283 info
->chip
.chip_delay
= 25;
284 info
->chip
.ecc
.mode
= NAND_ECC_SOFT
;
285 info
->chip
.options
|= NAND_NO_AUTOINCR
;
287 platform_set_drvdata(pdev
, info
);
289 ret
= nand_scan_ident(&info
->mtd
, 1);
295 if (info
->mtd
.writesize
== 512)
296 info
->chip
.ecc
.layout
= &rb750_nand_ecclayout
;
298 ret
= nand_scan_tail(&info
->mtd
);
301 goto err_set_drvdata
;
304 #ifdef CONFIG_MTD_PARTITIONS
305 ret
= add_mtd_partitions(&info
->mtd
, rb750_nand_partitions
,
306 ARRAY_SIZE(rb750_nand_partitions
));
308 ret
= add_mtd_device(&info
->mtd
);
311 goto err_release_nand
;
316 nand_release(&info
->mtd
);
318 platform_set_drvdata(pdev
, NULL
);
324 static int __devexit
rb750_nand_remove(struct platform_device
*pdev
)
326 struct rb750_nand_info
*info
= platform_get_drvdata(pdev
);
328 nand_release(&info
->mtd
);
329 platform_set_drvdata(pdev
, NULL
);
335 static struct platform_driver rb750_nand_driver
= {
336 .probe
= rb750_nand_probe
,
337 .remove
= __devexit_p(rb750_nand_remove
),
340 .owner
= THIS_MODULE
,
344 static int __init
rb750_nand_init(void)
346 return platform_driver_register(&rb750_nand_driver
);
349 static void __exit
rb750_nand_exit(void)
351 platform_driver_unregister(&rb750_nand_driver
);
354 module_init(rb750_nand_init
);
355 module_exit(rb750_nand_exit
);
357 MODULE_DESCRIPTION(DRV_DESC
);
358 MODULE_VERSION(DRV_VERSION
);
359 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
360 MODULE_LICENSE("GPL v2");