target/linux/generic/files/drivers/net/phy/ar8216.h

   1 /*
   2  * ar8216.h: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __AR8216_H
  18 #define __AR8216_H
  19
  20 #define BITS(_s, _n)    (((1UL << (_n)) - 1) << _s)
  21
  22 #define AR8216_PORT_CPU 0
  23 #define AR8216_NUM_PORTS        6
  24 #define AR8216_NUM_VLANS        16
  25 #define AR8316_NUM_VLANS        4096
  26
  27 /* Atheros specific MII registers */
  28 #define MII_ATH_DBG_ADDR                0x1d
  29 #define MII_ATH_DBG_DATA                0x1e
  30
  31 #define AR8216_REG_CTRL                 0x0000
  32 #define   AR8216_CTRL_REVISION          BITS(0, 8)
  33 #define   AR8216_CTRL_REVISION_S        0
  34 #define   AR8216_CTRL_VERSION           BITS(8, 8)
  35 #define   AR8216_CTRL_VERSION_S         8
  36 #define   AR8216_CTRL_RESET             BIT(31)
  37
  38 #define AR8216_REG_FLOOD_MASK           0x002C
  39 #define   AR8216_FM_UNI_DEST_PORTS      BITS(0, 6)
  40 #define   AR8216_FM_MULTI_DEST_PORTS    BITS(16, 6)
  41
  42 #define AR8216_REG_GLOBAL_CTRL          0x0030
  43 #define   AR8216_GCTRL_MTU              BITS(0, 11)
  44 #define   AR8316_GCTRL_MTU              BITS(0, 14)
  45
  46 #define AR8216_REG_VTU                  0x0040
  47 #define   AR8216_VTU_OP                 BITS(0, 3)
  48 #define   AR8216_VTU_OP_NOOP            0x0
  49 #define   AR8216_VTU_OP_FLUSH           0x1
  50 #define   AR8216_VTU_OP_LOAD            0x2
  51 #define   AR8216_VTU_OP_PURGE           0x3
  52 #define   AR8216_VTU_OP_REMOVE_PORT     0x4
  53 #define   AR8216_VTU_ACTIVE             BIT(3)
  54 #define   AR8216_VTU_FULL               BIT(4)
  55 #define   AR8216_VTU_PORT               BITS(8, 4)
  56 #define   AR8216_VTU_PORT_S             8
  57 #define   AR8216_VTU_VID                BITS(16, 12)
  58 #define   AR8216_VTU_VID_S              16
  59 #define   AR8216_VTU_PRIO               BITS(28, 3)
  60 #define   AR8216_VTU_PRIO_S             28
  61 #define   AR8216_VTU_PRIO_EN            BIT(31)
  62
  63 #define AR8216_REG_VTU_DATA             0x0044
  64 #define   AR8216_VTUDATA_MEMBER         BITS(0, 10)
  65 #define   AR8216_VTUDATA_VALID          BIT(11)
  66
  67 #define AR8216_REG_ATU                  0x0050
  68 #define   AR8216_ATU_OP                 BITS(0, 3)
  69 #define   AR8216_ATU_OP_NOOP            0x0
  70 #define   AR8216_ATU_OP_FLUSH           0x1
  71 #define   AR8216_ATU_OP_LOAD            0x2
  72 #define   AR8216_ATU_OP_PURGE           0x3
  73 #define   AR8216_ATU_OP_FLUSH_LOCKED    0x4
  74 #define   AR8216_ATU_OP_FLUSH_UNICAST   0x5
  75 #define   AR8216_ATU_OP_GET_NEXT        0x6
  76 #define   AR8216_ATU_ACTIVE             BIT(3)
  77 #define   AR8216_ATU_PORT_NUM           BITS(8, 4)
  78 #define   AR8216_ATU_FULL_VIO           BIT(12)
  79 #define   AR8216_ATU_ADDR4              BITS(16, 8)
  80 #define   AR8216_ATU_ADDR5              BITS(24, 8)
  81
  82 #define AR8216_REG_ATU_DATA             0x0054
  83 #define   AR8216_ATU_ADDR3              BITS(0, 8)
  84 #define   AR8216_ATU_ADDR2              BITS(8, 8)
  85 #define   AR8216_ATU_ADDR1              BITS(16, 8)
  86 #define   AR8216_ATU_ADDR0              BITS(24, 8)
  87
  88 #define AR8216_REG_ATU_CTRL             0x005C
  89 #define   AR8216_ATU_CTRL_AGE_EN        BIT(17)
  90 #define   AR8216_ATU_CTRL_AGE_TIME      BITS(0, 16)
  91 #define   AR8216_ATU_CTRL_AGE_TIME_S    0
  92
  93 #define AR8216_PORT_OFFSET(_i)          (0x0100 * (_i + 1))
  94 #define AR8216_REG_PORT_STATUS(_i)      (AR8216_PORT_OFFSET(_i) + 0x0000)
  95 #define   AR8216_PORT_STATUS_SPEED      BITS(0,2)
  96 #define   AR8216_PORT_STATUS_SPEED_S    0
  97 #define   AR8216_PORT_STATUS_TXMAC      BIT(2)
  98 #define   AR8216_PORT_STATUS_RXMAC      BIT(3)
  99 #define   AR8216_PORT_STATUS_TXFLOW     BIT(4)
 100 #define   AR8216_PORT_STATUS_RXFLOW     BIT(5)
 101 #define   AR8216_PORT_STATUS_DUPLEX     BIT(6)
 102 #define   AR8216_PORT_STATUS_LINK_UP    BIT(8)
 103 #define   AR8216_PORT_STATUS_LINK_AUTO  BIT(9)
 104 #define   AR8216_PORT_STATUS_LINK_PAUSE BIT(10)
 105
 106 #define AR8216_REG_PORT_CTRL(_i)        (AR8216_PORT_OFFSET(_i) + 0x0004)
 107
 108 /* port forwarding state */
 109 #define   AR8216_PORT_CTRL_STATE        BITS(0, 3)
 110 #define   AR8216_PORT_CTRL_STATE_S      0
 111
 112 #define   AR8216_PORT_CTRL_LEARN_LOCK   BIT(7)
 113
 114 /* egress 802.1q mode */
 115 #define   AR8216_PORT_CTRL_VLAN_MODE    BITS(8, 2)
 116 #define   AR8216_PORT_CTRL_VLAN_MODE_S  8
 117
 118 #define   AR8216_PORT_CTRL_IGMP_SNOOP   BIT(10)
 119 #define   AR8216_PORT_CTRL_HEADER       BIT(11)
 120 #define   AR8216_PORT_CTRL_MAC_LOOP     BIT(12)
 121 #define   AR8216_PORT_CTRL_SINGLE_VLAN  BIT(13)
 122 #define   AR8216_PORT_CTRL_LEARN        BIT(14)
 123 #define   AR8216_PORT_CTRL_MIRROR_TX    BIT(16)
 124 #define   AR8216_PORT_CTRL_MIRROR_RX    BIT(17)
 125
 126 #define AR8216_REG_PORT_VLAN(_i)        (AR8216_PORT_OFFSET(_i) + 0x0008)
 127
 128 #define   AR8216_PORT_VLAN_DEFAULT_ID   BITS(0, 12)
 129 #define   AR8216_PORT_VLAN_DEFAULT_ID_S 0
 130
 131 #define   AR8216_PORT_VLAN_DEST_PORTS   BITS(16, 9)
 132 #define   AR8216_PORT_VLAN_DEST_PORTS_S 16
 133
 134 /* bit0 added to the priority field of egress frames */
 135 #define   AR8216_PORT_VLAN_TX_PRIO      BIT(27)
 136
 137 /* port default priority */
 138 #define   AR8216_PORT_VLAN_PRIORITY     BITS(28, 2)
 139 #define   AR8216_PORT_VLAN_PRIORITY_S   28
 140
 141 /* ingress 802.1q mode */
 142 #define   AR8216_PORT_VLAN_MODE         BITS(30, 2)
 143 #define   AR8216_PORT_VLAN_MODE_S       30
 144
 145 #define AR8216_REG_PORT_RATE(_i)        (AR8216_PORT_OFFSET(_i) + 0x000c)
 146 #define AR8216_REG_PORT_PRIO(_i)        (AR8216_PORT_OFFSET(_i) + 0x0010)
 147
 148 /* port speed */
 149 enum {
 150         AR8216_PORT_SPEED_10M = 0,
 151         AR8216_PORT_SPEED_100M = 1,
 152         AR8216_PORT_SPEED_1000M = 2,
 153         AR8216_PORT_SPEED_ERR = 3,
 154 };
 155
 156 /* ingress 802.1q mode */
 157 enum {
 158         AR8216_IN_PORT_ONLY = 0,
 159         AR8216_IN_PORT_FALLBACK = 1,
 160         AR8216_IN_VLAN_ONLY = 2,
 161         AR8216_IN_SECURE = 3
 162 };
 163
 164 /* egress 802.1q mode */
 165 enum {
 166         AR8216_OUT_KEEP = 0,
 167         AR8216_OUT_STRIP_VLAN = 1,
 168         AR8216_OUT_ADD_VLAN = 2
 169 };
 170
 171 /* port forwarding state */
 172 enum {
 173         AR8216_PORT_STATE_DISABLED = 0,
 174         AR8216_PORT_STATE_BLOCK = 1,
 175         AR8216_PORT_STATE_LISTEN = 2,
 176         AR8216_PORT_STATE_LEARN = 3,
 177         AR8216_PORT_STATE_FORWARD = 4
 178 };
 179
 180 /* device */
 181 enum {
 182   UNKNOWN = 0,
 183   AR8216 = 8216,
 184   AR8316 = 8316
 185 };
 186
 187 #endif