1 1. Made the connection between CNS3xxx SOCs(ARCH_CNS3xxx) and MPcore watchdog
2 since the CNS3xxx SOCs have ARM11 MPcore CPU.
3 2. Enable mpcore_watchdog option as module to default configuration at
4 arch/arm/configs/cns3420vb_defconfig.
6 Signed-off-by: Tommy Lin <tommy.lin@caviumnetworks.com>
10 arch/arm/configs/cns3420vb_defconfig | 2 ++
11 arch/arm/mach-cns3xxx/cns3420vb.c | 22 ++++++++++++++++++++++
12 3 files changed, 25 insertions(+), 0 deletions(-)
14 --- a/arch/arm/Kconfig
15 +++ b/arch/arm/Kconfig
16 @@ -333,6 +333,7 @@ config ARCH_CNS3XXX
19 select PCI_DOMAINS if PCI
22 Support for Cavium Networks CNS3XXX platform.
24 --- a/arch/arm/configs/cns3420vb_defconfig
25 +++ b/arch/arm/configs/cns3420vb_defconfig
26 @@ -53,6 +53,8 @@ CONFIG_LEGACY_PTY_COUNT=16
27 # CONFIG_HW_RANDOM is not set
28 # CONFIG_HWMON is not set
29 # CONFIG_VGA_CONSOLE is not set
31 +CONFIG_MPCORE_WATCHDOG=m
32 # CONFIG_HID_SUPPORT is not set
33 # CONFIG_USB_SUPPORT is not set
35 --- a/arch/arm/mach-cns3xxx/cns3420vb.c
36 +++ b/arch/arm/mach-cns3xxx/cns3420vb.c
37 @@ -158,10 +158,32 @@ static struct platform_device cns3xxx_us
42 +static struct resource cns3xxx_watchdog_resources[] = {
44 + .start = CNS3XXX_TC11MP_TWD_BASE,
45 + .end = CNS3XXX_TC11MP_TWD_BASE + PAGE_SIZE - 1,
46 + .flags = IORESOURCE_MEM,
49 + .start = IRQ_LOCALWDOG,
50 + .end = IRQ_LOCALWDOG,
51 + .flags = IORESOURCE_IRQ,
55 +static struct platform_device cns3xxx_watchdog_device = {
56 + .name = "mpcore_wdt",
58 + .num_resources = ARRAY_SIZE(cns3xxx_watchdog_resources),
59 + .resource = cns3xxx_watchdog_resources,
65 static struct platform_device *cns3420_pdevs[] __initdata = {
66 + &cns3xxx_watchdog_device,
68 &cns3xxx_usb_ehci_device,
69 &cns3xxx_usb_ohci_device,