projects / openwrt.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
[kernel] add chip_fixup patch of the platform_nand driver to 2.6.26 as well
[openwrt.git] / target / linux / generic-2.6 / patches-2.6.26 / 910-cryptodev_backport.patch
1 --- a/crypto/Kconfig
2 +++ b/crypto/Kconfig
3 @@ -65,6 +65,7 @@
4 config CRYPTO_CRYPTD
5 tristate "Software async crypto daemon"
6 select CRYPTO_BLKCIPHER
7 + select CRYPTO_HASH
8 select CRYPTO_MANAGER
9 help
10 This is a generic software asynchronous crypto daemon that
11 @@ -212,7 +213,7 @@
12
13 config CRYPTO_CRC32C
14 tristate "CRC32c CRC algorithm"
15 - select CRYPTO_ALGAPI
16 + select CRYPTO_HASH
17 select LIBCRC32C
18 help
19 Castagnoli, et al Cyclic Redundancy-Check Algorithm. Used
20 @@ -241,6 +242,57 @@
21 should not be used for other purposes because of the weakness
22 of the algorithm.
23
24 +config CRYPTO_RMD128
25 + tristate "RIPEMD-128 digest algorithm"
26 + select CRYPTO_ALGAPI
27 + help
28 + RIPEMD-128 (ISO/IEC 10118-3:2004).
29 +
30 + RIPEMD-128 is a 128-bit cryptographic hash function. It should only
31 + to be used as a secure replacement for RIPEMD. For other use cases
32 + RIPEMD-160 should be used.
33 +
34 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
35 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
36 +
37 +config CRYPTO_RMD160
38 + tristate "RIPEMD-160 digest algorithm"
39 + select CRYPTO_ALGAPI
40 + help
41 + RIPEMD-160 (ISO/IEC 10118-3:2004).
42 +
43 + RIPEMD-160 is a 160-bit cryptographic hash function. It is intended
44 + to be used as a secure replacement for the 128-bit hash functions
45 + MD4, MD5 and it's predecessor RIPEMD (not to be confused with RIPEMD-128).
46 +
47 + It's speed is comparable to SHA1 and there are no known attacks against
48 + RIPEMD-160.
49 +
50 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
51 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
52 +
53 +config CRYPTO_RMD256
54 + tristate "RIPEMD-256 digest algorithm"
55 + select CRYPTO_ALGAPI
56 + help
57 + RIPEMD-256 is an optional extension of RIPEMD-128 with a 256 bit hash.
58 + It is intended for applications that require longer hash-results, without
59 + needing a larger security level (than RIPEMD-128).
60 +
61 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
62 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
63 +
64 +config CRYPTO_RMD320
65 + tristate "RIPEMD-320 digest algorithm"
66 + select CRYPTO_ALGAPI
67 + help
68 + RIPEMD-320 is an optional extension of RIPEMD-160 with a 320 bit hash.
69 + It is intended for applications that require longer hash-results, without
70 + needing a larger security level (than RIPEMD-160).
71 +
72 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
73 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
74 +
75 config CRYPTO_SHA1
76 tristate "SHA1 digest algorithm"
77 select CRYPTO_ALGAPI
78 @@ -614,6 +666,15 @@
79 help
80 This is the LZO algorithm.
81
82 +comment "Random Number Generation"
83 +
84 +config CRYPTO_PRNG
85 + tristate "Pseudo Random Number Generation for Cryptographic modules"
86 + help
87 + This option enables the generic pseudo random number generator
88 + for cryptographic modules. Uses the Algorithm specified in
89 + ANSI X9.31 A.2.4
90 +
91 source "drivers/crypto/Kconfig"
92
93 endif # if CRYPTO
94 --- a/crypto/Makefile
95 +++ b/crypto/Makefile
96 @@ -19,6 +19,7 @@
97 obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o
98
99 crypto_hash-objs := hash.o
100 +crypto_hash-objs += ahash.o
101 obj-$(CONFIG_CRYPTO_HASH) += crypto_hash.o
102
103 obj-$(CONFIG_CRYPTO_MANAGER) += cryptomgr.o
104 @@ -27,6 +28,10 @@
105 obj-$(CONFIG_CRYPTO_NULL) += crypto_null.o
106 obj-$(CONFIG_CRYPTO_MD4) += md4.o
107 obj-$(CONFIG_CRYPTO_MD5) += md5.o
108 +obj-$(CONFIG_CRYPTO_RMD128) += rmd128.o
109 +obj-$(CONFIG_CRYPTO_RMD160) += rmd160.o
110 +obj-$(CONFIG_CRYPTO_RMD256) += rmd256.o
111 +obj-$(CONFIG_CRYPTO_RMD320) += rmd320.o
112 obj-$(CONFIG_CRYPTO_SHA1) += sha1_generic.o
113 obj-$(CONFIG_CRYPTO_SHA256) += sha256_generic.o
114 obj-$(CONFIG_CRYPTO_SHA512) += sha512_generic.o
115 @@ -64,7 +69,7 @@
116 obj-$(CONFIG_CRYPTO_CRC32C) += crc32c.o
117 obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o
118 obj-$(CONFIG_CRYPTO_LZO) += lzo.o
119 -
120 +obj-$(CONFIG_CRYPTO_PRNG) += prng.o
121 obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o
122
123 #
124 --- /dev/null
125 +++ b/crypto/ahash.c
126 @@ -0,0 +1,194 @@
127 +/*
128 + * Asynchronous Cryptographic Hash operations.
129 + *
130 + * This is the asynchronous version of hash.c with notification of
131 + * completion via a callback.
132 + *
133 + * Copyright (c) 2008 Loc Ho <lho@amcc.com>
134 + *
135 + * This program is free software; you can redistribute it and/or modify it
136 + * under the terms of the GNU General Public License as published by the Free
137 + * Software Foundation; either version 2 of the License, or (at your option)
138 + * any later version.
139 + *
140 + */
141 +
142 +#include <crypto/internal/hash.h>
143 +#include <crypto/scatterwalk.h>
144 +#include <linux/err.h>
145 +#include <linux/kernel.h>
146 +#include <linux/module.h>
147 +#include <linux/sched.h>
148 +#include <linux/slab.h>
149 +#include <linux/seq_file.h>
150 +
151 +#include "internal.h"
152 +
153 +static int hash_walk_next(struct crypto_hash_walk *walk)
154 +{
155 + unsigned int alignmask = walk->alignmask;
156 + unsigned int offset = walk->offset;
157 + unsigned int nbytes = min(walk->entrylen,
158 + ((unsigned int)(PAGE_SIZE)) - offset);
159 +
160 + walk->data = crypto_kmap(walk->pg, 0);
161 + walk->data += offset;
162 +
163 + if (offset & alignmask)
164 + nbytes = alignmask + 1 - (offset & alignmask);
165 +
166 + walk->entrylen -= nbytes;
167 + return nbytes;
168 +}
169 +
170 +static int hash_walk_new_entry(struct crypto_hash_walk *walk)
171 +{
172 + struct scatterlist *sg;
173 +
174 + sg = walk->sg;
175 + walk->pg = sg_page(sg);
176 + walk->offset = sg->offset;
177 + walk->entrylen = sg->length;
178 +
179 + if (walk->entrylen > walk->total)
180 + walk->entrylen = walk->total;
181 + walk->total -= walk->entrylen;
182 +
183 + return hash_walk_next(walk);
184 +}
185 +
186 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err)
187 +{
188 + unsigned int alignmask = walk->alignmask;
189 + unsigned int nbytes = walk->entrylen;
190 +
191 + walk->data -= walk->offset;
192 +
193 + if (nbytes && walk->offset & alignmask && !err) {
194 + walk->offset += alignmask - 1;
195 + walk->offset = ALIGN(walk->offset, alignmask + 1);
196 + walk->data += walk->offset;
197 +
198 + nbytes = min(nbytes,
199 + ((unsigned int)(PAGE_SIZE)) - walk->offset);
200 + walk->entrylen -= nbytes;
201 +
202 + return nbytes;
203 + }
204 +
205 + crypto_kunmap(walk->data, 0);
206 + crypto_yield(walk->flags);
207 +
208 + if (err)
209 + return err;
210 +
211 + walk->offset = 0;
212 +
213 + if (nbytes)
214 + return hash_walk_next(walk);
215 +
216 + if (!walk->total)
217 + return 0;
218 +
219 + walk->sg = scatterwalk_sg_next(walk->sg);
220 +
221 + return hash_walk_new_entry(walk);
222 +}
223 +EXPORT_SYMBOL_GPL(crypto_hash_walk_done);
224 +
225 +int crypto_hash_walk_first(struct ahash_request *req,
226 + struct crypto_hash_walk *walk)
227 +{
228 + walk->total = req->nbytes;
229 +
230 + if (!walk->total)
231 + return 0;
232 +
233 + walk->alignmask = crypto_ahash_alignmask(crypto_ahash_reqtfm(req));
234 + walk->sg = req->src;
235 + walk->flags = req->base.flags;
236 +
237 + return hash_walk_new_entry(walk);
238 +}
239 +EXPORT_SYMBOL_GPL(crypto_hash_walk_first);
240 +
241 +static int ahash_setkey_unaligned(struct crypto_ahash *tfm, const u8 *key,
242 + unsigned int keylen)
243 +{
244 + struct ahash_alg *ahash = crypto_ahash_alg(tfm);
245 + unsigned long alignmask = crypto_ahash_alignmask(tfm);
246 + int ret;
247 + u8 *buffer, *alignbuffer;
248 + unsigned long absize;
249 +
250 + absize = keylen + alignmask;
251 + buffer = kmalloc(absize, GFP_ATOMIC);
252 + if (!buffer)
253 + return -ENOMEM;
254 +
255 + alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);
256 + memcpy(alignbuffer, key, keylen);
257 + ret = ahash->setkey(tfm, alignbuffer, keylen);
258 + memset(alignbuffer, 0, keylen);
259 + kfree(buffer);
260 + return ret;
261 +}
262 +
263 +static int ahash_setkey(struct crypto_ahash *tfm, const u8 *key,
264 + unsigned int keylen)
265 +{
266 + struct ahash_alg *ahash = crypto_ahash_alg(tfm);
267 + unsigned long alignmask = crypto_ahash_alignmask(tfm);
268 +
269 + if ((unsigned long)key & alignmask)
270 + return ahash_setkey_unaligned(tfm, key, keylen);
271 +
272 + return ahash->setkey(tfm, key, keylen);
273 +}
274 +
275 +static unsigned int crypto_ahash_ctxsize(struct crypto_alg *alg, u32 type,
276 + u32 mask)
277 +{
278 + return alg->cra_ctxsize;
279 +}
280 +
281 +static int crypto_init_ahash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
282 +{
283 + struct ahash_alg *alg = &tfm->__crt_alg->cra_ahash;
284 + struct ahash_tfm *crt = &tfm->crt_ahash;
285 +
286 + if (alg->digestsize > PAGE_SIZE / 8)
287 + return -EINVAL;
288 +
289 + crt->init = alg->init;
290 + crt->update = alg->update;
291 + crt->final = alg->final;
292 + crt->digest = alg->digest;
293 + crt->setkey = ahash_setkey;
294 + crt->digestsize = alg->digestsize;
295 +
296 + return 0;
297 +}
298 +
299 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
300 + __attribute__ ((unused));
301 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
302 +{
303 + seq_printf(m, "type : ahash\n");
304 + seq_printf(m, "async : %s\n", alg->cra_flags & CRYPTO_ALG_ASYNC ?
305 + "yes" : "no");
306 + seq_printf(m, "blocksize : %u\n", alg->cra_blocksize);
307 + seq_printf(m, "digestsize : %u\n", alg->cra_hash.digestsize);
308 +}
309 +
310 +const struct crypto_type crypto_ahash_type = {
311 + .ctxsize = crypto_ahash_ctxsize,
312 + .init = crypto_init_ahash_ops,
313 +#ifdef CONFIG_PROC_FS
314 + .show = crypto_ahash_show,
315 +#endif
316 +};
317 +EXPORT_SYMBOL_GPL(crypto_ahash_type);
318 +
319 +MODULE_LICENSE("GPL");
320 +MODULE_DESCRIPTION("Asynchronous cryptographic hash type");
321 --- a/crypto/api.c
322 +++ b/crypto/api.c
323 @@ -235,8 +235,12 @@
324 return crypto_init_cipher_ops(tfm);
325
326 case CRYPTO_ALG_TYPE_DIGEST:
327 - return crypto_init_digest_ops(tfm);
328 -
329 + if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) !=
330 + CRYPTO_ALG_TYPE_HASH_MASK)
331 + return crypto_init_digest_ops_async(tfm);
332 + else
333 + return crypto_init_digest_ops(tfm);
334 +
335 case CRYPTO_ALG_TYPE_COMPRESS:
336 return crypto_init_compress_ops(tfm);
337
338 --- a/crypto/camellia.c
339 +++ b/crypto/camellia.c
340 @@ -35,6 +35,8 @@
341 #include <linux/init.h>
342 #include <linux/kernel.h>
343 #include <linux/module.h>
344 +#include <linux/bitops.h>
345 +#include <asm/unaligned.h>
346
347 static const u32 camellia_sp1110[256] = {
348 0x70707000,0x82828200,0x2c2c2c00,0xececec00,
349 @@ -335,20 +337,6 @@
350 /*
351 * macros
352 */
353 -#define GETU32(v, pt) \
354 - do { \
355 - /* latest breed of gcc is clever enough to use move */ \
356 - memcpy(&(v), (pt), 4); \
357 - (v) = be32_to_cpu(v); \
358 - } while(0)
359 -
360 -/* rotation right shift 1byte */
361 -#define ROR8(x) (((x) >> 8) + ((x) << 24))
362 -/* rotation left shift 1bit */
363 -#define ROL1(x) (((x) << 1) + ((x) >> 31))
364 -/* rotation left shift 1byte */
365 -#define ROL8(x) (((x) << 8) + ((x) >> 24))
366 -
367 #define ROLDQ(ll, lr, rl, rr, w0, w1, bits) \
368 do { \
369 w0 = ll; \
370 @@ -383,7 +371,7 @@
371 ^ camellia_sp3033[(u8)(il >> 8)] \
372 ^ camellia_sp4404[(u8)(il )]; \
373 yl ^= yr; \
374 - yr = ROR8(yr); \
375 + yr = ror32(yr, 8); \
376 yr ^= yl; \
377 } while(0)
378
379 @@ -405,7 +393,7 @@
380 subL[7] ^= subL[1]; subR[7] ^= subR[1];
381 subL[1] ^= subR[1] & ~subR[9];
382 dw = subL[1] & subL[9],
383 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl2) */
384 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl2) */
385 /* round 8 */
386 subL[11] ^= subL[1]; subR[11] ^= subR[1];
387 /* round 10 */
388 @@ -414,7 +402,7 @@
389 subL[15] ^= subL[1]; subR[15] ^= subR[1];
390 subL[1] ^= subR[1] & ~subR[17];
391 dw = subL[1] & subL[17],
392 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl4) */
393 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl4) */
394 /* round 14 */
395 subL[19] ^= subL[1]; subR[19] ^= subR[1];
396 /* round 16 */
397 @@ -430,7 +418,7 @@
398 } else {
399 subL[1] ^= subR[1] & ~subR[25];
400 dw = subL[1] & subL[25],
401 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl6) */
402 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl6) */
403 /* round 20 */
404 subL[27] ^= subL[1]; subR[27] ^= subR[1];
405 /* round 22 */
406 @@ -450,7 +438,7 @@
407 subL[26] ^= kw4l; subR[26] ^= kw4r;
408 kw4l ^= kw4r & ~subR[24];
409 dw = kw4l & subL[24],
410 - kw4r ^= ROL1(dw); /* modified for FL(kl5) */
411 + kw4r ^= rol32(dw, 1); /* modified for FL(kl5) */
412 }
413 /* round 17 */
414 subL[22] ^= kw4l; subR[22] ^= kw4r;
415 @@ -460,7 +448,7 @@
416 subL[18] ^= kw4l; subR[18] ^= kw4r;
417 kw4l ^= kw4r & ~subR[16];
418 dw = kw4l & subL[16],
419 - kw4r ^= ROL1(dw); /* modified for FL(kl3) */
420 + kw4r ^= rol32(dw, 1); /* modified for FL(kl3) */
421 /* round 11 */
422 subL[14] ^= kw4l; subR[14] ^= kw4r;
423 /* round 9 */
424 @@ -469,7 +457,7 @@
425 subL[10] ^= kw4l; subR[10] ^= kw4r;
426 kw4l ^= kw4r & ~subR[8];
427 dw = kw4l & subL[8],
428 - kw4r ^= ROL1(dw); /* modified for FL(kl1) */
429 + kw4r ^= rol32(dw, 1); /* modified for FL(kl1) */
430 /* round 5 */
431 subL[6] ^= kw4l; subR[6] ^= kw4r;
432 /* round 3 */
433 @@ -494,7 +482,7 @@
434 SUBKEY_R(6) = subR[5] ^ subR[7];
435 tl = subL[10] ^ (subR[10] & ~subR[8]);
436 dw = tl & subL[8], /* FL(kl1) */
437 - tr = subR[10] ^ ROL1(dw);
438 + tr = subR[10] ^ rol32(dw, 1);
439 SUBKEY_L(7) = subL[6] ^ tl; /* round 6 */
440 SUBKEY_R(7) = subR[6] ^ tr;
441 SUBKEY_L(8) = subL[8]; /* FL(kl1) */
442 @@ -503,7 +491,7 @@
443 SUBKEY_R(9) = subR[9];
444 tl = subL[7] ^ (subR[7] & ~subR[9]);
445 dw = tl & subL[9], /* FLinv(kl2) */
446 - tr = subR[7] ^ ROL1(dw);
447 + tr = subR[7] ^ rol32(dw, 1);
448 SUBKEY_L(10) = tl ^ subL[11]; /* round 7 */
449 SUBKEY_R(10) = tr ^ subR[11];
450 SUBKEY_L(11) = subL[10] ^ subL[12]; /* round 8 */
451 @@ -516,7 +504,7 @@
452 SUBKEY_R(14) = subR[13] ^ subR[15];
453 tl = subL[18] ^ (subR[18] & ~subR[16]);
454 dw = tl & subL[16], /* FL(kl3) */
455 - tr = subR[18] ^ ROL1(dw);
456 + tr = subR[18] ^ rol32(dw, 1);
457 SUBKEY_L(15) = subL[14] ^ tl; /* round 12 */
458 SUBKEY_R(15) = subR[14] ^ tr;
459 SUBKEY_L(16) = subL[16]; /* FL(kl3) */
460 @@ -525,7 +513,7 @@
461 SUBKEY_R(17) = subR[17];
462 tl = subL[15] ^ (subR[15] & ~subR[17]);
463 dw = tl & subL[17], /* FLinv(kl4) */
464 - tr = subR[15] ^ ROL1(dw);
465 + tr = subR[15] ^ rol32(dw, 1);
466 SUBKEY_L(18) = tl ^ subL[19]; /* round 13 */
467 SUBKEY_R(18) = tr ^ subR[19];
468 SUBKEY_L(19) = subL[18] ^ subL[20]; /* round 14 */
469 @@ -544,7 +532,7 @@
470 } else {
471 tl = subL[26] ^ (subR[26] & ~subR[24]);
472 dw = tl & subL[24], /* FL(kl5) */
473 - tr = subR[26] ^ ROL1(dw);
474 + tr = subR[26] ^ rol32(dw, 1);
475 SUBKEY_L(23) = subL[22] ^ tl; /* round 18 */
476 SUBKEY_R(23) = subR[22] ^ tr;
477 SUBKEY_L(24) = subL[24]; /* FL(kl5) */
478 @@ -553,7 +541,7 @@
479 SUBKEY_R(25) = subR[25];
480 tl = subL[23] ^ (subR[23] & ~subR[25]);
481 dw = tl & subL[25], /* FLinv(kl6) */
482 - tr = subR[23] ^ ROL1(dw);
483 + tr = subR[23] ^ rol32(dw, 1);
484 SUBKEY_L(26) = tl ^ subL[27]; /* round 19 */
485 SUBKEY_R(26) = tr ^ subR[27];
486 SUBKEY_L(27) = subL[26] ^ subL[28]; /* round 20 */
487 @@ -573,17 +561,17 @@
488 /* apply the inverse of the last half of P-function */
489 i = 2;
490 do {
491 - dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = ROL8(dw);/* round 1 */
492 + dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = rol32(dw, 8);/* round 1 */
493 SUBKEY_R(i + 0) = SUBKEY_L(i + 0) ^ dw; SUBKEY_L(i + 0) = dw;
494 - dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = ROL8(dw);/* round 2 */
495 + dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = rol32(dw, 8);/* round 2 */
496 SUBKEY_R(i + 1) = SUBKEY_L(i + 1) ^ dw; SUBKEY_L(i + 1) = dw;
497 - dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = ROL8(dw);/* round 3 */
498 + dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = rol32(dw, 8);/* round 3 */
499 SUBKEY_R(i + 2) = SUBKEY_L(i + 2) ^ dw; SUBKEY_L(i + 2) = dw;
500 - dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = ROL8(dw);/* round 4 */
501 + dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = rol32(dw, 8);/* round 4 */
502 SUBKEY_R(i + 3) = SUBKEY_L(i + 3) ^ dw; SUBKEY_L(i + 3) = dw;
503 - dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = ROL8(dw);/* round 5 */
504 + dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = rol32(dw, 9);/* round 5 */
505 SUBKEY_R(i + 4) = SUBKEY_L(i + 4) ^ dw; SUBKEY_L(i + 4) = dw;
506 - dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = ROL8(dw);/* round 6 */
507 + dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = rol32(dw, 8);/* round 6 */
508 SUBKEY_R(i + 5) = SUBKEY_L(i + 5) ^ dw; SUBKEY_L(i + 5) = dw;
509 i += 8;
510 } while (i < max);
511 @@ -599,10 +587,10 @@
512 /**
513 * k == kll || klr || krl || krr (|| is concatenation)
514 */
515 - GETU32(kll, key );
516 - GETU32(klr, key + 4);
517 - GETU32(krl, key + 8);
518 - GETU32(krr, key + 12);
519 + kll = get_unaligned_be32(key);
520 + klr = get_unaligned_be32(key + 4);
521 + krl = get_unaligned_be32(key + 8);
522 + krr = get_unaligned_be32(key + 12);
523
524 /* generate KL dependent subkeys */
525 /* kw1 */
526 @@ -707,14 +695,14 @@
527 * key = (kll || klr || krl || krr || krll || krlr || krrl || krrr)
528 * (|| is concatenation)
529 */
530 - GETU32(kll, key );
531 - GETU32(klr, key + 4);
532 - GETU32(krl, key + 8);
533 - GETU32(krr, key + 12);
534 - GETU32(krll, key + 16);
535 - GETU32(krlr, key + 20);
536 - GETU32(krrl, key + 24);
537 - GETU32(krrr, key + 28);
538 + kll = get_unaligned_be32(key);
539 + klr = get_unaligned_be32(key + 4);
540 + krl = get_unaligned_be32(key + 8);
541 + krr = get_unaligned_be32(key + 12);
542 + krll = get_unaligned_be32(key + 16);
543 + krlr = get_unaligned_be32(key + 20);
544 + krrl = get_unaligned_be32(key + 24);
545 + krrr = get_unaligned_be32(key + 28);
546
547 /* generate KL dependent subkeys */
548 /* kw1 */
549 @@ -870,13 +858,13 @@
550 t0 &= ll; \
551 t2 |= rr; \
552 rl ^= t2; \
553 - lr ^= ROL1(t0); \
554 + lr ^= rol32(t0, 1); \
555 t3 = krl; \
556 t1 = klr; \
557 t3 &= rl; \
558 t1 |= lr; \
559 ll ^= t1; \
560 - rr ^= ROL1(t3); \
561 + rr ^= rol32(t3, 1); \
562 } while(0)
563
564 #define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) \
565 @@ -892,7 +880,7 @@
566 il ^= kl; \
567 ir ^= il ^ kr; \
568 yl ^= ir; \
569 - yr ^= ROR8(il) ^ ir; \
570 + yr ^= ror32(il, 8) ^ ir; \
571 } while(0)
572
573 /* max = 24: 128bit encrypt, max = 32: 256bit encrypt */
574 --- a/crypto/crc32c.c
575 +++ b/crypto/crc32c.c
576 @@ -5,20 +5,23 @@
577 *
578 * This module file is a wrapper to invoke the lib/crc32c routines.
579 *
580 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
581 + *
582 * This program is free software; you can redistribute it and/or modify it
583 * under the terms of the GNU General Public License as published by the Free
584 * Software Foundation; either version 2 of the License, or (at your option)
585 * any later version.
586 *
587 */
588 +
589 +#include <crypto/internal/hash.h>
590 #include <linux/init.h>
591 #include <linux/module.h>
592 #include <linux/string.h>
593 -#include <linux/crypto.h>
594 #include <linux/crc32c.h>
595 #include <linux/kernel.h>
596
597 -#define CHKSUM_BLOCK_SIZE 32
598 +#define CHKSUM_BLOCK_SIZE 1
599 #define CHKSUM_DIGEST_SIZE 4
600
601 struct chksum_ctx {
602 @@ -71,7 +74,7 @@
603 *(__le32 *)out = ~cpu_to_le32(mctx->crc);
604 }
605
606 -static int crc32c_cra_init(struct crypto_tfm *tfm)
607 +static int crc32c_cra_init_old(struct crypto_tfm *tfm)
608 {
609 struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
610
611 @@ -79,14 +82,14 @@
612 return 0;
613 }
614
615 -static struct crypto_alg alg = {
616 +static struct crypto_alg old_alg = {
617 .cra_name = "crc32c",
618 .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
619 .cra_blocksize = CHKSUM_BLOCK_SIZE,
620 .cra_ctxsize = sizeof(struct chksum_ctx),
621 .cra_module = THIS_MODULE,
622 - .cra_list = LIST_HEAD_INIT(alg.cra_list),
623 - .cra_init = crc32c_cra_init,
624 + .cra_list = LIST_HEAD_INIT(old_alg.cra_list),
625 + .cra_init = crc32c_cra_init_old,
626 .cra_u = {
627 .digest = {
628 .dia_digestsize= CHKSUM_DIGEST_SIZE,
629 @@ -98,14 +101,125 @@
630 }
631 };
632
633 +/*
634 + * Setting the seed allows arbitrary accumulators and flexible XOR policy
635 + * If your algorithm starts with ~0, then XOR with ~0 before you set
636 + * the seed.
637 + */
638 +static int crc32c_setkey(struct crypto_ahash *hash, const u8 *key,
639 + unsigned int keylen)
640 +{
641 + u32 *mctx = crypto_ahash_ctx(hash);
642 +
643 + if (keylen != sizeof(u32)) {
644 + crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
645 + return -EINVAL;
646 + }
647 + *mctx = le32_to_cpup((__le32 *)key);
648 + return 0;
649 +}
650 +
651 +static int crc32c_init(struct ahash_request *req)
652 +{
653 + u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
654 + u32 *crcp = ahash_request_ctx(req);
655 +
656 + *crcp = *mctx;
657 + return 0;
658 +}
659 +
660 +static int crc32c_update(struct ahash_request *req)
661 +{
662 + struct crypto_hash_walk walk;
663 + u32 *crcp = ahash_request_ctx(req);
664 + u32 crc = *crcp;
665 + int nbytes;
666 +
667 + for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
668 + nbytes = crypto_hash_walk_done(&walk, 0))
669 + crc = crc32c(crc, walk.data, nbytes);
670 +
671 + *crcp = crc;
672 + return 0;
673 +}
674 +
675 +static int crc32c_final(struct ahash_request *req)
676 +{
677 + u32 *crcp = ahash_request_ctx(req);
678 +
679 + *(__le32 *)req->result = ~cpu_to_le32p(crcp);
680 + return 0;
681 +}
682 +
683 +static int crc32c_digest(struct ahash_request *req)
684 +{
685 + struct crypto_hash_walk walk;
686 + u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
687 + u32 crc = *mctx;
688 + int nbytes;
689 +
690 + for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
691 + nbytes = crypto_hash_walk_done(&walk, 0))
692 + crc = crc32c(crc, walk.data, nbytes);
693 +
694 + *(__le32 *)req->result = ~cpu_to_le32(crc);
695 + return 0;
696 +}
697 +
698 +static int crc32c_cra_init(struct crypto_tfm *tfm)
699 +{
700 + u32 *key = crypto_tfm_ctx(tfm);
701 +
702 + *key = ~0;
703 +
704 + tfm->crt_ahash.reqsize = sizeof(u32);
705 +
706 + return 0;
707 +}
708 +
709 +static struct crypto_alg alg = {
710 + .cra_name = "crc32c",
711 + .cra_driver_name = "crc32c-generic",
712 + .cra_priority = 100,
713 + .cra_flags = CRYPTO_ALG_TYPE_AHASH,
714 + .cra_blocksize = CHKSUM_BLOCK_SIZE,
715 + .cra_alignmask = 3,
716 + .cra_ctxsize = sizeof(u32),
717 + .cra_module = THIS_MODULE,
718 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
719 + .cra_init = crc32c_cra_init,
720 + .cra_type = &crypto_ahash_type,
721 + .cra_u = {
722 + .ahash = {
723 + .digestsize = CHKSUM_DIGEST_SIZE,
724 + .setkey = crc32c_setkey,
725 + .init = crc32c_init,
726 + .update = crc32c_update,
727 + .final = crc32c_final,
728 + .digest = crc32c_digest,
729 + }
730 + }
731 +};
732 +
733 static int __init crc32c_mod_init(void)
734 {
735 - return crypto_register_alg(&alg);
736 + int err;
737 +
738 + err = crypto_register_alg(&old_alg);
739 + if (err)
740 + return err;
741 +
742 + err = crypto_register_alg(&alg);
743 + if (err)
744 + crypto_unregister_alg(&old_alg);
745 +
746 + return err;
747 }
748
749 static void __exit crc32c_mod_fini(void)
750 {
751 crypto_unregister_alg(&alg);
752 + crypto_unregister_alg(&old_alg);
753 }
754
755 module_init(crc32c_mod_init);
756 --- a/crypto/cryptd.c
757 +++ b/crypto/cryptd.c
758 @@ -11,6 +11,7 @@
759 */
760
761 #include <crypto/algapi.h>
762 +#include <crypto/internal/hash.h>
763 #include <linux/err.h>
764 #include <linux/init.h>
765 #include <linux/kernel.h>
766 @@ -45,6 +46,13 @@
767 crypto_completion_t complete;
768 };
769
770 +struct cryptd_hash_ctx {
771 + struct crypto_hash *child;
772 +};
773 +
774 +struct cryptd_hash_request_ctx {
775 + crypto_completion_t complete;
776 +};
777
778 static inline struct cryptd_state *cryptd_get_state(struct crypto_tfm *tfm)
779 {
780 @@ -82,10 +90,8 @@
781
782 rctx = ablkcipher_request_ctx(req);
783
784 - if (unlikely(err == -EINPROGRESS)) {
785 - rctx->complete(&req->base, err);
786 - return;
787 - }
788 + if (unlikely(err == -EINPROGRESS))
789 + goto out;
790
791 desc.tfm = child;
792 desc.info = req->info;
793 @@ -95,8 +101,9 @@
794
795 req->base.complete = rctx->complete;
796
797 +out:
798 local_bh_disable();
799 - req->base.complete(&req->base, err);
800 + rctx->complete(&req->base, err);
801 local_bh_enable();
802 }
803
804 @@ -261,6 +268,240 @@
805 return inst;
806 }
807
808 +static int cryptd_hash_init_tfm(struct crypto_tfm *tfm)
809 +{
810 + struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
811 + struct cryptd_instance_ctx *ictx = crypto_instance_ctx(inst);
812 + struct crypto_spawn *spawn = &ictx->spawn;
813 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
814 + struct crypto_hash *cipher;
815 +
816 + cipher = crypto_spawn_hash(spawn);
817 + if (IS_ERR(cipher))
818 + return PTR_ERR(cipher);
819 +
820 + ctx->child = cipher;
821 + tfm->crt_ahash.reqsize =
822 + sizeof(struct cryptd_hash_request_ctx);
823 + return 0;
824 +}
825 +
826 +static void cryptd_hash_exit_tfm(struct crypto_tfm *tfm)
827 +{
828 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
829 + struct cryptd_state *state = cryptd_get_state(tfm);
830 + int active;
831 +
832 + mutex_lock(&state->mutex);
833 + active = ahash_tfm_in_queue(&state->queue,
834 + __crypto_ahash_cast(tfm));
835 + mutex_unlock(&state->mutex);
836 +
837 + BUG_ON(active);
838 +
839 + crypto_free_hash(ctx->child);
840 +}
841 +
842 +static int cryptd_hash_setkey(struct crypto_ahash *parent,
843 + const u8 *key, unsigned int keylen)
844 +{
845 + struct cryptd_hash_ctx *ctx = crypto_ahash_ctx(parent);
846 + struct crypto_hash *child = ctx->child;
847 + int err;
848 +
849 + crypto_hash_clear_flags(child, CRYPTO_TFM_REQ_MASK);
850 + crypto_hash_set_flags(child, crypto_ahash_get_flags(parent) &
851 + CRYPTO_TFM_REQ_MASK);
852 + err = crypto_hash_setkey(child, key, keylen);
853 + crypto_ahash_set_flags(parent, crypto_hash_get_flags(child) &
854 + CRYPTO_TFM_RES_MASK);
855 + return err;
856 +}
857 +
858 +static int cryptd_hash_enqueue(struct ahash_request *req,
859 + crypto_completion_t complete)
860 +{
861 + struct cryptd_hash_request_ctx *rctx = ahash_request_ctx(req);
862 + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
863 + struct cryptd_state *state =
864 + cryptd_get_state(crypto_ahash_tfm(tfm));
865 + int err;
866 +
867 + rctx->complete = req->base.complete;
868 + req->base.complete = complete;
869 +
870 + spin_lock_bh(&state->lock);
871 + err = ahash_enqueue_request(&state->queue, req);
872 + spin_unlock_bh(&state->lock);
873 +
874 + wake_up_process(state->task);
875 + return err;
876 +}
877 +
878 +static void cryptd_hash_init(struct crypto_async_request *req_async, int err)
879 +{
880 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
881 + struct crypto_hash *child = ctx->child;
882 + struct ahash_request *req = ahash_request_cast(req_async);
883 + struct cryptd_hash_request_ctx *rctx;
884 + struct hash_desc desc;
885 +
886 + rctx = ahash_request_ctx(req);
887 +
888 + if (unlikely(err == -EINPROGRESS))
889 + goto out;
890 +
891 + desc.tfm = child;
892 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
893 +
894 + err = crypto_hash_crt(child)->init(&desc);
895 +
896 + req->base.complete = rctx->complete;
897 +
898 +out:
899 + local_bh_disable();
900 + rctx->complete(&req->base, err);
901 + local_bh_enable();
902 +}
903 +
904 +static int cryptd_hash_init_enqueue(struct ahash_request *req)
905 +{
906 + return cryptd_hash_enqueue(req, cryptd_hash_init);
907 +}
908 +
909 +static void cryptd_hash_update(struct crypto_async_request *req_async, int err)
910 +{
911 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
912 + struct crypto_hash *child = ctx->child;
913 + struct ahash_request *req = ahash_request_cast(req_async);
914 + struct cryptd_hash_request_ctx *rctx;
915 + struct hash_desc desc;
916 +
917 + rctx = ahash_request_ctx(req);
918 +
919 + if (unlikely(err == -EINPROGRESS))
920 + goto out;
921 +
922 + desc.tfm = child;
923 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
924 +
925 + err = crypto_hash_crt(child)->update(&desc,
926 + req->src,
927 + req->nbytes);
928 +
929 + req->base.complete = rctx->complete;
930 +
931 +out:
932 + local_bh_disable();
933 + rctx->complete(&req->base, err);
934 + local_bh_enable();
935 +}
936 +
937 +static int cryptd_hash_update_enqueue(struct ahash_request *req)
938 +{
939 + return cryptd_hash_enqueue(req, cryptd_hash_update);
940 +}
941 +
942 +static void cryptd_hash_final(struct crypto_async_request *req_async, int err)
943 +{
944 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
945 + struct crypto_hash *child = ctx->child;
946 + struct ahash_request *req = ahash_request_cast(req_async);
947 + struct cryptd_hash_request_ctx *rctx;
948 + struct hash_desc desc;
949 +
950 + rctx = ahash_request_ctx(req);
951 +
952 + if (unlikely(err == -EINPROGRESS))
953 + goto out;
954 +
955 + desc.tfm = child;
956 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
957 +
958 + err = crypto_hash_crt(child)->final(&desc, req->result);
959 +
960 + req->base.complete = rctx->complete;
961 +
962 +out:
963 + local_bh_disable();
964 + rctx->complete(&req->base, err);
965 + local_bh_enable();
966 +}
967 +
968 +static int cryptd_hash_final_enqueue(struct ahash_request *req)
969 +{
970 + return cryptd_hash_enqueue(req, cryptd_hash_final);
971 +}
972 +
973 +static void cryptd_hash_digest(struct crypto_async_request *req_async, int err)
974 +{
975 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
976 + struct crypto_hash *child = ctx->child;
977 + struct ahash_request *req = ahash_request_cast(req_async);
978 + struct cryptd_hash_request_ctx *rctx;
979 + struct hash_desc desc;
980 +
981 + rctx = ahash_request_ctx(req);
982 +
983 + if (unlikely(err == -EINPROGRESS))
984 + goto out;
985 +
986 + desc.tfm = child;
987 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
988 +
989 + err = crypto_hash_crt(child)->digest(&desc,
990 + req->src,
991 + req->nbytes,
992 + req->result);
993 +
994 + req->base.complete = rctx->complete;
995 +
996 +out:
997 + local_bh_disable();
998 + rctx->complete(&req->base, err);
999 + local_bh_enable();
1000 +}
1001 +
1002 +static int cryptd_hash_digest_enqueue(struct ahash_request *req)
1003 +{
1004 + return cryptd_hash_enqueue(req, cryptd_hash_digest);
1005 +}
1006 +
1007 +static struct crypto_instance *cryptd_alloc_hash(
1008 + struct rtattr **tb, struct cryptd_state *state)
1009 +{
1010 + struct crypto_instance *inst;
1011 + struct crypto_alg *alg;
1012 +
1013 + alg = crypto_get_attr_alg(tb, CRYPTO_ALG_TYPE_HASH,
1014 + CRYPTO_ALG_TYPE_HASH_MASK);
1015 + if (IS_ERR(alg))
1016 + return ERR_PTR(PTR_ERR(alg));
1017 +
1018 + inst = cryptd_alloc_instance(alg, state);
1019 + if (IS_ERR(inst))
1020 + goto out_put_alg;
1021 +
1022 + inst->alg.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC;
1023 + inst->alg.cra_type = &crypto_ahash_type;
1024 +
1025 + inst->alg.cra_ahash.digestsize = alg->cra_hash.digestsize;
1026 + inst->alg.cra_ctxsize = sizeof(struct cryptd_hash_ctx);
1027 +
1028 + inst->alg.cra_init = cryptd_hash_init_tfm;
1029 + inst->alg.cra_exit = cryptd_hash_exit_tfm;
1030 +
1031 + inst->alg.cra_ahash.init = cryptd_hash_init_enqueue;
1032 + inst->alg.cra_ahash.update = cryptd_hash_update_enqueue;
1033 + inst->alg.cra_ahash.final = cryptd_hash_final_enqueue;
1034 + inst->alg.cra_ahash.setkey = cryptd_hash_setkey;
1035 + inst->alg.cra_ahash.digest = cryptd_hash_digest_enqueue;
1036 +
1037 +out_put_alg:
1038 + crypto_mod_put(alg);
1039 + return inst;
1040 +}
1041 +
1042 static struct cryptd_state state;
1043
1044 static struct crypto_instance *cryptd_alloc(struct rtattr **tb)
1045 @@ -274,6 +515,8 @@
1046 switch (algt->type & algt->mask & CRYPTO_ALG_TYPE_MASK) {
1047 case CRYPTO_ALG_TYPE_BLKCIPHER:
1048 return cryptd_alloc_blkcipher(tb, &state);
1049 + case CRYPTO_ALG_TYPE_DIGEST:
1050 + return cryptd_alloc_hash(tb, &state);
1051 }
1052
1053 return ERR_PTR(-EINVAL);
1054 --- a/crypto/digest.c
1055 +++ b/crypto/digest.c
1056 @@ -12,6 +12,7 @@
1057 *
1058 */
1059
1060 +#include <crypto/internal/hash.h>
1061 #include <crypto/scatterwalk.h>
1062 #include <linux/mm.h>
1063 #include <linux/errno.h>
1064 @@ -141,7 +142,7 @@
1065 struct hash_tfm *ops = &tfm->crt_hash;
1066 struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1067
1068 - if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1069 + if (dalg->dia_digestsize > PAGE_SIZE / 8)
1070 return -EINVAL;
1071
1072 ops->init = init;
1073 @@ -157,3 +158,83 @@
1074 void crypto_exit_digest_ops(struct crypto_tfm *tfm)
1075 {
1076 }
1077 +
1078 +static int digest_async_nosetkey(struct crypto_ahash *tfm_async, const u8 *key,
1079 + unsigned int keylen)
1080 +{
1081 + crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1082 + return -ENOSYS;
1083 +}
1084 +
1085 +static int digest_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1086 + unsigned int keylen)
1087 +{
1088 + struct crypto_tfm *tfm = crypto_ahash_tfm(tfm_async);
1089 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1090 +
1091 + crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1092 + return dalg->dia_setkey(tfm, key, keylen);
1093 +}
1094 +
1095 +static int digest_async_init(struct ahash_request *req)
1096 +{
1097 + struct crypto_tfm *tfm = req->base.tfm;
1098 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1099 +
1100 + dalg->dia_init(tfm);
1101 + return 0;
1102 +}
1103 +
1104 +static int digest_async_update(struct ahash_request *req)
1105 +{
1106 + struct crypto_tfm *tfm = req->base.tfm;
1107 + struct hash_desc desc = {
1108 + .tfm = __crypto_hash_cast(tfm),
1109 + .flags = req->base.flags,
1110 + };
1111 +
1112 + update(&desc, req->src, req->nbytes);
1113 + return 0;
1114 +}
1115 +
1116 +static int digest_async_final(struct ahash_request *req)
1117 +{
1118 + struct crypto_tfm *tfm = req->base.tfm;
1119 + struct hash_desc desc = {
1120 + .tfm = __crypto_hash_cast(tfm),
1121 + .flags = req->base.flags,
1122 + };
1123 +
1124 + final(&desc, req->result);
1125 + return 0;
1126 +}
1127 +
1128 +static int digest_async_digest(struct ahash_request *req)
1129 +{
1130 + struct crypto_tfm *tfm = req->base.tfm;
1131 + struct hash_desc desc = {
1132 + .tfm = __crypto_hash_cast(tfm),
1133 + .flags = req->base.flags,
1134 + };
1135 +
1136 + return digest(&desc, req->src, req->nbytes, req->result);
1137 +}
1138 +
1139 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm)
1140 +{
1141 + struct ahash_tfm *crt = &tfm->crt_ahash;
1142 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1143 +
1144 + if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1145 + return -EINVAL;
1146 +
1147 + crt->init = digest_async_init;
1148 + crt->update = digest_async_update;
1149 + crt->final = digest_async_final;
1150 + crt->digest = digest_async_digest;
1151 + crt->setkey = dalg->dia_setkey ? digest_async_setkey :
1152 + digest_async_nosetkey;
1153 + crt->digestsize = dalg->dia_digestsize;
1154 +
1155 + return 0;
1156 +}
1157 --- a/crypto/hash.c
1158 +++ b/crypto/hash.c
1159 @@ -9,6 +9,7 @@
1160 * any later version.
1161 */
1162
1163 +#include <crypto/internal/hash.h>
1164 #include <linux/errno.h>
1165 #include <linux/kernel.h>
1166 #include <linux/module.h>
1167 @@ -59,24 +60,107 @@
1168 return alg->setkey(crt, key, keylen);
1169 }
1170
1171 -static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1172 +static int hash_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1173 + unsigned int keylen)
1174 +{
1175 + struct crypto_tfm *tfm = crypto_ahash_tfm(tfm_async);
1176 + struct crypto_hash *tfm_hash = __crypto_hash_cast(tfm);
1177 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1178 +
1179 + return alg->setkey(tfm_hash, key, keylen);
1180 +}
1181 +
1182 +static int hash_async_init(struct ahash_request *req)
1183 +{
1184 + struct crypto_tfm *tfm = req->base.tfm;
1185 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1186 + struct hash_desc desc = {
1187 + .tfm = __crypto_hash_cast(tfm),
1188 + .flags = req->base.flags,
1189 + };
1190 +
1191 + return alg->init(&desc);
1192 +}
1193 +
1194 +static int hash_async_update(struct ahash_request *req)
1195 +{
1196 + struct crypto_tfm *tfm = req->base.tfm;
1197 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1198 + struct hash_desc desc = {
1199 + .tfm = __crypto_hash_cast(tfm),
1200 + .flags = req->base.flags,
1201 + };
1202 +
1203 + return alg->update(&desc, req->src, req->nbytes);
1204 +}
1205 +
1206 +static int hash_async_final(struct ahash_request *req)
1207 +{
1208 + struct crypto_tfm *tfm = req->base.tfm;
1209 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1210 + struct hash_desc desc = {
1211 + .tfm = __crypto_hash_cast(tfm),
1212 + .flags = req->base.flags,
1213 + };
1214 +
1215 + return alg->final(&desc, req->result);
1216 +}
1217 +
1218 +static int hash_async_digest(struct ahash_request *req)
1219 +{
1220 + struct crypto_tfm *tfm = req->base.tfm;
1221 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1222 + struct hash_desc desc = {
1223 + .tfm = __crypto_hash_cast(tfm),
1224 + .flags = req->base.flags,
1225 + };
1226 +
1227 + return alg->digest(&desc, req->src, req->nbytes, req->result);
1228 +}
1229 +
1230 +static int crypto_init_hash_ops_async(struct crypto_tfm *tfm)
1231 +{
1232 + struct ahash_tfm *crt = &tfm->crt_ahash;
1233 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1234 +
1235 + crt->init = hash_async_init;
1236 + crt->update = hash_async_update;
1237 + crt->final = hash_async_final;
1238 + crt->digest = hash_async_digest;
1239 + crt->setkey = hash_async_setkey;
1240 + crt->digestsize = alg->digestsize;
1241 +
1242 + return 0;
1243 +}
1244 +
1245 +static int crypto_init_hash_ops_sync(struct crypto_tfm *tfm)
1246 {
1247 struct hash_tfm *crt = &tfm->crt_hash;
1248 struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1249
1250 - if (alg->digestsize > crypto_tfm_alg_blocksize(tfm))
1251 - return -EINVAL;
1252 -
1253 - crt->init = alg->init;
1254 - crt->update = alg->update;
1255 - crt->final = alg->final;
1256 - crt->digest = alg->digest;
1257 - crt->setkey = hash_setkey;
1258 + crt->init = alg->init;
1259 + crt->update = alg->update;
1260 + crt->final = alg->final;
1261 + crt->digest = alg->digest;
1262 + crt->setkey = hash_setkey;
1263 crt->digestsize = alg->digestsize;
1264
1265 return 0;
1266 }
1267
1268 +static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1269 +{
1270 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1271 +
1272 + if (alg->digestsize > PAGE_SIZE / 8)
1273 + return -EINVAL;
1274 +
1275 + if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) != CRYPTO_ALG_TYPE_HASH_MASK)
1276 + return crypto_init_hash_ops_async(tfm);
1277 + else
1278 + return crypto_init_hash_ops_sync(tfm);
1279 +}
1280 +
1281 static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1282 __attribute__ ((unused));
1283 static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1284 --- a/crypto/hmac.c
1285 +++ b/crypto/hmac.c
1286 @@ -226,6 +226,7 @@
1287 struct crypto_instance *inst;
1288 struct crypto_alg *alg;
1289 int err;
1290 + int ds;
1291
1292 err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_HASH);
1293 if (err)
1294 @@ -236,6 +237,13 @@
1295 if (IS_ERR(alg))
1296 return ERR_CAST(alg);
1297
1298 + inst = ERR_PTR(-EINVAL);
1299 + ds = (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1300 + CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1301 + alg->cra_digest.dia_digestsize;
1302 + if (ds > alg->cra_blocksize)
1303 + goto out_put_alg;
1304 +
1305 inst = crypto_alloc_instance("hmac", alg);
1306 if (IS_ERR(inst))
1307 goto out_put_alg;
1308 @@ -246,14 +254,10 @@
1309 inst->alg.cra_alignmask = alg->cra_alignmask;
1310 inst->alg.cra_type = &crypto_hash_type;
1311
1312 - inst->alg.cra_hash.digestsize =
1313 - (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1314 - CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1315 - alg->cra_digest.dia_digestsize;
1316 + inst->alg.cra_hash.digestsize = ds;
1317
1318 inst->alg.cra_ctxsize = sizeof(struct hmac_ctx) +
1319 - ALIGN(inst->alg.cra_blocksize * 2 +
1320 - inst->alg.cra_hash.digestsize,
1321 + ALIGN(inst->alg.cra_blocksize * 2 + ds,
1322 sizeof(void *));
1323
1324 inst->alg.cra_init = hmac_init_tfm;
1325 --- a/crypto/internal.h
1326 +++ b/crypto/internal.h
1327 @@ -86,6 +86,7 @@
1328 struct crypto_alg *crypto_alg_mod_lookup(const char *name, u32 type, u32 mask);
1329
1330 int crypto_init_digest_ops(struct crypto_tfm *tfm);
1331 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm);
1332 int crypto_init_cipher_ops(struct crypto_tfm *tfm);
1333 int crypto_init_compress_ops(struct crypto_tfm *tfm);
1334
1335 --- /dev/null
1336 +++ b/crypto/prng.c
1337 @@ -0,0 +1,410 @@
1338 +/*
1339 + * PRNG: Pseudo Random Number Generator
1340 + * Based on NIST Recommended PRNG From ANSI X9.31 Appendix A.2.4 using
1341 + * AES 128 cipher in RFC3686 ctr mode
1342 + *
1343 + * (C) Neil Horman <nhorman@tuxdriver.com>
1344 + *
1345 + * This program is free software; you can redistribute it and/or modify it
1346 + * under the terms of the GNU General Public License as published by the
1347 + * Free Software Foundation; either version 2 of the License, or (at your
1348 + * any later version.
1349 + *
1350 + *
1351 + */
1352 +
1353 +#include <linux/err.h>
1354 +#include <linux/init.h>
1355 +#include <linux/module.h>
1356 +#include <linux/mm.h>
1357 +#include <linux/slab.h>
1358 +#include <linux/fs.h>
1359 +#include <linux/scatterlist.h>
1360 +#include <linux/string.h>
1361 +#include <linux/crypto.h>
1362 +#include <linux/highmem.h>
1363 +#include <linux/moduleparam.h>
1364 +#include <linux/jiffies.h>
1365 +#include <linux/timex.h>
1366 +#include <linux/interrupt.h>
1367 +#include <linux/miscdevice.h>
1368 +#include "prng.h"
1369 +
1370 +#define TEST_PRNG_ON_START 0
1371 +
1372 +#define DEFAULT_PRNG_KEY "0123456789abcdef1011"
1373 +#define DEFAULT_PRNG_KSZ 20
1374 +#define DEFAULT_PRNG_IV "defaultv"
1375 +#define DEFAULT_PRNG_IVSZ 8
1376 +#define DEFAULT_BLK_SZ 16
1377 +#define DEFAULT_V_SEED "zaybxcwdveuftgsh"
1378 +
1379 +/*
1380 + * Flags for the prng_context flags field
1381 + */
1382 +
1383 +#define PRNG_FIXED_SIZE 0x1
1384 +#define PRNG_NEED_RESET 0x2
1385 +
1386 +/*
1387 + * Note: DT is our counter value
1388 + * I is our intermediate value
1389 + * V is our seed vector
1390 + * See http://csrc.nist.gov/groups/STM/cavp/documents/rng/931rngext.pdf
1391 + * for implementation details
1392 + */
1393 +
1394 +
1395 +struct prng_context {
1396 + char *prng_key;
1397 + char *prng_iv;
1398 + spinlock_t prng_lock;
1399 + unsigned char rand_data[DEFAULT_BLK_SZ];
1400 + unsigned char last_rand_data[DEFAULT_BLK_SZ];
1401 + unsigned char DT[DEFAULT_BLK_SZ];
1402 + unsigned char I[DEFAULT_BLK_SZ];
1403 + unsigned char V[DEFAULT_BLK_SZ];
1404 + u32 rand_data_valid;
1405 + struct crypto_blkcipher *tfm;
1406 + u32 flags;
1407 +};
1408 +
1409 +static int dbg;
1410 +
1411 +static void hexdump(char *note, unsigned char *buf, unsigned int len)
1412 +{
1413 + if (dbg) {
1414 + printk(KERN_CRIT "%s", note);
1415 + print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
1416 + 16, 1,
1417 + buf, len, false);
1418 + }
1419 +}
1420 +
1421 +#define dbgprint(format, args...) do {if(dbg) printk(format, ##args);} while(0)
1422 +
1423 +static void xor_vectors(unsigned char *in1, unsigned char *in2,
1424 + unsigned char *out, unsigned int size)
1425 +{
1426 + int i;
1427 +
1428 + for (i=0;i<size;i++)
1429 + out[i] = in1[i] ^ in2[i];
1430 +
1431 +}
1432 +/*
1433 + * Returns DEFAULT_BLK_SZ bytes of random data per call
1434 + * returns 0 if generation succeded, <0 if something went wrong
1435 + */
1436 +static int _get_more_prng_bytes(struct prng_context *ctx)
1437 +{
1438 + int i;
1439 + struct blkcipher_desc desc;
1440 + struct scatterlist sg_in, sg_out;
1441 + int ret;
1442 + unsigned char tmp[DEFAULT_BLK_SZ];
1443 +
1444 + desc.tfm = ctx->tfm;
1445 + desc.flags = 0;
1446 +
1447 +
1448 + dbgprint(KERN_CRIT "Calling _get_more_prng_bytes for context %p\n",ctx);
1449 +
1450 + hexdump("Input DT: ", ctx->DT, DEFAULT_BLK_SZ);
1451 + hexdump("Input I: ", ctx->I, DEFAULT_BLK_SZ);
1452 + hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ);
1453 +
1454 + /*
1455 + * This algorithm is a 3 stage state machine
1456 + */
1457 + for (i=0;i<3;i++) {
1458 +
1459 + desc.tfm = ctx->tfm;
1460 + desc.flags = 0;
1461 + switch (i) {
1462 + case 0:
1463 + /*
1464 + * Start by encrypting the counter value
1465 + * This gives us an intermediate value I
1466 + */
1467 + memcpy(tmp, ctx->DT, DEFAULT_BLK_SZ);
1468 + sg_init_one(&sg_out, &ctx->I[0], DEFAULT_BLK_SZ);
1469 + hexdump("tmp stage 0: ", tmp, DEFAULT_BLK_SZ);
1470 + break;
1471 + case 1:
1472 +
1473 + /*
1474 + * Next xor I with our secret vector V
1475 + * encrypt that result to obtain our
1476 + * pseudo random data which we output
1477 + */
1478 + xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ);
1479 + sg_init_one(&sg_out, &ctx->rand_data[0], DEFAULT_BLK_SZ);
1480 + hexdump("tmp stage 1: ", tmp, DEFAULT_BLK_SZ);
1481 + break;
1482 + case 2:
1483 + /*
1484 + * First check that we didn't produce the same random data
1485 + * that we did last time around through this
1486 + */
1487 + if (!memcmp(ctx->rand_data, ctx->last_rand_data, DEFAULT_BLK_SZ)) {
1488 + printk(KERN_ERR "ctx %p Failed repetition check!\n",
1489 + ctx);
1490 + ctx->flags |= PRNG_NEED_RESET;
1491 + return -1;
1492 + }
1493 + memcpy(ctx->last_rand_data, ctx->rand_data, DEFAULT_BLK_SZ);
1494 +
1495 + /*
1496 + * Lastly xor the random data with I
1497 + * and encrypt that to obtain a new secret vector V
1498 + */
1499 + xor_vectors(ctx->rand_data, ctx->I, tmp, DEFAULT_BLK_SZ);
1500 + sg_init_one(&sg_out, &ctx->V[0], DEFAULT_BLK_SZ);
1501 + hexdump("tmp stage 2: ", tmp, DEFAULT_BLK_SZ);
1502 + break;
1503 + }
1504 +
1505 + /* Initialize our input buffer */
1506 + sg_init_one(&sg_in, &tmp[0], DEFAULT_BLK_SZ);
1507 +
1508 + /* do the encryption */
1509 + ret = crypto_blkcipher_encrypt(&desc, &sg_out, &sg_in, DEFAULT_BLK_SZ);
1510 +
1511 + /* And check the result */
1512 + if (ret) {
1513 + dbgprint(KERN_CRIT "Encryption of new block failed for context %p\n",ctx);
1514 + ctx->rand_data_valid = DEFAULT_BLK_SZ;
1515 + return -1;
1516 + }
1517 +
1518 + }
1519 +
1520 + /*
1521 + * Now update our DT value
1522 + */
1523 + for (i=DEFAULT_BLK_SZ-1;i>0;i--) {
1524 + ctx->DT[i] = ctx->DT[i-1];
1525 + }
1526 + ctx->DT[0] += 1;
1527 +
1528 + dbgprint("Returning new block for context %p\n",ctx);
1529 + ctx->rand_data_valid = 0;
1530 +
1531 + hexdump("Output DT: ", ctx->DT, DEFAULT_BLK_SZ);
1532 + hexdump("Output I: ", ctx->I, DEFAULT_BLK_SZ);
1533 + hexdump("Output V: ", ctx->V, DEFAULT_BLK_SZ);
1534 + hexdump("New Random Data: ", ctx->rand_data, DEFAULT_BLK_SZ);
1535 +
1536 + return 0;
1537 +}
1538 +
1539 +/* Our exported functions */
1540 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx)
1541 +{
1542 + unsigned long flags;
1543 + unsigned char *ptr = buf;
1544 + unsigned int byte_count = (unsigned int)nbytes;
1545 + int err;
1546 +
1547 +
1548 + if (nbytes < 0)
1549 + return -EINVAL;
1550 +
1551 + spin_lock_irqsave(&ctx->prng_lock, flags);
1552 +
1553 + err = -EFAULT;
1554 + if (ctx->flags & PRNG_NEED_RESET)
1555 + goto done;
1556 +
1557 + /*
1558 + * If the FIXED_SIZE flag is on, only return whole blocks of
1559 + * pseudo random data
1560 + */
1561 + err = -EINVAL;
1562 + if (ctx->flags & PRNG_FIXED_SIZE) {
1563 + if (nbytes < DEFAULT_BLK_SZ)
1564 + goto done;
1565 + byte_count = DEFAULT_BLK_SZ;
1566 + }
1567 +
1568 + err = byte_count;
1569 +
1570 + dbgprint(KERN_CRIT "getting %d random bytes for context %p\n",byte_count, ctx);
1571 +
1572 +
1573 +remainder:
1574 + if (ctx->rand_data_valid == DEFAULT_BLK_SZ) {
1575 + if (_get_more_prng_bytes(ctx) < 0) {
1576 + memset(buf, 0, nbytes);
1577 + err = -EFAULT;
1578 + goto done;
1579 + }
1580 + }
1581 +
1582 + /*
1583 + * Copy up to the next whole block size
1584 + */
1585 + if (byte_count < DEFAULT_BLK_SZ) {
1586 + for (;ctx->rand_data_valid < DEFAULT_BLK_SZ; ctx->rand_data_valid++) {
1587 + *ptr = ctx->rand_data[ctx->rand_data_valid];
1588 + ptr++;
1589 + byte_count--;
1590 + if (byte_count == 0)
1591 + goto done;
1592 + }
1593 + }
1594 +
1595 + /*
1596 + * Now copy whole blocks
1597 + */
1598 + for(;byte_count >= DEFAULT_BLK_SZ; byte_count -= DEFAULT_BLK_SZ) {
1599 + if (_get_more_prng_bytes(ctx) < 0) {
1600 + memset(buf, 0, nbytes);
1601 + err = -1;
1602 + goto done;
1603 + }
1604 + memcpy(ptr, ctx->rand_data, DEFAULT_BLK_SZ);
1605 + ctx->rand_data_valid += DEFAULT_BLK_SZ;
1606 + ptr += DEFAULT_BLK_SZ;
1607 + }
1608 +
1609 + /*
1610 + * Now copy any extra partial data
1611 + */
1612 + if (byte_count)
1613 + goto remainder;
1614 +
1615 +done:
1616 + spin_unlock_irqrestore(&ctx->prng_lock, flags);
1617 + dbgprint(KERN_CRIT "returning %d from get_prng_bytes in context %p\n",err, ctx);
1618 + return err;
1619 +}
1620 +EXPORT_SYMBOL_GPL(get_prng_bytes);
1621 +
1622 +struct prng_context *alloc_prng_context(void)
1623 +{
1624 + struct prng_context *ctx=kzalloc(sizeof(struct prng_context), GFP_KERNEL);
1625 +
1626 + spin_lock_init(&ctx->prng_lock);
1627 +
1628 + if (reset_prng_context(ctx, NULL, NULL, NULL, NULL)) {
1629 + kfree(ctx);
1630 + ctx = NULL;
1631 + }
1632 +
1633 + dbgprint(KERN_CRIT "returning context %p\n",ctx);
1634 + return ctx;
1635 +}
1636 +
1637 +EXPORT_SYMBOL_GPL(alloc_prng_context);
1638 +
1639 +void free_prng_context(struct prng_context *ctx)
1640 +{
1641 + crypto_free_blkcipher(ctx->tfm);
1642 + kfree(ctx);
1643 +}
1644 +EXPORT_SYMBOL_GPL(free_prng_context);
1645 +
1646 +int reset_prng_context(struct prng_context *ctx,
1647 + unsigned char *key, unsigned char *iv,
1648 + unsigned char *V, unsigned char *DT)
1649 +{
1650 + int ret;
1651 + int iv_len;
1652 + int rc = -EFAULT;
1653 +
1654 + spin_lock(&ctx->prng_lock);
1655 + ctx->flags |= PRNG_NEED_RESET;
1656 +
1657 + if (key)
1658 + memcpy(ctx->prng_key,key,strlen(ctx->prng_key));
1659 + else
1660 + ctx->prng_key = DEFAULT_PRNG_KEY;
1661 +
1662 + if (iv)
1663 + memcpy(ctx->prng_iv,iv, strlen(ctx->prng_iv));
1664 + else
1665 + ctx->prng_iv = DEFAULT_PRNG_IV;
1666 +
1667 + if (V)
1668 + memcpy(ctx->V,V,DEFAULT_BLK_SZ);
1669 + else
1670 + memcpy(ctx->V,DEFAULT_V_SEED,DEFAULT_BLK_SZ);
1671 +
1672 + if (DT)
1673 + memcpy(ctx->DT, DT, DEFAULT_BLK_SZ);
1674 + else
1675 + memset(ctx->DT, 0, DEFAULT_BLK_SZ);
1676 +
1677 + memset(ctx->rand_data,0,DEFAULT_BLK_SZ);
1678 + memset(ctx->last_rand_data,0,DEFAULT_BLK_SZ);
1679 +
1680 + if (ctx->tfm)
1681 + crypto_free_blkcipher(ctx->tfm);
1682 +
1683 + ctx->tfm = crypto_alloc_blkcipher("rfc3686(ctr(aes))",0,0);
1684 + if (!ctx->tfm) {
1685 + dbgprint(KERN_CRIT "Failed to alloc crypto tfm for context %p\n",ctx->tfm);
1686 + goto out;
1687 + }
1688 +
1689 + ctx->rand_data_valid = DEFAULT_BLK_SZ;
1690 +
1691 + ret = crypto_blkcipher_setkey(ctx->tfm, ctx->prng_key, strlen(ctx->prng_key));
1692 + if (ret) {
1693 + dbgprint(KERN_CRIT "PRNG: setkey() failed flags=%x\n",
1694 + crypto_blkcipher_get_flags(ctx->tfm));
1695 + crypto_free_blkcipher(ctx->tfm);
1696 + goto out;
1697 + }
1698 +
1699 + iv_len = crypto_blkcipher_ivsize(ctx->tfm);
1700 + if (iv_len) {
1701 + crypto_blkcipher_set_iv(ctx->tfm, ctx->prng_iv, iv_len);
1702 + }
1703 + rc = 0;
1704 + ctx->flags &= ~PRNG_NEED_RESET;
1705 +out:
1706 + spin_unlock(&ctx->prng_lock);
1707 +
1708 + return rc;
1709 +
1710 +}
1711 +EXPORT_SYMBOL_GPL(reset_prng_context);
1712 +
1713 +/* Module initalization */
1714 +static int __init prng_mod_init(void)
1715 +{
1716 +
1717 +#ifdef TEST_PRNG_ON_START
1718 + int i;
1719 + unsigned char tmpbuf[DEFAULT_BLK_SZ];
1720 +
1721 + struct prng_context *ctx = alloc_prng_context();
1722 + if (ctx == NULL)
1723 + return -EFAULT;
1724 + for (i=0;i<16;i++) {
1725 + if (get_prng_bytes(tmpbuf, DEFAULT_BLK_SZ, ctx) < 0) {
1726 + free_prng_context(ctx);
1727 + return -EFAULT;
1728 + }
1729 + }
1730 + free_prng_context(ctx);
1731 +#endif
1732 +
1733 + return 0;
1734 +}
1735 +
1736 +static void __exit prng_mod_fini(void)
1737 +{
1738 + return;
1739 +}
1740 +
1741 +MODULE_LICENSE("GPL");
1742 +MODULE_DESCRIPTION("Software Pseudo Random Number Generator");
1743 +MODULE_AUTHOR("Neil Horman <nhorman@tuxdriver.com>");
1744 +module_param(dbg, int, 0);
1745 +MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");
1746 +module_init(prng_mod_init);
1747 +module_exit(prng_mod_fini);
1748 --- /dev/null
1749 +++ b/crypto/prng.h
1750 @@ -0,0 +1,27 @@
1751 +/*
1752 + * PRNG: Pseudo Random Number Generator
1753 + *
1754 + * (C) Neil Horman <nhorman@tuxdriver.com>
1755 + *
1756 + * This program is free software; you can redistribute it and/or modify it
1757 + * under the terms of the GNU General Public License as published by the
1758 + * Free Software Foundation; either version 2 of the License, or (at your
1759 + * any later version.
1760 + *
1761 + *
1762 + */
1763 +
1764 +#ifndef _PRNG_H_
1765 +#define _PRNG_H_
1766 +struct prng_context;
1767 +
1768 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx);
1769 +struct prng_context *alloc_prng_context(void);
1770 +int reset_prng_context(struct prng_context *ctx,
1771 + unsigned char *key, unsigned char *iv,
1772 + unsigned char *V,
1773 + unsigned char *DT);
1774 +void free_prng_context(struct prng_context *ctx);
1775 +
1776 +#endif
1777 +
1778 --- /dev/null
1779 +++ b/crypto/ripemd.h
1780 @@ -0,0 +1,43 @@
1781 +/*
1782 + * Common values for RIPEMD algorithms
1783 + */
1784 +
1785 +#ifndef _CRYPTO_RMD_H
1786 +#define _CRYPTO_RMD_H
1787 +
1788 +#define RMD128_DIGEST_SIZE 16
1789 +#define RMD128_BLOCK_SIZE 64
1790 +
1791 +#define RMD160_DIGEST_SIZE 20
1792 +#define RMD160_BLOCK_SIZE 64
1793 +
1794 +#define RMD256_DIGEST_SIZE 32
1795 +#define RMD256_BLOCK_SIZE 64
1796 +
1797 +#define RMD320_DIGEST_SIZE 40
1798 +#define RMD320_BLOCK_SIZE 64
1799 +
1800 +/* initial values */
1801 +#define RMD_H0 0x67452301UL
1802 +#define RMD_H1 0xefcdab89UL
1803 +#define RMD_H2 0x98badcfeUL
1804 +#define RMD_H3 0x10325476UL
1805 +#define RMD_H4 0xc3d2e1f0UL
1806 +#define RMD_H5 0x76543210UL
1807 +#define RMD_H6 0xfedcba98UL
1808 +#define RMD_H7 0x89abcdefUL
1809 +#define RMD_H8 0x01234567UL
1810 +#define RMD_H9 0x3c2d1e0fUL
1811 +
1812 +/* constants */
1813 +#define RMD_K1 0x00000000UL
1814 +#define RMD_K2 0x5a827999UL
1815 +#define RMD_K3 0x6ed9eba1UL
1816 +#define RMD_K4 0x8f1bbcdcUL
1817 +#define RMD_K5 0xa953fd4eUL
1818 +#define RMD_K6 0x50a28be6UL
1819 +#define RMD_K7 0x5c4dd124UL
1820 +#define RMD_K8 0x6d703ef3UL
1821 +#define RMD_K9 0x7a6d76e9UL
1822 +
1823 +#endif
1824 --- /dev/null
1825 +++ b/crypto/rmd128.c
1826 @@ -0,0 +1,325 @@
1827 +/*
1828 + * Cryptographic API.
1829 + *
1830 + * RIPEMD-128 - RACE Integrity Primitives Evaluation Message Digest.
1831 + *
1832 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
1833 + *
1834 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
1835 + *
1836 + * This program is free software; you can redistribute it and/or modify it
1837 + * under the terms of the GNU General Public License as published by the Free
1838 + * Software Foundation; either version 2 of the License, or (at your option)
1839 + * any later version.
1840 + *
1841 + */
1842 +#include <linux/init.h>
1843 +#include <linux/module.h>
1844 +#include <linux/mm.h>
1845 +#include <linux/crypto.h>
1846 +#include <linux/cryptohash.h>
1847 +#include <linux/types.h>
1848 +#include <asm/byteorder.h>
1849 +
1850 +#include "ripemd.h"
1851 +
1852 +struct rmd128_ctx {
1853 + u64 byte_count;
1854 + u32 state[4];
1855 + __le32 buffer[16];
1856 +};
1857 +
1858 +#define K1 RMD_K1
1859 +#define K2 RMD_K2
1860 +#define K3 RMD_K3
1861 +#define K4 RMD_K4
1862 +#define KK1 RMD_K6
1863 +#define KK2 RMD_K7
1864 +#define KK3 RMD_K8
1865 +#define KK4 RMD_K1
1866 +
1867 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
1868 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
1869 +#define F3(x, y, z) ((x | ~y) ^ z)
1870 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
1871 +
1872 +#define ROUND(a, b, c, d, f, k, x, s) { \
1873 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
1874 + (a) = rol32((a), (s)); \
1875 +}
1876 +
1877 +static void rmd128_transform(u32 *state, const __le32 *in)
1878 +{
1879 + u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd;
1880 +
1881 + /* Initialize left lane */
1882 + aa = state[0];
1883 + bb = state[1];
1884 + cc = state[2];
1885 + dd = state[3];
1886 +
1887 + /* Initialize right lane */
1888 + aaa = state[0];
1889 + bbb = state[1];
1890 + ccc = state[2];
1891 + ddd = state[3];
1892 +
1893 + /* round 1: left lane */
1894 + ROUND(aa, bb, cc, dd, F1, K1, in[0], 11);
1895 + ROUND(dd, aa, bb, cc, F1, K1, in[1], 14);
1896 + ROUND(cc, dd, aa, bb, F1, K1, in[2], 15);
1897 + ROUND(bb, cc, dd, aa, F1, K1, in[3], 12);
1898 + ROUND(aa, bb, cc, dd, F1, K1, in[4], 5);
1899 + ROUND(dd, aa, bb, cc, F1, K1, in[5], 8);
1900 + ROUND(cc, dd, aa, bb, F1, K1, in[6], 7);
1901 + ROUND(bb, cc, dd, aa, F1, K1, in[7], 9);
1902 + ROUND(aa, bb, cc, dd, F1, K1, in[8], 11);
1903 + ROUND(dd, aa, bb, cc, F1, K1, in[9], 13);
1904 + ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
1905 + ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
1906 + ROUND(aa, bb, cc, dd, F1, K1, in[12], 6);
1907 + ROUND(dd, aa, bb, cc, F1, K1, in[13], 7);
1908 + ROUND(cc, dd, aa, bb, F1, K1, in[14], 9);
1909 + ROUND(bb, cc, dd, aa, F1, K1, in[15], 8);
1910 +
1911 + /* round 2: left lane */
1912 + ROUND(aa, bb, cc, dd, F2, K2, in[7], 7);
1913 + ROUND(dd, aa, bb, cc, F2, K2, in[4], 6);
1914 + ROUND(cc, dd, aa, bb, F2, K2, in[13], 8);
1915 + ROUND(bb, cc, dd, aa, F2, K2, in[1], 13);
1916 + ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
1917 + ROUND(dd, aa, bb, cc, F2, K2, in[6], 9);
1918 + ROUND(cc, dd, aa, bb, F2, K2, in[15], 7);
1919 + ROUND(bb, cc, dd, aa, F2, K2, in[3], 15);
1920 + ROUND(aa, bb, cc, dd, F2, K2, in[12], 7);
1921 + ROUND(dd, aa, bb, cc, F2, K2, in[0], 12);
1922 + ROUND(cc, dd, aa, bb, F2, K2, in[9], 15);
1923 + ROUND(bb, cc, dd, aa, F2, K2, in[5], 9);
1924 + ROUND(aa, bb, cc, dd, F2, K2, in[2], 11);
1925 + ROUND(dd, aa, bb, cc, F2, K2, in[14], 7);
1926 + ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
1927 + ROUND(bb, cc, dd, aa, F2, K2, in[8], 12);
1928 +
1929 + /* round 3: left lane */
1930 + ROUND(aa, bb, cc, dd, F3, K3, in[3], 11);
1931 + ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
1932 + ROUND(cc, dd, aa, bb, F3, K3, in[14], 6);
1933 + ROUND(bb, cc, dd, aa, F3, K3, in[4], 7);
1934 + ROUND(aa, bb, cc, dd, F3, K3, in[9], 14);
1935 + ROUND(dd, aa, bb, cc, F3, K3, in[15], 9);
1936 + ROUND(cc, dd, aa, bb, F3, K3, in[8], 13);
1937 + ROUND(bb, cc, dd, aa, F3, K3, in[1], 15);
1938 + ROUND(aa, bb, cc, dd, F3, K3, in[2], 14);
1939 + ROUND(dd, aa, bb, cc, F3, K3, in[7], 8);
1940 + ROUND(cc, dd, aa, bb, F3, K3, in[0], 13);
1941 + ROUND(bb, cc, dd, aa, F3, K3, in[6], 6);
1942 + ROUND(aa, bb, cc, dd, F3, K3, in[13], 5);
1943 + ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
1944 + ROUND(cc, dd, aa, bb, F3, K3, in[5], 7);
1945 + ROUND(bb, cc, dd, aa, F3, K3, in[12], 5);
1946 +
1947 + /* round 4: left lane */
1948 + ROUND(aa, bb, cc, dd, F4, K4, in[1], 11);
1949 + ROUND(dd, aa, bb, cc, F4, K4, in[9], 12);
1950 + ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
1951 + ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
1952 + ROUND(aa, bb, cc, dd, F4, K4, in[0], 14);
1953 + ROUND(dd, aa, bb, cc, F4, K4, in[8], 15);
1954 + ROUND(cc, dd, aa, bb, F4, K4, in[12], 9);
1955 + ROUND(bb, cc, dd, aa, F4, K4, in[4], 8);
1956 + ROUND(aa, bb, cc, dd, F4, K4, in[13], 9);
1957 + ROUND(dd, aa, bb, cc, F4, K4, in[3], 14);
1958 + ROUND(cc, dd, aa, bb, F4, K4, in[7], 5);
1959 + ROUND(bb, cc, dd, aa, F4, K4, in[15], 6);
1960 + ROUND(aa, bb, cc, dd, F4, K4, in[14], 8);
1961 + ROUND(dd, aa, bb, cc, F4, K4, in[5], 6);
1962 + ROUND(cc, dd, aa, bb, F4, K4, in[6], 5);
1963 + ROUND(bb, cc, dd, aa, F4, K4, in[2], 12);
1964 +
1965 + /* round 1: right lane */
1966 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5], 8);
1967 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14], 9);
1968 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7], 9);
1969 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0], 11);
1970 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9], 13);
1971 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2], 15);
1972 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
1973 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4], 5);
1974 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13], 7);
1975 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6], 7);
1976 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15], 8);
1977 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8], 11);
1978 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1], 14);
1979 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
1980 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3], 12);
1981 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12], 6);
1982 +
1983 + /* round 2: right lane */
1984 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6], 9);
1985 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
1986 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3], 15);
1987 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7], 7);
1988 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0], 12);
1989 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13], 8);
1990 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5], 9);
1991 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
1992 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14], 7);
1993 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15], 7);
1994 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8], 12);
1995 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12], 7);
1996 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4], 6);
1997 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9], 15);
1998 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1], 13);
1999 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2], 11);
2000 +
2001 + /* round 3: right lane */
2002 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15], 9);
2003 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5], 7);
2004 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1], 15);
2005 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3], 11);
2006 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7], 8);
2007 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14], 6);
2008 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6], 6);
2009 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9], 14);
2010 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2011 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8], 13);
2012 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12], 5);
2013 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2], 14);
2014 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2015 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0], 13);
2016 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4], 7);
2017 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13], 5);
2018 +
2019 + /* round 4: right lane */
2020 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8], 15);
2021 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6], 5);
2022 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4], 8);
2023 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1], 11);
2024 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3], 14);
2025 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2026 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15], 6);
2027 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0], 14);
2028 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5], 6);
2029 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12], 9);
2030 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2], 12);
2031 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13], 9);
2032 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9], 12);
2033 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7], 5);
2034 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2035 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14], 8);
2036 +
2037 + /* combine results */
2038 + ddd += cc + state[1]; /* final result for state[0] */
2039 + state[1] = state[2] + dd + aaa;
2040 + state[2] = state[3] + aa + bbb;
2041 + state[3] = state[0] + bb + ccc;
2042 + state[0] = ddd;
2043 +
2044 + return;
2045 +}
2046 +
2047 +static void rmd128_init(struct crypto_tfm *tfm)
2048 +{
2049 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2050 +
2051 + rctx->byte_count = 0;
2052 +
2053 + rctx->state[0] = RMD_H0;
2054 + rctx->state[1] = RMD_H1;
2055 + rctx->state[2] = RMD_H2;
2056 + rctx->state[3] = RMD_H3;
2057 +
2058 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2059 +}
2060 +
2061 +static void rmd128_update(struct crypto_tfm *tfm, const u8 *data,
2062 + unsigned int len)
2063 +{
2064 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2065 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2066 +
2067 + rctx->byte_count += len;
2068 +
2069 + /* Enough space in buffer? If so copy and we're done */
2070 + if (avail > len) {
2071 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2072 + data, len);
2073 + return;
2074 + }
2075 +
2076 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2077 + data, avail);
2078 +
2079 + rmd128_transform(rctx->state, rctx->buffer);
2080 + data += avail;
2081 + len -= avail;
2082 +
2083 + while (len >= sizeof(rctx->buffer)) {
2084 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2085 + rmd128_transform(rctx->state, rctx->buffer);
2086 + data += sizeof(rctx->buffer);
2087 + len -= sizeof(rctx->buffer);
2088 + }
2089 +
2090 + memcpy(rctx->buffer, data, len);
2091 +}
2092 +
2093 +/* Add padding and return the message digest. */
2094 +static void rmd128_final(struct crypto_tfm *tfm, u8 *out)
2095 +{
2096 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2097 + u32 i, index, padlen;
2098 + __le64 bits;
2099 + __le32 *dst = (__le32 *)out;
2100 + static const u8 padding[64] = { 0x80, };
2101 +
2102 + bits = cpu_to_le64(rctx->byte_count << 3);
2103 +
2104 + /* Pad out to 56 mod 64 */
2105 + index = rctx->byte_count & 0x3f;
2106 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2107 + rmd128_update(tfm, padding, padlen);
2108 +
2109 + /* Append length */
2110 + rmd128_update(tfm, (const u8 *)&bits, sizeof(bits));
2111 +
2112 + /* Store state in digest */
2113 + for (i = 0; i < 4; i++)
2114 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2115 +
2116 + /* Wipe context */
2117 + memset(rctx, 0, sizeof(*rctx));
2118 +}
2119 +
2120 +static struct crypto_alg alg = {
2121 + .cra_name = "rmd128",
2122 + .cra_driver_name = "rmd128",
2123 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2124 + .cra_blocksize = RMD128_BLOCK_SIZE,
2125 + .cra_ctxsize = sizeof(struct rmd128_ctx),
2126 + .cra_module = THIS_MODULE,
2127 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2128 + .cra_u = { .digest = {
2129 + .dia_digestsize = RMD128_DIGEST_SIZE,
2130 + .dia_init = rmd128_init,
2131 + .dia_update = rmd128_update,
2132 + .dia_final = rmd128_final } }
2133 +};
2134 +
2135 +static int __init rmd128_mod_init(void)
2136 +{
2137 + return crypto_register_alg(&alg);
2138 +}
2139 +
2140 +static void __exit rmd128_mod_fini(void)
2141 +{
2142 + crypto_unregister_alg(&alg);
2143 +}
2144 +
2145 +module_init(rmd128_mod_init);
2146 +module_exit(rmd128_mod_fini);
2147 +
2148 +MODULE_LICENSE("GPL");
2149 +MODULE_DESCRIPTION("RIPEMD-128 Message Digest");
2150 +
2151 +MODULE_ALIAS("rmd128");
2152 --- /dev/null
2153 +++ b/crypto/rmd160.c
2154 @@ -0,0 +1,369 @@
2155 +/*
2156 + * Cryptographic API.
2157 + *
2158 + * RIPEMD-160 - RACE Integrity Primitives Evaluation Message Digest.
2159 + *
2160 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2161 + *
2162 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2163 + *
2164 + * This program is free software; you can redistribute it and/or modify it
2165 + * under the terms of the GNU General Public License as published by the Free
2166 + * Software Foundation; either version 2 of the License, or (at your option)
2167 + * any later version.
2168 + *
2169 + */
2170 +#include <linux/init.h>
2171 +#include <linux/module.h>
2172 +#include <linux/mm.h>
2173 +#include <linux/crypto.h>
2174 +#include <linux/cryptohash.h>
2175 +#include <linux/types.h>
2176 +#include <asm/byteorder.h>
2177 +
2178 +#include "ripemd.h"
2179 +
2180 +struct rmd160_ctx {
2181 + u64 byte_count;
2182 + u32 state[5];
2183 + __le32 buffer[16];
2184 +};
2185 +
2186 +#define K1 RMD_K1
2187 +#define K2 RMD_K2
2188 +#define K3 RMD_K3
2189 +#define K4 RMD_K4
2190 +#define K5 RMD_K5
2191 +#define KK1 RMD_K6
2192 +#define KK2 RMD_K7
2193 +#define KK3 RMD_K8
2194 +#define KK4 RMD_K9
2195 +#define KK5 RMD_K1
2196 +
2197 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2198 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2199 +#define F3(x, y, z) ((x | ~y) ^ z)
2200 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2201 +#define F5(x, y, z) (x ^ (y | ~z))
2202 +
2203 +#define ROUND(a, b, c, d, e, f, k, x, s) { \
2204 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2205 + (a) = rol32((a), (s)) + (e); \
2206 + (c) = rol32((c), 10); \
2207 +}
2208 +
2209 +static void rmd160_transform(u32 *state, const __le32 *in)
2210 +{
2211 + u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee;
2212 +
2213 + /* Initialize left lane */
2214 + aa = state[0];
2215 + bb = state[1];
2216 + cc = state[2];
2217 + dd = state[3];
2218 + ee = state[4];
2219 +
2220 + /* Initialize right lane */
2221 + aaa = state[0];
2222 + bbb = state[1];
2223 + ccc = state[2];
2224 + ddd = state[3];
2225 + eee = state[4];
2226 +
2227 + /* round 1: left lane */
2228 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
2229 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
2230 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
2231 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
2232 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
2233 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
2234 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
2235 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
2236 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);
2237 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);
2238 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2239 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2240 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);
2241 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);
2242 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);
2243 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);
2244 +
2245 + /* round 2: left lane" */
2246 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[7], 7);
2247 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[4], 6);
2248 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[13], 8);
2249 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[1], 13);
2250 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
2251 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[6], 9);
2252 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[15], 7);
2253 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[3], 15);
2254 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[12], 7);
2255 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[0], 12);
2256 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[9], 15);
2257 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[5], 9);
2258 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[2], 11);
2259 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[14], 7);
2260 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
2261 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[8], 12);
2262 +
2263 + /* round 3: left lane" */
2264 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
2265 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
2266 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
2267 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
2268 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
2269 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
2270 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
2271 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
2272 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[2], 14);
2273 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[7], 8);
2274 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[0], 13);
2275 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[6], 6);
2276 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[13], 5);
2277 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
2278 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[5], 7);
2279 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[12], 5);
2280 +
2281 + /* round 4: left lane" */
2282 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11);
2283 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12);
2284 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
2285 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
2286 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14);
2287 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15);
2288 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9);
2289 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8);
2290 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9);
2291 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[3], 14);
2292 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[7], 5);
2293 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[15], 6);
2294 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[14], 8);
2295 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[5], 6);
2296 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[6], 5);
2297 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[2], 12);
2298 +
2299 + /* round 5: left lane" */
2300 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[4], 9);
2301 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[0], 15);
2302 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[5], 5);
2303 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[9], 11);
2304 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[7], 6);
2305 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[12], 8);
2306 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[2], 13);
2307 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
2308 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[14], 5);
2309 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[1], 12);
2310 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[3], 13);
2311 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[8], 14);
2312 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
2313 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[6], 8);
2314 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[15], 5);
2315 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[13], 6);
2316 +
2317 + /* round 1: right lane */
2318 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8);
2319 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9);
2320 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9);
2321 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11);
2322 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13);
2323 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15);
2324 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
2325 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5);
2326 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13], 7);
2327 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6], 7);
2328 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15], 8);
2329 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8], 11);
2330 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1], 14);
2331 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
2332 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3], 12);
2333 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12], 6);
2334 +
2335 + /* round 2: right lane */
2336 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6], 9);
2337 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
2338 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3], 15);
2339 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7], 7);
2340 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0], 12);
2341 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13], 8);
2342 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5], 9);
2343 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
2344 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14], 7);
2345 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15], 7);
2346 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8], 12);
2347 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12], 7);
2348 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4], 6);
2349 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9], 15);
2350 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1], 13);
2351 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2], 11);
2352 +
2353 + /* round 3: right lane */
2354 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15], 9);
2355 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5], 7);
2356 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1], 15);
2357 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3], 11);
2358 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7], 8);
2359 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14], 6);
2360 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6], 6);
2361 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9], 14);
2362 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
2363 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8], 13);
2364 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12], 5);
2365 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2], 14);
2366 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
2367 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0], 13);
2368 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4], 7);
2369 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13], 5);
2370 +
2371 + /* round 4: right lane */
2372 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8], 15);
2373 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6], 5);
2374 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4], 8);
2375 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1], 11);
2376 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3], 14);
2377 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
2378 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15], 6);
2379 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0], 14);
2380 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5], 6);
2381 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12], 9);
2382 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2], 12);
2383 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13], 9);
2384 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9], 12);
2385 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7], 5);
2386 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
2387 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14], 8);
2388 +
2389 + /* round 5: right lane */
2390 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);
2391 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);
2392 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
2393 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);
2394 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);
2395 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);
2396 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);
2397 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);
2398 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);
2399 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);
2400 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);
2401 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);
2402 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);
2403 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);
2404 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);
2405 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
2406 +
2407 + /* combine results */
2408 + ddd += cc + state[1]; /* final result for state[0] */
2409 + state[1] = state[2] + dd + eee;
2410 + state[2] = state[3] + ee + aaa;
2411 + state[3] = state[4] + aa + bbb;
2412 + state[4] = state[0] + bb + ccc;
2413 + state[0] = ddd;
2414 +
2415 + return;
2416 +}
2417 +
2418 +static void rmd160_init(struct crypto_tfm *tfm)
2419 +{
2420 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2421 +
2422 + rctx->byte_count = 0;
2423 +
2424 + rctx->state[0] = RMD_H0;
2425 + rctx->state[1] = RMD_H1;
2426 + rctx->state[2] = RMD_H2;
2427 + rctx->state[3] = RMD_H3;
2428 + rctx->state[4] = RMD_H4;
2429 +
2430 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2431 +}
2432 +
2433 +static void rmd160_update(struct crypto_tfm *tfm, const u8 *data,
2434 + unsigned int len)
2435 +{
2436 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2437 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2438 +
2439 + rctx->byte_count += len;
2440 +
2441 + /* Enough space in buffer? If so copy and we're done */
2442 + if (avail > len) {
2443 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2444 + data, len);
2445 + return;
2446 + }
2447 +
2448 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2449 + data, avail);
2450 +
2451 + rmd160_transform(rctx->state, rctx->buffer);
2452 + data += avail;
2453 + len -= avail;
2454 +
2455 + while (len >= sizeof(rctx->buffer)) {
2456 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2457 + rmd160_transform(rctx->state, rctx->buffer);
2458 + data += sizeof(rctx->buffer);
2459 + len -= sizeof(rctx->buffer);
2460 + }
2461 +
2462 + memcpy(rctx->buffer, data, len);
2463 +}
2464 +
2465 +/* Add padding and return the message digest. */
2466 +static void rmd160_final(struct crypto_tfm *tfm, u8 *out)
2467 +{
2468 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2469 + u32 i, index, padlen;
2470 + __le64 bits;
2471 + __le32 *dst = (__le32 *)out;
2472 + static const u8 padding[64] = { 0x80, };
2473 +
2474 + bits = cpu_to_le64(rctx->byte_count << 3);
2475 +
2476 + /* Pad out to 56 mod 64 */
2477 + index = rctx->byte_count & 0x3f;
2478 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2479 + rmd160_update(tfm, padding, padlen);
2480 +
2481 + /* Append length */
2482 + rmd160_update(tfm, (const u8 *)&bits, sizeof(bits));
2483 +
2484 + /* Store state in digest */
2485 + for (i = 0; i < 5; i++)
2486 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2487 +
2488 + /* Wipe context */
2489 + memset(rctx, 0, sizeof(*rctx));
2490 +}
2491 +
2492 +static struct crypto_alg alg = {
2493 + .cra_name = "rmd160",
2494 + .cra_driver_name = "rmd160",
2495 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2496 + .cra_blocksize = RMD160_BLOCK_SIZE,
2497 + .cra_ctxsize = sizeof(struct rmd160_ctx),
2498 + .cra_module = THIS_MODULE,
2499 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2500 + .cra_u = { .digest = {
2501 + .dia_digestsize = RMD160_DIGEST_SIZE,
2502 + .dia_init = rmd160_init,
2503 + .dia_update = rmd160_update,
2504 + .dia_final = rmd160_final } }
2505 +};
2506 +
2507 +static int __init rmd160_mod_init(void)
2508 +{
2509 + return crypto_register_alg(&alg);
2510 +}
2511 +
2512 +static void __exit rmd160_mod_fini(void)
2513 +{
2514 + crypto_unregister_alg(&alg);
2515 +}
2516 +
2517 +module_init(rmd160_mod_init);
2518 +module_exit(rmd160_mod_fini);
2519 +
2520 +MODULE_LICENSE("GPL");
2521 +MODULE_DESCRIPTION("RIPEMD-160 Message Digest");
2522 +
2523 +MODULE_ALIAS("rmd160");
2524 --- /dev/null
2525 +++ b/crypto/rmd256.c
2526 @@ -0,0 +1,344 @@
2527 +/*
2528 + * Cryptographic API.
2529 + *
2530 + * RIPEMD-256 - RACE Integrity Primitives Evaluation Message Digest.
2531 + *
2532 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2533 + *
2534 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2535 + *
2536 + * This program is free software; you can redistribute it and/or modify it
2537 + * under the terms of the GNU General Public License as published by the Free
2538 + * Software Foundation; either version 2 of the License, or (at your option)
2539 + * any later version.
2540 + *
2541 + */
2542 +#include <linux/init.h>
2543 +#include <linux/module.h>
2544 +#include <linux/mm.h>
2545 +#include <linux/crypto.h>
2546 +#include <linux/cryptohash.h>
2547 +#include <linux/types.h>
2548 +#include <asm/byteorder.h>
2549 +
2550 +#include "ripemd.h"
2551 +
2552 +struct rmd256_ctx {
2553 + u64 byte_count;
2554 + u32 state[8];
2555 + __le32 buffer[16];
2556 +};
2557 +
2558 +#define K1 RMD_K1
2559 +#define K2 RMD_K2
2560 +#define K3 RMD_K3
2561 +#define K4 RMD_K4
2562 +#define KK1 RMD_K6
2563 +#define KK2 RMD_K7
2564 +#define KK3 RMD_K8
2565 +#define KK4 RMD_K1
2566 +
2567 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2568 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2569 +#define F3(x, y, z) ((x | ~y) ^ z)
2570 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2571 +
2572 +#define ROUND(a, b, c, d, f, k, x, s) { \
2573 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2574 + (a) = rol32((a), (s)); \
2575 +}
2576 +
2577 +static void rmd256_transform(u32 *state, const __le32 *in)
2578 +{
2579 + u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd, tmp;
2580 +
2581 + /* Initialize left lane */
2582 + aa = state[0];
2583 + bb = state[1];
2584 + cc = state[2];
2585 + dd = state[3];
2586 +
2587 + /* Initialize right lane */
2588 + aaa = state[4];
2589 + bbb = state[5];
2590 + ccc = state[6];
2591 + ddd = state[7];
2592 +
2593 + /* round 1: left lane */
2594 + ROUND(aa, bb, cc, dd, F1, K1, in[0], 11);
2595 + ROUND(dd, aa, bb, cc, F1, K1, in[1], 14);
2596 + ROUND(cc, dd, aa, bb, F1, K1, in[2], 15);
2597 + ROUND(bb, cc, dd, aa, F1, K1, in[3], 12);
2598 + ROUND(aa, bb, cc, dd, F1, K1, in[4], 5);
2599 + ROUND(dd, aa, bb, cc, F1, K1, in[5], 8);
2600 + ROUND(cc, dd, aa, bb, F1, K1, in[6], 7);
2601 + ROUND(bb, cc, dd, aa, F1, K1, in[7], 9);
2602 + ROUND(aa, bb, cc, dd, F1, K1, in[8], 11);
2603 + ROUND(dd, aa, bb, cc, F1, K1, in[9], 13);
2604 + ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
2605 + ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
2606 + ROUND(aa, bb, cc, dd, F1, K1, in[12], 6);
2607 + ROUND(dd, aa, bb, cc, F1, K1, in[13], 7);
2608 + ROUND(cc, dd, aa, bb, F1, K1, in[14], 9);
2609 + ROUND(bb, cc, dd, aa, F1, K1, in[15], 8);
2610 +
2611 + /* round 1: right lane */
2612 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5], 8);
2613 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14], 9);
2614 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7], 9);
2615 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0], 11);
2616 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9], 13);
2617 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2], 15);
2618 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
2619 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4], 5);
2620 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13], 7);
2621 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6], 7);
2622 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15], 8);
2623 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8], 11);
2624 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1], 14);
2625 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
2626 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3], 12);
2627 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12], 6);
2628 +
2629 + /* Swap contents of "a" registers */
2630 + tmp = aa; aa = aaa; aaa = tmp;
2631 +
2632 + /* round 2: left lane */
2633 + ROUND(aa, bb, cc, dd, F2, K2, in[7], 7);
2634 + ROUND(dd, aa, bb, cc, F2, K2, in[4], 6);
2635 + ROUND(cc, dd, aa, bb, F2, K2, in[13], 8);
2636 + ROUND(bb, cc, dd, aa, F2, K2, in[1], 13);
2637 + ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
2638 + ROUND(dd, aa, bb, cc, F2, K2, in[6], 9);
2639 + ROUND(cc, dd, aa, bb, F2, K2, in[15], 7);
2640 + ROUND(bb, cc, dd, aa, F2, K2, in[3], 15);
2641 + ROUND(aa, bb, cc, dd, F2, K2, in[12], 7);
2642 + ROUND(dd, aa, bb, cc, F2, K2, in[0], 12);
2643 + ROUND(cc, dd, aa, bb, F2, K2, in[9], 15);
2644 + ROUND(bb, cc, dd, aa, F2, K2, in[5], 9);
2645 + ROUND(aa, bb, cc, dd, F2, K2, in[2], 11);
2646 + ROUND(dd, aa, bb, cc, F2, K2, in[14], 7);
2647 + ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
2648 + ROUND(bb, cc, dd, aa, F2, K2, in[8], 12);
2649 +
2650 + /* round 2: right lane */
2651 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6], 9);
2652 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
2653 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3], 15);
2654 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7], 7);
2655 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0], 12);
2656 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13], 8);
2657 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5], 9);
2658 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
2659 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14], 7);
2660 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15], 7);
2661 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8], 12);
2662 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12], 7);
2663 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4], 6);
2664 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9], 15);
2665 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1], 13);
2666 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2], 11);
2667 +
2668 + /* Swap contents of "b" registers */
2669 + tmp = bb; bb = bbb; bbb = tmp;
2670 +
2671 + /* round 3: left lane */
2672 + ROUND(aa, bb, cc, dd, F3, K3, in[3], 11);
2673 + ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
2674 + ROUND(cc, dd, aa, bb, F3, K3, in[14], 6);
2675 + ROUND(bb, cc, dd, aa, F3, K3, in[4], 7);
2676 + ROUND(aa, bb, cc, dd, F3, K3, in[9], 14);
2677 + ROUND(dd, aa, bb, cc, F3, K3, in[15], 9);
2678 + ROUND(cc, dd, aa, bb, F3, K3, in[8], 13);
2679 + ROUND(bb, cc, dd, aa, F3, K3, in[1], 15);
2680 + ROUND(aa, bb, cc, dd, F3, K3, in[2], 14);
2681 + ROUND(dd, aa, bb, cc, F3, K3, in[7], 8);
2682 + ROUND(cc, dd, aa, bb, F3, K3, in[0], 13);
2683 + ROUND(bb, cc, dd, aa, F3, K3, in[6], 6);
2684 + ROUND(aa, bb, cc, dd, F3, K3, in[13], 5);
2685 + ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
2686 + ROUND(cc, dd, aa, bb, F3, K3, in[5], 7);
2687 + ROUND(bb, cc, dd, aa, F3, K3, in[12], 5);
2688 +
2689 + /* round 3: right lane */
2690 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15], 9);
2691 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5], 7);
2692 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1], 15);
2693 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3], 11);
2694 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7], 8);
2695 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14], 6);
2696 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6], 6);
2697 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9], 14);
2698 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2699 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8], 13);
2700 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12], 5);
2701 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2], 14);
2702 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2703 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0], 13);
2704 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4], 7);
2705 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13], 5);
2706 +
2707 + /* Swap contents of "c" registers */
2708 + tmp = cc; cc = ccc; ccc = tmp;
2709 +
2710 + /* round 4: left lane */
2711 + ROUND(aa, bb, cc, dd, F4, K4, in[1], 11);
2712 + ROUND(dd, aa, bb, cc, F4, K4, in[9], 12);
2713 + ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
2714 + ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
2715 + ROUND(aa, bb, cc, dd, F4, K4, in[0], 14);
2716 + ROUND(dd, aa, bb, cc, F4, K4, in[8], 15);
2717 + ROUND(cc, dd, aa, bb, F4, K4, in[12], 9);
2718 + ROUND(bb, cc, dd, aa, F4, K4, in[4], 8);
2719 + ROUND(aa, bb, cc, dd, F4, K4, in[13], 9);
2720 + ROUND(dd, aa, bb, cc, F4, K4, in[3], 14);
2721 + ROUND(cc, dd, aa, bb, F4, K4, in[7], 5);
2722 + ROUND(bb, cc, dd, aa, F4, K4, in[15], 6);
2723 + ROUND(aa, bb, cc, dd, F4, K4, in[14], 8);
2724 + ROUND(dd, aa, bb, cc, F4, K4, in[5], 6);
2725 + ROUND(cc, dd, aa, bb, F4, K4, in[6], 5);
2726 + ROUND(bb, cc, dd, aa, F4, K4, in[2], 12);
2727 +
2728 + /* round 4: right lane */
2729 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8], 15);
2730 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6], 5);
2731 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4], 8);
2732 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1], 11);
2733 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3], 14);
2734 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2735 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15], 6);
2736 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0], 14);
2737 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5], 6);
2738 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12], 9);
2739 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2], 12);
2740 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13], 9);
2741 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9], 12);
2742 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7], 5);
2743 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2744 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14], 8);
2745 +
2746 + /* Swap contents of "d" registers */
2747 + tmp = dd; dd = ddd; ddd = tmp;
2748 +
2749 + /* combine results */
2750 + state[0] += aa;
2751 + state[1] += bb;
2752 + state[2] += cc;
2753 + state[3] += dd;
2754 + state[4] += aaa;
2755 + state[5] += bbb;
2756 + state[6] += ccc;
2757 + state[7] += ddd;
2758 +
2759 + return;
2760 +}
2761 +
2762 +static void rmd256_init(struct crypto_tfm *tfm)
2763 +{
2764 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2765 +
2766 + rctx->byte_count = 0;
2767 +
2768 + rctx->state[0] = RMD_H0;
2769 + rctx->state[1] = RMD_H1;
2770 + rctx->state[2] = RMD_H2;
2771 + rctx->state[3] = RMD_H3;
2772 + rctx->state[4] = RMD_H5;
2773 + rctx->state[5] = RMD_H6;
2774 + rctx->state[6] = RMD_H7;
2775 + rctx->state[7] = RMD_H8;
2776 +
2777 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2778 +}
2779 +
2780 +static void rmd256_update(struct crypto_tfm *tfm, const u8 *data,
2781 + unsigned int len)
2782 +{
2783 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2784 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2785 +
2786 + rctx->byte_count += len;
2787 +
2788 + /* Enough space in buffer? If so copy and we're done */
2789 + if (avail > len) {
2790 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2791 + data, len);
2792 + return;
2793 + }
2794 +
2795 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2796 + data, avail);
2797 +
2798 + rmd256_transform(rctx->state, rctx->buffer);
2799 + data += avail;
2800 + len -= avail;
2801 +
2802 + while (len >= sizeof(rctx->buffer)) {
2803 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2804 + rmd256_transform(rctx->state, rctx->buffer);
2805 + data += sizeof(rctx->buffer);
2806 + len -= sizeof(rctx->buffer);
2807 + }
2808 +
2809 + memcpy(rctx->buffer, data, len);
2810 +}
2811 +
2812 +/* Add padding and return the message digest. */
2813 +static void rmd256_final(struct crypto_tfm *tfm, u8 *out)
2814 +{
2815 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2816 + u32 i, index, padlen;
2817 + __le64 bits;
2818 + __le32 *dst = (__le32 *)out;
2819 + static const u8 padding[64] = { 0x80, };
2820 +
2821 + bits = cpu_to_le64(rctx->byte_count << 3);
2822 +
2823 + /* Pad out to 56 mod 64 */
2824 + index = rctx->byte_count & 0x3f;
2825 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2826 + rmd256_update(tfm, padding, padlen);
2827 +
2828 + /* Append length */
2829 + rmd256_update(tfm, (const u8 *)&bits, sizeof(bits));
2830 +
2831 + /* Store state in digest */
2832 + for (i = 0; i < 8; i++)
2833 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2834 +
2835 + /* Wipe context */
2836 + memset(rctx, 0, sizeof(*rctx));
2837 +}
2838 +
2839 +static struct crypto_alg alg = {
2840 + .cra_name = "rmd256",
2841 + .cra_driver_name = "rmd256",
2842 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2843 + .cra_blocksize = RMD256_BLOCK_SIZE,
2844 + .cra_ctxsize = sizeof(struct rmd256_ctx),
2845 + .cra_module = THIS_MODULE,
2846 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2847 + .cra_u = { .digest = {
2848 + .dia_digestsize = RMD256_DIGEST_SIZE,
2849 + .dia_init = rmd256_init,
2850 + .dia_update = rmd256_update,
2851 + .dia_final = rmd256_final } }
2852 +};
2853 +
2854 +static int __init rmd256_mod_init(void)
2855 +{
2856 + return crypto_register_alg(&alg);
2857 +}
2858 +
2859 +static void __exit rmd256_mod_fini(void)
2860 +{
2861 + crypto_unregister_alg(&alg);
2862 +}
2863 +
2864 +module_init(rmd256_mod_init);
2865 +module_exit(rmd256_mod_fini);
2866 +
2867 +MODULE_LICENSE("GPL");
2868 +MODULE_DESCRIPTION("RIPEMD-256 Message Digest");
2869 +
2870 +MODULE_ALIAS("rmd256");
2871 --- /dev/null
2872 +++ b/crypto/rmd320.c
2873 @@ -0,0 +1,393 @@
2874 +/*
2875 + * Cryptographic API.
2876 + *
2877 + * RIPEMD-320 - RACE Integrity Primitives Evaluation Message Digest.
2878 + *
2879 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2880 + *
2881 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2882 + *
2883 + * This program is free software; you can redistribute it and/or modify it
2884 + * under the terms of the GNU General Public License as published by the Free
2885 + * Software Foundation; either version 2 of the License, or (at your option)
2886 + * any later version.
2887 + *
2888 + */
2889 +#include <linux/init.h>
2890 +#include <linux/module.h>
2891 +#include <linux/mm.h>
2892 +#include <linux/crypto.h>
2893 +#include <linux/cryptohash.h>
2894 +#include <linux/types.h>
2895 +#include <asm/byteorder.h>
2896 +
2897 +#include "ripemd.h"
2898 +
2899 +struct rmd320_ctx {
2900 + u64 byte_count;
2901 + u32 state[10];
2902 + __le32 buffer[16];
2903 +};
2904 +
2905 +#define K1 RMD_K1
2906 +#define K2 RMD_K2
2907 +#define K3 RMD_K3
2908 +#define K4 RMD_K4
2909 +#define K5 RMD_K5
2910 +#define KK1 RMD_K6
2911 +#define KK2 RMD_K7
2912 +#define KK3 RMD_K8
2913 +#define KK4 RMD_K9
2914 +#define KK5 RMD_K1
2915 +
2916 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2917 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2918 +#define F3(x, y, z) ((x | ~y) ^ z)
2919 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2920 +#define F5(x, y, z) (x ^ (y | ~z))
2921 +
2922 +#define ROUND(a, b, c, d, e, f, k, x, s) { \
2923 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2924 + (a) = rol32((a), (s)) + (e); \
2925 + (c) = rol32((c), 10); \
2926 +}
2927 +
2928 +static void rmd320_transform(u32 *state, const __le32 *in)
2929 +{
2930 + u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee, tmp;
2931 +
2932 + /* Initialize left lane */
2933 + aa = state[0];
2934 + bb = state[1];
2935 + cc = state[2];
2936 + dd = state[3];
2937 + ee = state[4];
2938 +
2939 + /* Initialize right lane */
2940 + aaa = state[5];
2941 + bbb = state[6];
2942 + ccc = state[7];
2943 + ddd = state[8];
2944 + eee = state[9];
2945 +
2946 + /* round 1: left lane */
2947 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
2948 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
2949 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
2950 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
2951 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
2952 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
2953 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
2954 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
2955 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);
2956 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);
2957 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2958 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2959 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);
2960 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);
2961 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);
2962 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);
2963 +
2964 + /* round 1: right lane */
2965 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8);
2966 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9);
2967 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9);
2968 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11);
2969 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13);
2970 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15);
2971 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
2972 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5);
2973 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13], 7);
2974 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6], 7);
2975 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15], 8);
2976 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8], 11);
2977 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1], 14);
2978 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
2979 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3], 12);
2980 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12], 6);
2981 +
2982 + /* Swap contents of "a" registers */
2983 + tmp = aa; aa = aaa; aaa = tmp;
2984 +
2985 + /* round 2: left lane" */
2986 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[7], 7);
2987 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[4], 6);
2988 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[13], 8);
2989 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[1], 13);
2990 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
2991 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[6], 9);
2992 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[15], 7);
2993 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[3], 15);
2994 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[12], 7);
2995 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[0], 12);
2996 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[9], 15);
2997 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[5], 9);
2998 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[2], 11);
2999 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[14], 7);
3000 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
3001 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[8], 12);
3002 +
3003 + /* round 2: right lane */
3004 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6], 9);
3005 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
3006 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3], 15);
3007 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7], 7);
3008 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0], 12);
3009 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13], 8);
3010 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5], 9);
3011 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
3012 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14], 7);
3013 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15], 7);
3014 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8], 12);
3015 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12], 7);
3016 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4], 6);
3017 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9], 15);
3018 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1], 13);
3019 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2], 11);
3020 +
3021 + /* Swap contents of "b" registers */
3022 + tmp = bb; bb = bbb; bbb = tmp;
3023 +
3024 + /* round 3: left lane" */
3025 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
3026 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
3027 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
3028 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
3029 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
3030 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
3031 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
3032 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
3033 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[2], 14);
3034 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[7], 8);
3035 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[0], 13);
3036 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[6], 6);
3037 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[13], 5);
3038 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
3039 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[5], 7);
3040 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[12], 5);
3041 +
3042 + /* round 3: right lane */
3043 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15], 9);
3044 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5], 7);
3045 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1], 15);
3046 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3], 11);
3047 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7], 8);
3048 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14], 6);
3049 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6], 6);
3050 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9], 14);
3051 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
3052 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8], 13);
3053 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12], 5);
3054 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2], 14);
3055 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
3056 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0], 13);
3057 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4], 7);
3058 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13], 5);
3059 +
3060 + /* Swap contents of "c" registers */
3061 + tmp = cc; cc = ccc; ccc = tmp;
3062 +
3063 + /* round 4: left lane" */
3064 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11);
3065 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12);
3066 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
3067 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
3068 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14);
3069 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15);
3070 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9);
3071 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8);
3072 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9);
3073 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[3], 14);
3074 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[7], 5);
3075 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[15], 6);
3076 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[14], 8);
3077 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[5], 6);
3078 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[6], 5);
3079 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[2], 12);
3080 +
3081 + /* round 4: right lane */
3082 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8], 15);
3083 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6], 5);
3084 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4], 8);
3085 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1], 11);
3086 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3], 14);
3087 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
3088 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15], 6);
3089 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0], 14);
3090 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5], 6);
3091 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12], 9);
3092 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2], 12);
3093 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13], 9);
3094 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9], 12);
3095 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7], 5);
3096 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
3097 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14], 8);
3098 +
3099 + /* Swap contents of "d" registers */
3100 + tmp = dd; dd = ddd; ddd = tmp;
3101 +
3102 + /* round 5: left lane" */
3103 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[4], 9);
3104 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[0], 15);
3105 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[5], 5);
3106 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[9], 11);
3107 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[7], 6);
3108 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[12], 8);
3109 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[2], 13);
3110 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
3111 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[14], 5);
3112 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[1], 12);
3113 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[3], 13);
3114 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[8], 14);
3115 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
3116 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[6], 8);
3117 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[15], 5);
3118 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[13], 6);
3119 +
3120 + /* round 5: right lane */
3121 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);
3122 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);
3123 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
3124 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);
3125 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);
3126 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);
3127 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);
3128 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);
3129 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);
3130 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);
3131 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);
3132 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);
3133 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);
3134 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);
3135 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);
3136 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
3137 +
3138 + /* Swap contents of "e" registers */
3139 + tmp = ee; ee = eee; eee = tmp;
3140 +
3141 + /* combine results */
3142 + state[0] += aa;
3143 + state[1] += bb;
3144 + state[2] += cc;
3145 + state[3] += dd;
3146 + state[4] += ee;
3147 + state[5] += aaa;
3148 + state[6] += bbb;
3149 + state[7] += ccc;
3150 + state[8] += ddd;
3151 + state[9] += eee;
3152 +
3153 + return;
3154 +}
3155 +
3156 +static void rmd320_init(struct crypto_tfm *tfm)
3157 +{
3158 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3159 +
3160 + rctx->byte_count = 0;
3161 +
3162 + rctx->state[0] = RMD_H0;
3163 + rctx->state[1] = RMD_H1;
3164 + rctx->state[2] = RMD_H2;
3165 + rctx->state[3] = RMD_H3;
3166 + rctx->state[4] = RMD_H4;
3167 + rctx->state[5] = RMD_H5;
3168 + rctx->state[6] = RMD_H6;
3169 + rctx->state[7] = RMD_H7;
3170 + rctx->state[8] = RMD_H8;
3171 + rctx->state[9] = RMD_H9;
3172 +
3173 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
3174 +}
3175 +
3176 +static void rmd320_update(struct crypto_tfm *tfm, const u8 *data,
3177 + unsigned int len)
3178 +{
3179 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3180 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
3181 +
3182 + rctx->byte_count += len;
3183 +
3184 + /* Enough space in buffer? If so copy and we're done */
3185 + if (avail > len) {
3186 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3187 + data, len);
3188 + return;
3189 + }
3190 +
3191 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3192 + data, avail);
3193 +
3194 + rmd320_transform(rctx->state, rctx->buffer);
3195 + data += avail;
3196 + len -= avail;
3197 +
3198 + while (len >= sizeof(rctx->buffer)) {
3199 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
3200 + rmd320_transform(rctx->state, rctx->buffer);
3201 + data += sizeof(rctx->buffer);
3202 + len -= sizeof(rctx->buffer);
3203 + }
3204 +
3205 + memcpy(rctx->buffer, data, len);
3206 +}
3207 +
3208 +/* Add padding and return the message digest. */
3209 +static void rmd320_final(struct crypto_tfm *tfm, u8 *out)
3210 +{
3211 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3212 + u32 i, index, padlen;
3213 + __le64 bits;
3214 + __le32 *dst = (__le32 *)out;
3215 + static const u8 padding[64] = { 0x80, };
3216 +
3217 + bits = cpu_to_le64(rctx->byte_count << 3);
3218 +
3219 + /* Pad out to 56 mod 64 */
3220 + index = rctx->byte_count & 0x3f;
3221 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
3222 + rmd320_update(tfm, padding, padlen);
3223 +
3224 + /* Append length */
3225 + rmd320_update(tfm, (const u8 *)&bits, sizeof(bits));
3226 +
3227 + /* Store state in digest */
3228 + for (i = 0; i < 10; i++)
3229 + dst[i] = cpu_to_le32p(&rctx->state[i]);
3230 +
3231 + /* Wipe context */
3232 + memset(rctx, 0, sizeof(*rctx));
3233 +}
3234 +
3235 +static struct crypto_alg alg = {
3236 + .cra_name = "rmd320",
3237 + .cra_driver_name = "rmd320",
3238 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
3239 + .cra_blocksize = RMD320_BLOCK_SIZE,
3240 + .cra_ctxsize = sizeof(struct rmd320_ctx),
3241 + .cra_module = THIS_MODULE,
3242 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
3243 + .cra_u = { .digest = {
3244 + .dia_digestsize = RMD320_DIGEST_SIZE,
3245 + .dia_init = rmd320_init,
3246 + .dia_update = rmd320_update,
3247 + .dia_final = rmd320_final } }
3248 +};
3249 +
3250 +static int __init rmd320_mod_init(void)
3251 +{
3252 + return crypto_register_alg(&alg);
3253 +}
3254 +
3255 +static void __exit rmd320_mod_fini(void)
3256 +{
3257 + crypto_unregister_alg(&alg);
3258 +}
3259 +
3260 +module_init(rmd320_mod_init);
3261 +module_exit(rmd320_mod_fini);
3262 +
3263 +MODULE_LICENSE("GPL");
3264 +MODULE_DESCRIPTION("RIPEMD-320 Message Digest");
3265 +
3266 +MODULE_ALIAS("rmd320");
3267 --- a/crypto/tcrypt.c
3268 +++ b/crypto/tcrypt.c
3269 @@ -13,15 +13,9 @@
3270 * Software Foundation; either version 2 of the License, or (at your option)
3271 * any later version.
3272 *
3273 - * 2007-11-13 Added GCM tests
3274 - * 2007-11-13 Added AEAD support
3275 - * 2007-11-06 Added SHA-224 and SHA-224-HMAC tests
3276 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3277 - * 2004-08-09 Added cipher speed tests (Reyk Floeter <reyk@vantronix.net>)
3278 - * 2003-09-14 Rewritten by Kartikey Mahendra Bhatt
3279 - *
3280 */
3281
3282 +#include <crypto/hash.h>
3283 #include <linux/err.h>
3284 #include <linux/init.h>
3285 #include <linux/module.h>
3286 @@ -30,7 +24,6 @@
3287 #include <linux/scatterlist.h>
3288 #include <linux/string.h>
3289 #include <linux/crypto.h>
3290 -#include <linux/highmem.h>
3291 #include <linux/moduleparam.h>
3292 #include <linux/jiffies.h>
3293 #include <linux/timex.h>
3294 @@ -38,7 +31,7 @@
3295 #include "tcrypt.h"
3296
3297 /*
3298 - * Need to kmalloc() memory for testing kmap().
3299 + * Need to kmalloc() memory for testing.
3300 */
3301 #define TVMEMSIZE 16384
3302 #define XBUFSIZE 32768
3303 @@ -46,7 +39,7 @@
3304 /*
3305 * Indexes into the xbuf to simulate cross-page access.
3306 */
3307 -#define IDX1 37
3308 +#define IDX1 32
3309 #define IDX2 32400
3310 #define IDX3 1
3311 #define IDX4 8193
3312 @@ -83,7 +76,8 @@
3313 "blowfish", "twofish", "serpent", "sha384", "sha512", "md4", "aes",
3314 "cast6", "arc4", "michael_mic", "deflate", "crc32c", "tea", "xtea",
3315 "khazad", "wp512", "wp384", "wp256", "tnepres", "xeta", "fcrypt",
3316 - "camellia", "seed", "salsa20", "lzo", "cts", NULL
3317 + "camellia", "seed", "salsa20", "rmd128", "rmd160", "rmd256", "rmd320",
3318 + "lzo", "cts", NULL
3319 };
3320
3321 static void hexdump(unsigned char *buf, unsigned int len)
3322 @@ -110,22 +104,30 @@
3323 unsigned int i, j, k, temp;
3324 struct scatterlist sg[8];
3325 char result[64];
3326 - struct crypto_hash *tfm;
3327 - struct hash_desc desc;
3328 + struct crypto_ahash *tfm;
3329 + struct ahash_request *req;
3330 + struct tcrypt_result tresult;
3331 int ret;
3332 void *hash_buff;
3333
3334 printk("\ntesting %s\n", algo);
3335
3336 - tfm = crypto_alloc_hash(algo, 0, CRYPTO_ALG_ASYNC);
3337 + init_completion(&tresult.completion);
3338 +
3339 + tfm = crypto_alloc_ahash(algo, 0, 0);
3340 if (IS_ERR(tfm)) {
3341 printk("failed to load transform for %s: %ld\n", algo,
3342 PTR_ERR(tfm));
3343 return;
3344 }
3345
3346 - desc.tfm = tfm;
3347 - desc.flags = 0;
3348 + req = ahash_request_alloc(tfm, GFP_KERNEL);
3349 + if (!req) {
3350 + printk(KERN_ERR "failed to allocate request for %s\n", algo);
3351 + goto out_noreq;
3352 + }
3353 + ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
3354 + tcrypt_complete, &tresult);
3355
3356 for (i = 0; i < tcount; i++) {
3357 printk("test %u:\n", i + 1);
3358 @@ -139,8 +141,9 @@
3359 sg_init_one(&sg[0], hash_buff, template[i].psize);
3360
3361 if (template[i].ksize) {
3362 - ret = crypto_hash_setkey(tfm, template[i].key,
3363 - template[i].ksize);
3364 + crypto_ahash_clear_flags(tfm, ~0);
3365 + ret = crypto_ahash_setkey(tfm, template[i].key,
3366 + template[i].ksize);
3367 if (ret) {
3368 printk("setkey() failed ret=%d\n", ret);
3369 kfree(hash_buff);
3370 @@ -148,17 +151,30 @@
3371 }
3372 }
3373
3374 - ret = crypto_hash_digest(&desc, sg, template[i].psize, result);
3375 - if (ret) {
3376 + ahash_request_set_crypt(req, sg, result, template[i].psize);
3377 + ret = crypto_ahash_digest(req);
3378 + switch (ret) {
3379 + case 0:
3380 + break;
3381 + case -EINPROGRESS:
3382 + case -EBUSY:
3383 + ret = wait_for_completion_interruptible(
3384 + &tresult.completion);
3385 + if (!ret && !(ret = tresult.err)) {
3386 + INIT_COMPLETION(tresult.completion);
3387 + break;
3388 + }
3389 + /* fall through */
3390 + default:
3391 printk("digest () failed ret=%d\n", ret);
3392 kfree(hash_buff);
3393 goto out;
3394 }
3395
3396 - hexdump(result, crypto_hash_digestsize(tfm));
3397 + hexdump(result, crypto_ahash_digestsize(tfm));
3398 printk("%s\n",
3399 memcmp(result, template[i].digest,
3400 - crypto_hash_digestsize(tfm)) ?
3401 + crypto_ahash_digestsize(tfm)) ?
3402 "fail" : "pass");
3403 kfree(hash_buff);
3404 }
3405 @@ -187,8 +203,9 @@
3406 }
3407
3408 if (template[i].ksize) {
3409 - ret = crypto_hash_setkey(tfm, template[i].key,
3410 - template[i].ksize);
3411 + crypto_ahash_clear_flags(tfm, ~0);
3412 + ret = crypto_ahash_setkey(tfm, template[i].key,
3413 + template[i].ksize);
3414
3415 if (ret) {
3416 printk("setkey() failed ret=%d\n", ret);
3417 @@ -196,29 +213,44 @@
3418 }
3419 }
3420
3421 - ret = crypto_hash_digest(&desc, sg, template[i].psize,
3422 - result);
3423 - if (ret) {
3424 + ahash_request_set_crypt(req, sg, result,
3425 + template[i].psize);
3426 + ret = crypto_ahash_digest(req);
3427 + switch (ret) {
3428 + case 0:
3429 + break;
3430 + case -EINPROGRESS:
3431 + case -EBUSY:
3432 + ret = wait_for_completion_interruptible(
3433 + &tresult.completion);
3434 + if (!ret && !(ret = tresult.err)) {
3435 + INIT_COMPLETION(tresult.completion);
3436 + break;
3437 + }
3438 + /* fall through */
3439 + default:
3440 printk("digest () failed ret=%d\n", ret);
3441 goto out;
3442 }
3443
3444 - hexdump(result, crypto_hash_digestsize(tfm));
3445 + hexdump(result, crypto_ahash_digestsize(tfm));
3446 printk("%s\n",
3447 memcmp(result, template[i].digest,
3448 - crypto_hash_digestsize(tfm)) ?
3449 + crypto_ahash_digestsize(tfm)) ?
3450 "fail" : "pass");
3451 }
3452 }
3453
3454 out:
3455 - crypto_free_hash(tfm);
3456 + ahash_request_free(req);
3457 +out_noreq:
3458 + crypto_free_ahash(tfm);
3459 }
3460
3461 static void test_aead(char *algo, int enc, struct aead_testvec *template,
3462 unsigned int tcount)
3463 {
3464 - unsigned int ret, i, j, k, temp;
3465 + unsigned int ret, i, j, k, n, temp;
3466 char *q;
3467 struct crypto_aead *tfm;
3468 char *key;
3469 @@ -344,13 +376,12 @@
3470 goto next_one;
3471 }
3472
3473 - q = kmap(sg_page(&sg[0])) + sg[0].offset;
3474 + q = input;
3475 hexdump(q, template[i].rlen);
3476
3477 printk(KERN_INFO "enc/dec: %s\n",
3478 memcmp(q, template[i].result,
3479 template[i].rlen) ? "fail" : "pass");
3480 - kunmap(sg_page(&sg[0]));
3481 next_one:
3482 if (!template[i].key)
3483 kfree(key);
3484 @@ -360,7 +391,6 @@
3485 }
3486
3487 printk(KERN_INFO "\ntesting %s %s across pages (chunking)\n", algo, e);
3488 - memset(xbuf, 0, XBUFSIZE);
3489 memset(axbuf, 0, XBUFSIZE);
3490
3491 for (i = 0, j = 0; i < tcount; i++) {
3492 @@ -388,6 +418,7 @@
3493 goto out;
3494 }
3495
3496 + memset(xbuf, 0, XBUFSIZE);
3497 sg_init_table(sg, template[i].np);
3498 for (k = 0, temp = 0; k < template[i].np; k++) {
3499 memcpy(&xbuf[IDX[k]],
3500 @@ -450,7 +481,7 @@
3501
3502 for (k = 0, temp = 0; k < template[i].np; k++) {
3503 printk(KERN_INFO "page %u\n", k);
3504 - q = kmap(sg_page(&sg[k])) + sg[k].offset;
3505 + q = &axbuf[IDX[k]];
3506 hexdump(q, template[i].tap[k]);
3507 printk(KERN_INFO "%s\n",
3508 memcmp(q, template[i].result + temp,
3509 @@ -459,8 +490,15 @@
3510 0 : authsize)) ?
3511 "fail" : "pass");
3512
3513 + for (n = 0; q[template[i].tap[k] + n]; n++)
3514 + ;
3515 + if (n) {
3516 + printk("Result buffer corruption %u "
3517 + "bytes:\n", n);
3518 + hexdump(&q[template[i].tap[k]], n);
3519 + }
3520 +
3521 temp += template[i].tap[k];
3522 - kunmap(sg_page(&sg[k]));
3523 }
3524 }
3525 }
3526 @@ -473,7 +511,7 @@
3527 static void test_cipher(char *algo, int enc,
3528 struct cipher_testvec *template, unsigned int tcount)
3529 {
3530 - unsigned int ret, i, j, k, temp;
3531 + unsigned int ret, i, j, k, n, temp;
3532 char *q;
3533 struct crypto_ablkcipher *tfm;
3534 struct ablkcipher_request *req;
3535 @@ -569,19 +607,17 @@
3536 goto out;
3537 }
3538
3539 - q = kmap(sg_page(&sg[0])) + sg[0].offset;
3540 + q = data;
3541 hexdump(q, template[i].rlen);
3542
3543 printk("%s\n",
3544 memcmp(q, template[i].result,
3545 template[i].rlen) ? "fail" : "pass");
3546 - kunmap(sg_page(&sg[0]));
3547 }
3548 kfree(data);
3549 }
3550
3551 printk("\ntesting %s %s across pages (chunking)\n", algo, e);
3552 - memset(xbuf, 0, XBUFSIZE);
3553
3554 j = 0;
3555 for (i = 0; i < tcount; i++) {
3556 @@ -596,6 +632,7 @@
3557 printk("test %u (%d bit key):\n",
3558 j, template[i].klen * 8);
3559
3560 + memset(xbuf, 0, XBUFSIZE);
3561 crypto_ablkcipher_clear_flags(tfm, ~0);
3562 if (template[i].wk)
3563 crypto_ablkcipher_set_flags(
3564 @@ -649,14 +686,21 @@
3565 temp = 0;
3566 for (k = 0; k < template[i].np; k++) {
3567 printk("page %u\n", k);
3568 - q = kmap(sg_page(&sg[k])) + sg[k].offset;
3569 + q = &xbuf[IDX[k]];
3570 hexdump(q, template[i].tap[k]);
3571 printk("%s\n",
3572 memcmp(q, template[i].result + temp,
3573 template[i].tap[k]) ? "fail" :
3574 "pass");
3575 +
3576 + for (n = 0; q[template[i].tap[k] + n]; n++)
3577 + ;
3578 + if (n) {
3579 + printk("Result buffer corruption %u "
3580 + "bytes:\n", n);
3581 + hexdump(&q[template[i].tap[k]], n);
3582 + }
3583 temp += template[i].tap[k];
3584 - kunmap(sg_page(&sg[k]));
3585 }
3586 }
3587 }
3588 @@ -1172,6 +1216,14 @@
3589 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3590 DES3_EDE_DEC_TEST_VECTORS);
3591
3592 + test_cipher("cbc(des3_ede)", ENCRYPT,
3593 + des3_ede_cbc_enc_tv_template,
3594 + DES3_EDE_CBC_ENC_TEST_VECTORS);
3595 +
3596 + test_cipher("cbc(des3_ede)", DECRYPT,
3597 + des3_ede_cbc_dec_tv_template,
3598 + DES3_EDE_CBC_DEC_TEST_VECTORS);
3599 +
3600 test_hash("md4", md4_tv_template, MD4_TEST_VECTORS);
3601
3602 test_hash("sha224", sha224_tv_template, SHA224_TEST_VECTORS);
3603 @@ -1382,6 +1434,14 @@
3604 DES3_EDE_ENC_TEST_VECTORS);
3605 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3606 DES3_EDE_DEC_TEST_VECTORS);
3607 +
3608 + test_cipher("cbc(des3_ede)", ENCRYPT,
3609 + des3_ede_cbc_enc_tv_template,
3610 + DES3_EDE_CBC_ENC_TEST_VECTORS);
3611 +
3612 + test_cipher("cbc(des3_ede)", DECRYPT,
3613 + des3_ede_cbc_dec_tv_template,
3614 + DES3_EDE_CBC_DEC_TEST_VECTORS);
3615 break;
3616
3617 case 5:
3618 @@ -1550,7 +1610,7 @@
3619 case 29:
3620 test_hash("tgr128", tgr128_tv_template, TGR128_TEST_VECTORS);
3621 break;
3622 -
3623 +
3624 case 30:
3625 test_cipher("ecb(xeta)", ENCRYPT, xeta_enc_tv_template,
3626 XETA_ENC_TEST_VECTORS);
3627 @@ -1615,6 +1675,22 @@
3628 CTS_MODE_DEC_TEST_VECTORS);
3629 break;
3630
3631 + case 39:
3632 + test_hash("rmd128", rmd128_tv_template, RMD128_TEST_VECTORS);
3633 + break;
3634 +
3635 + case 40:
3636 + test_hash("rmd160", rmd160_tv_template, RMD160_TEST_VECTORS);
3637 + break;
3638 +
3639 + case 41:
3640 + test_hash("rmd256", rmd256_tv_template, RMD256_TEST_VECTORS);
3641 + break;
3642 +
3643 + case 42:
3644 + test_hash("rmd320", rmd320_tv_template, RMD320_TEST_VECTORS);
3645 + break;
3646 +
3647 case 100:
3648 test_hash("hmac(md5)", hmac_md5_tv_template,
3649 HMAC_MD5_TEST_VECTORS);
3650 @@ -1650,6 +1726,16 @@
3651 XCBC_AES_TEST_VECTORS);
3652 break;
3653
3654 + case 107:
3655 + test_hash("hmac(rmd128)", hmac_rmd128_tv_template,
3656 + HMAC_RMD128_TEST_VECTORS);
3657 + break;
3658 +
3659 + case 108:
3660 + test_hash("hmac(rmd160)", hmac_rmd160_tv_template,
3661 + HMAC_RMD160_TEST_VECTORS);
3662 + break;
3663 +
3664 case 200:
3665 test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0,
3666 speed_template_16_24_32);
3667 @@ -1788,6 +1874,22 @@
3668 test_hash_speed("sha224", sec, generic_hash_speed_template);
3669 if (mode > 300 && mode < 400) break;
3670
3671 + case 314:
3672 + test_hash_speed("rmd128", sec, generic_hash_speed_template);
3673 + if (mode > 300 && mode < 400) break;
3674 +
3675 + case 315:
3676 + test_hash_speed("rmd160", sec, generic_hash_speed_template);
3677 + if (mode > 300 && mode < 400) break;
3678 +
3679 + case 316:
3680 + test_hash_speed("rmd256", sec, generic_hash_speed_template);
3681 + if (mode > 300 && mode < 400) break;
3682 +
3683 + case 317:
3684 + test_hash_speed("rmd320", sec, generic_hash_speed_template);
3685 + if (mode > 300 && mode < 400) break;
3686 +
3687 case 399:
3688 break;
3689
3690 --- a/crypto/tcrypt.h
3691 +++ b/crypto/tcrypt.h
3692 @@ -13,12 +13,6 @@
3693 * Software Foundation; either version 2 of the License, or (at your option)
3694 * any later version.
3695 *
3696 - * 2007-11-13 Added GCM tests
3697 - * 2007-11-13 Added AEAD support
3698 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3699 - * 2004-08-09 Cipher speed tests by Reyk Floeter <reyk@vantronix.net>
3700 - * 2003-09-14 Changes by Kartikey Mahendra Bhatt
3701 - *
3702 */
3703 #ifndef _CRYPTO_TCRYPT_H
3704 #define _CRYPTO_TCRYPT_H
3705 @@ -168,6 +162,271 @@
3706 .digest = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55"
3707 "\xac\x49\xda\x2e\x21\x07\xb6\x7a",
3708 }
3709 +
3710 +};
3711 +
3712 +/*
3713 + * RIPEMD-128 test vectors from ISO/IEC 10118-3:2004(E)
3714 + */
3715 +#define RMD128_TEST_VECTORS 10
3716 +
3717 +static struct hash_testvec rmd128_tv_template[] = {
3718 + {
3719 + .digest = "\xcd\xf2\x62\x13\xa1\x50\xdc\x3e"
3720 + "\xcb\x61\x0f\x18\xf6\xb3\x8b\x46",
3721 + }, {
3722 + .plaintext = "a",
3723 + .psize = 1,
3724 + .digest = "\x86\xbe\x7a\xfa\x33\x9d\x0f\xc7"
3725 + "\xcf\xc7\x85\xe7\x2f\x57\x8d\x33",
3726 + }, {
3727 + .plaintext = "abc",
3728 + .psize = 3,
3729 + .digest = "\xc1\x4a\x12\x19\x9c\x66\xe4\xba"
3730 + "\x84\x63\x6b\x0f\x69\x14\x4c\x77",
3731 + }, {
3732 + .plaintext = "message digest",
3733 + .psize = 14,
3734 + .digest = "\x9e\x32\x7b\x3d\x6e\x52\x30\x62"
3735 + "\xaf\xc1\x13\x2d\x7d\xf9\xd1\xb8",
3736 + }, {
3737 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3738 + .psize = 26,
3739 + .digest = "\xfd\x2a\xa6\x07\xf7\x1d\xc8\xf5"
3740 + "\x10\x71\x49\x22\xb3\x71\x83\x4e",
3741 + }, {
3742 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3743 + "fghijklmnopqrstuvwxyz0123456789",
3744 + .psize = 62,
3745 + .digest = "\xd1\xe9\x59\xeb\x17\x9c\x91\x1f"
3746 + "\xae\xa4\x62\x4c\x60\xc5\xc7\x02",
3747 + }, {
3748 + .plaintext = "1234567890123456789012345678901234567890"
3749 + "1234567890123456789012345678901234567890",
3750 + .psize = 80,
3751 + .digest = "\x3f\x45\xef\x19\x47\x32\xc2\xdb"
3752 + "\xb2\xc4\xa2\xc7\x69\x79\x5f\xa3",
3753 + }, {
3754 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3755 + "hijkijkljklmklmnlmnomnopnopq",
3756 + .psize = 56,
3757 + .digest = "\xa1\xaa\x06\x89\xd0\xfa\xfa\x2d"
3758 + "\xdc\x22\xe8\x8b\x49\x13\x3a\x06",
3759 + .np = 2,
3760 + .tap = { 28, 28 },
3761 + }, {
3762 + .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3763 + "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3764 + "lmnopqrsmnopqrstnopqrstu",
3765 + .psize = 112,
3766 + .digest = "\xd4\xec\xc9\x13\xe1\xdf\x77\x6b"
3767 + "\xf4\x8d\xe9\xd5\x5b\x1f\x25\x46",
3768 + }, {
3769 + .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3770 + .psize = 32,
3771 + .digest = "\x13\xfc\x13\xe8\xef\xff\x34\x7d"
3772 + "\xe1\x93\xff\x46\xdb\xac\xcf\xd4",
3773 + }
3774 +};
3775 +
3776 +/*
3777 + * RIPEMD-160 test vectors from ISO/IEC 10118-3:2004(E)
3778 + */
3779 +#define RMD160_TEST_VECTORS 10
3780 +
3781 +static struct hash_testvec rmd160_tv_template[] = {
3782 + {
3783 + .digest = "\x9c\x11\x85\xa5\xc5\xe9\xfc\x54\x61\x28"
3784 + "\x08\x97\x7e\xe8\xf5\x48\xb2\x25\x8d\x31",
3785 + }, {
3786 + .plaintext = "a",
3787 + .psize = 1,
3788 + .digest = "\x0b\xdc\x9d\x2d\x25\x6b\x3e\xe9\xda\xae"
3789 + "\x34\x7b\xe6\xf4\xdc\x83\x5a\x46\x7f\xfe",
3790 + }, {
3791 + .plaintext = "abc",
3792 + .psize = 3,
3793 + .digest = "\x8e\xb2\x08\xf7\xe0\x5d\x98\x7a\x9b\x04"
3794 + "\x4a\x8e\x98\xc6\xb0\x87\xf1\x5a\x0b\xfc",
3795 + }, {
3796 + .plaintext = "message digest",
3797 + .psize = 14,
3798 + .digest = "\x5d\x06\x89\xef\x49\xd2\xfa\xe5\x72\xb8"
3799 + "\x81\xb1\x23\xa8\x5f\xfa\x21\x59\x5f\x36",
3800 + }, {
3801 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3802 + .psize = 26,
3803 + .digest = "\xf7\x1c\x27\x10\x9c\x69\x2c\x1b\x56\xbb"
3804 + "\xdc\xeb\x5b\x9d\x28\x65\xb3\x70\x8d\xbc",
3805 + }, {
3806 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3807 + "fghijklmnopqrstuvwxyz0123456789",
3808 + .psize = 62,
3809 + .digest = "\xb0\xe2\x0b\x6e\x31\x16\x64\x02\x86\xed"
3810 + "\x3a\x87\xa5\x71\x30\x79\xb2\x1f\x51\x89",
3811 + }, {
3812 + .plaintext = "1234567890123456789012345678901234567890"
3813 + "1234567890123456789012345678901234567890",
3814 + .psize = 80,
3815 + .digest = "\x9b\x75\x2e\x45\x57\x3d\x4b\x39\xf4\xdb"
3816 + "\xd3\x32\x3c\xab\x82\xbf\x63\x32\x6b\xfb",
3817 + }, {
3818 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3819 + "hijkijkljklmklmnlmnomnopnopq",
3820 + .psize = 56,
3821 + .digest = "\x12\xa0\x53\x38\x4a\x9c\x0c\x88\xe4\x05"
3822 + "\xa0\x6c\x27\xdc\xf4\x9a\xda\x62\xeb\x2b",
3823 + .np = 2,
3824 + .tap = { 28, 28 },
3825 + }, {
3826 + .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3827 + "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3828 + "lmnopqrsmnopqrstnopqrstu",
3829 + .psize = 112,
3830 + .digest = "\x6f\x3f\xa3\x9b\x6b\x50\x3c\x38\x4f\x91"
3831 + "\x9a\x49\xa7\xaa\x5c\x2c\x08\xbd\xfb\x45",
3832 + }, {
3833 + .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3834 + .psize = 32,
3835 + .digest = "\x94\xc2\x64\x11\x54\x04\xe6\x33\x79\x0d"
3836 + "\xfc\xc8\x7b\x58\x7d\x36\x77\x06\x7d\x9f",
3837 + }
3838 +};
3839 +
3840 +/*
3841 + * RIPEMD-256 test vectors
3842 + */
3843 +#define RMD256_TEST_VECTORS 8
3844 +
3845 +static struct hash_testvec rmd256_tv_template[] = {
3846 + {
3847 + .digest = "\x02\xba\x4c\x4e\x5f\x8e\xcd\x18"
3848 + "\x77\xfc\x52\xd6\x4d\x30\xe3\x7a"
3849 + "\x2d\x97\x74\xfb\x1e\x5d\x02\x63"
3850 + "\x80\xae\x01\x68\xe3\xc5\x52\x2d",
3851 + }, {
3852 + .plaintext = "a",
3853 + .psize = 1,
3854 + .digest = "\xf9\x33\x3e\x45\xd8\x57\xf5\xd9"
3855 + "\x0a\x91\xba\xb7\x0a\x1e\xba\x0c"
3856 + "\xfb\x1b\xe4\xb0\x78\x3c\x9a\xcf"
3857 + "\xcd\x88\x3a\x91\x34\x69\x29\x25",
3858 + }, {
3859 + .plaintext = "abc",
3860 + .psize = 3,
3861 + .digest = "\xaf\xbd\x6e\x22\x8b\x9d\x8c\xbb"
3862 + "\xce\xf5\xca\x2d\x03\xe6\xdb\xa1"
3863 + "\x0a\xc0\xbc\x7d\xcb\xe4\x68\x0e"
3864 + "\x1e\x42\xd2\xe9\x75\x45\x9b\x65",
3865 + }, {
3866 + .plaintext = "message digest",
3867 + .psize = 14,
3868 + .digest = "\x87\xe9\x71\x75\x9a\x1c\xe4\x7a"
3869 + "\x51\x4d\x5c\x91\x4c\x39\x2c\x90"
3870 + "\x18\xc7\xc4\x6b\xc1\x44\x65\x55"
3871 + "\x4a\xfc\xdf\x54\xa5\x07\x0c\x0e",
3872 + }, {
3873 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3874 + .psize = 26,
3875 + .digest = "\x64\x9d\x30\x34\x75\x1e\xa2\x16"
3876 + "\x77\x6b\xf9\xa1\x8a\xcc\x81\xbc"
3877 + "\x78\x96\x11\x8a\x51\x97\x96\x87"
3878 + "\x82\xdd\x1f\xd9\x7d\x8d\x51\x33",
3879 + }, {
3880 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3881 + "fghijklmnopqrstuvwxyz0123456789",
3882 + .psize = 62,
3883 + .digest = "\x57\x40\xa4\x08\xac\x16\xb7\x20"
3884 + "\xb8\x44\x24\xae\x93\x1c\xbb\x1f"
3885 + "\xe3\x63\xd1\xd0\xbf\x40\x17\xf1"
3886 + "\xa8\x9f\x7e\xa6\xde\x77\xa0\xb8",
3887 + }, {
3888 + .plaintext = "1234567890123456789012345678901234567890"
3889 + "1234567890123456789012345678901234567890",
3890 + .psize = 80,
3891 + .digest = "\x06\xfd\xcc\x7a\x40\x95\x48\xaa"
3892 + "\xf9\x13\x68\xc0\x6a\x62\x75\xb5"
3893 + "\x53\xe3\xf0\x99\xbf\x0e\xa4\xed"
3894 + "\xfd\x67\x78\xdf\x89\xa8\x90\xdd",
3895 + }, {
3896 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3897 + "hijkijkljklmklmnlmnomnopnopq",
3898 + .psize = 56,
3899 + .digest = "\x38\x43\x04\x55\x83\xaa\xc6\xc8"
3900 + "\xc8\xd9\x12\x85\x73\xe7\xa9\x80"
3901 + "\x9a\xfb\x2a\x0f\x34\xcc\xc3\x6e"
3902 + "\xa9\xe7\x2f\x16\xf6\x36\x8e\x3f",
3903 + .np = 2,
3904 + .tap = { 28, 28 },
3905 + }
3906 +};
3907 +
3908 +/*
3909 + * RIPEMD-320 test vectors
3910 + */
3911 +#define RMD320_TEST_VECTORS 8
3912 +
3913 +static struct hash_testvec rmd320_tv_template[] = {
3914 + {
3915 + .digest = "\x22\xd6\x5d\x56\x61\x53\x6c\xdc\x75\xc1"
3916 + "\xfd\xf5\xc6\xde\x7b\x41\xb9\xf2\x73\x25"
3917 + "\xeb\xc6\x1e\x85\x57\x17\x7d\x70\x5a\x0e"
3918 + "\xc8\x80\x15\x1c\x3a\x32\xa0\x08\x99\xb8",
3919 + }, {
3920 + .plaintext = "a",
3921 + .psize = 1,
3922 + .digest = "\xce\x78\x85\x06\x38\xf9\x26\x58\xa5\xa5"
3923 + "\x85\x09\x75\x79\x92\x6d\xda\x66\x7a\x57"
3924 + "\x16\x56\x2c\xfc\xf6\xfb\xe7\x7f\x63\x54"
3925 + "\x2f\x99\xb0\x47\x05\xd6\x97\x0d\xff\x5d",
3926 + }, {
3927 + .plaintext = "abc",
3928 + .psize = 3,
3929 + .digest = "\xde\x4c\x01\xb3\x05\x4f\x89\x30\xa7\x9d"
3930 + "\x09\xae\x73\x8e\x92\x30\x1e\x5a\x17\x08"
3931 + "\x5b\xef\xfd\xc1\xb8\xd1\x16\x71\x3e\x74"
3932 + "\xf8\x2f\xa9\x42\xd6\x4c\xdb\xc4\x68\x2d",
3933 + }, {
3934 + .plaintext = "message digest",
3935 + .psize = 14,
3936 + .digest = "\x3a\x8e\x28\x50\x2e\xd4\x5d\x42\x2f\x68"
3937 + "\x84\x4f\x9d\xd3\x16\xe7\xb9\x85\x33\xfa"
3938 + "\x3f\x2a\x91\xd2\x9f\x84\xd4\x25\xc8\x8d"
3939 + "\x6b\x4e\xff\x72\x7d\xf6\x6a\x7c\x01\x97",
3940 + }, {
3941 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3942 + .psize = 26,
3943 + .digest = "\xca\xbd\xb1\x81\x0b\x92\x47\x0a\x20\x93"
3944 + "\xaa\x6b\xce\x05\x95\x2c\x28\x34\x8c\xf4"
3945 + "\x3f\xf6\x08\x41\x97\x51\x66\xbb\x40\xed"
3946 + "\x23\x40\x04\xb8\x82\x44\x63\xe6\xb0\x09",
3947 + }, {
3948 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3949 + "fghijklmnopqrstuvwxyz0123456789",
3950 + .psize = 62,
3951 + .digest = "\xed\x54\x49\x40\xc8\x6d\x67\xf2\x50\xd2"
3952 + "\x32\xc3\x0b\x7b\x3e\x57\x70\xe0\xc6\x0c"
3953 + "\x8c\xb9\xa4\xca\xfe\x3b\x11\x38\x8a\xf9"
3954 + "\x92\x0e\x1b\x99\x23\x0b\x84\x3c\x86\xa4",
3955 + }, {
3956 + .plaintext = "1234567890123456789012345678901234567890"
3957 + "1234567890123456789012345678901234567890",
3958 + .psize = 80,
3959 + .digest = "\x55\x78\x88\xaf\x5f\x6d\x8e\xd6\x2a\xb6"
3960 + "\x69\x45\xc6\xd2\xa0\xa4\x7e\xcd\x53\x41"
3961 + "\xe9\x15\xeb\x8f\xea\x1d\x05\x24\x95\x5f"
3962 + "\x82\x5d\xc7\x17\xe4\xa0\x08\xab\x2d\x42",
3963 + }, {
3964 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3965 + "hijkijkljklmklmnlmnomnopnopq",
3966 + .psize = 56,
3967 + .digest = "\xd0\x34\xa7\x95\x0c\xf7\x22\x02\x1b\xa4"
3968 + "\xb8\x4d\xf7\x69\xa5\xde\x20\x60\xe2\x59"
3969 + "\xdf\x4c\x9b\xb4\xa4\x26\x8c\x0e\x93\x5b"
3970 + "\xbc\x74\x70\xa9\x69\xc9\xd0\x72\xa1\xac",
3971 + .np = 2,
3972 + .tap = { 28, 28 },
3973 + }
3974 };
3975
3976 /*
3977 @@ -817,6 +1076,168 @@
3978 };
3979
3980 /*
3981 + * HMAC-RIPEMD128 test vectors from RFC2286
3982 + */
3983 +#define HMAC_RMD128_TEST_VECTORS 7
3984 +
3985 +static struct hash_testvec hmac_rmd128_tv_template[] = {
3986 + {
3987 + .key = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
3988 + .ksize = 16,
3989 + .plaintext = "Hi There",
3990 + .psize = 8,
3991 + .digest = "\xfb\xf6\x1f\x94\x92\xaa\x4b\xbf"
3992 + "\x81\xc1\x72\xe8\x4e\x07\x34\xdb",
3993 + }, {
3994 + .key = "Jefe",
3995 + .ksize = 4,
3996 + .plaintext = "what do ya want for nothing?",
3997 + .psize = 28,
3998 + .digest = "\x87\x5f\x82\x88\x62\xb6\xb3\x34"
3999 + "\xb4\x27\xc5\x5f\x9f\x7f\xf0\x9b",
4000 + .np = 2,
4001 + .tap = { 14, 14 },
4002 + }, {
4003 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4004 + .ksize = 16,
4005 + .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4006 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4007 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4008 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4009 + .psize = 50,
4010 + .digest = "\x09\xf0\xb2\x84\x6d\x2f\x54\x3d"
4011 + "\xa3\x63\xcb\xec\x8d\x62\xa3\x8d",
4012 + }, {
4013 + .key = "\x01\x02\x03\x04\x05\x06\x07\x08"
4014 + "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4015 + "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4016 + .ksize = 25,
4017 + .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4018 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4019 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4020 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4021 + .psize = 50,
4022 + .digest = "\xbd\xbb\xd7\xcf\x03\xe4\x4b\x5a"
4023 + "\xa6\x0a\xf8\x15\xbe\x4d\x22\x94",
4024 + }, {
4025 + .key = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4026 + .ksize = 16,
4027 + .plaintext = "Test With Truncation",
4028 + .psize = 20,
4029 + .digest = "\xe7\x98\x08\xf2\x4b\x25\xfd\x03"
4030 + "\x1c\x15\x5f\x0d\x55\x1d\x9a\x3a",
4031 + }, {
4032 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4033 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4034 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4035 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4036 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4037 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4038 + "\xaa\xaa",
4039 + .ksize = 80,
4040 + .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4041 + .psize = 54,
4042 + .digest = "\xdc\x73\x29\x28\xde\x98\x10\x4a"
4043 + "\x1f\x59\xd3\x73\xc1\x50\xac\xbb",
4044 + }, {
4045 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4046 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4047 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4048 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4049 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4050 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4051 + "\xaa\xaa",
4052 + .ksize = 80,
4053 + .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4054 + "Block-Size Data",
4055 + .psize = 73,
4056 + .digest = "\x5c\x6b\xec\x96\x79\x3e\x16\xd4"
4057 + "\x06\x90\xc2\x37\x63\x5f\x30\xc5",
4058 + },
4059 +};
4060 +
4061 +/*
4062 + * HMAC-RIPEMD160 test vectors from RFC2286
4063 + */
4064 +#define HMAC_RMD160_TEST_VECTORS 7
4065 +
4066 +static struct hash_testvec hmac_rmd160_tv_template[] = {
4067 + {
4068 + .key = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
4069 + .ksize = 20,
4070 + .plaintext = "Hi There",
4071 + .psize = 8,
4072 + .digest = "\x24\xcb\x4b\xd6\x7d\x20\xfc\x1a\x5d\x2e"
4073 + "\xd7\x73\x2d\xcc\x39\x37\x7f\x0a\x56\x68",
4074 + }, {
4075 + .key = "Jefe",
4076 + .ksize = 4,
4077 + .plaintext = "what do ya want for nothing?",
4078 + .psize = 28,
4079 + .digest = "\xdd\xa6\xc0\x21\x3a\x48\x5a\x9e\x24\xf4"
4080 + "\x74\x20\x64\xa7\xf0\x33\xb4\x3c\x40\x69",
4081 + .np = 2,
4082 + .tap = { 14, 14 },
4083 + }, {
4084 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4085 + .ksize = 20,
4086 + .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4087 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4088 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4089 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4090 + .psize = 50,
4091 + .digest = "\xb0\xb1\x05\x36\x0d\xe7\x59\x96\x0a\xb4"
4092 + "\xf3\x52\x98\xe1\x16\xe2\x95\xd8\xe7\xc1",
4093 + }, {
4094 + .key = "\x01\x02\x03\x04\x05\x06\x07\x08"
4095 + "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4096 + "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4097 + .ksize = 25,
4098 + .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4099 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4100 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4101 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4102 + .psize = 50,
4103 + .digest = "\xd5\xca\x86\x2f\x4d\x21\xd5\xe6\x10\xe1"
4104 + "\x8b\x4c\xf1\xbe\xb9\x7a\x43\x65\xec\xf4",
4105 + }, {
4106 + .key = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4107 + .ksize = 20,
4108 + .plaintext = "Test With Truncation",
4109 + .psize = 20,
4110 + .digest = "\x76\x19\x69\x39\x78\xf9\x1d\x90\x53\x9a"
4111 + "\xe7\x86\x50\x0f\xf3\xd8\xe0\x51\x8e\x39",
4112 + }, {
4113 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4114 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4115 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4116 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4117 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4118 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4119 + "\xaa\xaa",
4120 + .ksize = 80,
4121 + .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4122 + .psize = 54,
4123 + .digest = "\x64\x66\xca\x07\xac\x5e\xac\x29\xe1\xbd"
4124 + "\x52\x3e\x5a\xda\x76\x05\xb7\x91\xfd\x8b",
4125 + }, {
4126 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4127 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4128 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4129 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4130 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4131 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4132 + "\xaa\xaa",
4133 + .ksize = 80,
4134 + .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4135 + "Block-Size Data",
4136 + .psize = 73,
4137 + .digest = "\x69\xea\x60\x79\x8d\x71\x61\x6c\xce\x5f"
4138 + "\xd0\x87\x1e\x23\x75\x4c\xd7\x5d\x5a\x0a",
4139 + },
4140 +};
4141 +
4142 +/*
4143 * HMAC-SHA1 test vectors from RFC2202
4144 */
4145 #define HMAC_SHA1_TEST_VECTORS 7
4146 @@ -1442,6 +1863,8 @@
4147 #define DES_CBC_DEC_TEST_VECTORS 4
4148 #define DES3_EDE_ENC_TEST_VECTORS 3
4149 #define DES3_EDE_DEC_TEST_VECTORS 3
4150 +#define DES3_EDE_CBC_ENC_TEST_VECTORS 1
4151 +#define DES3_EDE_CBC_DEC_TEST_VECTORS 1
4152
4153 static struct cipher_testvec des_enc_tv_template[] = {
4154 { /* From Applied Cryptography */
4155 @@ -1680,9 +2103,6 @@
4156 },
4157 };
4158
4159 -/*
4160 - * We really need some more test vectors, especially for DES3 CBC.
4161 - */
4162 static struct cipher_testvec des3_ede_enc_tv_template[] = {
4163 { /* These are from openssl */
4164 .key = "\x01\x23\x45\x67\x89\xab\xcd\xef"
4165 @@ -1745,6 +2165,94 @@
4166 },
4167 };
4168
4169 +static struct cipher_testvec des3_ede_cbc_enc_tv_template[] = {
4170 + { /* Generated from openssl */
4171 + .key = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4172 + "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4173 + "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4174 + .klen = 24,
4175 + .iv = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4176 + .input = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4177 + "\x53\x20\x63\x65\x65\x72\x73\x74"
4178 + "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4179 + "\x20\x79\x65\x53\x72\x63\x74\x65"
4180 + "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4181 + "\x79\x6e\x53\x20\x63\x65\x65\x72"
4182 + "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4183 + "\x6e\x61\x20\x79\x65\x53\x72\x63"
4184 + "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4185 + "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4186 + "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4187 + "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4188 + "\x72\x63\x74\x65\x20\x73\x6f\x54"
4189 + "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4190 + "\x63\x65\x65\x72\x73\x74\x54\x20"
4191 + "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4192 + .ilen = 128,
4193 + .result = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4194 + "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4195 + "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4196 + "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4197 + "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4198 + "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4199 + "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4200 + "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4201 + "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4202 + "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4203 + "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4204 + "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4205 + "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4206 + "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4207 + "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4208 + "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4209 + .rlen = 128,
4210 + },
4211 +};
4212 +
4213 +static struct cipher_testvec des3_ede_cbc_dec_tv_template[] = {
4214 + { /* Generated from openssl */
4215 + .key = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4216 + "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4217 + "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4218 + .klen = 24,
4219 + .iv = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4220 + .input = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4221 + "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4222 + "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4223 + "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4224 + "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4225 + "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4226 + "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4227 + "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4228 + "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4229 + "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4230 + "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4231 + "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4232 + "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4233 + "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4234 + "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4235 + "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4236 + .ilen = 128,
4237 + .result = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4238 + "\x53\x20\x63\x65\x65\x72\x73\x74"
4239 + "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4240 + "\x20\x79\x65\x53\x72\x63\x74\x65"
4241 + "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4242 + "\x79\x6e\x53\x20\x63\x65\x65\x72"
4243 + "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4244 + "\x6e\x61\x20\x79\x65\x53\x72\x63"
4245 + "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4246 + "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4247 + "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4248 + "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4249 + "\x72\x63\x74\x65\x20\x73\x6f\x54"
4250 + "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4251 + "\x63\x65\x65\x72\x73\x74\x54\x20"
4252 + "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4253 + .rlen = 128,
4254 + },
4255 +};
4256 +
4257 /*
4258 * Blowfish test vectors.
4259 */
4260 --- a/drivers/crypto/Kconfig
4261 +++ b/drivers/crypto/Kconfig
4262 @@ -174,4 +174,30 @@
4263 Select this option if you want to enable the random number generator
4264 on the HIFN 795x crypto adapters.
4265
4266 +config CRYPTO_DEV_TALITOS
4267 + tristate "Talitos Freescale Security Engine (SEC)"
4268 + select CRYPTO_ALGAPI
4269 + select CRYPTO_AUTHENC
4270 + select HW_RANDOM
4271 + depends on FSL_SOC
4272 + help
4273 + Say 'Y' here to use the Freescale Security Engine (SEC)
4274 + to offload cryptographic algorithm computation.
4275 +
4276 + The Freescale SEC is present on PowerQUICC 'E' processors, such
4277 + as the MPC8349E and MPC8548E.
4278 +
4279 + To compile this driver as a module, choose M here: the module
4280 + will be called talitos.
4281 +
4282 +config CRYPTO_DEV_IXP4XX
4283 + tristate "Driver for IXP4xx crypto hardware acceleration"
4284 + depends on ARCH_IXP4XX
4285 + select CRYPTO_DES
4286 + select CRYPTO_ALGAPI
4287 + select CRYPTO_AUTHENC
4288 + select CRYPTO_BLKCIPHER
4289 + help
4290 + Driver for the IXP4xx NPE crypto engine.
4291 +
4292 endif # CRYPTO_HW
4293 --- a/drivers/crypto/Makefile
4294 +++ b/drivers/crypto/Makefile
4295 @@ -2,3 +2,5 @@
4296 obj-$(CONFIG_CRYPTO_DEV_PADLOCK_SHA) += padlock-sha.o
4297 obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
4298 obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
4299 +obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
4300 +obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
4301 --- a/drivers/crypto/hifn_795x.c
4302 +++ b/drivers/crypto/hifn_795x.c
4303 @@ -29,7 +29,6 @@
4304 #include <linux/dma-mapping.h>
4305 #include <linux/scatterlist.h>
4306 #include <linux/highmem.h>
4307 -#include <linux/interrupt.h>
4308 #include <linux/crypto.h>
4309 #include <linux/hw_random.h>
4310 #include <linux/ktime.h>
4311 @@ -369,7 +368,9 @@
4312 #define HIFN_D_DST_RSIZE 80*4
4313 #define HIFN_D_RES_RSIZE 24*4
4314
4315 -#define HIFN_QUEUE_LENGTH HIFN_D_CMD_RSIZE-5
4316 +#define HIFN_D_DST_DALIGN 4
4317 +
4318 +#define HIFN_QUEUE_LENGTH HIFN_D_CMD_RSIZE-1
4319
4320 #define AES_MIN_KEY_SIZE 16
4321 #define AES_MAX_KEY_SIZE 32
4322 @@ -535,10 +536,10 @@
4323 */
4324 struct hifn_mac_command
4325 {
4326 - volatile u16 masks;
4327 - volatile u16 header_skip;
4328 - volatile u16 source_count;
4329 - volatile u16 reserved;
4330 + volatile __le16 masks;
4331 + volatile __le16 header_skip;
4332 + volatile __le16 source_count;
4333 + volatile __le16 reserved;
4334 };
4335
4336 #define HIFN_MAC_CMD_ALG_MASK 0x0001
4337 @@ -564,10 +565,10 @@
4338
4339 struct hifn_comp_command
4340 {
4341 - volatile u16 masks;
4342 - volatile u16 header_skip;
4343 - volatile u16 source_count;
4344 - volatile u16 reserved;
4345 + volatile __le16 masks;
4346 + volatile __le16 header_skip;
4347 + volatile __le16 source_count;
4348 + volatile __le16 reserved;
4349 };
4350
4351 #define HIFN_COMP_CMD_SRCLEN_M 0xc000
4352 @@ -583,10 +584,10 @@
4353
4354 struct hifn_base_result
4355 {
4356 - volatile u16 flags;
4357 - volatile u16 session;
4358 - volatile u16 src_cnt; /* 15:0 of source count */
4359 - volatile u16 dst_cnt; /* 15:0 of dest count */
4360 + volatile __le16 flags;
4361 + volatile __le16 session;
4362 + volatile __le16 src_cnt; /* 15:0 of source count */
4363 + volatile __le16 dst_cnt; /* 15:0 of dest count */
4364 };
4365
4366 #define HIFN_BASE_RES_DSTOVERRUN 0x0200 /* destination overrun */
4367 @@ -597,8 +598,8 @@
4368
4369 struct hifn_comp_result
4370 {
4371 - volatile u16 flags;
4372 - volatile u16 crc;
4373 + volatile __le16 flags;
4374 + volatile __le16 crc;
4375 };
4376
4377 #define HIFN_COMP_RES_LCB_M 0xff00 /* longitudinal check byte */
4378 @@ -609,8 +610,8 @@
4379
4380 struct hifn_mac_result
4381 {
4382 - volatile u16 flags;
4383 - volatile u16 reserved;
4384 + volatile __le16 flags;
4385 + volatile __le16 reserved;
4386 /* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */
4387 };
4388
4389 @@ -619,8 +620,8 @@
4390
4391 struct hifn_crypt_result
4392 {
4393 - volatile u16 flags;
4394 - volatile u16 reserved;
4395 + volatile __le16 flags;
4396 + volatile __le16 reserved;
4397 };
4398
4399 #define HIFN_CRYPT_RES_SRC_NOTZERO 0x0001 /* source expired */
4400 @@ -686,12 +687,12 @@
4401
4402 static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val)
4403 {
4404 - writel(val, dev->bar[0] + reg);
4405 + writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg);
4406 }
4407
4408 static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val)
4409 {
4410 - writel(val, dev->bar[1] + reg);
4411 + writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg);
4412 }
4413
4414 static void hifn_wait_puc(struct hifn_device *dev)
4415 @@ -894,7 +895,7 @@
4416 char *offtbl = NULL;
4417 int i;
4418
4419 - for (i = 0; i < sizeof(pci2id)/sizeof(pci2id[0]); i++) {
4420 + for (i = 0; i < ARRAY_SIZE(pci2id); i++) {
4421 if (pci2id[i].pci_vendor == dev->pdev->vendor &&
4422 pci2id[i].pci_prod == dev->pdev->device) {
4423 offtbl = pci2id[i].card_id;
4424 @@ -1037,14 +1038,14 @@
4425 hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
4426
4427 /* write all 4 ring address registers */
4428 - hifn_write_1(dev, HIFN_1_DMA_CRAR, __cpu_to_le32(dptr +
4429 - offsetof(struct hifn_dma, cmdr[0])));
4430 - hifn_write_1(dev, HIFN_1_DMA_SRAR, __cpu_to_le32(dptr +
4431 - offsetof(struct hifn_dma, srcr[0])));
4432 - hifn_write_1(dev, HIFN_1_DMA_DRAR, __cpu_to_le32(dptr +
4433 - offsetof(struct hifn_dma, dstr[0])));
4434 - hifn_write_1(dev, HIFN_1_DMA_RRAR, __cpu_to_le32(dptr +
4435 - offsetof(struct hifn_dma, resr[0])));
4436 + hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +
4437 + offsetof(struct hifn_dma, cmdr[0]));
4438 + hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +
4439 + offsetof(struct hifn_dma, srcr[0]));
4440 + hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +
4441 + offsetof(struct hifn_dma, dstr[0]));
4442 + hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +
4443 + offsetof(struct hifn_dma, resr[0]));
4444
4445 mdelay(2);
4446 #if 0
4447 @@ -1166,109 +1167,15 @@
4448 return cmd_len;
4449 }
4450
4451 -static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4452 - unsigned int offset, unsigned int size)
4453 -{
4454 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4455 - int idx;
4456 - dma_addr_t addr;
4457 -
4458 - addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4459 -
4460 - idx = dma->srci;
4461 -
4462 - dma->srcr[idx].p = __cpu_to_le32(addr);
4463 - dma->srcr[idx].l = __cpu_to_le32(size) | HIFN_D_VALID |
4464 - HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST;
4465 -
4466 - if (++idx == HIFN_D_SRC_RSIZE) {
4467 - dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4468 - HIFN_D_JUMP |
4469 - HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4470 - idx = 0;
4471 - }
4472 -
4473 - dma->srci = idx;
4474 - dma->srcu++;
4475 -
4476 - if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4477 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4478 - dev->flags |= HIFN_FLAG_SRC_BUSY;
4479 - }
4480 -
4481 - return size;
4482 -}
4483 -
4484 -static void hifn_setup_res_desc(struct hifn_device *dev)
4485 -{
4486 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4487 -
4488 - dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4489 - HIFN_D_VALID | HIFN_D_LAST);
4490 - /*
4491 - * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4492 - * HIFN_D_LAST | HIFN_D_NOINVALID);
4493 - */
4494 -
4495 - if (++dma->resi == HIFN_D_RES_RSIZE) {
4496 - dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4497 - HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4498 - dma->resi = 0;
4499 - }
4500 -
4501 - dma->resu++;
4502 -
4503 - if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4504 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4505 - dev->flags |= HIFN_FLAG_RES_BUSY;
4506 - }
4507 -}
4508 -
4509 -static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4510 - unsigned offset, unsigned size)
4511 -{
4512 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4513 - int idx;
4514 - dma_addr_t addr;
4515 -
4516 - addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4517 -
4518 - idx = dma->dsti;
4519 - dma->dstr[idx].p = __cpu_to_le32(addr);
4520 - dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4521 - HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST);
4522 -
4523 - if (++idx == HIFN_D_DST_RSIZE) {
4524 - dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4525 - HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4526 - HIFN_D_LAST | HIFN_D_NOINVALID);
4527 - idx = 0;
4528 - }
4529 - dma->dsti = idx;
4530 - dma->dstu++;
4531 -
4532 - if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4533 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4534 - dev->flags |= HIFN_FLAG_DST_BUSY;
4535 - }
4536 -}
4537 -
4538 -static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4539 - struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4540 - struct hifn_context *ctx)
4541 +static int hifn_setup_cmd_desc(struct hifn_device *dev,
4542 + struct hifn_context *ctx, void *priv, unsigned int nbytes)
4543 {
4544 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4545 int cmd_len, sa_idx;
4546 u8 *buf, *buf_pos;
4547 u16 mask;
4548
4549 - dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4550 - dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4551 -
4552 - sa_idx = dma->resi;
4553 -
4554 - hifn_setup_src_desc(dev, spage, soff, nbytes);
4555 -
4556 + sa_idx = dma->cmdi;
4557 buf_pos = buf = dma->command_bufs[dma->cmdi];
4558
4559 mask = 0;
4560 @@ -1370,16 +1277,113 @@
4561 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
4562 dev->flags |= HIFN_FLAG_CMD_BUSY;
4563 }
4564 -
4565 - hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4566 - hifn_setup_res_desc(dev);
4567 -
4568 return 0;
4569
4570 err_out:
4571 return -EINVAL;
4572 }
4573
4574 +static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4575 + unsigned int offset, unsigned int size)
4576 +{
4577 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4578 + int idx;
4579 + dma_addr_t addr;
4580 +
4581 + addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4582 +
4583 + idx = dma->srci;
4584 +
4585 + dma->srcr[idx].p = __cpu_to_le32(addr);
4586 + dma->srcr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4587 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4588 +
4589 + if (++idx == HIFN_D_SRC_RSIZE) {
4590 + dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4591 + HIFN_D_JUMP |
4592 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4593 + idx = 0;
4594 + }
4595 +
4596 + dma->srci = idx;
4597 + dma->srcu++;
4598 +
4599 + if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4600 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4601 + dev->flags |= HIFN_FLAG_SRC_BUSY;
4602 + }
4603 +
4604 + return size;
4605 +}
4606 +
4607 +static void hifn_setup_res_desc(struct hifn_device *dev)
4608 +{
4609 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4610 +
4611 + dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4612 + HIFN_D_VALID | HIFN_D_LAST);
4613 + /*
4614 + * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4615 + * HIFN_D_LAST);
4616 + */
4617 +
4618 + if (++dma->resi == HIFN_D_RES_RSIZE) {
4619 + dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4620 + HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4621 + dma->resi = 0;
4622 + }
4623 +
4624 + dma->resu++;
4625 +
4626 + if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4627 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4628 + dev->flags |= HIFN_FLAG_RES_BUSY;
4629 + }
4630 +}
4631 +
4632 +static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4633 + unsigned offset, unsigned size)
4634 +{
4635 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4636 + int idx;
4637 + dma_addr_t addr;
4638 +
4639 + addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4640 +
4641 + idx = dma->dsti;
4642 + dma->dstr[idx].p = __cpu_to_le32(addr);
4643 + dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4644 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4645 +
4646 + if (++idx == HIFN_D_DST_RSIZE) {
4647 + dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4648 + HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4649 + HIFN_D_LAST);
4650 + idx = 0;
4651 + }
4652 + dma->dsti = idx;
4653 + dma->dstu++;
4654 +
4655 + if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4656 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4657 + dev->flags |= HIFN_FLAG_DST_BUSY;
4658 + }
4659 +}
4660 +
4661 +static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4662 + struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4663 + struct hifn_context *ctx)
4664 +{
4665 + dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4666 + dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4667 +
4668 + hifn_setup_src_desc(dev, spage, soff, nbytes);
4669 + hifn_setup_cmd_desc(dev, ctx, priv, nbytes);
4670 + hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4671 + hifn_setup_res_desc(dev);
4672 + return 0;
4673 +}
4674 +
4675 static int ablkcipher_walk_init(struct ablkcipher_walk *w,
4676 int num, gfp_t gfp_flags)
4677 {
4678 @@ -1431,7 +1435,7 @@
4679 return -EINVAL;
4680
4681 while (size) {
4682 - copy = min(drest, src->length);
4683 + copy = min(drest, min(size, src->length));
4684
4685 saddr = kmap_atomic(sg_page(src), KM_SOFTIRQ1);
4686 memcpy(daddr, saddr + src->offset, copy);
4687 @@ -1458,10 +1462,6 @@
4688 static int ablkcipher_walk(struct ablkcipher_request *req,
4689 struct ablkcipher_walk *w)
4690 {
4691 - unsigned blocksize =
4692 - crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4693 - unsigned alignmask =
4694 - crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4695 struct scatterlist *src, *dst, *t;
4696 void *daddr;
4697 unsigned int nbytes = req->nbytes, offset, copy, diff;
4698 @@ -1477,16 +1477,14 @@
4699 dst = &req->dst[idx];
4700
4701 dprintk("\n%s: slen: %u, dlen: %u, soff: %u, doff: %u, offset: %u, "
4702 - "blocksize: %u, nbytes: %u.\n",
4703 + "nbytes: %u.\n",
4704 __func__, src->length, dst->length, src->offset,
4705 - dst->offset, offset, blocksize, nbytes);
4706 + dst->offset, offset, nbytes);
4707
4708 - if (src->length & (blocksize - 1) ||
4709 - src->offset & (alignmask - 1) ||
4710 - dst->length & (blocksize - 1) ||
4711 - dst->offset & (alignmask - 1) ||
4712 - offset) {
4713 - unsigned slen = src->length - offset;
4714 + if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4715 + !IS_ALIGNED(dst->length, HIFN_D_DST_DALIGN) ||
4716 + offset) {
4717 + unsigned slen = min(src->length - offset, nbytes);
4718 unsigned dlen = PAGE_SIZE;
4719
4720 t = &w->cache[idx];
4721 @@ -1498,8 +1496,8 @@
4722
4723 idx += err;
4724
4725 - copy = slen & ~(blocksize - 1);
4726 - diff = slen & (blocksize - 1);
4727 + copy = slen & ~(HIFN_D_DST_DALIGN - 1);
4728 + diff = slen & (HIFN_D_DST_DALIGN - 1);
4729
4730 if (dlen < nbytes) {
4731 /*
4732 @@ -1507,7 +1505,7 @@
4733 * to put there additional blocksized chunk,
4734 * so we mark that page as containing only
4735 * blocksize aligned chunks:
4736 - * t->length = (slen & ~(blocksize - 1));
4737 + * t->length = (slen & ~(HIFN_D_DST_DALIGN - 1));
4738 * and increase number of bytes to be processed
4739 * in next chunk:
4740 * nbytes += diff;
4741 @@ -1544,7 +1542,7 @@
4742
4743 kunmap_atomic(daddr, KM_SOFTIRQ0);
4744 } else {
4745 - nbytes -= src->length;
4746 + nbytes -= min(src->length, nbytes);
4747 idx++;
4748 }
4749
4750 @@ -1563,14 +1561,10 @@
4751 struct hifn_context *ctx = crypto_tfm_ctx(req->base.tfm);
4752 struct hifn_device *dev = ctx->dev;
4753 struct page *spage, *dpage;
4754 - unsigned long soff, doff, flags;
4755 + unsigned long soff, doff, dlen, flags;
4756 unsigned int nbytes = req->nbytes, idx = 0, len;
4757 int err = -EINVAL, sg_num;
4758 struct scatterlist *src, *dst, *t;
4759 - unsigned blocksize =
4760 - crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4761 - unsigned alignmask =
4762 - crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4763
4764 if (ctx->iv && !ctx->ivsize && ctx->mode != ACRYPTO_MODE_ECB)
4765 goto err_out_exit;
4766 @@ -1578,17 +1572,14 @@
4767 ctx->walk.flags = 0;
4768
4769 while (nbytes) {
4770 - src = &req->src[idx];
4771 dst = &req->dst[idx];
4772 + dlen = min(dst->length, nbytes);
4773
4774 - if (src->length & (blocksize - 1) ||
4775 - src->offset & (alignmask - 1) ||
4776 - dst->length & (blocksize - 1) ||
4777 - dst->offset & (alignmask - 1)) {
4778 + if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4779 + !IS_ALIGNED(dlen, HIFN_D_DST_DALIGN))
4780 ctx->walk.flags |= ASYNC_FLAGS_MISALIGNED;
4781 - }
4782
4783 - nbytes -= src->length;
4784 + nbytes -= dlen;
4785 idx++;
4786 }
4787
4788 @@ -1602,7 +1593,10 @@
4789 idx = 0;
4790
4791 sg_num = ablkcipher_walk(req, &ctx->walk);
4792 -
4793 + if (sg_num < 0) {
4794 + err = sg_num;
4795 + goto err_out_exit;
4796 + }
4797 atomic_set(&ctx->sg_num, sg_num);
4798
4799 spin_lock_irqsave(&dev->lock, flags);
4800 @@ -1640,7 +1634,7 @@
4801 if (err)
4802 goto err_out;
4803
4804 - nbytes -= len;
4805 + nbytes -= min(len, nbytes);
4806 }
4807
4808 dev->active = HIFN_DEFAULT_ACTIVE_NUM;
4809 @@ -1651,7 +1645,7 @@
4810 err_out:
4811 spin_unlock_irqrestore(&dev->lock, flags);
4812 err_out_exit:
4813 - if (err && printk_ratelimit())
4814 + if (err)
4815 dprintk("%s: iv: %p [%d], key: %p [%d], mode: %u, op: %u, "
4816 "type: %u, err: %d.\n",
4817 dev->name, ctx->iv, ctx->ivsize,
4818 @@ -1745,8 +1739,7 @@
4819 return -EINVAL;
4820
4821 while (size) {
4822 -
4823 - copy = min(dst->length, srest);
4824 + copy = min(srest, min(dst->length, size));
4825
4826 daddr = kmap_atomic(sg_page(dst), KM_IRQ0);
4827 memcpy(daddr + dst->offset + offset, saddr, copy);
4828 @@ -1803,7 +1796,7 @@
4829 sg_page(dst), dst->length, nbytes);
4830
4831 if (!t->length) {
4832 - nbytes -= dst->length;
4833 + nbytes -= min(dst->length, nbytes);
4834 idx++;
4835 continue;
4836 }
4837 @@ -2202,9 +2195,9 @@
4838 return err;
4839
4840 if (dev->started < HIFN_QUEUE_LENGTH && dev->queue.qlen)
4841 - err = hifn_process_queue(dev);
4842 + hifn_process_queue(dev);
4843
4844 - return err;
4845 + return -EINPROGRESS;
4846 }
4847
4848 /*
4849 @@ -2364,7 +2357,7 @@
4850 * 3DES ECB, CBC, CFB and OFB modes.
4851 */
4852 {
4853 - .name = "cfb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4854 + .name = "cfb(des3_ede)", .drv_name = "cfb-3des", .bsize = 8,
4855 .ablkcipher = {
4856 .min_keysize = HIFN_3DES_KEY_LENGTH,
4857 .max_keysize = HIFN_3DES_KEY_LENGTH,
4858 @@ -2374,7 +2367,7 @@
4859 },
4860 },
4861 {
4862 - .name = "ofb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4863 + .name = "ofb(des3_ede)", .drv_name = "ofb-3des", .bsize = 8,
4864 .ablkcipher = {
4865 .min_keysize = HIFN_3DES_KEY_LENGTH,
4866 .max_keysize = HIFN_3DES_KEY_LENGTH,
4867 @@ -2384,8 +2377,9 @@
4868 },
4869 },
4870 {
4871 - .name = "cbc(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4872 + .name = "cbc(des3_ede)", .drv_name = "cbc-3des", .bsize = 8,
4873 .ablkcipher = {
4874 + .ivsize = HIFN_IV_LENGTH,
4875 .min_keysize = HIFN_3DES_KEY_LENGTH,
4876 .max_keysize = HIFN_3DES_KEY_LENGTH,
4877 .setkey = hifn_setkey,
4878 @@ -2394,7 +2388,7 @@
4879 },
4880 },
4881 {
4882 - .name = "ecb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4883 + .name = "ecb(des3_ede)", .drv_name = "ecb-3des", .bsize = 8,
4884 .ablkcipher = {
4885 .min_keysize = HIFN_3DES_KEY_LENGTH,
4886 .max_keysize = HIFN_3DES_KEY_LENGTH,
4887 @@ -2408,7 +2402,7 @@
4888 * DES ECB, CBC, CFB and OFB modes.
4889 */
4890 {
4891 - .name = "cfb(des)", .drv_name = "hifn-des", .bsize = 8,
4892 + .name = "cfb(des)", .drv_name = "cfb-des", .bsize = 8,
4893 .ablkcipher = {
4894 .min_keysize = HIFN_DES_KEY_LENGTH,
4895 .max_keysize = HIFN_DES_KEY_LENGTH,
4896 @@ -2418,7 +2412,7 @@
4897 },
4898 },
4899 {
4900 - .name = "ofb(des)", .drv_name = "hifn-des", .bsize = 8,
4901 + .name = "ofb(des)", .drv_name = "ofb-des", .bsize = 8,
4902 .ablkcipher = {
4903 .min_keysize = HIFN_DES_KEY_LENGTH,
4904 .max_keysize = HIFN_DES_KEY_LENGTH,
4905 @@ -2428,8 +2422,9 @@
4906 },
4907 },
4908 {
4909 - .name = "cbc(des)", .drv_name = "hifn-des", .bsize = 8,
4910 + .name = "cbc(des)", .drv_name = "cbc-des", .bsize = 8,
4911 .ablkcipher = {
4912 + .ivsize = HIFN_IV_LENGTH,
4913 .min_keysize = HIFN_DES_KEY_LENGTH,
4914 .max_keysize = HIFN_DES_KEY_LENGTH,
4915 .setkey = hifn_setkey,
4916 @@ -2438,7 +2433,7 @@
4917 },
4918 },
4919 {
4920 - .name = "ecb(des)", .drv_name = "hifn-des", .bsize = 8,
4921 + .name = "ecb(des)", .drv_name = "ecb-des", .bsize = 8,
4922 .ablkcipher = {
4923 .min_keysize = HIFN_DES_KEY_LENGTH,
4924 .max_keysize = HIFN_DES_KEY_LENGTH,
4925 @@ -2452,7 +2447,7 @@
4926 * AES ECB, CBC, CFB and OFB modes.
4927 */
4928 {
4929 - .name = "ecb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4930 + .name = "ecb(aes)", .drv_name = "ecb-aes", .bsize = 16,
4931 .ablkcipher = {
4932 .min_keysize = AES_MIN_KEY_SIZE,
4933 .max_keysize = AES_MAX_KEY_SIZE,
4934 @@ -2462,8 +2457,9 @@
4935 },
4936 },
4937 {
4938 - .name = "cbc(aes)", .drv_name = "hifn-aes", .bsize = 16,
4939 + .name = "cbc(aes)", .drv_name = "cbc-aes", .bsize = 16,
4940 .ablkcipher = {
4941 + .ivsize = HIFN_AES_IV_LENGTH,
4942 .min_keysize = AES_MIN_KEY_SIZE,
4943 .max_keysize = AES_MAX_KEY_SIZE,
4944 .setkey = hifn_setkey,
4945 @@ -2472,7 +2468,7 @@
4946 },
4947 },
4948 {
4949 - .name = "cfb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4950 + .name = "cfb(aes)", .drv_name = "cfb-aes", .bsize = 16,
4951 .ablkcipher = {
4952 .min_keysize = AES_MIN_KEY_SIZE,
4953 .max_keysize = AES_MAX_KEY_SIZE,
4954 @@ -2482,7 +2478,7 @@
4955 },
4956 },
4957 {
4958 - .name = "ofb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4959 + .name = "ofb(aes)", .drv_name = "ofb-aes", .bsize = 16,
4960 .ablkcipher = {
4961 .min_keysize = AES_MIN_KEY_SIZE,
4962 .max_keysize = AES_MAX_KEY_SIZE,
4963 @@ -2514,15 +2510,14 @@
4964 return -ENOMEM;
4965
4966 snprintf(alg->alg.cra_name, CRYPTO_MAX_ALG_NAME, "%s", t->name);
4967 - snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", t->drv_name);
4968 + snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s-%s",
4969 + t->drv_name, dev->name);
4970
4971 alg->alg.cra_priority = 300;
4972 alg->alg.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC;
4973 alg->alg.cra_blocksize = t->bsize;
4974 alg->alg.cra_ctxsize = sizeof(struct hifn_context);
4975 - alg->alg.cra_alignmask = 15;
4976 - if (t->bsize == 8)
4977 - alg->alg.cra_alignmask = 3;
4978 + alg->alg.cra_alignmask = 0;
4979 alg->alg.cra_type = &crypto_ablkcipher_type;
4980 alg->alg.cra_module = THIS_MODULE;
4981 alg->alg.cra_u.ablkcipher = t->ablkcipher;
4982 --- /dev/null
4983 +++ b/drivers/crypto/ixp4xx_crypto.c
4984 @@ -0,0 +1,1506 @@
4985 +/*
4986 + * Intel IXP4xx NPE-C crypto driver
4987 + *
4988 + * Copyright (C) 2008 Christian Hohnstaedt <chohnstaedt@innominate.com>
4989 + *
4990 + * This program is free software; you can redistribute it and/or modify it
4991 + * under the terms of version 2 of the GNU General Public License
4992 + * as published by the Free Software Foundation.
4993 + *
4994 + */
4995 +
4996 +#include <linux/platform_device.h>
4997 +#include <linux/dma-mapping.h>
4998 +#include <linux/dmapool.h>
4999 +#include <linux/crypto.h>
5000 +#include <linux/kernel.h>
5001 +#include <linux/rtnetlink.h>
5002 +#include <linux/interrupt.h>
5003 +#include <linux/spinlock.h>
5004 +
5005 +#include <crypto/ctr.h>
5006 +#include <crypto/des.h>
5007 +#include <crypto/aes.h>
5008 +#include <crypto/sha.h>
5009 +#include <crypto/algapi.h>
5010 +#include <crypto/aead.h>
5011 +#include <crypto/authenc.h>
5012 +#include <crypto/scatterwalk.h>
5013 +
5014 +#include <asm/arch/npe.h>
5015 +#include <asm/arch/qmgr.h>
5016 +
5017 +#define MAX_KEYLEN 32
5018 +
5019 +/* hash: cfgword + 2 * digestlen; crypt: keylen + cfgword */
5020 +#define NPE_CTX_LEN 80
5021 +#define AES_BLOCK128 16
5022 +
5023 +#define NPE_OP_HASH_VERIFY 0x01
5024 +#define NPE_OP_CCM_ENABLE 0x04
5025 +#define NPE_OP_CRYPT_ENABLE 0x08
5026 +#define NPE_OP_HASH_ENABLE 0x10
5027 +#define NPE_OP_NOT_IN_PLACE 0x20
5028 +#define NPE_OP_HMAC_DISABLE 0x40
5029 +#define NPE_OP_CRYPT_ENCRYPT 0x80
5030 +
5031 +#define NPE_OP_CCM_GEN_MIC 0xcc
5032 +#define NPE_OP_HASH_GEN_ICV 0x50
5033 +#define NPE_OP_ENC_GEN_KEY 0xc9
5034 +
5035 +#define MOD_ECB 0x0000
5036 +#define MOD_CTR 0x1000
5037 +#define MOD_CBC_ENC 0x2000
5038 +#define MOD_CBC_DEC 0x3000
5039 +#define MOD_CCM_ENC 0x4000
5040 +#define MOD_CCM_DEC 0x5000
5041 +
5042 +#define KEYLEN_128 4
5043 +#define KEYLEN_192 6
5044 +#define KEYLEN_256 8
5045 +
5046 +#define CIPH_DECR 0x0000
5047 +#define CIPH_ENCR 0x0400
5048 +
5049 +#define MOD_DES 0x0000
5050 +#define MOD_TDEA2 0x0100
5051 +#define MOD_3DES 0x0200
5052 +#define MOD_AES 0x0800
5053 +#define MOD_AES128 (0x0800 | KEYLEN_128)
5054 +#define MOD_AES192 (0x0900 | KEYLEN_192)
5055 +#define MOD_AES256 (0x0a00 | KEYLEN_256)
5056 +
5057 +#define MAX_IVLEN 16
5058 +#define NPE_ID 2 /* NPE C */
5059 +#define NPE_QLEN 16
5060 +/* Space for registering when the first
5061 + * NPE_QLEN crypt_ctl are busy */
5062 +#define NPE_QLEN_TOTAL 64
5063 +
5064 +#define SEND_QID 29
5065 +#define RECV_QID 30
5066 +
5067 +#define CTL_FLAG_UNUSED 0x0000
5068 +#define CTL_FLAG_USED 0x1000
5069 +#define CTL_FLAG_PERFORM_ABLK 0x0001
5070 +#define CTL_FLAG_GEN_ICV 0x0002
5071 +#define CTL_FLAG_GEN_REVAES 0x0004
5072 +#define CTL_FLAG_PERFORM_AEAD 0x0008
5073 +#define CTL_FLAG_MASK 0x000f
5074 +
5075 +#define HMAC_IPAD_VALUE 0x36
5076 +#define HMAC_OPAD_VALUE 0x5C
5077 +#define HMAC_PAD_BLOCKLEN SHA1_BLOCK_SIZE
5078 +
5079 +#define MD5_DIGEST_SIZE 16
5080 +
5081 +struct buffer_desc {
5082 + u32 phys_next;
5083 + u16 buf_len;
5084 + u16 pkt_len;
5085 + u32 phys_addr;
5086 + u32 __reserved[4];
5087 + struct buffer_desc *next;
5088 +};
5089 +
5090 +struct crypt_ctl {
5091 + u8 mode; /* NPE_OP_* operation mode */
5092 + u8 init_len;
5093 + u16 reserved;
5094 + u8 iv[MAX_IVLEN]; /* IV for CBC mode or CTR IV for CTR mode */
5095 + u32 icv_rev_aes; /* icv or rev aes */
5096 + u32 src_buf;
5097 + u32 dst_buf;
5098 + u16 auth_offs; /* Authentication start offset */
5099 + u16 auth_len; /* Authentication data length */
5100 + u16 crypt_offs; /* Cryption start offset */
5101 + u16 crypt_len; /* Cryption data length */
5102 + u32 aadAddr; /* Additional Auth Data Addr for CCM mode */
5103 + u32 crypto_ctx; /* NPE Crypto Param structure address */
5104 +
5105 + /* Used by Host: 4*4 bytes*/
5106 + unsigned ctl_flags;
5107 + union {
5108 + struct ablkcipher_request *ablk_req;
5109 + struct aead_request *aead_req;
5110 + struct crypto_tfm *tfm;
5111 + } data;
5112 + struct buffer_desc *regist_buf;
5113 + u8 *regist_ptr;
5114 +};
5115 +
5116 +struct ablk_ctx {
5117 + struct buffer_desc *src;
5118 + struct buffer_desc *dst;
5119 + unsigned src_nents;
5120 + unsigned dst_nents;
5121 +};
5122 +
5123 +struct aead_ctx {
5124 + struct buffer_desc *buffer;
5125 + unsigned short assoc_nents;
5126 + unsigned short src_nents;
5127 + struct scatterlist ivlist;
5128 + /* used when the hmac is not on one sg entry */
5129 + u8 *hmac_virt;
5130 + int encrypt;
5131 +};
5132 +
5133 +struct ix_hash_algo {
5134 + u32 cfgword;
5135 + unsigned char *icv;
5136 +};
5137 +
5138 +struct ix_sa_dir {
5139 + unsigned char *npe_ctx;
5140 + dma_addr_t npe_ctx_phys;
5141 + int npe_ctx_idx;
5142 + u8 npe_mode;
5143 +};
5144 +
5145 +struct ixp_ctx {
5146 + struct ix_sa_dir encrypt;
5147 + struct ix_sa_dir decrypt;
5148 + int authkey_len;
5149 + u8 authkey[MAX_KEYLEN];
5150 + int enckey_len;
5151 + u8 enckey[MAX_KEYLEN];
5152 + u8 salt[MAX_IVLEN];
5153 + u8 nonce[CTR_RFC3686_NONCE_SIZE];
5154 + unsigned salted;
5155 + atomic_t configuring;
5156 + struct completion completion;
5157 +};
5158 +
5159 +struct ixp_alg {
5160 + struct crypto_alg crypto;
5161 + const struct ix_hash_algo *hash;
5162 + u32 cfg_enc;
5163 + u32 cfg_dec;
5164 +
5165 + int registered;
5166 +};
5167 +
5168 +static const struct ix_hash_algo hash_alg_md5 = {
5169 + .cfgword = 0xAA010004,
5170 + .icv = "\x01\x23\x45\x67\x89\xAB\xCD\xEF"
5171 + "\xFE\xDC\xBA\x98\x76\x54\x32\x10",
5172 +};
5173 +static const struct ix_hash_algo hash_alg_sha1 = {
5174 + .cfgword = 0x00000005,
5175 + .icv = "\x67\x45\x23\x01\xEF\xCD\xAB\x89\x98\xBA"
5176 + "\xDC\xFE\x10\x32\x54\x76\xC3\xD2\xE1\xF0",
5177 +};
5178 +
5179 +static struct npe *npe_c;
5180 +static struct dma_pool *buffer_pool = NULL;
5181 +static struct dma_pool *ctx_pool = NULL;
5182 +
5183 +static struct crypt_ctl *crypt_virt = NULL;
5184 +static dma_addr_t crypt_phys;
5185 +
5186 +static int support_aes = 1;
5187 +
5188 +static void dev_release(struct device *dev)
5189 +{
5190 + return;
5191 +}
5192 +
5193 +#define DRIVER_NAME "ixp4xx_crypto"
5194 +static struct platform_device pseudo_dev = {
5195 + .name = DRIVER_NAME,
5196 + .id = 0,
5197 + .num_resources = 0,
5198 + .dev = {
5199 + .coherent_dma_mask = DMA_32BIT_MASK,
5200 + .release = dev_release,
5201 + }
5202 +};
5203 +
5204 +static struct device *dev = &pseudo_dev.dev;
5205 +
5206 +static inline dma_addr_t crypt_virt2phys(struct crypt_ctl *virt)
5207 +{
5208 + return crypt_phys + (virt - crypt_virt) * sizeof(struct crypt_ctl);
5209 +}
5210 +
5211 +static inline struct crypt_ctl *crypt_phys2virt(dma_addr_t phys)
5212 +{
5213 + return crypt_virt + (phys - crypt_phys) / sizeof(struct crypt_ctl);
5214 +}
5215 +
5216 +static inline u32 cipher_cfg_enc(struct crypto_tfm *tfm)
5217 +{
5218 + return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_enc;
5219 +}
5220 +
5221 +static inline u32 cipher_cfg_dec(struct crypto_tfm *tfm)
5222 +{
5223 + return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_dec;
5224 +}
5225 +
5226 +static inline const struct ix_hash_algo *ix_hash(struct crypto_tfm *tfm)
5227 +{
5228 + return container_of(tfm->__crt_alg, struct ixp_alg, crypto)->hash;
5229 +}
5230 +
5231 +static int setup_crypt_desc(void)
5232 +{
5233 + BUILD_BUG_ON(sizeof(struct crypt_ctl) != 64);
5234 + crypt_virt = dma_alloc_coherent(dev,
5235 + NPE_QLEN * sizeof(struct crypt_ctl),
5236 + &crypt_phys, GFP_KERNEL);
5237 + if (!crypt_virt)
5238 + return -ENOMEM;
5239 + memset(crypt_virt, 0, NPE_QLEN * sizeof(struct crypt_ctl));
5240 + return 0;
5241 +}
5242 +
5243 +static spinlock_t desc_lock;
5244 +static struct crypt_ctl *get_crypt_desc(void)
5245 +{
5246 + int i;
5247 + static int idx = 0;
5248 + unsigned long flags;
5249 +
5250 + spin_lock_irqsave(&desc_lock, flags);
5251 +
5252 + if (unlikely(!crypt_virt))
5253 + setup_crypt_desc();
5254 + if (unlikely(!crypt_virt)) {
5255 + spin_unlock_irqrestore(&desc_lock, flags);
5256 + return NULL;
5257 + }
5258 + i = idx;
5259 + if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5260 + if (++idx >= NPE_QLEN)
5261 + idx = 0;
5262 + crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5263 + spin_unlock_irqrestore(&desc_lock, flags);
5264 + return crypt_virt +i;
5265 + } else {
5266 + spin_unlock_irqrestore(&desc_lock, flags);
5267 + return NULL;
5268 + }
5269 +}
5270 +
5271 +static spinlock_t emerg_lock;
5272 +static struct crypt_ctl *get_crypt_desc_emerg(void)
5273 +{
5274 + int i;
5275 + static int idx = NPE_QLEN;
5276 + struct crypt_ctl *desc;
5277 + unsigned long flags;
5278 +
5279 + desc = get_crypt_desc();
5280 + if (desc)
5281 + return desc;
5282 + if (unlikely(!crypt_virt))
5283 + return NULL;
5284 +
5285 + spin_lock_irqsave(&emerg_lock, flags);
5286 + i = idx;
5287 + if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5288 + if (++idx >= NPE_QLEN_TOTAL)
5289 + idx = NPE_QLEN;
5290 + crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5291 + spin_unlock_irqrestore(&emerg_lock, flags);
5292 + return crypt_virt +i;
5293 + } else {
5294 + spin_unlock_irqrestore(&emerg_lock, flags);
5295 + return NULL;
5296 + }
5297 +}
5298 +
5299 +static void free_buf_chain(struct buffer_desc *buf, u32 phys)
5300 +{
5301 + while (buf) {
5302 + struct buffer_desc *buf1;
5303 + u32 phys1;
5304 +
5305 + buf1 = buf->next;
5306 + phys1 = buf->phys_next;
5307 + dma_pool_free(buffer_pool, buf, phys);
5308 + buf = buf1;
5309 + phys = phys1;
5310 + }
5311 +}
5312 +
5313 +static struct tasklet_struct crypto_done_tasklet;
5314 +
5315 +static void finish_scattered_hmac(struct crypt_ctl *crypt)
5316 +{
5317 + struct aead_request *req = crypt->data.aead_req;
5318 + struct aead_ctx *req_ctx = aead_request_ctx(req);
5319 + struct crypto_aead *tfm = crypto_aead_reqtfm(req);
5320 + int authsize = crypto_aead_authsize(tfm);
5321 + int decryptlen = req->cryptlen - authsize;
5322 +
5323 + if (req_ctx->encrypt) {
5324 + scatterwalk_map_and_copy(req_ctx->hmac_virt,
5325 + req->src, decryptlen, authsize, 1);
5326 + }
5327 + dma_pool_free(buffer_pool, req_ctx->hmac_virt, crypt->icv_rev_aes);
5328 +}
5329 +
5330 +static void one_packet(dma_addr_t phys)
5331 +{
5332 + struct crypt_ctl *crypt;
5333 + struct ixp_ctx *ctx;
5334 + int failed;
5335 + enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5336 +
5337 + failed = phys & 0x1 ? -EBADMSG : 0;
5338 + phys &= ~0x3;
5339 + crypt = crypt_phys2virt(phys);
5340 +
5341 + switch (crypt->ctl_flags & CTL_FLAG_MASK) {
5342 + case CTL_FLAG_PERFORM_AEAD: {
5343 + struct aead_request *req = crypt->data.aead_req;
5344 + struct aead_ctx *req_ctx = aead_request_ctx(req);
5345 + dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents,
5346 + DMA_TO_DEVICE);
5347 + dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
5348 + dma_unmap_sg(dev, req->src, req_ctx->src_nents,
5349 + DMA_BIDIRECTIONAL);
5350 +
5351 + free_buf_chain(req_ctx->buffer, crypt->src_buf);
5352 + if (req_ctx->hmac_virt) {
5353 + finish_scattered_hmac(crypt);
5354 + }
5355 + req->base.complete(&req->base, failed);
5356 + break;
5357 + }
5358 + case CTL_FLAG_PERFORM_ABLK: {
5359 + struct ablkcipher_request *req = crypt->data.ablk_req;
5360 + struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5361 + int nents;
5362 + if (req_ctx->dst) {
5363 + nents = req_ctx->dst_nents;
5364 + dma_unmap_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5365 + free_buf_chain(req_ctx->dst, crypt->dst_buf);
5366 + src_direction = DMA_TO_DEVICE;
5367 + }
5368 + nents = req_ctx->src_nents;
5369 + dma_unmap_sg(dev, req->src, nents, src_direction);
5370 + free_buf_chain(req_ctx->src, crypt->src_buf);
5371 + req->base.complete(&req->base, failed);
5372 + break;
5373 + }
5374 + case CTL_FLAG_GEN_ICV:
5375 + ctx = crypto_tfm_ctx(crypt->data.tfm);
5376 + dma_pool_free(ctx_pool, crypt->regist_ptr,
5377 + crypt->regist_buf->phys_addr);
5378 + dma_pool_free(buffer_pool, crypt->regist_buf, crypt->src_buf);
5379 + if (atomic_dec_and_test(&ctx->configuring))
5380 + complete(&ctx->completion);
5381 + break;
5382 + case CTL_FLAG_GEN_REVAES:
5383 + ctx = crypto_tfm_ctx(crypt->data.tfm);
5384 + *(u32*)ctx->decrypt.npe_ctx &= cpu_to_be32(~CIPH_ENCR);
5385 + if (atomic_dec_and_test(&ctx->configuring))
5386 + complete(&ctx->completion);
5387 + break;
5388 + default:
5389 + BUG();
5390 + }
5391 + crypt->ctl_flags = CTL_FLAG_UNUSED;
5392 +}
5393 +
5394 +static void irqhandler(void *_unused)
5395 +{
5396 + tasklet_schedule(&crypto_done_tasklet);
5397 +}
5398 +
5399 +static void crypto_done_action(unsigned long arg)
5400 +{
5401 + int i;
5402 +
5403 + for(i=0; i<4; i++) {
5404 + dma_addr_t phys = qmgr_get_entry(RECV_QID);
5405 + if (!phys)
5406 + return;
5407 + one_packet(phys);
5408 + }
5409 + tasklet_schedule(&crypto_done_tasklet);
5410 +}
5411 +
5412 +static int init_ixp_crypto(void)
5413 +{
5414 + int ret = -ENODEV;
5415 +
5416 + if (! ( ~(*IXP4XX_EXP_CFG2) & (IXP4XX_FEATURE_HASH |
5417 + IXP4XX_FEATURE_AES | IXP4XX_FEATURE_DES))) {
5418 + printk(KERN_ERR "ixp_crypto: No HW crypto available\n");
5419 + return ret;
5420 + }
5421 + npe_c = npe_request(NPE_ID);
5422 + if (!npe_c)
5423 + return ret;
5424 +
5425 + if (!npe_running(npe_c)) {
5426 + npe_load_firmware(npe_c, npe_name(npe_c), dev);
5427 + }
5428 +
5429 + /* buffer_pool will also be used to sometimes store the hmac,
5430 + * so assure it is large enough
5431 + */
5432 + BUILD_BUG_ON(SHA1_DIGEST_SIZE > sizeof(struct buffer_desc));
5433 + buffer_pool = dma_pool_create("buffer", dev,
5434 + sizeof(struct buffer_desc), 32, 0);
5435 + ret = -ENOMEM;
5436 + if (!buffer_pool) {
5437 + goto err;
5438 + }
5439 + ctx_pool = dma_pool_create("context", dev,
5440 + NPE_CTX_LEN, 16, 0);
5441 + if (!ctx_pool) {
5442 + goto err;
5443 + }
5444 + ret = qmgr_request_queue(SEND_QID, NPE_QLEN_TOTAL, 0, 0);
5445 + if (ret)
5446 + goto err;
5447 + ret = qmgr_request_queue(RECV_QID, NPE_QLEN, 0, 0);
5448 + if (ret) {
5449 + qmgr_release_queue(SEND_QID);
5450 + goto err;
5451 + }
5452 + qmgr_set_irq(RECV_QID, QUEUE_IRQ_SRC_NOT_EMPTY, irqhandler, NULL);
5453 + tasklet_init(&crypto_done_tasklet, crypto_done_action, 0);
5454 +
5455 + qmgr_enable_irq(RECV_QID);
5456 + return 0;
5457 +err:
5458 + if (ctx_pool)
5459 + dma_pool_destroy(ctx_pool);
5460 + if (buffer_pool)
5461 + dma_pool_destroy(buffer_pool);
5462 + npe_release(npe_c);
5463 + return ret;
5464 +}
5465 +
5466 +static void release_ixp_crypto(void)
5467 +{
5468 + qmgr_disable_irq(RECV_QID);
5469 + tasklet_kill(&crypto_done_tasklet);
5470 +
5471 + qmgr_release_queue(SEND_QID);
5472 + qmgr_release_queue(RECV_QID);
5473 +
5474 + dma_pool_destroy(ctx_pool);
5475 + dma_pool_destroy(buffer_pool);
5476 +
5477 + npe_release(npe_c);
5478 +
5479 + if (crypt_virt) {
5480 + dma_free_coherent(dev,
5481 + NPE_QLEN_TOTAL * sizeof( struct crypt_ctl),
5482 + crypt_virt, crypt_phys);
5483 + }
5484 + return;
5485 +}
5486 +
5487 +static void reset_sa_dir(struct ix_sa_dir *dir)
5488 +{
5489 + memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5490 + dir->npe_ctx_idx = 0;
5491 + dir->npe_mode = 0;
5492 +}
5493 +
5494 +static int init_sa_dir(struct ix_sa_dir *dir)
5495 +{
5496 + dir->npe_ctx = dma_pool_alloc(ctx_pool, GFP_KERNEL, &dir->npe_ctx_phys);
5497 + if (!dir->npe_ctx) {
5498 + return -ENOMEM;
5499 + }
5500 + reset_sa_dir(dir);
5501 + return 0;
5502 +}
5503 +
5504 +static void free_sa_dir(struct ix_sa_dir *dir)
5505 +{
5506 + memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5507 + dma_pool_free(ctx_pool, dir->npe_ctx, dir->npe_ctx_phys);
5508 +}
5509 +
5510 +static int init_tfm(struct crypto_tfm *tfm)
5511 +{
5512 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5513 + int ret;
5514 +
5515 + atomic_set(&ctx->configuring, 0);
5516 + ret = init_sa_dir(&ctx->encrypt);
5517 + if (ret)
5518 + return ret;
5519 + ret = init_sa_dir(&ctx->decrypt);
5520 + if (ret) {
5521 + free_sa_dir(&ctx->encrypt);
5522 + }
5523 + return ret;
5524 +}
5525 +
5526 +static int init_tfm_ablk(struct crypto_tfm *tfm)
5527 +{
5528 + tfm->crt_ablkcipher.reqsize = sizeof(struct ablk_ctx);
5529 + return init_tfm(tfm);
5530 +}
5531 +
5532 +static int init_tfm_aead(struct crypto_tfm *tfm)
5533 +{
5534 + tfm->crt_aead.reqsize = sizeof(struct aead_ctx);
5535 + return init_tfm(tfm);
5536 +}
5537 +
5538 +static void exit_tfm(struct crypto_tfm *tfm)
5539 +{
5540 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5541 + free_sa_dir(&ctx->encrypt);
5542 + free_sa_dir(&ctx->decrypt);
5543 +}
5544 +
5545 +static int register_chain_var(struct crypto_tfm *tfm, u8 xpad, u32 target,
5546 + int init_len, u32 ctx_addr, const u8 *key, int key_len)
5547 +{
5548 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5549 + struct crypt_ctl *crypt;
5550 + struct buffer_desc *buf;
5551 + int i;
5552 + u8 *pad;
5553 + u32 pad_phys, buf_phys;
5554 +
5555 + BUILD_BUG_ON(NPE_CTX_LEN < HMAC_PAD_BLOCKLEN);
5556 + pad = dma_pool_alloc(ctx_pool, GFP_KERNEL, &pad_phys);
5557 + if (!pad)
5558 + return -ENOMEM;
5559 + buf = dma_pool_alloc(buffer_pool, GFP_KERNEL, &buf_phys);
5560 + if (!buf) {
5561 + dma_pool_free(ctx_pool, pad, pad_phys);
5562 + return -ENOMEM;
5563 + }
5564 + crypt = get_crypt_desc_emerg();
5565 + if (!crypt) {
5566 + dma_pool_free(ctx_pool, pad, pad_phys);
5567 + dma_pool_free(buffer_pool, buf, buf_phys);
5568 + return -EAGAIN;
5569 + }
5570 +
5571 + memcpy(pad, key, key_len);
5572 + memset(pad + key_len, 0, HMAC_PAD_BLOCKLEN - key_len);
5573 + for (i = 0; i < HMAC_PAD_BLOCKLEN; i++) {
5574 + pad[i] ^= xpad;
5575 + }
5576 +
5577 + crypt->data.tfm = tfm;
5578 + crypt->regist_ptr = pad;
5579 + crypt->regist_buf = buf;
5580 +
5581 + crypt->auth_offs = 0;
5582 + crypt->auth_len = HMAC_PAD_BLOCKLEN;
5583 + crypt->crypto_ctx = ctx_addr;
5584 + crypt->src_buf = buf_phys;
5585 + crypt->icv_rev_aes = target;
5586 + crypt->mode = NPE_OP_HASH_GEN_ICV;
5587 + crypt->init_len = init_len;
5588 + crypt->ctl_flags |= CTL_FLAG_GEN_ICV;
5589 +
5590 + buf->next = 0;
5591 + buf->buf_len = HMAC_PAD_BLOCKLEN;
5592 + buf->pkt_len = 0;
5593 + buf->phys_addr = pad_phys;
5594 +
5595 + atomic_inc(&ctx->configuring);
5596 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5597 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5598 + return 0;
5599 +}
5600 +
5601 +static int setup_auth(struct crypto_tfm *tfm, int encrypt, unsigned authsize,
5602 + const u8 *key, int key_len, unsigned digest_len)
5603 +{
5604 + u32 itarget, otarget, npe_ctx_addr;
5605 + unsigned char *cinfo;
5606 + int init_len, ret = 0;
5607 + u32 cfgword;
5608 + struct ix_sa_dir *dir;
5609 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5610 + const struct ix_hash_algo *algo;
5611 +
5612 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5613 + cinfo = dir->npe_ctx + dir->npe_ctx_idx;
5614 + algo = ix_hash(tfm);
5615 +
5616 + /* write cfg word to cryptinfo */
5617 + cfgword = algo->cfgword | ( authsize << 6); /* (authsize/4) << 8 */
5618 + *(u32*)cinfo = cpu_to_be32(cfgword);
5619 + cinfo += sizeof(cfgword);
5620 +
5621 + /* write ICV to cryptinfo */
5622 + memcpy(cinfo, algo->icv, digest_len);
5623 + cinfo += digest_len;
5624 +
5625 + itarget = dir->npe_ctx_phys + dir->npe_ctx_idx
5626 + + sizeof(algo->cfgword);
5627 + otarget = itarget + digest_len;
5628 + init_len = cinfo - (dir->npe_ctx + dir->npe_ctx_idx);
5629 + npe_ctx_addr = dir->npe_ctx_phys + dir->npe_ctx_idx;
5630 +
5631 + dir->npe_ctx_idx += init_len;
5632 + dir->npe_mode |= NPE_OP_HASH_ENABLE;
5633 +
5634 + if (!encrypt)
5635 + dir->npe_mode |= NPE_OP_HASH_VERIFY;
5636 +
5637 + ret = register_chain_var(tfm, HMAC_OPAD_VALUE, otarget,
5638 + init_len, npe_ctx_addr, key, key_len);
5639 + if (ret)
5640 + return ret;
5641 + return register_chain_var(tfm, HMAC_IPAD_VALUE, itarget,
5642 + init_len, npe_ctx_addr, key, key_len);
5643 +}
5644 +
5645 +static int gen_rev_aes_key(struct crypto_tfm *tfm)
5646 +{
5647 + struct crypt_ctl *crypt;
5648 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5649 + struct ix_sa_dir *dir = &ctx->decrypt;
5650 +
5651 + crypt = get_crypt_desc_emerg();
5652 + if (!crypt) {
5653 + return -EAGAIN;
5654 + }
5655 + *(u32*)dir->npe_ctx |= cpu_to_be32(CIPH_ENCR);
5656 +
5657 + crypt->data.tfm = tfm;
5658 + crypt->crypt_offs = 0;
5659 + crypt->crypt_len = AES_BLOCK128;
5660 + crypt->src_buf = 0;
5661 + crypt->crypto_ctx = dir->npe_ctx_phys;
5662 + crypt->icv_rev_aes = dir->npe_ctx_phys + sizeof(u32);
5663 + crypt->mode = NPE_OP_ENC_GEN_KEY;
5664 + crypt->init_len = dir->npe_ctx_idx;
5665 + crypt->ctl_flags |= CTL_FLAG_GEN_REVAES;
5666 +
5667 + atomic_inc(&ctx->configuring);
5668 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5669 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5670 + return 0;
5671 +}
5672 +
5673 +static int setup_cipher(struct crypto_tfm *tfm, int encrypt,
5674 + const u8 *key, int key_len)
5675 +{
5676 + u8 *cinfo;
5677 + u32 cipher_cfg;
5678 + u32 keylen_cfg = 0;
5679 + struct ix_sa_dir *dir;
5680 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5681 + u32 *flags = &tfm->crt_flags;
5682 +
5683 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5684 + cinfo = dir->npe_ctx;
5685 +
5686 + if (encrypt) {
5687 + cipher_cfg = cipher_cfg_enc(tfm);
5688 + dir->npe_mode |= NPE_OP_CRYPT_ENCRYPT;
5689 + } else {
5690 + cipher_cfg = cipher_cfg_dec(tfm);
5691 + }
5692 + if (cipher_cfg & MOD_AES) {
5693 + switch (key_len) {
5694 + case 16: keylen_cfg = MOD_AES128 | KEYLEN_128; break;
5695 + case 24: keylen_cfg = MOD_AES192 | KEYLEN_192; break;
5696 + case 32: keylen_cfg = MOD_AES256 | KEYLEN_256; break;
5697 + default:
5698 + *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
5699 + return -EINVAL;
5700 + }
5701 + cipher_cfg |= keylen_cfg;
5702 + } else if (cipher_cfg & MOD_3DES) {
5703 + const u32 *K = (const u32 *)key;
5704 + if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
5705 + !((K[2] ^ K[4]) | (K[3] ^ K[5]))))
5706 + {
5707 + *flags |= CRYPTO_TFM_RES_BAD_KEY_SCHED;
5708 + return -EINVAL;
5709 + }
5710 + } else {
5711 + u32 tmp[DES_EXPKEY_WORDS];
5712 + if (des_ekey(tmp, key) == 0) {
5713 + *flags |= CRYPTO_TFM_RES_WEAK_KEY;
5714 + }
5715 + }
5716 + /* write cfg word to cryptinfo */
5717 + *(u32*)cinfo = cpu_to_be32(cipher_cfg);
5718 + cinfo += sizeof(cipher_cfg);
5719 +
5720 + /* write cipher key to cryptinfo */
5721 + memcpy(cinfo, key, key_len);
5722 + /* NPE wants keylen set to DES3_EDE_KEY_SIZE even for single DES */
5723 + if (key_len < DES3_EDE_KEY_SIZE && !(cipher_cfg & MOD_AES)) {
5724 + memset(cinfo + key_len, 0, DES3_EDE_KEY_SIZE -key_len);
5725 + key_len = DES3_EDE_KEY_SIZE;
5726 + }
5727 + dir->npe_ctx_idx = sizeof(cipher_cfg) + key_len;
5728 + dir->npe_mode |= NPE_OP_CRYPT_ENABLE;
5729 + if ((cipher_cfg & MOD_AES) && !encrypt) {
5730 + return gen_rev_aes_key(tfm);
5731 + }
5732 + return 0;
5733 +}
5734 +
5735 +static int count_sg(struct scatterlist *sg, int nbytes)
5736 +{
5737 + int i;
5738 + for (i = 0; nbytes > 0; i++, sg = sg_next(sg))
5739 + nbytes -= sg->length;
5740 + return i;
5741 +}
5742 +
5743 +static struct buffer_desc *chainup_buffers(struct scatterlist *sg,
5744 + unsigned nbytes, struct buffer_desc *buf, gfp_t flags)
5745 +{
5746 + int nents = 0;
5747 +
5748 + while (nbytes > 0) {
5749 + struct buffer_desc *next_buf;
5750 + u32 next_buf_phys;
5751 + unsigned len = min(nbytes, sg_dma_len(sg));
5752 +
5753 + nents++;
5754 + nbytes -= len;
5755 + if (!buf->phys_addr) {
5756 + buf->phys_addr = sg_dma_address(sg);
5757 + buf->buf_len = len;
5758 + buf->next = NULL;
5759 + buf->phys_next = 0;
5760 + goto next;
5761 + }
5762 + /* Two consecutive chunks on one page may be handled by the old
5763 + * buffer descriptor, increased by the length of the new one
5764 + */
5765 + if (sg_dma_address(sg) == buf->phys_addr + buf->buf_len) {
5766 + buf->buf_len += len;
5767 + goto next;
5768 + }
5769 + next_buf = dma_pool_alloc(buffer_pool, flags, &next_buf_phys);
5770 + if (!next_buf)
5771 + return NULL;
5772 + buf->next = next_buf;
5773 + buf->phys_next = next_buf_phys;
5774 +
5775 + buf = next_buf;
5776 + buf->next = NULL;
5777 + buf->phys_next = 0;
5778 + buf->phys_addr = sg_dma_address(sg);
5779 + buf->buf_len = len;
5780 +next:
5781 + if (nbytes > 0) {
5782 + sg = sg_next(sg);
5783 + }
5784 + }
5785 + return buf;
5786 +}
5787 +
5788 +static int ablk_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5789 + unsigned int key_len)
5790 +{
5791 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5792 + u32 *flags = &tfm->base.crt_flags;
5793 + int ret;
5794 +
5795 + init_completion(&ctx->completion);
5796 + atomic_inc(&ctx->configuring);
5797 +
5798 + reset_sa_dir(&ctx->encrypt);
5799 + reset_sa_dir(&ctx->decrypt);
5800 +
5801 + ctx->encrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5802 + ctx->decrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5803 +
5804 + ret = setup_cipher(&tfm->base, 0, key, key_len);
5805 + if (ret)
5806 + goto out;
5807 + ret = setup_cipher(&tfm->base, 1, key, key_len);
5808 + if (ret)
5809 + goto out;
5810 +
5811 + if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
5812 + if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
5813 + ret = -EINVAL;
5814 + } else {
5815 + *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
5816 + }
5817 + }
5818 +out:
5819 + if (!atomic_dec_and_test(&ctx->configuring))
5820 + wait_for_completion(&ctx->completion);
5821 + return ret;
5822 +}
5823 +
5824 +static int ablk_rfc3686_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5825 + unsigned int key_len)
5826 +{
5827 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5828 +
5829 + /* the nonce is stored in bytes at end of key */
5830 + if (key_len < CTR_RFC3686_NONCE_SIZE)
5831 + return -EINVAL;
5832 +
5833 + memcpy(ctx->nonce, key + (key_len - CTR_RFC3686_NONCE_SIZE),
5834 + CTR_RFC3686_NONCE_SIZE);
5835 +
5836 + key_len -= CTR_RFC3686_NONCE_SIZE;
5837 + return ablk_setkey(tfm, key, key_len);
5838 +}
5839 +
5840 +static int ablk_perform(struct ablkcipher_request *req, int encrypt)
5841 +{
5842 + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5843 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5844 + unsigned ivsize = crypto_ablkcipher_ivsize(tfm);
5845 + int ret = -ENOMEM;
5846 + struct ix_sa_dir *dir;
5847 + struct crypt_ctl *crypt;
5848 + unsigned int nbytes = req->nbytes, nents;
5849 + enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5850 + struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5851 + gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
5852 + GFP_KERNEL : GFP_ATOMIC;
5853 +
5854 + if (qmgr_stat_full(SEND_QID))
5855 + return -EAGAIN;
5856 + if (atomic_read(&ctx->configuring))
5857 + return -EAGAIN;
5858 +
5859 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5860 +
5861 + crypt = get_crypt_desc();
5862 + if (!crypt)
5863 + return ret;
5864 +
5865 + crypt->data.ablk_req = req;
5866 + crypt->crypto_ctx = dir->npe_ctx_phys;
5867 + crypt->mode = dir->npe_mode;
5868 + crypt->init_len = dir->npe_ctx_idx;
5869 +
5870 + crypt->crypt_offs = 0;
5871 + crypt->crypt_len = nbytes;
5872 +
5873 + BUG_ON(ivsize && !req->info);
5874 + memcpy(crypt->iv, req->info, ivsize);
5875 + if (req->src != req->dst) {
5876 + crypt->mode |= NPE_OP_NOT_IN_PLACE;
5877 + nents = count_sg(req->dst, nbytes);
5878 + /* This was never tested by Intel
5879 + * for more than one dst buffer, I think. */
5880 + BUG_ON(nents != 1);
5881 + req_ctx->dst_nents = nents;
5882 + dma_map_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5883 + req_ctx->dst = dma_pool_alloc(buffer_pool, flags,&crypt->dst_buf);
5884 + if (!req_ctx->dst)
5885 + goto unmap_sg_dest;
5886 + req_ctx->dst->phys_addr = 0;
5887 + if (!chainup_buffers(req->dst, nbytes, req_ctx->dst, flags))
5888 + goto free_buf_dest;
5889 + src_direction = DMA_TO_DEVICE;
5890 + } else {
5891 + req_ctx->dst = NULL;
5892 + req_ctx->dst_nents = 0;
5893 + }
5894 + nents = count_sg(req->src, nbytes);
5895 + req_ctx->src_nents = nents;
5896 + dma_map_sg(dev, req->src, nents, src_direction);
5897 +
5898 + req_ctx->src = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
5899 + if (!req_ctx->src)
5900 + goto unmap_sg_src;
5901 + req_ctx->src->phys_addr = 0;
5902 + if (!chainup_buffers(req->src, nbytes, req_ctx->src, flags))
5903 + goto free_buf_src;
5904 +
5905 + crypt->ctl_flags |= CTL_FLAG_PERFORM_ABLK;
5906 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5907 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5908 + return -EINPROGRESS;
5909 +
5910 +free_buf_src:
5911 + free_buf_chain(req_ctx->src, crypt->src_buf);
5912 +unmap_sg_src:
5913 + dma_unmap_sg(dev, req->src, req_ctx->src_nents, src_direction);
5914 +free_buf_dest:
5915 + if (req->src != req->dst) {
5916 + free_buf_chain(req_ctx->dst, crypt->dst_buf);
5917 +unmap_sg_dest:
5918 + dma_unmap_sg(dev, req->src, req_ctx->dst_nents,
5919 + DMA_FROM_DEVICE);
5920 + }
5921 + crypt->ctl_flags = CTL_FLAG_UNUSED;
5922 + return ret;
5923 +}
5924 +
5925 +static int ablk_encrypt(struct ablkcipher_request *req)
5926 +{
5927 + return ablk_perform(req, 1);
5928 +}
5929 +
5930 +static int ablk_decrypt(struct ablkcipher_request *req)
5931 +{
5932 + return ablk_perform(req, 0);
5933 +}
5934 +
5935 +static int ablk_rfc3686_crypt(struct ablkcipher_request *req)
5936 +{
5937 + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5938 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5939 + u8 iv[CTR_RFC3686_BLOCK_SIZE];
5940 + u8 *info = req->info;
5941 + int ret;
5942 +
5943 + /* set up counter block */
5944 + memcpy(iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
5945 + memcpy(iv + CTR_RFC3686_NONCE_SIZE, info, CTR_RFC3686_IV_SIZE);
5946 +
5947 + /* initialize counter portion of counter block */
5948 + *(__be32 *)(iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
5949 + cpu_to_be32(1);
5950 +
5951 + req->info = iv;
5952 + ret = ablk_perform(req, 1);
5953 + req->info = info;
5954 + return ret;
5955 +}
5956 +
5957 +static int hmac_inconsistent(struct scatterlist *sg, unsigned start,
5958 + unsigned int nbytes)
5959 +{
5960 + int offset = 0;
5961 +
5962 + if (!nbytes)
5963 + return 0;
5964 +
5965 + for (;;) {
5966 + if (start < offset + sg->length)
5967 + break;
5968 +
5969 + offset += sg->length;
5970 + sg = sg_next(sg);
5971 + }
5972 + return (start + nbytes > offset + sg->length);
5973 +}
5974 +
5975 +static int aead_perform(struct aead_request *req, int encrypt,
5976 + int cryptoffset, int eff_cryptlen, u8 *iv)
5977 +{
5978 + struct crypto_aead *tfm = crypto_aead_reqtfm(req);
5979 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
5980 + unsigned ivsize = crypto_aead_ivsize(tfm);
5981 + unsigned authsize = crypto_aead_authsize(tfm);
5982 + int ret = -ENOMEM;
5983 + struct ix_sa_dir *dir;
5984 + struct crypt_ctl *crypt;
5985 + unsigned int cryptlen, nents;
5986 + struct buffer_desc *buf;
5987 + struct aead_ctx *req_ctx = aead_request_ctx(req);
5988 + gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
5989 + GFP_KERNEL : GFP_ATOMIC;
5990 +
5991 + if (qmgr_stat_full(SEND_QID))
5992 + return -EAGAIN;
5993 + if (atomic_read(&ctx->configuring))
5994 + return -EAGAIN;
5995 +
5996 + if (encrypt) {
5997 + dir = &ctx->encrypt;
5998 + cryptlen = req->cryptlen;
5999 + } else {
6000 + dir = &ctx->decrypt;
6001 + /* req->cryptlen includes the authsize when decrypting */
6002 + cryptlen = req->cryptlen -authsize;
6003 + eff_cryptlen -= authsize;
6004 + }
6005 + crypt = get_crypt_desc();
6006 + if (!crypt)
6007 + return ret;
6008 +
6009 + crypt->data.aead_req = req;
6010 + crypt->crypto_ctx = dir->npe_ctx_phys;
6011 + crypt->mode = dir->npe_mode;
6012 + crypt->init_len = dir->npe_ctx_idx;
6013 +
6014 + crypt->crypt_offs = cryptoffset;
6015 + crypt->crypt_len = eff_cryptlen;
6016 +
6017 + crypt->auth_offs = 0;
6018 + crypt->auth_len = req->assoclen + ivsize + cryptlen;
6019 + BUG_ON(ivsize && !req->iv);
6020 + memcpy(crypt->iv, req->iv, ivsize);
6021 +
6022 + if (req->src != req->dst) {
6023 + BUG(); /* -ENOTSUP because of my lazyness */
6024 + }
6025 +
6026 + req_ctx->buffer = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
6027 + if (!req_ctx->buffer)
6028 + goto out;
6029 + req_ctx->buffer->phys_addr = 0;
6030 + /* ASSOC data */
6031 + nents = count_sg(req->assoc, req->assoclen);
6032 + req_ctx->assoc_nents = nents;
6033 + dma_map_sg(dev, req->assoc, nents, DMA_TO_DEVICE);
6034 + buf = chainup_buffers(req->assoc, req->assoclen, req_ctx->buffer,flags);
6035 + if (!buf)
6036 + goto unmap_sg_assoc;
6037 + /* IV */
6038 + sg_init_table(&req_ctx->ivlist, 1);
6039 + sg_set_buf(&req_ctx->ivlist, iv, ivsize);
6040 + dma_map_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6041 + buf = chainup_buffers(&req_ctx->ivlist, ivsize, buf, flags);
6042 + if (!buf)
6043 + goto unmap_sg_iv;
6044 + if (unlikely(hmac_inconsistent(req->src, cryptlen, authsize))) {
6045 + /* The 12 hmac bytes are scattered,
6046 + * we need to copy them into a safe buffer */
6047 + req_ctx->hmac_virt = dma_pool_alloc(buffer_pool, flags,
6048 + &crypt->icv_rev_aes);
6049 + if (unlikely(!req_ctx->hmac_virt))
6050 + goto unmap_sg_iv;
6051 + if (!encrypt) {
6052 + scatterwalk_map_and_copy(req_ctx->hmac_virt,
6053 + req->src, cryptlen, authsize, 0);
6054 + }
6055 + req_ctx->encrypt = encrypt;
6056 + } else {
6057 + req_ctx->hmac_virt = NULL;
6058 + }
6059 + /* Crypt */
6060 + nents = count_sg(req->src, cryptlen + authsize);
6061 + req_ctx->src_nents = nents;
6062 + dma_map_sg(dev, req->src, nents, DMA_BIDIRECTIONAL);
6063 + buf = chainup_buffers(req->src, cryptlen + authsize, buf, flags);
6064 + if (!buf)
6065 + goto unmap_sg_src;
6066 + if (!req_ctx->hmac_virt) {
6067 + crypt->icv_rev_aes = buf->phys_addr + buf->buf_len - authsize;
6068 + }
6069 + crypt->ctl_flags |= CTL_FLAG_PERFORM_AEAD;
6070 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
6071 + BUG_ON(qmgr_stat_overflow(SEND_QID));
6072 + return -EINPROGRESS;
6073 +unmap_sg_src:
6074 + dma_unmap_sg(dev, req->src, req_ctx->src_nents, DMA_BIDIRECTIONAL);
6075 + if (req_ctx->hmac_virt) {
6076 + dma_pool_free(buffer_pool, req_ctx->hmac_virt,
6077 + crypt->icv_rev_aes);
6078 + }
6079 +unmap_sg_iv:
6080 + dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6081 +unmap_sg_assoc:
6082 + dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents, DMA_TO_DEVICE);
6083 + free_buf_chain(req_ctx->buffer, crypt->src_buf);
6084 +out:
6085 + crypt->ctl_flags = CTL_FLAG_UNUSED;
6086 + return ret;
6087 +}
6088 +
6089 +static int aead_setup(struct crypto_aead *tfm, unsigned int authsize)
6090 +{
6091 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6092 + u32 *flags = &tfm->base.crt_flags;
6093 + unsigned digest_len = crypto_aead_alg(tfm)->maxauthsize;
6094 + int ret;
6095 +
6096 + if (!ctx->enckey_len && !ctx->authkey_len)
6097 + return 0;
6098 + init_completion(&ctx->completion);
6099 + atomic_inc(&ctx->configuring);
6100 +
6101 + reset_sa_dir(&ctx->encrypt);
6102 + reset_sa_dir(&ctx->decrypt);
6103 +
6104 + ret = setup_cipher(&tfm->base, 0, ctx->enckey, ctx->enckey_len);
6105 + if (ret)
6106 + goto out;
6107 + ret = setup_cipher(&tfm->base, 1, ctx->enckey, ctx->enckey_len);
6108 + if (ret)
6109 + goto out;
6110 + ret = setup_auth(&tfm->base, 0, authsize, ctx->authkey,
6111 + ctx->authkey_len, digest_len);
6112 + if (ret)
6113 + goto out;
6114 + ret = setup_auth(&tfm->base, 1, authsize, ctx->authkey,
6115 + ctx->authkey_len, digest_len);
6116 + if (ret)
6117 + goto out;
6118 +
6119 + if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
6120 + if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
6121 + ret = -EINVAL;
6122 + goto out;
6123 + } else {
6124 + *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
6125 + }
6126 + }
6127 +out:
6128 + if (!atomic_dec_and_test(&ctx->configuring))
6129 + wait_for_completion(&ctx->completion);
6130 + return ret;
6131 +}
6132 +
6133 +static int aead_setauthsize(struct crypto_aead *tfm, unsigned int authsize)
6134 +{
6135 + int max = crypto_aead_alg(tfm)->maxauthsize >> 2;
6136 +
6137 + if ((authsize>>2) < 1 || (authsize>>2) > max || (authsize & 3))
6138 + return -EINVAL;
6139 + return aead_setup(tfm, authsize);
6140 +}
6141 +
6142 +static int aead_setkey(struct crypto_aead *tfm, const u8 *key,
6143 + unsigned int keylen)
6144 +{
6145 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6146 + struct rtattr *rta = (struct rtattr *)key;
6147 + struct crypto_authenc_key_param *param;
6148 +
6149 + if (!RTA_OK(rta, keylen))
6150 + goto badkey;
6151 + if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
6152 + goto badkey;
6153 + if (RTA_PAYLOAD(rta) < sizeof(*param))
6154 + goto badkey;
6155 +
6156 + param = RTA_DATA(rta);
6157 + ctx->enckey_len = be32_to_cpu(param->enckeylen);
6158 +
6159 + key += RTA_ALIGN(rta->rta_len);
6160 + keylen -= RTA_ALIGN(rta->rta_len);
6161 +
6162 + if (keylen < ctx->enckey_len)
6163 + goto badkey;
6164 +
6165 + ctx->authkey_len = keylen - ctx->enckey_len;
6166 + memcpy(ctx->enckey, key + ctx->authkey_len, ctx->enckey_len);
6167 + memcpy(ctx->authkey, key, ctx->authkey_len);
6168 +
6169 + return aead_setup(tfm, crypto_aead_authsize(tfm));
6170 +badkey:
6171 + ctx->enckey_len = 0;
6172 + crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
6173 + return -EINVAL;
6174 +}
6175 +
6176 +static int aead_encrypt(struct aead_request *req)
6177 +{
6178 + unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6179 + return aead_perform(req, 1, req->assoclen + ivsize,
6180 + req->cryptlen, req->iv);
6181 +}
6182 +
6183 +static int aead_decrypt(struct aead_request *req)
6184 +{
6185 + unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6186 + return aead_perform(req, 0, req->assoclen + ivsize,
6187 + req->cryptlen, req->iv);
6188 +}
6189 +
6190 +static int aead_givencrypt(struct aead_givcrypt_request *req)
6191 +{
6192 + struct crypto_aead *tfm = aead_givcrypt_reqtfm(req);
6193 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6194 + unsigned len, ivsize = crypto_aead_ivsize(tfm);
6195 + __be64 seq;
6196 +
6197 + /* copied from eseqiv.c */
6198 + if (!ctx->salted) {
6199 + get_random_bytes(ctx->salt, ivsize);
6200 + ctx->salted = 1;
6201 + }
6202 + memcpy(req->areq.iv, ctx->salt, ivsize);
6203 + len = ivsize;
6204 + if (ivsize > sizeof(u64)) {
6205 + memset(req->giv, 0, ivsize - sizeof(u64));
6206 + len = sizeof(u64);
6207 + }
6208 + seq = cpu_to_be64(req->seq);
6209 + memcpy(req->giv + ivsize - len, &seq, len);
6210 + return aead_perform(&req->areq, 1, req->areq.assoclen,
6211 + req->areq.cryptlen +ivsize, req->giv);
6212 +}
6213 +
6214 +static struct ixp_alg ixp4xx_algos[] = {
6215 +{
6216 + .crypto = {
6217 + .cra_name = "cbc(des)",
6218 + .cra_blocksize = DES_BLOCK_SIZE,
6219 + .cra_u = { .ablkcipher = {
6220 + .min_keysize = DES_KEY_SIZE,
6221 + .max_keysize = DES_KEY_SIZE,
6222 + .ivsize = DES_BLOCK_SIZE,
6223 + .geniv = "eseqiv",
6224 + }
6225 + }
6226 + },
6227 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6228 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6229 +
6230 +}, {
6231 + .crypto = {
6232 + .cra_name = "ecb(des)",
6233 + .cra_blocksize = DES_BLOCK_SIZE,
6234 + .cra_u = { .ablkcipher = {
6235 + .min_keysize = DES_KEY_SIZE,
6236 + .max_keysize = DES_KEY_SIZE,
6237 + }
6238 + }
6239 + },
6240 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_ECB | KEYLEN_192,
6241 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_ECB | KEYLEN_192,
6242 +}, {
6243 + .crypto = {
6244 + .cra_name = "cbc(des3_ede)",
6245 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6246 + .cra_u = { .ablkcipher = {
6247 + .min_keysize = DES3_EDE_KEY_SIZE,
6248 + .max_keysize = DES3_EDE_KEY_SIZE,
6249 + .ivsize = DES3_EDE_BLOCK_SIZE,
6250 + .geniv = "eseqiv",
6251 + }
6252 + }
6253 + },
6254 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6255 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6256 +}, {
6257 + .crypto = {
6258 + .cra_name = "ecb(des3_ede)",
6259 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6260 + .cra_u = { .ablkcipher = {
6261 + .min_keysize = DES3_EDE_KEY_SIZE,
6262 + .max_keysize = DES3_EDE_KEY_SIZE,
6263 + }
6264 + }
6265 + },
6266 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_ECB | KEYLEN_192,
6267 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_ECB | KEYLEN_192,
6268 +}, {
6269 + .crypto = {
6270 + .cra_name = "cbc(aes)",
6271 + .cra_blocksize = AES_BLOCK_SIZE,
6272 + .cra_u = { .ablkcipher = {
6273 + .min_keysize = AES_MIN_KEY_SIZE,
6274 + .max_keysize = AES_MAX_KEY_SIZE,
6275 + .ivsize = AES_BLOCK_SIZE,
6276 + .geniv = "eseqiv",
6277 + }
6278 + }
6279 + },
6280 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6281 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6282 +}, {
6283 + .crypto = {
6284 + .cra_name = "ecb(aes)",
6285 + .cra_blocksize = AES_BLOCK_SIZE,
6286 + .cra_u = { .ablkcipher = {
6287 + .min_keysize = AES_MIN_KEY_SIZE,
6288 + .max_keysize = AES_MAX_KEY_SIZE,
6289 + }
6290 + }
6291 + },
6292 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_ECB,
6293 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_ECB,
6294 +}, {
6295 + .crypto = {
6296 + .cra_name = "ctr(aes)",
6297 + .cra_blocksize = AES_BLOCK_SIZE,
6298 + .cra_u = { .ablkcipher = {
6299 + .min_keysize = AES_MIN_KEY_SIZE,
6300 + .max_keysize = AES_MAX_KEY_SIZE,
6301 + .ivsize = AES_BLOCK_SIZE,
6302 + .geniv = "eseqiv",
6303 + }
6304 + }
6305 + },
6306 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6307 + .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6308 +}, {
6309 + .crypto = {
6310 + .cra_name = "rfc3686(ctr(aes))",
6311 + .cra_blocksize = AES_BLOCK_SIZE,
6312 + .cra_u = { .ablkcipher = {
6313 + .min_keysize = AES_MIN_KEY_SIZE,
6314 + .max_keysize = AES_MAX_KEY_SIZE,
6315 + .ivsize = AES_BLOCK_SIZE,
6316 + .geniv = "eseqiv",
6317 + .setkey = ablk_rfc3686_setkey,
6318 + .encrypt = ablk_rfc3686_crypt,
6319 + .decrypt = ablk_rfc3686_crypt }
6320 + }
6321 + },
6322 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6323 + .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6324 +}, {
6325 + .crypto = {
6326 + .cra_name = "authenc(hmac(md5),cbc(des))",
6327 + .cra_blocksize = DES_BLOCK_SIZE,
6328 + .cra_u = { .aead = {
6329 + .ivsize = DES_BLOCK_SIZE,
6330 + .maxauthsize = MD5_DIGEST_SIZE,
6331 + }
6332 + }
6333 + },
6334 + .hash = &hash_alg_md5,
6335 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6336 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6337 +}, {
6338 + .crypto = {
6339 + .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
6340 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6341 + .cra_u = { .aead = {
6342 + .ivsize = DES3_EDE_BLOCK_SIZE,
6343 + .maxauthsize = MD5_DIGEST_SIZE,
6344 + }
6345 + }
6346 + },
6347 + .hash = &hash_alg_md5,
6348 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6349 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6350 +}, {
6351 + .crypto = {
6352 + .cra_name = "authenc(hmac(sha1),cbc(des))",
6353 + .cra_blocksize = DES_BLOCK_SIZE,
6354 + .cra_u = { .aead = {
6355 + .ivsize = DES_BLOCK_SIZE,
6356 + .maxauthsize = SHA1_DIGEST_SIZE,
6357 + }
6358 + }
6359 + },
6360 + .hash = &hash_alg_sha1,
6361 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6362 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6363 +}, {
6364 + .crypto = {
6365 + .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
6366 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6367 + .cra_u = { .aead = {
6368 + .ivsize = DES3_EDE_BLOCK_SIZE,
6369 + .maxauthsize = SHA1_DIGEST_SIZE,
6370 + }
6371 + }
6372 + },
6373 + .hash = &hash_alg_sha1,
6374 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6375 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6376 +}, {
6377 + .crypto = {
6378 + .cra_name = "authenc(hmac(md5),cbc(aes))",
6379 + .cra_blocksize = AES_BLOCK_SIZE,
6380 + .cra_u = { .aead = {
6381 + .ivsize = AES_BLOCK_SIZE,
6382 + .maxauthsize = MD5_DIGEST_SIZE,
6383 + }
6384 + }
6385 + },
6386 + .hash = &hash_alg_md5,
6387 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6388 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6389 +}, {
6390 + .crypto = {
6391 + .cra_name = "authenc(hmac(sha1),cbc(aes))",
6392 + .cra_blocksize = AES_BLOCK_SIZE,
6393 + .cra_u = { .aead = {
6394 + .ivsize = AES_BLOCK_SIZE,
6395 + .maxauthsize = SHA1_DIGEST_SIZE,
6396 + }
6397 + }
6398 + },
6399 + .hash = &hash_alg_sha1,
6400 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6401 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6402 +} };
6403 +
6404 +#define IXP_POSTFIX "-ixp4xx"
6405 +static int __init ixp_module_init(void)
6406 +{
6407 + int num = ARRAY_SIZE(ixp4xx_algos);
6408 + int i,err ;
6409 +
6410 + if (platform_device_register(&pseudo_dev))
6411 + return -ENODEV;
6412 +
6413 + spin_lock_init(&desc_lock);
6414 + spin_lock_init(&emerg_lock);
6415 +
6416 + err = init_ixp_crypto();
6417 + if (err) {
6418 + platform_device_unregister(&pseudo_dev);
6419 + return err;
6420 + }
6421 + for (i=0; i< num; i++) {
6422 + struct crypto_alg *cra = &ixp4xx_algos[i].crypto;
6423 +
6424 + if (snprintf(cra->cra_driver_name, CRYPTO_MAX_ALG_NAME,
6425 + "%s"IXP_POSTFIX, cra->cra_name) >=
6426 + CRYPTO_MAX_ALG_NAME)
6427 + {
6428 + continue;
6429 + }
6430 + if (!support_aes && (ixp4xx_algos[i].cfg_enc & MOD_AES)) {
6431 + continue;
6432 + }
6433 + if (!ixp4xx_algos[i].hash) {
6434 + /* block ciphers */
6435 + cra->cra_type = &crypto_ablkcipher_type;
6436 + cra->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
6437 + CRYPTO_ALG_ASYNC;
6438 + if (!cra->cra_ablkcipher.setkey)
6439 + cra->cra_ablkcipher.setkey = ablk_setkey;
6440 + if (!cra->cra_ablkcipher.encrypt)
6441 + cra->cra_ablkcipher.encrypt = ablk_encrypt;
6442 + if (!cra->cra_ablkcipher.decrypt)
6443 + cra->cra_ablkcipher.decrypt = ablk_decrypt;
6444 + cra->cra_init = init_tfm_ablk;
6445 + } else {
6446 + /* authenc */
6447 + cra->cra_type = &crypto_aead_type;
6448 + cra->cra_flags = CRYPTO_ALG_TYPE_AEAD |
6449 + CRYPTO_ALG_ASYNC;
6450 + cra->cra_aead.setkey = aead_setkey;
6451 + cra->cra_aead.setauthsize = aead_setauthsize;
6452 + cra->cra_aead.encrypt = aead_encrypt;
6453 + cra->cra_aead.decrypt = aead_decrypt;
6454 + cra->cra_aead.givencrypt = aead_givencrypt;
6455 + cra->cra_init = init_tfm_aead;
6456 + }
6457 + cra->cra_ctxsize = sizeof(struct ixp_ctx);
6458 + cra->cra_module = THIS_MODULE;
6459 + cra->cra_alignmask = 3;
6460 + cra->cra_priority = 300;
6461 + cra->cra_exit = exit_tfm;
6462 + if (crypto_register_alg(cra))
6463 + printk(KERN_ERR "Failed to register '%s'\n",
6464 + cra->cra_name);
6465 + else
6466 + ixp4xx_algos[i].registered = 1;
6467 + }
6468 + return 0;
6469 +}
6470 +
6471 +static void __exit ixp_module_exit(void)
6472 +{
6473 + int num = ARRAY_SIZE(ixp4xx_algos);
6474 + int i;
6475 +
6476 + for (i=0; i< num; i++) {
6477 + if (ixp4xx_algos[i].registered)
6478 + crypto_unregister_alg(&ixp4xx_algos[i].crypto);
6479 + }
6480 + release_ixp_crypto();
6481 + platform_device_unregister(&pseudo_dev);
6482 +}
6483 +
6484 +module_init(ixp_module_init);
6485 +module_exit(ixp_module_exit);
6486 +
6487 +MODULE_LICENSE("GPL");
6488 +MODULE_AUTHOR("Christian Hohnstaedt <chohnstaedt@innominate.com>");
6489 +MODULE_DESCRIPTION("IXP4xx hardware crypto");
6490 +
6491 --- a/drivers/crypto/padlock-aes.c
6492 +++ b/drivers/crypto/padlock-aes.c
6493 @@ -385,12 +385,12 @@
6494 int ret;
6495
6496 if (!cpu_has_xcrypt) {
6497 - printk(KERN_ERR PFX "VIA PadLock not detected.\n");
6498 + printk(KERN_NOTICE PFX "VIA PadLock not detected.\n");
6499 return -ENODEV;
6500 }
6501
6502 if (!cpu_has_xcrypt_enabled) {
6503 - printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6504 + printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6505 return -ENODEV;
6506 }
6507
6508 --- a/drivers/crypto/padlock-sha.c
6509 +++ b/drivers/crypto/padlock-sha.c
6510 @@ -254,12 +254,12 @@
6511 int rc = -ENODEV;
6512
6513 if (!cpu_has_phe) {
6514 - printk(KERN_ERR PFX "VIA PadLock Hash Engine not detected.\n");
6515 + printk(KERN_NOTICE PFX "VIA PadLock Hash Engine not detected.\n");
6516 return -ENODEV;
6517 }
6518
6519 if (!cpu_has_phe_enabled) {
6520 - printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6521 + printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6522 return -ENODEV;
6523 }
6524
6525 --- /dev/null
6526 +++ b/drivers/crypto/talitos.c
6527 @@ -0,0 +1,1597 @@
6528 +/*
6529 + * talitos - Freescale Integrated Security Engine (SEC) device driver
6530 + *
6531 + * Copyright (c) 2008 Freescale Semiconductor, Inc.
6532 + *
6533 + * Scatterlist Crypto API glue code copied from files with the following:
6534 + * Copyright (c) 2006-2007 Herbert Xu <herbert@gondor.apana.org.au>
6535 + *
6536 + * Crypto algorithm registration code copied from hifn driver:
6537 + * 2007+ Copyright (c) Evgeniy Polyakov <johnpol@2ka.mipt.ru>
6538 + * All rights reserved.
6539 + *
6540 + * This program is free software; you can redistribute it and/or modify
6541 + * it under the terms of the GNU General Public License as published by
6542 + * the Free Software Foundation; either version 2 of the License, or
6543 + * (at your option) any later version.
6544 + *
6545 + * This program is distributed in the hope that it will be useful,
6546 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6547 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6548 + * GNU General Public License for more details.
6549 + *
6550 + * You should have received a copy of the GNU General Public License
6551 + * along with this program; if not, write to the Free Software
6552 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
6553 + */
6554 +
6555 +#include <linux/kernel.h>
6556 +#include <linux/module.h>
6557 +#include <linux/mod_devicetable.h>
6558 +#include <linux/device.h>
6559 +#include <linux/interrupt.h>
6560 +#include <linux/crypto.h>
6561 +#include <linux/hw_random.h>
6562 +#include <linux/of_platform.h>
6563 +#include <linux/dma-mapping.h>
6564 +#include <linux/io.h>
6565 +#include <linux/spinlock.h>
6566 +#include <linux/rtnetlink.h>
6567 +
6568 +#include <crypto/algapi.h>
6569 +#include <crypto/aes.h>
6570 +#include <crypto/des.h>
6571 +#include <crypto/sha.h>
6572 +#include <crypto/aead.h>
6573 +#include <crypto/authenc.h>
6574 +
6575 +#include "talitos.h"
6576 +
6577 +#define TALITOS_TIMEOUT 100000
6578 +#define TALITOS_MAX_DATA_LEN 65535
6579 +
6580 +#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
6581 +#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
6582 +#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
6583 +
6584 +/* descriptor pointer entry */
6585 +struct talitos_ptr {
6586 + __be16 len; /* length */
6587 + u8 j_extent; /* jump to sg link table and/or extent */
6588 + u8 eptr; /* extended address */
6589 + __be32 ptr; /* address */
6590 +};
6591 +
6592 +/* descriptor */
6593 +struct talitos_desc {
6594 + __be32 hdr; /* header high bits */
6595 + __be32 hdr_lo; /* header low bits */
6596 + struct talitos_ptr ptr[7]; /* ptr/len pair array */
6597 +};
6598 +
6599 +/**
6600 + * talitos_request - descriptor submission request
6601 + * @desc: descriptor pointer (kernel virtual)
6602 + * @dma_desc: descriptor's physical bus address
6603 + * @callback: whom to call when descriptor processing is done
6604 + * @context: caller context (optional)
6605 + */
6606 +struct talitos_request {
6607 + struct talitos_desc *desc;
6608 + dma_addr_t dma_desc;
6609 + void (*callback) (struct device *dev, struct talitos_desc *desc,
6610 + void *context, int error);
6611 + void *context;
6612 +};
6613 +
6614 +struct talitos_private {
6615 + struct device *dev;
6616 + struct of_device *ofdev;
6617 + void __iomem *reg;
6618 + int irq;
6619 +
6620 + /* SEC version geometry (from device tree node) */
6621 + unsigned int num_channels;
6622 + unsigned int chfifo_len;
6623 + unsigned int exec_units;
6624 + unsigned int desc_types;
6625 +
6626 + /* next channel to be assigned next incoming descriptor */
6627 + atomic_t last_chan;
6628 +
6629 + /* per-channel request fifo */
6630 + struct talitos_request **fifo;
6631 +
6632 + /*
6633 + * length of the request fifo
6634 + * fifo_len is chfifo_len rounded up to next power of 2
6635 + * so we can use bitwise ops to wrap
6636 + */
6637 + unsigned int fifo_len;
6638 +
6639 + /* per-channel index to next free descriptor request */
6640 + int *head;
6641 +
6642 + /* per-channel index to next in-progress/done descriptor request */
6643 + int *tail;
6644 +
6645 + /* per-channel request submission (head) and release (tail) locks */
6646 + spinlock_t *head_lock;
6647 + spinlock_t *tail_lock;
6648 +
6649 + /* request callback tasklet */
6650 + struct tasklet_struct done_task;
6651 + struct tasklet_struct error_task;
6652 +
6653 + /* list of registered algorithms */
6654 + struct list_head alg_list;
6655 +
6656 + /* hwrng device */
6657 + struct hwrng rng;
6658 +};
6659 +
6660 +/*
6661 + * map virtual single (contiguous) pointer to h/w descriptor pointer
6662 + */
6663 +static void map_single_talitos_ptr(struct device *dev,
6664 + struct talitos_ptr *talitos_ptr,
6665 + unsigned short len, void *data,
6666 + unsigned char extent,
6667 + enum dma_data_direction dir)
6668 +{
6669 + talitos_ptr->len = cpu_to_be16(len);
6670 + talitos_ptr->ptr = cpu_to_be32(dma_map_single(dev, data, len, dir));
6671 + talitos_ptr->j_extent = extent;
6672 +}
6673 +
6674 +/*
6675 + * unmap bus single (contiguous) h/w descriptor pointer
6676 + */
6677 +static void unmap_single_talitos_ptr(struct device *dev,
6678 + struct talitos_ptr *talitos_ptr,
6679 + enum dma_data_direction dir)
6680 +{
6681 + dma_unmap_single(dev, be32_to_cpu(talitos_ptr->ptr),
6682 + be16_to_cpu(talitos_ptr->len), dir);
6683 +}
6684 +
6685 +static int reset_channel(struct device *dev, int ch)
6686 +{
6687 + struct talitos_private *priv = dev_get_drvdata(dev);
6688 + unsigned int timeout = TALITOS_TIMEOUT;
6689 +
6690 + setbits32(priv->reg + TALITOS_CCCR(ch), TALITOS_CCCR_RESET);
6691 +
6692 + while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & TALITOS_CCCR_RESET)
6693 + && --timeout)
6694 + cpu_relax();
6695 +
6696 + if (timeout == 0) {
6697 + dev_err(dev, "failed to reset channel %d\n", ch);
6698 + return -EIO;
6699 + }
6700 +
6701 + /* set done writeback and IRQ */
6702 + setbits32(priv->reg + TALITOS_CCCR_LO(ch), TALITOS_CCCR_LO_CDWE |
6703 + TALITOS_CCCR_LO_CDIE);
6704 +
6705 + return 0;
6706 +}
6707 +
6708 +static int reset_device(struct device *dev)
6709 +{
6710 + struct talitos_private *priv = dev_get_drvdata(dev);
6711 + unsigned int timeout = TALITOS_TIMEOUT;
6712 +
6713 + setbits32(priv->reg + TALITOS_MCR, TALITOS_MCR_SWR);
6714 +
6715 + while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR)
6716 + && --timeout)
6717 + cpu_relax();
6718 +
6719 + if (timeout == 0) {
6720 + dev_err(dev, "failed to reset device\n");
6721 + return -EIO;
6722 + }
6723 +
6724 + return 0;
6725 +}
6726 +
6727 +/*
6728 + * Reset and initialize the device
6729 + */
6730 +static int init_device(struct device *dev)
6731 +{
6732 + struct talitos_private *priv = dev_get_drvdata(dev);
6733 + int ch, err;
6734 +
6735 + /*
6736 + * Master reset
6737 + * errata documentation: warning: certain SEC interrupts
6738 + * are not fully cleared by writing the MCR:SWR bit,
6739 + * set bit twice to completely reset
6740 + */
6741 + err = reset_device(dev);
6742 + if (err)
6743 + return err;
6744 +
6745 + err = reset_device(dev);
6746 + if (err)
6747 + return err;
6748 +
6749 + /* reset channels */
6750 + for (ch = 0; ch < priv->num_channels; ch++) {
6751 + err = reset_channel(dev, ch);
6752 + if (err)
6753 + return err;
6754 + }
6755 +
6756 + /* enable channel done and error interrupts */
6757 + setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
6758 + setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
6759 +
6760 + return 0;
6761 +}
6762 +
6763 +/**
6764 + * talitos_submit - submits a descriptor to the device for processing
6765 + * @dev: the SEC device to be used
6766 + * @desc: the descriptor to be processed by the device
6767 + * @callback: whom to call when processing is complete
6768 + * @context: a handle for use by caller (optional)
6769 + *
6770 + * desc must contain valid dma-mapped (bus physical) address pointers.
6771 + * callback must check err and feedback in descriptor header
6772 + * for device processing status.
6773 + */
6774 +static int talitos_submit(struct device *dev, struct talitos_desc *desc,
6775 + void (*callback)(struct device *dev,
6776 + struct talitos_desc *desc,
6777 + void *context, int error),
6778 + void *context)
6779 +{
6780 + struct talitos_private *priv = dev_get_drvdata(dev);
6781 + struct talitos_request *request;
6782 + unsigned long flags, ch;
6783 + int head;
6784 +
6785 + /* select done notification */
6786 + desc->hdr |= DESC_HDR_DONE_NOTIFY;
6787 +
6788 + /* emulate SEC's round-robin channel fifo polling scheme */
6789 + ch = atomic_inc_return(&priv->last_chan) & (priv->num_channels - 1);
6790 +
6791 + spin_lock_irqsave(&priv->head_lock[ch], flags);
6792 +
6793 + head = priv->head[ch];
6794 + request = &priv->fifo[ch][head];
6795 +
6796 + if (request->desc) {
6797 + /* request queue is full */
6798 + spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6799 + return -EAGAIN;
6800 + }
6801 +
6802 + /* map descriptor and save caller data */
6803 + request->dma_desc = dma_map_single(dev, desc, sizeof(*desc),
6804 + DMA_BIDIRECTIONAL);
6805 + request->callback = callback;
6806 + request->context = context;
6807 +
6808 + /* increment fifo head */
6809 + priv->head[ch] = (priv->head[ch] + 1) & (priv->fifo_len - 1);
6810 +
6811 + smp_wmb();
6812 + request->desc = desc;
6813 +
6814 + /* GO! */
6815 + wmb();
6816 + out_be32(priv->reg + TALITOS_FF_LO(ch), request->dma_desc);
6817 +
6818 + spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6819 +
6820 + return -EINPROGRESS;
6821 +}
6822 +
6823 +/*
6824 + * process what was done, notify callback of error if not
6825 + */
6826 +static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
6827 +{
6828 + struct talitos_private *priv = dev_get_drvdata(dev);
6829 + struct talitos_request *request, saved_req;
6830 + unsigned long flags;
6831 + int tail, status;
6832 +
6833 + spin_lock_irqsave(&priv->tail_lock[ch], flags);
6834 +
6835 + tail = priv->tail[ch];
6836 + while (priv->fifo[ch][tail].desc) {
6837 + request = &priv->fifo[ch][tail];
6838 +
6839 + /* descriptors with their done bits set don't get the error */
6840 + rmb();
6841 + if ((request->desc->hdr & DESC_HDR_DONE) == DESC_HDR_DONE)
6842 + status = 0;
6843 + else
6844 + if (!error)
6845 + break;
6846 + else
6847 + status = error;
6848 +
6849 + dma_unmap_single(dev, request->dma_desc,
6850 + sizeof(struct talitos_desc), DMA_BIDIRECTIONAL);
6851 +
6852 + /* copy entries so we can call callback outside lock */
6853 + saved_req.desc = request->desc;
6854 + saved_req.callback = request->callback;
6855 + saved_req.context = request->context;
6856 +
6857 + /* release request entry in fifo */
6858 + smp_wmb();
6859 + request->desc = NULL;
6860 +
6861 + /* increment fifo tail */
6862 + priv->tail[ch] = (tail + 1) & (priv->fifo_len - 1);
6863 +
6864 + spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6865 + saved_req.callback(dev, saved_req.desc, saved_req.context,
6866 + status);
6867 + /* channel may resume processing in single desc error case */
6868 + if (error && !reset_ch && status == error)
6869 + return;
6870 + spin_lock_irqsave(&priv->tail_lock[ch], flags);
6871 + tail = priv->tail[ch];
6872 + }
6873 +
6874 + spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6875 +}
6876 +
6877 +/*
6878 + * process completed requests for channels that have done status
6879 + */
6880 +static void talitos_done(unsigned long data)
6881 +{
6882 + struct device *dev = (struct device *)data;
6883 + struct talitos_private *priv = dev_get_drvdata(dev);
6884 + int ch;
6885 +
6886 + for (ch = 0; ch < priv->num_channels; ch++)
6887 + flush_channel(dev, ch, 0, 0);
6888 +}
6889 +
6890 +/*
6891 + * locate current (offending) descriptor
6892 + */
6893 +static struct talitos_desc *current_desc(struct device *dev, int ch)
6894 +{
6895 + struct talitos_private *priv = dev_get_drvdata(dev);
6896 + int tail = priv->tail[ch];
6897 + dma_addr_t cur_desc;
6898 +
6899 + cur_desc = in_be32(priv->reg + TALITOS_CDPR_LO(ch));
6900 +
6901 + while (priv->fifo[ch][tail].dma_desc != cur_desc) {
6902 + tail = (tail + 1) & (priv->fifo_len - 1);
6903 + if (tail == priv->tail[ch]) {
6904 + dev_err(dev, "couldn't locate current descriptor\n");
6905 + return NULL;
6906 + }
6907 + }
6908 +
6909 + return priv->fifo[ch][tail].desc;
6910 +}
6911 +
6912 +/*
6913 + * user diagnostics; report root cause of error based on execution unit status
6914 + */
6915 +static void report_eu_error(struct device *dev, int ch, struct talitos_desc *desc)
6916 +{
6917 + struct talitos_private *priv = dev_get_drvdata(dev);
6918 + int i;
6919 +
6920 + switch (desc->hdr & DESC_HDR_SEL0_MASK) {
6921 + case DESC_HDR_SEL0_AFEU:
6922 + dev_err(dev, "AFEUISR 0x%08x_%08x\n",
6923 + in_be32(priv->reg + TALITOS_AFEUISR),
6924 + in_be32(priv->reg + TALITOS_AFEUISR_LO));
6925 + break;
6926 + case DESC_HDR_SEL0_DEU:
6927 + dev_err(dev, "DEUISR 0x%08x_%08x\n",
6928 + in_be32(priv->reg + TALITOS_DEUISR),
6929 + in_be32(priv->reg + TALITOS_DEUISR_LO));
6930 + break;
6931 + case DESC_HDR_SEL0_MDEUA:
6932 + case DESC_HDR_SEL0_MDEUB:
6933 + dev_err(dev, "MDEUISR 0x%08x_%08x\n",
6934 + in_be32(priv->reg + TALITOS_MDEUISR),
6935 + in_be32(priv->reg + TALITOS_MDEUISR_LO));
6936 + break;
6937 + case DESC_HDR_SEL0_RNG:
6938 + dev_err(dev, "RNGUISR 0x%08x_%08x\n",
6939 + in_be32(priv->reg + TALITOS_RNGUISR),
6940 + in_be32(priv->reg + TALITOS_RNGUISR_LO));
6941 + break;
6942 + case DESC_HDR_SEL0_PKEU:
6943 + dev_err(dev, "PKEUISR 0x%08x_%08x\n",
6944 + in_be32(priv->reg + TALITOS_PKEUISR),
6945 + in_be32(priv->reg + TALITOS_PKEUISR_LO));
6946 + break;
6947 + case DESC_HDR_SEL0_AESU:
6948 + dev_err(dev, "AESUISR 0x%08x_%08x\n",
6949 + in_be32(priv->reg + TALITOS_AESUISR),
6950 + in_be32(priv->reg + TALITOS_AESUISR_LO));
6951 + break;
6952 + case DESC_HDR_SEL0_CRCU:
6953 + dev_err(dev, "CRCUISR 0x%08x_%08x\n",
6954 + in_be32(priv->reg + TALITOS_CRCUISR),
6955 + in_be32(priv->reg + TALITOS_CRCUISR_LO));
6956 + break;
6957 + case DESC_HDR_SEL0_KEU:
6958 + dev_err(dev, "KEUISR 0x%08x_%08x\n",
6959 + in_be32(priv->reg + TALITOS_KEUISR),
6960 + in_be32(priv->reg + TALITOS_KEUISR_LO));
6961 + break;
6962 + }
6963 +
6964 + switch (desc->hdr & DESC_HDR_SEL1_MASK) {
6965 + case DESC_HDR_SEL1_MDEUA:
6966 + case DESC_HDR_SEL1_MDEUB:
6967 + dev_err(dev, "MDEUISR 0x%08x_%08x\n",
6968 + in_be32(priv->reg + TALITOS_MDEUISR),
6969 + in_be32(priv->reg + TALITOS_MDEUISR_LO));
6970 + break;
6971 + case DESC_HDR_SEL1_CRCU:
6972 + dev_err(dev, "CRCUISR 0x%08x_%08x\n",
6973 + in_be32(priv->reg + TALITOS_CRCUISR),
6974 + in_be32(priv->reg + TALITOS_CRCUISR_LO));
6975 + break;
6976 + }
6977 +
6978 + for (i = 0; i < 8; i++)
6979 + dev_err(dev, "DESCBUF 0x%08x_%08x\n",
6980 + in_be32(priv->reg + TALITOS_DESCBUF(ch) + 8*i),
6981 + in_be32(priv->reg + TALITOS_DESCBUF_LO(ch) + 8*i));
6982 +}
6983 +
6984 +/*
6985 + * recover from error interrupts
6986 + */
6987 +static void talitos_error(unsigned long data)
6988 +{
6989 + struct device *dev = (struct device *)data;
6990 + struct talitos_private *priv = dev_get_drvdata(dev);
6991 + unsigned int timeout = TALITOS_TIMEOUT;
6992 + int ch, error, reset_dev = 0, reset_ch = 0;
6993 + u32 isr, isr_lo, v, v_lo;
6994 +
6995 + isr = in_be32(priv->reg + TALITOS_ISR);
6996 + isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
6997 +
6998 + for (ch = 0; ch < priv->num_channels; ch++) {
6999 + /* skip channels without errors */
7000 + if (!(isr & (1 << (ch * 2 + 1))))
7001 + continue;
7002 +
7003 + error = -EINVAL;
7004 +
7005 + v = in_be32(priv->reg + TALITOS_CCPSR(ch));
7006 + v_lo = in_be32(priv->reg + TALITOS_CCPSR_LO(ch));
7007 +
7008 + if (v_lo & TALITOS_CCPSR_LO_DOF) {
7009 + dev_err(dev, "double fetch fifo overflow error\n");
7010 + error = -EAGAIN;
7011 + reset_ch = 1;
7012 + }
7013 + if (v_lo & TALITOS_CCPSR_LO_SOF) {
7014 + /* h/w dropped descriptor */
7015 + dev_err(dev, "single fetch fifo overflow error\n");
7016 + error = -EAGAIN;
7017 + }
7018 + if (v_lo & TALITOS_CCPSR_LO_MDTE)
7019 + dev_err(dev, "master data transfer error\n");
7020 + if (v_lo & TALITOS_CCPSR_LO_SGDLZ)
7021 + dev_err(dev, "s/g data length zero error\n");
7022 + if (v_lo & TALITOS_CCPSR_LO_FPZ)
7023 + dev_err(dev, "fetch pointer zero error\n");
7024 + if (v_lo & TALITOS_CCPSR_LO_IDH)
7025 + dev_err(dev, "illegal descriptor header error\n");
7026 + if (v_lo & TALITOS_CCPSR_LO_IEU)
7027 + dev_err(dev, "invalid execution unit error\n");
7028 + if (v_lo & TALITOS_CCPSR_LO_EU)
7029 + report_eu_error(dev, ch, current_desc(dev, ch));
7030 + if (v_lo & TALITOS_CCPSR_LO_GB)
7031 + dev_err(dev, "gather boundary error\n");
7032 + if (v_lo & TALITOS_CCPSR_LO_GRL)
7033 + dev_err(dev, "gather return/length error\n");
7034 + if (v_lo & TALITOS_CCPSR_LO_SB)
7035 + dev_err(dev, "scatter boundary error\n");
7036 + if (v_lo & TALITOS_CCPSR_LO_SRL)
7037 + dev_err(dev, "scatter return/length error\n");
7038 +
7039 + flush_channel(dev, ch, error, reset_ch);
7040 +
7041 + if (reset_ch) {
7042 + reset_channel(dev, ch);
7043 + } else {
7044 + setbits32(priv->reg + TALITOS_CCCR(ch),
7045 + TALITOS_CCCR_CONT);
7046 + setbits32(priv->reg + TALITOS_CCCR_LO(ch), 0);
7047 + while ((in_be32(priv->reg + TALITOS_CCCR(ch)) &
7048 + TALITOS_CCCR_CONT) && --timeout)
7049 + cpu_relax();
7050 + if (timeout == 0) {
7051 + dev_err(dev, "failed to restart channel %d\n",
7052 + ch);
7053 + reset_dev = 1;
7054 + }
7055 + }
7056 + }
7057 + if (reset_dev || isr & ~TALITOS_ISR_CHERR || isr_lo) {
7058 + dev_err(dev, "done overflow, internal time out, or rngu error: "
7059 + "ISR 0x%08x_%08x\n", isr, isr_lo);
7060 +
7061 + /* purge request queues */
7062 + for (ch = 0; ch < priv->num_channels; ch++)
7063 + flush_channel(dev, ch, -EIO, 1);
7064 +
7065 + /* reset and reinitialize the device */
7066 + init_device(dev);
7067 + }
7068 +}
7069 +
7070 +static irqreturn_t talitos_interrupt(int irq, void *data)
7071 +{
7072 + struct device *dev = data;
7073 + struct talitos_private *priv = dev_get_drvdata(dev);
7074 + u32 isr, isr_lo;
7075 +
7076 + isr = in_be32(priv->reg + TALITOS_ISR);
7077 + isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
7078 +
7079 + /* ack */
7080 + out_be32(priv->reg + TALITOS_ICR, isr);
7081 + out_be32(priv->reg + TALITOS_ICR_LO, isr_lo);
7082 +
7083 + if (unlikely((isr & ~TALITOS_ISR_CHDONE) || isr_lo))
7084 + talitos_error((unsigned long)data);
7085 + else
7086 + if (likely(isr & TALITOS_ISR_CHDONE))
7087 + tasklet_schedule(&priv->done_task);
7088 +
7089 + return (isr || isr_lo) ? IRQ_HANDLED : IRQ_NONE;
7090 +}
7091 +
7092 +/*
7093 + * hwrng
7094 + */
7095 +static int talitos_rng_data_present(struct hwrng *rng, int wait)
7096 +{
7097 + struct device *dev = (struct device *)rng->priv;
7098 + struct talitos_private *priv = dev_get_drvdata(dev);
7099 + u32 ofl;
7100 + int i;
7101 +
7102 + for (i = 0; i < 20; i++) {
7103 + ofl = in_be32(priv->reg + TALITOS_RNGUSR_LO) &
7104 + TALITOS_RNGUSR_LO_OFL;
7105 + if (ofl || !wait)
7106 + break;
7107 + udelay(10);
7108 + }
7109 +
7110 + return !!ofl;
7111 +}
7112 +
7113 +static int talitos_rng_data_read(struct hwrng *rng, u32 *data)
7114 +{
7115 + struct device *dev = (struct device *)rng->priv;
7116 + struct talitos_private *priv = dev_get_drvdata(dev);
7117 +
7118 + /* rng fifo requires 64-bit accesses */
7119 + *data = in_be32(priv->reg + TALITOS_RNGU_FIFO);
7120 + *data = in_be32(priv->reg + TALITOS_RNGU_FIFO_LO);
7121 +
7122 + return sizeof(u32);
7123 +}
7124 +
7125 +static int talitos_rng_init(struct hwrng *rng)
7126 +{
7127 + struct device *dev = (struct device *)rng->priv;
7128 + struct talitos_private *priv = dev_get_drvdata(dev);
7129 + unsigned int timeout = TALITOS_TIMEOUT;
7130 +
7131 + setbits32(priv->reg + TALITOS_RNGURCR_LO, TALITOS_RNGURCR_LO_SR);
7132 + while (!(in_be32(priv->reg + TALITOS_RNGUSR_LO) & TALITOS_RNGUSR_LO_RD)
7133 + && --timeout)
7134 + cpu_relax();
7135 + if (timeout == 0) {
7136 + dev_err(dev, "failed to reset rng hw\n");
7137 + return -ENODEV;
7138 + }
7139 +
7140 + /* start generating */
7141 + setbits32(priv->reg + TALITOS_RNGUDSR_LO, 0);
7142 +
7143 + return 0;
7144 +}
7145 +
7146 +static int talitos_register_rng(struct device *dev)
7147 +{
7148 + struct talitos_private *priv = dev_get_drvdata(dev);
7149 +
7150 + priv->rng.name = dev_driver_string(dev),
7151 + priv->rng.init = talitos_rng_init,
7152 + priv->rng.data_present = talitos_rng_data_present,
7153 + priv->rng.data_read = talitos_rng_data_read,
7154 + priv->rng.priv = (unsigned long)dev;
7155 +
7156 + return hwrng_register(&priv->rng);
7157 +}
7158 +
7159 +static void talitos_unregister_rng(struct device *dev)
7160 +{
7161 + struct talitos_private *priv = dev_get_drvdata(dev);
7162 +
7163 + hwrng_unregister(&priv->rng);
7164 +}
7165 +
7166 +/*
7167 + * crypto alg
7168 + */
7169 +#define TALITOS_CRA_PRIORITY 3000
7170 +#define TALITOS_MAX_KEY_SIZE 64
7171 +#define TALITOS_MAX_IV_LENGTH 16 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
7172 +
7173 +#define MD5_DIGEST_SIZE 16
7174 +
7175 +struct talitos_ctx {
7176 + struct device *dev;
7177 + __be32 desc_hdr_template;
7178 + u8 key[TALITOS_MAX_KEY_SIZE];
7179 + u8 iv[TALITOS_MAX_IV_LENGTH];
7180 + unsigned int keylen;
7181 + unsigned int enckeylen;
7182 + unsigned int authkeylen;
7183 + unsigned int authsize;
7184 +};
7185 +
7186 +static int aead_authenc_setauthsize(struct crypto_aead *authenc,
7187 + unsigned int authsize)
7188 +{
7189 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7190 +
7191 + ctx->authsize = authsize;
7192 +
7193 + return 0;
7194 +}
7195 +
7196 +static int aead_authenc_setkey(struct crypto_aead *authenc,
7197 + const u8 *key, unsigned int keylen)
7198 +{
7199 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7200 + struct rtattr *rta = (void *)key;
7201 + struct crypto_authenc_key_param *param;
7202 + unsigned int authkeylen;
7203 + unsigned int enckeylen;
7204 +
7205 + if (!RTA_OK(rta, keylen))
7206 + goto badkey;
7207 +
7208 + if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
7209 + goto badkey;
7210 +
7211 + if (RTA_PAYLOAD(rta) < sizeof(*param))
7212 + goto badkey;
7213 +
7214 + param = RTA_DATA(rta);
7215 + enckeylen = be32_to_cpu(param->enckeylen);
7216 +
7217 + key += RTA_ALIGN(rta->rta_len);
7218 + keylen -= RTA_ALIGN(rta->rta_len);
7219 +
7220 + if (keylen < enckeylen)
7221 + goto badkey;
7222 +
7223 + authkeylen = keylen - enckeylen;
7224 +
7225 + if (keylen > TALITOS_MAX_KEY_SIZE)
7226 + goto badkey;
7227 +
7228 + memcpy(&ctx->key, key, keylen);
7229 +
7230 + ctx->keylen = keylen;
7231 + ctx->enckeylen = enckeylen;
7232 + ctx->authkeylen = authkeylen;
7233 +
7234 + return 0;
7235 +
7236 +badkey:
7237 + crypto_aead_set_flags(authenc, CRYPTO_TFM_RES_BAD_KEY_LEN);
7238 + return -EINVAL;
7239 +}
7240 +
7241 +/*
7242 + * ipsec_esp_edesc - s/w-extended ipsec_esp descriptor
7243 + * @src_nents: number of segments in input scatterlist
7244 + * @dst_nents: number of segments in output scatterlist
7245 + * @dma_len: length of dma mapped link_tbl space
7246 + * @dma_link_tbl: bus physical address of link_tbl
7247 + * @desc: h/w descriptor
7248 + * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1)
7249 + *
7250 + * if decrypting (with authcheck), or either one of src_nents or dst_nents
7251 + * is greater than 1, an integrity check value is concatenated to the end
7252 + * of link_tbl data
7253 + */
7254 +struct ipsec_esp_edesc {
7255 + int src_nents;
7256 + int dst_nents;
7257 + int dma_len;
7258 + dma_addr_t dma_link_tbl;
7259 + struct talitos_desc desc;
7260 + struct talitos_ptr link_tbl[0];
7261 +};
7262 +
7263 +static void ipsec_esp_unmap(struct device *dev,
7264 + struct ipsec_esp_edesc *edesc,
7265 + struct aead_request *areq)
7266 +{
7267 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[6], DMA_FROM_DEVICE);
7268 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[3], DMA_TO_DEVICE);
7269 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[2], DMA_TO_DEVICE);
7270 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[0], DMA_TO_DEVICE);
7271 +
7272 + dma_unmap_sg(dev, areq->assoc, 1, DMA_TO_DEVICE);
7273 +
7274 + if (areq->src != areq->dst) {
7275 + dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7276 + DMA_TO_DEVICE);
7277 + dma_unmap_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7278 + DMA_FROM_DEVICE);
7279 + } else {
7280 + dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7281 + DMA_BIDIRECTIONAL);
7282 + }
7283 +
7284 + if (edesc->dma_len)
7285 + dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
7286 + DMA_BIDIRECTIONAL);
7287 +}
7288 +
7289 +/*
7290 + * ipsec_esp descriptor callbacks
7291 + */
7292 +static void ipsec_esp_encrypt_done(struct device *dev,
7293 + struct talitos_desc *desc, void *context,
7294 + int err)
7295 +{
7296 + struct aead_request *areq = context;
7297 + struct ipsec_esp_edesc *edesc =
7298 + container_of(desc, struct ipsec_esp_edesc, desc);
7299 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7300 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7301 + struct scatterlist *sg;
7302 + void *icvdata;
7303 +
7304 + ipsec_esp_unmap(dev, edesc, areq);
7305 +
7306 + /* copy the generated ICV to dst */
7307 + if (edesc->dma_len) {
7308 + icvdata = &edesc->link_tbl[edesc->src_nents +
7309 + edesc->dst_nents + 1];
7310 + sg = sg_last(areq->dst, edesc->dst_nents);
7311 + memcpy((char *)sg_virt(sg) + sg->length - ctx->authsize,
7312 + icvdata, ctx->authsize);
7313 + }
7314 +
7315 + kfree(edesc);
7316 +
7317 + aead_request_complete(areq, err);
7318 +}
7319 +
7320 +static void ipsec_esp_decrypt_done(struct device *dev,
7321 + struct talitos_desc *desc, void *context,
7322 + int err)
7323 +{
7324 + struct aead_request *req = context;
7325 + struct ipsec_esp_edesc *edesc =
7326 + container_of(desc, struct ipsec_esp_edesc, desc);
7327 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7328 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7329 + struct scatterlist *sg;
7330 + void *icvdata;
7331 +
7332 + ipsec_esp_unmap(dev, edesc, req);
7333 +
7334 + if (!err) {
7335 + /* auth check */
7336 + if (edesc->dma_len)
7337 + icvdata = &edesc->link_tbl[edesc->src_nents +
7338 + edesc->dst_nents + 1];
7339 + else
7340 + icvdata = &edesc->link_tbl[0];
7341 +
7342 + sg = sg_last(req->dst, edesc->dst_nents ? : 1);
7343 + err = memcmp(icvdata, (char *)sg_virt(sg) + sg->length -
7344 + ctx->authsize, ctx->authsize) ? -EBADMSG : 0;
7345 + }
7346 +
7347 + kfree(edesc);
7348 +
7349 + aead_request_complete(req, err);
7350 +}
7351 +
7352 +/*
7353 + * convert scatterlist to SEC h/w link table format
7354 + * stop at cryptlen bytes
7355 + */
7356 +static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
7357 + int cryptlen, struct talitos_ptr *link_tbl_ptr)
7358 +{
7359 + int n_sg = sg_count;
7360 +
7361 + while (n_sg--) {
7362 + link_tbl_ptr->ptr = cpu_to_be32(sg_dma_address(sg));
7363 + link_tbl_ptr->len = cpu_to_be16(sg_dma_len(sg));
7364 + link_tbl_ptr->j_extent = 0;
7365 + link_tbl_ptr++;
7366 + cryptlen -= sg_dma_len(sg);
7367 + sg = sg_next(sg);
7368 + }
7369 +
7370 + /* adjust (decrease) last one (or two) entry's len to cryptlen */
7371 + link_tbl_ptr--;
7372 + while (link_tbl_ptr->len <= (-cryptlen)) {
7373 + /* Empty this entry, and move to previous one */
7374 + cryptlen += be16_to_cpu(link_tbl_ptr->len);
7375 + link_tbl_ptr->len = 0;
7376 + sg_count--;
7377 + link_tbl_ptr--;
7378 + }
7379 + link_tbl_ptr->len = cpu_to_be16(be16_to_cpu(link_tbl_ptr->len)
7380 + + cryptlen);
7381 +
7382 + /* tag end of link table */
7383 + link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7384 +
7385 + return sg_count;
7386 +}
7387 +
7388 +/*
7389 + * fill in and submit ipsec_esp descriptor
7390 + */
7391 +static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
7392 + u8 *giv, u64 seq,
7393 + void (*callback) (struct device *dev,
7394 + struct talitos_desc *desc,
7395 + void *context, int error))
7396 +{
7397 + struct crypto_aead *aead = crypto_aead_reqtfm(areq);
7398 + struct talitos_ctx *ctx = crypto_aead_ctx(aead);
7399 + struct device *dev = ctx->dev;
7400 + struct talitos_desc *desc = &edesc->desc;
7401 + unsigned int cryptlen = areq->cryptlen;
7402 + unsigned int authsize = ctx->authsize;
7403 + unsigned int ivsize;
7404 + int sg_count;
7405 +
7406 + /* hmac key */
7407 + map_single_talitos_ptr(dev, &desc->ptr[0], ctx->authkeylen, &ctx->key,
7408 + 0, DMA_TO_DEVICE);
7409 + /* hmac data */
7410 + map_single_talitos_ptr(dev, &desc->ptr[1], sg_virt(areq->src) -
7411 + sg_virt(areq->assoc), sg_virt(areq->assoc), 0,
7412 + DMA_TO_DEVICE);
7413 + /* cipher iv */
7414 + ivsize = crypto_aead_ivsize(aead);
7415 + map_single_talitos_ptr(dev, &desc->ptr[2], ivsize, giv ?: areq->iv, 0,
7416 + DMA_TO_DEVICE);
7417 +
7418 + /* cipher key */
7419 + map_single_talitos_ptr(dev, &desc->ptr[3], ctx->enckeylen,
7420 + (char *)&ctx->key + ctx->authkeylen, 0,
7421 + DMA_TO_DEVICE);
7422 +
7423 + /*
7424 + * cipher in
7425 + * map and adjust cipher len to aead request cryptlen.
7426 + * extent is bytes of HMAC postpended to ciphertext,
7427 + * typically 12 for ipsec
7428 + */
7429 + desc->ptr[4].len = cpu_to_be16(cryptlen);
7430 + desc->ptr[4].j_extent = authsize;
7431 +
7432 + if (areq->src == areq->dst)
7433 + sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7434 + DMA_BIDIRECTIONAL);
7435 + else
7436 + sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7437 + DMA_TO_DEVICE);
7438 +
7439 + if (sg_count == 1) {
7440 + desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7441 + } else {
7442 + sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
7443 + &edesc->link_tbl[0]);
7444 + if (sg_count > 1) {
7445 + desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
7446 + desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
7447 + dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7448 + edesc->dma_len, DMA_BIDIRECTIONAL);
7449 + } else {
7450 + /* Only one segment now, so no link tbl needed */
7451 + desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7452 + }
7453 + }
7454 +
7455 + /* cipher out */
7456 + desc->ptr[5].len = cpu_to_be16(cryptlen);
7457 + desc->ptr[5].j_extent = authsize;
7458 +
7459 + if (areq->src != areq->dst) {
7460 + sg_count = dma_map_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7461 + DMA_FROM_DEVICE);
7462 + }
7463 +
7464 + if (sg_count == 1) {
7465 + desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
7466 + } else {
7467 + struct talitos_ptr *link_tbl_ptr =
7468 + &edesc->link_tbl[edesc->src_nents];
7469 + struct scatterlist *sg;
7470 +
7471 + desc->ptr[5].ptr = cpu_to_be32((struct talitos_ptr *)
7472 + edesc->dma_link_tbl +
7473 + edesc->src_nents);
7474 + if (areq->src == areq->dst) {
7475 + memcpy(link_tbl_ptr, &edesc->link_tbl[0],
7476 + edesc->src_nents * sizeof(struct talitos_ptr));
7477 + } else {
7478 + sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
7479 + link_tbl_ptr);
7480 + }
7481 + link_tbl_ptr += sg_count - 1;
7482 +
7483 + /* handle case where sg_last contains the ICV exclusively */
7484 + sg = sg_last(areq->dst, edesc->dst_nents);
7485 + if (sg->length == ctx->authsize)
7486 + link_tbl_ptr--;
7487 +
7488 + link_tbl_ptr->j_extent = 0;
7489 + link_tbl_ptr++;
7490 + link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7491 + link_tbl_ptr->len = cpu_to_be16(authsize);
7492 +
7493 + /* icv data follows link tables */
7494 + link_tbl_ptr->ptr = cpu_to_be32((struct talitos_ptr *)
7495 + edesc->dma_link_tbl +
7496 + edesc->src_nents +
7497 + edesc->dst_nents + 1);
7498 +
7499 + desc->ptr[5].j_extent |= DESC_PTR_LNKTBL_JUMP;
7500 + dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7501 + edesc->dma_len, DMA_BIDIRECTIONAL);
7502 + }
7503 +
7504 + /* iv out */
7505 + map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv, 0,
7506 + DMA_FROM_DEVICE);
7507 +
7508 + return talitos_submit(dev, desc, callback, areq);
7509 +}
7510 +
7511 +
7512 +/*
7513 + * derive number of elements in scatterlist
7514 + */
7515 +static int sg_count(struct scatterlist *sg_list, int nbytes)
7516 +{
7517 + struct scatterlist *sg = sg_list;
7518 + int sg_nents = 0;
7519 +
7520 + while (nbytes) {
7521 + sg_nents++;
7522 + nbytes -= sg->length;
7523 + sg = sg_next(sg);
7524 + }
7525 +
7526 + return sg_nents;
7527 +}
7528 +
7529 +/*
7530 + * allocate and map the ipsec_esp extended descriptor
7531 + */
7532 +static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
7533 + int icv_stashing)
7534 +{
7535 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7536 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7537 + struct ipsec_esp_edesc *edesc;
7538 + int src_nents, dst_nents, alloc_len, dma_len;
7539 +
7540 + if (areq->cryptlen + ctx->authsize > TALITOS_MAX_DATA_LEN) {
7541 + dev_err(ctx->dev, "cryptlen exceeds h/w max limit\n");
7542 + return ERR_PTR(-EINVAL);
7543 + }
7544 +
7545 + src_nents = sg_count(areq->src, areq->cryptlen + ctx->authsize);
7546 + src_nents = (src_nents == 1) ? 0 : src_nents;
7547 +
7548 + if (areq->dst == areq->src) {
7549 + dst_nents = src_nents;
7550 + } else {
7551 + dst_nents = sg_count(areq->dst, areq->cryptlen + ctx->authsize);
7552 + dst_nents = (dst_nents == 1) ? 0 : src_nents;
7553 + }
7554 +
7555 + /*
7556 + * allocate space for base edesc plus the link tables,
7557 + * allowing for a separate entry for the generated ICV (+ 1),
7558 + * and the ICV data itself
7559 + */
7560 + alloc_len = sizeof(struct ipsec_esp_edesc);
7561 + if (src_nents || dst_nents) {
7562 + dma_len = (src_nents + dst_nents + 1) *
7563 + sizeof(struct talitos_ptr) + ctx->authsize;
7564 + alloc_len += dma_len;
7565 + } else {
7566 + dma_len = 0;
7567 + alloc_len += icv_stashing ? ctx->authsize : 0;
7568 + }
7569 +
7570 + edesc = kmalloc(alloc_len, GFP_DMA);
7571 + if (!edesc) {
7572 + dev_err(ctx->dev, "could not allocate edescriptor\n");
7573 + return ERR_PTR(-ENOMEM);
7574 + }
7575 +
7576 + edesc->src_nents = src_nents;
7577 + edesc->dst_nents = dst_nents;
7578 + edesc->dma_len = dma_len;
7579 + edesc->dma_link_tbl = dma_map_single(ctx->dev, &edesc->link_tbl[0],
7580 + edesc->dma_len, DMA_BIDIRECTIONAL);
7581 +
7582 + return edesc;
7583 +}
7584 +
7585 +static int aead_authenc_encrypt(struct aead_request *req)
7586 +{
7587 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7588 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7589 + struct ipsec_esp_edesc *edesc;
7590 +
7591 + /* allocate extended descriptor */
7592 + edesc = ipsec_esp_edesc_alloc(req, 0);
7593 + if (IS_ERR(edesc))
7594 + return PTR_ERR(edesc);
7595 +
7596 + /* set encrypt */
7597 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7598 +
7599 + return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_encrypt_done);
7600 +}
7601 +
7602 +static int aead_authenc_decrypt(struct aead_request *req)
7603 +{
7604 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7605 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7606 + unsigned int authsize = ctx->authsize;
7607 + struct ipsec_esp_edesc *edesc;
7608 + struct scatterlist *sg;
7609 + void *icvdata;
7610 +
7611 + req->cryptlen -= authsize;
7612 +
7613 + /* allocate extended descriptor */
7614 + edesc = ipsec_esp_edesc_alloc(req, 1);
7615 + if (IS_ERR(edesc))
7616 + return PTR_ERR(edesc);
7617 +
7618 + /* stash incoming ICV for later cmp with ICV generated by the h/w */
7619 + if (edesc->dma_len)
7620 + icvdata = &edesc->link_tbl[edesc->src_nents +
7621 + edesc->dst_nents + 1];
7622 + else
7623 + icvdata = &edesc->link_tbl[0];
7624 +
7625 + sg = sg_last(req->src, edesc->src_nents ? : 1);
7626 +
7627 + memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
7628 + ctx->authsize);
7629 +
7630 + /* decrypt */
7631 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
7632 +
7633 + return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_done);
7634 +}
7635 +
7636 +static int aead_authenc_givencrypt(
7637 + struct aead_givcrypt_request *req)
7638 +{
7639 + struct aead_request *areq = &req->areq;
7640 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7641 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7642 + struct ipsec_esp_edesc *edesc;
7643 +
7644 + /* allocate extended descriptor */
7645 + edesc = ipsec_esp_edesc_alloc(areq, 0);
7646 + if (IS_ERR(edesc))
7647 + return PTR_ERR(edesc);
7648 +
7649 + /* set encrypt */
7650 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7651 +
7652 + memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
7653 +
7654 + return ipsec_esp(edesc, areq, req->giv, req->seq,
7655 + ipsec_esp_encrypt_done);
7656 +}
7657 +
7658 +struct talitos_alg_template {
7659 + char name[CRYPTO_MAX_ALG_NAME];
7660 + char driver_name[CRYPTO_MAX_ALG_NAME];
7661 + unsigned int blocksize;
7662 + struct aead_alg aead;
7663 + struct device *dev;
7664 + __be32 desc_hdr_template;
7665 +};
7666 +
7667 +static struct talitos_alg_template driver_algs[] = {
7668 + /* single-pass ipsec_esp descriptor */
7669 + {
7670 + .name = "authenc(hmac(sha1),cbc(aes))",
7671 + .driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
7672 + .blocksize = AES_BLOCK_SIZE,
7673 + .aead = {
7674 + .setkey = aead_authenc_setkey,
7675 + .setauthsize = aead_authenc_setauthsize,
7676 + .encrypt = aead_authenc_encrypt,
7677 + .decrypt = aead_authenc_decrypt,
7678 + .givencrypt = aead_authenc_givencrypt,
7679 + .geniv = "<built-in>",
7680 + .ivsize = AES_BLOCK_SIZE,
7681 + .maxauthsize = SHA1_DIGEST_SIZE,
7682 + },
7683 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7684 + DESC_HDR_SEL0_AESU |
7685 + DESC_HDR_MODE0_AESU_CBC |
7686 + DESC_HDR_SEL1_MDEUA |
7687 + DESC_HDR_MODE1_MDEU_INIT |
7688 + DESC_HDR_MODE1_MDEU_PAD |
7689 + DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7690 + },
7691 + {
7692 + .name = "authenc(hmac(sha1),cbc(des3_ede))",
7693 + .driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
7694 + .blocksize = DES3_EDE_BLOCK_SIZE,
7695 + .aead = {
7696 + .setkey = aead_authenc_setkey,
7697 + .setauthsize = aead_authenc_setauthsize,
7698 + .encrypt = aead_authenc_encrypt,
7699 + .decrypt = aead_authenc_decrypt,
7700 + .givencrypt = aead_authenc_givencrypt,
7701 + .geniv = "<built-in>",
7702 + .ivsize = DES3_EDE_BLOCK_SIZE,
7703 + .maxauthsize = SHA1_DIGEST_SIZE,
7704 + },
7705 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7706 + DESC_HDR_SEL0_DEU |
7707 + DESC_HDR_MODE0_DEU_CBC |
7708 + DESC_HDR_MODE0_DEU_3DES |
7709 + DESC_HDR_SEL1_MDEUA |
7710 + DESC_HDR_MODE1_MDEU_INIT |
7711 + DESC_HDR_MODE1_MDEU_PAD |
7712 + DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7713 + },
7714 + {
7715 + .name = "authenc(hmac(sha256),cbc(aes))",
7716 + .driver_name = "authenc-hmac-sha256-cbc-aes-talitos",
7717 + .blocksize = AES_BLOCK_SIZE,
7718 + .aead = {
7719 + .setkey = aead_authenc_setkey,
7720 + .setauthsize = aead_authenc_setauthsize,
7721 + .encrypt = aead_authenc_encrypt,
7722 + .decrypt = aead_authenc_decrypt,
7723 + .givencrypt = aead_authenc_givencrypt,
7724 + .geniv = "<built-in>",
7725 + .ivsize = AES_BLOCK_SIZE,
7726 + .maxauthsize = SHA256_DIGEST_SIZE,
7727 + },
7728 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7729 + DESC_HDR_SEL0_AESU |
7730 + DESC_HDR_MODE0_AESU_CBC |
7731 + DESC_HDR_SEL1_MDEUA |
7732 + DESC_HDR_MODE1_MDEU_INIT |
7733 + DESC_HDR_MODE1_MDEU_PAD |
7734 + DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7735 + },
7736 + {
7737 + .name = "authenc(hmac(sha256),cbc(des3_ede))",
7738 + .driver_name = "authenc-hmac-sha256-cbc-3des-talitos",
7739 + .blocksize = DES3_EDE_BLOCK_SIZE,
7740 + .aead = {
7741 + .setkey = aead_authenc_setkey,
7742 + .setauthsize = aead_authenc_setauthsize,
7743 + .encrypt = aead_authenc_encrypt,
7744 + .decrypt = aead_authenc_decrypt,
7745 + .givencrypt = aead_authenc_givencrypt,
7746 + .geniv = "<built-in>",
7747 + .ivsize = DES3_EDE_BLOCK_SIZE,
7748 + .maxauthsize = SHA256_DIGEST_SIZE,
7749 + },
7750 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7751 + DESC_HDR_SEL0_DEU |
7752 + DESC_HDR_MODE0_DEU_CBC |
7753 + DESC_HDR_MODE0_DEU_3DES |
7754 + DESC_HDR_SEL1_MDEUA |
7755 + DESC_HDR_MODE1_MDEU_INIT |
7756 + DESC_HDR_MODE1_MDEU_PAD |
7757 + DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7758 + },
7759 + {
7760 + .name = "authenc(hmac(md5),cbc(aes))",
7761 + .driver_name = "authenc-hmac-md5-cbc-aes-talitos",
7762 + .blocksize = AES_BLOCK_SIZE,
7763 + .aead = {
7764 + .setkey = aead_authenc_setkey,
7765 + .setauthsize = aead_authenc_setauthsize,
7766 + .encrypt = aead_authenc_encrypt,
7767 + .decrypt = aead_authenc_decrypt,
7768 + .givencrypt = aead_authenc_givencrypt,
7769 + .geniv = "<built-in>",
7770 + .ivsize = AES_BLOCK_SIZE,
7771 + .maxauthsize = MD5_DIGEST_SIZE,
7772 + },
7773 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7774 + DESC_HDR_SEL0_AESU |
7775 + DESC_HDR_MODE0_AESU_CBC |
7776 + DESC_HDR_SEL1_MDEUA |
7777 + DESC_HDR_MODE1_MDEU_INIT |
7778 + DESC_HDR_MODE1_MDEU_PAD |
7779 + DESC_HDR_MODE1_MDEU_MD5_HMAC,
7780 + },
7781 + {
7782 + .name = "authenc(hmac(md5),cbc(des3_ede))",
7783 + .driver_name = "authenc-hmac-md5-cbc-3des-talitos",
7784 + .blocksize = DES3_EDE_BLOCK_SIZE,
7785 + .aead = {
7786 + .setkey = aead_authenc_setkey,
7787 + .setauthsize = aead_authenc_setauthsize,
7788 + .encrypt = aead_authenc_encrypt,
7789 + .decrypt = aead_authenc_decrypt,
7790 + .givencrypt = aead_authenc_givencrypt,
7791 + .geniv = "<built-in>",
7792 + .ivsize = DES3_EDE_BLOCK_SIZE,
7793 + .maxauthsize = MD5_DIGEST_SIZE,
7794 + },
7795 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7796 + DESC_HDR_SEL0_DEU |
7797 + DESC_HDR_MODE0_DEU_CBC |
7798 + DESC_HDR_MODE0_DEU_3DES |
7799 + DESC_HDR_SEL1_MDEUA |
7800 + DESC_HDR_MODE1_MDEU_INIT |
7801 + DESC_HDR_MODE1_MDEU_PAD |
7802 + DESC_HDR_MODE1_MDEU_MD5_HMAC,
7803 + }
7804 +};
7805 +
7806 +struct talitos_crypto_alg {
7807 + struct list_head entry;
7808 + struct device *dev;
7809 + __be32 desc_hdr_template;
7810 + struct crypto_alg crypto_alg;
7811 +};
7812 +
7813 +static int talitos_cra_init(struct crypto_tfm *tfm)
7814 +{
7815 + struct crypto_alg *alg = tfm->__crt_alg;
7816 + struct talitos_crypto_alg *talitos_alg =
7817 + container_of(alg, struct talitos_crypto_alg, crypto_alg);
7818 + struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
7819 +
7820 + /* update context with ptr to dev */
7821 + ctx->dev = talitos_alg->dev;
7822 + /* copy descriptor header template value */
7823 + ctx->desc_hdr_template = talitos_alg->desc_hdr_template;
7824 +
7825 + /* random first IV */
7826 + get_random_bytes(ctx->iv, TALITOS_MAX_IV_LENGTH);
7827 +
7828 + return 0;
7829 +}
7830 +
7831 +/*
7832 + * given the alg's descriptor header template, determine whether descriptor
7833 + * type and primary/secondary execution units required match the hw
7834 + * capabilities description provided in the device tree node.
7835 + */
7836 +static int hw_supports(struct device *dev, __be32 desc_hdr_template)
7837 +{
7838 + struct talitos_private *priv = dev_get_drvdata(dev);
7839 + int ret;
7840 +
7841 + ret = (1 << DESC_TYPE(desc_hdr_template) & priv->desc_types) &&
7842 + (1 << PRIMARY_EU(desc_hdr_template) & priv->exec_units);
7843 +
7844 + if (SECONDARY_EU(desc_hdr_template))
7845 + ret = ret && (1 << SECONDARY_EU(desc_hdr_template)
7846 + & priv->exec_units);
7847 +
7848 + return ret;
7849 +}
7850 +
7851 +static int __devexit talitos_remove(struct of_device *ofdev)
7852 +{
7853 + struct device *dev = &ofdev->dev;
7854 + struct talitos_private *priv = dev_get_drvdata(dev);
7855 + struct talitos_crypto_alg *t_alg, *n;
7856 + int i;
7857 +
7858 + list_for_each_entry_safe(t_alg, n, &priv->alg_list, entry) {
7859 + crypto_unregister_alg(&t_alg->crypto_alg);
7860 + list_del(&t_alg->entry);
7861 + kfree(t_alg);
7862 + }
7863 +
7864 + if (hw_supports(dev, DESC_HDR_SEL0_RNG))
7865 + talitos_unregister_rng(dev);
7866 +
7867 + kfree(priv->tail);
7868 + kfree(priv->head);
7869 +
7870 + if (priv->fifo)
7871 + for (i = 0; i < priv->num_channels; i++)
7872 + kfree(priv->fifo[i]);
7873 +
7874 + kfree(priv->fifo);
7875 + kfree(priv->head_lock);
7876 + kfree(priv->tail_lock);
7877 +
7878 + if (priv->irq != NO_IRQ) {
7879 + free_irq(priv->irq, dev);
7880 + irq_dispose_mapping(priv->irq);
7881 + }
7882 +
7883 + tasklet_kill(&priv->done_task);
7884 + tasklet_kill(&priv->error_task);
7885 +
7886 + iounmap(priv->reg);
7887 +
7888 + dev_set_drvdata(dev, NULL);
7889 +
7890 + kfree(priv);
7891 +
7892 + return 0;
7893 +}
7894 +
7895 +static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
7896 + struct talitos_alg_template
7897 + *template)
7898 +{
7899 + struct talitos_crypto_alg *t_alg;
7900 + struct crypto_alg *alg;
7901 +
7902 + t_alg = kzalloc(sizeof(struct talitos_crypto_alg), GFP_KERNEL);
7903 + if (!t_alg)
7904 + return ERR_PTR(-ENOMEM);
7905 +
7906 + alg = &t_alg->crypto_alg;
7907 +
7908 + snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
7909 + snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
7910 + template->driver_name);
7911 + alg->cra_module = THIS_MODULE;
7912 + alg->cra_init = talitos_cra_init;
7913 + alg->cra_priority = TALITOS_CRA_PRIORITY;
7914 + alg->cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
7915 + alg->cra_blocksize = template->blocksize;
7916 + alg->cra_alignmask = 0;
7917 + alg->cra_type = &crypto_aead_type;
7918 + alg->cra_ctxsize = sizeof(struct talitos_ctx);
7919 + alg->cra_u.aead = template->aead;
7920 +
7921 + t_alg->desc_hdr_template = template->desc_hdr_template;
7922 + t_alg->dev = dev;
7923 +
7924 + return t_alg;
7925 +}
7926 +
7927 +static int talitos_probe(struct of_device *ofdev,
7928 + const struct of_device_id *match)
7929 +{
7930 + struct device *dev = &ofdev->dev;
7931 + struct device_node *np = ofdev->node;
7932 + struct talitos_private *priv;
7933 + const unsigned int *prop;
7934 + int i, err;
7935 +
7936 + priv = kzalloc(sizeof(struct talitos_private), GFP_KERNEL);
7937 + if (!priv)
7938 + return -ENOMEM;
7939 +
7940 + dev_set_drvdata(dev, priv);
7941 +
7942 + priv->ofdev = ofdev;
7943 +
7944 + tasklet_init(&priv->done_task, talitos_done, (unsigned long)dev);
7945 + tasklet_init(&priv->error_task, talitos_error, (unsigned long)dev);
7946 +
7947 + priv->irq = irq_of_parse_and_map(np, 0);
7948 +
7949 + if (priv->irq == NO_IRQ) {
7950 + dev_err(dev, "failed to map irq\n");
7951 + err = -EINVAL;
7952 + goto err_out;
7953 + }
7954 +
7955 + /* get the irq line */
7956 + err = request_irq(priv->irq, talitos_interrupt, 0,
7957 + dev_driver_string(dev), dev);
7958 + if (err) {
7959 + dev_err(dev, "failed to request irq %d\n", priv->irq);
7960 + irq_dispose_mapping(priv->irq);
7961 + priv->irq = NO_IRQ;
7962 + goto err_out;
7963 + }
7964 +
7965 + priv->reg = of_iomap(np, 0);
7966 + if (!priv->reg) {
7967 + dev_err(dev, "failed to of_iomap\n");
7968 + err = -ENOMEM;
7969 + goto err_out;
7970 + }
7971 +
7972 + /* get SEC version capabilities from device tree */
7973 + prop = of_get_property(np, "fsl,num-channels", NULL);
7974 + if (prop)
7975 + priv->num_channels = *prop;
7976 +
7977 + prop = of_get_property(np, "fsl,channel-fifo-len", NULL);
7978 + if (prop)
7979 + priv->chfifo_len = *prop;
7980 +
7981 + prop = of_get_property(np, "fsl,exec-units-mask", NULL);
7982 + if (prop)
7983 + priv->exec_units = *prop;
7984 +
7985 + prop = of_get_property(np, "fsl,descriptor-types-mask", NULL);
7986 + if (prop)
7987 + priv->desc_types = *prop;
7988 +
7989 + if (!is_power_of_2(priv->num_channels) || !priv->chfifo_len ||
7990 + !priv->exec_units || !priv->desc_types) {
7991 + dev_err(dev, "invalid property data in device tree node\n");
7992 + err = -EINVAL;
7993 + goto err_out;
7994 + }
7995 +
7996 + of_node_put(np);
7997 + np = NULL;
7998 +
7999 + priv->head_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8000 + GFP_KERNEL);
8001 + priv->tail_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8002 + GFP_KERNEL);
8003 + if (!priv->head_lock || !priv->tail_lock) {
8004 + dev_err(dev, "failed to allocate fifo locks\n");
8005 + err = -ENOMEM;
8006 + goto err_out;
8007 + }
8008 +
8009 + for (i = 0; i < priv->num_channels; i++) {
8010 + spin_lock_init(&priv->head_lock[i]);
8011 + spin_lock_init(&priv->tail_lock[i]);
8012 + }
8013 +
8014 + priv->fifo = kmalloc(sizeof(struct talitos_request *) *
8015 + priv->num_channels, GFP_KERNEL);
8016 + if (!priv->fifo) {
8017 + dev_err(dev, "failed to allocate request fifo\n");
8018 + err = -ENOMEM;
8019 + goto err_out;
8020 + }
8021 +
8022 + priv->fifo_len = roundup_pow_of_two(priv->chfifo_len);
8023 +
8024 + for (i = 0; i < priv->num_channels; i++) {
8025 + priv->fifo[i] = kzalloc(sizeof(struct talitos_request) *
8026 + priv->fifo_len, GFP_KERNEL);
8027 + if (!priv->fifo[i]) {
8028 + dev_err(dev, "failed to allocate request fifo %d\n", i);
8029 + err = -ENOMEM;
8030 + goto err_out;
8031 + }
8032 + }
8033 +
8034 + priv->head = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8035 + priv->tail = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8036 + if (!priv->head || !priv->tail) {
8037 + dev_err(dev, "failed to allocate request index space\n");
8038 + err = -ENOMEM;
8039 + goto err_out;
8040 + }
8041 +
8042 + /* reset and initialize the h/w */
8043 + err = init_device(dev);
8044 + if (err) {
8045 + dev_err(dev, "failed to initialize device\n");
8046 + goto err_out;
8047 + }
8048 +
8049 + /* register the RNG, if available */
8050 + if (hw_supports(dev, DESC_HDR_SEL0_RNG)) {
8051 + err = talitos_register_rng(dev);
8052 + if (err) {
8053 + dev_err(dev, "failed to register hwrng: %d\n", err);
8054 + goto err_out;
8055 + } else
8056 + dev_info(dev, "hwrng\n");
8057 + }
8058 +
8059 + /* register crypto algorithms the device supports */
8060 + INIT_LIST_HEAD(&priv->alg_list);
8061 +
8062 + for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
8063 + if (hw_supports(dev, driver_algs[i].desc_hdr_template)) {
8064 + struct talitos_crypto_alg *t_alg;
8065 +
8066 + t_alg = talitos_alg_alloc(dev, &driver_algs[i]);
8067 + if (IS_ERR(t_alg)) {
8068 + err = PTR_ERR(t_alg);
8069 + goto err_out;
8070 + }
8071 +
8072 + err = crypto_register_alg(&t_alg->crypto_alg);
8073 + if (err) {
8074 + dev_err(dev, "%s alg registration failed\n",
8075 + t_alg->crypto_alg.cra_driver_name);
8076 + kfree(t_alg);
8077 + } else {
8078 + list_add_tail(&t_alg->entry, &priv->alg_list);
8079 + dev_info(dev, "%s\n",
8080 + t_alg->crypto_alg.cra_driver_name);
8081 + }
8082 + }
8083 + }
8084 +
8085 + return 0;
8086 +
8087 +err_out:
8088 + talitos_remove(ofdev);
8089 + if (np)
8090 + of_node_put(np);
8091 +
8092 + return err;
8093 +}
8094 +
8095 +static struct of_device_id talitos_match[] = {
8096 + {
8097 + .compatible = "fsl,sec2.0",
8098 + },
8099 + {},
8100 +};
8101 +MODULE_DEVICE_TABLE(of, talitos_match);
8102 +
8103 +static struct of_platform_driver talitos_driver = {
8104 + .name = "talitos",
8105 + .match_table = talitos_match,
8106 + .probe = talitos_probe,
8107 + .remove = __devexit_p(talitos_remove),
8108 +};
8109 +
8110 +static int __init talitos_init(void)
8111 +{
8112 + return of_register_platform_driver(&talitos_driver);
8113 +}
8114 +module_init(talitos_init);
8115 +
8116 +static void __exit talitos_exit(void)
8117 +{
8118 + of_unregister_platform_driver(&talitos_driver);
8119 +}
8120 +module_exit(talitos_exit);
8121 +
8122 +MODULE_LICENSE("GPL");
8123 +MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>");
8124 +MODULE_DESCRIPTION("Freescale integrated security engine (SEC) driver");
8125 --- /dev/null
8126 +++ b/drivers/crypto/talitos.h
8127 @@ -0,0 +1,199 @@
8128 +/*
8129 + * Freescale SEC (talitos) device register and descriptor header defines
8130 + *
8131 + * Copyright (c) 2006-2008 Freescale Semiconductor, Inc.
8132 + *
8133 + * Redistribution and use in source and binary forms, with or without
8134 + * modification, are permitted provided that the following conditions
8135 + * are met:
8136 + *
8137 + * 1. Redistributions of source code must retain the above copyright
8138 + * notice, this list of conditions and the following disclaimer.
8139 + * 2. Redistributions in binary form must reproduce the above copyright
8140 + * notice, this list of conditions and the following disclaimer in the
8141 + * documentation and/or other materials provided with the distribution.
8142 + * 3. The name of the author may not be used to endorse or promote products
8143 + * derived from this software without specific prior written permission.
8144 + *
8145 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
8146 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8147 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
8148 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
8149 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
8150 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
8151 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
8152 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8153 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
8154 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8155 + *
8156 + */
8157 +
8158 +/*
8159 + * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
8160 + */
8161 +
8162 +/* global register offset addresses */
8163 +#define TALITOS_MCR 0x1030 /* master control register */
8164 +#define TALITOS_MCR_LO 0x1038
8165 +#define TALITOS_MCR_SWR 0x1 /* s/w reset */
8166 +#define TALITOS_IMR 0x1008 /* interrupt mask register */
8167 +#define TALITOS_IMR_INIT 0x10fff /* enable channel IRQs */
8168 +#define TALITOS_IMR_LO 0x100C
8169 +#define TALITOS_IMR_LO_INIT 0x20000 /* allow RNGU error IRQs */
8170 +#define TALITOS_ISR 0x1010 /* interrupt status register */
8171 +#define TALITOS_ISR_CHERR 0xaa /* channel errors mask */
8172 +#define TALITOS_ISR_CHDONE 0x55 /* channel done mask */
8173 +#define TALITOS_ISR_LO 0x1014
8174 +#define TALITOS_ICR 0x1018 /* interrupt clear register */
8175 +#define TALITOS_ICR_LO 0x101C
8176 +
8177 +/* channel register address stride */
8178 +#define TALITOS_CH_STRIDE 0x100
8179 +
8180 +/* channel configuration register */
8181 +#define TALITOS_CCCR(ch) (ch * TALITOS_CH_STRIDE + 0x1108)
8182 +#define TALITOS_CCCR_CONT 0x2 /* channel continue */
8183 +#define TALITOS_CCCR_RESET 0x1 /* channel reset */
8184 +#define TALITOS_CCCR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x110c)
8185 +#define TALITOS_CCCR_LO_CDWE 0x10 /* chan. done writeback enab. */
8186 +#define TALITOS_CCCR_LO_NT 0x4 /* notification type */
8187 +#define TALITOS_CCCR_LO_CDIE 0x2 /* channel done IRQ enable */
8188 +
8189 +/* CCPSR: channel pointer status register */
8190 +#define TALITOS_CCPSR(ch) (ch * TALITOS_CH_STRIDE + 0x1110)
8191 +#define TALITOS_CCPSR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1114)
8192 +#define TALITOS_CCPSR_LO_DOF 0x8000 /* double FF write oflow error */
8193 +#define TALITOS_CCPSR_LO_SOF 0x4000 /* single FF write oflow error */
8194 +#define TALITOS_CCPSR_LO_MDTE 0x2000 /* master data transfer error */
8195 +#define TALITOS_CCPSR_LO_SGDLZ 0x1000 /* s/g data len zero error */
8196 +#define TALITOS_CCPSR_LO_FPZ 0x0800 /* fetch ptr zero error */
8197 +#define TALITOS_CCPSR_LO_IDH 0x0400 /* illegal desc hdr error */
8198 +#define TALITOS_CCPSR_LO_IEU 0x0200 /* invalid EU error */
8199 +#define TALITOS_CCPSR_LO_EU 0x0100 /* EU error detected */
8200 +#define TALITOS_CCPSR_LO_GB 0x0080 /* gather boundary error */
8201 +#define TALITOS_CCPSR_LO_GRL 0x0040 /* gather return/length error */
8202 +#define TALITOS_CCPSR_LO_SB 0x0020 /* scatter boundary error */
8203 +#define TALITOS_CCPSR_LO_SRL 0x0010 /* scatter return/length error */
8204 +
8205 +/* channel fetch fifo register */
8206 +#define TALITOS_FF(ch) (ch * TALITOS_CH_STRIDE + 0x1148)
8207 +#define TALITOS_FF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x114c)
8208 +
8209 +/* current descriptor pointer register */
8210 +#define TALITOS_CDPR(ch) (ch * TALITOS_CH_STRIDE + 0x1140)
8211 +#define TALITOS_CDPR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1144)
8212 +
8213 +/* descriptor buffer register */
8214 +#define TALITOS_DESCBUF(ch) (ch * TALITOS_CH_STRIDE + 0x1180)
8215 +#define TALITOS_DESCBUF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1184)
8216 +
8217 +/* gather link table */
8218 +#define TALITOS_GATHER(ch) (ch * TALITOS_CH_STRIDE + 0x11c0)
8219 +#define TALITOS_GATHER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11c4)
8220 +
8221 +/* scatter link table */
8222 +#define TALITOS_SCATTER(ch) (ch * TALITOS_CH_STRIDE + 0x11e0)
8223 +#define TALITOS_SCATTER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11e4)
8224 +
8225 +/* execution unit interrupt status registers */
8226 +#define TALITOS_DEUISR 0x2030 /* DES unit */
8227 +#define TALITOS_DEUISR_LO 0x2034
8228 +#define TALITOS_AESUISR 0x4030 /* AES unit */
8229 +#define TALITOS_AESUISR_LO 0x4034
8230 +#define TALITOS_MDEUISR 0x6030 /* message digest unit */
8231 +#define TALITOS_MDEUISR_LO 0x6034
8232 +#define TALITOS_AFEUISR 0x8030 /* arc4 unit */
8233 +#define TALITOS_AFEUISR_LO 0x8034
8234 +#define TALITOS_RNGUISR 0xa030 /* random number unit */
8235 +#define TALITOS_RNGUISR_LO 0xa034
8236 +#define TALITOS_RNGUSR 0xa028 /* rng status */
8237 +#define TALITOS_RNGUSR_LO 0xa02c
8238 +#define TALITOS_RNGUSR_LO_RD 0x1 /* reset done */
8239 +#define TALITOS_RNGUSR_LO_OFL 0xff0000/* output FIFO length */
8240 +#define TALITOS_RNGUDSR 0xa010 /* data size */
8241 +#define TALITOS_RNGUDSR_LO 0xa014
8242 +#define TALITOS_RNGU_FIFO 0xa800 /* output FIFO */
8243 +#define TALITOS_RNGU_FIFO_LO 0xa804 /* output FIFO */
8244 +#define TALITOS_RNGURCR 0xa018 /* reset control */
8245 +#define TALITOS_RNGURCR_LO 0xa01c
8246 +#define TALITOS_RNGURCR_LO_SR 0x1 /* software reset */
8247 +#define TALITOS_PKEUISR 0xc030 /* public key unit */
8248 +#define TALITOS_PKEUISR_LO 0xc034
8249 +#define TALITOS_KEUISR 0xe030 /* kasumi unit */
8250 +#define TALITOS_KEUISR_LO 0xe034
8251 +#define TALITOS_CRCUISR 0xf030 /* cyclic redundancy check unit*/
8252 +#define TALITOS_CRCUISR_LO 0xf034
8253 +
8254 +/*
8255 + * talitos descriptor header (hdr) bits
8256 + */
8257 +
8258 +/* written back when done */
8259 +#define DESC_HDR_DONE __constant_cpu_to_be32(0xff000000)
8260 +
8261 +/* primary execution unit select */
8262 +#define DESC_HDR_SEL0_MASK __constant_cpu_to_be32(0xf0000000)
8263 +#define DESC_HDR_SEL0_AFEU __constant_cpu_to_be32(0x10000000)
8264 +#define DESC_HDR_SEL0_DEU __constant_cpu_to_be32(0x20000000)
8265 +#define DESC_HDR_SEL0_MDEUA __constant_cpu_to_be32(0x30000000)
8266 +#define DESC_HDR_SEL0_MDEUB __constant_cpu_to_be32(0xb0000000)
8267 +#define DESC_HDR_SEL0_RNG __constant_cpu_to_be32(0x40000000)
8268 +#define DESC_HDR_SEL0_PKEU __constant_cpu_to_be32(0x50000000)
8269 +#define DESC_HDR_SEL0_AESU __constant_cpu_to_be32(0x60000000)
8270 +#define DESC_HDR_SEL0_KEU __constant_cpu_to_be32(0x70000000)
8271 +#define DESC_HDR_SEL0_CRCU __constant_cpu_to_be32(0x80000000)
8272 +
8273 +/* primary execution unit mode (MODE0) and derivatives */
8274 +#define DESC_HDR_MODE0_ENCRYPT __constant_cpu_to_be32(0x00100000)
8275 +#define DESC_HDR_MODE0_AESU_CBC __constant_cpu_to_be32(0x00200000)
8276 +#define DESC_HDR_MODE0_DEU_CBC __constant_cpu_to_be32(0x00400000)
8277 +#define DESC_HDR_MODE0_DEU_3DES __constant_cpu_to_be32(0x00200000)
8278 +#define DESC_HDR_MODE0_MDEU_INIT __constant_cpu_to_be32(0x01000000)
8279 +#define DESC_HDR_MODE0_MDEU_HMAC __constant_cpu_to_be32(0x00800000)
8280 +#define DESC_HDR_MODE0_MDEU_PAD __constant_cpu_to_be32(0x00400000)
8281 +#define DESC_HDR_MODE0_MDEU_MD5 __constant_cpu_to_be32(0x00200000)
8282 +#define DESC_HDR_MODE0_MDEU_SHA256 __constant_cpu_to_be32(0x00100000)
8283 +#define DESC_HDR_MODE0_MDEU_SHA1 __constant_cpu_to_be32(0x00000000)
8284 +#define DESC_HDR_MODE0_MDEU_MD5_HMAC (DESC_HDR_MODE0_MDEU_MD5 | \
8285 + DESC_HDR_MODE0_MDEU_HMAC)
8286 +#define DESC_HDR_MODE0_MDEU_SHA256_HMAC (DESC_HDR_MODE0_MDEU_SHA256 | \
8287 + DESC_HDR_MODE0_MDEU_HMAC)
8288 +#define DESC_HDR_MODE0_MDEU_SHA1_HMAC (DESC_HDR_MODE0_MDEU_SHA1 | \
8289 + DESC_HDR_MODE0_MDEU_HMAC)
8290 +
8291 +/* secondary execution unit select (SEL1) */
8292 +#define DESC_HDR_SEL1_MASK __constant_cpu_to_be32(0x000f0000)
8293 +#define DESC_HDR_SEL1_MDEUA __constant_cpu_to_be32(0x00030000)
8294 +#define DESC_HDR_SEL1_MDEUB __constant_cpu_to_be32(0x000b0000)
8295 +#define DESC_HDR_SEL1_CRCU __constant_cpu_to_be32(0x00080000)
8296 +
8297 +/* secondary execution unit mode (MODE1) and derivatives */
8298 +#define DESC_HDR_MODE1_MDEU_INIT __constant_cpu_to_be32(0x00001000)
8299 +#define DESC_HDR_MODE1_MDEU_HMAC __constant_cpu_to_be32(0x00000800)
8300 +#define DESC_HDR_MODE1_MDEU_PAD __constant_cpu_to_be32(0x00000400)
8301 +#define DESC_HDR_MODE1_MDEU_MD5 __constant_cpu_to_be32(0x00000200)
8302 +#define DESC_HDR_MODE1_MDEU_SHA256 __constant_cpu_to_be32(0x00000100)
8303 +#define DESC_HDR_MODE1_MDEU_SHA1 __constant_cpu_to_be32(0x00000000)
8304 +#define DESC_HDR_MODE1_MDEU_MD5_HMAC (DESC_HDR_MODE1_MDEU_MD5 | \
8305 + DESC_HDR_MODE1_MDEU_HMAC)
8306 +#define DESC_HDR_MODE1_MDEU_SHA256_HMAC (DESC_HDR_MODE1_MDEU_SHA256 | \
8307 + DESC_HDR_MODE1_MDEU_HMAC)
8308 +#define DESC_HDR_MODE1_MDEU_SHA1_HMAC (DESC_HDR_MODE1_MDEU_SHA1 | \
8309 + DESC_HDR_MODE1_MDEU_HMAC)
8310 +
8311 +/* direction of overall data flow (DIR) */
8312 +#define DESC_HDR_DIR_INBOUND __constant_cpu_to_be32(0x00000002)
8313 +
8314 +/* request done notification (DN) */
8315 +#define DESC_HDR_DONE_NOTIFY __constant_cpu_to_be32(0x00000001)
8316 +
8317 +/* descriptor types */
8318 +#define DESC_HDR_TYPE_AESU_CTR_NONSNOOP __constant_cpu_to_be32(0 << 3)
8319 +#define DESC_HDR_TYPE_IPSEC_ESP __constant_cpu_to_be32(1 << 3)
8320 +#define DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU __constant_cpu_to_be32(2 << 3)
8321 +#define DESC_HDR_TYPE_HMAC_SNOOP_NO_AFEU __constant_cpu_to_be32(4 << 3)
8322 +
8323 +/* link table extent field bits */
8324 +#define DESC_PTR_LNKTBL_JUMP 0x80
8325 +#define DESC_PTR_LNKTBL_RETURN 0x02
8326 +#define DESC_PTR_LNKTBL_NEXT 0x01
8327 --- /dev/null
8328 +++ b/include/crypto/hash.h
8329 @@ -0,0 +1,154 @@
8330 +/*
8331 + * Hash: Hash algorithms under the crypto API
8332 + *
8333 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8334 + *
8335 + * This program is free software; you can redistribute it and/or modify it
8336 + * under the terms of the GNU General Public License as published by the Free
8337 + * Software Foundation; either version 2 of the License, or (at your option)
8338 + * any later version.
8339 + *
8340 + */
8341 +
8342 +#ifndef _CRYPTO_HASH_H
8343 +#define _CRYPTO_HASH_H
8344 +
8345 +#include <linux/crypto.h>
8346 +
8347 +struct crypto_ahash {
8348 + struct crypto_tfm base;
8349 +};
8350 +
8351 +static inline struct crypto_ahash *__crypto_ahash_cast(struct crypto_tfm *tfm)
8352 +{
8353 + return (struct crypto_ahash *)tfm;
8354 +}
8355 +
8356 +static inline struct crypto_ahash *crypto_alloc_ahash(const char *alg_name,
8357 + u32 type, u32 mask)
8358 +{
8359 + type &= ~CRYPTO_ALG_TYPE_MASK;
8360 + mask &= ~CRYPTO_ALG_TYPE_MASK;
8361 + type |= CRYPTO_ALG_TYPE_AHASH;
8362 + mask |= CRYPTO_ALG_TYPE_AHASH_MASK;
8363 +
8364 + return __crypto_ahash_cast(crypto_alloc_base(alg_name, type, mask));
8365 +}
8366 +
8367 +static inline struct crypto_tfm *crypto_ahash_tfm(struct crypto_ahash *tfm)
8368 +{
8369 + return &tfm->base;
8370 +}
8371 +
8372 +static inline void crypto_free_ahash(struct crypto_ahash *tfm)
8373 +{
8374 + crypto_free_tfm(crypto_ahash_tfm(tfm));
8375 +}
8376 +
8377 +static inline unsigned int crypto_ahash_alignmask(
8378 + struct crypto_ahash *tfm)
8379 +{
8380 + return crypto_tfm_alg_alignmask(crypto_ahash_tfm(tfm));
8381 +}
8382 +
8383 +static inline struct ahash_tfm *crypto_ahash_crt(struct crypto_ahash *tfm)
8384 +{
8385 + return &crypto_ahash_tfm(tfm)->crt_ahash;
8386 +}
8387 +
8388 +static inline unsigned int crypto_ahash_digestsize(struct crypto_ahash *tfm)
8389 +{
8390 + return crypto_ahash_crt(tfm)->digestsize;
8391 +}
8392 +
8393 +static inline u32 crypto_ahash_get_flags(struct crypto_ahash *tfm)
8394 +{
8395 + return crypto_tfm_get_flags(crypto_ahash_tfm(tfm));
8396 +}
8397 +
8398 +static inline void crypto_ahash_set_flags(struct crypto_ahash *tfm, u32 flags)
8399 +{
8400 + crypto_tfm_set_flags(crypto_ahash_tfm(tfm), flags);
8401 +}
8402 +
8403 +static inline void crypto_ahash_clear_flags(struct crypto_ahash *tfm, u32 flags)
8404 +{
8405 + crypto_tfm_clear_flags(crypto_ahash_tfm(tfm), flags);
8406 +}
8407 +
8408 +static inline struct crypto_ahash *crypto_ahash_reqtfm(
8409 + struct ahash_request *req)
8410 +{
8411 + return __crypto_ahash_cast(req->base.tfm);
8412 +}
8413 +
8414 +static inline unsigned int crypto_ahash_reqsize(struct crypto_ahash *tfm)
8415 +{
8416 + return crypto_ahash_crt(tfm)->reqsize;
8417 +}
8418 +
8419 +static inline int crypto_ahash_setkey(struct crypto_ahash *tfm,
8420 + const u8 *key, unsigned int keylen)
8421 +{
8422 + struct ahash_tfm *crt = crypto_ahash_crt(tfm);
8423 +
8424 + return crt->setkey(tfm, key, keylen);
8425 +}
8426 +
8427 +static inline int crypto_ahash_digest(struct ahash_request *req)
8428 +{
8429 + struct ahash_tfm *crt = crypto_ahash_crt(crypto_ahash_reqtfm(req));
8430 + return crt->digest(req);
8431 +}
8432 +
8433 +static inline void ahash_request_set_tfm(struct ahash_request *req,
8434 + struct crypto_ahash *tfm)
8435 +{
8436 + req->base.tfm = crypto_ahash_tfm(tfm);
8437 +}
8438 +
8439 +static inline struct ahash_request *ahash_request_alloc(
8440 + struct crypto_ahash *tfm, gfp_t gfp)
8441 +{
8442 + struct ahash_request *req;
8443 +
8444 + req = kmalloc(sizeof(struct ahash_request) +
8445 + crypto_ahash_reqsize(tfm), gfp);
8446 +
8447 + if (likely(req))
8448 + ahash_request_set_tfm(req, tfm);
8449 +
8450 + return req;
8451 +}
8452 +
8453 +static inline void ahash_request_free(struct ahash_request *req)
8454 +{
8455 + kfree(req);
8456 +}
8457 +
8458 +static inline struct ahash_request *ahash_request_cast(
8459 + struct crypto_async_request *req)
8460 +{
8461 + return container_of(req, struct ahash_request, base);
8462 +}
8463 +
8464 +static inline void ahash_request_set_callback(struct ahash_request *req,
8465 + u32 flags,
8466 + crypto_completion_t complete,
8467 + void *data)
8468 +{
8469 + req->base.complete = complete;
8470 + req->base.data = data;
8471 + req->base.flags = flags;
8472 +}
8473 +
8474 +static inline void ahash_request_set_crypt(struct ahash_request *req,
8475 + struct scatterlist *src, u8 *result,
8476 + unsigned int nbytes)
8477 +{
8478 + req->src = src;
8479 + req->nbytes = nbytes;
8480 + req->result = result;
8481 +}
8482 +
8483 +#endif /* _CRYPTO_HASH_H */
8484 --- /dev/null
8485 +++ b/include/crypto/internal/hash.h
8486 @@ -0,0 +1,78 @@
8487 +/*
8488 + * Hash algorithms.
8489 + *
8490 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8491 + *
8492 + * This program is free software; you can redistribute it and/or modify it
8493 + * under the terms of the GNU General Public License as published by the Free
8494 + * Software Foundation; either version 2 of the License, or (at your option)
8495 + * any later version.
8496 + *
8497 + */
8498 +
8499 +#ifndef _CRYPTO_INTERNAL_HASH_H
8500 +#define _CRYPTO_INTERNAL_HASH_H
8501 +
8502 +#include <crypto/algapi.h>
8503 +#include <crypto/hash.h>
8504 +
8505 +struct ahash_request;
8506 +struct scatterlist;
8507 +
8508 +struct crypto_hash_walk {
8509 + char *data;
8510 +
8511 + unsigned int offset;
8512 + unsigned int alignmask;
8513 +
8514 + struct page *pg;
8515 + unsigned int entrylen;
8516 +
8517 + unsigned int total;
8518 + struct scatterlist *sg;
8519 +
8520 + unsigned int flags;
8521 +};
8522 +
8523 +extern const struct crypto_type crypto_ahash_type;
8524 +
8525 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err);
8526 +int crypto_hash_walk_first(struct ahash_request *req,
8527 + struct crypto_hash_walk *walk);
8528 +
8529 +static inline void *crypto_ahash_ctx(struct crypto_ahash *tfm)
8530 +{
8531 + return crypto_tfm_ctx(&tfm->base);
8532 +}
8533 +
8534 +static inline struct ahash_alg *crypto_ahash_alg(
8535 + struct crypto_ahash *tfm)
8536 +{
8537 + return &crypto_ahash_tfm(tfm)->__crt_alg->cra_ahash;
8538 +}
8539 +
8540 +static inline int ahash_enqueue_request(struct crypto_queue *queue,
8541 + struct ahash_request *request)
8542 +{
8543 + return crypto_enqueue_request(queue, &request->base);
8544 +}
8545 +
8546 +static inline struct ahash_request *ahash_dequeue_request(
8547 + struct crypto_queue *queue)
8548 +{
8549 + return ahash_request_cast(crypto_dequeue_request(queue));
8550 +}
8551 +
8552 +static inline void *ahash_request_ctx(struct ahash_request *req)
8553 +{
8554 + return req->__ctx;
8555 +}
8556 +
8557 +static inline int ahash_tfm_in_queue(struct crypto_queue *queue,
8558 + struct crypto_ahash *tfm)
8559 +{
8560 + return crypto_tfm_in_queue(queue, crypto_ahash_tfm(tfm));
8561 +}
8562 +
8563 +#endif /* _CRYPTO_INTERNAL_HASH_H */
8564 +
8565 --- a/include/linux/crypto.h
8566 +++ b/include/linux/crypto.h
8567 @@ -30,15 +30,17 @@
8568 */
8569 #define CRYPTO_ALG_TYPE_MASK 0x0000000f
8570 #define CRYPTO_ALG_TYPE_CIPHER 0x00000001
8571 -#define CRYPTO_ALG_TYPE_DIGEST 0x00000002
8572 -#define CRYPTO_ALG_TYPE_HASH 0x00000003
8573 +#define CRYPTO_ALG_TYPE_COMPRESS 0x00000002
8574 +#define CRYPTO_ALG_TYPE_AEAD 0x00000003
8575 #define CRYPTO_ALG_TYPE_BLKCIPHER 0x00000004
8576 #define CRYPTO_ALG_TYPE_ABLKCIPHER 0x00000005
8577 #define CRYPTO_ALG_TYPE_GIVCIPHER 0x00000006
8578 -#define CRYPTO_ALG_TYPE_COMPRESS 0x00000008
8579 -#define CRYPTO_ALG_TYPE_AEAD 0x00000009
8580 +#define CRYPTO_ALG_TYPE_DIGEST 0x00000008
8581 +#define CRYPTO_ALG_TYPE_HASH 0x00000009
8582 +#define CRYPTO_ALG_TYPE_AHASH 0x0000000a
8583
8584 #define CRYPTO_ALG_TYPE_HASH_MASK 0x0000000e
8585 +#define CRYPTO_ALG_TYPE_AHASH_MASK 0x0000000c
8586 #define CRYPTO_ALG_TYPE_BLKCIPHER_MASK 0x0000000c
8587
8588 #define CRYPTO_ALG_LARVAL 0x00000010
8589 @@ -102,6 +104,7 @@
8590 struct crypto_aead;
8591 struct crypto_blkcipher;
8592 struct crypto_hash;
8593 +struct crypto_ahash;
8594 struct crypto_tfm;
8595 struct crypto_type;
8596 struct aead_givcrypt_request;
8597 @@ -131,6 +134,16 @@
8598 void *__ctx[] CRYPTO_MINALIGN_ATTR;
8599 };
8600
8601 +struct ahash_request {
8602 + struct crypto_async_request base;
8603 +
8604 + unsigned int nbytes;
8605 + struct scatterlist *src;
8606 + u8 *result;
8607 +
8608 + void *__ctx[] CRYPTO_MINALIGN_ATTR;
8609 +};
8610 +
8611 /**
8612 * struct aead_request - AEAD request
8613 * @base: Common attributes for async crypto requests
8614 @@ -195,6 +208,17 @@
8615 unsigned int ivsize;
8616 };
8617
8618 +struct ahash_alg {
8619 + int (*init)(struct ahash_request *req);
8620 + int (*update)(struct ahash_request *req);
8621 + int (*final)(struct ahash_request *req);
8622 + int (*digest)(struct ahash_request *req);
8623 + int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8624 + unsigned int keylen);
8625 +
8626 + unsigned int digestsize;
8627 +};
8628 +
8629 struct aead_alg {
8630 int (*setkey)(struct crypto_aead *tfm, const u8 *key,
8631 unsigned int keylen);
8632 @@ -272,6 +296,7 @@
8633 #define cra_cipher cra_u.cipher
8634 #define cra_digest cra_u.digest
8635 #define cra_hash cra_u.hash
8636 +#define cra_ahash cra_u.ahash
8637 #define cra_compress cra_u.compress
8638
8639 struct crypto_alg {
8640 @@ -298,6 +323,7 @@
8641 struct cipher_alg cipher;
8642 struct digest_alg digest;
8643 struct hash_alg hash;
8644 + struct ahash_alg ahash;
8645 struct compress_alg compress;
8646 } cra_u;
8647
8648 @@ -383,6 +409,18 @@
8649 unsigned int digestsize;
8650 };
8651
8652 +struct ahash_tfm {
8653 + int (*init)(struct ahash_request *req);
8654 + int (*update)(struct ahash_request *req);
8655 + int (*final)(struct ahash_request *req);
8656 + int (*digest)(struct ahash_request *req);
8657 + int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8658 + unsigned int keylen);
8659 +
8660 + unsigned int digestsize;
8661 + unsigned int reqsize;
8662 +};
8663 +
8664 struct compress_tfm {
8665 int (*cot_compress)(struct crypto_tfm *tfm,
8666 const u8 *src, unsigned int slen,
8667 @@ -397,6 +435,7 @@
8668 #define crt_blkcipher crt_u.blkcipher
8669 #define crt_cipher crt_u.cipher
8670 #define crt_hash crt_u.hash
8671 +#define crt_ahash crt_u.ahash
8672 #define crt_compress crt_u.compress
8673
8674 struct crypto_tfm {
8675 @@ -409,6 +448,7 @@
8676 struct blkcipher_tfm blkcipher;
8677 struct cipher_tfm cipher;
8678 struct hash_tfm hash;
8679 + struct ahash_tfm ahash;
8680 struct compress_tfm compress;
8681 } crt_u;
8682
Personal OpenWRT clone
This page took 0.382768 seconds and 5 git commands to generate.