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uncompress patches, requested by Kaloz
[openwrt.git] / package / linux / kernel-patches / 000-linux-mips-cvs
1 diff -Nur linux-2.4.29/Makefile linux-mips/Makefile
2 --- linux-2.4.29/Makefile 2005-01-19 15:10:14.000000000 +0100
3 +++ linux-mips/Makefile 2005-01-20 03:19:21.000000000 +0100
4 @@ -5,7 +5,7 @@
5
6 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
7
8 -ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
9 +ARCH = mips
10 KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
11
12 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
13 @@ -462,10 +462,11 @@
14 $(MAKE) -C Documentation/DocBook mrproper
15
16 distclean: mrproper
17 - rm -f core `find . \( -not -type d \) -and \
18 - \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
19 - -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
20 - -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
21 + find . \( -not -type d \) -and \
22 + \( -name core -o -name '*.orig' -o -name '*.rej' \
23 + -o -name '*~' -o -name '*.bak' -o -name '#*#' \
24 + -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \
25 + -o -name TAGS -o -name tags \) -print | env -i xargs rm -f
26
27 backup: mrproper
28 cd .. && tar cf - linux/ | gzip -9 > backup.gz
29 @@ -492,7 +493,7 @@
30 $(MAKE) -C Documentation/DocBook man
31
32 sums:
33 - find . -type f -print | sort | xargs sum > .SUMS
34 + find . -type f -print | sort | env -i xargs sum > .SUMS
35
36 dep-files: scripts/mkdep archdep include/linux/version.h
37 rm -f .depend .hdepend
38 diff -Nur linux-2.4.29/arch/mips/Makefile linux-mips/arch/mips/Makefile
39 --- linux-2.4.29/arch/mips/Makefile 2005-01-19 15:09:26.000000000 +0100
40 +++ linux-mips/arch/mips/Makefile 2005-01-31 12:59:28.000000000 +0100
41 @@ -211,7 +211,7 @@
42 endif
43
44 #
45 -# Au1000 (Alchemy Semi PB1000) eval board
46 +# Au1x AMD Alchemy eval boards
47 #
48 ifdef CONFIG_MIPS_PB1000
49 LIBS += arch/mips/au1000/pb1000/pb1000.o \
50 @@ -220,9 +220,6 @@
51 LOADADDR := 0x80100000
52 endif
53
54 -#
55 -# Au1100 (Alchemy Semi PB1100) eval board
56 -#
57 ifdef CONFIG_MIPS_PB1100
58 LIBS += arch/mips/au1000/pb1100/pb1100.o \
59 arch/mips/au1000/common/au1000.o
60 @@ -230,9 +227,6 @@
61 LOADADDR += 0x80100000
62 endif
63
64 -#
65 -# Au1500 (Alchemy Semi PB1500) eval board
66 -#
67 ifdef CONFIG_MIPS_PB1500
68 LIBS += arch/mips/au1000/pb1500/pb1500.o \
69 arch/mips/au1000/common/au1000.o
70 @@ -240,9 +234,6 @@
71 LOADADDR := 0x80100000
72 endif
73
74 -#
75 -# Au1x00 (AMD/Alchemy) eval boards
76 -#
77 ifdef CONFIG_MIPS_DB1000
78 LIBS += arch/mips/au1000/db1x00/db1x00.o \
79 arch/mips/au1000/common/au1000.o
80 @@ -313,6 +304,27 @@
81 LOADADDR += 0x80100000
82 endif
83
84 +ifdef CONFIG_MIPS_PB1200
85 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
86 + arch/mips/au1000/common/au1000.o
87 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
88 +LOADADDR += 0x80100000
89 +endif
90 +
91 +ifdef CONFIG_MIPS_DB1200
92 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
93 + arch/mips/au1000/common/au1000.o
94 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
95 +LOADADDR += 0x80100000
96 +endif
97 +
98 +ifdef CONFIG_MIPS_FICMMP
99 +LIBS += arch/mips/au1000/ficmmp/ficmmp.o \
100 + arch/mips/au1000/common/au1000.o
101 +SUBDIRS += arch/mips/au1000/ficmmp arch/mips/au1000/common
102 +LOADADDR += 0x80100000
103 +endif
104 +
105
106 #
107 # Cogent CSB250
108 diff -Nur linux-2.4.29/arch/mips/au1000/common/Makefile linux-mips/arch/mips/au1000/common/Makefile
109 --- linux-2.4.29/arch/mips/au1000/common/Makefile 2005-01-19 15:09:26.000000000 +0100
110 +++ linux-mips/arch/mips/au1000/common/Makefile 2005-01-31 12:59:30.000000000 +0100
111 @@ -19,9 +19,9 @@
112 export-objs = prom.o clocks.o power.o usbdev.o
113
114 obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
115 - au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
116 + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
117
118 -export-objs += dma.o dbdma.o
119 +export-objs += dma.o dbdma.o gpio.o
120
121 obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
122 obj-$(CONFIG_KGDB) += dbg_io.o
123 diff -Nur linux-2.4.29/arch/mips/au1000/common/au1xxx_irqmap.c linux-mips/arch/mips/au1000/common/au1xxx_irqmap.c
124 --- linux-2.4.29/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-19 15:09:26.000000000 +0100
125 +++ linux-mips/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-31 12:59:30.000000000 +0100
126 @@ -172,14 +172,14 @@
127 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
128 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
129 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
130 - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
131 - { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
132 - { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
133 - { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
134 - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
135 - { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
136 - { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
137 - { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
138 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
139 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
140 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
141 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
142 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
143 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
144 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
145 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
146 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
147 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
148 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
149 @@ -200,14 +200,14 @@
150 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
151 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
152 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
153 - { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
154 - { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
155 - { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
156 - { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
157 - { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
158 - { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
159 - { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
160 - { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
161 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
162 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
163 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
164 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
165 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
166 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
167 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
168 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
169 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
170 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
171 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
172 diff -Nur linux-2.4.29/arch/mips/au1000/common/cputable.c linux-mips/arch/mips/au1000/common/cputable.c
173 --- linux-2.4.29/arch/mips/au1000/common/cputable.c 2005-01-19 15:09:26.000000000 +0100
174 +++ linux-mips/arch/mips/au1000/common/cputable.c 2005-01-31 12:59:30.000000000 +0100
175 @@ -39,7 +39,8 @@
176 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
177 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
178 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
179 - { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
180 + { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
181 + { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
182 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
183 };
184
185 diff -Nur linux-2.4.29/arch/mips/au1000/common/dbdma.c linux-mips/arch/mips/au1000/common/dbdma.c
186 --- linux-2.4.29/arch/mips/au1000/common/dbdma.c 2005-01-19 15:09:26.000000000 +0100
187 +++ linux-mips/arch/mips/au1000/common/dbdma.c 2005-02-12 04:05:28.000000000 +0100
188 @@ -41,6 +41,8 @@
189 #include <asm/au1xxx_dbdma.h>
190 #include <asm/system.h>
191
192 +#include <linux/module.h>
193 +
194 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
195
196 /*
197 @@ -60,37 +62,10 @@
198 */
199 #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
200
201 -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
202 -static int dbdma_initialized;
203 +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
204 +static int dbdma_initialized=0;
205 static void au1xxx_dbdma_init(void);
206
207 -typedef struct dbdma_device_table {
208 - u32 dev_id;
209 - u32 dev_flags;
210 - u32 dev_tsize;
211 - u32 dev_devwidth;
212 - u32 dev_physaddr; /* If FIFO */
213 - u32 dev_intlevel;
214 - u32 dev_intpolarity;
215 -} dbdev_tab_t;
216 -
217 -typedef struct dbdma_chan_config {
218 - u32 chan_flags;
219 - u32 chan_index;
220 - dbdev_tab_t *chan_src;
221 - dbdev_tab_t *chan_dest;
222 - au1x_dma_chan_t *chan_ptr;
223 - au1x_ddma_desc_t *chan_desc_base;
224 - au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
225 - void *chan_callparam;
226 - void (*chan_callback)(int, void *, struct pt_regs *);
227 -} chan_tab_t;
228 -
229 -#define DEV_FLAGS_INUSE (1 << 0)
230 -#define DEV_FLAGS_ANYUSE (1 << 1)
231 -#define DEV_FLAGS_OUT (1 << 2)
232 -#define DEV_FLAGS_IN (1 << 3)
233 -
234 static dbdev_tab_t dbdev_tab[] = {
235 #ifdef CONFIG_SOC_AU1550
236 /* UARTS */
237 @@ -156,13 +131,13 @@
238 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
239 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
240
241 - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
242 - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
243 - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
244 - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
245 + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
246 + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
247 + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
248 + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
249
250 - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
251 - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
252 + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
253 + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
254
255 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
256 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
257 @@ -172,9 +147,9 @@
258 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
259 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
260
261 - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
262 - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
263 - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
264 + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
265 + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
266 + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
267 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
268
269 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
270 @@ -183,6 +158,24 @@
271
272 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
273 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
274 +
275 + /* Provide 16 user definable device types */
276 + { 0, 0, 0, 0, 0, 0, 0 },
277 + { 0, 0, 0, 0, 0, 0, 0 },
278 + { 0, 0, 0, 0, 0, 0, 0 },
279 + { 0, 0, 0, 0, 0, 0, 0 },
280 + { 0, 0, 0, 0, 0, 0, 0 },
281 + { 0, 0, 0, 0, 0, 0, 0 },
282 + { 0, 0, 0, 0, 0, 0, 0 },
283 + { 0, 0, 0, 0, 0, 0, 0 },
284 + { 0, 0, 0, 0, 0, 0, 0 },
285 + { 0, 0, 0, 0, 0, 0, 0 },
286 + { 0, 0, 0, 0, 0, 0, 0 },
287 + { 0, 0, 0, 0, 0, 0, 0 },
288 + { 0, 0, 0, 0, 0, 0, 0 },
289 + { 0, 0, 0, 0, 0, 0, 0 },
290 + { 0, 0, 0, 0, 0, 0, 0 },
291 + { 0, 0, 0, 0, 0, 0, 0 },
292 };
293
294 #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
295 @@ -202,6 +195,30 @@
296 return NULL;
297 }
298
299 +u32
300 +au1xxx_ddma_add_device(dbdev_tab_t *dev)
301 +{
302 + u32 ret = 0;
303 + dbdev_tab_t *p=NULL;
304 + static u16 new_id=0x1000;
305 +
306 + p = find_dbdev_id(0);
307 + if ( NULL != p )
308 + {
309 + memcpy(p, dev, sizeof(dbdev_tab_t));
310 + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
311 + ret = p->dev_id;
312 + new_id++;
313 +#if 0
314 + printk("add_device: id:%x flags:%x padd:%x\n",
315 + p->dev_id, p->dev_flags, p->dev_physaddr );
316 +#endif
317 + }
318 +
319 + return ret;
320 +}
321 +EXPORT_SYMBOL(au1xxx_ddma_add_device);
322 +
323 /* Allocate a channel and return a non-zero descriptor if successful.
324 */
325 u32
326 @@ -214,7 +231,7 @@
327 int i;
328 dbdev_tab_t *stp, *dtp;
329 chan_tab_t *ctp;
330 - volatile au1x_dma_chan_t *cp;
331 + au1x_dma_chan_t *cp;
332
333 /* We do the intialization on the first channel allocation.
334 * We have to wait because of the interrupt handler initialization
335 @@ -224,9 +241,6 @@
336 au1xxx_dbdma_init();
337 dbdma_initialized = 1;
338
339 - if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
340 - return 0;
341 -
342 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
343 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
344
345 @@ -268,9 +282,9 @@
346 /* If kmalloc fails, it is caught below same
347 * as a channel not available.
348 */
349 - ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
350 + ctp = (chan_tab_t *)
351 + kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
352 chan_tab_ptr[i] = ctp;
353 - ctp->chan_index = chan = i;
354 break;
355 }
356 }
357 @@ -278,10 +292,11 @@
358
359 if (ctp != NULL) {
360 memset(ctp, 0, sizeof(chan_tab_t));
361 + ctp->chan_index = chan = i;
362 dcp = DDMA_CHANNEL_BASE;
363 dcp += (0x0100 * chan);
364 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
365 - cp = (volatile au1x_dma_chan_t *)dcp;
366 + cp = (au1x_dma_chan_t *)dcp;
367 ctp->chan_src = stp;
368 ctp->chan_dest = dtp;
369 ctp->chan_callback = callback;
370 @@ -298,6 +313,9 @@
371 i |= DDMA_CFG_DED;
372 if (dtp->dev_intpolarity)
373 i |= DDMA_CFG_DP;
374 + if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
375 + (dtp->dev_flags & DEV_FLAGS_SYNC))
376 + i |= DDMA_CFG_SYNC;
377 cp->ddma_cfg = i;
378 au_sync();
379
380 @@ -308,14 +326,14 @@
381 rv = (u32)(&chan_tab_ptr[chan]);
382 }
383 else {
384 - /* Release devices.
385 - */
386 + /* Release devices */
387 stp->dev_flags &= ~DEV_FLAGS_INUSE;
388 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
389 }
390 }
391 return rv;
392 }
393 +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
394
395 /* Set the device width if source or destination is a FIFO.
396 * Should be 8, 16, or 32 bits.
397 @@ -343,6 +361,7 @@
398
399 return rv;
400 }
401 +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
402
403 /* Allocate a descriptor ring, initializing as much as possible.
404 */
405 @@ -369,7 +388,8 @@
406 * and if we try that first we are likely to not waste larger
407 * slabs of memory.
408 */
409 - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
410 + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
411 + GFP_KERNEL|GFP_DMA);
412 if (desc_base == 0)
413 return 0;
414
415 @@ -380,7 +400,7 @@
416 kfree((const void *)desc_base);
417 i = entries * sizeof(au1x_ddma_desc_t);
418 i += (sizeof(au1x_ddma_desc_t) - 1);
419 - if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
420 + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
421 return 0;
422
423 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
424 @@ -460,9 +480,14 @@
425 /* If source input is fifo, set static address.
426 */
427 if (stp->dev_flags & DEV_FLAGS_IN) {
428 - src0 = stp->dev_physaddr;
429 - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
430 + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
431 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
432 + else
433 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
434 +
435 }
436 + if (stp->dev_physaddr)
437 + src0 = stp->dev_physaddr;
438
439 /* Set up dest1. For now, assume no stride and increment.
440 * A channel attribute update can change this later.
441 @@ -486,10 +511,18 @@
442 /* If destination output is fifo, set static address.
443 */
444 if (dtp->dev_flags & DEV_FLAGS_OUT) {
445 - dest0 = dtp->dev_physaddr;
446 + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
447 + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
448 + else
449 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
450 }
451 + if (dtp->dev_physaddr)
452 + dest0 = dtp->dev_physaddr;
453
454 +#if 0
455 + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
456 + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
457 +#endif
458 for (i=0; i<entries; i++) {
459 dp->dscr_cmd0 = cmd0;
460 dp->dscr_cmd1 = cmd1;
461 @@ -498,6 +531,7 @@
462 dp->dscr_dest0 = dest0;
463 dp->dscr_dest1 = dest1;
464 dp->dscr_stat = 0;
465 + dp->sw_context = dp->sw_status = 0;
466 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
467 dp++;
468 }
469 @@ -510,13 +544,14 @@
470
471 return (u32)(ctp->chan_desc_base);
472 }
473 +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
474
475 /* Put a source buffer into the DMA ring.
476 * This updates the source pointer and byte count. Normally used
477 * for memory to fifo transfers.
478 */
479 u32
480 -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
481 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
482 {
483 chan_tab_t *ctp;
484 au1x_ddma_desc_t *dp;
485 @@ -543,24 +578,40 @@
486 */
487 dp->dscr_source0 = virt_to_phys(buf);
488 dp->dscr_cmd1 = nbytes;
489 - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
490 - ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */
491 -
492 + /* Check flags */
493 + if (flags & DDMA_FLAGS_IE)
494 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
495 + if (flags & DDMA_FLAGS_NOIE)
496 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
497 /* Get next descriptor pointer.
498 */
499 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
500
501 + /*
502 + * There is an errata on the Au1200/Au1550 parts that could result
503 + * in "stale" data being DMA'd. It has to do with the snoop logic on
504 + * the dache eviction buffer. NONCOHERENT_IO is on by default for
505 + * these parts. If it is fixedin the future, these dma_cache_inv will
506 + * just be nothing more than empty macros. See io.h.
507 + * */
508 + dma_cache_wback_inv(buf,nbytes);
509 + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
510 + au_sync();
511 + dma_cache_wback_inv(dp, sizeof(dp));
512 + ctp->chan_ptr->ddma_dbell = 0;
513 +
514 /* return something not zero.
515 */
516 return nbytes;
517 }
518 +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
519
520 /* Put a destination buffer into the DMA ring.
521 * This updates the destination pointer and byte count. Normally used
522 * to place an empty buffer into the ring for fifo to memory transfers.
523 */
524 u32
525 -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
526 +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
527 {
528 chan_tab_t *ctp;
529 au1x_ddma_desc_t *dp;
530 @@ -582,11 +633,33 @@
531 if (dp->dscr_cmd0 & DSCR_CMD0_V)
532 return 0;
533
534 - /* Load up buffer address and byte count.
535 - */
536 + /* Load up buffer address and byte count */
537 +
538 + /* Check flags */
539 + if (flags & DDMA_FLAGS_IE)
540 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
541 + if (flags & DDMA_FLAGS_NOIE)
542 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
543 +
544 dp->dscr_dest0 = virt_to_phys(buf);
545 dp->dscr_cmd1 = nbytes;
546 +#if 0
547 + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
548 + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
549 + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
550 +#endif
551 + /*
552 + * There is an errata on the Au1200/Au1550 parts that could result in
553 + * "stale" data being DMA'd. It has to do with the snoop logic on the
554 + * dache eviction buffer. NONCOHERENT_IO is on by default for these
555 + * parts. If it is fixedin the future, these dma_cache_inv will just
556 + * be nothing more than empty macros. See io.h.
557 + * */
558 + dma_cache_inv(buf,nbytes);
559 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
560 + au_sync();
561 + dma_cache_wback_inv(dp, sizeof(dp));
562 + ctp->chan_ptr->ddma_dbell = 0;
563
564 /* Get next descriptor pointer.
565 */
566 @@ -596,6 +669,7 @@
567 */
568 return nbytes;
569 }
570 +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
571
572 /* Get a destination buffer into the DMA ring.
573 * Normally used to get a full buffer from the ring during fifo
574 @@ -645,7 +719,7 @@
575 au1xxx_dbdma_stop(u32 chanid)
576 {
577 chan_tab_t *ctp;
578 - volatile au1x_dma_chan_t *cp;
579 + au1x_dma_chan_t *cp;
580 int halt_timeout = 0;
581
582 ctp = *((chan_tab_t **)chanid);
583 @@ -665,6 +739,7 @@
584 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
585 au_sync();
586 }
587 +EXPORT_SYMBOL(au1xxx_dbdma_stop);
588
589 /* Start using the current descriptor pointer. If the dbdma encounters
590 * a not valid descriptor, it will stop. In this case, we can just
591 @@ -674,17 +749,17 @@
592 au1xxx_dbdma_start(u32 chanid)
593 {
594 chan_tab_t *ctp;
595 - volatile au1x_dma_chan_t *cp;
596 + au1x_dma_chan_t *cp;
597
598 ctp = *((chan_tab_t **)chanid);
599 -
600 cp = ctp->chan_ptr;
601 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
602 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
603 au_sync();
604 - cp->ddma_dbell = 0xffffffff; /* Make it go */
605 + cp->ddma_dbell = 0;
606 au_sync();
607 }
608 +EXPORT_SYMBOL(au1xxx_dbdma_start);
609
610 void
611 au1xxx_dbdma_reset(u32 chanid)
612 @@ -703,15 +778,21 @@
613
614 do {
615 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
616 + /* reset our SW status -- this is used to determine
617 + * if a descriptor is in use by upper level SW. Since
618 + * posting can reset 'V' bit.
619 + */
620 + dp->sw_status = 0;
621 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
622 } while (dp != ctp->chan_desc_base);
623 }
624 +EXPORT_SYMBOL(au1xxx_dbdma_reset);
625
626 u32
627 au1xxx_get_dma_residue(u32 chanid)
628 {
629 chan_tab_t *ctp;
630 - volatile au1x_dma_chan_t *cp;
631 + au1x_dma_chan_t *cp;
632 u32 rv;
633
634 ctp = *((chan_tab_t **)chanid);
635 @@ -746,15 +827,16 @@
636
637 kfree(ctp);
638 }
639 +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
640
641 static void
642 dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
643 {
644 - u32 intstat;
645 + u32 intstat, flags;
646 u32 chan_index;
647 chan_tab_t *ctp;
648 au1x_ddma_desc_t *dp;
649 - volatile au1x_dma_chan_t *cp;
650 + au1x_dma_chan_t *cp;
651
652 intstat = dbdma_gptr->ddma_intstat;
653 au_sync();
654 @@ -773,18 +855,26 @@
655 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
656
657 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
658 -
659 }
660
661 -static void
662 -au1xxx_dbdma_init(void)
663 +static void au1xxx_dbdma_init(void)
664 {
665 + int irq_nr;
666 +
667 dbdma_gptr->ddma_config = 0;
668 dbdma_gptr->ddma_throttle = 0;
669 dbdma_gptr->ddma_inten = 0xffff;
670 au_sync();
671
672 - if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
673 +#if defined(CONFIG_SOC_AU1550)
674 + irq_nr = AU1550_DDMA_INT;
675 +#elif defined(CONFIG_SOC_AU1200)
676 + irq_nr = AU1200_DDMA_INT;
677 +#else
678 + #error Unknown Au1x00 SOC
679 +#endif
680 +
681 + if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
682 "Au1xxx dbdma", (void *)dbdma_gptr))
683 printk("Can't get 1550 dbdma irq");
684 }
685 @@ -795,7 +885,8 @@
686 chan_tab_t *ctp;
687 au1x_ddma_desc_t *dp;
688 dbdev_tab_t *stp, *dtp;
689 - volatile au1x_dma_chan_t *cp;
690 + au1x_dma_chan_t *cp;
691 + u32 i = 0;
692
693 ctp = *((chan_tab_t **)chanid);
694 stp = ctp->chan_src;
695 @@ -820,15 +911,64 @@
696 dp = ctp->chan_desc_base;
697
698 do {
699 - printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
700 - (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
701 - printk("src0 %08x, src1 %08x, dest0 %08x\n",
702 - dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
703 - printk("dest1 %08x, stat %08x, nxtptr %08x\n",
704 - dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
705 + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
706 + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
707 + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
708 + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
709 + printk("stat %08x, nxtptr %08x\n",
710 + dp->dscr_stat, dp->dscr_nxtptr);
711 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
712 } while (dp != ctp->chan_desc_base);
713 }
714
715 +/* Put a descriptor into the DMA ring.
716 + * This updates the source/destination pointers and byte count.
717 + */
718 +u32
719 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
720 +{
721 + chan_tab_t *ctp;
722 + au1x_ddma_desc_t *dp;
723 + u32 nbytes=0;
724 +
725 + /* I guess we could check this to be within the
726 + * range of the table......
727 + */
728 + ctp = *((chan_tab_t **)chanid);
729 +
730 + /* We should have multiple callers for a particular channel,
731 + * an interrupt doesn't affect this pointer nor the descriptor,
732 + * so no locking should be needed.
733 + */
734 + dp = ctp->put_ptr;
735 +
736 + /* If the descriptor is valid, we are way ahead of the DMA
737 + * engine, so just return an error condition.
738 + */
739 + if (dp->dscr_cmd0 & DSCR_CMD0_V)
740 + return 0;
741 +
742 + /* Load up buffer addresses and byte count.
743 + */
744 + dp->dscr_dest0 = dscr->dscr_dest0;
745 + dp->dscr_source0 = dscr->dscr_source0;
746 + dp->dscr_dest1 = dscr->dscr_dest1;
747 + dp->dscr_source1 = dscr->dscr_source1;
748 + dp->dscr_cmd1 = dscr->dscr_cmd1;
749 + nbytes = dscr->dscr_cmd1;
750 + /* Allow the caller to specifiy if an interrupt is generated */
751 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
752 + dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
753 + ctp->chan_ptr->ddma_dbell = 0;
754 +
755 + /* Get next descriptor pointer.
756 + */
757 + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
758 +
759 + /* return something not zero.
760 + */
761 + return nbytes;
762 +}
763 +
764 #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
765
766 diff -Nur linux-2.4.29/arch/mips/au1000/common/gpio.c linux-mips/arch/mips/au1000/common/gpio.c
767 --- linux-2.4.29/arch/mips/au1000/common/gpio.c 1970-01-01 01:00:00.000000000 +0100
768 +++ linux-mips/arch/mips/au1000/common/gpio.c 2005-01-30 09:01:27.000000000 +0100
769 @@ -0,0 +1,118 @@
770 +/*
771 + * This program is free software; you can redistribute it and/or modify it
772 + * under the terms of the GNU General Public License as published by the
773 + * Free Software Foundation; either version 2 of the License, or (at your
774 + * option) any later version.
775 + *
776 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
777 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
778 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
779 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
780 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
781 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
782 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
783 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
784 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
785 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
786 + *
787 + * You should have received a copy of the GNU General Public License along
788 + * with this program; if not, write to the Free Software Foundation, Inc.,
789 + * 675 Mass Ave, Cambridge, MA 02139, USA.
790 + */
791 +
792 +#include <asm/au1000.h>
793 +#include <asm/au1xxx_gpio.h>
794 +
795 +#define gpio1 sys
796 +#if !defined(CONFIG_SOC_AU1000)
797 +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
798 +
799 +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
800 +
801 +int au1xxx_gpio2_read(int signal)
802 +{
803 + signal -= 200;
804 +/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
805 + return ((gpio2->pinstate >> signal) & 0x01);
806 +}
807 +
808 +void au1xxx_gpio2_write(int signal, int value)
809 +{
810 + signal -= 200;
811 +
812 + gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
813 + (value << signal);
814 +}
815 +
816 +void au1xxx_gpio2_tristate(int signal)
817 +{
818 + signal -= 200;
819 + gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
820 +}
821 +#endif
822 +
823 +int au1xxx_gpio1_read(int signal)
824 +{
825 +/* gpio1->trioutclr |= (0x01 << signal); */
826 + return ((gpio1->pinstaterd >> signal) & 0x01);
827 +}
828 +
829 +void au1xxx_gpio1_write(int signal, int value)
830 +{
831 + if(value)
832 + gpio1->outputset = (0x01 << signal);
833 + else
834 + gpio1->outputclr = (0x01 << signal); /* Output a Zero */
835 +}
836 +
837 +void au1xxx_gpio1_tristate(int signal)
838 +{
839 + gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
840 +}
841 +
842 +
843 +int au1xxx_gpio_read(int signal)
844 +{
845 + if(signal >= 200)
846 +#if defined(CONFIG_SOC_AU1000)
847 + return 0;
848 +#else
849 + return au1xxx_gpio2_read(signal);
850 +#endif
851 + else
852 + return au1xxx_gpio1_read(signal);
853 +}
854 +
855 +void au1xxx_gpio_write(int signal, int value)
856 +{
857 + if(signal >= 200)
858 +#if defined(CONFIG_SOC_AU1000)
859 + ;
860 +#else
861 + au1xxx_gpio2_write(signal, value);
862 +#endif
863 + else
864 + au1xxx_gpio1_write(signal, value);
865 +}
866 +
867 +void au1xxx_gpio_tristate(int signal)
868 +{
869 + if(signal >= 200)
870 +#if defined(CONFIG_SOC_AU1000)
871 + ;
872 +#else
873 + au1xxx_gpio2_tristate(signal);
874 +#endif
875 + else
876 + au1xxx_gpio1_tristate(signal);
877 +}
878 +
879 +void au1xxx_gpio1_set_inputs(void)
880 +{
881 + gpio1->pininputen = 0;
882 +}
883 +
884 +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
885 +EXPORT_SYMBOL(au1xxx_gpio_tristate);
886 +EXPORT_SYMBOL(au1xxx_gpio_write);
887 +EXPORT_SYMBOL(au1xxx_gpio_read);
888 diff -Nur linux-2.4.29/arch/mips/au1000/common/irq.c linux-mips/arch/mips/au1000/common/irq.c
889 --- linux-2.4.29/arch/mips/au1000/common/irq.c 2005-01-19 15:09:26.000000000 +0100
890 +++ linux-mips/arch/mips/au1000/common/irq.c 2005-01-31 12:59:30.000000000 +0100
891 @@ -508,6 +508,7 @@
892
893 if (!intc0_req0) return;
894
895 +#ifdef AU1000_USB_DEV_REQ_INT
896 /*
897 * Because of the tight timing of SETUP token to reply
898 * transactions, the USB devices-side packet complete
899 @@ -518,6 +519,7 @@
900 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
901 return;
902 }
903 +#endif
904
905 irq = au_ffs(intc0_req0) - 1;
906 intc0_req0 &= ~(1<<irq);
907 diff -Nur linux-2.4.29/arch/mips/au1000/common/pci_fixup.c linux-mips/arch/mips/au1000/common/pci_fixup.c
908 --- linux-2.4.29/arch/mips/au1000/common/pci_fixup.c 2005-01-19 15:09:26.000000000 +0100
909 +++ linux-mips/arch/mips/au1000/common/pci_fixup.c 2004-12-03 09:00:32.000000000 +0100
910 @@ -75,9 +75,13 @@
911
912 #ifdef CONFIG_NONCOHERENT_IO
913 /*
914 - * Set the NC bit in controller for pre-AC silicon
915 + * Set the NC bit in controller for Au1500 pre-AC silicon
916 */
917 - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
918 + u32 prid = read_c0_prid();
919 + if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
920 + au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
921 + printk("Non-coherent PCI accesses enabled\n");
922 + }
923 printk("Non-coherent PCI accesses enabled\n");
924 #endif
925
926 diff -Nur linux-2.4.29/arch/mips/au1000/common/pci_ops.c linux-mips/arch/mips/au1000/common/pci_ops.c
927 --- linux-2.4.29/arch/mips/au1000/common/pci_ops.c 2004-02-18 14:36:30.000000000 +0100
928 +++ linux-mips/arch/mips/au1000/common/pci_ops.c 2005-01-31 12:59:30.000000000 +0100
929 @@ -162,6 +162,7 @@
930 static int config_access(unsigned char access_type, struct pci_dev *dev,
931 unsigned char where, u32 * data)
932 {
933 + int error = PCIBIOS_SUCCESSFUL;
934 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
935 unsigned char bus = dev->bus->number;
936 unsigned int dev_fn = dev->devfn;
937 @@ -170,7 +171,6 @@
938 unsigned long offset, status;
939 unsigned long cfg_base;
940 unsigned long flags;
941 - int error = PCIBIOS_SUCCESSFUL;
942 unsigned long entryLo0, entryLo1;
943
944 if (device > 19) {
945 @@ -271,8 +271,11 @@
946 }
947
948 local_irq_restore(flags);
949 - return error;
950 +#else
951 + /* Fake out Config space access with no responder */
952 + *data = 0xFFFFFFFF;
953 #endif
954 + return error;
955 }
956 #endif
957
958 diff -Nur linux-2.4.29/arch/mips/au1000/common/power.c linux-mips/arch/mips/au1000/common/power.c
959 --- linux-2.4.29/arch/mips/au1000/common/power.c 2005-01-19 15:09:26.000000000 +0100
960 +++ linux-mips/arch/mips/au1000/common/power.c 2005-01-31 12:59:30.000000000 +0100
961 @@ -50,7 +50,6 @@
962
963 static void calibrate_delay(void);
964
965 -extern void set_au1x00_speed(unsigned int new_freq);
966 extern unsigned int get_au1x00_speed(void);
967 extern unsigned long get_au1x00_uart_baud_base(void);
968 extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
969 @@ -116,6 +115,7 @@
970 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
971 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
972
973 +#ifndef CONFIG_SOC_AU1200
974 /* Shutdown USB host/device.
975 */
976 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
977 @@ -127,6 +127,7 @@
978
979 sleep_usbdev_enable = au_readl(USBD_ENABLE);
980 au_writel(0, USBD_ENABLE); au_sync();
981 +#endif
982
983 /* Save interrupt controller state.
984 */
985 @@ -212,14 +213,12 @@
986 int au_sleep(void)
987 {
988 unsigned long wakeup, flags;
989 - extern void save_and_sleep(void);
990 + extern unsigned int save_and_sleep(void);
991
992 spin_lock_irqsave(&pm_lock,flags);
993
994 save_core_regs();
995
996 - flush_cache_all();
997 -
998 /** The code below is all system dependent and we should probably
999 ** have a function call out of here to set this up. You need
1000 ** to configure the GPIO or timer interrupts that will bring
1001 @@ -227,27 +226,26 @@
1002 ** For testing, the TOY counter wakeup is useful.
1003 **/
1004
1005 -#if 0
1006 +#if 1
1007 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
1008
1009 /* gpio 6 can cause a wake up event */
1010 wakeup = au_readl(SYS_WAKEMSK);
1011 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
1012 - wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
1013 + wakeup = 1 << 5; /* turn on gpio 6 wakeup */
1014 #else
1015 - /* For testing, allow match20 to wake us up.
1016 - */
1017 + /* For testing, allow match20 to wake us up. */
1018 #ifdef SLEEP_TEST_TIMEOUT
1019 wakeup_counter0_set(sleep_ticks);
1020 #endif
1021 wakeup = 1 << 8; /* turn on match20 wakeup */
1022 wakeup = 0;
1023 #endif
1024 - au_writel(1, SYS_WAKESRC); /* clear cause */
1025 + au_writel(0, SYS_WAKESRC); /* clear cause */
1026 au_sync();
1027 au_writel(wakeup, SYS_WAKEMSK);
1028 au_sync();
1029 -
1030 + DPRINTK("Entering sleep!\n");
1031 save_and_sleep();
1032
1033 /* after a wakeup, the cpu vectors back to 0x1fc00000 so
1034 @@ -255,6 +253,7 @@
1035 */
1036 restore_core_regs();
1037 spin_unlock_irqrestore(&pm_lock, flags);
1038 + DPRINTK("Leaving sleep!\n");
1039 return 0;
1040 }
1041
1042 @@ -285,7 +284,6 @@
1043
1044 if (retval)
1045 return retval;
1046 -
1047 au_sleep();
1048 retval = pm_send_all(PM_RESUME, (void *) 0);
1049 }
1050 @@ -312,120 +310,9 @@
1051 }
1052
1053
1054 -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
1055 - void *buffer, size_t * len)
1056 -{
1057 - int retval = 0, i;
1058 - unsigned long val, pll;
1059 -#define TMPBUFLEN 64
1060 -#define MAX_CPU_FREQ 396
1061 - char buf[TMPBUFLEN], *p;
1062 - unsigned long flags, intc0_mask, intc1_mask;
1063 - unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
1064 - old_refresh;
1065 - unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
1066 -
1067 - spin_lock_irqsave(&pm_lock, flags);
1068 - if (!write) {
1069 - *len = 0;
1070 - } else {
1071 - /* Parse the new frequency */
1072 - if (*len > TMPBUFLEN - 1) {
1073 - spin_unlock_irqrestore(&pm_lock, flags);
1074 - return -EFAULT;
1075 - }
1076 - if (copy_from_user(buf, buffer, *len)) {
1077 - spin_unlock_irqrestore(&pm_lock, flags);
1078 - return -EFAULT;
1079 - }
1080 - buf[*len] = 0;
1081 - p = buf;
1082 - val = simple_strtoul(p, &p, 0);
1083 - if (val > MAX_CPU_FREQ) {
1084 - spin_unlock_irqrestore(&pm_lock, flags);
1085 - return -EFAULT;
1086 - }
1087 -
1088 - pll = val / 12;
1089 - if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
1090 - /* revisit this for higher speed cpus */
1091 - spin_unlock_irqrestore(&pm_lock, flags);
1092 - return -EFAULT;
1093 - }
1094 -
1095 - old_baud_base = get_au1x00_uart_baud_base();
1096 - old_cpu_freq = get_au1x00_speed();
1097 -
1098 - new_cpu_freq = pll * 12 * 1000000;
1099 - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
1100 - set_au1x00_speed(new_cpu_freq);
1101 - set_au1x00_uart_baud_base(new_baud_base);
1102 -
1103 - old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
1104 - new_refresh =
1105 - ((old_refresh * new_cpu_freq) /
1106 - old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
1107 -
1108 - au_writel(pll, SYS_CPUPLL);
1109 - au_sync_delay(1);
1110 - au_writel(new_refresh, MEM_SDREFCFG);
1111 - au_sync_delay(1);
1112 -
1113 - for (i = 0; i < 4; i++) {
1114 - if (au_readl
1115 - (UART_BASE + UART_MOD_CNTRL +
1116 - i * 0x00100000) == 3) {
1117 - old_clk =
1118 - au_readl(UART_BASE + UART_CLK +
1119 - i * 0x00100000);
1120 - // baud_rate = baud_base/clk
1121 - baud_rate = old_baud_base / old_clk;
1122 - /* we won't get an exact baud rate and the error
1123 - * could be significant enough that our new
1124 - * calculation will result in a clock that will
1125 - * give us a baud rate that's too far off from
1126 - * what we really want.
1127 - */
1128 - if (baud_rate > 100000)
1129 - baud_rate = 115200;
1130 - else if (baud_rate > 50000)
1131 - baud_rate = 57600;
1132 - else if (baud_rate > 30000)
1133 - baud_rate = 38400;
1134 - else if (baud_rate > 17000)
1135 - baud_rate = 19200;
1136 - else
1137 - (baud_rate = 9600);
1138 - // new_clk = new_baud_base/baud_rate
1139 - new_clk = new_baud_base / baud_rate;
1140 - au_writel(new_clk,
1141 - UART_BASE + UART_CLK +
1142 - i * 0x00100000);
1143 - au_sync_delay(10);
1144 - }
1145 - }
1146 - }
1147 -
1148 -
1149 - /* We don't want _any_ interrupts other than
1150 - * match20. Otherwise our calibrate_delay()
1151 - * calculation will be off, potentially a lot.
1152 - */
1153 - intc0_mask = save_local_and_disable(0);
1154 - intc1_mask = save_local_and_disable(1);
1155 - local_enable_irq(AU1000_TOY_MATCH2_INT);
1156 - spin_unlock_irqrestore(&pm_lock, flags);
1157 - calibrate_delay();
1158 - restore_local_and_enable(0, intc0_mask);
1159 - restore_local_and_enable(1, intc1_mask);
1160 - return retval;
1161 -}
1162 -
1163 -
1164 static struct ctl_table pm_table[] = {
1165 {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
1166 {ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
1167 - {CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
1168 {0}
1169 };
1170
1171 diff -Nur linux-2.4.29/arch/mips/au1000/common/setup.c linux-mips/arch/mips/au1000/common/setup.c
1172 --- linux-2.4.29/arch/mips/au1000/common/setup.c 2005-01-19 15:09:26.000000000 +0100
1173 +++ linux-mips/arch/mips/au1000/common/setup.c 2005-01-31 12:59:30.000000000 +0100
1174 @@ -174,6 +174,40 @@
1175 initrd_end = (unsigned long)&__rd_end;
1176 #endif
1177
1178 +#if defined(CONFIG_SOC_AU1200)
1179 +#ifdef CONFIG_USB_EHCI_HCD
1180 + if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
1181 + char usb_args[80];
1182 + argptr = prom_getcmdline();
1183 + memset(usb_args, 0, sizeof(usb_args));
1184 + sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
1185 + USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
1186 + strcat(argptr, usb_args);
1187 + }
1188 +#ifdef CONFIG_USB_AMD5536UDC
1189 + /* enable EHC + OHC + UDC clocks, memory and bus mastering */
1190 +/* au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
1191 + au_writel( 0xC0DF207F, USB_MSR_BASE + 4); // incl. prefetch
1192 +#else
1193 + /* enable EHC + OHC clocks, memory and bus mastering */
1194 +/* au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
1195 + au_writel( 0xC0DB200F, USB_MSR_BASE + 4); /* incl. prefetch */
1196 +#endif
1197 + udelay(1000);
1198 +
1199 +#else /* CONFIG_USB_EHCI_HCD */
1200 +
1201 +#ifdef CONFIG_USB_AMD5536UDC
1202 +#ifndef CONFIG_USB_OHCI
1203 + /* enable UDC clocks, memory and bus mastering */
1204 +/* au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
1205 + au_writel( 0xC0DC2070, USB_MSR_BASE + 4); // incl. prefetch
1206 + udelay(1000);
1207 +#endif
1208 +#endif
1209 +#endif /* CONFIG_USB_EHCI_HCD */
1210 +#endif /* CONFIG_SOC_AU1200 */
1211 +
1212 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1213 #ifdef CONFIG_USB_OHCI
1214 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
1215 @@ -187,19 +221,38 @@
1216 #endif
1217
1218 #ifdef CONFIG_USB_OHCI
1219 - // enable host controller and wait for reset done
1220 +#if defined(CONFIG_SOC_AU1200)
1221 +#ifndef CONFIG_USB_EHCI_HCD
1222 +#ifdef CONFIG_USB_AMD5536UDC
1223 + /* enable OHC + UDC clocks, memory and bus mastering */
1224 +/* au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
1225 + au_writel( 0xC0DD2073, USB_MSR_BASE + 4); // incl. prefetch
1226 +#else
1227 + /* enable OHC clocks, memory and bus mastering */
1228 + au_writel( 0x00D12003, USB_MSR_BASE + 4);
1229 +#endif
1230 + udelay(1000);
1231 +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
1232 +#endif
1233 +#else
1234 + /* Au1000, Au1500, Au1100, Au1550 */
1235 + /* enable host controller and wait for reset done */
1236 au_writel(0x08, USB_HOST_CONFIG);
1237 udelay(1000);
1238 au_writel(0x0E, USB_HOST_CONFIG);
1239 udelay(1000);
1240 - au_readl(USB_HOST_CONFIG); // throw away first read
1241 + au_readl(USB_HOST_CONFIG); /* throw away first read */
1242 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
1243 au_readl(USB_HOST_CONFIG);
1244 +#endif /* CONFIG_SOC_AU1200 */
1245 #endif
1246 -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1247 +#else
1248 +
1249 +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
1250 +
1251
1252 #ifdef CONFIG_FB
1253 - // Needed if PCI video card in use
1254 + /* Needed if PCI video card in use */
1255 conswitchp = &dummy_con;
1256 #endif
1257
1258 @@ -209,8 +262,7 @@
1259 #endif
1260
1261 #ifdef CONFIG_BLK_DEV_IDE
1262 - /* Board setup takes precedence for unique devices.
1263 - */
1264 + /* Board setup takes precedence for unique devices. */
1265 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
1266 ide_ops = &std_ide_ops;
1267 #endif
1268 diff -Nur linux-2.4.29/arch/mips/au1000/common/sleeper.S linux-mips/arch/mips/au1000/common/sleeper.S
1269 --- linux-2.4.29/arch/mips/au1000/common/sleeper.S 2004-02-18 14:36:30.000000000 +0100
1270 +++ linux-mips/arch/mips/au1000/common/sleeper.S 2005-01-31 12:59:30.000000000 +0100
1271 @@ -15,17 +15,48 @@
1272 #include <asm/addrspace.h>
1273 #include <asm/regdef.h>
1274 #include <asm/stackframe.h>
1275 +#include <asm/au1000.h>
1276 +
1277 +/*
1278 + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep
1279 + * need not be tied to any particular power management scheme.
1280 + */
1281 +
1282 + .extern ___flush_cache_all
1283
1284 .text
1285 - .set macro
1286 - .set noat
1287 .align 5
1288
1289 -/* Save all of the processor general registers and go to sleep.
1290 - * A wakeup condition will get us back here to restore the registers.
1291 +/*
1292 + * Save the processor general registers and go to sleep. A wakeup
1293 + * condition will get us back here to restore the registers.
1294 */
1295 -LEAF(save_and_sleep)
1296
1297 +/* still need to fix alignment issues here */
1298 +save_and_sleep_frmsz = 48
1299 +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
1300 + .set noreorder
1301 + .set nomacro
1302 + .set noat
1303 + subu sp, save_and_sleep_frmsz
1304 + sw ra, save_and_sleep_frmsz-4(sp)
1305 + sw s0, save_and_sleep_frmsz-8(sp)
1306 + sw s1, save_and_sleep_frmsz-12(sp)
1307 + sw s2, save_and_sleep_frmsz-16(sp)
1308 + sw s3, save_and_sleep_frmsz-20(sp)
1309 + sw s4, save_and_sleep_frmsz-24(sp)
1310 + sw s5, save_and_sleep_frmsz-28(sp)
1311 + sw s6, save_and_sleep_frmsz-32(sp)
1312 + sw s7, save_and_sleep_frmsz-36(sp)
1313 + sw s8, save_and_sleep_frmsz-40(sp)
1314 + sw gp, save_and_sleep_frmsz-44(sp)
1315 +
1316 + /* We only need to save the registers that the calling function
1317 + * hasn't saved for us. 0 is always zero. 8 - 15, 24 and 25 are
1318 + * temporaries and can be used without saving. 26 and 27 are reserved
1319 + * for interrupt/trap handling and expected to change. 29 is the
1320 + * stack pointer which is handled as a special case here.
1321 + */
1322 subu sp, PT_SIZE
1323 sw $1, PT_R1(sp)
1324 sw $2, PT_R2(sp)
1325 @@ -34,14 +65,6 @@
1326 sw $5, PT_R5(sp)
1327 sw $6, PT_R6(sp)
1328 sw $7, PT_R7(sp)
1329 - sw $8, PT_R8(sp)
1330 - sw $9, PT_R9(sp)
1331 - sw $10, PT_R10(sp)
1332 - sw $11, PT_R11(sp)
1333 - sw $12, PT_R12(sp)
1334 - sw $13, PT_R13(sp)
1335 - sw $14, PT_R14(sp)
1336 - sw $15, PT_R15(sp)
1337 sw $16, PT_R16(sp)
1338 sw $17, PT_R17(sp)
1339 sw $18, PT_R18(sp)
1340 @@ -50,32 +73,47 @@
1341 sw $21, PT_R21(sp)
1342 sw $22, PT_R22(sp)
1343 sw $23, PT_R23(sp)
1344 - sw $24, PT_R24(sp)
1345 - sw $25, PT_R25(sp)
1346 - sw $26, PT_R26(sp)
1347 - sw $27, PT_R27(sp)
1348 sw $28, PT_R28(sp)
1349 - sw $29, PT_R29(sp)
1350 sw $30, PT_R30(sp)
1351 sw $31, PT_R31(sp)
1352 +#define PT_C0STATUS PT_LO
1353 +#define PT_CONTEXT PT_HI
1354 +#define PT_PAGEMASK PT_EPC
1355 +#define PT_CONFIG PT_BVADDR
1356 mfc0 k0, CP0_STATUS
1357 - sw k0, 0x20(sp)
1358 + sw k0, PT_C0STATUS(sp) // 0x20
1359 mfc0 k0, CP0_CONTEXT
1360 - sw k0, 0x1c(sp)
1361 + sw k0, PT_CONTEXT(sp) // 0x1c
1362 mfc0 k0, CP0_PAGEMASK
1363 - sw k0, 0x18(sp)
1364 + sw k0, PT_PAGEMASK(sp) // 0x18
1365 mfc0 k0, CP0_CONFIG
1366 - sw k0, 0x14(sp)
1367 + sw k0, PT_CONFIG(sp) // 0x14
1368 +
1369 + .set macro
1370 + .set at
1371 +
1372 + li t0, SYS_SLPPWR
1373 + sw zero, 0(t0) /* Get the processor ready to sleep */
1374 + sync
1375
1376 /* Now set up the scratch registers so the boot rom will
1377 * return to this point upon wakeup.
1378 + * sys_scratch0 : SP
1379 + * sys_scratch1 : RA
1380 + */
1381 + li t0, SYS_SCRATCH0
1382 + li t1, SYS_SCRATCH1
1383 + sw sp, 0(t0)
1384 + la k0, resume_from_sleep
1385 + sw k0, 0(t1)
1386 +
1387 +/*
1388 + * Flush DCACHE to make sure context is in memory
1389 */
1390 - la k0, 1f
1391 - lui k1, 0xb190
1392 - ori k1, 0x18
1393 - sw sp, 0(k1)
1394 - ori k1, 0x1c
1395 - sw k0, 0(k1)
1396 + la t1,___flush_cache_all /* _flush_cache_all is a function pointer */
1397 + lw t0,0(t1)
1398 + jal t0
1399 + nop
1400
1401 /* Put SDRAM into self refresh. Preload instructions into cache,
1402 * issue a precharge, then auto refresh, then sleep commands to it.
1403 @@ -88,30 +126,65 @@
1404 cache 0x14, 96(t0)
1405 .set mips0
1406
1407 + /* Put SDRAM to sleep */
1408 sdsleep:
1409 - lui k0, 0xb400
1410 - sw zero, 0x001c(k0) /* Precharge */
1411 - sw zero, 0x0020(k0) /* Auto refresh */
1412 - sw zero, 0x0030(k0) /* SDRAM sleep */
1413 + li a0, MEM_PHYS_ADDR
1414 + or a0, a0, 0xA0000000
1415 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
1416 + lw k0, MEM_SDMODE0(a0)
1417 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1418 + sw zero, MEM_SDAUTOREF(a0) /* Auto Refresh */
1419 + sw zero, MEM_SDSLEEP(a0) /* Sleep */
1420 sync
1421 -
1422 - lui k1, 0xb190
1423 - sw zero, 0x0078(k1) /* get ready to sleep */
1424 +#endif
1425 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
1426 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1427 + sw zero, MEM_SDSREF(a0)
1428 +
1429 + #lw t0, MEM_SDSTAT(a0)
1430 + #and t0, t0, 0x01000000
1431 + li t0, 0x01000000
1432 +refresh_not_set:
1433 + lw t1, MEM_SDSTAT(a0)
1434 + and t2, t1, t0
1435 + beq zero, t2, refresh_not_set
1436 + nop
1437 +
1438 + li t0, ~0x30000000
1439 + lw t1, MEM_SDCONFIGA(a0)
1440 + and t1, t0, t1
1441 + sw t1, MEM_SDCONFIGA(a0)
1442 sync
1443 - sw zero, 0x007c(k1) /* Put processor to sleep */
1444 +#endif
1445 +
1446 + li t0, SYS_SLEEP
1447 + sw zero, 0(t0) /* Put processor to sleep */
1448 sync
1449 + nop
1450 + nop
1451 + nop
1452 + nop
1453 + nop
1454 + nop
1455 + nop
1456 + nop
1457 +
1458
1459 /* This is where we return upon wakeup.
1460 * Reload all of the registers and return.
1461 */
1462 -1: nop
1463 - lw k0, 0x20(sp)
1464 +resume_from_sleep:
1465 + nop
1466 + .set nomacro
1467 + .set noat
1468 +
1469 + lw k0, PT_C0STATUS(sp) // 0x20
1470 mtc0 k0, CP0_STATUS
1471 - lw k0, 0x1c(sp)
1472 + lw k0, PT_CONTEXT(sp) // 0x1c
1473 mtc0 k0, CP0_CONTEXT
1474 - lw k0, 0x18(sp)
1475 + lw k0, PT_PAGEMASK(sp) // 0x18
1476 mtc0 k0, CP0_PAGEMASK
1477 - lw k0, 0x14(sp)
1478 + lw k0, PT_CONFIG(sp) // 0x14
1479 mtc0 k0, CP0_CONFIG
1480 lw $1, PT_R1(sp)
1481 lw $2, PT_R2(sp)
1482 @@ -120,14 +193,6 @@
1483 lw $5, PT_R5(sp)
1484 lw $6, PT_R6(sp)
1485 lw $7, PT_R7(sp)
1486 - lw $8, PT_R8(sp)
1487 - lw $9, PT_R9(sp)
1488 - lw $10, PT_R10(sp)
1489 - lw $11, PT_R11(sp)
1490 - lw $12, PT_R12(sp)
1491 - lw $13, PT_R13(sp)
1492 - lw $14, PT_R14(sp)
1493 - lw $15, PT_R15(sp)
1494 lw $16, PT_R16(sp)
1495 lw $17, PT_R17(sp)
1496 lw $18, PT_R18(sp)
1497 @@ -136,15 +201,36 @@
1498 lw $21, PT_R21(sp)
1499 lw $22, PT_R22(sp)
1500 lw $23, PT_R23(sp)
1501 - lw $24, PT_R24(sp)
1502 - lw $25, PT_R25(sp)
1503 - lw $26, PT_R26(sp)
1504 - lw $27, PT_R27(sp)
1505 lw $28, PT_R28(sp)
1506 - lw $29, PT_R29(sp)
1507 lw $30, PT_R30(sp)
1508 lw $31, PT_R31(sp)
1509 +
1510 + .set macro
1511 + .set at
1512 +
1513 + /* clear the wake source, but save it as the return value of the function */
1514 + li t0, SYS_WAKESRC
1515 + lw v0, 0(t0)
1516 + sw v0, PT_R2(sp)
1517 + sw zero, 0(t0)
1518 +
1519 addiu sp, PT_SIZE
1520
1521 + lw gp, save_and_sleep_frmsz-44(sp)
1522 + lw s8, save_and_sleep_frmsz-40(sp)
1523 + lw s7, save_and_sleep_frmsz-36(sp)
1524 + lw s6, save_and_sleep_frmsz-32(sp)
1525 + lw s5, save_and_sleep_frmsz-28(sp)
1526 + lw s4, save_and_sleep_frmsz-24(sp)
1527 + lw s3, save_and_sleep_frmsz-20(sp)
1528 + lw s2, save_and_sleep_frmsz-16(sp)
1529 + lw s1, save_and_sleep_frmsz-12(sp)
1530 + lw s0, save_and_sleep_frmsz-8(sp)
1531 + lw ra, save_and_sleep_frmsz-4(sp)
1532 +
1533 + addu sp, save_and_sleep_frmsz
1534 jr ra
1535 + nop
1536 + .set reorder
1537 END(save_and_sleep)
1538 +
1539 diff -Nur linux-2.4.29/arch/mips/au1000/common/time.c linux-mips/arch/mips/au1000/common/time.c
1540 --- linux-2.4.29/arch/mips/au1000/common/time.c 2005-01-19 15:09:26.000000000 +0100
1541 +++ linux-mips/arch/mips/au1000/common/time.c 2005-01-31 12:59:30.000000000 +0100
1542 @@ -437,9 +437,6 @@
1543 au_writel(0, SYS_TOYWRITE);
1544 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
1545
1546 - au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
1547 - au_writel(~0, SYS_WAKESRC);
1548 - au_sync();
1549 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1550
1551 /* setup match20 to interrupt once every 10ms */
1552 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/Makefile linux-mips/arch/mips/au1000/db1x00/Makefile
1553 --- linux-2.4.29/arch/mips/au1000/db1x00/Makefile 2005-01-19 15:09:26.000000000 +0100
1554 +++ linux-mips/arch/mips/au1000/db1x00/Makefile 2005-01-31 12:59:30.000000000 +0100
1555 @@ -17,4 +17,11 @@
1556 obj-y := init.o board_setup.o irqmap.o
1557 obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
1558
1559 +ifdef CONFIG_MIPS_DB1100
1560 +ifdef CONFIG_MMC
1561 +obj-y += mmc_support.o
1562 +export-objs += mmc_support.o
1563 +endif
1564 +endif
1565 +
1566 include $(TOPDIR)/Rules.make
1567 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/board_setup.c linux-mips/arch/mips/au1000/db1x00/board_setup.c
1568 --- linux-2.4.29/arch/mips/au1000/db1x00/board_setup.c 2005-01-19 15:09:26.000000000 +0100
1569 +++ linux-mips/arch/mips/au1000/db1x00/board_setup.c 2005-01-31 12:59:30.000000000 +0100
1570 @@ -46,10 +46,22 @@
1571 #include <asm/au1000.h>
1572 #include <asm/db1x00.h>
1573
1574 -extern struct rtc_ops no_rtc_ops;
1575 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1576 +#include <asm/au1xxx_dbdma.h>
1577 +extern struct ide_ops *ide_ops;
1578 +extern struct ide_ops au1xxx_ide_ops;
1579 +extern u32 au1xxx_ide_virtbase;
1580 +extern u64 au1xxx_ide_physbase;
1581 +extern int au1xxx_ide_irq;
1582 +
1583 +/* Ddma */
1584 +chan_tab_t *ide_read_ch, *ide_write_ch;
1585 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
1586 +
1587 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
1588 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
1589
1590 -/* not correct for db1550 */
1591 -static BCSR * const bcsr = (BCSR *)0xAE000000;
1592 +extern struct rtc_ops no_rtc_ops;
1593
1594 void board_reset (void)
1595 {
1596 @@ -108,8 +120,42 @@
1597 au_writel(0x02000200, GPIO2_OUTPUT);
1598 #endif
1599
1600 +#if defined(CONFIG_AU1XXX_SMC91111)
1601 +#define CPLD_CONTROL (0xAF00000C)
1602 + {
1603 + extern uint32_t au1xxx_smc91111_base;
1604 + extern unsigned int au1xxx_smc91111_irq;
1605 + extern int au1xxx_smc91111_nowait;
1606 +
1607 + au1xxx_smc91111_base = 0xAC000300;
1608 + au1xxx_smc91111_irq = AU1000_GPIO_8;
1609 + au1xxx_smc91111_nowait = 1;
1610 +
1611 + /* set up the Static Bus timing - only 396Mhz */
1612 + bcsr->resets |= 0x7;
1613 + au_writel(0x00010003, MEM_STCFG0);
1614 + au_writel(0x000c00c0, MEM_STCFG2);
1615 + au_writel(0x85E1900D, MEM_STTIME2);
1616 + }
1617 +#endif /* end CONFIG_SMC91111 */
1618 au_sync();
1619
1620 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1621 + /*
1622 + * Iniz IDE parameters
1623 + */
1624 + ide_ops = &au1xxx_ide_ops;
1625 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
1626 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
1627 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
1628 +
1629 + /*
1630 + * change PIO or PIO+Ddma
1631 + * check the GPIO-6 pin condition. db1550:s6_dot
1632 + */
1633 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
1634 +#endif
1635 +
1636 #ifdef CONFIG_MIPS_DB1000
1637 printk("AMD Alchemy Au1000/Db1000 Board\n");
1638 #endif
1639 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/irqmap.c linux-mips/arch/mips/au1000/db1x00/irqmap.c
1640 --- linux-2.4.29/arch/mips/au1000/db1x00/irqmap.c 2005-01-19 15:09:26.000000000 +0100
1641 +++ linux-mips/arch/mips/au1000/db1x00/irqmap.c 2005-01-31 12:59:30.000000000 +0100
1642 @@ -53,6 +53,7 @@
1643 #ifdef CONFIG_MIPS_DB1550
1644 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
1645 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
1646 + { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
1647 #else
1648 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
1649 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
1650 diff -Nur linux-2.4.29/arch/mips/au1000/db1x00/mmc_support.c linux-mips/arch/mips/au1000/db1x00/mmc_support.c
1651 --- linux-2.4.29/arch/mips/au1000/db1x00/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
1652 +++ linux-mips/arch/mips/au1000/db1x00/mmc_support.c 2005-01-30 09:07:01.000000000 +0100
1653 @@ -0,0 +1,126 @@
1654 +/*
1655 + * BRIEF MODULE DESCRIPTION
1656 + *
1657 + * MMC support routines for DB1100.
1658 + *
1659 + *
1660 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
1661 + * Author: Embedded Edge, LLC.
1662 + * Contact: dan@embeddededge.com
1663 + *
1664 + * This program is free software; you can redistribute it and/or modify it
1665 + * under the terms of the GNU General Public License as published by the
1666 + * Free Software Foundation; either version 2 of the License, or (at your
1667 + * option) any later version.
1668 + *
1669 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1670 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1671 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
1672 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1673 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1674 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
1675 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1676 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1677 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1678 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1679 + *
1680 + * You should have received a copy of the GNU General Public License along
1681 + * with this program; if not, write to the Free Software Foundation, Inc.,
1682 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1683 + *
1684 + */
1685 +
1686 +
1687 +#include <linux/config.h>
1688 +#include <linux/kernel.h>
1689 +#include <linux/module.h>
1690 +#include <linux/init.h>
1691 +
1692 +#include <asm/irq.h>
1693 +#include <asm/au1000.h>
1694 +#include <asm/au1100_mmc.h>
1695 +#include <asm/db1x00.h>
1696 +
1697 +
1698 +/* SD/MMC controller support functions */
1699 +
1700 +/*
1701 + * Detect card.
1702 + */
1703 +void mmc_card_inserted(int _n_, int *_res_)
1704 +{
1705 + u32 gpios = au_readl(SYS_PINSTATERD);
1706 + u32 emptybit = (_n_) ? (1<<20) : (1<<19);
1707 + *_res_ = ((gpios & emptybit) == 0);
1708 +}
1709 +
1710 +/*
1711 + * Check card write protection.
1712 + */
1713 +void mmc_card_writable(int _n_, int *_res_)
1714 +{
1715 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1716 + unsigned long mmc_wp, board_specific;
1717 +
1718 + if (_n_) {
1719 + mmc_wp = BCSR_BOARD_SD1_WP;
1720 + } else {
1721 + mmc_wp = BCSR_BOARD_SD0_WP;
1722 + }
1723 +
1724 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1725 +
1726 + if (!(board_specific & mmc_wp)) {/* low means card writable */
1727 + *_res_ = 1;
1728 + } else {
1729 + *_res_ = 0;
1730 + }
1731 +}
1732 +
1733 +/*
1734 + * Apply power to card slot.
1735 + */
1736 +void mmc_power_on(int _n_)
1737 +{
1738 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1739 + unsigned long mmc_pwr, board_specific;
1740 +
1741 + if (_n_) {
1742 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1743 + } else {
1744 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1745 + }
1746 +
1747 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1748 + board_specific |= mmc_pwr;
1749 +
1750 + au_writel(board_specific, (int)(&bcsr->specific));
1751 + au_sync_delay(1);
1752 +}
1753 +
1754 +/*
1755 + * Remove power from card slot.
1756 + */
1757 +void mmc_power_off(int _n_)
1758 +{
1759 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1760 + unsigned long mmc_pwr, board_specific;
1761 +
1762 + if (_n_) {
1763 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1764 + } else {
1765 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1766 + }
1767 +
1768 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1769 + board_specific &= ~mmc_pwr;
1770 +
1771 + au_writel(board_specific, (int)(&bcsr->specific));
1772 + au_sync_delay(1);
1773 +}
1774 +
1775 +EXPORT_SYMBOL(mmc_card_inserted);
1776 +EXPORT_SYMBOL(mmc_card_writable);
1777 +EXPORT_SYMBOL(mmc_power_on);
1778 +EXPORT_SYMBOL(mmc_power_off);
1779 +
1780 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/Makefile linux-mips/arch/mips/au1000/ficmmp/Makefile
1781 --- linux-2.4.29/arch/mips/au1000/ficmmp/Makefile 1970-01-01 01:00:00.000000000 +0100
1782 +++ linux-mips/arch/mips/au1000/ficmmp/Makefile 2005-01-30 09:01:27.000000000 +0100
1783 @@ -0,0 +1,25 @@
1784 +#
1785 +# Copyright 2000 MontaVista Software Inc.
1786 +# Author: MontaVista Software, Inc.
1787 +# ppopov@mvista.com or source@mvista.com
1788 +#
1789 +# Makefile for the Alchemy Semiconductor FIC board.
1790 +#
1791 +# Note! Dependencies are done automagically by 'make dep', which also
1792 +# removes any old dependencies. DON'T put your own dependencies here
1793 +# unless it's something special (ie not a .c file).
1794 +#
1795 +
1796 +USE_STANDARD_AS_RULE := true
1797 +
1798 +O_TARGET := ficmmp.o
1799 +
1800 +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
1801 +
1802 +ifdef CONFIG_MMC
1803 +obj-y += mmc_support.o
1804 +export-objs +=mmc_support.o
1805 +endif
1806 +
1807 +
1808 +include $(TOPDIR)/Rules.make
1809 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/au1200_ibutton.c linux-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c
1810 --- linux-2.4.29/arch/mips/au1000/ficmmp/au1200_ibutton.c 1970-01-01 01:00:00.000000000 +0100
1811 +++ linux-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c 2005-02-03 07:35:29.000000000 +0100
1812 @@ -0,0 +1,270 @@
1813 +/* ----------------------------------------------------------------------
1814 + * mtwilson_keys.c
1815 + *
1816 + * Copyright (C) 2003 Intrinsyc Software Inc.
1817 + *
1818 + * Intel Personal Media Player buttons
1819 + *
1820 + * This program is free software; you can redistribute it and/or modify
1821 + * it under the terms of the GNU General Public License version 2 as
1822 + * published by the Free Software Foundation.
1823 + *
1824 + * May 02, 2003 : Initial version [FB]
1825 + *
1826 + ------------------------------------------------------------------------*/
1827 +
1828 +#include <linux/config.h>
1829 +#include <linux/module.h>
1830 +#include <linux/kernel.h>
1831 +#include <linux/init.h>
1832 +#include <linux/fs.h>
1833 +#include <linux/sched.h>
1834 +#include <linux/miscdevice.h>
1835 +#include <linux/errno.h>
1836 +#include <linux/poll.h>
1837 +#include <linux/delay.h>
1838 +#include <linux/input.h>
1839 +
1840 +#include <asm/au1000.h>
1841 +#include <asm/uaccess.h>
1842 +#include <asm/au1xxx_gpio.h>
1843 +#include <asm/irq.h>
1844 +#include <asm/keyboard.h>
1845 +#include <linux/time.h>
1846 +
1847 +#define DRIVER_VERSION "V1.0"
1848 +#define DRIVER_AUTHOR "FIC"
1849 +#define DRIVER_DESC "FIC Travis Media Player Button Driver"
1850 +#define DRIVER_NAME "Au1200Button"
1851 +
1852 +#define BUTTON_MAIN (1<<1)
1853 +#define BUTTON_SELECT (1<<6)
1854 +#define BUTTON_GUIDE (1<<12)
1855 +#define BUTTON_DOWN (1<<17)
1856 +#define BUTTON_LEFT (1<<19)
1857 +#define BUTTON_RIGHT (1<<26)
1858 +#define BUTTON_UP (1<<28)
1859 +
1860 +#define BUTTON_MASK (\
1861 + BUTTON_MAIN \
1862 + | BUTTON_SELECT \
1863 + | BUTTON_GUIDE \
1864 + | BUTTON_DOWN \
1865 + | BUTTON_LEFT \
1866 + | BUTTON_RIGHT \
1867 + | BUTTON_UP \
1868 + )
1869 +
1870 +#define BUTTON_INVERT (\
1871 + BUTTON_MAIN \
1872 + | 0 \
1873 + | BUTTON_GUIDE \
1874 + | 0 \
1875 + | 0 \
1876 + | 0 \
1877 + | 0 \
1878 + )
1879 +
1880 +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1881 +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1882 +
1883 +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1884 +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1885 +
1886 +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
1887 +
1888 +struct input_dev dev;
1889 +struct timeval cur_tv;
1890 +
1891 +static unsigned int old_tv_usec = 0;
1892 +
1893 +static unsigned int read_button_state(void)
1894 +{
1895 + unsigned int state;
1896 +
1897 + state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
1898 +
1899 + state ^= BUTTON_INVERT; /* invert main & guide button */
1900 +
1901 + /* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
1902 + return state;
1903 +}
1904 +
1905 +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
1906 +static unsigned int bounce()
1907 +{
1908 +
1909 + unsigned int elapsed_time;
1910 +
1911 + do_gettimeofday (&cur_tv);
1912 +
1913 + if (!old_tv_usec) {
1914 + old_tv_usec = cur_tv.tv_usec;
1915 + return 0;
1916 + }
1917 +
1918 + if(cur_tv.tv_usec > old_tv_usec) {
1919 + /* If there hasn't been rollover */
1920 + elapsed_time = ((cur_tv.tv_usec - old_tv_usec));
1921 + }
1922 + else {
1923 + /* Accounting for rollover */
1924 + elapsed_time = ((1000000 - old_tv_usec + cur_tv.tv_usec));
1925 + }
1926 +
1927 + if (elapsed_time > 250000) {
1928 + old_tv_usec = 0; /* reset the bounce time */
1929 + return 0;
1930 + }
1931 +
1932 + return 1;
1933 +}
1934 +
1935 +/* button interrupt handler */
1936 +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
1937 +{
1938 +
1939 + unsigned int i,bit_mask, key_choice;
1940 + u32 button_state;
1941 +
1942 + /* Report state to upper level */
1943 +
1944 + button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
1945 +
1946 + /* Return if this is a repeated (bouncing) event */
1947 + if(bounce())
1948 + return;
1949 +
1950 + /* we want to make keystrokes */
1951 + for( i=0; i< BUTTON_COUNT; i++) {
1952 + bit_mask = 1<<i;
1953 + if (button_state & bit_mask) {
1954 + key_choice = button_map[i];
1955 + /* toggle key down */
1956 + input_report_key(dev, key_choice, 1);
1957 + /* toggle key up */
1958 + input_report_key(dev, key_choice, 0);
1959 + printk("ibutton gpio %d stat %x scan code %d\r\n",
1960 + i, button_state, key_choice);
1961 + /* Only report the first key event; it doesn't make
1962 + * sense for two keys to be pressed at the same time,
1963 + * and causes problems with the directional keys
1964 + * return;
1965 + */
1966 + }
1967 + }
1968 +}
1969 +
1970 +static int
1971 +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
1972 +{
1973 + static int prev_scancode;
1974 +
1975 + printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n",
1976 + scancode, raw_mode);
1977 +
1978 + if (scancode == 0xe0 || scancode == 0xe1) {
1979 + prev_scancode = scancode;
1980 + return 0;
1981 + }
1982 +
1983 + if (scancode == 0x00 || scancode == 0xff) {
1984 + prev_scancode = 0;
1985 + return 0;
1986 + }
1987 +
1988 + *keycode = scancode;
1989 +
1990 + return 1;
1991 +}
1992 +
1993 +/* init button hardware */
1994 +static int button_hw_init(void)
1995 +{
1996 + unsigned int ipinfunc=0;
1997 +
1998 + printk("au1200_ibutton.c: Initializing buttons hardware\n");
1999 +
2000 + // initialize GPIO pin function assignments
2001 +
2002 + ipinfunc = au_readl(SYS_PINFUNC);
2003 +
2004 + ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);
2005 + au_writel( ipinfunc ,SYS_PINFUNC);
2006 +
2007 + ipinfunc |= (SYS_PINFUNC_S0C);
2008 + au_writel( ipinfunc ,SYS_PINFUNC);
2009 +
2010 + return 0;
2011 +}
2012 +
2013 +/* button driver init */
2014 +static int __init button_init(void)
2015 +{
2016 + int ret, i;
2017 + unsigned int flag=0;
2018 +
2019 + printk("au1200_ibutton.c: button_init()\r\n");
2020 +
2021 + button_hw_init();
2022 +
2023 + /* register all button irq handler */
2024 +
2025 + for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
2026 + {
2027 + /* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
2028 + if(button_map[i] != 0)
2029 + {
2030 + ret = request_irq(AU1000_GPIO_0 + i ,
2031 + &button_interrupt , SA_INTERRUPT ,
2032 + DRIVER_NAME , &dev);
2033 + if(ret) flag |= 1<<i;
2034 + }
2035 + }
2036 +
2037 + printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
2038 +
2039 + if (ret) {
2040 + printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
2041 + return ret;
2042 + }
2043 +
2044 + dev.name = DRIVER_NAME;
2045 + dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
2046 +
2047 + for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2048 + {
2049 + dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
2050 + }
2051 +
2052 + input_register_device(&dev);
2053 +
2054 + /* ready to receive interrupts */
2055 +
2056 + return 0;
2057 +}
2058 +
2059 +/* button driver exit */
2060 +static void __exit button_exit(void)
2061 +{
2062 + int i;
2063 +
2064 + for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2065 + {
2066 + if(button_map[i] != 0)
2067 + {
2068 + free_irq( AU1000_GPIO_0 + i, &dev);
2069 + }
2070 + }
2071 +
2072 + input_unregister_device(&dev);
2073 +
2074 + printk("au1200_ibutton.c: button_exit()\r\n");
2075 +}
2076 +
2077 +module_init(button_init);
2078 +module_exit(button_exit);
2079 +
2080 +MODULE_AUTHOR( DRIVER_AUTHOR );
2081 +MODULE_DESCRIPTION( DRIVER_DESC );
2082 +MODULE_LICENSE("GPL");
2083 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/au1xxx_dock.c linux-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c
2084 --- linux-2.4.29/arch/mips/au1000/ficmmp/au1xxx_dock.c 1970-01-01 01:00:00.000000000 +0100
2085 +++ linux-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c 2005-01-30 09:01:27.000000000 +0100
2086 @@ -0,0 +1,261 @@
2087 +/*
2088 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2089 + *
2090 + * This program is free software; you can redistribute it and/or modify
2091 + * it under the terms of the GNU General Public License version 2 as
2092 + * published by the Free Software Foundation.
2093 + */
2094 +
2095 +#include <linux/config.h>
2096 +#include <linux/module.h>
2097 +#include <linux/init.h>
2098 +#include <linux/fs.h>
2099 +#include <linux/sched.h>
2100 +#include <linux/miscdevice.h>
2101 +#include <linux/errno.h>
2102 +#include <linux/poll.h>
2103 +#include <asm/au1000.h>
2104 +#include <asm/uaccess.h>
2105 +#include <asm/au1xxx_gpio.h>
2106 +
2107 +
2108 +#if defined(CONFIG_MIPS_FICMMP)
2109 + #define DOCK_GPIO 215
2110 +#else
2111 + #error Unsupported Au1xxx Platform
2112 +#endif
2113 +
2114 +#define MAKE_FLAG 0x20
2115 +
2116 +#undef DEBUG
2117 +
2118 +#define DEBUG 0
2119 +//#define DEBUG 1
2120 +
2121 +#if DEBUG
2122 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2123 +#else
2124 +#define DPRINTK(format, args...) do { } while (0)
2125 +#endif
2126 +
2127 +/* Please note that this driver is based on a timer and is not interrupt
2128 + * driven. If you are going to make use of this driver, you will need to have
2129 + * your application open the dock listing from the /dev directory first.
2130 + */
2131 +
2132 +struct au1xxx_dock {
2133 + struct fasync_struct *fasync;
2134 + wait_queue_head_t read_wait;
2135 + int open_count;
2136 + unsigned int debounce;
2137 + unsigned int current;
2138 + unsigned int last;
2139 +};
2140 +
2141 +static struct au1xxx_dock dock_info;
2142 +
2143 +
2144 +static void dock_timer_periodic(void *data);
2145 +
2146 +static struct tq_struct dock_task = {
2147 + routine: dock_timer_periodic,
2148 + data: NULL
2149 +};
2150 +
2151 +static int cleanup_flag = 0;
2152 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2153 +
2154 +
2155 +static unsigned int read_dock_state(void)
2156 +{
2157 + u32 state;
2158 +
2159 + state = au1xxx_gpio_read(DOCK_GPIO);
2160 +
2161 + /* printk( "Current Dock State: %d\n", state ); */
2162 +
2163 + return state;
2164 +}
2165 +
2166 +
2167 +static void dock_timer_periodic(void *data)
2168 +{
2169 + struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
2170 + unsigned long dock_state;
2171 +
2172 + /* If cleanup wants us to die */
2173 + if (cleanup_flag) {
2174 + /* now cleanup_module can return */
2175 + wake_up(&cleanup_wait_queue);
2176 + } else {
2177 + /* put ourselves back in the task queue */
2178 + queue_task(&dock_task, &tq_timer);
2179 + }
2180 +
2181 + /* read current dock */
2182 + dock_state = read_dock_state();
2183 +
2184 + /* if dock states hasn't changed */
2185 + /* save time and be done. */
2186 + if (dock_state == dock->current) {
2187 + return;
2188 + }
2189 +
2190 + if (dock_state == dock->debounce) {
2191 + dock->current = dock_state;
2192 + } else {
2193 + dock->debounce = dock_state;
2194 + }
2195 + if (dock->current != dock->last) {
2196 + if (waitqueue_active(&dock->read_wait)) {
2197 + wake_up_interruptible(&dock->read_wait);
2198 + }
2199 + }
2200 +}
2201 +
2202 +
2203 +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2204 +{
2205 + struct au1xxx_dock *dock = filp->private_data;
2206 + char event[3];
2207 + int last;
2208 + int cur;
2209 + int err;
2210 +
2211 +try_again:
2212 +
2213 + while (dock->current == dock->last) {
2214 + if (filp->f_flags & O_NONBLOCK) {
2215 + return -EAGAIN;
2216 + }
2217 + interruptible_sleep_on(&dock->read_wait);
2218 + if (signal_pending(current)) {
2219 + return -ERESTARTSYS;
2220 + }
2221 + }
2222 +
2223 + cur = dock->current;
2224 + last = dock->last;
2225 +
2226 + if(cur != last)
2227 + {
2228 + event[0] = cur ? 'D' : 'U';
2229 + event[1] = '\r';
2230 + event[2] = '\n';
2231 + }
2232 + else
2233 + goto try_again;
2234 +
2235 + dock->last = cur;
2236 + err = copy_to_user(buffer, &event, 3);
2237 + if (err) {
2238 + return err;
2239 + }
2240 +
2241 + return 3;
2242 +}
2243 +
2244 +
2245 +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
2246 +{
2247 + struct au1xxx_dock *dock = &dock_info;
2248 +
2249 + MOD_INC_USE_COUNT;
2250 +
2251 + filp->private_data = dock;
2252 +
2253 + if (dock->open_count++ == 0) {
2254 + dock_task.data = dock;
2255 + cleanup_flag = 0;
2256 + queue_task(&dock_task, &tq_timer);
2257 + }
2258 +
2259 + return 0;
2260 +}
2261 +
2262 +
2263 +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
2264 +{
2265 + struct au1xxx_dock *dock = filp->private_data;
2266 + int ret = 0;
2267 +
2268 + DPRINTK("start\n");
2269 + poll_wait(filp, &dock->read_wait, wait);
2270 + if (dock->current != dock->last) {
2271 + ret = POLLIN | POLLRDNORM;
2272 + }
2273 + return ret;
2274 +}
2275 +
2276 +
2277 +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
2278 +{
2279 + struct au1xxx_dock *dock = filp->private_data;
2280 +
2281 + DPRINTK("start\n");
2282 +
2283 + if (--dock->open_count == 0) {
2284 + cleanup_flag = 1;
2285 + sleep_on(&cleanup_wait_queue);
2286 + }
2287 + MOD_DEC_USE_COUNT;
2288 +
2289 + return 0;
2290 +}
2291 +
2292 +
2293 +
2294 +static struct file_operations au1xxx_dock_fops = {
2295 + owner: THIS_MODULE,
2296 + read: au1xxx_dock_read,
2297 + poll: au1xxx_dock_poll,
2298 + open: au1xxx_dock_open,
2299 + release: au1xxx_dock_release,
2300 +};
2301 +
2302 +/*
2303 + * The au1xxx dock is a misc device:
2304 + * Major 10 char
2305 + * Minor 22 /dev/dock
2306 + *
2307 + * This is /dev/misc/dock if devfs is used.
2308 + */
2309 +
2310 +static struct miscdevice au1xxx_dock_dev = {
2311 + minor: 23,
2312 + name: "dock",
2313 + fops: &au1xxx_dock_fops,
2314 +};
2315 +
2316 +static int __init au1xxx_dock_init(void)
2317 +{
2318 + struct au1xxx_dock *dock = &dock_info;
2319 + int ret;
2320 +
2321 + DPRINTK("Initializing dock driver\n");
2322 + dock->open_count = 0;
2323 + cleanup_flag = 0;
2324 + init_waitqueue_head(&dock->read_wait);
2325 +
2326 +
2327 + /* yamon configures GPIO pins for the dock
2328 + * no initialization needed
2329 + */
2330 +
2331 + ret = misc_register(&au1xxx_dock_dev);
2332 +
2333 + DPRINTK("dock driver fully initialized.\n");
2334 +
2335 + return ret;
2336 +}
2337 +
2338 +
2339 +static void __exit au1xxx_dock_exit(void)
2340 +{
2341 + DPRINTK("unloading dock driver\n");
2342 + misc_deregister(&au1xxx_dock_dev);
2343 +}
2344 +
2345 +
2346 +module_init(au1xxx_dock_init);
2347 +module_exit(au1xxx_dock_exit);
2348 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/board_setup.c linux-mips/arch/mips/au1000/ficmmp/board_setup.c
2349 --- linux-2.4.29/arch/mips/au1000/ficmmp/board_setup.c 1970-01-01 01:00:00.000000000 +0100
2350 +++ linux-mips/arch/mips/au1000/ficmmp/board_setup.c 2005-01-30 09:01:27.000000000 +0100
2351 @@ -0,0 +1,191 @@
2352 +/*
2353 + *
2354 + * BRIEF MODULE DESCRIPTION
2355 + * Alchemy Pb1200 board setup.
2356 + *
2357 + * This program is free software; you can redistribute it and/or modify it
2358 + * under the terms of the GNU General Public License as published by the
2359 + * Free Software Foundation; either version 2 of the License, or (at your
2360 + * option) any later version.
2361 + *
2362 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2363 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2364 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2365 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2366 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2367 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2368 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2369 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2370 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2371 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2372 + *
2373 + * You should have received a copy of the GNU General Public License along
2374 + * with this program; if not, write to the Free Software Foundation, Inc.,
2375 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2376 + */
2377 +#include <linux/config.h>
2378 +#include <linux/init.h>
2379 +#include <linux/sched.h>
2380 +#include <linux/ioport.h>
2381 +#include <linux/mm.h>
2382 +#include <linux/console.h>
2383 +#include <linux/mc146818rtc.h>
2384 +#include <linux/delay.h>
2385 +#include <linux/ide.h>
2386 +
2387 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2388 +#include <linux/ide.h>
2389 +#endif
2390 +
2391 +#include <asm/cpu.h>
2392 +#include <asm/bootinfo.h>
2393 +#include <asm/irq.h>
2394 +#include <asm/keyboard.h>
2395 +#include <asm/mipsregs.h>
2396 +#include <asm/reboot.h>
2397 +#include <asm/pgtable.h>
2398 +#include <asm/au1000.h>
2399 +#include <asm/ficmmp.h>
2400 +#include <asm/au1xxx_dbdma.h>
2401 +#include <asm/au1xxx_gpio.h>
2402 +
2403 +extern struct rtc_ops no_rtc_ops;
2404 +
2405 +/* value currently in the board configuration register */
2406 +u16 ficmmp_config = 0;
2407 +
2408 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2409 +extern struct ide_ops *ide_ops;
2410 +extern struct ide_ops au1xxx_ide_ops;
2411 +extern u32 au1xxx_ide_virtbase;
2412 +extern u64 au1xxx_ide_physbase;
2413 +extern int au1xxx_ide_irq;
2414 +
2415 +u32 led_base_addr;
2416 +/* Ddma */
2417 +chan_tab_t *ide_read_ch, *ide_write_ch;
2418 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
2419 +
2420 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
2421 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
2422 +
2423 +void board_reset (void)
2424 +{
2425 + au_writel(0, 0xAD80001C);
2426 +}
2427 +
2428 +void __init board_setup(void)
2429 +{
2430 + char *argptr = NULL;
2431 + u32 pin_func;
2432 + rtc_ops = &no_rtc_ops;
2433 +
2434 + ficmmp_config_init(); //Initialize FIC control register
2435 +
2436 +#if 0
2437 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
2438 + * but it is board specific code, so put it here.
2439 + */
2440 + pin_func = au_readl(SYS_PINFUNC);
2441 + au_sync();
2442 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
2443 + au_writel(pin_func, SYS_PINFUNC);
2444 +
2445 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
2446 + au_sync();
2447 +#endif
2448 +
2449 +#if defined( CONFIG_I2C_ALGO_AU1550 )
2450 + {
2451 + u32 freq0, clksrc;
2452 +
2453 + /* Select SMBUS in CPLD */
2454 + /* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
2455 +
2456 + pin_func = au_readl(SYS_PINFUNC);
2457 + au_sync();
2458 + pin_func &= ~(3<<17 | 1<<4);
2459 + /* Set GPIOs correctly */
2460 + pin_func |= 2<<17;
2461 + au_writel(pin_func, SYS_PINFUNC);
2462 + au_sync();
2463 +
2464 + /* The i2c driver depends on 50Mhz clock */
2465 + freq0 = au_readl(SYS_FREQCTRL0);
2466 + au_sync();
2467 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
2468 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
2469 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
2470 + au_writel(freq0, SYS_FREQCTRL0);
2471 + au_sync();
2472 + freq0 |= SYS_FC_FE1;
2473 + au_writel(freq0, SYS_FREQCTRL0);
2474 + au_sync();
2475 +
2476 + clksrc = au_readl(SYS_CLKSRC);
2477 + au_sync();
2478 + clksrc &= ~0x01f00000;
2479 + /* bit 22 is EXTCLK0 for PSC0 */
2480 + clksrc |= (0x3 << 22);
2481 + au_writel(clksrc, SYS_CLKSRC);
2482 + au_sync();
2483 + }
2484 +#endif
2485 +
2486 +#ifdef CONFIG_FB_AU1200
2487 + argptr = prom_getcmdline();
2488 + strcat(argptr, " video=au1200fb:panel:s11");
2489 +#endif
2490 +
2491 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2492 + /*
2493 + * Iniz IDE parameters
2494 + */
2495 + ide_ops = &au1xxx_ide_ops;
2496 + au1xxx_ide_irq = FICMMP_IDE_INT;
2497 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
2498 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
2499 + switch4ddma = 0;
2500 + /*
2501 + ide_ops = &au1xxx_ide_ops;
2502 + au1xxx_ide_irq = FICMMP_IDE_INT;
2503 + au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
2504 + */
2505 + au1xxx_gpio_write(9, 1);
2506 + printk("B4001010: %X\n", *((u32*)0xB4001010));
2507 + printk("B4001014: %X\n", *((u32*)0xB4001014));
2508 + printk("B4001018: %X\n", *((u32*)0xB4001018));
2509 + printk("B1900100: %X\n", *((u32*)0xB1900100));
2510 +
2511 +#if 0
2512 + ficmmp_config_clear(FICMMP_CONFIG_IDERST);
2513 + mdelay(100);
2514 + ficmmp_config_set(FICMMP_CONFIG_IDERST);
2515 + mdelay(100);
2516 +#endif
2517 + /*
2518 + * change PIO or PIO+Ddma
2519 + * check the GPIO-5 pin condition. pb1200:s18_dot
2520 + */
2521 +/* switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
2522 +#endif
2523 +
2524 + /* The Pb1200 development board uses external MUX for PSC0 to
2525 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
2526 + */
2527 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
2528 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
2529 + Refer to Pb1200 documentation.
2530 +#elif defined( CONFIG_AU1550_PSC_SPI )
2531 + //bcsr->resets |= BCSR_RESETS_PCS0MUX;
2532 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
2533 + //bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
2534 +#endif
2535 + au_sync();
2536 +
2537 + printk("FIC Multimedia Player Board\n");
2538 + au1xxx_gpio_tristate(5);
2539 + printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
2540 + printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
2541 +}
2542 +
2543 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/init.c linux-mips/arch/mips/au1000/ficmmp/init.c
2544 --- linux-2.4.29/arch/mips/au1000/ficmmp/init.c 1970-01-01 01:00:00.000000000 +0100
2545 +++ linux-mips/arch/mips/au1000/ficmmp/init.c 2005-01-30 09:01:27.000000000 +0100
2546 @@ -0,0 +1,76 @@
2547 +/*
2548 + *
2549 + * BRIEF MODULE DESCRIPTION
2550 + * PB1200 board setup
2551 + *
2552 + * This program is free software; you can redistribute it and/or modify it
2553 + * under the terms of the GNU General Public License as published by the
2554 + * Free Software Foundation; either version 2 of the License, or (at your
2555 + * option) any later version.
2556 + *
2557 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2558 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2559 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2560 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2561 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2562 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2563 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2564 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2565 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2566 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2567 + *
2568 + * You should have received a copy of the GNU General Public License along
2569 + * with this program; if not, write to the Free Software Foundation, Inc.,
2570 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2571 + */
2572 +
2573 +#include <linux/init.h>
2574 +#include <linux/mm.h>
2575 +#include <linux/sched.h>
2576 +#include <linux/bootmem.h>
2577 +#include <asm/addrspace.h>
2578 +#include <asm/bootinfo.h>
2579 +#include <linux/config.h>
2580 +#include <linux/string.h>
2581 +#include <linux/kernel.h>
2582 +#include <linux/sched.h>
2583 +
2584 +int prom_argc;
2585 +char **prom_argv, **prom_envp;
2586 +extern void __init prom_init_cmdline(void);
2587 +extern char *prom_getenv(char *envname);
2588 +
2589 +const char *get_system_type(void)
2590 +{
2591 + return "FIC Multimedia Player (Au1200)";
2592 +}
2593 +
2594 +u32 mae_memsize = 0;
2595 +
2596 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
2597 +{
2598 + unsigned char *memsize_str;
2599 + unsigned long memsize;
2600 +
2601 + prom_argc = argc;
2602 + prom_argv = argv;
2603 + prom_envp = envp;
2604 +
2605 + mips_machgroup = MACH_GROUP_ALCHEMY;
2606 + mips_machtype = MACH_PB1000; /* set the platform # */
2607 + prom_init_cmdline();
2608 +
2609 + memsize_str = prom_getenv("memsize");
2610 + if (!memsize_str) {
2611 + memsize = 0x08000000;
2612 + } else {
2613 + memsize = simple_strtol(memsize_str, NULL, 0);
2614 + }
2615 +
2616 + /* reserved 32MB for MAE driver */
2617 + memsize -= (32 * 1024 * 1024);
2618 + add_memory_region(0, memsize, BOOT_MEM_RAM);
2619 + mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
2620 + return 0;
2621 +}
2622 +
2623 diff -Nur linux-2.4.29/arch/mips/au1000/ficmmp/irqmap.c linux-mips/arch/mips/au1000/ficmmp/irqmap.c
2624 --- linux-2.4.29/arch/mips/au1000/ficmmp/irqmap.c 1970-01-01 01:00:00.000000000 +0100
2625 +++ linux-mips/arch/mips/au1000/ficmmp/irqmap.c 2005-01-30 09:01:27.000000000 +0100
2626 @@ -0,0 +1,61 @@
2627 +/*
2628 + * BRIEF MODULE DESCRIPTION
2629 + * Au1xxx irq map table
2630 + *
2631 + * This program is free software; you can redistribute it and/or modify it
2632 + * under the terms of the GNU General Public License as published by the
2633 + * Free Software Foundation; either version 2 of the License, or (at your
2634 + * option) any later version.
2635 + *
2636 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2637 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2638 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2639 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2640 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2641 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2642 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2643 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2644 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2645 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2646 + *
2647 + * You should have received a copy of the GNU General Public License along
2648 + * with this program; if not, write to the Free Software Foundation, Inc.,
2649 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2650 + */
2651 +#include <linux/errno.h>
2652 +#include <linux/init.h>
2653 +#include <linux/irq.h>
2654 +#include <linux/kernel_stat.h>
2655 +#include <linux/module.h>
2656 +#include <linux/signal.h>
2657 +#include <linux/sched.h>
2658 +#include <linux/types.h>
2659 +#include <linux/interrupt.h>
2660 +#include <linux/ioport.h>
2661 +#include <linux/timex.h>
2662 +#include <linux/slab.h>
2663 +#include <linux/random.h>
2664 +#include <linux/delay.h>
2665 +
2666 +#include <asm/bitops.h>
2667 +#include <asm/bootinfo.h>
2668 +#include <asm/io.h>
2669 +#include <asm/mipsregs.h>
2670 +#include <asm/system.h>
2671 +#include <asm/au1000.h>
2672 +#include <asm/ficmmp.h>
2673 +
2674 +au1xxx_irq_map_t au1xxx_irq_map[] = {
2675 + { FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
2676 + { AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
2677 + { AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 }, // main button
2678 + { AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 }, // select button
2679 + { AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 }, // guide button
2680 + { AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 }, // down button
2681 + { AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 }, // left button
2682 + { AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 }, // right button
2683 + { AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 }, // up button
2684 +};
2685 +
2686 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
2687 +
2688 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/Makefile linux-mips/arch/mips/au1000/hydrogen3/Makefile
2689 --- linux-2.4.29/arch/mips/au1000/hydrogen3/Makefile 2005-01-19 15:09:26.000000000 +0100
2690 +++ linux-mips/arch/mips/au1000/hydrogen3/Makefile 2005-02-12 04:05:28.000000000 +0100
2691 @@ -14,6 +14,11 @@
2692
2693 O_TARGET := hydrogen3.o
2694
2695 -obj-y := init.o board_setup.o irqmap.o
2696 +obj-y := init.o board_setup.o irqmap.o buttons.o
2697 +
2698 +ifdef CONFIG_MMC
2699 +obj-y += mmc_support.o
2700 +export-objs +=mmc_support.o
2701 +endif
2702
2703 include $(TOPDIR)/Rules.make
2704 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/board_setup.c linux-mips/arch/mips/au1000/hydrogen3/board_setup.c
2705 --- linux-2.4.29/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-19 15:09:26.000000000 +0100
2706 +++ linux-mips/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-31 12:59:30.000000000 +0100
2707 @@ -57,6 +57,9 @@
2708
2709 rtc_ops = &no_rtc_ops;
2710
2711 + /* Set GPIO14 high to make CD/DAT1 high for MMC to work */
2712 + au_writel(1<<14, SYS_OUTPUTSET);
2713 +
2714 #ifdef CONFIG_AU1X00_USB_DEVICE
2715 // 2nd USB port is USB device
2716 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
2717 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/buttons.c linux-mips/arch/mips/au1000/hydrogen3/buttons.c
2718 --- linux-2.4.29/arch/mips/au1000/hydrogen3/buttons.c 1970-01-01 01:00:00.000000000 +0100
2719 +++ linux-mips/arch/mips/au1000/hydrogen3/buttons.c 2005-02-11 22:09:55.000000000 +0100
2720 @@ -0,0 +1,308 @@
2721 +/*
2722 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2723 + *
2724 + * This program is free software; you can redistribute it and/or modify
2725 + * it under the terms of the GNU General Public License version 2 as
2726 + * published by the Free Software Foundation.
2727 + */
2728 +
2729 +#include <linux/config.h>
2730 +#include <linux/module.h>
2731 +#include <linux/init.h>
2732 +#include <linux/fs.h>
2733 +#include <linux/sched.h>
2734 +#include <linux/miscdevice.h>
2735 +#include <linux/errno.h>
2736 +#include <linux/poll.h>
2737 +#include <asm/au1000.h>
2738 +#include <asm/uaccess.h>
2739 +
2740 +#define BUTTON_SELECT (1<<1)
2741 +#define BUTTON_1 (1<<2)
2742 +#define BUTTON_2 (1<<3)
2743 +#define BUTTON_ONOFF (1<<6)
2744 +#define BUTTON_3 (1<<7)
2745 +#define BUTTON_4 (1<<8)
2746 +#define BUTTON_LEFT (1<<9)
2747 +#define BUTTON_DOWN (1<<10)
2748 +#define BUTTON_RIGHT (1<<11)
2749 +#define BUTTON_UP (1<<12)
2750 +
2751 +#define BUTTON_MASK (\
2752 + BUTTON_SELECT \
2753 + | BUTTON_1 \
2754 + | BUTTON_2 \
2755 + | BUTTON_ONOFF \
2756 + | BUTTON_3 \
2757 + | BUTTON_4 \
2758 + | BUTTON_LEFT \
2759 + | BUTTON_DOWN \
2760 + | BUTTON_RIGHT \
2761 + | BUTTON_UP \
2762 + )
2763 +
2764 +#define BUTTON_INVERT (\
2765 + BUTTON_SELECT \
2766 + | BUTTON_1 \
2767 + | BUTTON_2 \
2768 + | BUTTON_3 \
2769 + | BUTTON_4 \
2770 + | BUTTON_LEFT \
2771 + | BUTTON_DOWN \
2772 + | BUTTON_RIGHT \
2773 + | BUTTON_UP \
2774 + )
2775 +
2776 +
2777 +
2778 +#define MAKE_FLAG 0x20
2779 +
2780 +#undef DEBUG
2781 +
2782 +#define DEBUG 0
2783 +//#define DEBUG 1
2784 +
2785 +#if DEBUG
2786 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2787 +#else
2788 +#define DPRINTK(format, args...) do { } while (0)
2789 +#endif
2790 +
2791 +/* Please note that this driver is based on a timer and is not interrupt
2792 + * driven. If you are going to make use of this driver, you will need to have
2793 + * your application open the buttons listing from the /dev directory first.
2794 + */
2795 +
2796 +struct hydrogen3_buttons {
2797 + struct fasync_struct *fasync;
2798 + wait_queue_head_t read_wait;
2799 + int open_count;
2800 + unsigned int debounce;
2801 + unsigned int current;
2802 + unsigned int last;
2803 +};
2804 +
2805 +static struct hydrogen3_buttons buttons_info;
2806 +
2807 +
2808 +static void button_timer_periodic(void *data);
2809 +
2810 +static struct tq_struct button_task = {
2811 + routine: button_timer_periodic,
2812 + data: NULL
2813 +};
2814 +
2815 +static int cleanup_flag = 0;
2816 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2817 +
2818 +
2819 +static unsigned int read_button_state(void)
2820 +{
2821 + unsigned long state;
2822 +
2823 + state = inl(SYS_PINSTATERD) & BUTTON_MASK;
2824 + state ^= BUTTON_INVERT;
2825 +
2826 + DPRINTK( "Current Button State: %d\n", state );
2827 +
2828 + return state;
2829 +}
2830 +
2831 +
2832 +static void button_timer_periodic(void *data)
2833 +{
2834 + struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
2835 + unsigned long button_state;
2836 +
2837 + // If cleanup wants us to die
2838 + if (cleanup_flag) {
2839 + wake_up(&cleanup_wait_queue); // now cleanup_module can return
2840 + } else {
2841 + queue_task(&button_task, &tq_timer); // put ourselves back in the task queue
2842 + }
2843 +
2844 + // read current buttons
2845 + button_state = read_button_state();
2846 +
2847 + // if no buttons are down and nothing to do then
2848 + // save time and be done.
2849 + if ((button_state == 0) && (buttons->current == 0)) {
2850 + return;
2851 + }
2852 +
2853 + if (button_state == buttons->debounce) {
2854 + buttons->current = button_state;
2855 + } else {
2856 + buttons->debounce = button_state;
2857 + }
2858 +// printk("0x%04x\n", button_state);
2859 + if (buttons->current != buttons->last) {
2860 + if (waitqueue_active(&buttons->read_wait)) {
2861 + wake_up_interruptible(&buttons->read_wait);
2862 + }
2863 + }
2864 +}
2865 +
2866 +
2867 +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2868 +{
2869 + struct hydrogen3_buttons *buttons = filp->private_data;
2870 + char events[16];
2871 + int index;
2872 + int last;
2873 + int cur;
2874 + int bit;
2875 + int bit_mask;
2876 + int err;
2877 +
2878 + DPRINTK("start\n");
2879 +
2880 +try_again:
2881 +
2882 + while (buttons->current == buttons->last) {
2883 + if (filp->f_flags & O_NONBLOCK) {
2884 + return -EAGAIN;
2885 + }
2886 + interruptible_sleep_on(&buttons->read_wait);
2887 + if (signal_pending(current)) {
2888 + return -ERESTARTSYS;
2889 + }
2890 + }
2891 +
2892 + cur = buttons->current;
2893 + last = buttons->last;
2894 +
2895 + index = 0;
2896 + bit_mask = 1;
2897 + for (bit = 0; (bit < 16) && count; bit++) {
2898 + if ((cur ^ last) & bit_mask) {
2899 + if (cur & bit_mask) {
2900 + events[index] = (bit | MAKE_FLAG) + 'A';
2901 + last |= bit_mask;
2902 + } else {
2903 + events[index] = bit + 'A';
2904 + last &= ~bit_mask;
2905 + }
2906 + index++;
2907 + count--;
2908 + }
2909 + bit_mask <<= 1;
2910 + }
2911 + buttons->last = last;
2912 +
2913 + if (index == 0) {
2914 + goto try_again;
2915 + }
2916 +
2917 + err = copy_to_user(buffer, events, index);
2918 + if (err) {
2919 + return err;
2920 + }
2921 +
2922 + return index;
2923 +}
2924 +
2925 +
2926 +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
2927 +{
2928 + struct hydrogen3_buttons *buttons = &buttons_info;
2929 +
2930 + DPRINTK("start\n");
2931 + MOD_INC_USE_COUNT;
2932 +
2933 + filp->private_data = buttons;
2934 +
2935 + if (buttons->open_count++ == 0) {
2936 + button_task.data = buttons;
2937 + cleanup_flag = 0;
2938 + queue_task(&button_task, &tq_timer);
2939 + }
2940 +
2941 + return 0;
2942 +}
2943 +
2944 +
2945 +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
2946 +{
2947 + struct hydrogen3_buttons *buttons = filp->private_data;
2948 + int ret = 0;
2949 +
2950 + DPRINTK("start\n");
2951 + poll_wait(filp, &buttons->read_wait, wait);
2952 + if (buttons->current != buttons->last) {
2953 + ret = POLLIN | POLLRDNORM;
2954 + }
2955 + return ret;
2956 +}
2957 +
2958 +
2959 +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
2960 +{
2961 + struct hydrogen3_buttons *buttons = filp->private_data;
2962 +
2963 + DPRINTK("start\n");
2964 +
2965 + if (--buttons->open_count == 0) {
2966 + cleanup_flag = 1;
2967 + sleep_on(&cleanup_wait_queue);
2968 + }
2969 + MOD_DEC_USE_COUNT;
2970 +
2971 + return 0;
2972 +}
2973 +
2974 +
2975 +
2976 +static struct file_operations hydrogen3_buttons_fops = {
2977 + owner: THIS_MODULE,
2978 + read: hydrogen3_buttons_read,
2979 + poll: hydrogen3_buttons_poll,
2980 + open: hydrogen3_buttons_open,
2981 + release: hydrogen3_buttons_release,
2982 +};
2983 +
2984 +/*
2985 + * The hydrogen3 buttons is a misc device:
2986 + * Major 10 char
2987 + * Minor 22 /dev/buttons
2988 + *
2989 + * This is /dev/misc/buttons if devfs is used.
2990 + */
2991 +
2992 +static struct miscdevice hydrogen3_buttons_dev = {
2993 + minor: 22,
2994 + name: "buttons",
2995 + fops: &hydrogen3_buttons_fops,
2996 +};
2997 +
2998 +static int __init hydrogen3_buttons_init(void)
2999 +{
3000 + struct hydrogen3_buttons *buttons = &buttons_info;
3001 + int ret;
3002 +
3003 + DPRINTK("Initializing buttons driver\n");
3004 + buttons->open_count = 0;
3005 + cleanup_flag = 0;
3006 + init_waitqueue_head(&buttons->read_wait);
3007 +
3008 +
3009 + // yamon configures GPIO pins for the buttons
3010 + // no initialization needed
3011 +
3012 + ret = misc_register(&hydrogen3_buttons_dev);
3013 +
3014 + DPRINTK("Buttons driver fully initialized.\n");
3015 +
3016 + return ret;
3017 +}
3018 +
3019 +
3020 +static void __exit hydrogen3_buttons_exit(void)
3021 +{
3022 + DPRINTK("unloading buttons driver\n");
3023 + misc_deregister(&hydrogen3_buttons_dev);
3024 +}
3025 +
3026 +
3027 +module_init(hydrogen3_buttons_init);
3028 +module_exit(hydrogen3_buttons_exit);
3029 diff -Nur linux-2.4.29/arch/mips/au1000/hydrogen3/mmc_support.c linux-mips/arch/mips/au1000/hydrogen3/mmc_support.c
3030 --- linux-2.4.29/arch/mips/au1000/hydrogen3/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3031 +++ linux-mips/arch/mips/au1000/hydrogen3/mmc_support.c 2005-02-02 05:27:06.000000000 +0100
3032 @@ -0,0 +1,89 @@
3033 +/*
3034 + * BRIEF MODULE DESCRIPTION
3035 + *
3036 + * MMC support routines for Hydrogen3.
3037 + *
3038 + *
3039 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3040 + * Author: Embedded Edge, LLC.
3041 + * Contact: dan@embeddededge.com
3042 + *
3043 + * This program is free software; you can redistribute it and/or modify it
3044 + * under the terms of the GNU General Public License as published by the
3045 + * Free Software Foundation; either version 2 of the License, or (at your
3046 + * option) any later version.
3047 + *
3048 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3049 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3050 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3051 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3052 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3053 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3054 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3055 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3056 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3057 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3058 + *
3059 + * You should have received a copy of the GNU General Public License along
3060 + * with this program; if not, write to the Free Software Foundation, Inc.,
3061 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3062 + *
3063 + */
3064 +
3065 +
3066 +#include <linux/config.h>
3067 +#include <linux/kernel.h>
3068 +#include <linux/module.h>
3069 +#include <linux/init.h>
3070 +
3071 +#include <asm/irq.h>
3072 +#include <asm/au1000.h>
3073 +#include <asm/au1100_mmc.h>
3074 +
3075 +#define GPIO_17_WP 0x20000
3076 +
3077 +/* SD/MMC controller support functions */
3078 +
3079 +/*
3080 + * Detect card.
3081 + */
3082 +void mmc_card_inserted(int _n_, int *_res_)
3083 +{
3084 + u32 gpios = au_readl(SYS_PINSTATERD);
3085 + u32 emptybit = (1<<16);
3086 + *_res_ = ((gpios & emptybit) == 0);
3087 +}
3088 +
3089 +/*
3090 + * Check card write protection.
3091 + */
3092 +void mmc_card_writable(int _n_, int *_res_)
3093 +{
3094 + unsigned long mmc_wp, board_specific;
3095 + board_specific = au_readl(SYS_OUTPUTSET);
3096 + mmc_wp=GPIO_17_WP;
3097 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3098 + *_res_ = 1;
3099 + } else {
3100 + *_res_ = 0;
3101 + }
3102 +}
3103 +/*
3104 + * Apply power to card slot.
3105 + */
3106 +void mmc_power_on(int _n_)
3107 +{
3108 +}
3109 +
3110 +/*
3111 + * Remove power from card slot.
3112 + */
3113 +void mmc_power_off(int _n_)
3114 +{
3115 +}
3116 +
3117 +EXPORT_SYMBOL(mmc_card_inserted);
3118 +EXPORT_SYMBOL(mmc_card_writable);
3119 +EXPORT_SYMBOL(mmc_power_on);
3120 +EXPORT_SYMBOL(mmc_power_off);
3121 +
3122 diff -Nur linux-2.4.29/arch/mips/au1000/mtx-1/board_setup.c linux-mips/arch/mips/au1000/mtx-1/board_setup.c
3123 --- linux-2.4.29/arch/mips/au1000/mtx-1/board_setup.c 2004-02-18 14:36:30.000000000 +0100
3124 +++ linux-mips/arch/mips/au1000/mtx-1/board_setup.c 2004-11-26 09:37:16.000000000 +0100
3125 @@ -48,6 +48,12 @@
3126
3127 extern struct rtc_ops no_rtc_ops;
3128
3129 +void board_reset (void)
3130 +{
3131 + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3132 + au_writel(0x00000000, 0xAE00001C);
3133 +}
3134 +
3135 void __init board_setup(void)
3136 {
3137 rtc_ops = &no_rtc_ops;
3138 diff -Nur linux-2.4.29/arch/mips/au1000/mtx-1/irqmap.c linux-mips/arch/mips/au1000/mtx-1/irqmap.c
3139 --- linux-2.4.29/arch/mips/au1000/mtx-1/irqmap.c 2005-01-19 15:09:26.000000000 +0100
3140 +++ linux-mips/arch/mips/au1000/mtx-1/irqmap.c 2004-11-26 09:37:16.000000000 +0100
3141 @@ -72,10 +72,10 @@
3142 * A B C D
3143 */
3144 {
3145 - {INTA, INTB, INTC, INTD}, /* IDSEL 0 */
3146 - {INTA, INTB, INTC, INTD}, /* IDSEL 1 */
3147 - {INTA, INTB, INTC, INTD}, /* IDSEL 2 */
3148 - {INTA, INTB, INTC, INTD}, /* IDSEL 3 */
3149 + {INTA, INTB, INTX, INTX}, /* IDSEL 0 */
3150 + {INTB, INTA, INTX, INTX}, /* IDSEL 1 */
3151 + {INTC, INTD, INTX, INTX}, /* IDSEL 2 */
3152 + {INTD, INTC, INTX, INTX}, /* IDSEL 3 */
3153 };
3154 const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
3155 return PCI_IRQ_TABLE_LOOKUP;
3156 diff -Nur linux-2.4.29/arch/mips/au1000/pb1100/Makefile linux-mips/arch/mips/au1000/pb1100/Makefile
3157 --- linux-2.4.29/arch/mips/au1000/pb1100/Makefile 2003-08-25 13:44:39.000000000 +0200
3158 +++ linux-mips/arch/mips/au1000/pb1100/Makefile 2005-01-31 12:59:30.000000000 +0100
3159 @@ -16,4 +16,10 @@
3160
3161 obj-y := init.o board_setup.o irqmap.o
3162
3163 +
3164 +ifdef CONFIG_MMC
3165 +obj-y += mmc_support.o
3166 +export-objs += mmc_support.o
3167 +endif
3168 +
3169 include $(TOPDIR)/Rules.make
3170 diff -Nur linux-2.4.29/arch/mips/au1000/pb1100/mmc_support.c linux-mips/arch/mips/au1000/pb1100/mmc_support.c
3171 --- linux-2.4.29/arch/mips/au1000/pb1100/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3172 +++ linux-mips/arch/mips/au1000/pb1100/mmc_support.c 2005-01-30 09:10:29.000000000 +0100
3173 @@ -0,0 +1,126 @@
3174 +/*
3175 + * BRIEF MODULE DESCRIPTION
3176 + *
3177 + * MMC support routines for PB1100.
3178 + *
3179 + *
3180 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3181 + * Author: Embedded Edge, LLC.
3182 + * Contact: dan@embeddededge.com
3183 + *
3184 + * This program is free software; you can redistribute it and/or modify it
3185 + * under the terms of the GNU General Public License as published by the
3186 + * Free Software Foundation; either version 2 of the License, or (at your
3187 + * option) any later version.
3188 + *
3189 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3190 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3191 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3192 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3193 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3194 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3195 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3196 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3197 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3198 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3199 + *
3200 + * You should have received a copy of the GNU General Public License along
3201 + * with this program; if not, write to the Free Software Foundation, Inc.,
3202 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3203 + *
3204 + */
3205 +
3206 +
3207 +#include <linux/config.h>
3208 +#include <linux/kernel.h>
3209 +#include <linux/module.h>
3210 +#include <linux/init.h>
3211 +
3212 +#include <asm/irq.h>
3213 +#include <asm/au1000.h>
3214 +#include <asm/au1100_mmc.h>
3215 +#include <asm/pb1100.h>
3216 +
3217 +
3218 +/* SD/MMC controller support functions */
3219 +
3220 +/*
3221 + * Detect card.
3222 + */
3223 +void mmc_card_inserted(int _n_, int *_res_)
3224 +{
3225 + u32 gpios = au_readl(SYS_PINSTATERD);
3226 + u32 emptybit = (_n_) ? (1<<15) : (1<<14);
3227 + *_res_ = ((gpios & emptybit) == 0);
3228 +}
3229 +
3230 +/*
3231 + * Check card write protection.
3232 + */
3233 +void mmc_card_writable(int _n_, int *_res_)
3234 +{
3235 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3236 + unsigned long mmc_wp, board_specific;
3237 +
3238 + if (_n_) {
3239 + mmc_wp = BCSR_PCMCIA_SD1_WP;
3240 + } else {
3241 + mmc_wp = BCSR_PCMCIA_SD0_WP;
3242 + }
3243 +
3244 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3245 +
3246 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3247 + *_res_ = 1;
3248 + } else {
3249 + *_res_ = 0;
3250 + }
3251 +}
3252 +
3253 +/*
3254 + * Apply power to card slot.
3255 + */
3256 +void mmc_power_on(int _n_)
3257 +{
3258 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3259 + unsigned long mmc_pwr, board_specific;
3260 +
3261 + if (_n_) {
3262 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3263 + } else {
3264 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3265 + }
3266 +
3267 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3268 + board_specific |= mmc_pwr;
3269 +
3270 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3271 + au_sync_delay(1);
3272 +}
3273 +
3274 +/*
3275 + * Remove power from card slot.
3276 + */
3277 +void mmc_power_off(int _n_)
3278 +{
3279 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3280 + unsigned long mmc_pwr, board_specific;
3281 +
3282 + if (_n_) {
3283 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3284 + } else {
3285 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3286 + }
3287 +
3288 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3289 + board_specific &= ~mmc_pwr;
3290 +
3291 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3292 + au_sync_delay(1);
3293 +}
3294 +
3295 +EXPORT_SYMBOL(mmc_card_inserted);
3296 +EXPORT_SYMBOL(mmc_card_writable);
3297 +EXPORT_SYMBOL(mmc_power_on);
3298 +EXPORT_SYMBOL(mmc_power_off);
3299 +
3300 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/Makefile linux-mips/arch/mips/au1000/pb1200/Makefile
3301 --- linux-2.4.29/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
3302 +++ linux-mips/arch/mips/au1000/pb1200/Makefile 2005-01-30 09:01:27.000000000 +0100
3303 @@ -0,0 +1,25 @@
3304 +#
3305 +# Copyright 2000 MontaVista Software Inc.
3306 +# Author: MontaVista Software, Inc.
3307 +# ppopov@mvista.com or source@mvista.com
3308 +#
3309 +# Makefile for the Alchemy Semiconductor PB1000 board.
3310 +#
3311 +# Note! Dependencies are done automagically by 'make dep', which also
3312 +# removes any old dependencies. DON'T put your own dependencies here
3313 +# unless it's something special (ie not a .c file).
3314 +#
3315 +
3316 +USE_STANDARD_AS_RULE := true
3317 +
3318 +O_TARGET := pb1200.o
3319 +
3320 +obj-y := init.o board_setup.o irqmap.o
3321 +
3322 +ifdef CONFIG_MMC
3323 +obj-y += mmc_support.o
3324 +export-objs +=mmc_support.o
3325 +endif
3326 +
3327 +
3328 +include $(TOPDIR)/Rules.make
3329 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/board_setup.c linux-mips/arch/mips/au1000/pb1200/board_setup.c
3330 --- linux-2.4.29/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
3331 +++ linux-mips/arch/mips/au1000/pb1200/board_setup.c 2005-01-30 09:01:28.000000000 +0100
3332 @@ -0,0 +1,190 @@
3333 +/*
3334 + *
3335 + * BRIEF MODULE DESCRIPTION
3336 + * Alchemy Pb1200 board setup.
3337 + *
3338 + * This program is free software; you can redistribute it and/or modify it
3339 + * under the terms of the GNU General Public License as published by the
3340 + * Free Software Foundation; either version 2 of the License, or (at your
3341 + * option) any later version.
3342 + *
3343 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3344 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3345 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3346 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3347 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3348 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3349 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3350 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3351 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3352 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3353 + *
3354 + * You should have received a copy of the GNU General Public License along
3355 + * with this program; if not, write to the Free Software Foundation, Inc.,
3356 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3357 + */
3358 +#include <linux/config.h>
3359 +#include <linux/init.h>
3360 +#include <linux/sched.h>
3361 +#include <linux/ioport.h>
3362 +#include <linux/mm.h>
3363 +#include <linux/console.h>
3364 +#include <linux/mc146818rtc.h>
3365 +#include <linux/delay.h>
3366 +
3367 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3368 +#include <linux/ide.h>
3369 +#endif
3370 +
3371 +#include <asm/cpu.h>
3372 +#include <asm/bootinfo.h>
3373 +#include <asm/irq.h>
3374 +#include <asm/keyboard.h>
3375 +#include <asm/mipsregs.h>
3376 +#include <asm/reboot.h>
3377 +#include <asm/pgtable.h>
3378 +#include <asm/au1000.h>
3379 +#include <asm/au1xxx_dbdma.h>
3380 +
3381 +#ifdef CONFIG_MIPS_PB1200
3382 +#include <asm/pb1200.h>
3383 +#endif
3384 +
3385 +#ifdef CONFIG_MIPS_DB1200
3386 +#include <asm/db1200.h>
3387 +#define PB1200_ETH_INT DB1200_ETH_INT
3388 +#define PB1200_IDE_INT DB1200_IDE_INT
3389 +#endif
3390 +
3391 +extern struct rtc_ops no_rtc_ops;
3392 +
3393 +extern void _board_init_irq(void);
3394 +extern void (*board_init_irq)(void);
3395 +
3396 +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
3397 +extern struct ide_ops *ide_ops;
3398 +extern struct ide_ops au1xxx_ide_ops;
3399 +extern u32 au1xxx_ide_virtbase;
3400 +extern u64 au1xxx_ide_physbase;
3401 +extern int au1xxx_ide_irq;
3402 +
3403 +u32 led_base_addr;
3404 +/* Ddma */
3405 +chan_tab_t *ide_read_ch, *ide_write_ch;
3406 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3407 +
3408 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
3409 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3410 +
3411 +void board_reset (void)
3412 +{
3413 + bcsr->resets = 0;
3414 +}
3415 +
3416 +void __init board_setup(void)
3417 +{
3418 + char *argptr = NULL;
3419 + u32 pin_func;
3420 + rtc_ops = &no_rtc_ops;
3421 +
3422 +#if 0
3423 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
3424 + * but it is board specific code, so put it here.
3425 + */
3426 + pin_func = au_readl(SYS_PINFUNC);
3427 + au_sync();
3428 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
3429 + au_writel(pin_func, SYS_PINFUNC);
3430 +
3431 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3432 + au_sync();
3433 +#endif
3434 +
3435 +#if defined( CONFIG_I2C_ALGO_AU1550 )
3436 + {
3437 + u32 freq0, clksrc;
3438 +
3439 + /* Select SMBUS in CPLD */
3440 + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
3441 +
3442 + pin_func = au_readl(SYS_PINFUNC);
3443 + au_sync();
3444 + pin_func &= ~(3<<17 | 1<<4);
3445 + /* Set GPIOs correctly */
3446 + pin_func |= 2<<17;
3447 + au_writel(pin_func, SYS_PINFUNC);
3448 + au_sync();
3449 +
3450 + /* The i2c driver depends on 50Mhz clock */
3451 + freq0 = au_readl(SYS_FREQCTRL0);
3452 + au_sync();
3453 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
3454 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
3455 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
3456 + au_writel(freq0, SYS_FREQCTRL0);
3457 + au_sync();
3458 + freq0 |= SYS_FC_FE1;
3459 + au_writel(freq0, SYS_FREQCTRL0);
3460 + au_sync();
3461 +
3462 + clksrc = au_readl(SYS_CLKSRC);
3463 + au_sync();
3464 + clksrc &= ~0x01f00000;
3465 + /* bit 22 is EXTCLK0 for PSC0 */
3466 + clksrc |= (0x3 << 22);
3467 + au_writel(clksrc, SYS_CLKSRC);
3468 + au_sync();
3469 + }
3470 +#endif
3471 +
3472 +#ifdef CONFIG_FB_AU1200
3473 + argptr = prom_getcmdline();
3474 +#ifdef CONFIG_MIPS_PB1200
3475 + strcat(argptr, " video=au1200fb:panel:s11");
3476 +#endif
3477 +#ifdef CONFIG_MIPS_DB1200
3478 + strcat(argptr, " video=au1200fb:panel:s7");
3479 +#endif
3480 +#endif
3481 +
3482 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3483 + /*
3484 + * Iniz IDE parameters
3485 + */
3486 + ide_ops = &au1xxx_ide_ops;
3487 + au1xxx_ide_irq = PB1200_IDE_INT;
3488 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3489 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3490 + /*
3491 + * change PIO or PIO+Ddma
3492 + * check the GPIO-5 pin condition. pb1200:s18_dot */
3493 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
3494 +#endif
3495 +
3496 + /* The Pb1200 development board uses external MUX for PSC0 to
3497 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
3498 + */
3499 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
3500 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
3501 + Refer to Pb1200/Db1200 documentation.
3502 +#elif defined( CONFIG_AU1550_PSC_SPI )
3503 + bcsr->resets |= BCSR_RESETS_PCS0MUX;
3504 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
3505 + bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
3506 +#endif
3507 + au_sync();
3508 +
3509 +#ifdef CONFIG_MIPS_PB1200
3510 + printk("AMD Alchemy Pb1200 Board\n");
3511 +#endif
3512 +#ifdef CONFIG_MIPS_DB1200
3513 + printk("AMD Alchemy Db1200 Board\n");
3514 +#endif
3515 +
3516 + /* Setup Pb1200 External Interrupt Controller */
3517 + {
3518 + extern void (*board_init_irq)(void);
3519 + extern void _board_init_irq(void);
3520 + board_init_irq = _board_init_irq;
3521 + }
3522 +}
3523 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/init.c linux-mips/arch/mips/au1000/pb1200/init.c
3524 --- linux-2.4.29/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
3525 +++ linux-mips/arch/mips/au1000/pb1200/init.c 2005-01-30 09:01:28.000000000 +0100
3526 @@ -0,0 +1,72 @@
3527 +/*
3528 + *
3529 + * BRIEF MODULE DESCRIPTION
3530 + * PB1200 board setup
3531 + *
3532 + * This program is free software; you can redistribute it and/or modify it
3533 + * under the terms of the GNU General Public License as published by the
3534 + * Free Software Foundation; either version 2 of the License, or (at your
3535 + * option) any later version.
3536 + *
3537 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3538 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3539 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3540 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3541 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3542 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3543 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3544 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3545 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3546 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3547 + *
3548 + * You should have received a copy of the GNU General Public License along
3549 + * with this program; if not, write to the Free Software Foundation, Inc.,
3550 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3551 + */
3552 +
3553 +#include <linux/init.h>
3554 +#include <linux/mm.h>
3555 +#include <linux/sched.h>
3556 +#include <linux/bootmem.h>
3557 +#include <asm/addrspace.h>
3558 +#include <asm/bootinfo.h>
3559 +#include <linux/config.h>
3560 +#include <linux/string.h>
3561 +#include <linux/kernel.h>
3562 +#include <linux/sched.h>
3563 +
3564 +int prom_argc;
3565 +char **prom_argv, **prom_envp;
3566 +extern void __init prom_init_cmdline(void);
3567 +extern char *prom_getenv(char *envname);
3568 +
3569 +const char *get_system_type(void)
3570 +{
3571 + return "AMD Alchemy Au1200/Pb1200";
3572 +}
3573 +
3574 +u32 mae_memsize = 0;
3575 +
3576 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
3577 +{
3578 + unsigned char *memsize_str;
3579 + unsigned long memsize;
3580 +
3581 + prom_argc = argc;
3582 + prom_argv = argv;
3583 + prom_envp = envp;
3584 +
3585 + mips_machgroup = MACH_GROUP_ALCHEMY;
3586 + mips_machtype = MACH_PB1000; /* set the platform # */
3587 + prom_init_cmdline();
3588 +
3589 + memsize_str = prom_getenv("memsize");
3590 + if (!memsize_str) {
3591 + memsize = 0x08000000;
3592 + } else {
3593 + memsize = simple_strtol(memsize_str, NULL, 0);
3594 + }
3595 + add_memory_region(0, memsize, BOOT_MEM_RAM);
3596 + return 0;
3597 +}
3598 +
3599 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/irqmap.c linux-mips/arch/mips/au1000/pb1200/irqmap.c
3600 --- linux-2.4.29/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
3601 +++ linux-mips/arch/mips/au1000/pb1200/irqmap.c 2005-01-30 09:01:28.000000000 +0100
3602 @@ -0,0 +1,180 @@
3603 +/*
3604 + * BRIEF MODULE DESCRIPTION
3605 + * Au1xxx irq map table
3606 + *
3607 + * This program is free software; you can redistribute it and/or modify it
3608 + * under the terms of the GNU General Public License as published by the
3609 + * Free Software Foundation; either version 2 of the License, or (at your
3610 + * option) any later version.
3611 + *
3612 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3613 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3614 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3615 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3616 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3617 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3618 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3619 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3620 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3621 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3622 + *
3623 + * You should have received a copy of the GNU General Public License along
3624 + * with this program; if not, write to the Free Software Foundation, Inc.,
3625 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3626 + */
3627 +#include <linux/errno.h>
3628 +#include <linux/init.h>
3629 +#include <linux/irq.h>
3630 +#include <linux/kernel_stat.h>
3631 +#include <linux/module.h>
3632 +#include <linux/signal.h>
3633 +#include <linux/sched.h>
3634 +#include <linux/types.h>
3635 +#include <linux/interrupt.h>
3636 +#include <linux/ioport.h>
3637 +#include <linux/timex.h>
3638 +#include <linux/slab.h>
3639 +#include <linux/random.h>
3640 +#include <linux/delay.h>
3641 +
3642 +#include <asm/bitops.h>
3643 +#include <asm/bootinfo.h>
3644 +#include <asm/io.h>
3645 +#include <asm/mipsregs.h>
3646 +#include <asm/system.h>
3647 +#include <asm/au1000.h>
3648 +
3649 +#ifdef CONFIG_MIPS_PB1200
3650 +#include <asm/pb1200.h>
3651 +#endif
3652 +
3653 +#ifdef CONFIG_MIPS_DB1200
3654 +#include <asm/db1200.h>
3655 +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
3656 +#define PB1200_INT_END DB1200_INT_END
3657 +#endif
3658 +
3659 +au1xxx_irq_map_t au1xxx_irq_map[] = {
3660 + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
3661 +};
3662 +
3663 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3664 +
3665 +/*
3666 + * Support for External interrupts on the PbAu1200 Development platform.
3667 + */
3668 +static volatile int pb1200_cascade_en=0;
3669 +
3670 +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
3671 +{
3672 + unsigned short bisr = bcsr->int_status;
3673 + int extirq_nr = 0;
3674 +
3675 + /* Clear all the edge interrupts. This has no effect on level */
3676 + bcsr->int_status = bisr;
3677 + for( ; bisr; bisr &= (bisr-1) )
3678 + {
3679 + extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
3680 + /* Ack and dispatch IRQ */
3681 + do_IRQ(extirq_nr,regs);
3682 + }
3683 +}
3684 +
3685 +inline void pb1200_enable_irq(unsigned int irq_nr)
3686 +{
3687 + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3688 + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
3689 +}
3690 +
3691 +inline void pb1200_disable_irq(unsigned int irq_nr)
3692 +{
3693 + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3694 + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
3695 +}
3696 +
3697 +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
3698 +{
3699 + if (++pb1200_cascade_en == 1)
3700 + {
3701 + request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
3702 + 0, "Pb1200 Cascade", &pb1200_cascade_handler );
3703 +#ifdef CONFIG_MIPS_PB1200
3704 + /* We have a problem with CPLD rev3. Enable a workaround */
3705 + if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
3706 + {
3707 + printk("\nWARNING!!!\n");
3708 + printk("\nWARNING!!!\n");
3709 + printk("\nWARNING!!!\n");
3710 + printk("\nWARNING!!!\n");
3711 + printk("\nWARNING!!!\n");
3712 + printk("\nWARNING!!!\n");
3713 + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
3714 + printk("updated to latest revision. This software will not\n");
3715 + printk("work on anything less than CPLD rev4\n");
3716 + printk("\nWARNING!!!\n");
3717 + printk("\nWARNING!!!\n");
3718 + printk("\nWARNING!!!\n");
3719 + printk("\nWARNING!!!\n");
3720 + printk("\nWARNING!!!\n");
3721 + printk("\nWARNING!!!\n");
3722 + while(1);
3723 + }
3724 +#endif
3725 + }
3726 + pb1200_enable_irq(irq_nr);
3727 + return 0;
3728 +}
3729 +
3730 +static void pb1200_shutdown_irq( unsigned int irq_nr )
3731 +{
3732 + pb1200_disable_irq(irq_nr);
3733 + if (--pb1200_cascade_en == 0)
3734 + {
3735 + free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
3736 + }
3737 + return;
3738 +}
3739 +
3740 +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
3741 +{
3742 + pb1200_disable_irq( irq_nr );
3743 +}
3744 +
3745 +static void pb1200_end_irq(unsigned int irq_nr)
3746 +{
3747 + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
3748 + pb1200_enable_irq(irq_nr);
3749 + }
3750 +}
3751 +
3752 +static struct hw_interrupt_type external_irq_type =
3753 +{
3754 +#ifdef CONFIG_MIPS_PB1200
3755 + "Pb1200 Ext",
3756 +#endif
3757 +#ifdef CONFIG_MIPS_DB1200
3758 + "Db1200 Ext",
3759 +#endif
3760 + pb1200_startup_irq,
3761 + pb1200_shutdown_irq,
3762 + pb1200_enable_irq,
3763 + pb1200_disable_irq,
3764 + pb1200_mask_and_ack_irq,
3765 + pb1200_end_irq,
3766 + NULL
3767 +};
3768 +
3769 +void _board_init_irq(void)
3770 +{
3771 + int irq_nr;
3772 +
3773 + for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
3774 + {
3775 + irq_desc[irq_nr].handler = &external_irq_type;
3776 + pb1200_disable_irq(irq_nr);
3777 + }
3778 +
3779 + /* GPIO_7 can not be hooked here, so it is hooked upon first
3780 + request of any source attached to the cascade */
3781 +}
3782 +
3783 diff -Nur linux-2.4.29/arch/mips/au1000/pb1200/mmc_support.c linux-mips/arch/mips/au1000/pb1200/mmc_support.c
3784 --- linux-2.4.29/arch/mips/au1000/pb1200/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3785 +++ linux-mips/arch/mips/au1000/pb1200/mmc_support.c 2005-01-30 09:01:28.000000000 +0100
3786 @@ -0,0 +1,141 @@
3787 +/*
3788 + * BRIEF MODULE DESCRIPTION
3789 + *
3790 + * MMC support routines for PB1200.
3791 + *
3792 + *
3793 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3794 + * Author: Embedded Edge, LLC.
3795 + * Contact: dan@embeddededge.com
3796 + *
3797 + * This program is free software; you can redistribute it and/or modify it
3798 + * under the terms of the GNU General Public License as published by the
3799 + * Free Software Foundation; either version 2 of the License, or (at your
3800 + * option) any later version.
3801 + *
3802 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3803 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3804 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3805 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3806 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3807 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3808 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3809 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3810 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3811 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3812 + *
3813 + * You should have received a copy of the GNU General Public License along
3814 + * with this program; if not, write to the Free Software Foundation, Inc.,
3815 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3816 + *
3817 + */
3818 +
3819 +
3820 +#include <linux/config.h>
3821 +#include <linux/kernel.h>
3822 +#include <linux/module.h>
3823 +#include <linux/init.h>
3824 +
3825 +#include <asm/irq.h>
3826 +#include <asm/au1000.h>
3827 +#include <asm/au1100_mmc.h>
3828 +
3829 +#ifdef CONFIG_MIPS_PB1200
3830 +#include <asm/pb1200.h>
3831 +#endif
3832 +
3833 +#ifdef CONFIG_MIPS_DB1200
3834 +/* NOTE: DB1200 only has SD0 pinned out and usable */
3835 +#include <asm/db1200.h>
3836 +#endif
3837 +
3838 +/* SD/MMC controller support functions */
3839 +
3840 +/*
3841 + * Detect card.
3842 + */
3843 +void mmc_card_inserted(int socket, int *result)
3844 +{
3845 + u16 mask;
3846 +
3847 + if (socket)
3848 +#ifdef CONFIG_MIPS_DB1200
3849 + mask = 0;
3850 +#else
3851 + mask = BCSR_INT_SD1INSERT;
3852 +#endif
3853 + else
3854 + mask = BCSR_INT_SD0INSERT;
3855 +
3856 + *result = ((bcsr->sig_status & mask) != 0);
3857 +}
3858 +
3859 +/*
3860 + * Check card write protection.
3861 + */
3862 +void mmc_card_writable(int socket, int *result)
3863 +{
3864 + u16 mask;
3865 +
3866 + if (socket)
3867 +#ifdef CONFIG_MIPS_DB1200
3868 + mask = 0;
3869 +#else
3870 + mask = BCSR_STATUS_SD1WP;
3871 +#endif
3872 + else
3873 + mask = BCSR_STATUS_SD0WP;
3874 +
3875 + /* low means card writable */
3876 + if (!(bcsr->status & mask)) {
3877 + *result = 1;
3878 + } else {
3879 + *result = 0;
3880 + }
3881 +}
3882 +
3883 +/*
3884 + * Apply power to card slot.
3885 + */
3886 +void mmc_power_on(int socket)
3887 +{
3888 + u16 mask;
3889 +
3890 + if (socket)
3891 +#ifdef CONFIG_MIPS_DB1200
3892 + mask = 0;
3893 +#else
3894 + mask = BCSR_BOARD_SD1PWR;
3895 +#endif
3896 + else
3897 + mask = BCSR_BOARD_SD0PWR;
3898 +
3899 + bcsr->board |= mask;
3900 + au_sync_delay(1);
3901 +}
3902 +
3903 +/*
3904 + * Remove power from card slot.
3905 + */
3906 +void mmc_power_off(int socket)
3907 +{
3908 + u16 mask;
3909 +
3910 + if (socket)
3911 +#ifdef CONFIG_MIPS_DB1200
3912 + mask = 0;
3913 +#else
3914 + mask = BCSR_BOARD_SD1PWR;
3915 +#endif
3916 + else
3917 + mask = BCSR_BOARD_SD0PWR;
3918 +
3919 + bcsr->board &= ~mask;
3920 + au_sync_delay(1);
3921 +}
3922 +
3923 +EXPORT_SYMBOL(mmc_card_inserted);
3924 +EXPORT_SYMBOL(mmc_card_writable);
3925 +EXPORT_SYMBOL(mmc_power_on);
3926 +EXPORT_SYMBOL(mmc_power_off);
3927 +
3928 diff -Nur linux-2.4.29/arch/mips/au1000/pb1550/board_setup.c linux-mips/arch/mips/au1000/pb1550/board_setup.c
3929 --- linux-2.4.29/arch/mips/au1000/pb1550/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3930 +++ linux-mips/arch/mips/au1000/pb1550/board_setup.c 2005-01-31 12:59:30.000000000 +0100
3931 @@ -48,6 +48,16 @@
3932
3933 extern struct rtc_ops no_rtc_ops;
3934
3935 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3936 +extern struct ide_ops *ide_ops;
3937 +extern struct ide_ops au1xxx_ide_ops;
3938 +extern u32 au1xxx_ide_virtbase;
3939 +extern u64 au1xxx_ide_physbase;
3940 +extern unsigned int au1xxx_ide_irq;
3941 +
3942 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3943 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3944 +
3945 void board_reset (void)
3946 {
3947 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3948 @@ -78,5 +88,36 @@
3949 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3950 au_sync();
3951
3952 +#if defined(CONFIG_AU1XXX_SMC91111)
3953 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3954 +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
3955 +#else
3956 +#define CPLD_CONTROL (0xAF00000C)
3957 + {
3958 + /* set up the Static Bus timing */
3959 + /* only 396Mhz */
3960 + /* reset the DC */
3961 + au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
3962 + au_writel(0x00010003, MEM_STCFG0);
3963 + au_writel(0x000c00c0, MEM_STCFG2);
3964 + au_writel(0x85E1900D, MEM_STTIME2);
3965 + }
3966 +#endif
3967 +#endif /* end CONFIG_SMC91111 */
3968 +
3969 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3970 + /*
3971 + * Iniz IDE parameters
3972 + */
3973 + ide_ops = &au1xxx_ide_ops;
3974 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
3975 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3976 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3977 + /*
3978 + * change PIO or PIO+Ddma
3979 + * check the GPIO-6 pin condition. pb1550:s15_dot
3980 + */
3981 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
3982 +#endif
3983 printk("AMD Alchemy Pb1550 Board\n");
3984 }
3985 diff -Nur linux-2.4.29/arch/mips/au1000/pb1550/irqmap.c linux-mips/arch/mips/au1000/pb1550/irqmap.c
3986 --- linux-2.4.29/arch/mips/au1000/pb1550/irqmap.c 2005-01-19 15:09:26.000000000 +0100
3987 +++ linux-mips/arch/mips/au1000/pb1550/irqmap.c 2005-01-31 12:59:30.000000000 +0100
3988 @@ -50,6 +50,9 @@
3989 au1xxx_irq_map_t au1xxx_irq_map[] = {
3990 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
3991 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
3992 +#ifdef CONFIG_AU1XXX_SMC91111
3993 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
3994 +#endif
3995 };
3996
3997 int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3998 diff -Nur linux-2.4.29/arch/mips/config-shared.in linux-mips/arch/mips/config-shared.in
3999 --- linux-2.4.29/arch/mips/config-shared.in 2005-01-19 15:09:27.000000000 +0100
4000 +++ linux-mips/arch/mips/config-shared.in 2005-01-31 12:59:28.000000000 +0100
4001 @@ -21,16 +21,19 @@
4002 comment 'Machine selection'
4003 dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
4004 dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
4005 +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
4006 dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
4007 dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
4008 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
4009 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
4010 dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
4011 +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
4012 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
4013 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
4014 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
4015 -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4016 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
4017 +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
4018 +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4019 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
4020 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
4021 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
4022 @@ -249,6 +252,12 @@
4023 define_bool CONFIG_PC_KEYB y
4024 define_bool CONFIG_NONCOHERENT_IO y
4025 fi
4026 +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
4027 + define_bool CONFIG_SOC_AU1X00 y
4028 + define_bool CONFIG_SOC_AU1200 y
4029 + define_bool CONFIG_NONCOHERENT_IO y
4030 + define_bool CONFIG_PC_KEYB y
4031 +fi
4032 if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
4033 define_bool CONFIG_SOC_AU1X00 y
4034 define_bool CONFIG_SOC_AU1500 y
4035 @@ -263,6 +272,12 @@
4036 define_bool CONFIG_SWAP_IO_SPACE_W y
4037 define_bool CONFIG_SWAP_IO_SPACE_L y
4038 fi
4039 +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4040 + define_bool CONFIG_SOC_AU1X00 y
4041 + define_bool CONFIG_SOC_AU1500 y
4042 + define_bool CONFIG_NONCOHERENT_IO y
4043 + define_bool CONFIG_PC_KEYB y
4044 +fi
4045 if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
4046 define_bool CONFIG_SOC_AU1X00 y
4047 define_bool CONFIG_SOC_AU1100 y
4048 @@ -271,9 +286,15 @@
4049 define_bool CONFIG_SWAP_IO_SPACE_W y
4050 define_bool CONFIG_SWAP_IO_SPACE_L y
4051 fi
4052 -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4053 +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4054 define_bool CONFIG_SOC_AU1X00 y
4055 - define_bool CONFIG_SOC_AU1500 y
4056 + define_bool CONFIG_SOC_AU1550 y
4057 + define_bool CONFIG_NONCOHERENT_IO n
4058 + define_bool CONFIG_PC_KEYB y
4059 +fi
4060 +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
4061 + define_bool CONFIG_SOC_AU1X00 y
4062 + define_bool CONFIG_SOC_AU1200 y
4063 define_bool CONFIG_NONCOHERENT_IO y
4064 define_bool CONFIG_PC_KEYB y
4065 fi
4066 @@ -290,18 +311,24 @@
4067 define_bool CONFIG_NONCOHERENT_IO y
4068 define_bool CONFIG_PC_KEYB y
4069 fi
4070 +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4071 + define_bool CONFIG_SOC_AU1X00 y
4072 + define_bool CONFIG_SOC_AU1100 y
4073 + define_bool CONFIG_NONCOHERENT_IO y
4074 + define_bool CONFIG_PC_KEYB y
4075 + define_bool CONFIG_SWAP_IO_SPACE y
4076 +fi
4077 if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
4078 define_bool CONFIG_SOC_AU1X00 y
4079 define_bool CONFIG_SOC_AU1550 y
4080 define_bool CONFIG_NONCOHERENT_IO y
4081 define_bool CONFIG_PC_KEYB y
4082 fi
4083 -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4084 +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
4085 define_bool CONFIG_SOC_AU1X00 y
4086 - define_bool CONFIG_SOC_AU1100 y
4087 + define_bool CONFIG_SOC_AU1200 y
4088 define_bool CONFIG_NONCOHERENT_IO y
4089 define_bool CONFIG_PC_KEYB y
4090 - define_bool CONFIG_SWAP_IO_SPACE y
4091 fi
4092 if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
4093 define_bool CONFIG_SOC_AU1X00 y
4094 @@ -327,12 +354,6 @@
4095 define_bool CONFIG_NONCOHERENT_IO y
4096 define_bool CONFIG_PC_KEYB y
4097 fi
4098 -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4099 - define_bool CONFIG_SOC_AU1X00 y
4100 - define_bool CONFIG_SOC_AU1550 y
4101 - define_bool CONFIG_NONCOHERENT_IO n
4102 - define_bool CONFIG_PC_KEYB y
4103 -fi
4104 if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
4105 define_bool CONFIG_BOOT_ELF32 y
4106 define_bool CONFIG_COBALT_LCD y
4107 @@ -729,6 +750,13 @@
4108 "$CONFIG_MIPS_PB1000" = "y" -o \
4109 "$CONFIG_MIPS_PB1100" = "y" -o \
4110 "$CONFIG_MIPS_PB1500" = "y" -o \
4111 + "$CONFIG_MIPS_PB1550" = "y" -o \
4112 + "$CONFIG_MIPS_PB1200" = "y" -o \
4113 + "$CONFIG_MIPS_DB1000" = "y" -o \
4114 + "$CONFIG_MIPS_DB1100" = "y" -o \
4115 + "$CONFIG_MIPS_DB1500" = "y" -o \
4116 + "$CONFIG_MIPS_DB1550" = "y" -o \
4117 + "$CONFIG_MIPS_DB1200" = "y" -o \
4118 "$CONFIG_NEC_OSPREY" = "y" -o \
4119 "$CONFIG_NEC_EAGLE" = "y" -o \
4120 "$CONFIG_NINO" = "y" -o \
4121 diff -Nur linux-2.4.29/arch/mips/defconfig linux-mips/arch/mips/defconfig
4122 --- linux-2.4.29/arch/mips/defconfig 2005-01-19 15:09:27.000000000 +0100
4123 +++ linux-mips/arch/mips/defconfig 2005-01-09 20:33:59.000000000 +0100
4124 @@ -235,11 +235,6 @@
4125 #
4126 # CONFIG_IPX is not set
4127 # CONFIG_ATALK is not set
4128 -
4129 -#
4130 -# Appletalk devices
4131 -#
4132 -# CONFIG_DEV_APPLETALK is not set
4133 # CONFIG_DECNET is not set
4134 # CONFIG_BRIDGE is not set
4135 # CONFIG_X25 is not set
4136 @@ -319,6 +314,7 @@
4137 # CONFIG_SCSI_MEGARAID is not set
4138 # CONFIG_SCSI_MEGARAID2 is not set
4139 # CONFIG_SCSI_SATA is not set
4140 +# CONFIG_SCSI_SATA_AHCI is not set
4141 # CONFIG_SCSI_SATA_SVW is not set
4142 # CONFIG_SCSI_ATA_PIIX is not set
4143 # CONFIG_SCSI_SATA_NV is not set
4144 diff -Nur linux-2.4.29/arch/mips/defconfig-atlas linux-mips/arch/mips/defconfig-atlas
4145 --- linux-2.4.29/arch/mips/defconfig-atlas 2005-01-19 15:09:27.000000000 +0100
4146 +++ linux-mips/arch/mips/defconfig-atlas 2005-01-09 20:33:59.000000000 +0100
4147 @@ -235,11 +235,6 @@
4148 #
4149 # CONFIG_IPX is not set
4150 # CONFIG_ATALK is not set
4151 -
4152 -#
4153 -# Appletalk devices
4154 -#
4155 -# CONFIG_DEV_APPLETALK is not set
4156 # CONFIG_DECNET is not set
4157 # CONFIG_BRIDGE is not set
4158 # CONFIG_X25 is not set
4159 @@ -317,6 +312,7 @@
4160 # CONFIG_SCSI_MEGARAID is not set
4161 # CONFIG_SCSI_MEGARAID2 is not set
4162 # CONFIG_SCSI_SATA is not set
4163 +# CONFIG_SCSI_SATA_AHCI is not set
4164 # CONFIG_SCSI_SATA_SVW is not set
4165 # CONFIG_SCSI_ATA_PIIX is not set
4166 # CONFIG_SCSI_SATA_NV is not set
4167 diff -Nur linux-2.4.29/arch/mips/defconfig-bosporus linux-mips/arch/mips/defconfig-bosporus
4168 --- linux-2.4.29/arch/mips/defconfig-bosporus 2005-01-19 15:09:27.000000000 +0100
4169 +++ linux-mips/arch/mips/defconfig-bosporus 2005-01-31 12:59:28.000000000 +0100
4170 @@ -373,11 +373,6 @@
4171 #
4172 # CONFIG_IPX is not set
4173 # CONFIG_ATALK is not set
4174 -
4175 -#
4176 -# Appletalk devices
4177 -#
4178 -# CONFIG_DEV_APPLETALK is not set
4179 # CONFIG_DECNET is not set
4180 # CONFIG_BRIDGE is not set
4181 # CONFIG_X25 is not set
4182 @@ -457,6 +452,7 @@
4183 # CONFIG_SCSI_MEGARAID is not set
4184 # CONFIG_SCSI_MEGARAID2 is not set
4185 # CONFIG_SCSI_SATA is not set
4186 +# CONFIG_SCSI_SATA_AHCI is not set
4187 # CONFIG_SCSI_SATA_SVW is not set
4188 # CONFIG_SCSI_ATA_PIIX is not set
4189 # CONFIG_SCSI_SATA_NV is not set
4190 @@ -899,7 +895,7 @@
4191 # CONFIG_USB_UHCI is not set
4192 # CONFIG_USB_UHCI_ALT is not set
4193 CONFIG_USB_OHCI=y
4194 -
4195 +CONFIG_USB_NON_PCI_OHCI=y
4196 #
4197 # USB Device Class drivers
4198 #
4199 diff -Nur linux-2.4.29/arch/mips/defconfig-capcella linux-mips/arch/mips/defconfig-capcella
4200 --- linux-2.4.29/arch/mips/defconfig-capcella 2005-01-19 15:09:27.000000000 +0100
4201 +++ linux-mips/arch/mips/defconfig-capcella 2005-01-09 20:33:59.000000000 +0100
4202 @@ -228,11 +228,6 @@
4203 #
4204 # CONFIG_IPX is not set
4205 # CONFIG_ATALK is not set
4206 -
4207 -#
4208 -# Appletalk devices
4209 -#
4210 -# CONFIG_DEV_APPLETALK is not set
4211 # CONFIG_DECNET is not set
4212 # CONFIG_BRIDGE is not set
4213 # CONFIG_X25 is not set
4214 diff -Nur linux-2.4.29/arch/mips/defconfig-cobalt linux-mips/arch/mips/defconfig-cobalt
4215 --- linux-2.4.29/arch/mips/defconfig-cobalt 2005-01-19 15:09:28.000000000 +0100
4216 +++ linux-mips/arch/mips/defconfig-cobalt 2005-01-09 20:33:59.000000000 +0100
4217 @@ -222,11 +222,6 @@
4218 #
4219 # CONFIG_IPX is not set
4220 # CONFIG_ATALK is not set
4221 -
4222 -#
4223 -# Appletalk devices
4224 -#
4225 -# CONFIG_DEV_APPLETALK is not set
4226 # CONFIG_DECNET is not set
4227 # CONFIG_BRIDGE is not set
4228 # CONFIG_X25 is not set
4229 diff -Nur linux-2.4.29/arch/mips/defconfig-csb250 linux-mips/arch/mips/defconfig-csb250
4230 --- linux-2.4.29/arch/mips/defconfig-csb250 2005-01-19 15:09:28.000000000 +0100
4231 +++ linux-mips/arch/mips/defconfig-csb250 2005-01-09 20:33:59.000000000 +0100
4232 @@ -268,11 +268,6 @@
4233 #
4234 # CONFIG_IPX is not set
4235 # CONFIG_ATALK is not set
4236 -
4237 -#
4238 -# Appletalk devices
4239 -#
4240 -# CONFIG_DEV_APPLETALK is not set
4241 # CONFIG_DECNET is not set
4242 # CONFIG_BRIDGE is not set
4243 # CONFIG_X25 is not set
4244 diff -Nur linux-2.4.29/arch/mips/defconfig-db1000 linux-mips/arch/mips/defconfig-db1000
4245 --- linux-2.4.29/arch/mips/defconfig-db1000 2005-01-19 15:09:28.000000000 +0100
4246 +++ linux-mips/arch/mips/defconfig-db1000 2005-02-12 04:05:27.000000000 +0100
4247 @@ -22,16 +22,19 @@
4248 #
4249 # CONFIG_ACER_PICA_61 is not set
4250 # CONFIG_MIPS_BOSPORUS is not set
4251 +# CONFIG_MIPS_FICMMP is not set
4252 # CONFIG_MIPS_MIRAGE is not set
4253 CONFIG_MIPS_DB1000=y
4254 # CONFIG_MIPS_DB1100 is not set
4255 # CONFIG_MIPS_DB1500 is not set
4256 # CONFIG_MIPS_DB1550 is not set
4257 +# CONFIG_MIPS_DB1200 is not set
4258 # CONFIG_MIPS_PB1000 is not set
4259 # CONFIG_MIPS_PB1100 is not set
4260 # CONFIG_MIPS_PB1500 is not set
4261 -# CONFIG_MIPS_HYDROGEN3 is not set
4262 # CONFIG_MIPS_PB1550 is not set
4263 +# CONFIG_MIPS_PB1200 is not set
4264 +# CONFIG_MIPS_HYDROGEN3 is not set
4265 # CONFIG_MIPS_XXS1500 is not set
4266 # CONFIG_MIPS_MTX1 is not set
4267 # CONFIG_COGENT_CSB250 is not set
4268 @@ -342,11 +345,6 @@
4269 #
4270 # CONFIG_IPX is not set
4271 # CONFIG_ATALK is not set
4272 -
4273 -#
4274 -# Appletalk devices
4275 -#
4276 -# CONFIG_DEV_APPLETALK is not set
4277 # CONFIG_DECNET is not set
4278 # CONFIG_BRIDGE is not set
4279 # CONFIG_X25 is not set
4280 diff -Nur linux-2.4.29/arch/mips/defconfig-db1100 linux-mips/arch/mips/defconfig-db1100
4281 --- linux-2.4.29/arch/mips/defconfig-db1100 2005-01-19 15:09:28.000000000 +0100
4282 +++ linux-mips/arch/mips/defconfig-db1100 2005-02-12 04:05:27.000000000 +0100
4283 @@ -22,16 +22,19 @@
4284 #
4285 # CONFIG_ACER_PICA_61 is not set
4286 # CONFIG_MIPS_BOSPORUS is not set
4287 +# CONFIG_MIPS_FICMMP is not set
4288 # CONFIG_MIPS_MIRAGE is not set
4289 # CONFIG_MIPS_DB1000 is not set
4290 CONFIG_MIPS_DB1100=y
4291 # CONFIG_MIPS_DB1500 is not set
4292 # CONFIG_MIPS_DB1550 is not set
4293 +# CONFIG_MIPS_DB1200 is not set
4294 # CONFIG_MIPS_PB1000 is not set
4295 # CONFIG_MIPS_PB1100 is not set
4296 # CONFIG_MIPS_PB1500 is not set
4297 -# CONFIG_MIPS_HYDROGEN3 is not set
4298 # CONFIG_MIPS_PB1550 is not set
4299 +# CONFIG_MIPS_PB1200 is not set
4300 +# CONFIG_MIPS_HYDROGEN3 is not set
4301 # CONFIG_MIPS_XXS1500 is not set
4302 # CONFIG_MIPS_MTX1 is not set
4303 # CONFIG_COGENT_CSB250 is not set
4304 @@ -342,11 +345,6 @@
4305 #
4306 # CONFIG_IPX is not set
4307 # CONFIG_ATALK is not set
4308 -
4309 -#
4310 -# Appletalk devices
4311 -#
4312 -# CONFIG_DEV_APPLETALK is not set
4313 # CONFIG_DECNET is not set
4314 # CONFIG_BRIDGE is not set
4315 # CONFIG_X25 is not set
4316 diff -Nur linux-2.4.29/arch/mips/defconfig-db1200 linux-mips/arch/mips/defconfig-db1200
4317 --- linux-2.4.29/arch/mips/defconfig-db1200 1970-01-01 01:00:00.000000000 +0100
4318 +++ linux-mips/arch/mips/defconfig-db1200 2005-01-30 09:01:26.000000000 +0100
4319 @@ -0,0 +1,1051 @@
4320 +#
4321 +# Automatically generated make config: don't edit
4322 +#
4323 +CONFIG_MIPS=y
4324 +CONFIG_MIPS32=y
4325 +# CONFIG_MIPS64 is not set
4326 +
4327 +#
4328 +# Code maturity level options
4329 +#
4330 +CONFIG_EXPERIMENTAL=y
4331 +
4332 +#
4333 +# Loadable module support
4334 +#
4335 +CONFIG_MODULES=y
4336 +# CONFIG_MODVERSIONS is not set
4337 +CONFIG_KMOD=y
4338 +
4339 +#
4340 +# Machine selection
4341 +#
4342 +# CONFIG_ACER_PICA_61 is not set
4343 +# CONFIG_MIPS_BOSPORUS is not set
4344 +# CONFIG_MIPS_FICMMP is not set
4345 +# CONFIG_MIPS_MIRAGE is not set
4346 +# CONFIG_MIPS_DB1000 is not set
4347 +# CONFIG_MIPS_DB1100 is not set
4348 +# CONFIG_MIPS_DB1500 is not set
4349 +# CONFIG_MIPS_DB1550 is not set
4350 +CONFIG_MIPS_DB1200=y
4351 +# CONFIG_MIPS_PB1000 is not set
4352 +# CONFIG_MIPS_PB1100 is not set
4353 +# CONFIG_MIPS_PB1500 is not set
4354 +# CONFIG_MIPS_PB1550 is not set
4355 +# CONFIG_MIPS_PB1200 is not set
4356 +# CONFIG_MIPS_HYDROGEN3 is not set
4357 +# CONFIG_MIPS_XXS1500 is not set
4358 +# CONFIG_MIPS_MTX1 is not set
4359 +# CONFIG_COGENT_CSB250 is not set
4360 +# CONFIG_BAGET_MIPS is not set
4361 +# CONFIG_CASIO_E55 is not set
4362 +# CONFIG_MIPS_COBALT is not set
4363 +# CONFIG_DECSTATION is not set
4364 +# CONFIG_MIPS_EV64120 is not set
4365 +# CONFIG_MIPS_EV96100 is not set
4366 +# CONFIG_MIPS_IVR is not set
4367 +# CONFIG_HP_LASERJET is not set
4368 +# CONFIG_IBM_WORKPAD is not set
4369 +# CONFIG_LASAT is not set
4370 +# CONFIG_MIPS_ITE8172 is not set
4371 +# CONFIG_MIPS_ATLAS is not set
4372 +# CONFIG_MIPS_MAGNUM_4000 is not set
4373 +# CONFIG_MIPS_MALTA is not set
4374 +# CONFIG_MIPS_SEAD is not set
4375 +# CONFIG_MOMENCO_OCELOT is not set
4376 +# CONFIG_MOMENCO_OCELOT_G is not set
4377 +# CONFIG_MOMENCO_OCELOT_C is not set
4378 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
4379 +# CONFIG_PMC_BIG_SUR is not set
4380 +# CONFIG_PMC_STRETCH is not set
4381 +# CONFIG_PMC_YOSEMITE is not set
4382 +# CONFIG_DDB5074 is not set
4383 +# CONFIG_DDB5476 is not set
4384 +# CONFIG_DDB5477 is not set
4385 +# CONFIG_NEC_OSPREY is not set
4386 +# CONFIG_NEC_EAGLE is not set
4387 +# CONFIG_OLIVETTI_M700 is not set
4388 +# CONFIG_NINO is not set
4389 +# CONFIG_SGI_IP22 is not set
4390 +# CONFIG_SGI_IP27 is not set
4391 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
4392 +# CONFIG_SNI_RM200_PCI is not set
4393 +# CONFIG_TANBAC_TB0226 is not set
4394 +# CONFIG_TANBAC_TB0229 is not set
4395 +# CONFIG_TOSHIBA_JMR3927 is not set
4396 +# CONFIG_TOSHIBA_RBTX4927 is not set
4397 +# CONFIG_VICTOR_MPC30X is not set
4398 +# CONFIG_ZAO_CAPCELLA is not set
4399 +# CONFIG_HIGHMEM is not set
4400 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4401 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4402 +CONFIG_SOC_AU1X00=y
4403 +CONFIG_SOC_AU1200=y
4404 +CONFIG_NONCOHERENT_IO=y
4405 +CONFIG_PC_KEYB=y
4406 +# CONFIG_MIPS_AU1000 is not set
4407 +
4408 +#
4409 +# CPU selection
4410 +#
4411 +CONFIG_CPU_MIPS32=y
4412 +# CONFIG_CPU_MIPS64 is not set
4413 +# CONFIG_CPU_R3000 is not set
4414 +# CONFIG_CPU_TX39XX is not set
4415 +# CONFIG_CPU_VR41XX is not set
4416 +# CONFIG_CPU_R4300 is not set
4417 +# CONFIG_CPU_R4X00 is not set
4418 +# CONFIG_CPU_TX49XX is not set
4419 +# CONFIG_CPU_R5000 is not set
4420 +# CONFIG_CPU_R5432 is not set
4421 +# CONFIG_CPU_R6000 is not set
4422 +# CONFIG_CPU_NEVADA is not set
4423 +# CONFIG_CPU_R8000 is not set
4424 +# CONFIG_CPU_R10000 is not set
4425 +# CONFIG_CPU_RM7000 is not set
4426 +# CONFIG_CPU_RM9000 is not set
4427 +# CONFIG_CPU_SB1 is not set
4428 +CONFIG_PAGE_SIZE_4KB=y
4429 +# CONFIG_PAGE_SIZE_16KB is not set
4430 +# CONFIG_PAGE_SIZE_64KB is not set
4431 +CONFIG_CPU_HAS_PREFETCH=y
4432 +# CONFIG_VTAG_ICACHE is not set
4433 +CONFIG_64BIT_PHYS_ADDR=y
4434 +# CONFIG_CPU_ADVANCED is not set
4435 +CONFIG_CPU_HAS_LLSC=y
4436 +# CONFIG_CPU_HAS_LLDSCD is not set
4437 +# CONFIG_CPU_HAS_WB is not set
4438 +CONFIG_CPU_HAS_SYNC=y
4439 +
4440 +#
4441 +# General setup
4442 +#
4443 +CONFIG_CPU_LITTLE_ENDIAN=y
4444 +# CONFIG_BUILD_ELF64 is not set
4445 +CONFIG_NET=y
4446 +CONFIG_PCI=y
4447 +CONFIG_PCI_NEW=y
4448 +CONFIG_PCI_AUTO=y
4449 +# CONFIG_PCI_NAMES is not set
4450 +# CONFIG_ISA is not set
4451 +# CONFIG_TC is not set
4452 +# CONFIG_MCA is not set
4453 +# CONFIG_SBUS is not set
4454 +CONFIG_HOTPLUG=y
4455 +
4456 +#
4457 +# PCMCIA/CardBus support
4458 +#
4459 +CONFIG_PCMCIA=m
4460 +# CONFIG_CARDBUS is not set
4461 +# CONFIG_TCIC is not set
4462 +# CONFIG_I82092 is not set
4463 +# CONFIG_I82365 is not set
4464 +CONFIG_PCMCIA_AU1X00=m
4465 +
4466 +#
4467 +# PCI Hotplug Support
4468 +#
4469 +# CONFIG_HOTPLUG_PCI is not set
4470 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
4471 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
4472 +# CONFIG_HOTPLUG_PCI_SHPC is not set
4473 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
4474 +# CONFIG_HOTPLUG_PCI_PCIE is not set
4475 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
4476 +CONFIG_SYSVIPC=y
4477 +# CONFIG_BSD_PROCESS_ACCT is not set
4478 +CONFIG_SYSCTL=y
4479 +CONFIG_KCORE_ELF=y
4480 +# CONFIG_KCORE_AOUT is not set
4481 +# CONFIG_BINFMT_AOUT is not set
4482 +CONFIG_BINFMT_ELF=y
4483 +# CONFIG_MIPS32_COMPAT is not set
4484 +# CONFIG_MIPS32_O32 is not set
4485 +# CONFIG_MIPS32_N32 is not set
4486 +# CONFIG_BINFMT_ELF32 is not set
4487 +# CONFIG_BINFMT_MISC is not set
4488 +# CONFIG_OOM_KILLER is not set
4489 +CONFIG_CMDLINE_BOOL=y
4490 +CONFIG_CMDLINE="mem=96M"
4491 +# CONFIG_PM is not set
4492 +
4493 +#
4494 +# Memory Technology Devices (MTD)
4495 +#
4496 +# CONFIG_MTD is not set
4497 +
4498 +#
4499 +# Parallel port support
4500 +#
4501 +# CONFIG_PARPORT is not set
4502 +
4503 +#
4504 +# Plug and Play configuration
4505 +#
4506 +# CONFIG_PNP is not set
4507 +# CONFIG_ISAPNP is not set
4508 +
4509 +#
4510 +# Block devices
4511 +#
4512 +# CONFIG_BLK_DEV_FD is not set
4513 +# CONFIG_BLK_DEV_XD is not set
4514 +# CONFIG_PARIDE is not set
4515 +# CONFIG_BLK_CPQ_DA is not set
4516 +# CONFIG_BLK_CPQ_CISS_DA is not set
4517 +# CONFIG_CISS_SCSI_TAPE is not set
4518 +# CONFIG_CISS_MONITOR_THREAD is not set
4519 +# CONFIG_BLK_DEV_DAC960 is not set
4520 +# CONFIG_BLK_DEV_UMEM is not set
4521 +# CONFIG_BLK_DEV_SX8 is not set
4522 +CONFIG_BLK_DEV_LOOP=y
4523 +# CONFIG_BLK_DEV_NBD is not set
4524 +# CONFIG_BLK_DEV_RAM is not set
4525 +# CONFIG_BLK_DEV_INITRD is not set
4526 +# CONFIG_BLK_STATS is not set
4527 +
4528 +#
4529 +# Multi-device support (RAID and LVM)
4530 +#
4531 +# CONFIG_MD is not set
4532 +# CONFIG_BLK_DEV_MD is not set
4533 +# CONFIG_MD_LINEAR is not set
4534 +# CONFIG_MD_RAID0 is not set
4535 +# CONFIG_MD_RAID1 is not set
4536 +# CONFIG_MD_RAID5 is not set
4537 +# CONFIG_MD_MULTIPATH is not set
4538 +# CONFIG_BLK_DEV_LVM is not set
4539 +
4540 +#
4541 +# Networking options
4542 +#
4543 +CONFIG_PACKET=y
4544 +# CONFIG_PACKET_MMAP is not set
4545 +# CONFIG_NETLINK_DEV is not set
4546 +CONFIG_NETFILTER=y
4547 +# CONFIG_NETFILTER_DEBUG is not set
4548 +CONFIG_FILTER=y
4549 +CONFIG_UNIX=y
4550 +CONFIG_INET=y
4551 +CONFIG_IP_MULTICAST=y
4552 +# CONFIG_IP_ADVANCED_ROUTER is not set
4553 +CONFIG_IP_PNP=y
4554 +# CONFIG_IP_PNP_DHCP is not set
4555 +CONFIG_IP_PNP_BOOTP=y
4556 +# CONFIG_IP_PNP_RARP is not set
4557 +# CONFIG_NET_IPIP is not set
4558 +# CONFIG_NET_IPGRE is not set
4559 +# CONFIG_IP_MROUTE is not set
4560 +# CONFIG_ARPD is not set
4561 +# CONFIG_INET_ECN is not set
4562 +# CONFIG_SYN_COOKIES is not set
4563 +
4564 +#
4565 +# IP: Netfilter Configuration
4566 +#
4567 +# CONFIG_IP_NF_CONNTRACK is not set
4568 +# CONFIG_IP_NF_QUEUE is not set
4569 +# CONFIG_IP_NF_IPTABLES is not set
4570 +# CONFIG_IP_NF_ARPTABLES is not set
4571 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
4572 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
4573 +
4574 +#
4575 +# IP: Virtual Server Configuration
4576 +#
4577 +# CONFIG_IP_VS is not set
4578 +# CONFIG_IPV6 is not set
4579 +# CONFIG_KHTTPD is not set
4580 +
4581 +#
4582 +# SCTP Configuration (EXPERIMENTAL)
4583 +#
4584 +# CONFIG_IP_SCTP is not set
4585 +# CONFIG_ATM is not set
4586 +# CONFIG_VLAN_8021Q is not set
4587 +
4588 +#
4589 +#
4590 +#
4591 +# CONFIG_IPX is not set
4592 +# CONFIG_ATALK is not set
4593 +# CONFIG_DECNET is not set
4594 +# CONFIG_BRIDGE is not set
4595 +# CONFIG_X25 is not set
4596 +# CONFIG_LAPB is not set
4597 +# CONFIG_LLC is not set
4598 +# CONFIG_NET_DIVERT is not set
4599 +# CONFIG_ECONET is not set
4600 +# CONFIG_WAN_ROUTER is not set
4601 +# CONFIG_NET_FASTROUTE is not set
4602 +# CONFIG_NET_HW_FLOWCONTROL is not set
4603 +
4604 +#
4605 +# QoS and/or fair queueing
4606 +#
4607 +# CONFIG_NET_SCHED is not set
4608 +
4609 +#
4610 +# Network testing
4611 +#
4612 +# CONFIG_NET_PKTGEN is not set
4613 +
4614 +#
4615 +# Telephony Support
4616 +#
4617 +# CONFIG_PHONE is not set
4618 +# CONFIG_PHONE_IXJ is not set
4619 +# CONFIG_PHONE_IXJ_PCMCIA is not set
4620 +
4621 +#
4622 +# ATA/IDE/MFM/RLL support
4623 +#
4624 +CONFIG_IDE=y
4625 +
4626 +#
4627 +# IDE, ATA and ATAPI Block devices
4628 +#
4629 +CONFIG_BLK_DEV_IDE=y
4630 +
4631 +#
4632 +# Please see Documentation/ide.txt for help/info on IDE drives
4633 +#
4634 +# CONFIG_BLK_DEV_HD_IDE is not set
4635 +# CONFIG_BLK_DEV_HD is not set
4636 +# CONFIG_BLK_DEV_IDE_SATA is not set
4637 +CONFIG_BLK_DEV_IDEDISK=y
4638 +CONFIG_IDEDISK_MULTI_MODE=y
4639 +CONFIG_IDEDISK_STROKE=y
4640 +CONFIG_BLK_DEV_IDECS=m
4641 +# CONFIG_BLK_DEV_DELKIN is not set
4642 +# CONFIG_BLK_DEV_IDECD is not set
4643 +# CONFIG_BLK_DEV_IDETAPE is not set
4644 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
4645 +# CONFIG_BLK_DEV_IDESCSI is not set
4646 +# CONFIG_IDE_TASK_IOCTL is not set
4647 +
4648 +#
4649 +# IDE chipset support/bugfixes
4650 +#
4651 +# CONFIG_BLK_DEV_CMD640 is not set
4652 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
4653 +# CONFIG_BLK_DEV_ISAPNP is not set
4654 +# CONFIG_BLK_DEV_IDEPCI is not set
4655 +# CONFIG_IDE_CHIPSETS is not set
4656 +# CONFIG_IDEDMA_AUTO is not set
4657 +# CONFIG_DMA_NONPCI is not set
4658 +# CONFIG_BLK_DEV_ATARAID is not set
4659 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
4660 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
4661 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
4662 +# CONFIG_BLK_DEV_ATARAID_SII is not set
4663 +
4664 +#
4665 +# SCSI support
4666 +#
4667 +CONFIG_SCSI=y
4668 +
4669 +#
4670 +# SCSI support type (disk, tape, CD-ROM)
4671 +#
4672 +CONFIG_BLK_DEV_SD=y
4673 +CONFIG_SD_EXTRA_DEVS=40
4674 +CONFIG_CHR_DEV_ST=y
4675 +# CONFIG_CHR_DEV_OSST is not set
4676 +CONFIG_BLK_DEV_SR=y
4677 +# CONFIG_BLK_DEV_SR_VENDOR is not set
4678 +CONFIG_SR_EXTRA_DEVS=2
4679 +# CONFIG_CHR_DEV_SG is not set
4680 +
4681 +#
4682 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
4683 +#
4684 +# CONFIG_SCSI_DEBUG_QUEUES is not set
4685 +# CONFIG_SCSI_MULTI_LUN is not set
4686 +CONFIG_SCSI_CONSTANTS=y
4687 +# CONFIG_SCSI_LOGGING is not set
4688 +
4689 +#
4690 +# SCSI low-level drivers
4691 +#
4692 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
4693 +# CONFIG_SCSI_7000FASST is not set
4694 +# CONFIG_SCSI_ACARD is not set
4695 +# CONFIG_SCSI_AHA152X is not set
4696 +# CONFIG_SCSI_AHA1542 is not set
4697 +# CONFIG_SCSI_AHA1740 is not set
4698 +# CONFIG_SCSI_AACRAID is not set
4699 +# CONFIG_SCSI_AIC7XXX is not set
4700 +# CONFIG_SCSI_AIC79XX is not set
4701 +# CONFIG_SCSI_AIC7XXX_OLD is not set
4702 +# CONFIG_SCSI_DPT_I2O is not set
4703 +# CONFIG_SCSI_ADVANSYS is not set
4704 +# CONFIG_SCSI_IN2000 is not set
4705 +# CONFIG_SCSI_AM53C974 is not set
4706 +# CONFIG_SCSI_MEGARAID is not set
4707 +# CONFIG_SCSI_MEGARAID2 is not set
4708 +# CONFIG_SCSI_SATA is not set
4709 +# CONFIG_SCSI_SATA_AHCI is not set
4710 +# CONFIG_SCSI_SATA_SVW is not set
4711 +# CONFIG_SCSI_ATA_PIIX is not set
4712 +# CONFIG_SCSI_SATA_NV is not set
4713 +# CONFIG_SCSI_SATA_PROMISE is not set
4714 +# CONFIG_SCSI_SATA_SX4 is not set
4715 +# CONFIG_SCSI_SATA_SIL is not set
4716 +# CONFIG_SCSI_SATA_SIS is not set
4717 +# CONFIG_SCSI_SATA_ULI is not set
4718 +# CONFIG_SCSI_SATA_VIA is not set
4719 +# CONFIG_SCSI_SATA_VITESSE is not set
4720 +# CONFIG_SCSI_BUSLOGIC is not set
4721 +# CONFIG_SCSI_CPQFCTS is not set
4722 +# CONFIG_SCSI_DMX3191D is not set
4723 +# CONFIG_SCSI_DTC3280 is not set
4724 +# CONFIG_SCSI_EATA is not set
4725 +# CONFIG_SCSI_EATA_DMA is not set
4726 +# CONFIG_SCSI_EATA_PIO is not set
4727 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
4728 +# CONFIG_SCSI_GDTH is not set
4729 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
4730 +# CONFIG_SCSI_INITIO is not set
4731 +# CONFIG_SCSI_INIA100 is not set
4732 +# CONFIG_SCSI_NCR53C406A is not set
4733 +# CONFIG_SCSI_NCR53C7xx is not set
4734 +# CONFIG_SCSI_SYM53C8XX_2 is not set
4735 +# CONFIG_SCSI_NCR53C8XX is not set
4736 +# CONFIG_SCSI_SYM53C8XX is not set
4737 +# CONFIG_SCSI_PAS16 is not set
4738 +# CONFIG_SCSI_PCI2000 is not set
4739 +# CONFIG_SCSI_PCI2220I is not set
4740 +# CONFIG_SCSI_PSI240I is not set
4741 +# CONFIG_SCSI_QLOGIC_FAS is not set
4742 +# CONFIG_SCSI_QLOGIC_ISP is not set
4743 +# CONFIG_SCSI_QLOGIC_FC is not set
4744 +# CONFIG_SCSI_QLOGIC_1280 is not set
4745 +# CONFIG_SCSI_SIM710 is not set
4746 +# CONFIG_SCSI_SYM53C416 is not set
4747 +# CONFIG_SCSI_DC390T is not set
4748 +# CONFIG_SCSI_T128 is not set
4749 +# CONFIG_SCSI_U14_34F is not set
4750 +# CONFIG_SCSI_NSP32 is not set
4751 +# CONFIG_SCSI_DEBUG is not set
4752 +
4753 +#
4754 +# PCMCIA SCSI adapter support
4755 +#
4756 +# CONFIG_SCSI_PCMCIA is not set
4757 +
4758 +#
4759 +# Fusion MPT device support
4760 +#
4761 +# CONFIG_FUSION is not set
4762 +# CONFIG_FUSION_BOOT is not set
4763 +# CONFIG_FUSION_ISENSE is not set
4764 +# CONFIG_FUSION_CTL is not set
4765 +# CONFIG_FUSION_LAN is not set
4766 +
4767 +#
4768 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
4769 +#
4770 +# CONFIG_IEEE1394 is not set
4771 +
4772 +#
4773 +# I2O device support
4774 +#
4775 +# CONFIG_I2O is not set
4776 +# CONFIG_I2O_PCI is not set
4777 +# CONFIG_I2O_BLOCK is not set
4778 +# CONFIG_I2O_LAN is not set
4779 +# CONFIG_I2O_SCSI is not set
4780 +# CONFIG_I2O_PROC is not set
4781 +
4782 +#
4783 +# Network device support
4784 +#
4785 +CONFIG_NETDEVICES=y
4786 +
4787 +#
4788 +# ARCnet devices
4789 +#
4790 +# CONFIG_ARCNET is not set
4791 +# CONFIG_DUMMY is not set
4792 +# CONFIG_BONDING is not set
4793 +# CONFIG_EQUALIZER is not set
4794 +# CONFIG_TUN is not set
4795 +# CONFIG_ETHERTAP is not set
4796 +
4797 +#
4798 +# Ethernet (10 or 100Mbit)
4799 +#
4800 +CONFIG_NET_ETHERNET=y
4801 +# CONFIG_MIPS_AU1X00_ENET is not set
4802 +# CONFIG_SUNLANCE is not set
4803 +# CONFIG_HAPPYMEAL is not set
4804 +# CONFIG_SUNBMAC is not set
4805 +# CONFIG_SUNQE is not set
4806 +# CONFIG_SUNGEM is not set
4807 +# CONFIG_NET_VENDOR_3COM is not set
4808 +# CONFIG_LANCE is not set
4809 +# CONFIG_NET_VENDOR_SMC is not set
4810 +# CONFIG_NET_VENDOR_RACAL is not set
4811 +# CONFIG_HP100 is not set
4812 +# CONFIG_NET_ISA is not set
4813 +# CONFIG_NET_PCI is not set
4814 +# CONFIG_NET_POCKET is not set
4815 +
4816 +#
4817 +# Ethernet (1000 Mbit)
4818 +#
4819 +# CONFIG_ACENIC is not set
4820 +# CONFIG_DL2K is not set
4821 +# CONFIG_E1000 is not set
4822 +# CONFIG_MYRI_SBUS is not set
4823 +# CONFIG_NS83820 is not set
4824 +# CONFIG_HAMACHI is not set
4825 +# CONFIG_YELLOWFIN is not set
4826 +# CONFIG_R8169 is not set
4827 +# CONFIG_SK98LIN is not set
4828 +# CONFIG_TIGON3 is not set
4829 +# CONFIG_FDDI is not set
4830 +# CONFIG_HIPPI is not set
4831 +# CONFIG_PLIP is not set
4832 +# CONFIG_PPP is not set
4833 +# CONFIG_SLIP is not set
4834 +
4835 +#
4836 +# Wireless LAN (non-hamradio)
4837 +#
4838 +# CONFIG_NET_RADIO is not set
4839 +
4840 +#
4841 +# Token Ring devices
4842 +#
4843 +# CONFIG_TR is not set
4844 +# CONFIG_NET_FC is not set
4845 +# CONFIG_RCPCI is not set
4846 +# CONFIG_SHAPER is not set
4847 +
4848 +#
4849 +# Wan interfaces
4850 +#
4851 +# CONFIG_WAN is not set
4852 +
4853 +#
4854 +# PCMCIA network device support
4855 +#
4856 +# CONFIG_NET_PCMCIA is not set
4857 +
4858 +#
4859 +# Amateur Radio support
4860 +#
4861 +# CONFIG_HAMRADIO is not set
4862 +
4863 +#
4864 +# IrDA (infrared) support
4865 +#
4866 +# CONFIG_IRDA is not set
4867 +
4868 +#
4869 +# ISDN subsystem
4870 +#
4871 +# CONFIG_ISDN is not set
4872 +
4873 +#
4874 +# Input core support
4875 +#
4876 +CONFIG_INPUT=y
4877 +CONFIG_INPUT_KEYBDEV=y
4878 +CONFIG_INPUT_MOUSEDEV=y
4879 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
4880 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
4881 +# CONFIG_INPUT_JOYDEV is not set
4882 +CONFIG_INPUT_EVDEV=y
4883 +# CONFIG_INPUT_UINPUT is not set
4884 +
4885 +#
4886 +# Character devices
4887 +#
4888 +CONFIG_VT=y
4889 +# CONFIG_VT_CONSOLE is not set
4890 +# CONFIG_SERIAL is not set
4891 +# CONFIG_SERIAL_EXTENDED is not set
4892 +CONFIG_SERIAL_NONSTANDARD=y
4893 +# CONFIG_COMPUTONE is not set
4894 +# CONFIG_ROCKETPORT is not set
4895 +# CONFIG_CYCLADES is not set
4896 +# CONFIG_DIGIEPCA is not set
4897 +# CONFIG_DIGI is not set
4898 +# CONFIG_ESPSERIAL is not set
4899 +# CONFIG_MOXA_INTELLIO is not set
4900 +# CONFIG_MOXA_SMARTIO is not set
4901 +# CONFIG_ISI is not set
4902 +# CONFIG_SYNCLINK is not set
4903 +# CONFIG_SYNCLINKMP is not set
4904 +# CONFIG_N_HDLC is not set
4905 +# CONFIG_RISCOM8 is not set
4906 +# CONFIG_SPECIALIX is not set
4907 +# CONFIG_SX is not set
4908 +# CONFIG_RIO is not set
4909 +# CONFIG_STALDRV is not set
4910 +# CONFIG_SERIAL_TX3912 is not set
4911 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
4912 +# CONFIG_SERIAL_TXX9 is not set
4913 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
4914 +CONFIG_AU1X00_UART=y
4915 +CONFIG_AU1X00_SERIAL_CONSOLE=y
4916 +# CONFIG_AU1X00_USB_TTY is not set
4917 +# CONFIG_AU1X00_USB_RAW is not set
4918 +# CONFIG_TXX927_SERIAL is not set
4919 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4920 +CONFIG_UNIX98_PTYS=y
4921 +CONFIG_UNIX98_PTY_COUNT=256
4922 +
4923 +#
4924 +# I2C support
4925 +#
4926 +# CONFIG_I2C is not set
4927 +
4928 +#
4929 +# Mice
4930 +#
4931 +# CONFIG_BUSMOUSE is not set
4932 +# CONFIG_MOUSE is not set
4933 +
4934 +#
4935 +# Joysticks
4936 +#
4937 +# CONFIG_INPUT_GAMEPORT is not set
4938 +# CONFIG_INPUT_NS558 is not set
4939 +# CONFIG_INPUT_LIGHTNING is not set
4940 +# CONFIG_INPUT_PCIGAME is not set
4941 +# CONFIG_INPUT_CS461X is not set
4942 +# CONFIG_INPUT_EMU10K1 is not set
4943 +# CONFIG_INPUT_SERIO is not set
4944 +# CONFIG_INPUT_SERPORT is not set
4945 +
4946 +#
4947 +# Joysticks
4948 +#
4949 +# CONFIG_INPUT_ANALOG is not set
4950 +# CONFIG_INPUT_A3D is not set
4951 +# CONFIG_INPUT_ADI is not set
4952 +# CONFIG_INPUT_COBRA is not set
4953 +# CONFIG_INPUT_GF2K is not set
4954 +# CONFIG_INPUT_GRIP is not set
4955 +# CONFIG_INPUT_INTERACT is not set
4956 +# CONFIG_INPUT_TMDC is not set
4957 +# CONFIG_INPUT_SIDEWINDER is not set
4958 +# CONFIG_INPUT_IFORCE_USB is not set
4959 +# CONFIG_INPUT_IFORCE_232 is not set
4960 +# CONFIG_INPUT_WARRIOR is not set
4961 +# CONFIG_INPUT_MAGELLAN is not set
4962 +# CONFIG_INPUT_SPACEORB is not set
4963 +# CONFIG_INPUT_SPACEBALL is not set
4964 +# CONFIG_INPUT_STINGER is not set
4965 +# CONFIG_INPUT_DB9 is not set
4966 +# CONFIG_INPUT_GAMECON is not set
4967 +# CONFIG_INPUT_TURBOGRAFX is not set
4968 +# CONFIG_QIC02_TAPE is not set
4969 +# CONFIG_IPMI_HANDLER is not set
4970 +# CONFIG_IPMI_PANIC_EVENT is not set
4971 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
4972 +# CONFIG_IPMI_KCS is not set
4973 +# CONFIG_IPMI_WATCHDOG is not set
4974 +
4975 +#
4976 +# Watchdog Cards
4977 +#
4978 +# CONFIG_WATCHDOG is not set
4979 +# CONFIG_SCx200 is not set
4980 +# CONFIG_SCx200_GPIO is not set
4981 +# CONFIG_AMD_PM768 is not set
4982 +# CONFIG_NVRAM is not set
4983 +# CONFIG_RTC is not set
4984 +# CONFIG_DTLK is not set
4985 +# CONFIG_R3964 is not set
4986 +# CONFIG_APPLICOM is not set
4987 +
4988 +#
4989 +# Ftape, the floppy tape device driver
4990 +#
4991 +# CONFIG_FTAPE is not set
4992 +# CONFIG_AGP is not set
4993 +
4994 +#
4995 +# Direct Rendering Manager (XFree86 DRI support)
4996 +#
4997 +# CONFIG_DRM is not set
4998 +
4999 +#
5000 +# PCMCIA character devices
5001 +#
5002 +# CONFIG_PCMCIA_SERIAL_CS is not set
5003 +# CONFIG_SYNCLINK_CS is not set
5004 +# CONFIG_AU1X00_GPIO is not set
5005 +# CONFIG_TS_AU1X00_ADS7846 is not set
5006 +
5007 +#
5008 +# File systems
5009 +#
5010 +# CONFIG_QUOTA is not set
5011 +# CONFIG_QFMT_V2 is not set
5012 +CONFIG_AUTOFS_FS=y
5013 +# CONFIG_AUTOFS4_FS is not set
5014 +# CONFIG_REISERFS_FS is not set
5015 +# CONFIG_REISERFS_CHECK is not set
5016 +# CONFIG_REISERFS_PROC_INFO is not set
5017 +# CONFIG_ADFS_FS is not set
5018 +# CONFIG_ADFS_FS_RW is not set
5019 +# CONFIG_AFFS_FS is not set
5020 +# CONFIG_HFS_FS is not set
5021 +# CONFIG_HFSPLUS_FS is not set
5022 +# CONFIG_BEFS_FS is not set
5023 +# CONFIG_BEFS_DEBUG is not set
5024 +# CONFIG_BFS_FS is not set
5025 +CONFIG_EXT3_FS=y
5026 +CONFIG_JBD=y
5027 +# CONFIG_JBD_DEBUG is not set
5028 +CONFIG_FAT_FS=y
5029 +CONFIG_MSDOS_FS=y
5030 +# CONFIG_UMSDOS_FS is not set
5031 +CONFIG_VFAT_FS=y
5032 +# CONFIG_EFS_FS is not set
5033 +# CONFIG_JFFS_FS is not set
5034 +# CONFIG_JFFS2_FS is not set
5035 +# CONFIG_CRAMFS is not set
5036 +CONFIG_TMPFS=y
5037 +CONFIG_RAMFS=y
5038 +# CONFIG_ISO9660_FS is not set
5039 +# CONFIG_JOLIET is not set
5040 +# CONFIG_ZISOFS is not set
5041 +# CONFIG_JFS_FS is not set
5042 +# CONFIG_JFS_DEBUG is not set
5043 +# CONFIG_JFS_STATISTICS is not set
5044 +# CONFIG_MINIX_FS is not set
5045 +# CONFIG_VXFS_FS is not set
5046 +# CONFIG_NTFS_FS is not set
5047 +# CONFIG_NTFS_RW is not set
5048 +# CONFIG_HPFS_FS is not set
5049 +CONFIG_PROC_FS=y
5050 +# CONFIG_DEVFS_FS is not set
5051 +# CONFIG_DEVFS_MOUNT is not set
5052 +# CONFIG_DEVFS_DEBUG is not set
5053 +CONFIG_DEVPTS_FS=y
5054 +# CONFIG_QNX4FS_FS is not set
5055 +# CONFIG_QNX4FS_RW is not set
5056 +# CONFIG_ROMFS_FS is not set
5057 +CONFIG_EXT2_FS=y
5058 +# CONFIG_SYSV_FS is not set
5059 +# CONFIG_UDF_FS is not set
5060 +# CONFIG_UDF_RW is not set
5061 +# CONFIG_UFS_FS is not set
5062 +# CONFIG_UFS_FS_WRITE is not set
5063 +# CONFIG_XFS_FS is not set
5064 +# CONFIG_XFS_QUOTA is not set
5065 +# CONFIG_XFS_RT is not set
5066 +# CONFIG_XFS_TRACE is not set
5067 +# CONFIG_XFS_DEBUG is not set
5068 +
5069 +#
5070 +# Network File Systems
5071 +#
5072 +# CONFIG_CODA_FS is not set
5073 +# CONFIG_INTERMEZZO_FS is not set
5074 +CONFIG_NFS_FS=y
5075 +CONFIG_NFS_V3=y
5076 +# CONFIG_NFS_DIRECTIO is not set
5077 +CONFIG_ROOT_NFS=y
5078 +# CONFIG_NFSD is not set
5079 +# CONFIG_NFSD_V3 is not set
5080 +# CONFIG_NFSD_TCP is not set
5081 +CONFIG_SUNRPC=y
5082 +CONFIG_LOCKD=y
5083 +CONFIG_LOCKD_V4=y
5084 +# CONFIG_SMB_FS is not set
5085 +# CONFIG_NCP_FS is not set
5086 +# CONFIG_NCPFS_PACKET_SIGNING is not set
5087 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
5088 +# CONFIG_NCPFS_STRONG is not set
5089 +# CONFIG_NCPFS_NFS_NS is not set
5090 +# CONFIG_NCPFS_OS2_NS is not set
5091 +# CONFIG_NCPFS_SMALLDOS is not set
5092 +# CONFIG_NCPFS_NLS is not set
5093 +# CONFIG_NCPFS_EXTRAS is not set
5094 +# CONFIG_ZISOFS_FS is not set
5095 +
5096 +#
5097 +# Partition Types
5098 +#
5099 +# CONFIG_PARTITION_ADVANCED is not set
5100 +CONFIG_MSDOS_PARTITION=y
5101 +# CONFIG_SMB_NLS is not set
5102 +CONFIG_NLS=y
5103 +
5104 +#
5105 +# Native Language Support
5106 +#
5107 +CONFIG_NLS_DEFAULT="iso8859-1"
5108 +# CONFIG_NLS_CODEPAGE_437 is not set
5109 +# CONFIG_NLS_CODEPAGE_737 is not set
5110 +# CONFIG_NLS_CODEPAGE_775 is not set
5111 +# CONFIG_NLS_CODEPAGE_850 is not set
5112 +# CONFIG_NLS_CODEPAGE_852 is not set
5113 +# CONFIG_NLS_CODEPAGE_855 is not set
5114 +# CONFIG_NLS_CODEPAGE_857 is not set
5115 +# CONFIG_NLS_CODEPAGE_860 is not set
5116 +# CONFIG_NLS_CODEPAGE_861 is not set
5117 +# CONFIG_NLS_CODEPAGE_862 is not set
5118 +# CONFIG_NLS_CODEPAGE_863 is not set
5119 +# CONFIG_NLS_CODEPAGE_864 is not set
5120 +# CONFIG_NLS_CODEPAGE_865 is not set
5121 +# CONFIG_NLS_CODEPAGE_866 is not set
5122 +# CONFIG_NLS_CODEPAGE_869 is not set
5123 +# CONFIG_NLS_CODEPAGE_936 is not set
5124 +# CONFIG_NLS_CODEPAGE_950 is not set
5125 +# CONFIG_NLS_CODEPAGE_932 is not set
5126 +# CONFIG_NLS_CODEPAGE_949 is not set
5127 +# CONFIG_NLS_CODEPAGE_874 is not set
5128 +# CONFIG_NLS_ISO8859_8 is not set
5129 +# CONFIG_NLS_CODEPAGE_1250 is not set
5130 +# CONFIG_NLS_CODEPAGE_1251 is not set
5131 +# CONFIG_NLS_ISO8859_1 is not set
5132 +# CONFIG_NLS_ISO8859_2 is not set
5133 +# CONFIG_NLS_ISO8859_3 is not set
5134 +# CONFIG_NLS_ISO8859_4 is not set
5135 +# CONFIG_NLS_ISO8859_5 is not set
5136 +# CONFIG_NLS_ISO8859_6 is not set
5137 +# CONFIG_NLS_ISO8859_7 is not set
5138 +# CONFIG_NLS_ISO8859_9 is not set
5139 +# CONFIG_NLS_ISO8859_13 is not set
5140 +# CONFIG_NLS_ISO8859_14 is not set
5141 +# CONFIG_NLS_ISO8859_15 is not set
5142 +# CONFIG_NLS_KOI8_R is not set
5143 +# CONFIG_NLS_KOI8_U is not set
5144 +# CONFIG_NLS_UTF8 is not set
5145 +
5146 +#
5147 +# Multimedia devices
5148 +#
5149 +# CONFIG_VIDEO_DEV is not set
5150 +
5151 +#
5152 +# Console drivers
5153 +#
5154 +# CONFIG_VGA_CONSOLE is not set
5155 +# CONFIG_MDA_CONSOLE is not set
5156 +
5157 +#
5158 +# Frame-buffer support
5159 +#
5160 +CONFIG_FB=y
5161 +CONFIG_DUMMY_CONSOLE=y
5162 +# CONFIG_FB_RIVA is not set
5163 +# CONFIG_FB_CLGEN is not set
5164 +# CONFIG_FB_PM2 is not set
5165 +# CONFIG_FB_PM3 is not set
5166 +# CONFIG_FB_CYBER2000 is not set
5167 +# CONFIG_FB_MATROX is not set
5168 +# CONFIG_FB_ATY is not set
5169 +# CONFIG_FB_RADEON is not set
5170 +# CONFIG_FB_ATY128 is not set
5171 +# CONFIG_FB_INTEL is not set
5172 +# CONFIG_FB_SIS is not set
5173 +# CONFIG_FB_NEOMAGIC is not set
5174 +# CONFIG_FB_3DFX is not set
5175 +# CONFIG_FB_VOODOO1 is not set
5176 +# CONFIG_FB_TRIDENT is not set
5177 +# CONFIG_FB_E1356 is not set
5178 +# CONFIG_FB_IT8181 is not set
5179 +# CONFIG_FB_VIRTUAL is not set
5180 +CONFIG_FBCON_ADVANCED=y
5181 +# CONFIG_FBCON_MFB is not set
5182 +# CONFIG_FBCON_CFB2 is not set
5183 +# CONFIG_FBCON_CFB4 is not set
5184 +# CONFIG_FBCON_CFB8 is not set
5185 +CONFIG_FBCON_CFB16=y
5186 +# CONFIG_FBCON_CFB24 is not set
5187 +CONFIG_FBCON_CFB32=y
5188 +# CONFIG_FBCON_AFB is not set
5189 +# CONFIG_FBCON_ILBM is not set
5190 +# CONFIG_FBCON_IPLAN2P2 is not set
5191 +# CONFIG_FBCON_IPLAN2P4 is not set
5192 +# CONFIG_FBCON_IPLAN2P8 is not set
5193 +# CONFIG_FBCON_MAC is not set
5194 +# CONFIG_FBCON_VGA_PLANES is not set
5195 +# CONFIG_FBCON_VGA is not set
5196 +# CONFIG_FBCON_HGA is not set
5197 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
5198 +CONFIG_FBCON_FONTS=y
5199 +CONFIG_FONT_8x8=y
5200 +CONFIG_FONT_8x16=y
5201 +# CONFIG_FONT_SUN8x16 is not set
5202 +# CONFIG_FONT_SUN12x22 is not set
5203 +# CONFIG_FONT_6x11 is not set
5204 +# CONFIG_FONT_PEARL_8x8 is not set
5205 +# CONFIG_FONT_ACORN_8x8 is not set
5206 +
5207 +#
5208 +# Sound
5209 +#
5210 +CONFIG_SOUND=y
5211 +# CONFIG_SOUND_ALI5455 is not set
5212 +# CONFIG_SOUND_BT878 is not set
5213 +# CONFIG_SOUND_CMPCI is not set
5214 +# CONFIG_SOUND_EMU10K1 is not set
5215 +# CONFIG_MIDI_EMU10K1 is not set
5216 +# CONFIG_SOUND_FUSION is not set
5217 +# CONFIG_SOUND_CS4281 is not set
5218 +# CONFIG_SOUND_ES1370 is not set
5219 +# CONFIG_SOUND_ES1371 is not set
5220 +# CONFIG_SOUND_ESSSOLO1 is not set
5221 +# CONFIG_SOUND_MAESTRO is not set
5222 +# CONFIG_SOUND_MAESTRO3 is not set
5223 +# CONFIG_SOUND_FORTE is not set
5224 +# CONFIG_SOUND_ICH is not set
5225 +# CONFIG_SOUND_RME96XX is not set
5226 +# CONFIG_SOUND_SONICVIBES is not set
5227 +# CONFIG_SOUND_AU1X00 is not set
5228 +CONFIG_SOUND_AU1550_PSC=y
5229 +# CONFIG_SOUND_AU1550_I2S is not set
5230 +# CONFIG_SOUND_TRIDENT is not set
5231 +# CONFIG_SOUND_MSNDCLAS is not set
5232 +# CONFIG_SOUND_MSNDPIN is not set
5233 +# CONFIG_SOUND_VIA82CXXX is not set
5234 +# CONFIG_MIDI_VIA82CXXX is not set
5235 +# CONFIG_SOUND_OSS is not set
5236 +# CONFIG_SOUND_TVMIXER is not set
5237 +# CONFIG_SOUND_AD1980 is not set
5238 +# CONFIG_SOUND_WM97XX is not set
5239 +
5240 +#
5241 +# USB support
5242 +#
5243 +CONFIG_USB=y
5244 +# CONFIG_USB_DEBUG is not set
5245 +
5246 +#
5247 +# Miscellaneous USB options
5248 +#
5249 +CONFIG_USB_DEVICEFS=y
5250 +# CONFIG_USB_BANDWIDTH is not set
5251 +
5252 +#
5253 +# USB Host Controller Drivers
5254 +#
5255 +# CONFIG_USB_EHCI_HCD is not set
5256 +# CONFIG_USB_UHCI is not set
5257 +# CONFIG_USB_UHCI_ALT is not set
5258 +CONFIG_USB_OHCI=y
5259 +
5260 +#
5261 +# USB Device Class drivers
5262 +#
5263 +# CONFIG_USB_AUDIO is not set
5264 +# CONFIG_USB_EMI26 is not set
5265 +# CONFIG_USB_BLUETOOTH is not set
5266 +# CONFIG_USB_MIDI is not set
5267 +CONFIG_USB_STORAGE=y
5268 +# CONFIG_USB_STORAGE_DEBUG is not set
5269 +# CONFIG_USB_STORAGE_DATAFAB is not set
5270 +# CONFIG_USB_STORAGE_FREECOM is not set
5271 +# CONFIG_USB_STORAGE_ISD200 is not set
5272 +# CONFIG_USB_STORAGE_DPCM is not set
5273 +# CONFIG_USB_STORAGE_HP8200e is not set
5274 +# CONFIG_USB_STORAGE_SDDR09 is not set
5275 +# CONFIG_USB_STORAGE_SDDR55 is not set
5276 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
5277 +# CONFIG_USB_ACM is not set
5278 +# CONFIG_USB_PRINTER is not set
5279 +
5280 +#
5281 +# USB Human Interface Devices (HID)
5282 +#
5283 +CONFIG_USB_HID=y
5284 +CONFIG_USB_HIDINPUT=y
5285 +CONFIG_USB_HIDDEV=y
5286 +# CONFIG_USB_AIPTEK is not set
5287 +# CONFIG_USB_WACOM is not set
5288 +# CONFIG_USB_KBTAB is not set
5289 +# CONFIG_USB_POWERMATE is not set
5290 +
5291 +#
5292 +# USB Imaging devices
5293 +#
5294 +# CONFIG_USB_DC2XX is not set
5295 +# CONFIG_USB_MDC800 is not set
5296 +# CONFIG_USB_SCANNER is not set
5297 +# CONFIG_USB_MICROTEK is not set
5298 +# CONFIG_USB_HPUSBSCSI is not set
5299 +
5300 +#
5301 +# USB Multimedia devices
5302 +#
5303 +
5304 +#
5305 +# Video4Linux support is needed for USB Multimedia device support
5306 +#
5307 +
5308 +#
5309 +# USB Network adaptors
5310 +#
5311 +# CONFIG_USB_PEGASUS is not set
5312 +# CONFIG_USB_RTL8150 is not set
5313 +# CONFIG_USB_KAWETH is not set
5314 +# CONFIG_USB_CATC is not set
5315 +# CONFIG_USB_CDCETHER is not set
5316 +# CONFIG_USB_USBNET is not set
5317 +
5318 +#
5319 +# USB port drivers
5320 +#
5321 +# CONFIG_USB_USS720 is not set
5322 +
5323 +#
5324 +# USB Serial Converter support
5325 +#
5326 +# CONFIG_USB_SERIAL is not set
5327 +
5328 +#
5329 +# USB Miscellaneous drivers
5330 +#
5331 +# CONFIG_USB_RIO500 is not set
5332 +# CONFIG_USB_AUERSWALD is not set
5333 +# CONFIG_USB_TIGL is not set
5334 +# CONFIG_USB_BRLVGER is not set
5335 +# CONFIG_USB_LCD is not set
5336 +
5337 +#
5338 +# Support for USB gadgets
5339 +#
5340 +# CONFIG_USB_GADGET is not set
5341 +
5342 +#
5343 +# Bluetooth support
5344 +#
5345 +# CONFIG_BLUEZ is not set
5346 +
5347 +#
5348 +# Kernel hacking
5349 +#
5350 +CONFIG_CROSSCOMPILE=y
5351 +# CONFIG_RUNTIME_DEBUG is not set
5352 +# CONFIG_KGDB is not set
5353 +# CONFIG_GDB_CONSOLE is not set
5354 +# CONFIG_DEBUG_INFO is not set
5355 +# CONFIG_MAGIC_SYSRQ is not set
5356 +# CONFIG_MIPS_UNCACHED is not set
5357 +CONFIG_LOG_BUF_SHIFT=0
5358 +
5359 +#
5360 +# Cryptographic options
5361 +#
5362 +# CONFIG_CRYPTO is not set
5363 +
5364 +#
5365 +# Library routines
5366 +#
5367 +# CONFIG_CRC32 is not set
5368 +CONFIG_ZLIB_INFLATE=m
5369 +CONFIG_ZLIB_DEFLATE=m
5370 +# CONFIG_FW_LOADER is not set
5371 diff -Nur linux-2.4.29/arch/mips/defconfig-db1500 linux-mips/arch/mips/defconfig-db1500
5372 --- linux-2.4.29/arch/mips/defconfig-db1500 2005-01-19 15:09:28.000000000 +0100
5373 +++ linux-mips/arch/mips/defconfig-db1500 2005-02-12 04:05:27.000000000 +0100
5374 @@ -22,16 +22,19 @@
5375 #
5376 # CONFIG_ACER_PICA_61 is not set
5377 # CONFIG_MIPS_BOSPORUS is not set
5378 +# CONFIG_MIPS_FICMMP is not set
5379 # CONFIG_MIPS_MIRAGE is not set
5380 # CONFIG_MIPS_DB1000 is not set
5381 # CONFIG_MIPS_DB1100 is not set
5382 CONFIG_MIPS_DB1500=y
5383 # CONFIG_MIPS_DB1550 is not set
5384 +# CONFIG_MIPS_DB1200 is not set
5385 # CONFIG_MIPS_PB1000 is not set
5386 # CONFIG_MIPS_PB1100 is not set
5387 # CONFIG_MIPS_PB1500 is not set
5388 -# CONFIG_MIPS_HYDROGEN3 is not set
5389 # CONFIG_MIPS_PB1550 is not set
5390 +# CONFIG_MIPS_PB1200 is not set
5391 +# CONFIG_MIPS_HYDROGEN3 is not set
5392 # CONFIG_MIPS_XXS1500 is not set
5393 # CONFIG_MIPS_MTX1 is not set
5394 # CONFIG_COGENT_CSB250 is not set
5395 @@ -267,11 +270,6 @@
5396 #
5397 # CONFIG_IPX is not set
5398 # CONFIG_ATALK is not set
5399 -
5400 -#
5401 -# Appletalk devices
5402 -#
5403 -# CONFIG_DEV_APPLETALK is not set
5404 # CONFIG_DECNET is not set
5405 # CONFIG_BRIDGE is not set
5406 # CONFIG_X25 is not set
5407 diff -Nur linux-2.4.29/arch/mips/defconfig-db1550 linux-mips/arch/mips/defconfig-db1550
5408 --- linux-2.4.29/arch/mips/defconfig-db1550 2005-01-19 15:09:28.000000000 +0100
5409 +++ linux-mips/arch/mips/defconfig-db1550 2005-02-12 04:05:27.000000000 +0100
5410 @@ -22,16 +22,19 @@
5411 #
5412 # CONFIG_ACER_PICA_61 is not set
5413 # CONFIG_MIPS_BOSPORUS is not set
5414 +# CONFIG_MIPS_FICMMP is not set
5415 # CONFIG_MIPS_MIRAGE is not set
5416 # CONFIG_MIPS_DB1000 is not set
5417 # CONFIG_MIPS_DB1100 is not set
5418 # CONFIG_MIPS_DB1500 is not set
5419 CONFIG_MIPS_DB1550=y
5420 +# CONFIG_MIPS_DB1200 is not set
5421 # CONFIG_MIPS_PB1000 is not set
5422 # CONFIG_MIPS_PB1100 is not set
5423 # CONFIG_MIPS_PB1500 is not set
5424 -# CONFIG_MIPS_HYDROGEN3 is not set
5425 # CONFIG_MIPS_PB1550 is not set
5426 +# CONFIG_MIPS_PB1200 is not set
5427 +# CONFIG_MIPS_HYDROGEN3 is not set
5428 # CONFIG_MIPS_XXS1500 is not set
5429 # CONFIG_MIPS_MTX1 is not set
5430 # CONFIG_COGENT_CSB250 is not set
5431 @@ -343,11 +346,6 @@
5432 #
5433 # CONFIG_IPX is not set
5434 # CONFIG_ATALK is not set
5435 -
5436 -#
5437 -# Appletalk devices
5438 -#
5439 -# CONFIG_DEV_APPLETALK is not set
5440 # CONFIG_DECNET is not set
5441 # CONFIG_BRIDGE is not set
5442 # CONFIG_X25 is not set
5443 diff -Nur linux-2.4.29/arch/mips/defconfig-ddb5476 linux-mips/arch/mips/defconfig-ddb5476
5444 --- linux-2.4.29/arch/mips/defconfig-ddb5476 2005-01-19 15:09:28.000000000 +0100
5445 +++ linux-mips/arch/mips/defconfig-ddb5476 2005-01-09 20:33:59.000000000 +0100
5446 @@ -226,11 +226,6 @@
5447 #
5448 # CONFIG_IPX is not set
5449 # CONFIG_ATALK is not set
5450 -
5451 -#
5452 -# Appletalk devices
5453 -#
5454 -# CONFIG_DEV_APPLETALK is not set
5455 # CONFIG_DECNET is not set
5456 # CONFIG_BRIDGE is not set
5457 # CONFIG_X25 is not set
5458 diff -Nur linux-2.4.29/arch/mips/defconfig-ddb5477 linux-mips/arch/mips/defconfig-ddb5477
5459 --- linux-2.4.29/arch/mips/defconfig-ddb5477 2005-01-19 15:09:28.000000000 +0100
5460 +++ linux-mips/arch/mips/defconfig-ddb5477 2005-01-09 20:33:59.000000000 +0100
5461 @@ -226,11 +226,6 @@
5462 #
5463 # CONFIG_IPX is not set
5464 # CONFIG_ATALK is not set
5465 -
5466 -#
5467 -# Appletalk devices
5468 -#
5469 -# CONFIG_DEV_APPLETALK is not set
5470 # CONFIG_DECNET is not set
5471 # CONFIG_BRIDGE is not set
5472 # CONFIG_X25 is not set
5473 diff -Nur linux-2.4.29/arch/mips/defconfig-decstation linux-mips/arch/mips/defconfig-decstation
5474 --- linux-2.4.29/arch/mips/defconfig-decstation 2005-01-19 15:09:28.000000000 +0100
5475 +++ linux-mips/arch/mips/defconfig-decstation 2005-01-09 20:33:59.000000000 +0100
5476 @@ -223,11 +223,6 @@
5477 #
5478 # CONFIG_IPX is not set
5479 # CONFIG_ATALK is not set
5480 -
5481 -#
5482 -# Appletalk devices
5483 -#
5484 -# CONFIG_DEV_APPLETALK is not set
5485 # CONFIG_DECNET is not set
5486 # CONFIG_BRIDGE is not set
5487 # CONFIG_X25 is not set
5488 @@ -306,6 +301,7 @@
5489 # CONFIG_SCSI_MEGARAID is not set
5490 # CONFIG_SCSI_MEGARAID2 is not set
5491 # CONFIG_SCSI_SATA is not set
5492 +# CONFIG_SCSI_SATA_AHCI is not set
5493 # CONFIG_SCSI_SATA_SVW is not set
5494 # CONFIG_SCSI_ATA_PIIX is not set
5495 # CONFIG_SCSI_SATA_NV is not set
5496 diff -Nur linux-2.4.29/arch/mips/defconfig-e55 linux-mips/arch/mips/defconfig-e55
5497 --- linux-2.4.29/arch/mips/defconfig-e55 2005-01-19 15:09:28.000000000 +0100
5498 +++ linux-mips/arch/mips/defconfig-e55 2005-01-09 20:33:59.000000000 +0100
5499 @@ -222,11 +222,6 @@
5500 #
5501 # CONFIG_IPX is not set
5502 # CONFIG_ATALK is not set
5503 -
5504 -#
5505 -# Appletalk devices
5506 -#
5507 -# CONFIG_DEV_APPLETALK is not set
5508 # CONFIG_DECNET is not set
5509 # CONFIG_BRIDGE is not set
5510 # CONFIG_X25 is not set
5511 diff -Nur linux-2.4.29/arch/mips/defconfig-eagle linux-mips/arch/mips/defconfig-eagle
5512 --- linux-2.4.29/arch/mips/defconfig-eagle 2005-01-19 15:09:28.000000000 +0100
5513 +++ linux-mips/arch/mips/defconfig-eagle 2005-01-09 20:33:59.000000000 +0100
5514 @@ -327,11 +327,6 @@
5515 #
5516 # CONFIG_IPX is not set
5517 # CONFIG_ATALK is not set
5518 -
5519 -#
5520 -# Appletalk devices
5521 -#
5522 -# CONFIG_DEV_APPLETALK is not set
5523 # CONFIG_DECNET is not set
5524 # CONFIG_BRIDGE is not set
5525 # CONFIG_X25 is not set
5526 diff -Nur linux-2.4.29/arch/mips/defconfig-ev64120 linux-mips/arch/mips/defconfig-ev64120
5527 --- linux-2.4.29/arch/mips/defconfig-ev64120 2005-01-19 15:09:28.000000000 +0100
5528 +++ linux-mips/arch/mips/defconfig-ev64120 2005-01-09 20:33:59.000000000 +0100
5529 @@ -230,11 +230,6 @@
5530 #
5531 # CONFIG_IPX is not set
5532 # CONFIG_ATALK is not set
5533 -
5534 -#
5535 -# Appletalk devices
5536 -#
5537 -# CONFIG_DEV_APPLETALK is not set
5538 # CONFIG_DECNET is not set
5539 # CONFIG_BRIDGE is not set
5540 # CONFIG_X25 is not set
5541 diff -Nur linux-2.4.29/arch/mips/defconfig-ev96100 linux-mips/arch/mips/defconfig-ev96100
5542 --- linux-2.4.29/arch/mips/defconfig-ev96100 2005-01-19 15:09:28.000000000 +0100
5543 +++ linux-mips/arch/mips/defconfig-ev96100 2005-01-09 20:33:59.000000000 +0100
5544 @@ -232,11 +232,6 @@
5545 #
5546 # CONFIG_IPX is not set
5547 # CONFIG_ATALK is not set
5548 -
5549 -#
5550 -# Appletalk devices
5551 -#
5552 -# CONFIG_DEV_APPLETALK is not set
5553 # CONFIG_DECNET is not set
5554 # CONFIG_BRIDGE is not set
5555 # CONFIG_X25 is not set
5556 diff -Nur linux-2.4.29/arch/mips/defconfig-ficmmp linux-mips/arch/mips/defconfig-ficmmp
5557 --- linux-2.4.29/arch/mips/defconfig-ficmmp 1970-01-01 01:00:00.000000000 +0100
5558 +++ linux-mips/arch/mips/defconfig-ficmmp 2005-02-12 04:05:27.000000000 +0100
5559 @@ -0,0 +1,880 @@
5560 +#
5561 +# Automatically generated make config: don't edit
5562 +#
5563 +CONFIG_MIPS=y
5564 +CONFIG_MIPS32=y
5565 +# CONFIG_MIPS64 is not set
5566 +
5567 +#
5568 +# Code maturity level options
5569 +#
5570 +CONFIG_EXPERIMENTAL=y
5571 +
5572 +#
5573 +# Loadable module support
5574 +#
5575 +CONFIG_MODULES=y
5576 +# CONFIG_MODVERSIONS is not set
5577 +CONFIG_KMOD=y
5578 +
5579 +#
5580 +# Machine selection
5581 +#
5582 +# CONFIG_ACER_PICA_61 is not set
5583 +# CONFIG_MIPS_BOSPORUS is not set
5584 +CONFIG_MIPS_FICMMP=y
5585 +# CONFIG_MIPS_MIRAGE is not set
5586 +# CONFIG_MIPS_DB1000 is not set
5587 +# CONFIG_MIPS_DB1100 is not set
5588 +# CONFIG_MIPS_DB1500 is not set
5589 +# CONFIG_MIPS_DB1550 is not set
5590 +# CONFIG_MIPS_DB1200 is not set
5591 +# CONFIG_MIPS_PB1000 is not set
5592 +# CONFIG_MIPS_PB1100 is not set
5593 +# CONFIG_MIPS_PB1500 is not set
5594 +# CONFIG_MIPS_PB1550 is not set
5595 +# CONFIG_MIPS_PB1200 is not set
5596 +# CONFIG_MIPS_HYDROGEN3 is not set
5597 +# CONFIG_MIPS_XXS1500 is not set
5598 +# CONFIG_MIPS_MTX1 is not set
5599 +# CONFIG_COGENT_CSB250 is not set
5600 +# CONFIG_BAGET_MIPS is not set
5601 +# CONFIG_CASIO_E55 is not set
5602 +# CONFIG_MIPS_COBALT is not set
5603 +# CONFIG_DECSTATION is not set
5604 +# CONFIG_MIPS_EV64120 is not set
5605 +# CONFIG_MIPS_EV96100 is not set
5606 +# CONFIG_MIPS_IVR is not set
5607 +# CONFIG_HP_LASERJET is not set
5608 +# CONFIG_IBM_WORKPAD is not set
5609 +# CONFIG_LASAT is not set
5610 +# CONFIG_MIPS_ITE8172 is not set
5611 +# CONFIG_MIPS_ATLAS is not set
5612 +# CONFIG_MIPS_MAGNUM_4000 is not set
5613 +# CONFIG_MIPS_MALTA is not set
5614 +# CONFIG_MIPS_SEAD is not set
5615 +# CONFIG_MOMENCO_OCELOT is not set
5616 +# CONFIG_MOMENCO_OCELOT_G is not set
5617 +# CONFIG_MOMENCO_OCELOT_C is not set
5618 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
5619 +# CONFIG_PMC_BIG_SUR is not set
5620 +# CONFIG_PMC_STRETCH is not set
5621 +# CONFIG_PMC_YOSEMITE is not set
5622 +# CONFIG_DDB5074 is not set
5623 +# CONFIG_DDB5476 is not set
5624 +# CONFIG_DDB5477 is not set
5625 +# CONFIG_NEC_OSPREY is not set
5626 +# CONFIG_NEC_EAGLE is not set
5627 +# CONFIG_OLIVETTI_M700 is not set
5628 +# CONFIG_NINO is not set
5629 +# CONFIG_SGI_IP22 is not set
5630 +# CONFIG_SGI_IP27 is not set
5631 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
5632 +# CONFIG_SNI_RM200_PCI is not set
5633 +# CONFIG_TANBAC_TB0226 is not set
5634 +# CONFIG_TANBAC_TB0229 is not set
5635 +# CONFIG_TOSHIBA_JMR3927 is not set
5636 +# CONFIG_TOSHIBA_RBTX4927 is not set
5637 +# CONFIG_VICTOR_MPC30X is not set
5638 +# CONFIG_ZAO_CAPCELLA is not set
5639 +# CONFIG_HIGHMEM is not set
5640 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
5641 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
5642 +CONFIG_SOC_AU1X00=y
5643 +CONFIG_SOC_AU1200=y
5644 +CONFIG_NONCOHERENT_IO=y
5645 +CONFIG_PC_KEYB=y
5646 +# CONFIG_MIPS_AU1000 is not set
5647 +
5648 +#
5649 +# CPU selection
5650 +#
5651 +CONFIG_CPU_MIPS32=y
5652 +# CONFIG_CPU_MIPS64 is not set
5653 +# CONFIG_CPU_R3000 is not set
5654 +# CONFIG_CPU_TX39XX is not set
5655 +# CONFIG_CPU_VR41XX is not set
5656 +# CONFIG_CPU_R4300 is not set
5657 +# CONFIG_CPU_R4X00 is not set
5658 +# CONFIG_CPU_TX49XX is not set
5659 +# CONFIG_CPU_R5000 is not set
5660 +# CONFIG_CPU_R5432 is not set
5661 +# CONFIG_CPU_R6000 is not set
5662 +# CONFIG_CPU_NEVADA is not set
5663 +# CONFIG_CPU_R8000 is not set
5664 +# CONFIG_CPU_R10000 is not set
5665 +# CONFIG_CPU_RM7000 is not set
5666 +# CONFIG_CPU_RM9000 is not set
5667 +# CONFIG_CPU_SB1 is not set
5668 +CONFIG_PAGE_SIZE_4KB=y
5669 +# CONFIG_PAGE_SIZE_16KB is not set
5670 +# CONFIG_PAGE_SIZE_64KB is not set
5671 +CONFIG_CPU_HAS_PREFETCH=y
5672 +# CONFIG_VTAG_ICACHE is not set
5673 +CONFIG_64BIT_PHYS_ADDR=y
5674 +# CONFIG_CPU_ADVANCED is not set
5675 +CONFIG_CPU_HAS_LLSC=y
5676 +# CONFIG_CPU_HAS_LLDSCD is not set
5677 +# CONFIG_CPU_HAS_WB is not set
5678 +CONFIG_CPU_HAS_SYNC=y
5679 +
5680 +#
5681 +# General setup
5682 +#
5683 +CONFIG_CPU_LITTLE_ENDIAN=y
5684 +# CONFIG_BUILD_ELF64 is not set
5685 +CONFIG_NET=y
5686 +# CONFIG_PCI is not set
5687 +# CONFIG_PCI_NEW is not set
5688 +CONFIG_PCI_AUTO=y
5689 +# CONFIG_ISA is not set
5690 +# CONFIG_TC is not set
5691 +# CONFIG_MCA is not set
5692 +# CONFIG_SBUS is not set
5693 +# CONFIG_HOTPLUG is not set
5694 +# CONFIG_PCMCIA is not set
5695 +# CONFIG_HOTPLUG_PCI is not set
5696 +CONFIG_SYSVIPC=y
5697 +# CONFIG_BSD_PROCESS_ACCT is not set
5698 +CONFIG_SYSCTL=y
5699 +CONFIG_KCORE_ELF=y
5700 +# CONFIG_KCORE_AOUT is not set
5701 +# CONFIG_BINFMT_AOUT is not set
5702 +CONFIG_BINFMT_ELF=y
5703 +# CONFIG_MIPS32_COMPAT is not set
5704 +# CONFIG_MIPS32_O32 is not set
5705 +# CONFIG_MIPS32_N32 is not set
5706 +# CONFIG_BINFMT_ELF32 is not set
5707 +# CONFIG_BINFMT_MISC is not set
5708 +# CONFIG_OOM_KILLER is not set
5709 +CONFIG_CMDLINE_BOOL=y
5710 +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
5711 +# CONFIG_PM is not set
5712 +
5713 +#
5714 +# Memory Technology Devices (MTD)
5715 +#
5716 +# CONFIG_MTD is not set
5717 +
5718 +#
5719 +# Parallel port support
5720 +#
5721 +# CONFIG_PARPORT is not set
5722 +
5723 +#
5724 +# Plug and Play configuration
5725 +#
5726 +# CONFIG_PNP is not set
5727 +# CONFIG_ISAPNP is not set
5728 +
5729 +#
5730 +# Block devices
5731 +#
5732 +# CONFIG_BLK_DEV_FD is not set
5733 +# CONFIG_BLK_DEV_XD is not set
5734 +# CONFIG_PARIDE is not set
5735 +# CONFIG_BLK_CPQ_DA is not set
5736 +# CONFIG_BLK_CPQ_CISS_DA is not set
5737 +# CONFIG_CISS_SCSI_TAPE is not set
5738 +# CONFIG_CISS_MONITOR_THREAD is not set
5739 +# CONFIG_BLK_DEV_DAC960 is not set
5740 +# CONFIG_BLK_DEV_UMEM is not set
5741 +# CONFIG_BLK_DEV_SX8 is not set
5742 +CONFIG_BLK_DEV_LOOP=y
5743 +# CONFIG_BLK_DEV_NBD is not set
5744 +# CONFIG_BLK_DEV_RAM is not set
5745 +# CONFIG_BLK_DEV_INITRD is not set
5746 +# CONFIG_BLK_STATS is not set
5747 +
5748 +#
5749 +# Multi-device support (RAID and LVM)
5750 +#
5751 +# CONFIG_MD is not set
5752 +# CONFIG_BLK_DEV_MD is not set
5753 +# CONFIG_MD_LINEAR is not set
5754 +# CONFIG_MD_RAID0 is not set
5755 +# CONFIG_MD_RAID1 is not set
5756 +# CONFIG_MD_RAID5 is not set
5757 +# CONFIG_MD_MULTIPATH is not set
5758 +# CONFIG_BLK_DEV_LVM is not set
5759 +
5760 +#
5761 +# Networking options
5762 +#
5763 +CONFIG_PACKET=y
5764 +# CONFIG_PACKET_MMAP is not set
5765 +# CONFIG_NETLINK_DEV is not set
5766 +CONFIG_NETFILTER=y
5767 +# CONFIG_NETFILTER_DEBUG is not set
5768 +CONFIG_FILTER=y
5769 +CONFIG_UNIX=y
5770 +CONFIG_INET=y
5771 +CONFIG_IP_MULTICAST=y
5772 +# CONFIG_IP_ADVANCED_ROUTER is not set
5773 +# CONFIG_IP_PNP is not set
5774 +# CONFIG_NET_IPIP is not set
5775 +# CONFIG_NET_IPGRE is not set
5776 +# CONFIG_IP_MROUTE is not set
5777 +# CONFIG_ARPD is not set
5778 +# CONFIG_INET_ECN is not set
5779 +# CONFIG_SYN_COOKIES is not set
5780 +
5781 +#
5782 +# IP: Netfilter Configuration
5783 +#
5784 +# CONFIG_IP_NF_CONNTRACK is not set
5785 +# CONFIG_IP_NF_QUEUE is not set
5786 +# CONFIG_IP_NF_IPTABLES is not set
5787 +# CONFIG_IP_NF_ARPTABLES is not set
5788 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
5789 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
5790 +
5791 +#
5792 +# IP: Virtual Server Configuration
5793 +#
5794 +# CONFIG_IP_VS is not set
5795 +# CONFIG_IPV6 is not set
5796 +# CONFIG_KHTTPD is not set
5797 +
5798 +#
5799 +# SCTP Configuration (EXPERIMENTAL)
5800 +#
5801 +# CONFIG_IP_SCTP is not set
5802 +# CONFIG_ATM is not set
5803 +# CONFIG_VLAN_8021Q is not set
5804 +
5805 +#
5806 +#
5807 +#
5808 +# CONFIG_IPX is not set
5809 +# CONFIG_ATALK is not set
5810 +# CONFIG_DECNET is not set
5811 +# CONFIG_BRIDGE is not set
5812 +# CONFIG_X25 is not set
5813 +# CONFIG_LAPB is not set
5814 +# CONFIG_LLC is not set
5815 +# CONFIG_NET_DIVERT is not set
5816 +# CONFIG_ECONET is not set
5817 +# CONFIG_WAN_ROUTER is not set
5818 +# CONFIG_NET_FASTROUTE is not set
5819 +# CONFIG_NET_HW_FLOWCONTROL is not set
5820 +
5821 +#
5822 +# QoS and/or fair queueing
5823 +#
5824 +# CONFIG_NET_SCHED is not set
5825 +
5826 +#
5827 +# Network testing
5828 +#
5829 +# CONFIG_NET_PKTGEN is not set
5830 +
5831 +#
5832 +# Telephony Support
5833 +#
5834 +# CONFIG_PHONE is not set
5835 +# CONFIG_PHONE_IXJ is not set
5836 +# CONFIG_PHONE_IXJ_PCMCIA is not set
5837 +
5838 +#
5839 +# ATA/IDE/MFM/RLL support
5840 +#
5841 +CONFIG_IDE=y
5842 +
5843 +#
5844 +# IDE, ATA and ATAPI Block devices
5845 +#
5846 +CONFIG_BLK_DEV_IDE=y
5847 +
5848 +#
5849 +# Please see Documentation/ide.txt for help/info on IDE drives
5850 +#
5851 +CONFIG_BLK_DEV_HD_IDE=y
5852 +CONFIG_BLK_DEV_HD=y
5853 +# CONFIG_BLK_DEV_IDE_SATA is not set
5854 +CONFIG_BLK_DEV_IDEDISK=y
5855 +CONFIG_IDEDISK_MULTI_MODE=y
5856 +CONFIG_IDEDISK_STROKE=y
5857 +# CONFIG_BLK_DEV_IDECS is not set
5858 +# CONFIG_BLK_DEV_DELKIN is not set
5859 +# CONFIG_BLK_DEV_IDECD is not set
5860 +# CONFIG_BLK_DEV_IDETAPE is not set
5861 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
5862 +# CONFIG_BLK_DEV_IDESCSI is not set
5863 +# CONFIG_IDE_TASK_IOCTL is not set
5864 +
5865 +#
5866 +# IDE chipset support/bugfixes
5867 +#
5868 +# CONFIG_BLK_DEV_CMD640 is not set
5869 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
5870 +# CONFIG_BLK_DEV_ISAPNP is not set
5871 +# CONFIG_IDE_CHIPSETS is not set
5872 +# CONFIG_IDEDMA_AUTO is not set
5873 +# CONFIG_DMA_NONPCI is not set
5874 +# CONFIG_BLK_DEV_ATARAID is not set
5875 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
5876 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
5877 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
5878 +# CONFIG_BLK_DEV_ATARAID_SII is not set
5879 +
5880 +#
5881 +# SCSI support
5882 +#
5883 +CONFIG_SCSI=y
5884 +
5885 +#
5886 +# SCSI support type (disk, tape, CD-ROM)
5887 +#
5888 +CONFIG_BLK_DEV_SD=y
5889 +CONFIG_SD_EXTRA_DEVS=40
5890 +CONFIG_CHR_DEV_ST=y
5891 +# CONFIG_CHR_DEV_OSST is not set
5892 +CONFIG_BLK_DEV_SR=y
5893 +# CONFIG_BLK_DEV_SR_VENDOR is not set
5894 +CONFIG_SR_EXTRA_DEVS=2
5895 +# CONFIG_CHR_DEV_SG is not set
5896 +
5897 +#
5898 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
5899 +#
5900 +# CONFIG_SCSI_DEBUG_QUEUES is not set
5901 +# CONFIG_SCSI_MULTI_LUN is not set
5902 +CONFIG_SCSI_CONSTANTS=y
5903 +# CONFIG_SCSI_LOGGING is not set
5904 +
5905 +#
5906 +# SCSI low-level drivers
5907 +#
5908 +# CONFIG_SCSI_7000FASST is not set
5909 +# CONFIG_SCSI_ACARD is not set
5910 +# CONFIG_SCSI_AHA152X is not set
5911 +# CONFIG_SCSI_AHA1542 is not set
5912 +# CONFIG_SCSI_AHA1740 is not set
5913 +# CONFIG_SCSI_AACRAID is not set
5914 +# CONFIG_SCSI_AIC7XXX is not set
5915 +# CONFIG_SCSI_AIC79XX is not set
5916 +# CONFIG_SCSI_AIC7XXX_OLD is not set
5917 +# CONFIG_SCSI_DPT_I2O is not set
5918 +# CONFIG_SCSI_ADVANSYS is not set
5919 +# CONFIG_SCSI_IN2000 is not set
5920 +# CONFIG_SCSI_AM53C974 is not set
5921 +# CONFIG_SCSI_MEGARAID is not set
5922 +# CONFIG_SCSI_MEGARAID2 is not set
5923 +# CONFIG_SCSI_SATA is not set
5924 +# CONFIG_SCSI_SATA_AHCI is not set
5925 +# CONFIG_SCSI_SATA_SVW is not set
5926 +# CONFIG_SCSI_ATA_PIIX is not set
5927 +# CONFIG_SCSI_SATA_NV is not set
5928 +# CONFIG_SCSI_SATA_PROMISE is not set
5929 +# CONFIG_SCSI_SATA_SX4 is not set
5930 +# CONFIG_SCSI_SATA_SIL is not set
5931 +# CONFIG_SCSI_SATA_SIS is not set
5932 +# CONFIG_SCSI_SATA_ULI is not set
5933 +# CONFIG_SCSI_SATA_VIA is not set
5934 +# CONFIG_SCSI_SATA_VITESSE is not set
5935 +# CONFIG_SCSI_BUSLOGIC is not set
5936 +# CONFIG_SCSI_DMX3191D is not set
5937 +# CONFIG_SCSI_DTC3280 is not set
5938 +# CONFIG_SCSI_EATA is not set
5939 +# CONFIG_SCSI_EATA_DMA is not set
5940 +# CONFIG_SCSI_EATA_PIO is not set
5941 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
5942 +# CONFIG_SCSI_GDTH is not set
5943 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
5944 +# CONFIG_SCSI_INITIO is not set
5945 +# CONFIG_SCSI_INIA100 is not set
5946 +# CONFIG_SCSI_NCR53C406A is not set
5947 +# CONFIG_SCSI_NCR53C7xx is not set
5948 +# CONFIG_SCSI_PAS16 is not set
5949 +# CONFIG_SCSI_PCI2000 is not set
5950 +# CONFIG_SCSI_PCI2220I is not set
5951 +# CONFIG_SCSI_PSI240I is not set
5952 +# CONFIG_SCSI_QLOGIC_FAS is not set
5953 +# CONFIG_SCSI_SIM710 is not set
5954 +# CONFIG_SCSI_SYM53C416 is not set
5955 +# CONFIG_SCSI_T128 is not set
5956 +# CONFIG_SCSI_U14_34F is not set
5957 +# CONFIG_SCSI_NSP32 is not set
5958 +# CONFIG_SCSI_DEBUG is not set
5959 +
5960 +#
5961 +# Fusion MPT device support
5962 +#
5963 +# CONFIG_FUSION is not set
5964 +# CONFIG_FUSION_BOOT is not set
5965 +# CONFIG_FUSION_ISENSE is not set
5966 +# CONFIG_FUSION_CTL is not set
5967 +# CONFIG_FUSION_LAN is not set
5968 +
5969 +#
5970 +# Network device support
5971 +#
5972 +CONFIG_NETDEVICES=y
5973 +
5974 +#
5975 +# ARCnet devices
5976 +#
5977 +# CONFIG_ARCNET is not set
5978 +# CONFIG_DUMMY is not set
5979 +# CONFIG_BONDING is not set
5980 +# CONFIG_EQUALIZER is not set
5981 +# CONFIG_TUN is not set
5982 +# CONFIG_ETHERTAP is not set
5983 +
5984 +#
5985 +# Ethernet (10 or 100Mbit)
5986 +#
5987 +CONFIG_NET_ETHERNET=y
5988 +# CONFIG_MIPS_AU1X00_ENET is not set
5989 +# CONFIG_SUNLANCE is not set
5990 +# CONFIG_SUNBMAC is not set
5991 +# CONFIG_SUNQE is not set
5992 +# CONFIG_SUNGEM is not set
5993 +# CONFIG_NET_VENDOR_3COM is not set
5994 +# CONFIG_LANCE is not set
5995 +# CONFIG_NET_VENDOR_SMC is not set
5996 +# CONFIG_NET_VENDOR_RACAL is not set
5997 +# CONFIG_NET_ISA is not set
5998 +# CONFIG_NET_PCI is not set
5999 +# CONFIG_NET_POCKET is not set
6000 +
6001 +#
6002 +# Ethernet (1000 Mbit)
6003 +#
6004 +# CONFIG_ACENIC is not set
6005 +# CONFIG_DL2K is not set
6006 +# CONFIG_E1000 is not set
6007 +# CONFIG_MYRI_SBUS is not set
6008 +# CONFIG_NS83820 is not set
6009 +# CONFIG_HAMACHI is not set
6010 +# CONFIG_YELLOWFIN is not set
6011 +# CONFIG_R8169 is not set
6012 +# CONFIG_SK98LIN is not set
6013 +# CONFIG_TIGON3 is not set
6014 +# CONFIG_FDDI is not set
6015 +# CONFIG_HIPPI is not set
6016 +# CONFIG_PLIP is not set
6017 +# CONFIG_PPP is not set
6018 +# CONFIG_SLIP is not set
6019 +
6020 +#
6021 +# Wireless LAN (non-hamradio)
6022 +#
6023 +# CONFIG_NET_RADIO is not set
6024 +
6025 +#
6026 +# Token Ring devices
6027 +#
6028 +# CONFIG_TR is not set
6029 +# CONFIG_NET_FC is not set
6030 +# CONFIG_RCPCI is not set
6031 +# CONFIG_SHAPER is not set
6032 +
6033 +#
6034 +# Wan interfaces
6035 +#
6036 +# CONFIG_WAN is not set
6037 +
6038 +#
6039 +# Amateur Radio support
6040 +#
6041 +# CONFIG_HAMRADIO is not set
6042 +
6043 +#
6044 +# IrDA (infrared) support
6045 +#
6046 +# CONFIG_IRDA is not set
6047 +
6048 +#
6049 +# ISDN subsystem
6050 +#
6051 +# CONFIG_ISDN is not set
6052 +
6053 +#
6054 +# Input core support
6055 +#
6056 +CONFIG_INPUT=y
6057 +CONFIG_INPUT_KEYBDEV=y
6058 +CONFIG_INPUT_MOUSEDEV=y
6059 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
6060 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
6061 +# CONFIG_INPUT_JOYDEV is not set
6062 +CONFIG_INPUT_EVDEV=y
6063 +# CONFIG_INPUT_UINPUT is not set
6064 +
6065 +#
6066 +# Character devices
6067 +#
6068 +CONFIG_VT=y
6069 +CONFIG_VT_CONSOLE=y
6070 +# CONFIG_SERIAL is not set
6071 +# CONFIG_SERIAL_EXTENDED is not set
6072 +CONFIG_SERIAL_NONSTANDARD=y
6073 +# CONFIG_COMPUTONE is not set
6074 +# CONFIG_ROCKETPORT is not set
6075 +# CONFIG_CYCLADES is not set
6076 +# CONFIG_DIGIEPCA is not set
6077 +# CONFIG_DIGI is not set
6078 +# CONFIG_ESPSERIAL is not set
6079 +# CONFIG_MOXA_INTELLIO is not set
6080 +# CONFIG_MOXA_SMARTIO is not set
6081 +# CONFIG_ISI is not set
6082 +# CONFIG_SYNCLINK is not set
6083 +# CONFIG_SYNCLINKMP is not set
6084 +# CONFIG_N_HDLC is not set
6085 +# CONFIG_RISCOM8 is not set
6086 +# CONFIG_SPECIALIX is not set
6087 +# CONFIG_SX is not set
6088 +# CONFIG_RIO is not set
6089 +# CONFIG_STALDRV is not set
6090 +# CONFIG_SERIAL_TX3912 is not set
6091 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
6092 +# CONFIG_SERIAL_TXX9 is not set
6093 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
6094 +CONFIG_AU1X00_UART=y
6095 +CONFIG_AU1X00_SERIAL_CONSOLE=y
6096 +# CONFIG_AU1X00_USB_TTY is not set
6097 +# CONFIG_AU1X00_USB_RAW is not set
6098 +# CONFIG_TXX927_SERIAL is not set
6099 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6100 +CONFIG_UNIX98_PTYS=y
6101 +CONFIG_UNIX98_PTY_COUNT=256
6102 +
6103 +#
6104 +# I2C support
6105 +#
6106 +CONFIG_I2C=y
6107 +# CONFIG_I2C_ALGOBIT is not set
6108 +# CONFIG_SCx200_ACB is not set
6109 +# CONFIG_I2C_ALGOPCF is not set
6110 +# CONFIG_I2C_CHARDEV is not set
6111 +# CONFIG_I2C_PROC is not set
6112 +
6113 +#
6114 +# Mice
6115 +#
6116 +# CONFIG_BUSMOUSE is not set
6117 +# CONFIG_MOUSE is not set
6118 +
6119 +#
6120 +# Joysticks
6121 +#
6122 +# CONFIG_INPUT_GAMEPORT is not set
6123 +# CONFIG_INPUT_NS558 is not set
6124 +# CONFIG_INPUT_LIGHTNING is not set
6125 +# CONFIG_INPUT_PCIGAME is not set
6126 +# CONFIG_INPUT_CS461X is not set
6127 +# CONFIG_INPUT_EMU10K1 is not set
6128 +# CONFIG_INPUT_SERIO is not set
6129 +# CONFIG_INPUT_SERPORT is not set
6130 +
6131 +#
6132 +# Joysticks
6133 +#
6134 +# CONFIG_INPUT_ANALOG is not set
6135 +# CONFIG_INPUT_A3D is not set
6136 +# CONFIG_INPUT_ADI is not set
6137 +# CONFIG_INPUT_COBRA is not set
6138 +# CONFIG_INPUT_GF2K is not set
6139 +# CONFIG_INPUT_GRIP is not set
6140 +# CONFIG_INPUT_INTERACT is not set
6141 +# CONFIG_INPUT_TMDC is not set
6142 +# CONFIG_INPUT_SIDEWINDER is not set
6143 +# CONFIG_INPUT_IFORCE_USB is not set
6144 +# CONFIG_INPUT_IFORCE_232 is not set
6145 +# CONFIG_INPUT_WARRIOR is not set
6146 +# CONFIG_INPUT_MAGELLAN is not set
6147 +# CONFIG_INPUT_SPACEORB is not set
6148 +# CONFIG_INPUT_SPACEBALL is not set
6149 +# CONFIG_INPUT_STINGER is not set
6150 +# CONFIG_INPUT_DB9 is not set
6151 +# CONFIG_INPUT_GAMECON is not set
6152 +# CONFIG_INPUT_TURBOGRAFX is not set
6153 +# CONFIG_QIC02_TAPE is not set
6154 +# CONFIG_IPMI_HANDLER is not set
6155 +# CONFIG_IPMI_PANIC_EVENT is not set
6156 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
6157 +# CONFIG_IPMI_KCS is not set
6158 +# CONFIG_IPMI_WATCHDOG is not set
6159 +
6160 +#
6161 +# Watchdog Cards
6162 +#
6163 +# CONFIG_WATCHDOG is not set
6164 +# CONFIG_SCx200 is not set
6165 +# CONFIG_SCx200_GPIO is not set
6166 +# CONFIG_AMD_PM768 is not set
6167 +# CONFIG_NVRAM is not set
6168 +# CONFIG_RTC is not set
6169 +# CONFIG_DTLK is not set
6170 +# CONFIG_R3964 is not set
6171 +# CONFIG_APPLICOM is not set
6172 +
6173 +#
6174 +# Ftape, the floppy tape device driver
6175 +#
6176 +# CONFIG_FTAPE is not set
6177 +# CONFIG_AGP is not set
6178 +
6179 +#
6180 +# Direct Rendering Manager (XFree86 DRI support)
6181 +#
6182 +# CONFIG_DRM is not set
6183 +# CONFIG_AU1X00_GPIO is not set
6184 +# CONFIG_TS_AU1X00_ADS7846 is not set
6185 +
6186 +#
6187 +# File systems
6188 +#
6189 +# CONFIG_QUOTA is not set
6190 +# CONFIG_QFMT_V2 is not set
6191 +CONFIG_AUTOFS_FS=y
6192 +# CONFIG_AUTOFS4_FS is not set
6193 +# CONFIG_REISERFS_FS is not set
6194 +# CONFIG_REISERFS_CHECK is not set
6195 +# CONFIG_REISERFS_PROC_INFO is not set
6196 +# CONFIG_ADFS_FS is not set
6197 +# CONFIG_ADFS_FS_RW is not set
6198 +# CONFIG_AFFS_FS is not set
6199 +# CONFIG_HFS_FS is not set
6200 +# CONFIG_HFSPLUS_FS is not set
6201 +# CONFIG_BEFS_FS is not set
6202 +# CONFIG_BEFS_DEBUG is not set
6203 +# CONFIG_BFS_FS is not set
6204 +CONFIG_EXT3_FS=y
6205 +CONFIG_JBD=y
6206 +# CONFIG_JBD_DEBUG is not set
6207 +CONFIG_FAT_FS=y
6208 +CONFIG_MSDOS_FS=y
6209 +# CONFIG_UMSDOS_FS is not set
6210 +CONFIG_VFAT_FS=y
6211 +# CONFIG_EFS_FS is not set
6212 +# CONFIG_JFFS_FS is not set
6213 +# CONFIG_JFFS2_FS is not set
6214 +# CONFIG_CRAMFS is not set
6215 +# CONFIG_TMPFS is not set
6216 +CONFIG_RAMFS=y
6217 +# CONFIG_ISO9660_FS is not set
6218 +# CONFIG_JOLIET is not set
6219 +# CONFIG_ZISOFS is not set
6220 +# CONFIG_JFS_FS is not set
6221 +# CONFIG_JFS_DEBUG is not set
6222 +# CONFIG_JFS_STATISTICS is not set
6223 +# CONFIG_MINIX_FS is not set
6224 +# CONFIG_VXFS_FS is not set
6225 +# CONFIG_NTFS_FS is not set
6226 +# CONFIG_NTFS_RW is not set
6227 +# CONFIG_HPFS_FS is not set
6228 +CONFIG_PROC_FS=y
6229 +# CONFIG_DEVFS_FS is not set
6230 +# CONFIG_DEVFS_MOUNT is not set
6231 +# CONFIG_DEVFS_DEBUG is not set
6232 +CONFIG_DEVPTS_FS=y
6233 +# CONFIG_QNX4FS_FS is not set
6234 +# CONFIG_QNX4FS_RW is not set
6235 +# CONFIG_ROMFS_FS is not set
6236 +CONFIG_EXT2_FS=y
6237 +# CONFIG_SYSV_FS is not set
6238 +# CONFIG_UDF_FS is not set
6239 +# CONFIG_UDF_RW is not set
6240 +# CONFIG_UFS_FS is not set
6241 +# CONFIG_UFS_FS_WRITE is not set
6242 +# CONFIG_XFS_FS is not set
6243 +# CONFIG_XFS_QUOTA is not set
6244 +# CONFIG_XFS_RT is not set
6245 +# CONFIG_XFS_TRACE is not set
6246 +# CONFIG_XFS_DEBUG is not set
6247 +
6248 +#
6249 +# Network File Systems
6250 +#
6251 +# CONFIG_CODA_FS is not set
6252 +# CONFIG_INTERMEZZO_FS is not set
6253 +# CONFIG_NFS_FS is not set
6254 +# CONFIG_NFS_V3 is not set
6255 +# CONFIG_NFS_DIRECTIO is not set
6256 +# CONFIG_ROOT_NFS is not set
6257 +# CONFIG_NFSD is not set
6258 +# CONFIG_NFSD_V3 is not set
6259 +# CONFIG_NFSD_TCP is not set
6260 +# CONFIG_SUNRPC is not set
6261 +# CONFIG_LOCKD is not set
6262 +# CONFIG_SMB_FS is not set
6263 +# CONFIG_NCP_FS is not set
6264 +# CONFIG_NCPFS_PACKET_SIGNING is not set
6265 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
6266 +# CONFIG_NCPFS_STRONG is not set
6267 +# CONFIG_NCPFS_NFS_NS is not set
6268 +# CONFIG_NCPFS_OS2_NS is not set
6269 +# CONFIG_NCPFS_SMALLDOS is not set
6270 +# CONFIG_NCPFS_NLS is not set
6271 +# CONFIG_NCPFS_EXTRAS is not set
6272 +# CONFIG_ZISOFS_FS is not set
6273 +
6274 +#
6275 +# Partition Types
6276 +#
6277 +# CONFIG_PARTITION_ADVANCED is not set
6278 +CONFIG_MSDOS_PARTITION=y
6279 +# CONFIG_SMB_NLS is not set
6280 +CONFIG_NLS=y
6281 +
6282 +#
6283 +# Native Language Support
6284 +#
6285 +CONFIG_NLS_DEFAULT="iso8859-1"
6286 +# CONFIG_NLS_CODEPAGE_437 is not set
6287 +# CONFIG_NLS_CODEPAGE_737 is not set
6288 +# CONFIG_NLS_CODEPAGE_775 is not set
6289 +# CONFIG_NLS_CODEPAGE_850 is not set
6290 +# CONFIG_NLS_CODEPAGE_852 is not set
6291 +# CONFIG_NLS_CODEPAGE_855 is not set
6292 +# CONFIG_NLS_CODEPAGE_857 is not set
6293 +# CONFIG_NLS_CODEPAGE_860 is not set
6294 +# CONFIG_NLS_CODEPAGE_861 is not set
6295 +# CONFIG_NLS_CODEPAGE_862 is not set
6296 +# CONFIG_NLS_CODEPAGE_863 is not set
6297 +# CONFIG_NLS_CODEPAGE_864 is not set
6298 +# CONFIG_NLS_CODEPAGE_865 is not set
6299 +# CONFIG_NLS_CODEPAGE_866 is not set
6300 +# CONFIG_NLS_CODEPAGE_869 is not set
6301 +# CONFIG_NLS_CODEPAGE_936 is not set
6302 +# CONFIG_NLS_CODEPAGE_950 is not set
6303 +# CONFIG_NLS_CODEPAGE_932 is not set
6304 +# CONFIG_NLS_CODEPAGE_949 is not set
6305 +# CONFIG_NLS_CODEPAGE_874 is not set
6306 +# CONFIG_NLS_ISO8859_8 is not set
6307 +# CONFIG_NLS_CODEPAGE_1250 is not set
6308 +# CONFIG_NLS_CODEPAGE_1251 is not set
6309 +# CONFIG_NLS_ISO8859_1 is not set
6310 +# CONFIG_NLS_ISO8859_2 is not set
6311 +# CONFIG_NLS_ISO8859_3 is not set
6312 +# CONFIG_NLS_ISO8859_4 is not set
6313 +# CONFIG_NLS_ISO8859_5 is not set
6314 +# CONFIG_NLS_ISO8859_6 is not set
6315 +# CONFIG_NLS_ISO8859_7 is not set
6316 +# CONFIG_NLS_ISO8859_9 is not set
6317 +# CONFIG_NLS_ISO8859_13 is not set
6318 +# CONFIG_NLS_ISO8859_14 is not set
6319 +# CONFIG_NLS_ISO8859_15 is not set
6320 +# CONFIG_NLS_KOI8_R is not set
6321 +# CONFIG_NLS_KOI8_U is not set
6322 +# CONFIG_NLS_UTF8 is not set
6323 +
6324 +#
6325 +# Multimedia devices
6326 +#
6327 +# CONFIG_VIDEO_DEV is not set
6328 +
6329 +#
6330 +# Console drivers
6331 +#
6332 +# CONFIG_VGA_CONSOLE is not set
6333 +# CONFIG_MDA_CONSOLE is not set
6334 +
6335 +#
6336 +# Frame-buffer support
6337 +#
6338 +CONFIG_FB=y
6339 +CONFIG_DUMMY_CONSOLE=y
6340 +# CONFIG_FB_CYBER2000 is not set
6341 +# CONFIG_FB_VIRTUAL is not set
6342 +CONFIG_FBCON_ADVANCED=y
6343 +# CONFIG_FBCON_MFB is not set
6344 +# CONFIG_FBCON_CFB2 is not set
6345 +# CONFIG_FBCON_CFB4 is not set
6346 +# CONFIG_FBCON_CFB8 is not set
6347 +CONFIG_FBCON_CFB16=y
6348 +# CONFIG_FBCON_CFB24 is not set
6349 +# CONFIG_FBCON_CFB32 is not set
6350 +# CONFIG_FBCON_AFB is not set
6351 +# CONFIG_FBCON_ILBM is not set
6352 +# CONFIG_FBCON_IPLAN2P2 is not set
6353 +# CONFIG_FBCON_IPLAN2P4 is not set
6354 +# CONFIG_FBCON_IPLAN2P8 is not set
6355 +# CONFIG_FBCON_MAC is not set
6356 +# CONFIG_FBCON_VGA_PLANES is not set
6357 +# CONFIG_FBCON_VGA is not set
6358 +# CONFIG_FBCON_HGA is not set
6359 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
6360 +CONFIG_FBCON_FONTS=y
6361 +CONFIG_FONT_8x8=y
6362 +CONFIG_FONT_8x16=y
6363 +# CONFIG_FONT_SUN8x16 is not set
6364 +# CONFIG_FONT_SUN12x22 is not set
6365 +# CONFIG_FONT_6x11 is not set
6366 +# CONFIG_FONT_PEARL_8x8 is not set
6367 +# CONFIG_FONT_ACORN_8x8 is not set
6368 +
6369 +#
6370 +# Sound
6371 +#
6372 +CONFIG_SOUND=y
6373 +# CONFIG_SOUND_ALI5455 is not set
6374 +# CONFIG_SOUND_BT878 is not set
6375 +# CONFIG_SOUND_CMPCI is not set
6376 +# CONFIG_SOUND_EMU10K1 is not set
6377 +# CONFIG_MIDI_EMU10K1 is not set
6378 +# CONFIG_SOUND_FUSION is not set
6379 +# CONFIG_SOUND_CS4281 is not set
6380 +# CONFIG_SOUND_ES1370 is not set
6381 +# CONFIG_SOUND_ES1371 is not set
6382 +# CONFIG_SOUND_ESSSOLO1 is not set
6383 +# CONFIG_SOUND_MAESTRO is not set
6384 +# CONFIG_SOUND_MAESTRO3 is not set
6385 +# CONFIG_SOUND_FORTE is not set
6386 +# CONFIG_SOUND_ICH is not set
6387 +# CONFIG_SOUND_RME96XX is not set
6388 +# CONFIG_SOUND_SONICVIBES is not set
6389 +# CONFIG_SOUND_AU1X00 is not set
6390 +# CONFIG_SOUND_AU1550_PSC is not set
6391 +# CONFIG_SOUND_AU1550_I2S is not set
6392 +# CONFIG_SOUND_TRIDENT is not set
6393 +# CONFIG_SOUND_MSNDCLAS is not set
6394 +# CONFIG_SOUND_MSNDPIN is not set
6395 +# CONFIG_SOUND_VIA82CXXX is not set
6396 +# CONFIG_MIDI_VIA82CXXX is not set
6397 +# CONFIG_SOUND_OSS is not set
6398 +# CONFIG_SOUND_TVMIXER is not set
6399 +# CONFIG_SOUND_AD1980 is not set
6400 +# CONFIG_SOUND_WM97XX is not set
6401 +
6402 +#
6403 +# USB support
6404 +#
6405 +# CONFIG_USB is not set
6406 +
6407 +#
6408 +# Support for USB gadgets
6409 +#
6410 +# CONFIG_USB_GADGET is not set
6411 +
6412 +#
6413 +# Bluetooth support
6414 +#
6415 +# CONFIG_BLUEZ is not set
6416 +
6417 +#
6418 +# Kernel hacking
6419 +#
6420 +CONFIG_CROSSCOMPILE=y
6421 +# CONFIG_RUNTIME_DEBUG is not set
6422 +# CONFIG_KGDB is not set
6423 +# CONFIG_GDB_CONSOLE is not set
6424 +# CONFIG_DEBUG_INFO is not set
6425 +# CONFIG_MAGIC_SYSRQ is not set
6426 +# CONFIG_MIPS_UNCACHED is not set
6427 +CONFIG_LOG_BUF_SHIFT=0
6428 +
6429 +#
6430 +# Cryptographic options
6431 +#
6432 +# CONFIG_CRYPTO is not set
6433 +
6434 +#
6435 +# Library routines
6436 +#
6437 +# CONFIG_CRC32 is not set
6438 +CONFIG_ZLIB_INFLATE=m
6439 +CONFIG_ZLIB_DEFLATE=m
6440 diff -Nur linux-2.4.29/arch/mips/defconfig-hp-lj linux-mips/arch/mips/defconfig-hp-lj
6441 --- linux-2.4.29/arch/mips/defconfig-hp-lj 2005-01-19 15:09:28.000000000 +0100
6442 +++ linux-mips/arch/mips/defconfig-hp-lj 2005-01-09 20:33:59.000000000 +0100
6443 @@ -304,11 +304,6 @@
6444 #
6445 # CONFIG_IPX is not set
6446 # CONFIG_ATALK is not set
6447 -
6448 -#
6449 -# Appletalk devices
6450 -#
6451 -# CONFIG_DEV_APPLETALK is not set
6452 # CONFIG_DECNET is not set
6453 # CONFIG_BRIDGE is not set
6454 # CONFIG_X25 is not set
6455 diff -Nur linux-2.4.29/arch/mips/defconfig-hydrogen3 linux-mips/arch/mips/defconfig-hydrogen3
6456 --- linux-2.4.29/arch/mips/defconfig-hydrogen3 2005-01-19 15:09:28.000000000 +0100
6457 +++ linux-mips/arch/mips/defconfig-hydrogen3 2005-01-31 12:59:29.000000000 +0100
6458 @@ -22,6 +22,7 @@
6459 #
6460 # CONFIG_ACER_PICA_61 is not set
6461 # CONFIG_MIPS_BOSPORUS is not set
6462 +# CONFIG_MIPS_FICMMP is not set
6463 # CONFIG_MIPS_MIRAGE is not set
6464 # CONFIG_MIPS_DB1000 is not set
6465 # CONFIG_MIPS_DB1100 is not set
6466 @@ -30,9 +31,11 @@
6467 # CONFIG_MIPS_PB1000 is not set
6468 # CONFIG_MIPS_PB1100 is not set
6469 # CONFIG_MIPS_PB1500 is not set
6470 -CONFIG_MIPS_HYDROGEN3=y
6471 # CONFIG_MIPS_PB1550 is not set
6472 +# CONFIG_MIPS_PB1200 is not set
6473 +CONFIG_MIPS_HYDROGEN3=y
6474 # CONFIG_MIPS_XXS1500 is not set
6475 +# CONFIG_MIPS_EP1000 is not set
6476 # CONFIG_MIPS_MTX1 is not set
6477 # CONFIG_COGENT_CSB250 is not set
6478 # CONFIG_BAGET_MIPS is not set
6479 @@ -185,6 +188,7 @@
6480 CONFIG_MTD_BLOCK=y
6481 # CONFIG_FTL is not set
6482 # CONFIG_NFTL is not set
6483 +# CONFIG_INFTL is not set
6484
6485 #
6486 # RAM/ROM/Flash chip drivers
6487 @@ -196,6 +200,7 @@
6488 # CONFIG_MTD_CFI_INTELEXT is not set
6489 CONFIG_MTD_CFI_AMDSTD=y
6490 # CONFIG_MTD_CFI_STAA is not set
6491 +CONFIG_MTD_CFI_UTIL=y
6492 # CONFIG_MTD_RAM is not set
6493 # CONFIG_MTD_ROM is not set
6494 # CONFIG_MTD_ABSENT is not set
6495 @@ -207,17 +212,12 @@
6496 #
6497 # Mapping drivers for chip access
6498 #
6499 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
6500 # CONFIG_MTD_PHYSMAP is not set
6501 -# CONFIG_MTD_PB1000 is not set
6502 -# CONFIG_MTD_PB1500 is not set
6503 -# CONFIG_MTD_PB1100 is not set
6504 -# CONFIG_MTD_BOSPORUS is not set
6505 -# CONFIG_MTD_XXS1500 is not set
6506 -# CONFIG_MTD_MTX1 is not set
6507 -# CONFIG_MTD_DB1X00 is not set
6508 # CONFIG_MTD_PB1550 is not set
6509 -CONFIG_MTD_HYDROGEN3=y
6510 -# CONFIG_MTD_MIRAGE is not set
6511 +# CONFIG_MTD_DB1550 is not set
6512 +# CONFIG_MTD_PB1200 is not set
6513 +# CONFIG_MTD_XXS1500 is not set
6514 # CONFIG_MTD_CSTM_MIPS_IXX is not set
6515 # CONFIG_MTD_OCELOT is not set
6516 # CONFIG_MTD_LASAT is not set
6517 @@ -235,9 +235,9 @@
6518 #
6519 # Disk-On-Chip Device Drivers
6520 #
6521 -# CONFIG_MTD_DOC1000 is not set
6522 # CONFIG_MTD_DOC2000 is not set
6523 # CONFIG_MTD_DOC2001 is not set
6524 +# CONFIG_MTD_DOC2001PLUS is not set
6525 # CONFIG_MTD_DOCPROBE is not set
6526
6527 #
6528 @@ -340,11 +340,6 @@
6529 #
6530 # CONFIG_IPX is not set
6531 # CONFIG_ATALK is not set
6532 -
6533 -#
6534 -# Appletalk devices
6535 -#
6536 -# CONFIG_DEV_APPLETALK is not set
6537 # CONFIG_DECNET is not set
6538 # CONFIG_BRIDGE is not set
6539 # CONFIG_X25 is not set
6540 @@ -386,6 +381,7 @@
6541 #
6542 # Please see Documentation/ide.txt for help/info on IDE drives
6543 #
6544 +# CONFIG_BLK_DEV_IDE_AU1XXX is not set
6545 # CONFIG_BLK_DEV_HD_IDE is not set
6546 # CONFIG_BLK_DEV_HD is not set
6547 # CONFIG_BLK_DEV_IDE_SATA is not set
6548 @@ -403,6 +399,7 @@
6549 #
6550 # IDE chipset support/bugfixes
6551 #
6552 +# CONFIG_BLK_DEV_IDE_AU1XXX is not set
6553 # CONFIG_BLK_DEV_CMD640 is not set
6554 # CONFIG_BLK_DEV_CMD640_ENHANCED is not set
6555 # CONFIG_BLK_DEV_ISAPNP is not set
6556 @@ -590,7 +587,6 @@
6557 # CONFIG_AU1X00_USB_TTY is not set
6558 # CONFIG_AU1X00_USB_RAW is not set
6559 # CONFIG_TXX927_SERIAL is not set
6560 -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
6561 CONFIG_UNIX98_PTYS=y
6562 CONFIG_UNIX98_PTY_COUNT=256
6563
6564 @@ -677,6 +673,12 @@
6565 # CONFIG_SYNCLINK_CS is not set
6566 # CONFIG_AU1X00_GPIO is not set
6567 # CONFIG_TS_AU1X00_ADS7846 is not set
6568 +# CONFIG_AU1550_PSC_SPI is not set
6569 +# CONFIG_AU1XXX_MAE is not set
6570 +# CONFIG_AU1XXX_AES is not set
6571 +# CONFIG_AU1XXX_CIM is not set
6572 +# CONFIG_AU1XXX_AES_TEST is not set
6573 +CONFIG_AU1XXX_BUTTONS=y
6574
6575 #
6576 # File systems
6577 @@ -838,18 +840,20 @@
6578 # CONFIG_FB_PM2 is not set
6579 # CONFIG_FB_PM3 is not set
6580 # CONFIG_FB_CYBER2000 is not set
6581 +CONFIG_FB_AU1100=y
6582 +# CONFIG_FOCUS_ENHANCEMENTS is not set
6583 # CONFIG_FB_MATROX is not set
6584 # CONFIG_FB_ATY is not set
6585 # CONFIG_FB_RADEON is not set
6586 # CONFIG_FB_ATY128 is not set
6587 # CONFIG_FB_INTEL is not set
6588 # CONFIG_FB_SIS is not set
6589 +# CONFIG_FB_SMI501 is not set
6590 # CONFIG_FB_NEOMAGIC is not set
6591 # CONFIG_FB_3DFX is not set
6592 # CONFIG_FB_VOODOO1 is not set
6593 # CONFIG_FB_TRIDENT is not set
6594 # CONFIG_FB_E1356 is not set
6595 -CONFIG_FB_AU1100=y
6596 # CONFIG_FB_IT8181 is not set
6597 # CONFIG_FB_VIRTUAL is not set
6598 CONFIG_FBCON_ADVANCED=y
6599 @@ -923,9 +927,11 @@
6600 # USB Host Controller Drivers
6601 #
6602 # CONFIG_USB_EHCI_HCD is not set
6603 +# CONFIG_USB_NON_PCI_EHCI is not set
6604 # CONFIG_USB_UHCI is not set
6605 # CONFIG_USB_UHCI_ALT is not set
6606 CONFIG_USB_OHCI=y
6607 +CONFIG_USB_NON_PCI_OHCI=y
6608
6609 #
6610 # USB Device Class drivers
6611 diff -Nur linux-2.4.29/arch/mips/defconfig-ip22 linux-mips/arch/mips/defconfig-ip22
6612 --- linux-2.4.29/arch/mips/defconfig-ip22 2005-01-19 15:09:28.000000000 +0100
6613 +++ linux-mips/arch/mips/defconfig-ip22 2005-01-09 20:33:59.000000000 +0100
6614 @@ -235,11 +235,6 @@
6615 #
6616 # CONFIG_IPX is not set
6617 # CONFIG_ATALK is not set
6618 -
6619 -#
6620 -# Appletalk devices
6621 -#
6622 -# CONFIG_DEV_APPLETALK is not set
6623 # CONFIG_DECNET is not set
6624 # CONFIG_BRIDGE is not set
6625 # CONFIG_X25 is not set
6626 @@ -319,6 +314,7 @@
6627 # CONFIG_SCSI_MEGARAID is not set
6628 # CONFIG_SCSI_MEGARAID2 is not set
6629 # CONFIG_SCSI_SATA is not set
6630 +# CONFIG_SCSI_SATA_AHCI is not set
6631 # CONFIG_SCSI_SATA_SVW is not set
6632 # CONFIG_SCSI_ATA_PIIX is not set
6633 # CONFIG_SCSI_SATA_NV is not set
6634 diff -Nur linux-2.4.29/arch/mips/defconfig-it8172 linux-mips/arch/mips/defconfig-it8172
6635 --- linux-2.4.29/arch/mips/defconfig-it8172 2005-01-19 15:09:28.000000000 +0100
6636 +++ linux-mips/arch/mips/defconfig-it8172 2005-01-09 20:33:59.000000000 +0100
6637 @@ -304,11 +304,6 @@
6638 #
6639 # CONFIG_IPX is not set
6640 # CONFIG_ATALK is not set
6641 -
6642 -#
6643 -# Appletalk devices
6644 -#
6645 -# CONFIG_DEV_APPLETALK is not set
6646 # CONFIG_DECNET is not set
6647 # CONFIG_BRIDGE is not set
6648 # CONFIG_X25 is not set
6649 diff -Nur linux-2.4.29/arch/mips/defconfig-ivr linux-mips/arch/mips/defconfig-ivr
6650 --- linux-2.4.29/arch/mips/defconfig-ivr 2005-01-19 15:09:28.000000000 +0100
6651 +++ linux-mips/arch/mips/defconfig-ivr 2005-01-09 20:33:59.000000000 +0100
6652 @@ -226,11 +226,6 @@
6653 #
6654 # CONFIG_IPX is not set
6655 # CONFIG_ATALK is not set
6656 -
6657 -#
6658 -# Appletalk devices
6659 -#
6660 -# CONFIG_DEV_APPLETALK is not set
6661 # CONFIG_DECNET is not set
6662 # CONFIG_BRIDGE is not set
6663 # CONFIG_X25 is not set
6664 diff -Nur linux-2.4.29/arch/mips/defconfig-jmr3927 linux-mips/arch/mips/defconfig-jmr3927
6665 --- linux-2.4.29/arch/mips/defconfig-jmr3927 2005-01-19 15:09:28.000000000 +0100
6666 +++ linux-mips/arch/mips/defconfig-jmr3927 2005-01-09 20:33:59.000000000 +0100
6667 @@ -225,11 +225,6 @@
6668 #
6669 # CONFIG_IPX is not set
6670 # CONFIG_ATALK is not set
6671 -
6672 -#
6673 -# Appletalk devices
6674 -#
6675 -# CONFIG_DEV_APPLETALK is not set
6676 # CONFIG_DECNET is not set
6677 # CONFIG_BRIDGE is not set
6678 # CONFIG_X25 is not set
6679 diff -Nur linux-2.4.29/arch/mips/defconfig-lasat linux-mips/arch/mips/defconfig-lasat
6680 --- linux-2.4.29/arch/mips/defconfig-lasat 2005-01-19 15:09:28.000000000 +0100
6681 +++ linux-mips/arch/mips/defconfig-lasat 2005-01-09 20:33:59.000000000 +0100
6682 @@ -303,11 +303,6 @@
6683 #
6684 # CONFIG_IPX is not set
6685 # CONFIG_ATALK is not set
6686 -
6687 -#
6688 -# Appletalk devices
6689 -#
6690 -# CONFIG_DEV_APPLETALK is not set
6691 # CONFIG_DECNET is not set
6692 # CONFIG_BRIDGE is not set
6693 # CONFIG_X25 is not set
6694 diff -Nur linux-2.4.29/arch/mips/defconfig-malta linux-mips/arch/mips/defconfig-malta
6695 --- linux-2.4.29/arch/mips/defconfig-malta 2005-01-19 15:09:28.000000000 +0100
6696 +++ linux-mips/arch/mips/defconfig-malta 2005-01-09 20:33:59.000000000 +0100
6697 @@ -237,11 +237,6 @@
6698 #
6699 # CONFIG_IPX is not set
6700 # CONFIG_ATALK is not set
6701 -
6702 -#
6703 -# Appletalk devices
6704 -#
6705 -# CONFIG_DEV_APPLETALK is not set
6706 # CONFIG_DECNET is not set
6707 # CONFIG_BRIDGE is not set
6708 # CONFIG_X25 is not set
6709 @@ -319,6 +314,7 @@
6710 # CONFIG_SCSI_MEGARAID is not set
6711 # CONFIG_SCSI_MEGARAID2 is not set
6712 # CONFIG_SCSI_SATA is not set
6713 +# CONFIG_SCSI_SATA_AHCI is not set
6714 # CONFIG_SCSI_SATA_SVW is not set
6715 # CONFIG_SCSI_ATA_PIIX is not set
6716 # CONFIG_SCSI_SATA_NV is not set
6717 diff -Nur linux-2.4.29/arch/mips/defconfig-mirage linux-mips/arch/mips/defconfig-mirage
6718 --- linux-2.4.29/arch/mips/defconfig-mirage 2005-01-19 15:09:28.000000000 +0100
6719 +++ linux-mips/arch/mips/defconfig-mirage 2005-01-31 12:59:29.000000000 +0100
6720 @@ -335,11 +335,6 @@
6721 #
6722 # CONFIG_IPX is not set
6723 # CONFIG_ATALK is not set
6724 -
6725 -#
6726 -# Appletalk devices
6727 -#
6728 -# CONFIG_DEV_APPLETALK is not set
6729 # CONFIG_DECNET is not set
6730 # CONFIG_BRIDGE is not set
6731 # CONFIG_X25 is not set
6732 @@ -863,7 +858,7 @@
6733 # CONFIG_USB_UHCI is not set
6734 # CONFIG_USB_UHCI_ALT is not set
6735 CONFIG_USB_OHCI=y
6736 -
6737 +CONFIG_USB_NON_PCI_OHCI=y
6738 #
6739 # USB Device Class drivers
6740 #
6741 diff -Nur linux-2.4.29/arch/mips/defconfig-mpc30x linux-mips/arch/mips/defconfig-mpc30x
6742 --- linux-2.4.29/arch/mips/defconfig-mpc30x 2005-01-19 15:09:28.000000000 +0100
6743 +++ linux-mips/arch/mips/defconfig-mpc30x 2005-01-09 20:33:59.000000000 +0100
6744 @@ -228,11 +228,6 @@
6745 #
6746 # CONFIG_IPX is not set
6747 # CONFIG_ATALK is not set
6748 -
6749 -#
6750 -# Appletalk devices
6751 -#
6752 -# CONFIG_DEV_APPLETALK is not set
6753 # CONFIG_DECNET is not set
6754 # CONFIG_BRIDGE is not set
6755 # CONFIG_X25 is not set
6756 diff -Nur linux-2.4.29/arch/mips/defconfig-mtx-1 linux-mips/arch/mips/defconfig-mtx-1
6757 --- linux-2.4.29/arch/mips/defconfig-mtx-1 2005-01-19 15:09:28.000000000 +0100
6758 +++ linux-mips/arch/mips/defconfig-mtx-1 2005-01-20 03:19:22.000000000 +0100
6759 @@ -371,11 +371,6 @@
6760 #
6761 # CONFIG_IPX is not set
6762 # CONFIG_ATALK is not set
6763 -
6764 -#
6765 -# Appletalk devices
6766 -#
6767 -# CONFIG_DEV_APPLETALK is not set
6768 # CONFIG_DECNET is not set
6769 CONFIG_BRIDGE=m
6770 # CONFIG_X25 is not set
6771 @@ -479,6 +474,7 @@
6772 # CONFIG_SCSI_MEGARAID is not set
6773 # CONFIG_SCSI_MEGARAID2 is not set
6774 # CONFIG_SCSI_SATA is not set
6775 +# CONFIG_SCSI_SATA_AHCI is not set
6776 # CONFIG_SCSI_SATA_SVW is not set
6777 # CONFIG_SCSI_ATA_PIIX is not set
6778 # CONFIG_SCSI_SATA_NV is not set
6779 diff -Nur linux-2.4.29/arch/mips/defconfig-nino linux-mips/arch/mips/defconfig-nino
6780 --- linux-2.4.29/arch/mips/defconfig-nino 2005-01-19 15:09:28.000000000 +0100
6781 +++ linux-mips/arch/mips/defconfig-nino 2005-01-09 20:33:59.000000000 +0100
6782 @@ -226,11 +226,6 @@
6783 #
6784 # CONFIG_IPX is not set
6785 # CONFIG_ATALK is not set
6786 -
6787 -#
6788 -# Appletalk devices
6789 -#
6790 -# CONFIG_DEV_APPLETALK is not set
6791 # CONFIG_DECNET is not set
6792 # CONFIG_BRIDGE is not set
6793 # CONFIG_X25 is not set
6794 diff -Nur linux-2.4.29/arch/mips/defconfig-ocelot linux-mips/arch/mips/defconfig-ocelot
6795 --- linux-2.4.29/arch/mips/defconfig-ocelot 2005-01-19 15:09:28.000000000 +0100
6796 +++ linux-mips/arch/mips/defconfig-ocelot 2005-01-09 20:33:59.000000000 +0100
6797 @@ -307,11 +307,6 @@
6798 #
6799 # CONFIG_IPX is not set
6800 # CONFIG_ATALK is not set
6801 -
6802 -#
6803 -# Appletalk devices
6804 -#
6805 -# CONFIG_DEV_APPLETALK is not set
6806 # CONFIG_DECNET is not set
6807 # CONFIG_BRIDGE is not set
6808 # CONFIG_X25 is not set
6809 diff -Nur linux-2.4.29/arch/mips/defconfig-osprey linux-mips/arch/mips/defconfig-osprey
6810 --- linux-2.4.29/arch/mips/defconfig-osprey 2005-01-19 15:09:28.000000000 +0100
6811 +++ linux-mips/arch/mips/defconfig-osprey 2005-01-09 20:33:59.000000000 +0100
6812 @@ -227,11 +227,6 @@
6813 #
6814 # CONFIG_IPX is not set
6815 # CONFIG_ATALK is not set
6816 -
6817 -#
6818 -# Appletalk devices
6819 -#
6820 -# CONFIG_DEV_APPLETALK is not set
6821 # CONFIG_DECNET is not set
6822 # CONFIG_BRIDGE is not set
6823 # CONFIG_X25 is not set
6824 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1000 linux-mips/arch/mips/defconfig-pb1000
6825 --- linux-2.4.29/arch/mips/defconfig-pb1000 2005-01-19 15:09:28.000000000 +0100
6826 +++ linux-mips/arch/mips/defconfig-pb1000 2005-02-12 04:05:27.000000000 +0100
6827 @@ -22,16 +22,19 @@
6828 #
6829 # CONFIG_ACER_PICA_61 is not set
6830 # CONFIG_MIPS_BOSPORUS is not set
6831 +# CONFIG_MIPS_FICMMP is not set
6832 # CONFIG_MIPS_MIRAGE is not set
6833 # CONFIG_MIPS_DB1000 is not set
6834 # CONFIG_MIPS_DB1100 is not set
6835 # CONFIG_MIPS_DB1500 is not set
6836 # CONFIG_MIPS_DB1550 is not set
6837 +# CONFIG_MIPS_DB1200 is not set
6838 CONFIG_MIPS_PB1000=y
6839 # CONFIG_MIPS_PB1100 is not set
6840 # CONFIG_MIPS_PB1500 is not set
6841 -# CONFIG_MIPS_HYDROGEN3 is not set
6842 # CONFIG_MIPS_PB1550 is not set
6843 +# CONFIG_MIPS_PB1200 is not set
6844 +# CONFIG_MIPS_HYDROGEN3 is not set
6845 # CONFIG_MIPS_XXS1500 is not set
6846 # CONFIG_MIPS_MTX1 is not set
6847 # CONFIG_COGENT_CSB250 is not set
6848 @@ -324,11 +327,6 @@
6849 #
6850 # CONFIG_IPX is not set
6851 # CONFIG_ATALK is not set
6852 -
6853 -#
6854 -# Appletalk devices
6855 -#
6856 -# CONFIG_DEV_APPLETALK is not set
6857 # CONFIG_DECNET is not set
6858 # CONFIG_BRIDGE is not set
6859 # CONFIG_X25 is not set
6860 @@ -707,7 +705,7 @@
6861 #
6862 # CONFIG_PCMCIA_SERIAL_CS is not set
6863 # CONFIG_SYNCLINK_CS is not set
6864 -CONFIG_AU1X00_GPIO=m
6865 +CONFIG_AU1X00_GPIO=y
6866 # CONFIG_TS_AU1X00_ADS7846 is not set
6867
6868 #
6869 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1100 linux-mips/arch/mips/defconfig-pb1100
6870 --- linux-2.4.29/arch/mips/defconfig-pb1100 2005-01-19 15:09:28.000000000 +0100
6871 +++ linux-mips/arch/mips/defconfig-pb1100 2005-02-12 04:05:28.000000000 +0100
6872 @@ -22,16 +22,19 @@
6873 #
6874 # CONFIG_ACER_PICA_61 is not set
6875 # CONFIG_MIPS_BOSPORUS is not set
6876 +# CONFIG_MIPS_FICMMP is not set
6877 # CONFIG_MIPS_MIRAGE is not set
6878 # CONFIG_MIPS_DB1000 is not set
6879 # CONFIG_MIPS_DB1100 is not set
6880 # CONFIG_MIPS_DB1500 is not set
6881 # CONFIG_MIPS_DB1550 is not set
6882 +# CONFIG_MIPS_DB1200 is not set
6883 # CONFIG_MIPS_PB1000 is not set
6884 CONFIG_MIPS_PB1100=y
6885 # CONFIG_MIPS_PB1500 is not set
6886 -# CONFIG_MIPS_HYDROGEN3 is not set
6887 # CONFIG_MIPS_PB1550 is not set
6888 +# CONFIG_MIPS_PB1200 is not set
6889 +# CONFIG_MIPS_HYDROGEN3 is not set
6890 # CONFIG_MIPS_XXS1500 is not set
6891 # CONFIG_MIPS_MTX1 is not set
6892 # CONFIG_COGENT_CSB250 is not set
6893 @@ -324,11 +327,6 @@
6894 #
6895 # CONFIG_IPX is not set
6896 # CONFIG_ATALK is not set
6897 -
6898 -#
6899 -# Appletalk devices
6900 -#
6901 -# CONFIG_DEV_APPLETALK is not set
6902 # CONFIG_DECNET is not set
6903 # CONFIG_BRIDGE is not set
6904 # CONFIG_X25 is not set
6905 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1200 linux-mips/arch/mips/defconfig-pb1200
6906 --- linux-2.4.29/arch/mips/defconfig-pb1200 1970-01-01 01:00:00.000000000 +0100
6907 +++ linux-mips/arch/mips/defconfig-pb1200 2005-01-30 09:01:27.000000000 +0100
6908 @@ -0,0 +1,1063 @@
6909 +#
6910 +# Automatically generated make config: don't edit
6911 +#
6912 +CONFIG_MIPS=y
6913 +CONFIG_MIPS32=y
6914 +# CONFIG_MIPS64 is not set
6915 +
6916 +#
6917 +# Code maturity level options
6918 +#
6919 +CONFIG_EXPERIMENTAL=y
6920 +
6921 +#
6922 +# Loadable module support
6923 +#
6924 +CONFIG_MODULES=y
6925 +# CONFIG_MODVERSIONS is not set
6926 +CONFIG_KMOD=y
6927 +
6928 +#
6929 +# Machine selection
6930 +#
6931 +# CONFIG_ACER_PICA_61 is not set
6932 +# CONFIG_MIPS_BOSPORUS is not set
6933 +# CONFIG_MIPS_FICMMP is not set
6934 +# CONFIG_MIPS_MIRAGE is not set
6935 +# CONFIG_MIPS_DB1000 is not set
6936 +# CONFIG_MIPS_DB1100 is not set
6937 +# CONFIG_MIPS_DB1500 is not set
6938 +# CONFIG_MIPS_DB1550 is not set
6939 +# CONFIG_MIPS_DB1200 is not set
6940 +# CONFIG_MIPS_PB1000 is not set
6941 +# CONFIG_MIPS_PB1100 is not set
6942 +# CONFIG_MIPS_PB1500 is not set
6943 +# CONFIG_MIPS_PB1550 is not set
6944 +CONFIG_MIPS_PB1200=y
6945 +# CONFIG_MIPS_HYDROGEN3 is not set
6946 +# CONFIG_MIPS_XXS1500 is not set
6947 +# CONFIG_MIPS_MTX1 is not set
6948 +# CONFIG_COGENT_CSB250 is not set
6949 +# CONFIG_BAGET_MIPS is not set
6950 +# CONFIG_CASIO_E55 is not set
6951 +# CONFIG_MIPS_COBALT is not set
6952 +# CONFIG_DECSTATION is not set
6953 +# CONFIG_MIPS_EV64120 is not set
6954 +# CONFIG_MIPS_EV96100 is not set
6955 +# CONFIG_MIPS_IVR is not set
6956 +# CONFIG_HP_LASERJET is not set
6957 +# CONFIG_IBM_WORKPAD is not set
6958 +# CONFIG_LASAT is not set
6959 +# CONFIG_MIPS_ITE8172 is not set
6960 +# CONFIG_MIPS_ATLAS is not set
6961 +# CONFIG_MIPS_MAGNUM_4000 is not set
6962 +# CONFIG_MIPS_MALTA is not set
6963 +# CONFIG_MIPS_SEAD is not set
6964 +# CONFIG_MOMENCO_OCELOT is not set
6965 +# CONFIG_MOMENCO_OCELOT_G is not set
6966 +# CONFIG_MOMENCO_OCELOT_C is not set
6967 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
6968 +# CONFIG_PMC_BIG_SUR is not set
6969 +# CONFIG_PMC_STRETCH is not set
6970 +# CONFIG_PMC_YOSEMITE is not set
6971 +# CONFIG_DDB5074 is not set
6972 +# CONFIG_DDB5476 is not set
6973 +# CONFIG_DDB5477 is not set
6974 +# CONFIG_NEC_OSPREY is not set
6975 +# CONFIG_NEC_EAGLE is not set
6976 +# CONFIG_OLIVETTI_M700 is not set
6977 +# CONFIG_NINO is not set
6978 +# CONFIG_SGI_IP22 is not set
6979 +# CONFIG_SGI_IP27 is not set
6980 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
6981 +# CONFIG_SNI_RM200_PCI is not set
6982 +# CONFIG_TANBAC_TB0226 is not set
6983 +# CONFIG_TANBAC_TB0229 is not set
6984 +# CONFIG_TOSHIBA_JMR3927 is not set
6985 +# CONFIG_TOSHIBA_RBTX4927 is not set
6986 +# CONFIG_VICTOR_MPC30X is not set
6987 +# CONFIG_ZAO_CAPCELLA is not set
6988 +# CONFIG_HIGHMEM is not set
6989 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
6990 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
6991 +CONFIG_SOC_AU1X00=y
6992 +CONFIG_SOC_AU1200=y
6993 +CONFIG_NONCOHERENT_IO=y
6994 +CONFIG_PC_KEYB=y
6995 +# CONFIG_MIPS_AU1000 is not set
6996 +
6997 +#
6998 +# CPU selection
6999 +#
7000 +CONFIG_CPU_MIPS32=y
7001 +# CONFIG_CPU_MIPS64 is not set
7002 +# CONFIG_CPU_R3000 is not set
7003 +# CONFIG_CPU_TX39XX is not set
7004 +# CONFIG_CPU_VR41XX is not set
7005 +# CONFIG_CPU_R4300 is not set
7006 +# CONFIG_CPU_R4X00 is not set
7007 +# CONFIG_CPU_TX49XX is not set
7008 +# CONFIG_CPU_R5000 is not set
7009 +# CONFIG_CPU_R5432 is not set
7010 +# CONFIG_CPU_R6000 is not set
7011 +# CONFIG_CPU_NEVADA is not set
7012 +# CONFIG_CPU_R8000 is not set
7013 +# CONFIG_CPU_R10000 is not set
7014 +# CONFIG_CPU_RM7000 is not set
7015 +# CONFIG_CPU_RM9000 is not set
7016 +# CONFIG_CPU_SB1 is not set
7017 +CONFIG_PAGE_SIZE_4KB=y
7018 +# CONFIG_PAGE_SIZE_16KB is not set
7019 +# CONFIG_PAGE_SIZE_64KB is not set
7020 +CONFIG_CPU_HAS_PREFETCH=y
7021 +# CONFIG_VTAG_ICACHE is not set
7022 +CONFIG_64BIT_PHYS_ADDR=y
7023 +# CONFIG_CPU_ADVANCED is not set
7024 +CONFIG_CPU_HAS_LLSC=y
7025 +# CONFIG_CPU_HAS_LLDSCD is not set
7026 +# CONFIG_CPU_HAS_WB is not set
7027 +CONFIG_CPU_HAS_SYNC=y
7028 +
7029 +#
7030 +# General setup
7031 +#
7032 +CONFIG_CPU_LITTLE_ENDIAN=y
7033 +# CONFIG_BUILD_ELF64 is not set
7034 +CONFIG_NET=y
7035 +CONFIG_PCI=y
7036 +CONFIG_PCI_NEW=y
7037 +CONFIG_PCI_AUTO=y
7038 +# CONFIG_PCI_NAMES is not set
7039 +# CONFIG_ISA is not set
7040 +# CONFIG_TC is not set
7041 +# CONFIG_MCA is not set
7042 +# CONFIG_SBUS is not set
7043 +CONFIG_HOTPLUG=y
7044 +
7045 +#
7046 +# PCMCIA/CardBus support
7047 +#
7048 +CONFIG_PCMCIA=m
7049 +# CONFIG_CARDBUS is not set
7050 +# CONFIG_TCIC is not set
7051 +# CONFIG_I82092 is not set
7052 +# CONFIG_I82365 is not set
7053 +CONFIG_PCMCIA_AU1X00=m
7054 +
7055 +#
7056 +# PCI Hotplug Support
7057 +#
7058 +# CONFIG_HOTPLUG_PCI is not set
7059 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
7060 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
7061 +# CONFIG_HOTPLUG_PCI_SHPC is not set
7062 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
7063 +# CONFIG_HOTPLUG_PCI_PCIE is not set
7064 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
7065 +CONFIG_SYSVIPC=y
7066 +# CONFIG_BSD_PROCESS_ACCT is not set
7067 +CONFIG_SYSCTL=y
7068 +CONFIG_KCORE_ELF=y
7069 +# CONFIG_KCORE_AOUT is not set
7070 +# CONFIG_BINFMT_AOUT is not set
7071 +CONFIG_BINFMT_ELF=y
7072 +# CONFIG_MIPS32_COMPAT is not set
7073 +# CONFIG_MIPS32_O32 is not set
7074 +# CONFIG_MIPS32_N32 is not set
7075 +# CONFIG_BINFMT_ELF32 is not set
7076 +# CONFIG_BINFMT_MISC is not set
7077 +# CONFIG_OOM_KILLER is not set
7078 +CONFIG_CMDLINE_BOOL=y
7079 +CONFIG_CMDLINE="mem=96M"
7080 +# CONFIG_PM is not set
7081 +
7082 +#
7083 +# Memory Technology Devices (MTD)
7084 +#
7085 +# CONFIG_MTD is not set
7086 +
7087 +#
7088 +# Parallel port support
7089 +#
7090 +# CONFIG_PARPORT is not set
7091 +
7092 +#
7093 +# Plug and Play configuration
7094 +#
7095 +# CONFIG_PNP is not set
7096 +# CONFIG_ISAPNP is not set
7097 +
7098 +#
7099 +# Block devices
7100 +#
7101 +# CONFIG_BLK_DEV_FD is not set
7102 +# CONFIG_BLK_DEV_XD is not set
7103 +# CONFIG_PARIDE is not set
7104 +# CONFIG_BLK_CPQ_DA is not set
7105 +# CONFIG_BLK_CPQ_CISS_DA is not set
7106 +# CONFIG_CISS_SCSI_TAPE is not set
7107 +# CONFIG_CISS_MONITOR_THREAD is not set
7108 +# CONFIG_BLK_DEV_DAC960 is not set
7109 +# CONFIG_BLK_DEV_UMEM is not set
7110 +# CONFIG_BLK_DEV_SX8 is not set
7111 +CONFIG_BLK_DEV_LOOP=y
7112 +# CONFIG_BLK_DEV_NBD is not set
7113 +# CONFIG_BLK_DEV_RAM is not set
7114 +# CONFIG_BLK_DEV_INITRD is not set
7115 +# CONFIG_BLK_STATS is not set
7116 +
7117 +#
7118 +# Multi-device support (RAID and LVM)
7119 +#
7120 +# CONFIG_MD is not set
7121 +# CONFIG_BLK_DEV_MD is not set
7122 +# CONFIG_MD_LINEAR is not set
7123 +# CONFIG_MD_RAID0 is not set
7124 +# CONFIG_MD_RAID1 is not set
7125 +# CONFIG_MD_RAID5 is not set
7126 +# CONFIG_MD_MULTIPATH is not set
7127 +# CONFIG_BLK_DEV_LVM is not set
7128 +
7129 +#
7130 +# Networking options
7131 +#
7132 +CONFIG_PACKET=y
7133 +# CONFIG_PACKET_MMAP is not set
7134 +# CONFIG_NETLINK_DEV is not set
7135 +CONFIG_NETFILTER=y
7136 +# CONFIG_NETFILTER_DEBUG is not set
7137 +CONFIG_FILTER=y
7138 +CONFIG_UNIX=y
7139 +CONFIG_INET=y
7140 +CONFIG_IP_MULTICAST=y
7141 +# CONFIG_IP_ADVANCED_ROUTER is not set
7142 +CONFIG_IP_PNP=y
7143 +# CONFIG_IP_PNP_DHCP is not set
7144 +CONFIG_IP_PNP_BOOTP=y
7145 +# CONFIG_IP_PNP_RARP is not set
7146 +# CONFIG_NET_IPIP is not set
7147 +# CONFIG_NET_IPGRE is not set
7148 +# CONFIG_IP_MROUTE is not set
7149 +# CONFIG_ARPD is not set
7150 +# CONFIG_INET_ECN is not set
7151 +# CONFIG_SYN_COOKIES is not set
7152 +
7153 +#
7154 +# IP: Netfilter Configuration
7155 +#
7156 +# CONFIG_IP_NF_CONNTRACK is not set
7157 +# CONFIG_IP_NF_QUEUE is not set
7158 +# CONFIG_IP_NF_IPTABLES is not set
7159 +# CONFIG_IP_NF_ARPTABLES is not set
7160 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
7161 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
7162 +
7163 +#
7164 +# IP: Virtual Server Configuration
7165 +#
7166 +# CONFIG_IP_VS is not set
7167 +# CONFIG_IPV6 is not set
7168 +# CONFIG_KHTTPD is not set
7169 +
7170 +#
7171 +# SCTP Configuration (EXPERIMENTAL)
7172 +#
7173 +# CONFIG_IP_SCTP is not set
7174 +# CONFIG_ATM is not set
7175 +# CONFIG_VLAN_8021Q is not set
7176 +
7177 +#
7178 +#
7179 +#
7180 +# CONFIG_IPX is not set
7181 +# CONFIG_ATALK is not set
7182 +# CONFIG_DECNET is not set
7183 +# CONFIG_BRIDGE is not set
7184 +# CONFIG_X25 is not set
7185 +# CONFIG_LAPB is not set
7186 +# CONFIG_LLC is not set
7187 +# CONFIG_NET_DIVERT is not set
7188 +# CONFIG_ECONET is not set
7189 +# CONFIG_WAN_ROUTER is not set
7190 +# CONFIG_NET_FASTROUTE is not set
7191 +# CONFIG_NET_HW_FLOWCONTROL is not set
7192 +
7193 +#
7194 +# QoS and/or fair queueing
7195 +#
7196 +# CONFIG_NET_SCHED is not set
7197 +
7198 +#
7199 +# Network testing
7200 +#
7201 +# CONFIG_NET_PKTGEN is not set
7202 +
7203 +#
7204 +# Telephony Support
7205 +#
7206 +# CONFIG_PHONE is not set
7207 +# CONFIG_PHONE_IXJ is not set
7208 +# CONFIG_PHONE_IXJ_PCMCIA is not set
7209 +
7210 +#
7211 +# ATA/IDE/MFM/RLL support
7212 +#
7213 +CONFIG_IDE=y
7214 +
7215 +#
7216 +# IDE, ATA and ATAPI Block devices
7217 +#
7218 +CONFIG_BLK_DEV_IDE=y
7219 +
7220 +#
7221 +# Please see Documentation/ide.txt for help/info on IDE drives
7222 +#
7223 +# CONFIG_BLK_DEV_HD_IDE is not set
7224 +# CONFIG_BLK_DEV_HD is not set
7225 +# CONFIG_BLK_DEV_IDE_SATA is not set
7226 +CONFIG_BLK_DEV_IDEDISK=y
7227 +CONFIG_IDEDISK_MULTI_MODE=y
7228 +CONFIG_IDEDISK_STROKE=y
7229 +CONFIG_BLK_DEV_IDECS=m
7230 +# CONFIG_BLK_DEV_DELKIN is not set
7231 +# CONFIG_BLK_DEV_IDECD is not set
7232 +# CONFIG_BLK_DEV_IDETAPE is not set
7233 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
7234 +# CONFIG_BLK_DEV_IDESCSI is not set
7235 +# CONFIG_IDE_TASK_IOCTL is not set
7236 +
7237 +#
7238 +# IDE chipset support/bugfixes
7239 +#
7240 +# CONFIG_BLK_DEV_CMD640 is not set
7241 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
7242 +# CONFIG_BLK_DEV_ISAPNP is not set
7243 +# CONFIG_BLK_DEV_IDEPCI is not set
7244 +# CONFIG_IDE_CHIPSETS is not set
7245 +# CONFIG_IDEDMA_AUTO is not set
7246 +# CONFIG_DMA_NONPCI is not set
7247 +# CONFIG_BLK_DEV_ATARAID is not set
7248 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
7249 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
7250 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
7251 +# CONFIG_BLK_DEV_ATARAID_SII is not set
7252 +
7253 +#
7254 +# SCSI support
7255 +#
7256 +CONFIG_SCSI=y
7257 +
7258 +#
7259 +# SCSI support type (disk, tape, CD-ROM)
7260 +#
7261 +CONFIG_BLK_DEV_SD=y
7262 +CONFIG_SD_EXTRA_DEVS=40
7263 +CONFIG_CHR_DEV_ST=y
7264 +# CONFIG_CHR_DEV_OSST is not set
7265 +CONFIG_BLK_DEV_SR=y
7266 +# CONFIG_BLK_DEV_SR_VENDOR is not set
7267 +CONFIG_SR_EXTRA_DEVS=2
7268 +# CONFIG_CHR_DEV_SG is not set
7269 +
7270 +#
7271 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
7272 +#
7273 +# CONFIG_SCSI_DEBUG_QUEUES is not set
7274 +# CONFIG_SCSI_MULTI_LUN is not set
7275 +CONFIG_SCSI_CONSTANTS=y
7276 +# CONFIG_SCSI_LOGGING is not set
7277 +
7278 +#
7279 +# SCSI low-level drivers
7280 +#
7281 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
7282 +# CONFIG_SCSI_7000FASST is not set
7283 +# CONFIG_SCSI_ACARD is not set
7284 +# CONFIG_SCSI_AHA152X is not set
7285 +# CONFIG_SCSI_AHA1542 is not set
7286 +# CONFIG_SCSI_AHA1740 is not set
7287 +# CONFIG_SCSI_AACRAID is not set
7288 +# CONFIG_SCSI_AIC7XXX is not set
7289 +# CONFIG_SCSI_AIC79XX is not set
7290 +# CONFIG_SCSI_AIC7XXX_OLD is not set
7291 +# CONFIG_SCSI_DPT_I2O is not set
7292 +# CONFIG_SCSI_ADVANSYS is not set
7293 +# CONFIG_SCSI_IN2000 is not set
7294 +# CONFIG_SCSI_AM53C974 is not set
7295 +# CONFIG_SCSI_MEGARAID is not set
7296 +# CONFIG_SCSI_MEGARAID2 is not set
7297 +# CONFIG_SCSI_SATA is not set
7298 +# CONFIG_SCSI_SATA_AHCI is not set
7299 +# CONFIG_SCSI_SATA_SVW is not set
7300 +# CONFIG_SCSI_ATA_PIIX is not set
7301 +# CONFIG_SCSI_SATA_NV is not set
7302 +# CONFIG_SCSI_SATA_PROMISE is not set
7303 +# CONFIG_SCSI_SATA_SX4 is not set
7304 +# CONFIG_SCSI_SATA_SIL is not set
7305 +# CONFIG_SCSI_SATA_SIS is not set
7306 +# CONFIG_SCSI_SATA_ULI is not set
7307 +# CONFIG_SCSI_SATA_VIA is not set
7308 +# CONFIG_SCSI_SATA_VITESSE is not set
7309 +# CONFIG_SCSI_BUSLOGIC is not set
7310 +# CONFIG_SCSI_CPQFCTS is not set
7311 +# CONFIG_SCSI_DMX3191D is not set
7312 +# CONFIG_SCSI_DTC3280 is not set
7313 +# CONFIG_SCSI_EATA is not set
7314 +# CONFIG_SCSI_EATA_DMA is not set
7315 +# CONFIG_SCSI_EATA_PIO is not set
7316 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
7317 +# CONFIG_SCSI_GDTH is not set
7318 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
7319 +# CONFIG_SCSI_INITIO is not set
7320 +# CONFIG_SCSI_INIA100 is not set
7321 +# CONFIG_SCSI_NCR53C406A is not set
7322 +# CONFIG_SCSI_NCR53C7xx is not set
7323 +# CONFIG_SCSI_SYM53C8XX_2 is not set
7324 +# CONFIG_SCSI_NCR53C8XX is not set
7325 +# CONFIG_SCSI_SYM53C8XX is not set
7326 +# CONFIG_SCSI_PAS16 is not set
7327 +# CONFIG_SCSI_PCI2000 is not set
7328 +# CONFIG_SCSI_PCI2220I is not set
7329 +# CONFIG_SCSI_PSI240I is not set
7330 +# CONFIG_SCSI_QLOGIC_FAS is not set
7331 +# CONFIG_SCSI_QLOGIC_ISP is not set
7332 +# CONFIG_SCSI_QLOGIC_FC is not set
7333 +# CONFIG_SCSI_QLOGIC_1280 is not set
7334 +# CONFIG_SCSI_SIM710 is not set
7335 +# CONFIG_SCSI_SYM53C416 is not set
7336 +# CONFIG_SCSI_DC390T is not set
7337 +# CONFIG_SCSI_T128 is not set
7338 +# CONFIG_SCSI_U14_34F is not set
7339 +# CONFIG_SCSI_NSP32 is not set
7340 +# CONFIG_SCSI_DEBUG is not set
7341 +
7342 +#
7343 +# PCMCIA SCSI adapter support
7344 +#
7345 +# CONFIG_SCSI_PCMCIA is not set
7346 +
7347 +#
7348 +# Fusion MPT device support
7349 +#
7350 +# CONFIG_FUSION is not set
7351 +# CONFIG_FUSION_BOOT is not set
7352 +# CONFIG_FUSION_ISENSE is not set
7353 +# CONFIG_FUSION_CTL is not set
7354 +# CONFIG_FUSION_LAN is not set
7355 +
7356 +#
7357 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
7358 +#
7359 +# CONFIG_IEEE1394 is not set
7360 +
7361 +#
7362 +# I2O device support
7363 +#
7364 +# CONFIG_I2O is not set
7365 +# CONFIG_I2O_PCI is not set
7366 +# CONFIG_I2O_BLOCK is not set
7367 +# CONFIG_I2O_LAN is not set
7368 +# CONFIG_I2O_SCSI is not set
7369 +# CONFIG_I2O_PROC is not set
7370 +
7371 +#
7372 +# Network device support
7373 +#
7374 +CONFIG_NETDEVICES=y
7375 +
7376 +#
7377 +# ARCnet devices
7378 +#
7379 +# CONFIG_ARCNET is not set
7380 +# CONFIG_DUMMY is not set
7381 +# CONFIG_BONDING is not set
7382 +# CONFIG_EQUALIZER is not set
7383 +# CONFIG_TUN is not set
7384 +# CONFIG_ETHERTAP is not set
7385 +
7386 +#
7387 +# Ethernet (10 or 100Mbit)
7388 +#
7389 +CONFIG_NET_ETHERNET=y
7390 +# CONFIG_MIPS_AU1X00_ENET is not set
7391 +# CONFIG_SUNLANCE is not set
7392 +# CONFIG_HAPPYMEAL is not set
7393 +# CONFIG_SUNBMAC is not set
7394 +# CONFIG_SUNQE is not set
7395 +# CONFIG_SUNGEM is not set
7396 +# CONFIG_NET_VENDOR_3COM is not set
7397 +# CONFIG_LANCE is not set
7398 +# CONFIG_NET_VENDOR_SMC is not set
7399 +# CONFIG_NET_VENDOR_RACAL is not set
7400 +# CONFIG_HP100 is not set
7401 +# CONFIG_NET_ISA is not set
7402 +# CONFIG_NET_PCI is not set
7403 +# CONFIG_NET_POCKET is not set
7404 +
7405 +#
7406 +# Ethernet (1000 Mbit)
7407 +#
7408 +# CONFIG_ACENIC is not set
7409 +# CONFIG_DL2K is not set
7410 +# CONFIG_E1000 is not set
7411 +# CONFIG_MYRI_SBUS is not set
7412 +# CONFIG_NS83820 is not set
7413 +# CONFIG_HAMACHI is not set
7414 +# CONFIG_YELLOWFIN is not set
7415 +# CONFIG_R8169 is not set
7416 +# CONFIG_SK98LIN is not set
7417 +# CONFIG_TIGON3 is not set
7418 +# CONFIG_FDDI is not set
7419 +# CONFIG_HIPPI is not set
7420 +# CONFIG_PLIP is not set
7421 +CONFIG_PPP=m
7422 +CONFIG_PPP_MULTILINK=y
7423 +# CONFIG_PPP_FILTER is not set
7424 +CONFIG_PPP_ASYNC=m
7425 +# CONFIG_PPP_SYNC_TTY is not set
7426 +CONFIG_PPP_DEFLATE=m
7427 +# CONFIG_PPP_BSDCOMP is not set
7428 +CONFIG_PPPOE=m
7429 +# CONFIG_SLIP is not set
7430 +
7431 +#
7432 +# Wireless LAN (non-hamradio)
7433 +#
7434 +# CONFIG_NET_RADIO is not set
7435 +
7436 +#
7437 +# Token Ring devices
7438 +#
7439 +# CONFIG_TR is not set
7440 +# CONFIG_NET_FC is not set
7441 +# CONFIG_RCPCI is not set
7442 +# CONFIG_SHAPER is not set
7443 +
7444 +#
7445 +# Wan interfaces
7446 +#
7447 +# CONFIG_WAN is not set
7448 +
7449 +#
7450 +# PCMCIA network device support
7451 +#
7452 +# CONFIG_NET_PCMCIA is not set
7453 +
7454 +#
7455 +# Amateur Radio support
7456 +#
7457 +# CONFIG_HAMRADIO is not set
7458 +
7459 +#
7460 +# IrDA (infrared) support
7461 +#
7462 +# CONFIG_IRDA is not set
7463 +
7464 +#
7465 +# ISDN subsystem
7466 +#
7467 +# CONFIG_ISDN is not set
7468 +
7469 +#
7470 +# Input core support
7471 +#
7472 +CONFIG_INPUT=y
7473 +CONFIG_INPUT_KEYBDEV=y
7474 +CONFIG_INPUT_MOUSEDEV=y
7475 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
7476 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
7477 +# CONFIG_INPUT_JOYDEV is not set
7478 +CONFIG_INPUT_EVDEV=y
7479 +# CONFIG_INPUT_UINPUT is not set
7480 +
7481 +#
7482 +# Character devices
7483 +#
7484 +CONFIG_VT=y
7485 +# CONFIG_VT_CONSOLE is not set
7486 +# CONFIG_SERIAL is not set
7487 +# CONFIG_SERIAL_EXTENDED is not set
7488 +CONFIG_SERIAL_NONSTANDARD=y
7489 +# CONFIG_COMPUTONE is not set
7490 +# CONFIG_ROCKETPORT is not set
7491 +# CONFIG_CYCLADES is not set
7492 +# CONFIG_DIGIEPCA is not set
7493 +# CONFIG_DIGI is not set
7494 +# CONFIG_ESPSERIAL is not set
7495 +# CONFIG_MOXA_INTELLIO is not set
7496 +# CONFIG_MOXA_SMARTIO is not set
7497 +# CONFIG_ISI is not set
7498 +# CONFIG_SYNCLINK is not set
7499 +# CONFIG_SYNCLINKMP is not set
7500 +# CONFIG_N_HDLC is not set
7501 +# CONFIG_RISCOM8 is not set
7502 +# CONFIG_SPECIALIX is not set
7503 +# CONFIG_SX is not set
7504 +# CONFIG_RIO is not set
7505 +# CONFIG_STALDRV is not set
7506 +# CONFIG_SERIAL_TX3912 is not set
7507 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
7508 +# CONFIG_SERIAL_TXX9 is not set
7509 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
7510 +CONFIG_AU1X00_UART=y
7511 +CONFIG_AU1X00_SERIAL_CONSOLE=y
7512 +# CONFIG_AU1X00_USB_TTY is not set
7513 +# CONFIG_AU1X00_USB_RAW is not set
7514 +# CONFIG_TXX927_SERIAL is not set
7515 +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7516 +CONFIG_UNIX98_PTYS=y
7517 +CONFIG_UNIX98_PTY_COUNT=256
7518 +
7519 +#
7520 +# I2C support
7521 +#
7522 +CONFIG_I2C=y
7523 +# CONFIG_I2C_ALGOBIT is not set
7524 +# CONFIG_SCx200_ACB is not set
7525 +# CONFIG_I2C_ALGOPCF is not set
7526 +# CONFIG_I2C_CHARDEV is not set
7527 +CONFIG_I2C_PROC=y
7528 +
7529 +#
7530 +# Mice
7531 +#
7532 +# CONFIG_BUSMOUSE is not set
7533 +# CONFIG_MOUSE is not set
7534 +
7535 +#
7536 +# Joysticks
7537 +#
7538 +# CONFIG_INPUT_GAMEPORT is not set
7539 +# CONFIG_INPUT_NS558 is not set
7540 +# CONFIG_INPUT_LIGHTNING is not set
7541 +# CONFIG_INPUT_PCIGAME is not set
7542 +# CONFIG_INPUT_CS461X is not set
7543 +# CONFIG_INPUT_EMU10K1 is not set
7544 +# CONFIG_INPUT_SERIO is not set
7545 +# CONFIG_INPUT_SERPORT is not set
7546 +
7547 +#
7548 +# Joysticks
7549 +#
7550 +# CONFIG_INPUT_ANALOG is not set
7551 +# CONFIG_INPUT_A3D is not set
7552 +# CONFIG_INPUT_ADI is not set
7553 +# CONFIG_INPUT_COBRA is not set
7554 +# CONFIG_INPUT_GF2K is not set
7555 +# CONFIG_INPUT_GRIP is not set
7556 +# CONFIG_INPUT_INTERACT is not set
7557 +# CONFIG_INPUT_TMDC is not set
7558 +# CONFIG_INPUT_SIDEWINDER is not set
7559 +# CONFIG_INPUT_IFORCE_USB is not set
7560 +# CONFIG_INPUT_IFORCE_232 is not set
7561 +# CONFIG_INPUT_WARRIOR is not set
7562 +# CONFIG_INPUT_MAGELLAN is not set
7563 +# CONFIG_INPUT_SPACEORB is not set
7564 +# CONFIG_INPUT_SPACEBALL is not set
7565 +# CONFIG_INPUT_STINGER is not set
7566 +# CONFIG_INPUT_DB9 is not set
7567 +# CONFIG_INPUT_GAMECON is not set
7568 +# CONFIG_INPUT_TURBOGRAFX is not set
7569 +# CONFIG_QIC02_TAPE is not set
7570 +# CONFIG_IPMI_HANDLER is not set
7571 +# CONFIG_IPMI_PANIC_EVENT is not set
7572 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
7573 +# CONFIG_IPMI_KCS is not set
7574 +# CONFIG_IPMI_WATCHDOG is not set
7575 +
7576 +#
7577 +# Watchdog Cards
7578 +#
7579 +# CONFIG_WATCHDOG is not set
7580 +# CONFIG_SCx200 is not set
7581 +# CONFIG_SCx200_GPIO is not set
7582 +# CONFIG_AMD_PM768 is not set
7583 +# CONFIG_NVRAM is not set
7584 +# CONFIG_RTC is not set
7585 +# CONFIG_DTLK is not set
7586 +# CONFIG_R3964 is not set
7587 +# CONFIG_APPLICOM is not set
7588 +
7589 +#
7590 +# Ftape, the floppy tape device driver
7591 +#
7592 +# CONFIG_FTAPE is not set
7593 +# CONFIG_AGP is not set
7594 +
7595 +#
7596 +# Direct Rendering Manager (XFree86 DRI support)
7597 +#
7598 +# CONFIG_DRM is not set
7599 +
7600 +#
7601 +# PCMCIA character devices
7602 +#
7603 +# CONFIG_PCMCIA_SERIAL_CS is not set
7604 +# CONFIG_SYNCLINK_CS is not set
7605 +# CONFIG_AU1X00_GPIO is not set
7606 +# CONFIG_TS_AU1X00_ADS7846 is not set
7607 +
7608 +#
7609 +# File systems
7610 +#
7611 +# CONFIG_QUOTA is not set
7612 +# CONFIG_QFMT_V2 is not set
7613 +CONFIG_AUTOFS_FS=y
7614 +# CONFIG_AUTOFS4_FS is not set
7615 +# CONFIG_REISERFS_FS is not set
7616 +# CONFIG_REISERFS_CHECK is not set
7617 +# CONFIG_REISERFS_PROC_INFO is not set
7618 +# CONFIG_ADFS_FS is not set
7619 +# CONFIG_ADFS_FS_RW is not set
7620 +# CONFIG_AFFS_FS is not set
7621 +# CONFIG_HFS_FS is not set
7622 +# CONFIG_HFSPLUS_FS is not set
7623 +# CONFIG_BEFS_FS is not set
7624 +# CONFIG_BEFS_DEBUG is not set
7625 +# CONFIG_BFS_FS is not set
7626 +CONFIG_EXT3_FS=y
7627 +CONFIG_JBD=y
7628 +# CONFIG_JBD_DEBUG is not set
7629 +CONFIG_FAT_FS=y
7630 +CONFIG_MSDOS_FS=y
7631 +# CONFIG_UMSDOS_FS is not set
7632 +CONFIG_VFAT_FS=y
7633 +# CONFIG_EFS_FS is not set
7634 +# CONFIG_JFFS_FS is not set
7635 +# CONFIG_JFFS2_FS is not set
7636 +# CONFIG_CRAMFS is not set
7637 +CONFIG_TMPFS=y
7638 +CONFIG_RAMFS=y
7639 +# CONFIG_ISO9660_FS is not set
7640 +# CONFIG_JOLIET is not set
7641 +# CONFIG_ZISOFS is not set
7642 +# CONFIG_JFS_FS is not set
7643 +# CONFIG_JFS_DEBUG is not set
7644 +# CONFIG_JFS_STATISTICS is not set
7645 +# CONFIG_MINIX_FS is not set
7646 +# CONFIG_VXFS_FS is not set
7647 +# CONFIG_NTFS_FS is not set
7648 +# CONFIG_NTFS_RW is not set
7649 +# CONFIG_HPFS_FS is not set
7650 +CONFIG_PROC_FS=y
7651 +# CONFIG_DEVFS_FS is not set
7652 +# CONFIG_DEVFS_MOUNT is not set
7653 +# CONFIG_DEVFS_DEBUG is not set
7654 +CONFIG_DEVPTS_FS=y
7655 +# CONFIG_QNX4FS_FS is not set
7656 +# CONFIG_QNX4FS_RW is not set
7657 +# CONFIG_ROMFS_FS is not set
7658 +CONFIG_EXT2_FS=y
7659 +# CONFIG_SYSV_FS is not set
7660 +# CONFIG_UDF_FS is not set
7661 +# CONFIG_UDF_RW is not set
7662 +# CONFIG_UFS_FS is not set
7663 +# CONFIG_UFS_FS_WRITE is not set
7664 +# CONFIG_XFS_FS is not set
7665 +# CONFIG_XFS_QUOTA is not set
7666 +# CONFIG_XFS_RT is not set
7667 +# CONFIG_XFS_TRACE is not set
7668 +# CONFIG_XFS_DEBUG is not set
7669 +
7670 +#
7671 +# Network File Systems
7672 +#
7673 +# CONFIG_CODA_FS is not set
7674 +# CONFIG_INTERMEZZO_FS is not set
7675 +CONFIG_NFS_FS=y
7676 +CONFIG_NFS_V3=y
7677 +# CONFIG_NFS_DIRECTIO is not set
7678 +CONFIG_ROOT_NFS=y
7679 +# CONFIG_NFSD is not set
7680 +# CONFIG_NFSD_V3 is not set
7681 +# CONFIG_NFSD_TCP is not set
7682 +CONFIG_SUNRPC=y
7683 +CONFIG_LOCKD=y
7684 +CONFIG_LOCKD_V4=y
7685 +# CONFIG_SMB_FS is not set
7686 +# CONFIG_NCP_FS is not set
7687 +# CONFIG_NCPFS_PACKET_SIGNING is not set
7688 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
7689 +# CONFIG_NCPFS_STRONG is not set
7690 +# CONFIG_NCPFS_NFS_NS is not set
7691 +# CONFIG_NCPFS_OS2_NS is not set
7692 +# CONFIG_NCPFS_SMALLDOS is not set
7693 +# CONFIG_NCPFS_NLS is not set
7694 +# CONFIG_NCPFS_EXTRAS is not set
7695 +# CONFIG_ZISOFS_FS is not set
7696 +
7697 +#
7698 +# Partition Types
7699 +#
7700 +# CONFIG_PARTITION_ADVANCED is not set
7701 +CONFIG_MSDOS_PARTITION=y
7702 +# CONFIG_SMB_NLS is not set
7703 +CONFIG_NLS=y
7704 +
7705 +#
7706 +# Native Language Support
7707 +#
7708 +CONFIG_NLS_DEFAULT="iso8859-1"
7709 +# CONFIG_NLS_CODEPAGE_437 is not set
7710 +# CONFIG_NLS_CODEPAGE_737 is not set
7711 +# CONFIG_NLS_CODEPAGE_775 is not set
7712 +# CONFIG_NLS_CODEPAGE_850 is not set
7713 +# CONFIG_NLS_CODEPAGE_852 is not set
7714 +# CONFIG_NLS_CODEPAGE_855 is not set
7715 +# CONFIG_NLS_CODEPAGE_857 is not set
7716 +# CONFIG_NLS_CODEPAGE_860 is not set
7717 +# CONFIG_NLS_CODEPAGE_861 is not set
7718 +# CONFIG_NLS_CODEPAGE_862 is not set
7719 +# CONFIG_NLS_CODEPAGE_863 is not set
7720 +# CONFIG_NLS_CODEPAGE_864 is not set
7721 +# CONFIG_NLS_CODEPAGE_865 is not set
7722 +# CONFIG_NLS_CODEPAGE_866 is not set
7723 +# CONFIG_NLS_CODEPAGE_869 is not set
7724 +# CONFIG_NLS_CODEPAGE_936 is not set
7725 +# CONFIG_NLS_CODEPAGE_950 is not set
7726 +# CONFIG_NLS_CODEPAGE_932 is not set
7727 +# CONFIG_NLS_CODEPAGE_949 is not set
7728 +# CONFIG_NLS_CODEPAGE_874 is not set
7729 +# CONFIG_NLS_ISO8859_8 is not set
7730 +# CONFIG_NLS_CODEPAGE_1250 is not set
7731 +# CONFIG_NLS_CODEPAGE_1251 is not set
7732 +# CONFIG_NLS_ISO8859_1 is not set
7733 +# CONFIG_NLS_ISO8859_2 is not set
7734 +# CONFIG_NLS_ISO8859_3 is not set
7735 +# CONFIG_NLS_ISO8859_4 is not set
7736 +# CONFIG_NLS_ISO8859_5 is not set
7737 +# CONFIG_NLS_ISO8859_6 is not set
7738 +# CONFIG_NLS_ISO8859_7 is not set
7739 +# CONFIG_NLS_ISO8859_9 is not set
7740 +# CONFIG_NLS_ISO8859_13 is not set
7741 +# CONFIG_NLS_ISO8859_14 is not set
7742 +# CONFIG_NLS_ISO8859_15 is not set
7743 +# CONFIG_NLS_KOI8_R is not set
7744 +# CONFIG_NLS_KOI8_U is not set
7745 +# CONFIG_NLS_UTF8 is not set
7746 +
7747 +#
7748 +# Multimedia devices
7749 +#
7750 +# CONFIG_VIDEO_DEV is not set
7751 +
7752 +#
7753 +# Console drivers
7754 +#
7755 +# CONFIG_VGA_CONSOLE is not set
7756 +# CONFIG_MDA_CONSOLE is not set
7757 +
7758 +#
7759 +# Frame-buffer support
7760 +#
7761 +CONFIG_FB=y
7762 +CONFIG_DUMMY_CONSOLE=y
7763 +# CONFIG_FB_RIVA is not set
7764 +# CONFIG_FB_CLGEN is not set
7765 +# CONFIG_FB_PM2 is not set
7766 +# CONFIG_FB_PM3 is not set
7767 +# CONFIG_FB_CYBER2000 is not set
7768 +# CONFIG_FB_MATROX is not set
7769 +# CONFIG_FB_ATY is not set
7770 +# CONFIG_FB_RADEON is not set
7771 +# CONFIG_FB_ATY128 is not set
7772 +# CONFIG_FB_INTEL is not set
7773 +# CONFIG_FB_SIS is not set
7774 +# CONFIG_FB_NEOMAGIC is not set
7775 +# CONFIG_FB_3DFX is not set
7776 +# CONFIG_FB_VOODOO1 is not set
7777 +# CONFIG_FB_TRIDENT is not set
7778 +# CONFIG_FB_E1356 is not set
7779 +# CONFIG_FB_IT8181 is not set
7780 +# CONFIG_FB_VIRTUAL is not set
7781 +CONFIG_FBCON_ADVANCED=y
7782 +# CONFIG_FBCON_MFB is not set
7783 +# CONFIG_FBCON_CFB2 is not set
7784 +# CONFIG_FBCON_CFB4 is not set
7785 +# CONFIG_FBCON_CFB8 is not set
7786 +CONFIG_FBCON_CFB16=y
7787 +# CONFIG_FBCON_CFB24 is not set
7788 +CONFIG_FBCON_CFB32=y
7789 +# CONFIG_FBCON_AFB is not set
7790 +# CONFIG_FBCON_ILBM is not set
7791 +# CONFIG_FBCON_IPLAN2P2 is not set
7792 +# CONFIG_FBCON_IPLAN2P4 is not set
7793 +# CONFIG_FBCON_IPLAN2P8 is not set
7794 +# CONFIG_FBCON_MAC is not set
7795 +# CONFIG_FBCON_VGA_PLANES is not set
7796 +# CONFIG_FBCON_VGA is not set
7797 +# CONFIG_FBCON_HGA is not set
7798 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
7799 +CONFIG_FBCON_FONTS=y
7800 +CONFIG_FONT_8x8=y
7801 +CONFIG_FONT_8x16=y
7802 +# CONFIG_FONT_SUN8x16 is not set
7803 +# CONFIG_FONT_SUN12x22 is not set
7804 +# CONFIG_FONT_6x11 is not set
7805 +# CONFIG_FONT_PEARL_8x8 is not set
7806 +# CONFIG_FONT_ACORN_8x8 is not set
7807 +
7808 +#
7809 +# Sound
7810 +#
7811 +CONFIG_SOUND=y
7812 +# CONFIG_SOUND_ALI5455 is not set
7813 +# CONFIG_SOUND_BT878 is not set
7814 +# CONFIG_SOUND_CMPCI is not set
7815 +# CONFIG_SOUND_EMU10K1 is not set
7816 +# CONFIG_MIDI_EMU10K1 is not set
7817 +# CONFIG_SOUND_FUSION is not set
7818 +# CONFIG_SOUND_CS4281 is not set
7819 +# CONFIG_SOUND_ES1370 is not set
7820 +# CONFIG_SOUND_ES1371 is not set
7821 +# CONFIG_SOUND_ESSSOLO1 is not set
7822 +# CONFIG_SOUND_MAESTRO is not set
7823 +# CONFIG_SOUND_MAESTRO3 is not set
7824 +# CONFIG_SOUND_FORTE is not set
7825 +# CONFIG_SOUND_ICH is not set
7826 +# CONFIG_SOUND_RME96XX is not set
7827 +# CONFIG_SOUND_SONICVIBES is not set
7828 +# CONFIG_SOUND_AU1X00 is not set
7829 +CONFIG_SOUND_AU1550_PSC=y
7830 +# CONFIG_SOUND_AU1550_I2S is not set
7831 +# CONFIG_SOUND_TRIDENT is not set
7832 +# CONFIG_SOUND_MSNDCLAS is not set
7833 +# CONFIG_SOUND_MSNDPIN is not set
7834 +# CONFIG_SOUND_VIA82CXXX is not set
7835 +# CONFIG_MIDI_VIA82CXXX is not set
7836 +# CONFIG_SOUND_OSS is not set
7837 +# CONFIG_SOUND_TVMIXER is not set
7838 +# CONFIG_SOUND_AD1980 is not set
7839 +# CONFIG_SOUND_WM97XX is not set
7840 +
7841 +#
7842 +# USB support
7843 +#
7844 +CONFIG_USB=y
7845 +# CONFIG_USB_DEBUG is not set
7846 +
7847 +#
7848 +# Miscellaneous USB options
7849 +#
7850 +CONFIG_USB_DEVICEFS=y
7851 +# CONFIG_USB_BANDWIDTH is not set
7852 +
7853 +#
7854 +# USB Host Controller Drivers
7855 +#
7856 +# CONFIG_USB_EHCI_HCD is not set
7857 +# CONFIG_USB_UHCI is not set
7858 +# CONFIG_USB_UHCI_ALT is not set
7859 +CONFIG_USB_OHCI=y
7860 +
7861 +#
7862 +# USB Device Class drivers
7863 +#
7864 +# CONFIG_USB_AUDIO is not set
7865 +# CONFIG_USB_EMI26 is not set
7866 +# CONFIG_USB_BLUETOOTH is not set
7867 +# CONFIG_USB_MIDI is not set
7868 +CONFIG_USB_STORAGE=y
7869 +# CONFIG_USB_STORAGE_DEBUG is not set
7870 +# CONFIG_USB_STORAGE_DATAFAB is not set
7871 +# CONFIG_USB_STORAGE_FREECOM is not set
7872 +# CONFIG_USB_STORAGE_ISD200 is not set
7873 +# CONFIG_USB_STORAGE_DPCM is not set
7874 +# CONFIG_USB_STORAGE_HP8200e is not set
7875 +# CONFIG_USB_STORAGE_SDDR09 is not set
7876 +# CONFIG_USB_STORAGE_SDDR55 is not set
7877 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
7878 +# CONFIG_USB_ACM is not set
7879 +# CONFIG_USB_PRINTER is not set
7880 +
7881 +#
7882 +# USB Human Interface Devices (HID)
7883 +#
7884 +CONFIG_USB_HID=y
7885 +CONFIG_USB_HIDINPUT=y
7886 +CONFIG_USB_HIDDEV=y
7887 +# CONFIG_USB_AIPTEK is not set
7888 +# CONFIG_USB_WACOM is not set
7889 +# CONFIG_USB_KBTAB is not set
7890 +# CONFIG_USB_POWERMATE is not set
7891 +
7892 +#
7893 +# USB Imaging devices
7894 +#
7895 +# CONFIG_USB_DC2XX is not set
7896 +# CONFIG_USB_MDC800 is not set
7897 +# CONFIG_USB_SCANNER is not set
7898 +# CONFIG_USB_MICROTEK is not set
7899 +# CONFIG_USB_HPUSBSCSI is not set
7900 +
7901 +#
7902 +# USB Multimedia devices
7903 +#
7904 +
7905 +#
7906 +# Video4Linux support is needed for USB Multimedia device support
7907 +#
7908 +
7909 +#
7910 +# USB Network adaptors
7911 +#
7912 +# CONFIG_USB_PEGASUS is not set
7913 +# CONFIG_USB_RTL8150 is not set
7914 +# CONFIG_USB_KAWETH is not set
7915 +# CONFIG_USB_CATC is not set
7916 +# CONFIG_USB_CDCETHER is not set
7917 +# CONFIG_USB_USBNET is not set
7918 +
7919 +#
7920 +# USB port drivers
7921 +#
7922 +# CONFIG_USB_USS720 is not set
7923 +
7924 +#
7925 +# USB Serial Converter support
7926 +#
7927 +# CONFIG_USB_SERIAL is not set
7928 +
7929 +#
7930 +# USB Miscellaneous drivers
7931 +#
7932 +# CONFIG_USB_RIO500 is not set
7933 +# CONFIG_USB_AUERSWALD is not set
7934 +# CONFIG_USB_TIGL is not set
7935 +# CONFIG_USB_BRLVGER is not set
7936 +# CONFIG_USB_LCD is not set
7937 +
7938 +#
7939 +# Support for USB gadgets
7940 +#
7941 +# CONFIG_USB_GADGET is not set
7942 +
7943 +#
7944 +# Bluetooth support
7945 +#
7946 +# CONFIG_BLUEZ is not set
7947 +
7948 +#
7949 +# Kernel hacking
7950 +#
7951 +CONFIG_CROSSCOMPILE=y
7952 +# CONFIG_RUNTIME_DEBUG is not set
7953 +# CONFIG_KGDB is not set
7954 +# CONFIG_GDB_CONSOLE is not set
7955 +# CONFIG_DEBUG_INFO is not set
7956 +# CONFIG_MAGIC_SYSRQ is not set
7957 +# CONFIG_MIPS_UNCACHED is not set
7958 +CONFIG_LOG_BUF_SHIFT=0
7959 +
7960 +#
7961 +# Cryptographic options
7962 +#
7963 +# CONFIG_CRYPTO is not set
7964 +
7965 +#
7966 +# Library routines
7967 +#
7968 +# CONFIG_CRC32 is not set
7969 +CONFIG_ZLIB_INFLATE=m
7970 +CONFIG_ZLIB_DEFLATE=m
7971 +# CONFIG_FW_LOADER is not set
7972 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1500 linux-mips/arch/mips/defconfig-pb1500
7973 --- linux-2.4.29/arch/mips/defconfig-pb1500 2005-01-19 15:09:28.000000000 +0100
7974 +++ linux-mips/arch/mips/defconfig-pb1500 2005-02-12 04:05:28.000000000 +0100
7975 @@ -22,16 +22,19 @@
7976 #
7977 # CONFIG_ACER_PICA_61 is not set
7978 # CONFIG_MIPS_BOSPORUS is not set
7979 +# CONFIG_MIPS_FICMMP is not set
7980 # CONFIG_MIPS_MIRAGE is not set
7981 # CONFIG_MIPS_DB1000 is not set
7982 # CONFIG_MIPS_DB1100 is not set
7983 # CONFIG_MIPS_DB1500 is not set
7984 # CONFIG_MIPS_DB1550 is not set
7985 +# CONFIG_MIPS_DB1200 is not set
7986 # CONFIG_MIPS_PB1000 is not set
7987 # CONFIG_MIPS_PB1100 is not set
7988 CONFIG_MIPS_PB1500=y
7989 -# CONFIG_MIPS_HYDROGEN3 is not set
7990 # CONFIG_MIPS_PB1550 is not set
7991 +# CONFIG_MIPS_PB1200 is not set
7992 +# CONFIG_MIPS_HYDROGEN3 is not set
7993 # CONFIG_MIPS_XXS1500 is not set
7994 # CONFIG_MIPS_MTX1 is not set
7995 # CONFIG_COGENT_CSB250 is not set
7996 @@ -341,11 +344,6 @@
7997 #
7998 # CONFIG_IPX is not set
7999 # CONFIG_ATALK is not set
8000 -
8001 -#
8002 -# Appletalk devices
8003 -#
8004 -# CONFIG_DEV_APPLETALK is not set
8005 # CONFIG_DECNET is not set
8006 # CONFIG_BRIDGE is not set
8007 # CONFIG_X25 is not set
8008 diff -Nur linux-2.4.29/arch/mips/defconfig-pb1550 linux-mips/arch/mips/defconfig-pb1550
8009 --- linux-2.4.29/arch/mips/defconfig-pb1550 2005-01-19 15:09:29.000000000 +0100
8010 +++ linux-mips/arch/mips/defconfig-pb1550 2005-02-12 04:05:28.000000000 +0100
8011 @@ -22,16 +22,19 @@
8012 #
8013 # CONFIG_ACER_PICA_61 is not set
8014 # CONFIG_MIPS_BOSPORUS is not set
8015 +# CONFIG_MIPS_FICMMP is not set
8016 # CONFIG_MIPS_MIRAGE is not set
8017 # CONFIG_MIPS_DB1000 is not set
8018 # CONFIG_MIPS_DB1100 is not set
8019 # CONFIG_MIPS_DB1500 is not set
8020 # CONFIG_MIPS_DB1550 is not set
8021 +# CONFIG_MIPS_DB1200 is not set
8022 # CONFIG_MIPS_PB1000 is not set
8023 # CONFIG_MIPS_PB1100 is not set
8024 # CONFIG_MIPS_PB1500 is not set
8025 -# CONFIG_MIPS_HYDROGEN3 is not set
8026 CONFIG_MIPS_PB1550=y
8027 +# CONFIG_MIPS_PB1200 is not set
8028 +# CONFIG_MIPS_HYDROGEN3 is not set
8029 # CONFIG_MIPS_XXS1500 is not set
8030 # CONFIG_MIPS_MTX1 is not set
8031 # CONFIG_COGENT_CSB250 is not set
8032 @@ -343,11 +346,6 @@
8033 #
8034 # CONFIG_IPX is not set
8035 # CONFIG_ATALK is not set
8036 -
8037 -#
8038 -# Appletalk devices
8039 -#
8040 -# CONFIG_DEV_APPLETALK is not set
8041 # CONFIG_DECNET is not set
8042 # CONFIG_BRIDGE is not set
8043 # CONFIG_X25 is not set
8044 diff -Nur linux-2.4.29/arch/mips/defconfig-rbtx4927 linux-mips/arch/mips/defconfig-rbtx4927
8045 --- linux-2.4.29/arch/mips/defconfig-rbtx4927 2005-01-19 15:09:29.000000000 +0100
8046 +++ linux-mips/arch/mips/defconfig-rbtx4927 2005-01-09 20:33:59.000000000 +0100
8047 @@ -223,11 +223,6 @@
8048 #
8049 # CONFIG_IPX is not set
8050 # CONFIG_ATALK is not set
8051 -
8052 -#
8053 -# Appletalk devices
8054 -#
8055 -# CONFIG_DEV_APPLETALK is not set
8056 # CONFIG_DECNET is not set
8057 # CONFIG_BRIDGE is not set
8058 # CONFIG_X25 is not set
8059 diff -Nur linux-2.4.29/arch/mips/defconfig-rm200 linux-mips/arch/mips/defconfig-rm200
8060 --- linux-2.4.29/arch/mips/defconfig-rm200 2005-01-19 15:09:29.000000000 +0100
8061 +++ linux-mips/arch/mips/defconfig-rm200 2005-01-09 20:33:59.000000000 +0100
8062 @@ -229,11 +229,6 @@
8063 #
8064 # CONFIG_IPX is not set
8065 # CONFIG_ATALK is not set
8066 -
8067 -#
8068 -# Appletalk devices
8069 -#
8070 -# CONFIG_DEV_APPLETALK is not set
8071 # CONFIG_DECNET is not set
8072 # CONFIG_BRIDGE is not set
8073 # CONFIG_X25 is not set
8074 diff -Nur linux-2.4.29/arch/mips/defconfig-sb1250-swarm linux-mips/arch/mips/defconfig-sb1250-swarm
8075 --- linux-2.4.29/arch/mips/defconfig-sb1250-swarm 2005-01-19 15:09:29.000000000 +0100
8076 +++ linux-mips/arch/mips/defconfig-sb1250-swarm 2005-01-09 20:33:59.000000000 +0100
8077 @@ -90,6 +90,7 @@
8078 # CONFIG_SIBYTE_TBPROF is not set
8079 CONFIG_SIBYTE_GENBUS_IDE=y
8080 CONFIG_SMP_CAPABLE=y
8081 +CONFIG_MIPS_RTC=y
8082 # CONFIG_SNI_RM200_PCI is not set
8083 # CONFIG_TANBAC_TB0226 is not set
8084 # CONFIG_TANBAC_TB0229 is not set
8085 @@ -253,11 +254,6 @@
8086 #
8087 # CONFIG_IPX is not set
8088 # CONFIG_ATALK is not set
8089 -
8090 -#
8091 -# Appletalk devices
8092 -#
8093 -# CONFIG_DEV_APPLETALK is not set
8094 # CONFIG_DECNET is not set
8095 # CONFIG_BRIDGE is not set
8096 # CONFIG_X25 is not set
8097 diff -Nur linux-2.4.29/arch/mips/defconfig-stretch linux-mips/arch/mips/defconfig-stretch
8098 --- linux-2.4.29/arch/mips/defconfig-stretch 2005-01-19 15:09:29.000000000 +0100
8099 +++ linux-mips/arch/mips/defconfig-stretch 2005-01-09 20:33:59.000000000 +0100
8100 @@ -240,11 +240,6 @@
8101 #
8102 # CONFIG_IPX is not set
8103 # CONFIG_ATALK is not set
8104 -
8105 -#
8106 -# Appletalk devices
8107 -#
8108 -# CONFIG_DEV_APPLETALK is not set
8109 # CONFIG_DECNET is not set
8110 # CONFIG_BRIDGE is not set
8111 # CONFIG_X25 is not set
8112 @@ -324,6 +319,7 @@
8113 # CONFIG_SCSI_MEGARAID is not set
8114 # CONFIG_SCSI_MEGARAID2 is not set
8115 # CONFIG_SCSI_SATA is not set
8116 +# CONFIG_SCSI_SATA_AHCI is not set
8117 # CONFIG_SCSI_SATA_SVW is not set
8118 # CONFIG_SCSI_ATA_PIIX is not set
8119 # CONFIG_SCSI_SATA_NV is not set
8120 diff -Nur linux-2.4.29/arch/mips/defconfig-tb0226 linux-mips/arch/mips/defconfig-tb0226
8121 --- linux-2.4.29/arch/mips/defconfig-tb0226 2005-01-19 15:09:29.000000000 +0100
8122 +++ linux-mips/arch/mips/defconfig-tb0226 2005-01-09 20:34:00.000000000 +0100
8123 @@ -228,11 +228,6 @@
8124 #
8125 # CONFIG_IPX is not set
8126 # CONFIG_ATALK is not set
8127 -
8128 -#
8129 -# Appletalk devices
8130 -#
8131 -# CONFIG_DEV_APPLETALK is not set
8132 # CONFIG_DECNET is not set
8133 # CONFIG_BRIDGE is not set
8134 # CONFIG_X25 is not set
8135 @@ -312,6 +307,7 @@
8136 # CONFIG_SCSI_MEGARAID is not set
8137 # CONFIG_SCSI_MEGARAID2 is not set
8138 # CONFIG_SCSI_SATA is not set
8139 +# CONFIG_SCSI_SATA_AHCI is not set
8140 # CONFIG_SCSI_SATA_SVW is not set
8141 # CONFIG_SCSI_ATA_PIIX is not set
8142 # CONFIG_SCSI_SATA_NV is not set
8143 diff -Nur linux-2.4.29/arch/mips/defconfig-tb0229 linux-mips/arch/mips/defconfig-tb0229
8144 --- linux-2.4.29/arch/mips/defconfig-tb0229 2005-01-19 15:09:29.000000000 +0100
8145 +++ linux-mips/arch/mips/defconfig-tb0229 2005-01-09 20:34:00.000000000 +0100
8146 @@ -230,11 +230,6 @@
8147 #
8148 # CONFIG_IPX is not set
8149 # CONFIG_ATALK is not set
8150 -
8151 -#
8152 -# Appletalk devices
8153 -#
8154 -# CONFIG_DEV_APPLETALK is not set
8155 # CONFIG_DECNET is not set
8156 # CONFIG_BRIDGE is not set
8157 # CONFIG_X25 is not set
8158 diff -Nur linux-2.4.29/arch/mips/defconfig-ti1500 linux-mips/arch/mips/defconfig-ti1500
8159 --- linux-2.4.29/arch/mips/defconfig-ti1500 2005-01-19 15:09:29.000000000 +0100
8160 +++ linux-mips/arch/mips/defconfig-ti1500 2005-01-09 20:34:00.000000000 +0100
8161 @@ -339,11 +339,6 @@
8162 #
8163 # CONFIG_IPX is not set
8164 # CONFIG_ATALK is not set
8165 -
8166 -#
8167 -# Appletalk devices
8168 -#
8169 -# CONFIG_DEV_APPLETALK is not set
8170 # CONFIG_DECNET is not set
8171 # CONFIG_BRIDGE is not set
8172 # CONFIG_X25 is not set
8173 diff -Nur linux-2.4.29/arch/mips/defconfig-workpad linux-mips/arch/mips/defconfig-workpad
8174 --- linux-2.4.29/arch/mips/defconfig-workpad 2005-01-19 15:09:29.000000000 +0100
8175 +++ linux-mips/arch/mips/defconfig-workpad 2005-01-09 20:34:00.000000000 +0100
8176 @@ -222,11 +222,6 @@
8177 #
8178 # CONFIG_IPX is not set
8179 # CONFIG_ATALK is not set
8180 -
8181 -#
8182 -# Appletalk devices
8183 -#
8184 -# CONFIG_DEV_APPLETALK is not set
8185 # CONFIG_DECNET is not set
8186 # CONFIG_BRIDGE is not set
8187 # CONFIG_X25 is not set
8188 diff -Nur linux-2.4.29/arch/mips/defconfig-xxs1500 linux-mips/arch/mips/defconfig-xxs1500
8189 --- linux-2.4.29/arch/mips/defconfig-xxs1500 2005-01-19 15:09:29.000000000 +0100
8190 +++ linux-mips/arch/mips/defconfig-xxs1500 2005-01-09 20:34:00.000000000 +0100
8191 @@ -339,11 +339,6 @@
8192 #
8193 # CONFIG_IPX is not set
8194 # CONFIG_ATALK is not set
8195 -
8196 -#
8197 -# Appletalk devices
8198 -#
8199 -# CONFIG_DEV_APPLETALK is not set
8200 # CONFIG_DECNET is not set
8201 # CONFIG_BRIDGE is not set
8202 # CONFIG_X25 is not set
8203 diff -Nur linux-2.4.29/arch/mips/defconfig-yosemite linux-mips/arch/mips/defconfig-yosemite
8204 --- linux-2.4.29/arch/mips/defconfig-yosemite 2005-01-19 15:09:29.000000000 +0100
8205 +++ linux-mips/arch/mips/defconfig-yosemite 2005-01-09 20:34:00.000000000 +0100
8206 @@ -227,11 +227,6 @@
8207 #
8208 # CONFIG_IPX is not set
8209 # CONFIG_ATALK is not set
8210 -
8211 -#
8212 -# Appletalk devices
8213 -#
8214 -# CONFIG_DEV_APPLETALK is not set
8215 # CONFIG_DECNET is not set
8216 # CONFIG_BRIDGE is not set
8217 # CONFIG_X25 is not set
8218 @@ -310,6 +305,7 @@
8219 # CONFIG_SCSI_MEGARAID is not set
8220 # CONFIG_SCSI_MEGARAID2 is not set
8221 # CONFIG_SCSI_SATA is not set
8222 +# CONFIG_SCSI_SATA_AHCI is not set
8223 # CONFIG_SCSI_SATA_SVW is not set
8224 # CONFIG_SCSI_ATA_PIIX is not set
8225 # CONFIG_SCSI_SATA_NV is not set
8226 diff -Nur linux-2.4.29/arch/mips/kernel/cpu-probe.c linux-mips/arch/mips/kernel/cpu-probe.c
8227 --- linux-2.4.29/arch/mips/kernel/cpu-probe.c 2005-01-19 15:09:29.000000000 +0100
8228 +++ linux-mips/arch/mips/kernel/cpu-probe.c 2005-01-31 12:59:30.000000000 +0100
8229 @@ -105,6 +105,7 @@
8230 case CPU_AU1100:
8231 case CPU_AU1500:
8232 case CPU_AU1550:
8233 + case CPU_AU1200:
8234 if (au1k_wait_ptr != NULL) {
8235 cpu_wait = au1k_wait_ptr;
8236 printk(" available.\n");
8237 diff -Nur linux-2.4.29/arch/mips/kernel/head.S linux-mips/arch/mips/kernel/head.S
8238 --- linux-2.4.29/arch/mips/kernel/head.S 2005-01-19 15:09:29.000000000 +0100
8239 +++ linux-mips/arch/mips/kernel/head.S 2004-11-22 14:38:23.000000000 +0100
8240 @@ -43,9 +43,9 @@
8241
8242 /* Cache Error */
8243 LEAF(except_vec2_generic)
8244 + .set push
8245 .set noreorder
8246 .set noat
8247 - .set mips0
8248 /*
8249 * This is a very bad place to be. Our cache error
8250 * detection has triggered. If we have write-back data
8251 @@ -64,10 +64,9 @@
8252
8253 j cache_parity_error
8254 nop
8255 + .set pop
8256 END(except_vec2_generic)
8257
8258 - .set at
8259 -
8260 /*
8261 * Special interrupt vector for embedded MIPS. This is a
8262 * dedicated interrupt vector which reduces interrupt processing
8263 @@ -76,8 +75,11 @@
8264 * size!
8265 */
8266 NESTED(except_vec4, 0, sp)
8267 + .set push
8268 + .set noreorder
8269 1: j 1b /* Dummy, will be replaced */
8270 nop
8271 + .set pop
8272 END(except_vec4)
8273
8274 /*
8275 @@ -87,8 +89,11 @@
8276 * unconditional jump to this vector.
8277 */
8278 NESTED(except_vec_ejtag_debug, 0, sp)
8279 + .set push
8280 + .set noreorder
8281 j ejtag_debug_handler
8282 nop
8283 + .set pop
8284 END(except_vec_ejtag_debug)
8285
8286 __FINIT
8287 @@ -97,6 +102,7 @@
8288 * EJTAG debug exception handler.
8289 */
8290 NESTED(ejtag_debug_handler, PT_SIZE, sp)
8291 + .set push
8292 .set noat
8293 .set noreorder
8294 mtc0 k0, CP0_DESAVE
8295 @@ -120,7 +126,7 @@
8296 deret
8297 .set mips0
8298 nop
8299 - .set at
8300 + .set pop
8301 END(ejtag_debug_handler)
8302
8303 __INIT
8304 @@ -132,13 +138,17 @@
8305 * unconditional jump to this vector.
8306 */
8307 NESTED(except_vec_nmi, 0, sp)
8308 + .set push
8309 + .set noreorder
8310 j nmi_handler
8311 nop
8312 + .set pop
8313 END(except_vec_nmi)
8314
8315 __FINIT
8316
8317 NESTED(nmi_handler, PT_SIZE, sp)
8318 + .set push
8319 .set noat
8320 .set noreorder
8321 .set mips3
8322 @@ -147,8 +157,7 @@
8323 move a0, sp
8324 RESTORE_ALL
8325 eret
8326 - .set at
8327 - .set mips0
8328 + .set pop
8329 END(nmi_handler)
8330
8331 __INIT
8332 @@ -157,7 +166,20 @@
8333 * Kernel entry point
8334 */
8335 NESTED(kernel_entry, 16, sp)
8336 + .set push
8337 + /*
8338 + * For the moment disable interrupts and mark the kernel mode.
8339 + * A full initialization of the CPU's status register is done
8340 + * later in per_cpu_trap_init().
8341 + */
8342 + mfc0 t0, CP0_STATUS
8343 + or t0, ST0_CU0|0x1f
8344 + xor t0, 0x1f
8345 + mtc0 t0, CP0_STATUS
8346 +
8347 .set noreorder
8348 + sll zero,3 # ehb
8349 + .set reorder
8350
8351 /*
8352 * The firmware/bootloader passes argc/argp/envp
8353 @@ -170,8 +192,8 @@
8354 la t1, (_end - 4)
8355 1:
8356 addiu t0, 4
8357 + sw zero, (t0)
8358 bne t0, t1, 1b
8359 - sw zero, (t0)
8360
8361 /*
8362 * Stack for kernel and init, current variable
8363 @@ -182,7 +204,7 @@
8364 sw t0, kernelsp
8365
8366 jal init_arch
8367 - nop
8368 + .set pop
8369 END(kernel_entry)
8370
8371
8372 @@ -193,17 +215,26 @@
8373 * function after setting up the stack and gp registers.
8374 */
8375 LEAF(smp_bootstrap)
8376 - .set push
8377 - .set noreorder
8378 - mtc0 zero, CP0_WIRED
8379 - CLI
8380 + .set push
8381 + /*
8382 + * For the moment disable interrupts and bootstrap exception
8383 + * vectors and mark the kernel mode. A full initialization of
8384 + * the CPU's status register is done later in
8385 + * per_cpu_trap_init().
8386 + */
8387 mfc0 t0, CP0_STATUS
8388 - li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
8389 - and t0, t1
8390 - or t0, (ST0_CU0);
8391 + or t0, ST0_CU0|ST0_BEV|0x1f
8392 + xor t0, ST0_BEV|0x1f
8393 + mtc0 t0, CP0_STATUS
8394 +
8395 + .set noreorder
8396 + sll zero,3 # ehb
8397 + .set reorder
8398 +
8399 + mtc0 zero, CP0_WIRED
8400 +
8401 jal start_secondary
8402 - mtc0 t0, CP0_STATUS
8403 - .set pop
8404 + .set pop
8405 END(smp_bootstrap)
8406 #endif
8407
8408 diff -Nur linux-2.4.29/arch/mips/kernel/scall_o32.S linux-mips/arch/mips/kernel/scall_o32.S
8409 --- linux-2.4.29/arch/mips/kernel/scall_o32.S 2005-01-19 15:09:29.000000000 +0100
8410 +++ linux-mips/arch/mips/kernel/scall_o32.S 2005-02-12 04:05:33.000000000 +0100
8411 @@ -121,15 +121,14 @@
8412
8413 trace_a_syscall:
8414 SAVE_STATIC
8415 - sw t2, PT_R1(sp)
8416 + move s0, t2
8417 jal syscall_trace
8418 - lw t2, PT_R1(sp)
8419
8420 lw a0, PT_R4(sp) # Restore argument registers
8421 lw a1, PT_R5(sp)
8422 lw a2, PT_R6(sp)
8423 lw a3, PT_R7(sp)
8424 - jalr t2
8425 + jalr s0
8426
8427 li t0, -EMAXERRNO - 1 # error?
8428 sltu t0, t0, v0
8429 diff -Nur linux-2.4.29/arch/mips/kernel/setup.c linux-mips/arch/mips/kernel/setup.c
8430 --- linux-2.4.29/arch/mips/kernel/setup.c 2005-01-19 15:09:29.000000000 +0100
8431 +++ linux-mips/arch/mips/kernel/setup.c 2005-01-13 22:15:57.000000000 +0100
8432 @@ -5,7 +5,7 @@
8433 *
8434 * Copyright (C) 1995 Linus Torvalds
8435 * Copyright (C) 1995 Waldorf Electronics
8436 - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
8437 + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05 Ralf Baechle
8438 * Copyright (C) 1996 Stoned Elipot
8439 * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
8440 */
8441 @@ -71,6 +71,8 @@
8442 extern struct rtc_ops no_rtc_ops;
8443 struct rtc_ops *rtc_ops;
8444
8445 +EXPORT_SYMBOL(rtc_ops);
8446 +
8447 #ifdef CONFIG_PC_KEYB
8448 struct kbd_ops *kbd_ops;
8449 #endif
8450 @@ -132,10 +134,6 @@
8451 */
8452 load_mmu();
8453
8454 - /* Disable coprocessors and set FPU for 16/32 FPR register model */
8455 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
8456 - set_c0_status(ST0_CU0);
8457 -
8458 start_kernel();
8459 }
8460
8461 diff -Nur linux-2.4.29/arch/mips/kernel/traps.c linux-mips/arch/mips/kernel/traps.c
8462 --- linux-2.4.29/arch/mips/kernel/traps.c 2005-01-19 15:09:29.000000000 +0100
8463 +++ linux-mips/arch/mips/kernel/traps.c 2004-11-22 14:38:23.000000000 +0100
8464 @@ -887,12 +887,18 @@
8465 void __init per_cpu_trap_init(void)
8466 {
8467 unsigned int cpu = smp_processor_id();
8468 + unsigned int status_set = ST0_CU0;
8469
8470 - /* Some firmware leaves the BEV flag set, clear it. */
8471 - clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
8472 -
8473 + /*
8474 + * Disable coprocessors and 64-bit addressing and set FPU for
8475 + * the 16/32 FPR register model. Reset the BEV flag that some
8476 + * firmware may have left set and the TS bit (for IP27). Set
8477 + * XX for ISA IV code to work.
8478 + */
8479 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
8480 - set_c0_status(ST0_XX);
8481 + status_set |= ST0_XX;
8482 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
8483 + status_set);
8484
8485 /*
8486 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
8487 @@ -902,7 +908,7 @@
8488 set_c0_cause(CAUSEF_IV);
8489
8490 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
8491 - write_c0_context(cpu << 23);
8492 + TLBMISS_HANDLER_SETUP();
8493
8494 atomic_inc(&init_mm.mm_count);
8495 current->active_mm = &init_mm;
8496 @@ -918,8 +924,6 @@
8497 extern char except_vec4;
8498 unsigned long i;
8499
8500 - per_cpu_trap_init();
8501 -
8502 /* Copy the generic exception handler code to it's final destination. */
8503 memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
8504
8505 @@ -1020,10 +1024,5 @@
8506
8507 flush_icache_range(KSEG0, KSEG0 + 0x400);
8508
8509 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
8510 - current->active_mm = &init_mm;
8511 -
8512 - /* XXX Must be done for all CPUs */
8513 - current_cpu_data.asid_cache = ASID_FIRST_VERSION;
8514 - TLBMISS_HANDLER_SETUP();
8515 + per_cpu_trap_init();
8516 }
8517 diff -Nur linux-2.4.29/arch/mips/lib/rtc-no.c linux-mips/arch/mips/lib/rtc-no.c
8518 --- linux-2.4.29/arch/mips/lib/rtc-no.c 2004-02-18 14:36:30.000000000 +0100
8519 +++ linux-mips/arch/mips/lib/rtc-no.c 2005-01-13 22:15:57.000000000 +0100
8520 @@ -6,10 +6,9 @@
8521 * Stub RTC routines to keep Linux from crashing on machine which don't
8522 * have a RTC chip.
8523 *
8524 - * Copyright (C) 1998, 2001 by Ralf Baechle
8525 + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
8526 */
8527 #include <linux/kernel.h>
8528 -#include <linux/module.h>
8529 #include <linux/mc146818rtc.h>
8530
8531 static unsigned int shouldnt_happen(void)
8532 @@ -29,5 +28,3 @@
8533 .rtc_write_data = (void *) &shouldnt_happen,
8534 .rtc_bcd_mode = (void *) &shouldnt_happen
8535 };
8536 -
8537 -EXPORT_SYMBOL(rtc_ops);
8538 diff -Nur linux-2.4.29/arch/mips/lib/rtc-std.c linux-mips/arch/mips/lib/rtc-std.c
8539 --- linux-2.4.29/arch/mips/lib/rtc-std.c 2004-02-18 14:36:30.000000000 +0100
8540 +++ linux-mips/arch/mips/lib/rtc-std.c 2005-01-13 22:15:57.000000000 +0100
8541 @@ -5,9 +5,8 @@
8542 *
8543 * RTC routines for PC style attached Dallas chip.
8544 *
8545 - * Copyright (C) 1998, 2001 by Ralf Baechle
8546 + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
8547 */
8548 -#include <linux/module.h>
8549 #include <linux/mc146818rtc.h>
8550 #include <asm/io.h>
8551
8552 @@ -33,5 +32,3 @@
8553 &std_rtc_write_data,
8554 &std_rtc_bcd_mode
8555 };
8556 -
8557 -EXPORT_SYMBOL(rtc_ops);
8558 diff -Nur linux-2.4.29/arch/mips/mm/c-r4k.c linux-mips/arch/mips/mm/c-r4k.c
8559 --- linux-2.4.29/arch/mips/mm/c-r4k.c 2005-01-19 15:09:29.000000000 +0100
8560 +++ linux-mips/arch/mips/mm/c-r4k.c 2005-02-12 04:05:35.000000000 +0100
8561 @@ -867,9 +867,16 @@
8562 * normally they'd suffer from aliases but magic in the hardware deals
8563 * with that for us so we don't need to take care ourselves.
8564 */
8565 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
8566 - if (c->dcache.waysize > PAGE_SIZE)
8567 - c->dcache.flags |= MIPS_CACHE_ALIASES;
8568 + switch (c->cputype) {
8569 + case CPU_R10000:
8570 + case CPU_R12000:
8571 + break;
8572 + case CPU_24K:
8573 + if (!(read_c0_config7() & (1 << 16)))
8574 + default:
8575 + if (c->dcache.waysize > PAGE_SIZE)
8576 + c->dcache.flags |= MIPS_CACHE_ALIASES;
8577 + }
8578
8579 switch (c->cputype) {
8580 case CPU_20KC:
8581 @@ -1069,9 +1076,6 @@
8582 probe_pcache();
8583 setup_scache();
8584
8585 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
8586 - c->dcache.flags |= MIPS_CACHE_ALIASES;
8587 -
8588 r4k_blast_dcache_page_setup();
8589 r4k_blast_dcache_page_indexed_setup();
8590 r4k_blast_dcache_setup();
8591 diff -Nur linux-2.4.29/arch/mips/mm/cerr-sb1.c linux-mips/arch/mips/mm/cerr-sb1.c
8592 --- linux-2.4.29/arch/mips/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
8593 +++ linux-mips/arch/mips/mm/cerr-sb1.c 2004-12-13 18:37:23.000000000 +0100
8594 @@ -252,14 +252,14 @@
8595
8596 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
8597 static const uint64_t mask_72_64[8] = {
8598 - 0x0738C808099264FFL,
8599 - 0x38C808099264FF07L,
8600 - 0xC808099264FF0738L,
8601 - 0x08099264FF0738C8L,
8602 - 0x099264FF0738C808L,
8603 - 0x9264FF0738C80809L,
8604 - 0x64FF0738C8080992L,
8605 - 0xFF0738C808099264L
8606 + 0x0738C808099264FFULL,
8607 + 0x38C808099264FF07ULL,
8608 + 0xC808099264FF0738ULL,
8609 + 0x08099264FF0738C8ULL,
8610 + 0x099264FF0738C808ULL,
8611 + 0x9264FF0738C80809ULL,
8612 + 0x64FF0738C8080992ULL,
8613 + 0xFF0738C808099264ULL
8614 };
8615
8616 /* Calculate the parity on a range of bits */
8617 @@ -331,9 +331,9 @@
8618 ((lru >> 4) & 0x3),
8619 ((lru >> 6) & 0x3));
8620 }
8621 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
8622 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
8623 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
8624 - va |= 0x3FFFF00000000000;
8625 + va |= 0x3FFFF00000000000ULL;
8626 valid = ((taghi >> 29) & 1);
8627 if (valid) {
8628 tlo_tmp = taglo & 0xfff3ff;
8629 @@ -474,7 +474,7 @@
8630 : "r" ((way << 13) | addr));
8631
8632 taglo = ((unsigned long long)taglohi << 32) | taglolo;
8633 - pa = (taglo & 0xFFFFFFE000) | addr;
8634 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
8635 if (way == 0) {
8636 lru = (taghi >> 14) & 0xff;
8637 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
8638 diff -Nur linux-2.4.29/arch/mips/mm/tlb-r4k.c linux-mips/arch/mips/mm/tlb-r4k.c
8639 --- linux-2.4.29/arch/mips/mm/tlb-r4k.c 2005-01-19 15:09:29.000000000 +0100
8640 +++ linux-mips/arch/mips/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
8641 @@ -3,17 +3,12 @@
8642 * License. See the file "COPYING" in the main directory of this archive
8643 * for more details.
8644 *
8645 - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
8646 - *
8647 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
8648 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
8649 - *
8650 - * To do:
8651 - *
8652 - * - this code is a overbloated pig
8653 - * - many of the bug workarounds are not efficient at all, but at
8654 - * least they are functional ...
8655 + * Carsten Langgaard, carstenl@mips.com
8656 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
8657 */
8658 +#include <linux/config.h>
8659 #include <linux/init.h>
8660 #include <linux/sched.h>
8661 #include <linux/mm.h>
8662 @@ -25,9 +20,6 @@
8663 #include <asm/pgtable.h>
8664 #include <asm/system.h>
8665
8666 -#undef DEBUG_TLB
8667 -#undef DEBUG_TLBUPDATE
8668 -
8669 extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
8670
8671 /* CP0 hazard avoidance. */
8672 @@ -41,33 +33,23 @@
8673 unsigned long old_ctx;
8674 int entry;
8675
8676 -#ifdef DEBUG_TLB
8677 - printk("[tlball]");
8678 -#endif
8679 -
8680 local_irq_save(flags);
8681 /* Save old context and create impossible VPN2 value */
8682 old_ctx = read_c0_entryhi();
8683 write_c0_entrylo0(0);
8684 write_c0_entrylo1(0);
8685 - BARRIER;
8686
8687 entry = read_c0_wired();
8688
8689 /* Blast 'em all away. */
8690 while (entry < current_cpu_data.tlbsize) {
8691 - /*
8692 - * Make sure all entries differ. If they're not different
8693 - * MIPS32 will take revenge ...
8694 - */
8695 write_c0_entryhi(KSEG0 + entry*0x2000);
8696 write_c0_index(entry);
8697 - BARRIER;
8698 + mtc0_tlbw_hazard();
8699 tlb_write_indexed();
8700 - BARRIER;
8701 entry++;
8702 }
8703 - BARRIER;
8704 + tlbw_use_hazard();
8705 write_c0_entryhi(old_ctx);
8706 local_irq_restore(flags);
8707 }
8708 @@ -76,12 +58,8 @@
8709 {
8710 int cpu = smp_processor_id();
8711
8712 - if (cpu_context(cpu, mm) != 0) {
8713 -#ifdef DEBUG_TLB
8714 - printk("[tlbmm<%d>]", cpu_context(cpu, mm));
8715 -#endif
8716 + if (cpu_context(cpu, mm) != 0)
8717 drop_mmu_context(mm,cpu);
8718 - }
8719 }
8720
8721 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
8722 @@ -93,10 +71,6 @@
8723 unsigned long flags;
8724 int size;
8725
8726 -#ifdef DEBUG_TLB
8727 - printk("[tlbrange<%02x,%08lx,%08lx>]",
8728 - cpu_asid(cpu, mm), start, end);
8729 -#endif
8730 local_irq_save(flags);
8731 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
8732 size = (size + 1) >> 1;
8733 @@ -112,7 +86,7 @@
8734
8735 write_c0_entryhi(start | newpid);
8736 start += (PAGE_SIZE << 1);
8737 - BARRIER;
8738 + mtc0_tlbw_hazard();
8739 tlb_probe();
8740 BARRIER;
8741 idx = read_c0_index();
8742 @@ -122,10 +96,10 @@
8743 continue;
8744 /* Make sure all entries differ. */
8745 write_c0_entryhi(KSEG0 + idx*0x2000);
8746 - BARRIER;
8747 + mtc0_tlbw_hazard();
8748 tlb_write_indexed();
8749 - BARRIER;
8750 }
8751 + tlbw_use_hazard();
8752 write_c0_entryhi(oldpid);
8753 } else {
8754 drop_mmu_context(mm, cpu);
8755 @@ -138,34 +112,30 @@
8756 {
8757 int cpu = smp_processor_id();
8758
8759 - if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
8760 + if (cpu_context(cpu, vma->vm_mm) != 0) {
8761 unsigned long flags;
8762 - int oldpid, newpid, idx;
8763 + unsigned long oldpid, newpid, idx;
8764
8765 -#ifdef DEBUG_TLB
8766 - printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
8767 - page);
8768 -#endif
8769 newpid = cpu_asid(cpu, vma->vm_mm);
8770 page &= (PAGE_MASK << 1);
8771 local_irq_save(flags);
8772 oldpid = read_c0_entryhi();
8773 write_c0_entryhi(page | newpid);
8774 - BARRIER;
8775 + mtc0_tlbw_hazard();
8776 tlb_probe();
8777 BARRIER;
8778 idx = read_c0_index();
8779 write_c0_entrylo0(0);
8780 write_c0_entrylo1(0);
8781 - if(idx < 0)
8782 + if (idx < 0)
8783 goto finish;
8784 /* Make sure all entries differ. */
8785 write_c0_entryhi(KSEG0+idx*0x2000);
8786 - BARRIER;
8787 + mtc0_tlbw_hazard();
8788 tlb_write_indexed();
8789 + tlbw_use_hazard();
8790
8791 finish:
8792 - BARRIER;
8793 write_c0_entryhi(oldpid);
8794 local_irq_restore(flags);
8795 }
8796 @@ -185,7 +155,7 @@
8797
8798 local_irq_save(flags);
8799 write_c0_entryhi(page);
8800 - BARRIER;
8801 + mtc0_tlbw_hazard();
8802 tlb_probe();
8803 BARRIER;
8804 idx = read_c0_index();
8805 @@ -194,18 +164,19 @@
8806 if (idx >= 0) {
8807 /* Make sure all entries differ. */
8808 write_c0_entryhi(KSEG0+idx*0x2000);
8809 + mtc0_tlbw_hazard();
8810 tlb_write_indexed();
8811 + tlbw_use_hazard();
8812 }
8813 - BARRIER;
8814 write_c0_entryhi(oldpid);
8815 +
8816 local_irq_restore(flags);
8817 }
8818
8819 EXPORT_SYMBOL(local_flush_tlb_one);
8820
8821 -/* We will need multiple versions of update_mmu_cache(), one that just
8822 - * updates the TLB with the new pte(s), and another which also checks
8823 - * for the R4k "end of page" hardware bug and does the needy.
8824 +/*
8825 + * Updates the TLB with the new pte(s).
8826 */
8827 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
8828 {
8829 @@ -223,25 +194,16 @@
8830
8831 pid = read_c0_entryhi() & ASID_MASK;
8832
8833 -#ifdef DEBUG_TLB
8834 - if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
8835 - (cpu_context(vma->vm_mm) == 0)) {
8836 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
8837 - "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
8838 - }
8839 -#endif
8840 -
8841 local_irq_save(flags);
8842 address &= (PAGE_MASK << 1);
8843 write_c0_entryhi(address | pid);
8844 pgdp = pgd_offset(vma->vm_mm, address);
8845 - BARRIER;
8846 + mtc0_tlbw_hazard();
8847 tlb_probe();
8848 BARRIER;
8849 pmdp = pmd_offset(pgdp, address);
8850 idx = read_c0_index();
8851 ptep = pte_offset(pmdp, address);
8852 - BARRIER;
8853 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
8854 write_c0_entrylo0(ptep->pte_high);
8855 ptep++;
8856 @@ -251,15 +213,13 @@
8857 write_c0_entrylo1(pte_val(*ptep) >> 6);
8858 #endif
8859 write_c0_entryhi(address | pid);
8860 - BARRIER;
8861 - if (idx < 0) {
8862 + mtc0_tlbw_hazard();
8863 + if (idx < 0)
8864 tlb_write_random();
8865 - } else {
8866 + else
8867 tlb_write_indexed();
8868 - }
8869 - BARRIER;
8870 + tlbw_use_hazard();
8871 write_c0_entryhi(pid);
8872 - BARRIER;
8873 local_irq_restore(flags);
8874 }
8875
8876 @@ -279,24 +239,26 @@
8877 asid = read_c0_entryhi() & ASID_MASK;
8878 write_c0_entryhi(address | asid);
8879 pgdp = pgd_offset(vma->vm_mm, address);
8880 + mtc0_tlbw_hazard();
8881 tlb_probe();
8882 + BARRIER;
8883 pmdp = pmd_offset(pgdp, address);
8884 idx = read_c0_index();
8885 ptep = pte_offset(pmdp, address);
8886 write_c0_entrylo0(pte_val(*ptep++) >> 6);
8887 write_c0_entrylo1(pte_val(*ptep) >> 6);
8888 - BARRIER;
8889 + mtc0_tlbw_hazard();
8890 if (idx < 0)
8891 tlb_write_random();
8892 else
8893 tlb_write_indexed();
8894 - BARRIER;
8895 + tlbw_use_hazard();
8896 local_irq_restore(flags);
8897 }
8898 #endif
8899
8900 void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
8901 - unsigned long entryhi, unsigned long pagemask)
8902 + unsigned long entryhi, unsigned long pagemask)
8903 {
8904 unsigned long flags;
8905 unsigned long wired;
8906 @@ -315,9 +277,9 @@
8907 write_c0_entryhi(entryhi);
8908 write_c0_entrylo0(entrylo0);
8909 write_c0_entrylo1(entrylo1);
8910 - BARRIER;
8911 + mtc0_tlbw_hazard();
8912 tlb_write_indexed();
8913 - BARRIER;
8914 + tlbw_use_hazard();
8915
8916 write_c0_entryhi(old_ctx);
8917 BARRIER;
8918 @@ -355,17 +317,15 @@
8919 }
8920
8921 write_c0_index(temp_tlb_entry);
8922 - BARRIER;
8923 write_c0_pagemask(pagemask);
8924 write_c0_entryhi(entryhi);
8925 write_c0_entrylo0(entrylo0);
8926 write_c0_entrylo1(entrylo1);
8927 - BARRIER;
8928 + mtc0_tlbw_hazard();
8929 tlb_write_indexed();
8930 - BARRIER;
8931 + tlbw_use_hazard();
8932
8933 write_c0_entryhi(old_ctx);
8934 - BARRIER;
8935 write_c0_pagemask(old_pagemask);
8936 out:
8937 local_irq_restore(flags);
8938 @@ -375,7 +335,7 @@
8939 static void __init probe_tlb(unsigned long config)
8940 {
8941 struct cpuinfo_mips *c = &current_cpu_data;
8942 - unsigned int reg;
8943 + unsigned int config1;
8944
8945 /*
8946 * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
8947 @@ -385,16 +345,16 @@
8948 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
8949 return;
8950
8951 - reg = read_c0_config1();
8952 + config1 = read_c0_config1();
8953 if (!((config >> 7) & 3))
8954 panic("No TLB present");
8955
8956 - c->tlbsize = ((reg >> 25) & 0x3f) + 1;
8957 + c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
8958 }
8959
8960 void __init r4k_tlb_init(void)
8961 {
8962 - u32 config = read_c0_config();
8963 + unsigned int config = read_c0_config();
8964
8965 /*
8966 * You should never change this register:
8967 diff -Nur linux-2.4.29/arch/mips/mm/tlbex-mips32.S linux-mips/arch/mips/mm/tlbex-mips32.S
8968 --- linux-2.4.29/arch/mips/mm/tlbex-mips32.S 2004-02-18 14:36:30.000000000 +0100
8969 +++ linux-mips/arch/mips/mm/tlbex-mips32.S 2004-11-29 00:33:15.000000000 +0100
8970 @@ -196,7 +196,7 @@
8971 .set noat; \
8972 SAVE_ALL; \
8973 mfc0 a2, CP0_BADVADDR; \
8974 - STI; \
8975 + KMODE; \
8976 .set at; \
8977 move a0, sp; \
8978 jal do_page_fault; \
8979 diff -Nur linux-2.4.29/arch/mips/mm/tlbex-r4k.S linux-mips/arch/mips/mm/tlbex-r4k.S
8980 --- linux-2.4.29/arch/mips/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
8981 +++ linux-mips/arch/mips/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
8982 @@ -184,13 +184,10 @@
8983 P_MTC0 k0, CP0_ENTRYLO0 # load it
8984 PTE_SRL k1, k1, 6 # convert to entrylo1
8985 P_MTC0 k1, CP0_ENTRYLO1 # load it
8986 - b 1f
8987 - rm9000_tlb_hazard
8988 + mtc0_tlbw_hazard
8989 tlbwr # write random tlb entry
8990 -1:
8991 - nop
8992 - rm9000_tlb_hazard
8993 - eret # return from trap
8994 + tlbw_eret_hazard
8995 + eret
8996 END(except_vec0_r4000)
8997
8998 /* TLB refill, EXL == 0, R4600 version */
8999 @@ -468,13 +465,10 @@
9000 PTE_PRESENT(k0, k1, nopage_tlbl)
9001 PTE_MAKEVALID(k0, k1)
9002 PTE_RELOAD(k1, k0)
9003 - rm9000_tlb_hazard
9004 - nop
9005 - b 1f
9006 - tlbwi
9007 -1:
9008 + mtc0_tlbw_hazard
9009 + tlbwi
9010 nop
9011 - rm9000_tlb_hazard
9012 + tlbw_eret_hazard
9013 .set mips3
9014 eret
9015 .set mips0
9016 @@ -496,13 +490,10 @@
9017 PTE_WRITABLE(k0, k1, nopage_tlbs)
9018 PTE_MAKEWRITE(k0, k1)
9019 PTE_RELOAD(k1, k0)
9020 - rm9000_tlb_hazard
9021 - nop
9022 - b 1f
9023 - tlbwi
9024 -1:
9025 + mtc0_tlbw_hazard
9026 + tlbwi
9027 nop
9028 - rm9000_tlb_hazard
9029 + tlbw_eret_hazard
9030 .set mips3
9031 eret
9032 .set mips0
9033 @@ -529,13 +520,10 @@
9034
9035 /* Now reload the entry into the tlb. */
9036 PTE_RELOAD(k1, k0)
9037 - rm9000_tlb_hazard
9038 - nop
9039 - b 1f
9040 - tlbwi
9041 -1:
9042 - rm9000_tlb_hazard
9043 + mtc0_tlbw_hazard
9044 + tlbwi
9045 nop
9046 + tlbw_eret_hazard
9047 .set mips3
9048 eret
9049 .set mips0
9050 diff -Nur linux-2.4.29/arch/mips64/defconfig linux-mips/arch/mips64/defconfig
9051 --- linux-2.4.29/arch/mips64/defconfig 2005-01-19 15:09:30.000000000 +0100
9052 +++ linux-mips/arch/mips64/defconfig 2005-01-20 03:19:22.000000000 +0100
9053 @@ -470,6 +470,7 @@
9054 # CONFIG_SCSI_MEGARAID is not set
9055 # CONFIG_SCSI_MEGARAID2 is not set
9056 # CONFIG_SCSI_SATA is not set
9057 +# CONFIG_SCSI_SATA_AHCI is not set
9058 # CONFIG_SCSI_SATA_SVW is not set
9059 # CONFIG_SCSI_ATA_PIIX is not set
9060 # CONFIG_SCSI_SATA_NV is not set
9061 diff -Nur linux-2.4.29/arch/mips64/defconfig-atlas linux-mips/arch/mips64/defconfig-atlas
9062 --- linux-2.4.29/arch/mips64/defconfig-atlas 2005-01-19 15:09:30.000000000 +0100
9063 +++ linux-mips/arch/mips64/defconfig-atlas 2005-01-09 20:34:01.000000000 +0100
9064 @@ -232,11 +232,6 @@
9065 #
9066 # CONFIG_IPX is not set
9067 # CONFIG_ATALK is not set
9068 -
9069 -#
9070 -# Appletalk devices
9071 -#
9072 -# CONFIG_DEV_APPLETALK is not set
9073 # CONFIG_DECNET is not set
9074 # CONFIG_BRIDGE is not set
9075 # CONFIG_X25 is not set
9076 @@ -314,6 +309,7 @@
9077 # CONFIG_SCSI_MEGARAID is not set
9078 # CONFIG_SCSI_MEGARAID2 is not set
9079 # CONFIG_SCSI_SATA is not set
9080 +# CONFIG_SCSI_SATA_AHCI is not set
9081 # CONFIG_SCSI_SATA_SVW is not set
9082 # CONFIG_SCSI_ATA_PIIX is not set
9083 # CONFIG_SCSI_SATA_NV is not set
9084 diff -Nur linux-2.4.29/arch/mips64/defconfig-decstation linux-mips/arch/mips64/defconfig-decstation
9085 --- linux-2.4.29/arch/mips64/defconfig-decstation 2005-01-19 15:09:30.000000000 +0100
9086 +++ linux-mips/arch/mips64/defconfig-decstation 2005-01-09 20:34:01.000000000 +0100
9087 @@ -224,11 +224,6 @@
9088 #
9089 # CONFIG_IPX is not set
9090 # CONFIG_ATALK is not set
9091 -
9092 -#
9093 -# Appletalk devices
9094 -#
9095 -# CONFIG_DEV_APPLETALK is not set
9096 # CONFIG_DECNET is not set
9097 # CONFIG_BRIDGE is not set
9098 # CONFIG_X25 is not set
9099 @@ -307,6 +302,7 @@
9100 # CONFIG_SCSI_MEGARAID is not set
9101 # CONFIG_SCSI_MEGARAID2 is not set
9102 # CONFIG_SCSI_SATA is not set
9103 +# CONFIG_SCSI_SATA_AHCI is not set
9104 # CONFIG_SCSI_SATA_SVW is not set
9105 # CONFIG_SCSI_ATA_PIIX is not set
9106 # CONFIG_SCSI_SATA_NV is not set
9107 diff -Nur linux-2.4.29/arch/mips64/defconfig-ip22 linux-mips/arch/mips64/defconfig-ip22
9108 --- linux-2.4.29/arch/mips64/defconfig-ip22 2005-01-19 15:09:31.000000000 +0100
9109 +++ linux-mips/arch/mips64/defconfig-ip22 2005-01-09 20:34:01.000000000 +0100
9110 @@ -235,11 +235,6 @@
9111 #
9112 # CONFIG_IPX is not set
9113 # CONFIG_ATALK is not set
9114 -
9115 -#
9116 -# Appletalk devices
9117 -#
9118 -# CONFIG_DEV_APPLETALK is not set
9119 # CONFIG_DECNET is not set
9120 # CONFIG_BRIDGE is not set
9121 # CONFIG_X25 is not set
9122 @@ -319,6 +314,7 @@
9123 # CONFIG_SCSI_MEGARAID is not set
9124 # CONFIG_SCSI_MEGARAID2 is not set
9125 # CONFIG_SCSI_SATA is not set
9126 +# CONFIG_SCSI_SATA_AHCI is not set
9127 # CONFIG_SCSI_SATA_SVW is not set
9128 # CONFIG_SCSI_ATA_PIIX is not set
9129 # CONFIG_SCSI_SATA_NV is not set
9130 diff -Nur linux-2.4.29/arch/mips64/defconfig-ip27 linux-mips/arch/mips64/defconfig-ip27
9131 --- linux-2.4.29/arch/mips64/defconfig-ip27 2005-01-19 15:09:31.000000000 +0100
9132 +++ linux-mips/arch/mips64/defconfig-ip27 2005-01-20 03:19:22.000000000 +0100
9133 @@ -470,6 +470,7 @@
9134 # CONFIG_SCSI_MEGARAID is not set
9135 # CONFIG_SCSI_MEGARAID2 is not set
9136 # CONFIG_SCSI_SATA is not set
9137 +# CONFIG_SCSI_SATA_AHCI is not set
9138 # CONFIG_SCSI_SATA_SVW is not set
9139 # CONFIG_SCSI_ATA_PIIX is not set
9140 # CONFIG_SCSI_SATA_NV is not set
9141 diff -Nur linux-2.4.29/arch/mips64/defconfig-jaguar linux-mips/arch/mips64/defconfig-jaguar
9142 --- linux-2.4.29/arch/mips64/defconfig-jaguar 2005-01-19 15:09:31.000000000 +0100
9143 +++ linux-mips/arch/mips64/defconfig-jaguar 2005-01-09 20:34:01.000000000 +0100
9144 @@ -227,11 +227,6 @@
9145 #
9146 # CONFIG_IPX is not set
9147 # CONFIG_ATALK is not set
9148 -
9149 -#
9150 -# Appletalk devices
9151 -#
9152 -# CONFIG_DEV_APPLETALK is not set
9153 # CONFIG_DECNET is not set
9154 # CONFIG_BRIDGE is not set
9155 # CONFIG_X25 is not set
9156 diff -Nur linux-2.4.29/arch/mips64/defconfig-malta linux-mips/arch/mips64/defconfig-malta
9157 --- linux-2.4.29/arch/mips64/defconfig-malta 2005-01-19 15:09:31.000000000 +0100
9158 +++ linux-mips/arch/mips64/defconfig-malta 2005-01-09 20:34:01.000000000 +0100
9159 @@ -235,11 +235,6 @@
9160 #
9161 # CONFIG_IPX is not set
9162 # CONFIG_ATALK is not set
9163 -
9164 -#
9165 -# Appletalk devices
9166 -#
9167 -# CONFIG_DEV_APPLETALK is not set
9168 # CONFIG_DECNET is not set
9169 # CONFIG_BRIDGE is not set
9170 # CONFIG_X25 is not set
9171 @@ -317,6 +312,7 @@
9172 # CONFIG_SCSI_MEGARAID is not set
9173 # CONFIG_SCSI_MEGARAID2 is not set
9174 # CONFIG_SCSI_SATA is not set
9175 +# CONFIG_SCSI_SATA_AHCI is not set
9176 # CONFIG_SCSI_SATA_SVW is not set
9177 # CONFIG_SCSI_ATA_PIIX is not set
9178 # CONFIG_SCSI_SATA_NV is not set
9179 diff -Nur linux-2.4.29/arch/mips64/defconfig-ocelotc linux-mips/arch/mips64/defconfig-ocelotc
9180 --- linux-2.4.29/arch/mips64/defconfig-ocelotc 2005-01-19 15:09:31.000000000 +0100
9181 +++ linux-mips/arch/mips64/defconfig-ocelotc 2005-01-09 20:34:01.000000000 +0100
9182 @@ -231,11 +231,6 @@
9183 #
9184 # CONFIG_IPX is not set
9185 # CONFIG_ATALK is not set
9186 -
9187 -#
9188 -# Appletalk devices
9189 -#
9190 -# CONFIG_DEV_APPLETALK is not set
9191 # CONFIG_DECNET is not set
9192 # CONFIG_BRIDGE is not set
9193 # CONFIG_X25 is not set
9194 diff -Nur linux-2.4.29/arch/mips64/defconfig-sb1250-swarm linux-mips/arch/mips64/defconfig-sb1250-swarm
9195 --- linux-2.4.29/arch/mips64/defconfig-sb1250-swarm 2005-01-19 15:09:31.000000000 +0100
9196 +++ linux-mips/arch/mips64/defconfig-sb1250-swarm 2005-01-09 20:34:01.000000000 +0100
9197 @@ -90,6 +90,7 @@
9198 # CONFIG_SIBYTE_TBPROF is not set
9199 CONFIG_SIBYTE_GENBUS_IDE=y
9200 CONFIG_SMP_CAPABLE=y
9201 +CONFIG_MIPS_RTC=y
9202 # CONFIG_SNI_RM200_PCI is not set
9203 # CONFIG_TANBAC_TB0226 is not set
9204 # CONFIG_TANBAC_TB0229 is not set
9205 @@ -253,11 +254,6 @@
9206 #
9207 # CONFIG_IPX is not set
9208 # CONFIG_ATALK is not set
9209 -
9210 -#
9211 -# Appletalk devices
9212 -#
9213 -# CONFIG_DEV_APPLETALK is not set
9214 # CONFIG_DECNET is not set
9215 # CONFIG_BRIDGE is not set
9216 # CONFIG_X25 is not set
9217 diff -Nur linux-2.4.29/arch/mips64/kernel/binfmt_elfn32.c linux-mips/arch/mips64/kernel/binfmt_elfn32.c
9218 --- linux-2.4.29/arch/mips64/kernel/binfmt_elfn32.c 2003-08-25 13:44:40.000000000 +0200
9219 +++ linux-mips/arch/mips64/kernel/binfmt_elfn32.c 2005-01-31 12:59:30.000000000 +0100
9220 @@ -116,4 +116,7 @@
9221 #undef MODULE_DESCRIPTION
9222 #undef MODULE_AUTHOR
9223
9224 +#undef TASK_SIZE
9225 +#define TASK_SIZE TASK_SIZE32
9226 +
9227 #include "../../../fs/binfmt_elf.c"
9228 diff -Nur linux-2.4.29/arch/mips64/kernel/binfmt_elfo32.c linux-mips/arch/mips64/kernel/binfmt_elfo32.c
9229 --- linux-2.4.29/arch/mips64/kernel/binfmt_elfo32.c 2003-08-25 13:44:40.000000000 +0200
9230 +++ linux-mips/arch/mips64/kernel/binfmt_elfo32.c 2005-01-31 12:59:30.000000000 +0100
9231 @@ -137,4 +137,7 @@
9232 #undef MODULE_DESCRIPTION
9233 #undef MODULE_AUTHOR
9234
9235 +#undef TASK_SIZE
9236 +#define TASK_SIZE TASK_SIZE32
9237 +
9238 #include "../../../fs/binfmt_elf.c"
9239 diff -Nur linux-2.4.29/arch/mips64/kernel/head.S linux-mips/arch/mips64/kernel/head.S
9240 --- linux-2.4.29/arch/mips64/kernel/head.S 2004-02-18 14:36:30.000000000 +0100
9241 +++ linux-mips/arch/mips64/kernel/head.S 2004-11-22 14:38:26.000000000 +0100
9242 @@ -91,6 +91,21 @@
9243 __INIT
9244
9245 NESTED(kernel_entry, 16, sp) # kernel entry point
9246 + .set push
9247 + /*
9248 + * For the moment disable interrupts, mark the kernel mode and
9249 + * set ST0_KX so that the CPU does not spit fire when using
9250 + * 64-bit addresses. A full initialization of the CPU's status
9251 + * register is done later in per_cpu_trap_init().
9252 + */
9253 + mfc0 t0, CP0_STATUS
9254 + or t0, ST0_CU0|ST0_KX|0x1f
9255 + xor t0, 0x1f
9256 + mtc0 t0, CP0_STATUS
9257 +
9258 + .set noreorder
9259 + sll zero,3 # ehb
9260 + .set reorder
9261
9262 ori sp, 0xf # align stack on 16 byte.
9263 xori sp, 0xf
9264 @@ -103,8 +118,6 @@
9265
9266 ARC64_TWIDDLE_PC
9267
9268 - CLI # disable interrupts
9269 -
9270 /*
9271 * The firmware/bootloader passes argc/argp/envp
9272 * to us as arguments. But clear bss first because
9273 @@ -125,6 +138,7 @@
9274 dsubu sp, 4*SZREG # init stack pointer
9275
9276 j init_arch
9277 + .set pop
9278 END(kernel_entry)
9279
9280 #ifdef CONFIG_SMP
9281 @@ -133,6 +147,23 @@
9282 * function after setting up the stack and gp registers.
9283 */
9284 NESTED(smp_bootstrap, 16, sp)
9285 + .set push
9286 + /*
9287 + * For the moment disable interrupts and bootstrap exception
9288 + * vectors, mark the kernel mode and set ST0_KX so that the CPU
9289 + * does not spit fire when using 64-bit addresses. A full
9290 + * initialization of the CPU's status register is done later in
9291 + * per_cpu_trap_init().
9292 + */
9293 + mfc0 t0, CP0_STATUS
9294 + or t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
9295 + xor t0, ST0_BEV|0x1f
9296 + mtc0 t0, CP0_STATUS
9297 +
9298 + .set noreorder
9299 + sll zero,3 # ehb
9300 + .set reorder
9301 +
9302 #ifdef CONFIG_SGI_IP27
9303 GET_NASID_ASM t1
9304 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
9305 @@ -146,19 +177,8 @@
9306 ARC64_TWIDDLE_PC
9307 #endif /* CONFIG_SGI_IP27 */
9308
9309 - CLI
9310 -
9311 - /*
9312 - * For the moment set ST0_KU so the CPU will not spit fire when
9313 - * executing 64-bit instructions. The full initialization of the
9314 - * CPU's status register is done later in per_cpu_trap_init().
9315 - */
9316 - mfc0 t0, CP0_STATUS
9317 - or t0, ST0_KX
9318 - mtc0 t0, CP0_STATUS
9319 -
9320 jal start_secondary # XXX: IP27: cboot
9321 -
9322 + .set pop
9323 END(smp_bootstrap)
9324 #endif /* CONFIG_SMP */
9325
9326 diff -Nur linux-2.4.29/arch/mips64/kernel/ioctl32.c linux-mips/arch/mips64/kernel/ioctl32.c
9327 --- linux-2.4.29/arch/mips64/kernel/ioctl32.c 2005-01-19 15:09:31.000000000 +0100
9328 +++ linux-mips/arch/mips64/kernel/ioctl32.c 2005-01-31 12:59:30.000000000 +0100
9329 @@ -2352,7 +2352,7 @@
9330 IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
9331 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
9332 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
9333 - IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
9334 + IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
9335 IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
9336 IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
9337 IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
9338 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_64.S linux-mips/arch/mips64/kernel/scall_64.S
9339 --- linux-2.4.29/arch/mips64/kernel/scall_64.S 2005-01-19 15:09:32.000000000 +0100
9340 +++ linux-mips/arch/mips64/kernel/scall_64.S 2005-02-12 04:05:40.000000000 +0100
9341 @@ -102,15 +102,14 @@
9342
9343 trace_a_syscall:
9344 SAVE_STATIC
9345 - sd t2,PT_R1(sp)
9346 + move s0, t2
9347 jal syscall_trace
9348 - ld t2,PT_R1(sp)
9349
9350 ld a0, PT_R4(sp) # Restore argument registers
9351 ld a1, PT_R5(sp)
9352 ld a2, PT_R6(sp)
9353 ld a3, PT_R7(sp)
9354 - jalr t2
9355 + jalr s0
9356
9357 li t0, -EMAXERRNO - 1 # error?
9358 sltu t0, t0, v0
9359 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_n32.S linux-mips/arch/mips64/kernel/scall_n32.S
9360 --- linux-2.4.29/arch/mips64/kernel/scall_n32.S 2005-01-19 15:09:32.000000000 +0100
9361 +++ linux-mips/arch/mips64/kernel/scall_n32.S 2005-02-12 04:05:40.000000000 +0100
9362 @@ -106,15 +106,14 @@
9363
9364 trace_a_syscall:
9365 SAVE_STATIC
9366 - sd t2,PT_R1(sp)
9367 + move s0, t2
9368 jal syscall_trace
9369 - ld t2,PT_R1(sp)
9370
9371 ld a0, PT_R4(sp) # Restore argument registers
9372 ld a1, PT_R5(sp)
9373 ld a2, PT_R6(sp)
9374 ld a3, PT_R7(sp)
9375 - jalr t2
9376 + jalr s0
9377
9378 li t0, -EMAXERRNO - 1 # error?
9379 sltu t0, t0, v0
9380 diff -Nur linux-2.4.29/arch/mips64/kernel/scall_o32.S linux-mips/arch/mips64/kernel/scall_o32.S
9381 --- linux-2.4.29/arch/mips64/kernel/scall_o32.S 2005-01-19 15:09:32.000000000 +0100
9382 +++ linux-mips/arch/mips64/kernel/scall_o32.S 2005-02-12 04:05:41.000000000 +0100
9383 @@ -118,9 +118,8 @@
9384 sd a6, PT_R10(sp)
9385 sd a7, PT_R11(sp)
9386
9387 - sd t2,PT_R1(sp)
9388 + move s0, t2
9389 jal syscall_trace
9390 - ld t2,PT_R1(sp)
9391
9392 ld a0, PT_R4(sp) # Restore argument registers
9393 ld a1, PT_R5(sp)
9394 @@ -129,7 +128,7 @@
9395 ld a4, PT_R8(sp)
9396 ld a5, PT_R9(sp)
9397
9398 - jalr t2
9399 + jalr s0
9400
9401 li t0, -EMAXERRNO - 1 # error?
9402 sltu t0, t0, v0
9403 diff -Nur linux-2.4.29/arch/mips64/kernel/setup.c linux-mips/arch/mips64/kernel/setup.c
9404 --- linux-2.4.29/arch/mips64/kernel/setup.c 2005-01-19 15:09:32.000000000 +0100
9405 +++ linux-mips/arch/mips64/kernel/setup.c 2004-11-22 14:38:26.000000000 +0100
9406 @@ -129,14 +129,6 @@
9407 */
9408 load_mmu();
9409
9410 - /*
9411 - * On IP27, I am seeing the TS bit set when the kernel is loaded.
9412 - * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
9413 - * anyway ...
9414 - */
9415 - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
9416 - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
9417 -
9418 start_kernel();
9419 }
9420
9421 diff -Nur linux-2.4.29/arch/mips64/kernel/signal_n32.c linux-mips/arch/mips64/kernel/signal_n32.c
9422 --- linux-2.4.29/arch/mips64/kernel/signal_n32.c 2005-01-19 15:09:33.000000000 +0100
9423 +++ linux-mips/arch/mips64/kernel/signal_n32.c 2005-02-12 04:05:41.000000000 +0100
9424 @@ -68,7 +68,7 @@
9425 };
9426
9427 extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9428 -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9429 +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
9430
9431 asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
9432 {
9433 diff -Nur linux-2.4.29/arch/mips64/kernel/traps.c linux-mips/arch/mips64/kernel/traps.c
9434 --- linux-2.4.29/arch/mips64/kernel/traps.c 2005-01-19 15:09:33.000000000 +0100
9435 +++ linux-mips/arch/mips64/kernel/traps.c 2004-11-22 14:38:26.000000000 +0100
9436 @@ -809,13 +809,18 @@
9437 void __init per_cpu_trap_init(void)
9438 {
9439 unsigned int cpu = smp_processor_id();
9440 + unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
9441
9442 - /* Some firmware leaves the BEV flag set, clear it. */
9443 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
9444 - set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
9445 -
9446 + /*
9447 + * Disable coprocessors, enable 64-bit addressing and set FPU
9448 + * for the 32/32 FPR register model. Reset the BEV flag that
9449 + * some firmware may have left set and the TS bit (for IP27).
9450 + * Set XX for ISA IV code to work.
9451 + */
9452 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
9453 - set_c0_status(ST0_XX);
9454 + status_set |= ST0_XX;
9455 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
9456 + status_set);
9457
9458 /*
9459 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
9460 @@ -825,13 +830,11 @@
9461 set_c0_cause(CAUSEF_IV);
9462
9463 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
9464 - write_c0_context(((long)(&pgd_current[cpu])) << 23);
9465 - write_c0_wired(0);
9466 + TLBMISS_HANDLER_SETUP();
9467
9468 atomic_inc(&init_mm.mm_count);
9469 current->active_mm = &init_mm;
9470 - if (current->mm)
9471 - BUG();
9472 + BUG_ON(current->mm);
9473 enter_lazy_tlb(&init_mm, current, cpu);
9474 }
9475
9476 @@ -842,8 +845,6 @@
9477 extern char except_vec4;
9478 unsigned long i;
9479
9480 - per_cpu_trap_init();
9481 -
9482 /* Copy the generic exception handlers to their final destination. */
9483 memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
9484 memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
9485 @@ -933,6 +934,5 @@
9486
9487 flush_icache_range(KSEG0, KSEG0 + 0x400);
9488
9489 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
9490 - current->active_mm = &init_mm;
9491 + per_cpu_trap_init();
9492 }
9493 diff -Nur linux-2.4.29/arch/mips64/mm/c-r4k.c linux-mips/arch/mips64/mm/c-r4k.c
9494 --- linux-2.4.29/arch/mips64/mm/c-r4k.c 2005-01-19 15:09:33.000000000 +0100
9495 +++ linux-mips/arch/mips64/mm/c-r4k.c 2005-02-12 04:05:41.000000000 +0100
9496 @@ -867,9 +867,16 @@
9497 * normally they'd suffer from aliases but magic in the hardware deals
9498 * with that for us so we don't need to take care ourselves.
9499 */
9500 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
9501 - if (c->dcache.waysize > PAGE_SIZE)
9502 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9503 + switch (c->cputype) {
9504 + case CPU_R10000:
9505 + case CPU_R12000:
9506 + break;
9507 + case CPU_24K:
9508 + if (!(read_c0_config7() & (1 << 16)))
9509 + default:
9510 + if (c->dcache.waysize > PAGE_SIZE)
9511 + c->dcache.flags |= MIPS_CACHE_ALIASES;
9512 + }
9513
9514 switch (c->cputype) {
9515 case CPU_20KC:
9516 @@ -1070,9 +1077,6 @@
9517 setup_scache();
9518 coherency_setup();
9519
9520 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
9521 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9522 -
9523 r4k_blast_dcache_page_setup();
9524 r4k_blast_dcache_page_indexed_setup();
9525 r4k_blast_dcache_setup();
9526 diff -Nur linux-2.4.29/arch/mips64/mm/cerr-sb1.c linux-mips/arch/mips64/mm/cerr-sb1.c
9527 --- linux-2.4.29/arch/mips64/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
9528 +++ linux-mips/arch/mips64/mm/cerr-sb1.c 2004-12-13 18:37:26.000000000 +0100
9529 @@ -252,14 +252,14 @@
9530
9531 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
9532 static const uint64_t mask_72_64[8] = {
9533 - 0x0738C808099264FFL,
9534 - 0x38C808099264FF07L,
9535 - 0xC808099264FF0738L,
9536 - 0x08099264FF0738C8L,
9537 - 0x099264FF0738C808L,
9538 - 0x9264FF0738C80809L,
9539 - 0x64FF0738C8080992L,
9540 - 0xFF0738C808099264L
9541 + 0x0738C808099264FFULL,
9542 + 0x38C808099264FF07ULL,
9543 + 0xC808099264FF0738ULL,
9544 + 0x08099264FF0738C8ULL,
9545 + 0x099264FF0738C808ULL,
9546 + 0x9264FF0738C80809ULL,
9547 + 0x64FF0738C8080992ULL,
9548 + 0xFF0738C808099264ULL
9549 };
9550
9551 /* Calculate the parity on a range of bits */
9552 @@ -331,9 +331,9 @@
9553 ((lru >> 4) & 0x3),
9554 ((lru >> 6) & 0x3));
9555 }
9556 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
9557 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
9558 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
9559 - va |= 0x3FFFF00000000000;
9560 + va |= 0x3FFFF00000000000ULL;
9561 valid = ((taghi >> 29) & 1);
9562 if (valid) {
9563 tlo_tmp = taglo & 0xfff3ff;
9564 @@ -474,7 +474,7 @@
9565 : "r" ((way << 13) | addr));
9566
9567 taglo = ((unsigned long long)taglohi << 32) | taglolo;
9568 - pa = (taglo & 0xFFFFFFE000) | addr;
9569 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
9570 if (way == 0) {
9571 lru = (taghi >> 14) & 0xff;
9572 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
9573 diff -Nur linux-2.4.29/arch/mips64/mm/tlb-r4k.c linux-mips/arch/mips64/mm/tlb-r4k.c
9574 --- linux-2.4.29/arch/mips64/mm/tlb-r4k.c 2005-01-19 15:09:33.000000000 +0100
9575 +++ linux-mips/arch/mips64/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
9576 @@ -1,24 +1,12 @@
9577 /*
9578 - * Carsten Langgaard, carstenl@mips.com
9579 - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
9580 - *
9581 - * This program is free software; you can distribute it and/or modify it
9582 - * under the terms of the GNU General Public License (Version 2) as
9583 - * published by the Free Software Foundation.
9584 - *
9585 - * This program is distributed in the hope it will be useful, but WITHOUT
9586 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
9587 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9588 + * This file is subject to the terms and conditions of the GNU General Public
9589 + * License. See the file "COPYING" in the main directory of this archive
9590 * for more details.
9591 *
9592 - * You should have received a copy of the GNU General Public License along
9593 - * with this program; if not, write to the Free Software Foundation, Inc.,
9594 - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
9595 - *
9596 - * MIPS64 CPU variant specific MMU routines.
9597 - * These routine are not optimized in any way, they are done in a generic way
9598 - * so they can be used on all MIPS64 compliant CPUs, and also done in an
9599 - * attempt not to break anything for the R4xx0 style CPUs.
9600 + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9601 + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
9602 + * Carsten Langgaard, carstenl@mips.com
9603 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
9604 */
9605 #include <linux/init.h>
9606 #include <linux/sched.h>
9607 @@ -30,9 +18,6 @@
9608 #include <asm/pgtable.h>
9609 #include <asm/system.h>
9610
9611 -#undef DEBUG_TLB
9612 -#undef DEBUG_TLBUPDATE
9613 -
9614 extern void except_vec1_r4k(void);
9615
9616 /* CP0 hazard avoidance. */
9617 @@ -46,31 +31,23 @@
9618 unsigned long old_ctx;
9619 int entry;
9620
9621 -#ifdef DEBUG_TLB
9622 - printk("[tlball]");
9623 -#endif
9624 -
9625 local_irq_save(flags);
9626 /* Save old context and create impossible VPN2 value */
9627 old_ctx = read_c0_entryhi();
9628 - write_c0_entryhi(XKPHYS);
9629 write_c0_entrylo0(0);
9630 write_c0_entrylo1(0);
9631 - BARRIER;
9632
9633 entry = read_c0_wired();
9634
9635 /* Blast 'em all away. */
9636 - while(entry < current_cpu_data.tlbsize) {
9637 - /* Make sure all entries differ. */
9638 - write_c0_entryhi(XKPHYS+entry*0x2000);
9639 + while (entry < current_cpu_data.tlbsize) {
9640 + write_c0_entryhi(XKPHYS + entry*0x2000);
9641 write_c0_index(entry);
9642 - BARRIER;
9643 + mtc0_tlbw_hazard();
9644 tlb_write_indexed();
9645 - BARRIER;
9646 entry++;
9647 }
9648 - BARRIER;
9649 + tlbw_use_hazard();
9650 write_c0_entryhi(old_ctx);
9651 local_irq_restore(flags);
9652 }
9653 @@ -79,12 +56,8 @@
9654 {
9655 int cpu = smp_processor_id();
9656
9657 - if (cpu_context(cpu, mm) != 0) {
9658 -#ifdef DEBUG_TLB
9659 - printk("[tlbmm<%d>]", mm->context);
9660 -#endif
9661 + if (cpu_context(cpu, mm) != 0)
9662 drop_mmu_context(mm,cpu);
9663 - }
9664 }
9665
9666 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
9667 @@ -96,10 +69,6 @@
9668 unsigned long flags;
9669 int size;
9670
9671 -#ifdef DEBUG_TLB
9672 - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
9673 - start, end);
9674 -#endif
9675 local_irq_save(flags);
9676 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
9677 size = (size + 1) >> 1;
9678 @@ -110,25 +79,25 @@
9679 start &= (PAGE_MASK << 1);
9680 end += ((PAGE_SIZE << 1) - 1);
9681 end &= (PAGE_MASK << 1);
9682 - while(start < end) {
9683 + while (start < end) {
9684 int idx;
9685
9686 write_c0_entryhi(start | newpid);
9687 start += (PAGE_SIZE << 1);
9688 - BARRIER;
9689 + mtc0_tlbw_hazard();
9690 tlb_probe();
9691 BARRIER;
9692 idx = read_c0_index();
9693 write_c0_entrylo0(0);
9694 write_c0_entrylo1(0);
9695 - if(idx < 0)
9696 + if (idx < 0)
9697 continue;
9698 /* Make sure all entries differ. */
9699 write_c0_entryhi(XKPHYS+idx*0x2000);
9700 - BARRIER;
9701 + mtc0_tlbw_hazard();
9702 tlb_write_indexed();
9703 - BARRIER;
9704 }
9705 + tlbw_use_hazard();
9706 write_c0_entryhi(oldpid);
9707 } else {
9708 drop_mmu_context(mm, cpu);
9709 @@ -145,28 +114,26 @@
9710 unsigned long flags;
9711 unsigned long oldpid, newpid, idx;
9712
9713 -#ifdef DEBUG_TLB
9714 - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
9715 -#endif
9716 newpid = cpu_asid(cpu, vma->vm_mm);
9717 page &= (PAGE_MASK << 1);
9718 local_irq_save(flags);
9719 oldpid = read_c0_entryhi();
9720 write_c0_entryhi(page | newpid);
9721 - BARRIER;
9722 + mtc0_tlbw_hazard();
9723 tlb_probe();
9724 BARRIER;
9725 idx = read_c0_index();
9726 write_c0_entrylo0(0);
9727 write_c0_entrylo1(0);
9728 - if(idx < 0)
9729 + if (idx < 0)
9730 goto finish;
9731 /* Make sure all entries differ. */
9732 write_c0_entryhi(XKPHYS+idx*0x2000);
9733 - BARRIER;
9734 + mtc0_tlbw_hazard();
9735 tlb_write_indexed();
9736 + tlbw_use_hazard();
9737 +
9738 finish:
9739 - BARRIER;
9740 write_c0_entryhi(oldpid);
9741 local_irq_restore(flags);
9742 }
9743 @@ -186,7 +153,7 @@
9744
9745 local_irq_save(flags);
9746 write_c0_entryhi(page);
9747 - BARRIER;
9748 + mtc0_tlbw_hazard();
9749 tlb_probe();
9750 BARRIER;
9751 idx = read_c0_index();
9752 @@ -195,10 +162,12 @@
9753 if (idx >= 0) {
9754 /* Make sure all entries differ. */
9755 write_c0_entryhi(KSEG0+idx*0x2000);
9756 + mtc0_tlbw_hazard();
9757 tlb_write_indexed();
9758 + tlbw_use_hazard();
9759 }
9760 - BARRIER;
9761 write_c0_entryhi(oldpid);
9762 +
9763 local_irq_restore(flags);
9764 }
9765
9766 @@ -208,7 +177,6 @@
9767 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
9768 {
9769 unsigned long flags;
9770 - unsigned int asid;
9771 pgd_t *pgdp;
9772 pmd_t *pmdp;
9773 pte_t *ptep;
9774 @@ -222,70 +190,58 @@
9775
9776 pid = read_c0_entryhi() & ASID_MASK;
9777
9778 -#ifdef DEBUG_TLB
9779 - if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
9780 - (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
9781 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
9782 - "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
9783 - vma->vm_mm) & ASID_MASK), pid);
9784 - }
9785 -#endif
9786 -
9787 local_irq_save(flags);
9788 address &= (PAGE_MASK << 1);
9789 - write_c0_entryhi(address | (pid));
9790 + write_c0_entryhi(address | pid);
9791 pgdp = pgd_offset(vma->vm_mm, address);
9792 - BARRIER;
9793 + mtc0_tlbw_hazard();
9794 tlb_probe();
9795 BARRIER;
9796 pmdp = pmd_offset(pgdp, address);
9797 idx = read_c0_index();
9798 ptep = pte_offset(pmdp, address);
9799 - BARRIER;
9800 write_c0_entrylo0(pte_val(*ptep++) >> 6);
9801 write_c0_entrylo1(pte_val(*ptep) >> 6);
9802 - write_c0_entryhi(address | (pid));
9803 - BARRIER;
9804 - if(idx < 0) {
9805 + write_c0_entryhi(address | pid);
9806 + mtc0_tlbw_hazard();
9807 + if (idx < 0)
9808 tlb_write_random();
9809 - } else {
9810 + else
9811 tlb_write_indexed();
9812 - }
9813 - BARRIER;
9814 + tlbw_use_hazard();
9815 write_c0_entryhi(pid);
9816 - BARRIER;
9817 local_irq_restore(flags);
9818 }
9819
9820 -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
9821 - unsigned long entryhi, unsigned long pagemask)
9822 +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
9823 + unsigned long entryhi, unsigned long pagemask)
9824 {
9825 - unsigned long flags;
9826 - unsigned long wired;
9827 - unsigned long old_pagemask;
9828 - unsigned long old_ctx;
9829 -
9830 - local_irq_save(flags);
9831 - /* Save old context and create impossible VPN2 value */
9832 - old_ctx = (read_c0_entryhi() & ASID_MASK);
9833 - old_pagemask = read_c0_pagemask();
9834 - wired = read_c0_wired();
9835 - write_c0_wired(wired + 1);
9836 - write_c0_index(wired);
9837 - BARRIER;
9838 - write_c0_pagemask(pagemask);
9839 - write_c0_entryhi(entryhi);
9840 - write_c0_entrylo0(entrylo0);
9841 - write_c0_entrylo1(entrylo1);
9842 - BARRIER;
9843 - tlb_write_indexed();
9844 - BARRIER;
9845 -
9846 - write_c0_entryhi(old_ctx);
9847 - BARRIER;
9848 - write_c0_pagemask(old_pagemask);
9849 - local_flush_tlb_all();
9850 - local_irq_restore(flags);
9851 + unsigned long flags;
9852 + unsigned long wired;
9853 + unsigned long old_pagemask;
9854 + unsigned long old_ctx;
9855 +
9856 + local_irq_save(flags);
9857 + /* Save old context and create impossible VPN2 value */
9858 + old_ctx = read_c0_entryhi() & ASID_MASK;
9859 + old_pagemask = read_c0_pagemask();
9860 + wired = read_c0_wired();
9861 + write_c0_wired(wired + 1);
9862 + write_c0_index(wired);
9863 + BARRIER;
9864 + write_c0_pagemask(pagemask);
9865 + write_c0_entryhi(entryhi);
9866 + write_c0_entrylo0(entrylo0);
9867 + write_c0_entrylo1(entrylo1);
9868 + mtc0_tlbw_hazard();
9869 + tlb_write_indexed();
9870 + tlbw_use_hazard();
9871 +
9872 + write_c0_entryhi(old_ctx);
9873 + BARRIER;
9874 + write_c0_pagemask(old_pagemask);
9875 + local_flush_tlb_all();
9876 + local_irq_restore(flags);
9877 }
9878
9879 /*
9880 @@ -317,17 +273,15 @@
9881 }
9882
9883 write_c0_index(temp_tlb_entry);
9884 - BARRIER;
9885 write_c0_pagemask(pagemask);
9886 write_c0_entryhi(entryhi);
9887 write_c0_entrylo0(entrylo0);
9888 write_c0_entrylo1(entrylo1);
9889 - BARRIER;
9890 + mtc0_tlbw_hazard();
9891 tlb_write_indexed();
9892 - BARRIER;
9893 + tlbw_use_hazard();
9894
9895 write_c0_entryhi(old_ctx);
9896 - BARRIER;
9897 write_c0_pagemask(old_pagemask);
9898 out:
9899 local_irq_restore(flags);
9900 @@ -348,15 +302,23 @@
9901 return;
9902
9903 config1 = read_c0_config1();
9904 - if (!((config1 >> 7) & 3))
9905 - panic("No MMU present");
9906 + if (!((config >> 7) & 3))
9907 + panic("No TLB present");
9908
9909 c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
9910 }
9911
9912 void __init r4k_tlb_init(void)
9913 {
9914 - unsigned long config = read_c0_config();
9915 + unsigned int config = read_c0_config();
9916 +
9917 + /*
9918 + * You should never change this register:
9919 + * - On R4600 1.7 the tlbp never hits for pages smaller than
9920 + * the value in the c0_pagemask register.
9921 + * - The entire mm handling assumes the c0_pagemask register to
9922 + * be set for 4kb pages.
9923 + */
9924 probe_tlb(config);
9925 write_c0_pagemask(PM_DEFAULT_MASK);
9926 write_c0_wired(0);
9927 diff -Nur linux-2.4.29/arch/mips64/mm/tlbex-r4k.S linux-mips/arch/mips64/mm/tlbex-r4k.S
9928 --- linux-2.4.29/arch/mips64/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
9929 +++ linux-mips/arch/mips64/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
9930 @@ -151,11 +151,9 @@
9931 ld k0, 0(k1) # get even pte
9932 ld k1, 8(k1) # get odd pte
9933 PTE_RELOAD k0 k1
9934 - rm9000_tlb_hazard
9935 - b 1f
9936 - tlbwr
9937 -1: nop
9938 - rm9000_tlb_hazard
9939 + mtc0_tlbw_hazard
9940 + tlbwr
9941 +1: tlbw_eret_hazard
9942 eret
9943
9944 9: # handle the vmalloc range
9945 @@ -163,11 +161,9 @@
9946 ld k0, 0(k1) # get even pte
9947 ld k1, 8(k1) # get odd pte
9948 PTE_RELOAD k0 k1
9949 - rm9000_tlb_hazard
9950 - b 1f
9951 - tlbwr
9952 -1: nop
9953 - rm9000_tlb_hazard
9954 + mtc0_tlbw_hazard
9955 + tlbwr
9956 +1: tlbw_eret_hazard
9957 eret
9958 END(handle_vec1_r4k)
9959
9960 @@ -195,10 +191,9 @@
9961 ld k0, 0(k1) # get even pte
9962 ld k1, 8(k1) # get odd pte
9963 PTE_RELOAD k0 k1
9964 - rm9000_tlb_hazard
9965 - nop
9966 + mtc0_tlbw_hazard
9967 tlbwr
9968 - rm9000_tlb_hazard
9969 + tlbw_eret_hazard
9970 eret
9971
9972 9: # handle the vmalloc range
9973 @@ -206,10 +201,9 @@
9974 ld k0, 0(k1) # get even pte
9975 ld k1, 8(k1) # get odd pte
9976 PTE_RELOAD k0 k1
9977 - rm9000_tlb_hazard
9978 - nop
9979 + mtc0_tlbw_hazard
9980 tlbwr
9981 - rm9000_tlb_hazard
9982 + tlbw_eret_hazard
9983 eret
9984 END(handle_vec1_r10k)
9985
9986 diff -Nur linux-2.4.29/drivers/char/Config.in linux-mips/drivers/char/Config.in
9987 --- linux-2.4.29/drivers/char/Config.in 2004-08-08 01:26:04.000000000 +0200
9988 +++ linux-mips/drivers/char/Config.in 2005-02-12 04:06:18.000000000 +0100
9989 @@ -313,14 +313,11 @@
9990 if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
9991 bool 'Tadpole ANA H8 Support (OBSOLETE)' CONFIG_H8
9992 fi
9993 -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
9994 - tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
9995 -fi
9996 if [ "$CONFIG_SGI_IP22" = "y" ]; then
9997 - bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
9998 + tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
9999 fi
10000 if [ "$CONFIG_SGI_IP27" = "y" ]; then
10001 - bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
10002 + tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
10003 fi
10004 if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
10005 tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
10006 @@ -383,6 +380,11 @@
10007 source drivers/char/drm/Config.in
10008 fi
10009 fi
10010 +
10011 +if [ "$CONFIG_X86" = "y" ]; then
10012 + tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
10013 +fi
10014 +
10015 endmenu
10016
10017 if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
10018 @@ -391,6 +393,7 @@
10019 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
10020 tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
10021 tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
10022 + #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
10023 fi
10024 if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
10025 tristate ' ITE GPIO' CONFIG_ITE_GPIO
10026 diff -Nur linux-2.4.29/drivers/char/Makefile linux-mips/drivers/char/Makefile
10027 --- linux-2.4.29/drivers/char/Makefile 2004-08-08 01:26:04.000000000 +0200
10028 +++ linux-mips/drivers/char/Makefile 2005-02-12 04:06:18.000000000 +0100
10029 @@ -48,7 +48,12 @@
10030 KEYBD =
10031 endif
10032 ifeq ($(CONFIG_VR41XX_KIU),y)
10033 - KEYMAP =
10034 + ifeq ($(CONFIG_IBM_WORKPAD),y)
10035 + KEYMAP = ibm_workpad_keymap.o
10036 + endif
10037 + ifeq ($(CONFIG_VICTOR_MPC30X),y)
10038 + KEYMAP = victor_mpc30x_keymap.o
10039 + endif
10040 KEYBD = vr41xx_keyb.o
10041 endif
10042 endif
10043 @@ -251,7 +256,6 @@
10044 obj-$(CONFIG_RTC) += rtc.o
10045 obj-$(CONFIG_GEN_RTC) += genrtc.o
10046 obj-$(CONFIG_EFI_RTC) += efirtc.o
10047 -obj-$(CONFIG_SGI_DS1286) += ds1286.o
10048 obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
10049 obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
10050 ifeq ($(CONFIG_PPC),)
10051 @@ -259,6 +263,7 @@
10052 endif
10053 obj-$(CONFIG_TOSHIBA) += toshiba.o
10054 obj-$(CONFIG_I8K) += i8k.o
10055 +obj-$(CONFIG_DS1286) += ds1286.o
10056 obj-$(CONFIG_DS1620) += ds1620.o
10057 obj-$(CONFIG_DS1742) += ds1742.o
10058 obj-$(CONFIG_INTEL_RNG) += i810_rng.o
10059 @@ -269,6 +274,7 @@
10060
10061 obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
10062 obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
10063 +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
10064 obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
10065 obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
10066 obj-$(CONFIG_COBALT_LCD) += lcd.o
10067 @@ -353,3 +359,9 @@
10068
10069 qtronixmap.c: qtronixmap.map
10070 set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
10071 +
10072 +ibm_workpad_keymap.c: ibm_workpad_keymap.map
10073 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
10074 +
10075 +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
10076 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
10077 diff -Nur linux-2.4.29/drivers/char/au1000_gpio.c linux-mips/drivers/char/au1000_gpio.c
10078 --- linux-2.4.29/drivers/char/au1000_gpio.c 2003-08-25 13:44:41.000000000 +0200
10079 +++ linux-mips/drivers/char/au1000_gpio.c 2003-12-20 14:18:51.000000000 +0100
10080 @@ -246,7 +246,7 @@
10081
10082 static struct miscdevice au1000gpio_miscdev =
10083 {
10084 - GPIO_MINOR,
10085 + MISC_DYNAMIC_MINOR,
10086 "au1000_gpio",
10087 &au1000gpio_fops
10088 };
10089 diff -Nur linux-2.4.29/drivers/char/au1550_psc_spi.c linux-mips/drivers/char/au1550_psc_spi.c
10090 --- linux-2.4.29/drivers/char/au1550_psc_spi.c 1970-01-01 01:00:00.000000000 +0100
10091 +++ linux-mips/drivers/char/au1550_psc_spi.c 2005-02-12 04:06:18.000000000 +0100
10092 @@ -0,0 +1,466 @@
10093 +/*
10094 + * Driver for Alchemy Au1550 SPI on the PSC.
10095 + *
10096 + * Copyright 2004 Embedded Edge, LLC.
10097 + * dan@embeddededge.com
10098 + *
10099 + * This program is free software; you can redistribute it and/or modify it
10100 + * under the terms of the GNU General Public License as published by the
10101 + * Free Software Foundation; either version 2 of the License, or (at your
10102 + * option) any later version.
10103 + *
10104 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10105 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
10106 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10107 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
10108 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
10109 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
10110 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
10111 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10112 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
10113 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10114 + *
10115 + * You should have received a copy of the GNU General Public License along
10116 + * with this program; if not, write to the Free Software Foundation, Inc.,
10117 + * 675 Mass Ave, Cambridge, MA 02139, USA.
10118 + */
10119 +
10120 +#include <linux/module.h>
10121 +#include <linux/config.h>
10122 +#include <linux/types.h>
10123 +#include <linux/kernel.h>
10124 +#include <linux/miscdevice.h>
10125 +#include <linux/init.h>
10126 +#include <asm/uaccess.h>
10127 +#include <asm/io.h>
10128 +#include <asm/au1000.h>
10129 +#include <asm/au1550_spi.h>
10130 +#include <asm/au1xxx_psc.h>
10131 +
10132 +#ifdef CONFIG_MIPS_PB1550
10133 +#include <asm/pb1550.h>
10134 +#endif
10135 +
10136 +#ifdef CONFIG_MIPS_DB1550
10137 +#include <asm/db1x00.h>
10138 +#endif
10139 +
10140 +#ifdef CONFIG_MIPS_PB1200
10141 +#include <asm/pb1200.h>
10142 +#endif
10143 +
10144 +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
10145 + * We support open, close, write, and ioctl. The SPI is a full duplex
10146 + * interface, you can't read without writing. So, the write system call
10147 + * copies the bytes out to the SPI, and whatever is returned is placed
10148 + * in the same buffer. Kinda weird, maybe we'll change it, but for now
10149 + * it works OK.
10150 + * I didn't implement any DMA yet, and it's a debate about the necessity.
10151 + * The SPI clocks are usually quite fast, so data is sent/received as
10152 + * quickly as you can stuff the FIFO. The overhead of DMA and interrupts
10153 + * are usually far greater than the data transfer itself. If, however,
10154 + * we find applications that move large amounts of data, we may choose
10155 + * use the overhead of buffering and DMA to do the work.
10156 + */
10157 +
10158 +/* The maximum clock rate specified in the manual is 2mHz.
10159 +*/
10160 +#define MAX_BAUD_RATE (2 * 1000000)
10161 +#define PSC_INTCLK_RATE (32 * 1000000)
10162 +
10163 +static int inuse;
10164 +
10165 +/* We have to know what the user requested for the data length
10166 + * so we know how to stuff the fifo. The FIFO is 32 bits wide,
10167 + * and we have to load it with the bits to go in a single transfer.
10168 + */
10169 +static uint spi_datalen;
10170 +
10171 +static int
10172 +au1550spi_master_done( int ms )
10173 +{
10174 + int timeout=ms;
10175 + volatile psc_spi_t *sp;
10176 +
10177 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10178 +
10179 + /* Loop until MD is set or timeout has expired */
10180 + while(!(sp->psc_spievent & PSC_SPIEVNT_MD) && timeout--) udelay(1000);
10181 +
10182 + if ( !timeout )
10183 + return 0;
10184 + else
10185 + sp->psc_spievent |= PSC_SPIEVNT_MD;
10186 +
10187 + return 1;
10188 +}
10189 +
10190 +static int
10191 +au1550spi_open(struct inode *inode, struct file *file)
10192 +{
10193 + if (inuse)
10194 + return -EBUSY;
10195 +
10196 + inuse = 1;
10197 +
10198 + MOD_INC_USE_COUNT;
10199 +
10200 + return 0;
10201 +}
10202 +
10203 +static ssize_t
10204 +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
10205 +{
10206 + int bytelen, i;
10207 + size_t rcount, retval;
10208 + unsigned char sb, *rp, *wp;
10209 + uint fifoword, pcr, stat;
10210 + volatile psc_spi_t *sp;
10211 +
10212 + /* Get the number of bytes per transfer.
10213 + */
10214 + bytelen = ((spi_datalen - 1) / 8) + 1;
10215 +
10216 + /* User needs to send us multiple of this count.
10217 + */
10218 + if ((count % bytelen) != 0)
10219 + return -EINVAL;
10220 +
10221 + rp = wp = (unsigned char *)bp;
10222 + retval = rcount = count;
10223 +
10224 + /* Reset the FIFO.
10225 + */
10226 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10227 + sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
10228 + au_sync();
10229 + do {
10230 + pcr = sp->psc_spipcr;
10231 + au_sync();
10232 + } while (pcr != 0);
10233 +
10234 + /* Prime the transmit FIFO.
10235 + */
10236 + while (count > 0) {
10237 + fifoword = 0;
10238 + for (i=0; i<bytelen; i++) {
10239 + fifoword <<= 8;
10240 + if (get_user(sb, wp) < 0)
10241 + return -EFAULT;
10242 + fifoword |= sb;
10243 + wp++;
10244 + }
10245 + count -= bytelen;
10246 + if (count <= 0)
10247 + fifoword |= PSC_SPITXRX_LC;
10248 + sp->psc_spitxrx = fifoword;
10249 + au_sync();
10250 + stat = sp->psc_spistat;
10251 + au_sync();
10252 + if (stat & PSC_SPISTAT_TF)
10253 + break;
10254 + }
10255 +
10256 + /* Start the transfer.
10257 + */
10258 + sp->psc_spipcr = PSC_SPIPCR_MS;
10259 + au_sync();
10260 +
10261 + /* Now, just keep the transmit fifo full and empty the receive.
10262 + */
10263 + while (count > 0) {
10264 + stat = sp->psc_spistat;
10265 + au_sync();
10266 + while ((stat & PSC_SPISTAT_RE) == 0) {
10267 + fifoword = sp->psc_spitxrx;
10268 + au_sync();
10269 + for (i=0; i<bytelen; i++) {
10270 + sb = fifoword & 0xff;
10271 + if (put_user(sb, rp) < 0)
10272 + return -EFAULT;
10273 + fifoword >>= 8;
10274 + rp++;
10275 + }
10276 + rcount -= bytelen;
10277 + stat = sp->psc_spistat;
10278 + au_sync();
10279 + }
10280 + if ((stat & PSC_SPISTAT_TF) == 0) {
10281 + fifoword = 0;
10282 + for (i=0; i<bytelen; i++) {
10283 + fifoword <<= 8;
10284 + if (get_user(sb, wp) < 0)
10285 + return -EFAULT;
10286 + fifoword |= sb;
10287 + wp++;
10288 + }
10289 + count -= bytelen;
10290 + if (count <= 0)
10291 + fifoword |= PSC_SPITXRX_LC;
10292 + sp->psc_spitxrx = fifoword;
10293 + au_sync();
10294 + }
10295 + }
10296 +
10297 + /* All of the bytes for transmit have been written. Hang
10298 + * out waiting for any residual bytes that are yet to be
10299 + * read from the fifo.
10300 + */
10301 + while (rcount > 0) {
10302 + stat = sp->psc_spistat;
10303 + au_sync();
10304 + if ((stat & PSC_SPISTAT_RE) == 0) {
10305 + fifoword = sp->psc_spitxrx;
10306 + au_sync();
10307 + for (i=0; i<bytelen; i++) {
10308 + sb = fifoword & 0xff;
10309 + if (put_user(sb, rp) < 0)
10310 + return -EFAULT;
10311 + fifoword >>= 8;
10312 + rp++;
10313 + }
10314 + rcount -= bytelen;
10315 + }
10316 + }
10317 +
10318 + /* Wait for MasterDone event. 30ms timeout */
10319 + if (!au1550spi_master_done(30) ) retval = -EFAULT;
10320 + return retval;
10321 +}
10322 +
10323 +static int
10324 +au1550spi_release(struct inode *inode, struct file *file)
10325 +{
10326 + MOD_DEC_USE_COUNT;
10327 +
10328 + inuse = 0;
10329 +
10330 + return 0;
10331 +}
10332 +
10333 +/* Set the baud rate closest to the request, then return the actual
10334 + * value we are using.
10335 + */
10336 +static uint
10337 +set_baud_rate(uint baud)
10338 +{
10339 + uint rate, tmpclk, brg, ctl, stat;
10340 + volatile psc_spi_t *sp;
10341 +
10342 + /* For starters, the input clock is divided by two.
10343 + */
10344 + tmpclk = PSC_INTCLK_RATE/2;
10345 +
10346 + rate = tmpclk / baud;
10347 +
10348 + /* The dividers work as follows:
10349 + * baud = tmpclk / (2 * (brg + 1))
10350 + */
10351 + brg = (rate/2) - 1;
10352 +
10353 + /* Test BRG to ensure it will fit into the 6 bits allocated.
10354 + */
10355 +
10356 + /* Make sure the device is disabled while we make the change.
10357 + */
10358 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10359 + ctl = sp->psc_spicfg;
10360 + au_sync();
10361 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
10362 + au_sync();
10363 + ctl = PSC_SPICFG_CLR_BAUD(ctl);
10364 + ctl |= PSC_SPICFG_SET_BAUD(brg);
10365 + sp->psc_spicfg = ctl;
10366 + au_sync();
10367 +
10368 + /* If the device was running prior to getting here, wait for
10369 + * it to restart.
10370 + */
10371 + if (ctl & PSC_SPICFG_DE_ENABLE) {
10372 + do {
10373 + stat = sp->psc_spistat;
10374 + au_sync();
10375 + } while ((stat & PSC_SPISTAT_DR) == 0);
10376 + }
10377 +
10378 + /* Return the actual value.
10379 + */
10380 + rate = tmpclk / (2 * (brg + 1));
10381 +
10382 + return(rate);
10383 +}
10384 +
10385 +static uint
10386 +set_word_len(uint len)
10387 +{
10388 + uint ctl, stat;
10389 + volatile psc_spi_t *sp;
10390 +
10391 + if ((len < 4) || (len > 24))
10392 + return -EINVAL;
10393 +
10394 + /* Make sure the device is disabled while we make the change.
10395 + */
10396 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10397 + ctl = sp->psc_spicfg;
10398 + au_sync();
10399 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
10400 + au_sync();
10401 + ctl = PSC_SPICFG_CLR_LEN(ctl);
10402 + ctl |= PSC_SPICFG_SET_LEN(len);
10403 + sp->psc_spicfg = ctl;
10404 + au_sync();
10405 +
10406 + /* If the device was running prior to getting here, wait for
10407 + * it to restart.
10408 + */
10409 + if (ctl & PSC_SPICFG_DE_ENABLE) {
10410 + do {
10411 + stat = sp->psc_spistat;
10412 + au_sync();
10413 + } while ((stat & PSC_SPISTAT_DR) == 0);
10414 + }
10415 +
10416 + return 0;
10417 +}
10418 +
10419 +static int
10420 +au1550spi_ioctl(struct inode *inode, struct file *file,
10421 + unsigned int cmd, unsigned long arg)
10422 +{
10423 + int status;
10424 + u32 val;
10425 +
10426 + status = 0;
10427 +
10428 + switch(cmd) {
10429 + case AU1550SPI_WORD_LEN:
10430 + status = set_word_len(arg);
10431 + break;
10432 +
10433 + case AU1550SPI_SET_BAUD:
10434 + if (get_user(val, (u32 *)arg))
10435 + return -EFAULT;
10436 +
10437 + val = set_baud_rate(val);
10438 + if (put_user(val, (u32 *)arg))
10439 + return -EFAULT;
10440 + break;
10441 +
10442 + default:
10443 + status = -ENOIOCTLCMD;
10444 +
10445 + }
10446 +
10447 + return status;
10448 +}
10449 +
10450 +
10451 +static struct file_operations au1550spi_fops =
10452 +{
10453 + owner: THIS_MODULE,
10454 + write: au1550spi_write,
10455 + ioctl: au1550spi_ioctl,
10456 + open: au1550spi_open,
10457 + release: au1550spi_release,
10458 +};
10459 +
10460 +
10461 +static struct miscdevice au1550spi_miscdev =
10462 +{
10463 + MISC_DYNAMIC_MINOR,
10464 + "au1550_spi",
10465 + &au1550spi_fops
10466 +};
10467 +
10468 +
10469 +int __init
10470 +au1550spi_init(void)
10471 +{
10472 + uint clk, rate, stat;
10473 + volatile psc_spi_t *sp;
10474 +
10475 + /* Wire up Freq3 as a clock for the SPI. The PSC does
10476 + * factor of 2 divisor, so run a higher rate so we can
10477 + * get some granularity to the clock speeds.
10478 + * We can't do this in board set up because the frequency
10479 + * is computed too late.
10480 + */
10481 + rate = get_au1x00_speed();
10482 + rate /= PSC_INTCLK_RATE;
10483 +
10484 + /* The FRDIV in the frequency control is (FRDIV + 1) * 2
10485 + */
10486 + rate /=2;
10487 + rate--;
10488 + clk = au_readl(SYS_FREQCTRL1);
10489 + au_sync();
10490 + clk &= ~SYS_FC_FRDIV3_MASK;
10491 + clk |= (rate << SYS_FC_FRDIV3_BIT);
10492 + clk |= SYS_FC_FE3;
10493 + au_writel(clk, SYS_FREQCTRL1);
10494 + au_sync();
10495 +
10496 + /* Set up the clock source routing to get Freq3 to PSC0_intclk.
10497 + */
10498 + clk = au_readl(SYS_CLKSRC);
10499 + au_sync();
10500 + clk &= ~0x03e0;
10501 + clk |= (5 << 7);
10502 + au_writel(clk, SYS_CLKSRC);
10503 + au_sync();
10504 +
10505 + /* Set up GPIO pin function to drive PSC0_SYNC1, which is
10506 + * the SPI Select.
10507 + */
10508 + clk = au_readl(SYS_PINFUNC);
10509 + au_sync();
10510 + clk |= 1;
10511 + au_writel(clk, SYS_PINFUNC);
10512 + au_sync();
10513 +
10514 + /* Now, set up the PSC for SPI PIO mode.
10515 + */
10516 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
10517 + sp->psc_ctrl = PSC_CTRL_DISABLE;
10518 + au_sync();
10519 + sp->psc_sel = PSC_SEL_PS_SPIMODE;
10520 + sp->psc_spicfg = 0;
10521 + au_sync();
10522 + sp->psc_ctrl = PSC_CTRL_ENABLE;
10523 + au_sync();
10524 + do {
10525 + stat = sp->psc_spistat;
10526 + au_sync();
10527 + } while ((stat & PSC_SPISTAT_SR) == 0);
10528 +
10529 + sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
10530 + PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
10531 + sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
10532 + spi_datalen = 8;
10533 + sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
10534 + au_sync();
10535 +
10536 + set_baud_rate(1000000);
10537 +
10538 + sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
10539 + do {
10540 + stat = sp->psc_spistat;
10541 + au_sync();
10542 + } while ((stat & PSC_SPISTAT_DR) == 0);
10543 +
10544 + misc_register(&au1550spi_miscdev);
10545 + printk("Au1550 SPI driver\n");
10546 + return 0;
10547 +}
10548 +
10549 +
10550 +void __exit
10551 +au1550spi_exit(void)
10552 +{
10553 + misc_deregister(&au1550spi_miscdev);
10554 +}
10555 +
10556 +
10557 +module_init(au1550spi_init);
10558 +module_exit(au1550spi_exit);
10559 diff -Nur linux-2.4.29/drivers/char/decserial.c linux-mips/drivers/char/decserial.c
10560 --- linux-2.4.29/drivers/char/decserial.c 2003-08-25 13:44:41.000000000 +0200
10561 +++ linux-mips/drivers/char/decserial.c 2004-09-28 02:53:01.000000000 +0200
10562 @@ -3,95 +3,105 @@
10563 * choose the right serial device at boot time
10564 *
10565 * triemer 6-SEP-1998
10566 - * sercons.c is designed to allow the three different kinds
10567 + * sercons.c is designed to allow the three different kinds
10568 * of serial devices under the decstation world to co-exist
10569 - * in the same kernel. The idea here is to abstract
10570 + * in the same kernel. The idea here is to abstract
10571 * the pieces of the drivers that are common to this file
10572 * so that they do not clash at compile time and runtime.
10573 *
10574 * HK 16-SEP-1998 v0.002
10575 * removed the PROM console as this is not a real serial
10576 * device. Added support for PROM console in drivers/char/tty_io.c
10577 - * instead. Although it may work to enable more than one
10578 + * instead. Although it may work to enable more than one
10579 * console device I strongly recommend to use only one.
10580 + *
10581 + * Copyright (C) 2004 Maciej W. Rozycki
10582 */
10583
10584 #include <linux/config.h>
10585 +#include <linux/errno.h>
10586 #include <linux/init.h>
10587 +
10588 #include <asm/dec/machtype.h>
10589 +#include <asm/dec/serial.h>
10590 +
10591 +extern int register_zs_hook(unsigned int channel,
10592 + struct dec_serial_hook *hook);
10593 +extern int unregister_zs_hook(unsigned int channel);
10594 +
10595 +extern int register_dz_hook(unsigned int channel,
10596 + struct dec_serial_hook *hook);
10597 +extern int unregister_dz_hook(unsigned int channel);
10598
10599 +int register_dec_serial_hook(unsigned int channel,
10600 + struct dec_serial_hook *hook)
10601 +{
10602 #ifdef CONFIG_ZS
10603 -extern int zs_init(void);
10604 + if (IOASIC)
10605 + return register_zs_hook(channel, hook);
10606 #endif
10607 -
10608 #ifdef CONFIG_DZ
10609 -extern int dz_init(void);
10610 + if (!IOASIC)
10611 + return register_dz_hook(channel, hook);
10612 #endif
10613 + return 0;
10614 +}
10615
10616 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
10617 -
10618 +int unregister_dec_serial_hook(unsigned int channel)
10619 +{
10620 #ifdef CONFIG_ZS
10621 -extern void zs_serial_console_init(void);
10622 + if (IOASIC)
10623 + return unregister_zs_hook(channel);
10624 #endif
10625 -
10626 #ifdef CONFIG_DZ
10627 -extern void dz_serial_console_init(void);
10628 -#endif
10629 -
10630 + if (!IOASIC)
10631 + return unregister_dz_hook(channel);
10632 #endif
10633 + return 0;
10634 +}
10635
10636 -/* rs_init - starts up the serial interface -
10637 - handle normal case of starting up the serial interface */
10638
10639 -#ifdef CONFIG_SERIAL_DEC
10640 +extern int zs_init(void);
10641 +extern int dz_init(void);
10642
10643 +/*
10644 + * rs_init - starts up the serial interface -
10645 + * handle normal case of starting up the serial interface
10646 + */
10647 int __init rs_init(void)
10648 {
10649 -
10650 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
10651 - if (IOASIC)
10652 - return zs_init();
10653 - else
10654 - return dz_init();
10655 -#else
10656 -
10657 #ifdef CONFIG_ZS
10658 - return zs_init();
10659 + if (IOASIC)
10660 + return zs_init();
10661 #endif
10662 -
10663 #ifdef CONFIG_DZ
10664 - return dz_init();
10665 -#endif
10666 -
10667 + if (!IOASIC)
10668 + return dz_init();
10669 #endif
10670 + return -ENXIO;
10671 }
10672
10673 __initcall(rs_init);
10674
10675 -#endif
10676
10677 #ifdef CONFIG_SERIAL_DEC_CONSOLE
10678
10679 -/* dec_serial_console_init handles the special case of starting
10680 - * up the console on the serial port
10681 +extern void zs_serial_console_init(void);
10682 +extern void dz_serial_console_init(void);
10683 +
10684 +/*
10685 + * dec_serial_console_init handles the special case of starting
10686 + * up the console on the serial port
10687 */
10688 void __init dec_serial_console_init(void)
10689 {
10690 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
10691 - if (IOASIC)
10692 - zs_serial_console_init();
10693 - else
10694 - dz_serial_console_init();
10695 -#else
10696 -
10697 #ifdef CONFIG_ZS
10698 - zs_serial_console_init();
10699 + if (IOASIC)
10700 + zs_serial_console_init();
10701 #endif
10702 -
10703 #ifdef CONFIG_DZ
10704 - dz_serial_console_init();
10705 -#endif
10706 -
10707 + if (!IOASIC)
10708 + dz_serial_console_init();
10709 #endif
10710 }
10711
10712 diff -Nur linux-2.4.29/drivers/char/ds1286.c linux-mips/drivers/char/ds1286.c
10713 --- linux-2.4.29/drivers/char/ds1286.c 2004-02-18 14:36:31.000000000 +0100
10714 +++ linux-mips/drivers/char/ds1286.c 2004-01-10 06:21:39.000000000 +0100
10715 @@ -1,6 +1,10 @@
10716 /*
10717 * DS1286 Real Time Clock interface for Linux
10718 *
10719 + * Copyright (C) 2003 TimeSys Corp.
10720 + * S. James Hill (James.Hill@timesys.com)
10721 + * (sjhill@realitydiluted.com)
10722 + *
10723 * Copyright (C) 1998, 1999, 2000 Ralf Baechle
10724 *
10725 * Based on code written by Paul Gortmaker.
10726 @@ -29,6 +33,7 @@
10727 #include <linux/types.h>
10728 #include <linux/errno.h>
10729 #include <linux/miscdevice.h>
10730 +#include <linux/module.h>
10731 #include <linux/slab.h>
10732 #include <linux/ioport.h>
10733 #include <linux/fcntl.h>
10734 @@ -95,6 +100,12 @@
10735 return -EIO;
10736 }
10737
10738 +void rtc_ds1286_wait(void)
10739 +{
10740 + unsigned char sec = CMOS_READ(RTC_SECONDS);
10741 + while (sec == CMOS_READ(RTC_SECONDS));
10742 +}
10743 +
10744 static int ds1286_ioctl(struct inode *inode, struct file *file,
10745 unsigned int cmd, unsigned long arg)
10746 {
10747 @@ -249,23 +260,22 @@
10748 {
10749 spin_lock_irq(&ds1286_lock);
10750
10751 - if (ds1286_status & RTC_IS_OPEN)
10752 - goto out_busy;
10753 + if (ds1286_status & RTC_IS_OPEN) {
10754 + spin_unlock_irq(&ds1286_lock);
10755 + return -EBUSY;
10756 + }
10757
10758 ds1286_status |= RTC_IS_OPEN;
10759
10760 - spin_lock_irq(&ds1286_lock);
10761 + spin_unlock_irq(&ds1286_lock);
10762 return 0;
10763 -
10764 -out_busy:
10765 - spin_lock_irq(&ds1286_lock);
10766 - return -EBUSY;
10767 }
10768
10769 static int ds1286_release(struct inode *inode, struct file *file)
10770 {
10771 + spin_lock_irq(&ds1286_lock);
10772 ds1286_status &= ~RTC_IS_OPEN;
10773 -
10774 + spin_unlock_irq(&ds1286_lock);
10775 return 0;
10776 }
10777
10778 @@ -276,32 +286,6 @@
10779 return 0;
10780 }
10781
10782 -/*
10783 - * The various file operations we support.
10784 - */
10785 -
10786 -static struct file_operations ds1286_fops = {
10787 - .llseek = no_llseek,
10788 - .read = ds1286_read,
10789 - .poll = ds1286_poll,
10790 - .ioctl = ds1286_ioctl,
10791 - .open = ds1286_open,
10792 - .release = ds1286_release,
10793 -};
10794 -
10795 -static struct miscdevice ds1286_dev=
10796 -{
10797 - .minor = RTC_MINOR,
10798 - .name = "rtc",
10799 - .fops = &ds1286_fops,
10800 -};
10801 -
10802 -int __init ds1286_init(void)
10803 -{
10804 - printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
10805 - return misc_register(&ds1286_dev);
10806 -}
10807 -
10808 static char *days[] = {
10809 "***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
10810 };
10811 @@ -528,3 +512,38 @@
10812 BCD_TO_BIN(alm_tm->tm_hour);
10813 alm_tm->tm_sec = 0;
10814 }
10815 +
10816 +static struct file_operations ds1286_fops = {
10817 + .owner = THIS_MODULE,
10818 + .llseek = no_llseek,
10819 + .read = ds1286_read,
10820 + .poll = ds1286_poll,
10821 + .ioctl = ds1286_ioctl,
10822 + .open = ds1286_open,
10823 + .release = ds1286_release,
10824 +};
10825 +
10826 +static struct miscdevice ds1286_dev =
10827 +{
10828 + .minor = RTC_MINOR,
10829 + .name = "rtc",
10830 + .fops = &ds1286_fops,
10831 +};
10832 +
10833 +static int __init ds1286_init(void)
10834 +{
10835 + printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
10836 + return misc_register(&ds1286_dev);
10837 +}
10838 +
10839 +static void __exit ds1286_exit(void)
10840 +{
10841 + misc_deregister(&ds1286_dev);
10842 +}
10843 +
10844 +module_init(ds1286_init);
10845 +module_exit(ds1286_exit);
10846 +EXPORT_NO_SYMBOLS;
10847 +
10848 +MODULE_AUTHOR("Ralf Baechle");
10849 +MODULE_LICENSE("GPL");
10850 diff -Nur linux-2.4.29/drivers/char/ds1742.c linux-mips/drivers/char/ds1742.c
10851 --- linux-2.4.29/drivers/char/ds1742.c 2004-02-18 14:36:31.000000000 +0100
10852 +++ linux-mips/drivers/char/ds1742.c 2004-01-09 20:27:16.000000000 +0100
10853 @@ -142,6 +142,7 @@
10854 CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
10855
10856 /* convert */
10857 + memset(&tm, 0, sizeof(struct rtc_time));
10858 to_tm(t, &tm);
10859
10860 /* check each field one by one */
10861 @@ -216,6 +217,7 @@
10862 unsigned long curr_time;
10863
10864 curr_time = rtc_ds1742_get_time();
10865 + memset(&tm, 0, sizeof(struct rtc_time));
10866 to_tm(curr_time, &tm);
10867
10868 p = buf;
10869 @@ -251,8 +253,8 @@
10870
10871 void rtc_ds1742_wait(void)
10872 {
10873 - while (CMOS_READ(RTC_SECONDS) & 1);
10874 - while (!(CMOS_READ(RTC_SECONDS) & 1));
10875 + unsigned char sec = CMOS_READ(RTC_SECONDS);
10876 + while (sec == CMOS_READ(RTC_SECONDS));
10877 }
10878
10879 static int ds1742_ioctl(struct inode *inode, struct file *file,
10880 @@ -264,6 +266,7 @@
10881 switch (cmd) {
10882 case RTC_RD_TIME: /* Read the time/date from RTC */
10883 curr_time = rtc_ds1742_get_time();
10884 + memset(&rtc_tm, 0, sizeof(struct rtc_time));
10885 to_tm(curr_time, &rtc_tm);
10886 rtc_tm.tm_year -= 1900;
10887 return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ?
10888 diff -Nur linux-2.4.29/drivers/char/dummy_keyb.c linux-mips/drivers/char/dummy_keyb.c
10889 --- linux-2.4.29/drivers/char/dummy_keyb.c 2003-08-25 13:44:41.000000000 +0200
10890 +++ linux-mips/drivers/char/dummy_keyb.c 2004-01-09 09:53:08.000000000 +0100
10891 @@ -140,3 +140,7 @@
10892 {
10893 printk("Dummy keyboard driver installed.\n");
10894 }
10895 +#ifdef CONFIG_MAGIC_SYSRQ
10896 +unsigned char kbd_sysrq_key;
10897 +unsigned char kbd_sysrq_xlate[128];
10898 +#endif
10899 diff -Nur linux-2.4.29/drivers/char/dz.c linux-mips/drivers/char/dz.c
10900 --- linux-2.4.29/drivers/char/dz.c 2005-01-19 15:09:44.000000000 +0100
10901 +++ linux-mips/drivers/char/dz.c 2004-12-27 05:13:42.000000000 +0100
10902 @@ -1,11 +1,13 @@
10903 /*
10904 - * dz.c: Serial port driver for DECStations equiped
10905 + * dz.c: Serial port driver for DECstations equipped
10906 * with the DZ chipset.
10907 *
10908 * Copyright (C) 1998 Olivier A. D. Lebaillif
10909 *
10910 * Email: olivier.lebaillif@ifrsys.com
10911 *
10912 + * Copyright (C) 2004 Maciej W. Rozycki
10913 + *
10914 * [31-AUG-98] triemer
10915 * Changed IRQ to use Harald's dec internals interrupts.h
10916 * removed base_addr code - moving address assignment to setup.c
10917 @@ -24,6 +26,7 @@
10918 #undef DEBUG_DZ
10919
10920 #include <linux/config.h>
10921 +#include <linux/delay.h>
10922 #include <linux/version.h>
10923 #include <linux/kernel.h>
10924 #include <linux/sched.h>
10925 @@ -54,33 +57,56 @@
10926 #include <asm/system.h>
10927 #include <asm/uaccess.h>
10928
10929 -#define CONSOLE_LINE (3) /* for definition of struct console */
10930 +#ifdef CONFIG_MAGIC_SYSRQ
10931 +#include <linux/sysrq.h>
10932 +#endif
10933
10934 #include "dz.h"
10935
10936 -#define DZ_INTR_DEBUG 1
10937 -
10938 DECLARE_TASK_QUEUE(tq_serial);
10939
10940 -static struct dz_serial *lines[4];
10941 -static unsigned char tmp_buffer[256];
10942 +static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
10943 +static struct tty_driver serial_driver, callout_driver;
10944 +
10945 +static struct tty_struct *serial_table[DZ_NB_PORT];
10946 +static struct termios *serial_termios[DZ_NB_PORT];
10947 +static struct termios *serial_termios_locked[DZ_NB_PORT];
10948 +
10949 +static int serial_refcount;
10950
10951 -#ifdef DEBUG_DZ
10952 /*
10953 - * debugging code to send out chars via prom
10954 + * tmp_buf is used as a temporary buffer by serial_write. We need to
10955 + * lock it in case the copy_from_user blocks while swapping in a page,
10956 + * and some other program tries to do a serial write at the same time.
10957 + * Since the lock will only come under contention when the system is
10958 + * swapping and available memory is low, it makes sense to share one
10959 + * buffer across all the serial ports, since it significantly saves
10960 + * memory if large numbers of serial ports are open.
10961 */
10962 -static void debug_console(const char *s, int count)
10963 -{
10964 - unsigned i;
10965 +static unsigned char *tmp_buf;
10966 +static DECLARE_MUTEX(tmp_buf_sem);
10967
10968 - for (i = 0; i < count; i++) {
10969 - if (*s == 10)
10970 - prom_printf("%c", 13);
10971 - prom_printf("%c", *s++);
10972 - }
10973 -}
10974 +static char *dz_name __initdata = "DECstation DZ serial driver version ";
10975 +static char *dz_version __initdata = "1.03";
10976 +
10977 +static struct dz_serial *lines[DZ_NB_PORT];
10978 +static unsigned char tmp_buffer[256];
10979 +
10980 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
10981 +static struct console dz_sercons;
10982 +#endif
10983 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
10984 + !defined(MODULE)
10985 +static unsigned long break_pressed; /* break, really ... */
10986 #endif
10987
10988 +static void change_speed (struct dz_serial *);
10989 +
10990 +static int baud_table[] = {
10991 + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
10992 + 9600, 0
10993 +};
10994 +
10995 /*
10996 * ------------------------------------------------------------
10997 * dz_in () and dz_out ()
10998 @@ -94,15 +120,16 @@
10999 {
11000 volatile unsigned short *addr =
11001 (volatile unsigned short *) (info->port + offset);
11002 +
11003 return *addr;
11004 }
11005
11006 static inline void dz_out(struct dz_serial *info, unsigned offset,
11007 unsigned short value)
11008 {
11009 -
11010 volatile unsigned short *addr =
11011 (volatile unsigned short *) (info->port + offset);
11012 +
11013 *addr = value;
11014 }
11015
11016 @@ -143,25 +170,24 @@
11017
11018 tmp |= mask; /* set the TX flag */
11019 dz_out(info, DZ_TCR, tmp);
11020 -
11021 }
11022
11023 /*
11024 * ------------------------------------------------------------
11025 - * Here starts the interrupt handling routines. All of the
11026 - * following subroutines are declared as inline and are folded
11027 - * into dz_interrupt. They were separated out for readability's
11028 - * sake.
11029 *
11030 - * Note: rs_interrupt() is a "fast" interrupt, which means that it
11031 + * Here starts the interrupt handling routines. All of the following
11032 + * subroutines are declared as inline and are folded into
11033 + * dz_interrupt(). They were separated out for readability's sake.
11034 + *
11035 + * Note: dz_interrupt() is a "fast" interrupt, which means that it
11036 * runs with interrupts turned off. People who may want to modify
11037 - * rs_interrupt() should try to keep the interrupt handler as fast as
11038 + * dz_interrupt() should try to keep the interrupt handler as fast as
11039 * possible. After you are done making modifications, it is not a bad
11040 * idea to do:
11041 *
11042 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
11043 *
11044 - * and look at the resulting assemble code in serial.s.
11045 + * and look at the resulting assemble code in dz.s.
11046 *
11047 * ------------------------------------------------------------
11048 */
11049 @@ -188,101 +214,97 @@
11050 * This routine deals with inputs from any lines.
11051 * ------------------------------------------------------------
11052 */
11053 -static inline void receive_chars(struct dz_serial *info_in)
11054 +static inline void receive_chars(struct dz_serial *info_in,
11055 + struct pt_regs *regs)
11056 {
11057 -
11058 struct dz_serial *info;
11059 - struct tty_struct *tty = 0;
11060 + struct tty_struct *tty;
11061 struct async_icount *icount;
11062 - int ignore = 0;
11063 - unsigned short status, tmp;
11064 - unsigned char ch;
11065 -
11066 - /* this code is going to be a problem...
11067 - the call to tty_flip_buffer is going to need
11068 - to be rethought...
11069 - */
11070 - do {
11071 - status = dz_in(info_in, DZ_RBUF);
11072 - info = lines[LINE(status)];
11073 + int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
11074 + unsigned short status;
11075 + unsigned char ch, flag;
11076 + int i;
11077
11078 - /* punt so we don't get duplicate characters */
11079 - if (!(status & DZ_DVAL))
11080 - goto ignore_char;
11081 -
11082 - ch = UCHAR(status); /* grab the char */
11083 -
11084 -#if 0
11085 - if (info->is_console) {
11086 - if (ch == 0)
11087 - return; /* it's a break ... */
11088 - }
11089 -#endif
11090 + while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
11091 + info = lines[LINE(status)];
11092 + tty = info->tty; /* point to the proper dev */
11093
11094 - tty = info->tty; /* now tty points to the proper dev */
11095 - icount = &info->icount;
11096 + ch = UCHAR(status); /* grab the char */
11097
11098 - if (!tty)
11099 - break;
11100 - if (tty->flip.count >= TTY_FLIPBUF_SIZE)
11101 - break;
11102 + if (!tty && (!info->hook || !info->hook->rx_char))
11103 + continue;
11104
11105 - *tty->flip.char_buf_ptr = ch;
11106 - *tty->flip.flag_buf_ptr = 0;
11107 + icount = &info->icount;
11108 icount->rx++;
11109
11110 - /* keep track of the statistics */
11111 - if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
11112 - if (status & DZ_PERR) /* parity error */
11113 - icount->parity++;
11114 - else if (status & DZ_FERR) /* frame error */
11115 - icount->frame++;
11116 - if (status & DZ_OERR) /* overrun error */
11117 - icount->overrun++;
11118 -
11119 - /* check to see if we should ignore the character
11120 - and mask off conditions that should be ignored
11121 + flag = 0;
11122 + if (status & DZ_FERR) { /* frame error */
11123 + /*
11124 + * There is no separate BREAK status bit, so
11125 + * treat framing errors as BREAKs for Magic SysRq
11126 + * and SAK; normally, otherwise.
11127 */
11128 -
11129 - if (status & info->ignore_status_mask) {
11130 - if (++ignore > 100)
11131 - break;
11132 - goto ignore_char;
11133 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
11134 + !defined(MODULE)
11135 + if (info->line == dz_sercons.index) {
11136 + if (!break_pressed)
11137 + break_pressed = jiffies;
11138 + continue;
11139 }
11140 - /* mask off the error conditions we want to ignore */
11141 - tmp = status & info->read_status_mask;
11142 -
11143 - if (tmp & DZ_PERR) {
11144 - *tty->flip.flag_buf_ptr = TTY_PARITY;
11145 -#ifdef DEBUG_DZ
11146 - debug_console("PERR\n", 5);
11147 -#endif
11148 - } else if (tmp & DZ_FERR) {
11149 - *tty->flip.flag_buf_ptr = TTY_FRAME;
11150 -#ifdef DEBUG_DZ
11151 - debug_console("FERR\n", 5);
11152 #endif
11153 + flag = TTY_BREAK;
11154 + if (info->flags & DZ_SAK)
11155 + do_SAK(tty);
11156 + else
11157 + flag = TTY_FRAME;
11158 + } else if (status & DZ_OERR) /* overrun error */
11159 + flag = TTY_OVERRUN;
11160 + else if (status & DZ_PERR) /* parity error */
11161 + flag = TTY_PARITY;
11162 +
11163 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
11164 + !defined(MODULE)
11165 + if (break_pressed && info->line == dz_sercons.index) {
11166 + if (time_before(jiffies, break_pressed + HZ * 5)) {
11167 + handle_sysrq(ch, regs, NULL, NULL);
11168 + break_pressed = 0;
11169 + continue;
11170 }
11171 - if (tmp & DZ_OERR) {
11172 -#ifdef DEBUG_DZ
11173 - debug_console("OERR\n", 5);
11174 + break_pressed = 0;
11175 + }
11176 #endif
11177 - if (tty->flip.count < TTY_FLIPBUF_SIZE) {
11178 - tty->flip.count++;
11179 - tty->flip.flag_buf_ptr++;
11180 - tty->flip.char_buf_ptr++;
11181 - *tty->flip.flag_buf_ptr = TTY_OVERRUN;
11182 - }
11183 - }
11184 +
11185 + if (info->hook && info->hook->rx_char) {
11186 + (*info->hook->rx_char)(ch, flag);
11187 + return;
11188 }
11189 - tty->flip.flag_buf_ptr++;
11190 - tty->flip.char_buf_ptr++;
11191 - tty->flip.count++;
11192 - ignore_char:
11193 - } while (status & DZ_DVAL);
11194
11195 - if (tty)
11196 - tty_flip_buffer_push(tty);
11197 + /* keep track of the statistics */
11198 + switch (flag) {
11199 + case TTY_FRAME:
11200 + icount->frame++;
11201 + break;
11202 + case TTY_PARITY:
11203 + icount->parity++;
11204 + break;
11205 + case TTY_OVERRUN:
11206 + icount->overrun++;
11207 + break;
11208 + case TTY_BREAK:
11209 + icount->brk++;
11210 + break;
11211 + default:
11212 + break;
11213 + }
11214 +
11215 + if ((status & info->ignore_status_mask) == 0) {
11216 + tty_insert_flip_char(tty, ch, flag);
11217 + lines_rx[LINE(status)] = 1;
11218 + }
11219 + }
11220 + for (i = 0; i < DZ_NB_PORT; i++)
11221 + if (lines_rx[i])
11222 + tty_flip_buffer_push(lines[i]->tty);
11223 }
11224
11225 /*
11226 @@ -292,20 +314,34 @@
11227 * This routine deals with outputs to any lines.
11228 * ------------------------------------------------------------
11229 */
11230 -static inline void transmit_chars(struct dz_serial *info)
11231 +static inline void transmit_chars(struct dz_serial *info_in)
11232 {
11233 + struct dz_serial *info;
11234 + unsigned short status;
11235 unsigned char tmp;
11236
11237 + status = dz_in(info_in, DZ_CSR);
11238 + info = lines[LINE(status)];
11239
11240 + if (info->hook || !info->tty) {
11241 + unsigned short mask, tmp;
11242
11243 - if (info->x_char) { /* XON/XOFF chars */
11244 + mask = 1 << info->line;
11245 + tmp = dz_in(info, DZ_TCR); /* read the TX flag */
11246 + tmp &= ~mask; /* clear the TX flag */
11247 + dz_out(info, DZ_TCR, tmp);
11248 + return;
11249 + }
11250 +
11251 + if (info->x_char) { /* XON/XOFF chars */
11252 dz_out(info, DZ_TDR, info->x_char);
11253 info->icount.tx++;
11254 info->x_char = 0;
11255 return;
11256 }
11257 /* if nothing to do or stopped or hardware stopped */
11258 - if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
11259 + if (info->xmit_cnt <= 0 ||
11260 + info->tty->stopped || info->tty->hw_stopped) {
11261 dz_stop(info->tty);
11262 return;
11263 }
11264 @@ -359,15 +395,14 @@
11265 */
11266 static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
11267 {
11268 - struct dz_serial *info;
11269 + struct dz_serial *info = (struct dz_serial *)dev;
11270 unsigned short status;
11271
11272 /* get the reason why we just got an irq */
11273 - status = dz_in((struct dz_serial *) dev, DZ_CSR);
11274 - info = lines[LINE(status)]; /* re-arrange info the proper port */
11275 + status = dz_in(info, DZ_CSR);
11276
11277 if (status & DZ_RDONE)
11278 - receive_chars(info); /* the receive function */
11279 + receive_chars(info, regs);
11280
11281 if (status & DZ_TRDY)
11282 transmit_chars(info);
11283 @@ -514,7 +549,7 @@
11284
11285
11286 info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
11287 - dz_out(info, DZ_LPR, info->cflags);
11288 + dz_out(info, DZ_LPR, info->cflags | info->line);
11289
11290 if (info->xmit_buf) { /* free Tx buffer */
11291 free_page((unsigned long) info->xmit_buf);
11292 @@ -545,18 +580,21 @@
11293 {
11294 unsigned long flags;
11295 unsigned cflag;
11296 - int baud;
11297 + int baud, i;
11298
11299 - if (!info->tty || !info->tty->termios)
11300 - return;
11301 + if (!info->hook) {
11302 + if (!info->tty || !info->tty->termios)
11303 + return;
11304 + cflag = info->tty->termios->c_cflag;
11305 + } else {
11306 + cflag = info->hook->cflags;
11307 + }
11308
11309 save_flags(flags);
11310 cli();
11311
11312 info->cflags = info->line;
11313
11314 - cflag = info->tty->termios->c_cflag;
11315 -
11316 switch (cflag & CSIZE) {
11317 case CS5:
11318 info->cflags |= DZ_CS5;
11319 @@ -579,7 +617,16 @@
11320 if (cflag & PARODD)
11321 info->cflags |= DZ_PARODD;
11322
11323 - baud = tty_get_baud_rate(info->tty);
11324 + i = cflag & CBAUD;
11325 + if (i & CBAUDEX) {
11326 + i &= ~CBAUDEX;
11327 + if (!info->hook)
11328 + info->tty->termios->c_cflag &= ~CBAUDEX;
11329 + else
11330 + info->hook->cflags &= ~CBAUDEX;
11331 + }
11332 + baud = baud_table[i];
11333 +
11334 switch (baud) {
11335 case 50:
11336 info->cflags |= DZ_B50;
11337 @@ -629,16 +676,16 @@
11338 }
11339
11340 info->cflags |= DZ_RXENAB;
11341 - dz_out(info, DZ_LPR, info->cflags);
11342 + dz_out(info, DZ_LPR, info->cflags | info->line);
11343
11344 /* setup accept flag */
11345 info->read_status_mask = DZ_OERR;
11346 - if (I_INPCK(info->tty))
11347 + if (info->tty && I_INPCK(info->tty))
11348 info->read_status_mask |= (DZ_FERR | DZ_PERR);
11349
11350 /* characters to ignore */
11351 info->ignore_status_mask = 0;
11352 - if (I_IGNPAR(info->tty))
11353 + if (info->tty && I_IGNPAR(info->tty))
11354 info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
11355
11356 restore_flags(flags);
11357 @@ -694,7 +741,7 @@
11358
11359 down(&tmp_buf_sem);
11360 while (1) {
11361 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11362 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11363 if (c <= 0)
11364 break;
11365
11366 @@ -707,7 +754,7 @@
11367 save_flags(flags);
11368 cli();
11369
11370 - c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11371 + c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11372 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
11373 info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
11374 info->xmit_cnt += c;
11375 @@ -727,7 +774,7 @@
11376 save_flags(flags);
11377 cli();
11378
11379 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11380 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
11381 if (c <= 0) {
11382 restore_flags(flags);
11383 break;
11384 @@ -845,7 +892,7 @@
11385
11386 /*
11387 * ------------------------------------------------------------
11388 - * rs_ioctl () and friends
11389 + * dz_ioctl () and friends
11390 * ------------------------------------------------------------
11391 */
11392 static int get_serial_info(struct dz_serial *info,
11393 @@ -958,6 +1005,9 @@
11394 struct dz_serial *info = (struct dz_serial *) tty->driver_data;
11395 int retval;
11396
11397 + if (info->hook)
11398 + return -ENODEV;
11399 +
11400 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
11401 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
11402 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
11403 @@ -1252,19 +1302,14 @@
11404 int retval, line;
11405
11406 line = MINOR(tty->device) - tty->driver.minor_start;
11407 -
11408 - /* The dz lines for the mouse/keyboard must be
11409 - * opened using their respective drivers.
11410 - */
11411 if ((line < 0) || (line >= DZ_NB_PORT))
11412 return -ENODEV;
11413 + info = lines[line];
11414
11415 - if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
11416 + if (info->hook)
11417 return -ENODEV;
11418
11419 - info = lines[line];
11420 info->count++;
11421 -
11422 tty->driver_data = info;
11423 info->tty = tty;
11424
11425 @@ -1285,14 +1330,21 @@
11426 else
11427 *tty->termios = info->callout_termios;
11428 change_speed(info);
11429 -
11430 }
11431 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
11432 + if (dz_sercons.cflag && dz_sercons.index == line) {
11433 + tty->termios->c_cflag = dz_sercons.cflag;
11434 + dz_sercons.cflag = 0;
11435 + change_speed(info);
11436 + }
11437 +#endif
11438 +
11439 info->session = current->session;
11440 info->pgrp = current->pgrp;
11441 return 0;
11442 }
11443
11444 -static void show_serial_version(void)
11445 +static void __init show_serial_version(void)
11446 {
11447 printk("%s%s\n", dz_name, dz_version);
11448 }
11449 @@ -1300,7 +1352,6 @@
11450 int __init dz_init(void)
11451 {
11452 int i;
11453 - long flags;
11454 struct dz_serial *info;
11455
11456 /* Setup base handler, and timer table. */
11457 @@ -1311,9 +1362,9 @@
11458 memset(&serial_driver, 0, sizeof(struct tty_driver));
11459 serial_driver.magic = TTY_DRIVER_MAGIC;
11460 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
11461 - serial_driver.name = "ttyS";
11462 -#else
11463 serial_driver.name = "tts/%d";
11464 +#else
11465 + serial_driver.name = "ttyS";
11466 #endif
11467 serial_driver.major = TTY_MAJOR;
11468 serial_driver.minor_start = 64;
11469 @@ -1352,9 +1403,9 @@
11470 */
11471 callout_driver = serial_driver;
11472 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
11473 - callout_driver.name = "cua";
11474 -#else
11475 callout_driver.name = "cua/%d";
11476 +#else
11477 + callout_driver.name = "cua";
11478 #endif
11479 callout_driver.major = TTYAUX_MAJOR;
11480 callout_driver.subtype = SERIAL_TYPE_CALLOUT;
11481 @@ -1363,25 +1414,27 @@
11482 panic("Couldn't register serial driver");
11483 if (tty_register_driver(&callout_driver))
11484 panic("Couldn't register callout driver");
11485 - save_flags(flags);
11486 - cli();
11487
11488 for (i = 0; i < DZ_NB_PORT; i++) {
11489 info = &multi[i];
11490 lines[i] = info;
11491 - info->magic = SERIAL_MAGIC;
11492 -
11493 + info->tty = 0;
11494 + info->x_char = 0;
11495 if (mips_machtype == MACH_DS23100 ||
11496 mips_machtype == MACH_DS5100)
11497 info->port = (unsigned long) KN01_DZ11_BASE;
11498 else
11499 info->port = (unsigned long) KN02_DZ11_BASE;
11500 -
11501 info->line = i;
11502 - info->tty = 0;
11503 +
11504 + if (info->hook && info->hook->init_info) {
11505 + (*info->hook->init_info)(info);
11506 + continue;
11507 + }
11508 +
11509 + info->magic = SERIAL_MAGIC;
11510 info->close_delay = 50;
11511 info->closing_wait = 3000;
11512 - info->x_char = 0;
11513 info->event = 0;
11514 info->count = 0;
11515 info->blocked_open = 0;
11516 @@ -1393,25 +1446,16 @@
11517 info->normal_termios = serial_driver.init_termios;
11518 init_waitqueue_head(&info->open_wait);
11519 init_waitqueue_head(&info->close_wait);
11520 -
11521 - /*
11522 - * If we are pointing to address zero then punt - not correctly
11523 - * set up in setup.c to handle this.
11524 - */
11525 - if (!info->port)
11526 - return 0;
11527 -
11528 - printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
11529 - info->port, dec_interrupt[DEC_IRQ_DZ11]);
11530 -
11531 + printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
11532 + info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
11533 tty_register_devfs(&serial_driver, 0,
11534 - serial_driver.minor_start + info->line);
11535 + serial_driver.minor_start + info->line);
11536 tty_register_devfs(&callout_driver, 0,
11537 - callout_driver.minor_start + info->line);
11538 + callout_driver.minor_start + info->line);
11539 }
11540
11541 - /* reset the chip */
11542 #ifndef CONFIG_SERIAL_DEC_CONSOLE
11543 + /* reset the chip */
11544 dz_out(info, DZ_CSR, DZ_CLR);
11545 while (dz_in(info, DZ_CSR) & DZ_CLR);
11546 iob();
11547 @@ -1420,43 +1464,104 @@
11548 dz_out(info, DZ_CSR, DZ_MSE);
11549 #endif
11550
11551 - /* order matters here... the trick is that flags
11552 - is updated... in request_irq - to immediatedly obliterate
11553 - it is unwise. */
11554 - restore_flags(flags);
11555 -
11556 -
11557 if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
11558 - SA_INTERRUPT, "DZ", lines[0]))
11559 + 0, "DZ", lines[0]))
11560 panic("Unable to register DZ interrupt");
11561
11562 + for (i = 0; i < DZ_NB_PORT; i++)
11563 + if (lines[i]->hook) {
11564 + startup(lines[i]);
11565 + if (lines[i]->hook->init_channel)
11566 + (*lines[i]->hook->init_channel)(lines[i]);
11567 + }
11568 +
11569 return 0;
11570 }
11571
11572 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
11573 -static void dz_console_put_char(unsigned char ch)
11574 +/*
11575 + * polling I/O routines
11576 + */
11577 +static int dz_poll_tx_char(void *handle, unsigned char ch)
11578 {
11579 unsigned long flags;
11580 - int loops = 2500;
11581 - unsigned short tmp = ch;
11582 - /* this code sends stuff out to serial device - spinning its
11583 - wheels and waiting. */
11584 + struct dz_serial *info = handle;
11585 + unsigned short csr, tcr, trdy, mask;
11586 + int loops = 10000;
11587 + int ret;
11588
11589 - /* force the issue - point it at lines[3] */
11590 - dz_console = &multi[CONSOLE_LINE];
11591 + local_irq_save(flags);
11592 + csr = dz_in(info, DZ_CSR);
11593 + dz_out(info, DZ_CSR, csr & ~DZ_TIE);
11594 + tcr = dz_in(info, DZ_TCR);
11595 + tcr |= 1 << info->line;
11596 + mask = tcr;
11597 + dz_out(info, DZ_TCR, mask);
11598 + iob();
11599 + local_irq_restore(flags);
11600
11601 - save_flags(flags);
11602 - cli();
11603 + while (loops--) {
11604 + trdy = dz_in(info, DZ_CSR);
11605 + if (!(trdy & DZ_TRDY))
11606 + continue;
11607 + trdy = (trdy & DZ_TLINE) >> 8;
11608 + if (trdy == info->line)
11609 + break;
11610 + mask &= ~(1 << trdy);
11611 + dz_out(info, DZ_TCR, mask);
11612 + iob();
11613 + udelay(2);
11614 + }
11615
11616 + if (loops) {
11617 + dz_out(info, DZ_TDR, ch);
11618 + ret = 0;
11619 + } else
11620 + ret = -EAGAIN;
11621
11622 - /* spin our wheels */
11623 - while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
11624 + dz_out(info, DZ_TCR, tcr);
11625 + dz_out(info, DZ_CSR, csr);
11626
11627 - /* Actually transmit the character. */
11628 - dz_out(dz_console, DZ_TDR, tmp);
11629 + return ret;
11630 +}
11631
11632 - restore_flags(flags);
11633 +static int dz_poll_rx_char(void *handle)
11634 +{
11635 + return -ENODEV;
11636 +}
11637 +
11638 +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
11639 +{
11640 + struct dz_serial *info = multi + channel;
11641 +
11642 + if (info->hook) {
11643 + printk("%s: line %d has already a hook registered\n",
11644 + __FUNCTION__, channel);
11645 +
11646 + return 0;
11647 + } else {
11648 + hook->poll_rx_char = dz_poll_rx_char;
11649 + hook->poll_tx_char = dz_poll_tx_char;
11650 + info->hook = hook;
11651 +
11652 + return 1;
11653 + }
11654 +}
11655 +
11656 +int unregister_dz_hook(unsigned int channel)
11657 +{
11658 + struct dz_serial *info = &multi[channel];
11659 +
11660 + if (info->hook) {
11661 + info->hook = NULL;
11662 + return 1;
11663 + } else {
11664 + printk("%s: trying to unregister hook on line %d,"
11665 + " but none is registered\n", __FUNCTION__, channel);
11666 + return 0;
11667 + }
11668 }
11669 +
11670 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
11671 /*
11672 * -------------------------------------------------------------------
11673 * dz_console_print ()
11674 @@ -1465,17 +1570,19 @@
11675 * The console must be locked when we get here.
11676 * -------------------------------------------------------------------
11677 */
11678 -static void dz_console_print(struct console *cons,
11679 +static void dz_console_print(struct console *co,
11680 const char *str,
11681 unsigned int count)
11682 {
11683 + struct dz_serial *info = multi + co->index;
11684 +
11685 #ifdef DEBUG_DZ
11686 prom_printf((char *) str);
11687 #endif
11688 while (count--) {
11689 if (*str == '\n')
11690 - dz_console_put_char('\r');
11691 - dz_console_put_char(*str++);
11692 + dz_poll_tx_char(info, '\r');
11693 + dz_poll_tx_char(info, *str++);
11694 }
11695 }
11696
11697 @@ -1486,12 +1593,12 @@
11698
11699 static int __init dz_console_setup(struct console *co, char *options)
11700 {
11701 + struct dz_serial *info = multi + co->index;
11702 int baud = 9600;
11703 int bits = 8;
11704 int parity = 'n';
11705 int cflag = CREAD | HUPCL | CLOCAL;
11706 char *s;
11707 - unsigned short mask, tmp;
11708
11709 if (options) {
11710 baud = simple_strtoul(options, NULL, 10);
11711 @@ -1542,44 +1649,31 @@
11712 }
11713 co->cflag = cflag;
11714
11715 - /* TOFIX: force to console line */
11716 - dz_console = &multi[CONSOLE_LINE];
11717 if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
11718 - dz_console->port = KN01_DZ11_BASE;
11719 + info->port = KN01_DZ11_BASE;
11720 else
11721 - dz_console->port = KN02_DZ11_BASE;
11722 - dz_console->line = CONSOLE_LINE;
11723 + info->port = KN02_DZ11_BASE;
11724 + info->line = co->index;
11725
11726 - dz_out(dz_console, DZ_CSR, DZ_CLR);
11727 - while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
11728 + dz_out(info, DZ_CSR, DZ_CLR);
11729 + while (dz_in(info, DZ_CSR) & DZ_CLR);
11730
11731 /* enable scanning */
11732 - dz_out(dz_console, DZ_CSR, DZ_MSE);
11733 + dz_out(info, DZ_CSR, DZ_MSE);
11734
11735 /* Set up flags... */
11736 - dz_console->cflags = 0;
11737 - dz_console->cflags |= DZ_B9600;
11738 - dz_console->cflags |= DZ_CS8;
11739 - dz_console->cflags |= DZ_PARENB;
11740 - dz_out(dz_console, DZ_LPR, dz_console->cflags);
11741 -
11742 - mask = 1 << dz_console->line;
11743 - tmp = dz_in(dz_console, DZ_TCR); /* read the TX flag */
11744 - if (!(tmp & mask)) {
11745 - tmp |= mask; /* set the TX flag */
11746 - dz_out(dz_console, DZ_TCR, tmp);
11747 - }
11748 + dz_out(info, DZ_LPR, cflag | info->line);
11749 +
11750 return 0;
11751 }
11752
11753 -static struct console dz_sercons =
11754 -{
11755 - .name = "ttyS",
11756 - .write = dz_console_print,
11757 - .device = dz_console_device,
11758 - .setup = dz_console_setup,
11759 - .flags = CON_CONSDEV | CON_PRINTBUFFER,
11760 - .index = CONSOLE_LINE,
11761 +static struct console dz_sercons = {
11762 + .name = "ttyS",
11763 + .write = dz_console_print,
11764 + .device = dz_console_device,
11765 + .setup = dz_console_setup,
11766 + .flags = CON_PRINTBUFFER,
11767 + .index = -1,
11768 };
11769
11770 void __init dz_serial_console_init(void)
11771 diff -Nur linux-2.4.29/drivers/char/dz.h linux-mips/drivers/char/dz.h
11772 --- linux-2.4.29/drivers/char/dz.h 2002-08-03 02:39:43.000000000 +0200
11773 +++ linux-mips/drivers/char/dz.h 2004-09-28 02:53:01.000000000 +0200
11774 @@ -10,6 +10,8 @@
11775 #ifndef DZ_SERIAL_H
11776 #define DZ_SERIAL_H
11777
11778 +#include <asm/dec/serial.h>
11779 +
11780 #define SERIAL_MAGIC 0x5301
11781
11782 /*
11783 @@ -17,6 +19,7 @@
11784 */
11785 #define DZ_TRDY 0x8000 /* Transmitter empty */
11786 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
11787 +#define DZ_TLINE 0x0300 /* Transmitter Line Number */
11788 #define DZ_RDONE 0x0080 /* Receiver data ready */
11789 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
11790 #define DZ_MSE 0x0020 /* Master Scan Enable */
11791 @@ -37,19 +40,30 @@
11792 #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
11793
11794 /*
11795 - * Definitions for the Transmit Register.
11796 + * Definitions for the Transmit Control Register.
11797 */
11798 #define DZ_LINE_KEYBOARD 0x0001
11799 #define DZ_LINE_MOUSE 0x0002
11800 #define DZ_LINE_MODEM 0x0004
11801 #define DZ_LINE_PRINTER 0x0008
11802
11803 +#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
11804 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
11805 +#define DZ_PRINT_RTS 0x0200 /* RTS for the printer line (3) */
11806 +#define DZ_PRINT_DTR 0x0100 /* DTR for the printer line (3) */
11807 +#define DZ_LNENB 0x000f /* Transmitter Line Enable */
11808
11809 /*
11810 * Definitions for the Modem Status Register.
11811 */
11812 +#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
11813 +#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
11814 #define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
11815 +#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
11816 +#define DZ_PRINT_RI 0x0008 /* RI for the printer line (2) */
11817 +#define DZ_PRINT_CD 0x0004 /* CD for the printer line (2) */
11818 +#define DZ_PRINT_DSR 0x0002 /* DSR for the printer line (2) */
11819 +#define DZ_PRINT_CTS 0x0001 /* CTS for the printer line (2) */
11820
11821 /*
11822 * Definitions for the Transmit Data Register.
11823 @@ -115,9 +129,6 @@
11824
11825 #define DZ_EVENT_WRITE_WAKEUP 0
11826
11827 -#ifndef MIN
11828 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
11829 -
11830 #define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
11831 #define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
11832 #define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
11833 @@ -129,6 +140,7 @@
11834 #define DZ_CLOSING_WAIT_INF 0
11835 #define DZ_CLOSING_WAIT_NONE 65535
11836
11837 +#define DZ_SAK 0x0004 /* Secure Attention Key (Orange book) */
11838 #define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
11839 #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
11840 #define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
11841 @@ -166,79 +178,9 @@
11842 long session; /* Session of opening process */
11843 long pgrp; /* pgrp of opening process */
11844
11845 + struct dec_serial_hook *hook; /* Hook on this channel. */
11846 unsigned char is_console; /* flag indicating a serial console */
11847 unsigned char is_initialized;
11848 };
11849
11850 -static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
11851 -static struct dz_serial *dz_console;
11852 -static struct tty_driver serial_driver, callout_driver;
11853 -
11854 -static struct tty_struct *serial_table[DZ_NB_PORT];
11855 -static struct termios *serial_termios[DZ_NB_PORT];
11856 -static struct termios *serial_termios_locked[DZ_NB_PORT];
11857 -
11858 -static int serial_refcount;
11859 -
11860 -/*
11861 - * tmp_buf is used as a temporary buffer by serial_write. We need to
11862 - * lock it in case the copy_from_user blocks while swapping in a page,
11863 - * and some other program tries to do a serial write at the same time.
11864 - * Since the lock will only come under contention when the system is
11865 - * swapping and available memory is low, it makes sense to share one
11866 - * buffer across all the serial ports, since it significantly saves
11867 - * memory if large numbers of serial ports are open.
11868 - */
11869 -static unsigned char *tmp_buf;
11870 -static DECLARE_MUTEX(tmp_buf_sem);
11871 -
11872 -static char *dz_name = "DECstation DZ serial driver version ";
11873 -static char *dz_version = "1.02";
11874 -
11875 -static inline unsigned short dz_in (struct dz_serial *, unsigned);
11876 -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
11877 -
11878 -static inline void dz_sched_event (struct dz_serial *, int);
11879 -static inline void receive_chars (struct dz_serial *);
11880 -static inline void transmit_chars (struct dz_serial *);
11881 -static inline void check_modem_status (struct dz_serial *);
11882 -
11883 -static void dz_stop (struct tty_struct *);
11884 -static void dz_start (struct tty_struct *);
11885 -static void dz_interrupt (int, void *, struct pt_regs *);
11886 -static void do_serial_bh (void);
11887 -static void do_softint (void *);
11888 -static void do_serial_hangup (void *);
11889 -static void change_speed (struct dz_serial *);
11890 -static void dz_flush_chars (struct tty_struct *);
11891 -static void dz_console_print (struct console *, const char *, unsigned int);
11892 -static void dz_flush_buffer (struct tty_struct *);
11893 -static void dz_throttle (struct tty_struct *);
11894 -static void dz_unthrottle (struct tty_struct *);
11895 -static void dz_send_xchar (struct tty_struct *, char);
11896 -static void shutdown (struct dz_serial *);
11897 -static void send_break (struct dz_serial *, int);
11898 -static void dz_set_termios (struct tty_struct *, struct termios *);
11899 -static void dz_close (struct tty_struct *, struct file *);
11900 -static void dz_hangup (struct tty_struct *);
11901 -static void show_serial_version (void);
11902 -
11903 -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
11904 -static int dz_write_room (struct tty_struct *);
11905 -static int dz_chars_in_buffer (struct tty_struct *);
11906 -static int startup (struct dz_serial *);
11907 -static int get_serial_info (struct dz_serial *, struct serial_struct *);
11908 -static int set_serial_info (struct dz_serial *, struct serial_struct *);
11909 -static int get_lsr_info (struct dz_serial *, unsigned int *);
11910 -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
11911 -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
11912 -static int dz_open (struct tty_struct *, struct file *);
11913 -
11914 -#ifdef MODULE
11915 -int init_module (void)
11916 -void cleanup_module (void)
11917 -#endif
11918 -
11919 -#endif
11920 -
11921 #endif /* DZ_SERIAL_H */
11922 diff -Nur linux-2.4.29/drivers/char/ibm_workpad_keymap.map linux-mips/drivers/char/ibm_workpad_keymap.map
11923 --- linux-2.4.29/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
11924 +++ linux-mips/drivers/char/ibm_workpad_keymap.map 2003-12-20 15:20:44.000000000 +0100
11925 @@ -0,0 +1,343 @@
11926 +# Keymap for IBM Workpad z50
11927 +# US Mapping
11928 +#
11929 +# by Michael Klar <wyldfier@iname.com>
11930 +#
11931 +# This is a great big mess on account of how the Caps Lock key is handled as
11932 +# LeftShift-RightShift. Right shift key had to be broken out, so don't use
11933 +# use this map file as a basis for other keyboards that don't do the same
11934 +# thing with Caps Lock.
11935 +#
11936 +# This file is subject to the terms and conditions of the GNU General Public
11937 +# License. See the file "COPYING" in the main directory of this archive
11938 +# for more details.
11939 +
11940 +keymaps 0-2,4-5,8,12,32-33,36-37
11941 +strings as usual
11942 +
11943 +keycode 0 = F1 F11 Console_13
11944 + shiftr keycode 0 = F11
11945 + shift shiftr keycode 0 = F11
11946 + control keycode 0 = F1
11947 + alt keycode 0 = Console_1
11948 + control alt keycode 0 = Console_1
11949 +keycode 1 = F3 F13 Console_15
11950 + shiftr keycode 1 = F13
11951 + shift shiftr keycode 1 = F13
11952 + control keycode 1 = F3
11953 + alt keycode 1 = Console_3
11954 + control alt keycode 1 = Console_3
11955 +keycode 2 = F5 F15 Console_17
11956 + shiftr keycode 2 = F15
11957 + shift shiftr keycode 2 = F15
11958 + control keycode 2 = F5
11959 + alt keycode 2 = Console_5
11960 + control alt keycode 2 = Console_5
11961 +keycode 3 = F7 F17 Console_19
11962 + shiftr keycode 3 = F17
11963 + shift shiftr keycode 3 = F17
11964 + control keycode 3 = F7
11965 + alt keycode 3 = Console_7
11966 + control alt keycode 3 = Console_7
11967 +keycode 4 = F9 F19 Console_21
11968 + shiftr keycode 4 = F19
11969 + shift shiftr keycode 4 = F19
11970 + control keycode 4 = F9
11971 + alt keycode 4 = Console_9
11972 + control alt keycode 4 = Console_9
11973 +#keycode 5 is contrast down
11974 +#keycode 6 is contrast up
11975 +keycode 7 = F11 F11 Console_23
11976 + shiftr keycode 7 = F11
11977 + shift shiftr keycode 7 = F11
11978 + control keycode 7 = F11
11979 + alt keycode 7 = Console_11
11980 + control alt keycode 7 = Console_11
11981 +keycode 8 = F2 F12 Console_14
11982 + shiftr keycode 8 = F12
11983 + shift shiftr keycode 8 = F12
11984 + control keycode 8 = F2
11985 + alt keycode 8 = Console_2
11986 + control alt keycode 8 = Console_2
11987 +keycode 9 = F4 F14 Console_16
11988 + shiftr keycode 9 = F14
11989 + shift shiftr keycode 9 = F14
11990 + control keycode 9 = F4
11991 + alt keycode 9 = Console_4
11992 + control alt keycode 9 = Console_4
11993 +keycode 10 = F6 F16 Console_18
11994 + shiftr keycode 10 = F16
11995 + shift shiftr keycode 10 = F16
11996 + control keycode 10 = F6
11997 + alt keycode 10 = Console_6
11998 + control alt keycode 10 = Console_6
11999 +keycode 11 = F8 F18 Console_20
12000 + shiftr keycode 11 = F18
12001 + shift shiftr keycode 11 = F18
12002 + control keycode 11 = F8
12003 + alt keycode 11 = Console_8
12004 + control alt keycode 11 = Console_8
12005 +keycode 12 = F10 F20 Console_22
12006 + shiftr keycode 12 = F20
12007 + shift shiftr keycode 12 = F20
12008 + control keycode 12 = F10
12009 + alt keycode 12 = Console_10
12010 + control alt keycode 12 = Console_10
12011 +#keycode 13 is brightness down
12012 +#keycode 14 is brightness up
12013 +keycode 15 = F12 F12 Console_24
12014 + shiftr keycode 15 = F12
12015 + shift shiftr keycode 15 = F12
12016 + control keycode 15 = F12
12017 + alt keycode 15 = Console_12
12018 + control alt keycode 15 = Console_12
12019 +keycode 16 = apostrophe quotedbl
12020 + shiftr keycode 16 = quotedbl
12021 + shift shiftr keycode 16 = quotedbl
12022 + control keycode 16 = Control_g
12023 + alt keycode 16 = Meta_apostrophe
12024 +keycode 17 = bracketleft braceleft
12025 + shiftr keycode 17 = braceleft
12026 + shift shiftr keycode 17 = braceleft
12027 + control keycode 17 = Escape
12028 + alt keycode 17 = Meta_bracketleft
12029 +keycode 18 = minus underscore backslash
12030 + shiftr keycode 18 = underscore
12031 + shift shiftr keycode 18 = underscore
12032 + control keycode 18 = Control_underscore
12033 + shift control keycode 18 = Control_underscore
12034 + shiftr control keycode 18 = Control_underscore
12035 + shift shiftr control keycode 18 = Control_underscore
12036 + alt keycode 18 = Meta_minus
12037 +keycode 19 = zero parenright braceright
12038 + shiftr keycode 19 = parenright
12039 + shift shiftr keycode 19 = parenright
12040 + alt keycode 19 = Meta_zero
12041 +keycode 20 = p
12042 + shiftr keycode 20 = +P
12043 + shift shiftr keycode 20 = +p
12044 +keycode 21 = semicolon colon
12045 + shiftr keycode 21 = colon
12046 + shift shiftr keycode 21 = colon
12047 + alt keycode 21 = Meta_semicolon
12048 +keycode 22 = Up Scroll_Backward
12049 + shiftr keycode 22 = Scroll_Backward
12050 + shift shiftr keycode 22 = Scroll_Backward
12051 + alt keycode 22 = Prior
12052 +keycode 23 = slash question
12053 + shiftr keycode 23 = question
12054 + shift shiftr keycode 23 = question
12055 + control keycode 23 = Delete
12056 + alt keycode 23 = Meta_slash
12057 +
12058 +keycode 27 = nine parenleft bracketright
12059 + shiftr keycode 27 = parenleft
12060 + shift shiftr keycode 27 = parenleft
12061 + alt keycode 27 = Meta_nine
12062 +keycode 28 = o
12063 + shiftr keycode 28 = +O
12064 + shift shiftr keycode 28 = +o
12065 +keycode 29 = l
12066 + shiftr keycode 29 = +L
12067 + shift shiftr keycode 29 = +l
12068 +keycode 30 = period greater
12069 + shiftr keycode 30 = greater
12070 + shift shiftr keycode 30 = greater
12071 + control keycode 30 = Compose
12072 + alt keycode 30 = Meta_period
12073 +
12074 +keycode 32 = Left Decr_Console
12075 + shiftr keycode 32 = Decr_Console
12076 + shift shiftr keycode 32 = Decr_Console
12077 + alt keycode 32 = Home
12078 +keycode 33 = bracketright braceright asciitilde
12079 + shiftr keycode 33 = braceright
12080 + shift shiftr keycode 33 = braceright
12081 + control keycode 33 = Control_bracketright
12082 + alt keycode 33 = Meta_bracketright
12083 +keycode 34 = equal plus
12084 + shiftr keycode 34 = plus
12085 + shift shiftr keycode 34 = plus
12086 + alt keycode 34 = Meta_equal
12087 +keycode 35 = eight asterisk bracketleft
12088 + shiftr keycode 35 = asterisk
12089 + shift shiftr keycode 35 = asterisk
12090 + control keycode 35 = Delete
12091 + alt keycode 35 = Meta_eight
12092 +keycode 36 = i
12093 + shiftr keycode 36 = +I
12094 + shift shiftr keycode 36 = +i
12095 +keycode 37 = k
12096 + shiftr keycode 37 = +K
12097 + shift shiftr keycode 37 = +k
12098 +keycode 38 = comma less
12099 + shiftr keycode 38 = less
12100 + shift shiftr keycode 38 = less
12101 + alt keycode 38 = Meta_comma
12102 +
12103 +keycode 40 = h
12104 + shiftr keycode 40 = +H
12105 + shift shiftr keycode 40 = +h
12106 +keycode 41 = y
12107 + shiftr keycode 41 = +Y
12108 + shift shiftr keycode 41 = +y
12109 +keycode 42 = six asciicircum
12110 + shiftr keycode 42 = asciicircum
12111 + shift shiftr keycode 42 = asciicircum
12112 + control keycode 42 = Control_asciicircum
12113 + alt keycode 42 = Meta_six
12114 +keycode 43 = seven ampersand braceleft
12115 + shiftr keycode 43 = ampersand
12116 + shift shiftr keycode 43 = ampersand
12117 + control keycode 43 = Control_underscore
12118 + alt keycode 43 = Meta_seven
12119 +keycode 44 = u
12120 + shiftr keycode 44 = +U
12121 + shift shiftr keycode 44 = +u
12122 +keycode 45 = j
12123 + shiftr keycode 45 = +J
12124 + shift shiftr keycode 45 = +j
12125 +keycode 46 = m
12126 + shiftr keycode 46 = +M
12127 + shift shiftr keycode 46 = +m
12128 +keycode 47 = n
12129 + shiftr keycode 47 = +N
12130 + shift shiftr keycode 47 = +n
12131 +
12132 +# This is the "Backspace" key:
12133 +keycode 49 = Delete Delete
12134 + shiftr keycode 49 = Delete
12135 + shift shiftr keycode 49 = Delete
12136 + control keycode 49 = BackSpace
12137 + alt keycode 49 = Meta_Delete
12138 +keycode 50 = Num_Lock
12139 + shift keycode 50 = Bare_Num_Lock
12140 + shiftr keycode 50 = Bare_Num_Lock
12141 + shift shiftr keycode 50 = Bare_Num_Lock
12142 +# This is the "Delete" key:
12143 +keycode 51 = Remove
12144 + control alt keycode 51 = Boot
12145 +
12146 +keycode 53 = backslash bar
12147 + shiftr keycode 53 = bar
12148 + shift shiftr keycode 53 = bar
12149 + control keycode 53 = Control_backslash
12150 + alt keycode 53 = Meta_backslash
12151 +keycode 54 = Return
12152 + alt keycode 54 = Meta_Control_m
12153 +keycode 55 = space space
12154 + shiftr keycode 55 = space
12155 + shift shiftr keycode 55 = space
12156 + control keycode 55 = nul
12157 + alt keycode 55 = Meta_space
12158 +keycode 56 = g
12159 + shiftr keycode 56 = +G
12160 + shift shiftr keycode 56 = +g
12161 +keycode 57 = t
12162 + shiftr keycode 57 = +T
12163 + shift shiftr keycode 57 = +t
12164 +keycode 58 = five percent
12165 + shiftr keycode 58 = percent
12166 + shift shiftr keycode 58 = percent
12167 + control keycode 58 = Control_bracketright
12168 + alt keycode 58 = Meta_five
12169 +keycode 59 = four dollar dollar
12170 + shiftr keycode 59 = dollar
12171 + shift shiftr keycode 59 = dollar
12172 + control keycode 59 = Control_backslash
12173 + alt keycode 59 = Meta_four
12174 +keycode 60 = r
12175 + shiftr keycode 60 = +R
12176 + shift shiftr keycode 60 = +r
12177 +keycode 61 = f
12178 + shiftr keycode 61 = +F
12179 + shift shiftr keycode 61 = +f
12180 + altgr keycode 61 = Hex_F
12181 +keycode 62 = v
12182 + shiftr keycode 62 = +V
12183 + shift shiftr keycode 62 = +v
12184 +keycode 63 = b
12185 + shiftr keycode 63 = +B
12186 + shift shiftr keycode 63 = +b
12187 + altgr keycode 63 = Hex_B
12188 +
12189 +keycode 67 = three numbersign
12190 + shiftr keycode 67 = numbersign
12191 + shift shiftr keycode 67 = numbersign
12192 + control keycode 67 = Escape
12193 + alt keycode 67 = Meta_three
12194 +keycode 68 = e
12195 + shiftr keycode 68 = +E
12196 + shift shiftr keycode 68 = +e
12197 + altgr keycode 68 = Hex_E
12198 +keycode 69 = d
12199 + shiftr keycode 69 = +D
12200 + shift shiftr keycode 69 = +d
12201 + altgr keycode 69 = Hex_D
12202 +keycode 70 = c
12203 + shiftr keycode 70 = +C
12204 + shift shiftr keycode 70 = +c
12205 + altgr keycode 70 = Hex_C
12206 +keycode 71 = Right Incr_Console
12207 + shiftr keycode 71 = Incr_Console
12208 + shift shiftr keycode 71 = Incr_Console
12209 + alt keycode 71 = End
12210 +
12211 +keycode 75 = two at at
12212 + shiftr keycode 75 = at
12213 + shift shiftr keycode 75 = at
12214 + control keycode 75 = nul
12215 + shift control keycode 75 = nul
12216 + shiftr control keycode 75 = nul
12217 + shift shiftr control keycode 75 = nul
12218 + alt keycode 75 = Meta_two
12219 +keycode 76 = w
12220 + shiftr keycode 76 = +W
12221 + shift shiftr keycode 76 = +w
12222 +keycode 77 = s
12223 + shiftr keycode 77 = +S
12224 + shift shiftr keycode 77 = +s
12225 +keycode 78 = x
12226 + shiftr keycode 78 = +X
12227 + shift shiftr keycode 78 = +x
12228 +keycode 79 = Down Scroll_Forward
12229 + shiftr keycode 79 = Scroll_Forward
12230 + shift shiftr keycode 79 = Scroll_Forward
12231 + alt keycode 79 = Next
12232 +keycode 80 = Escape Escape
12233 + shiftr keycode 80 = Escape
12234 + shift shiftr keycode 80 = Escape
12235 + alt keycode 80 = Meta_Escape
12236 +keycode 81 = Tab Tab
12237 + shiftr keycode 81 = Tab
12238 + shift shiftr keycode 81 = Tab
12239 + alt keycode 81 = Meta_Tab
12240 +keycode 82 = grave asciitilde
12241 + shiftr keycode 82 = asciitilde
12242 + shift shiftr keycode 82 = asciitilde
12243 + control keycode 82 = nul
12244 + alt keycode 82 = Meta_grave
12245 +keycode 83 = one exclam
12246 + shiftr keycode 83 = exclam
12247 + shift shiftr keycode 83 = exclam
12248 + alt keycode 83 = Meta_one
12249 +keycode 84 = q
12250 + shiftr keycode 84 = +Q
12251 + shift shiftr keycode 84 = +q
12252 +keycode 85 = a
12253 + shiftr keycode 85 = +A
12254 + shift shiftr keycode 85 = +a
12255 + altgr keycode 85 = Hex_A
12256 +keycode 86 = z
12257 + shiftr keycode 86 = +Z
12258 + shift shiftr keycode 86 = +z
12259 +
12260 +# This is the windows key:
12261 +keycode 88 = Decr_Console
12262 +keycode 89 = Shift
12263 +keycode 90 = Control
12264 +keycode 91 = Control
12265 +keycode 92 = Alt
12266 +keycode 93 = AltGr
12267 +keycode 94 = ShiftR
12268 + shift keycode 94 = Caps_Lock
12269 diff -Nur linux-2.4.29/drivers/char/indydog.c linux-mips/drivers/char/indydog.c
12270 --- linux-2.4.29/drivers/char/indydog.c 2003-08-25 13:44:41.000000000 +0200
12271 +++ linux-mips/drivers/char/indydog.c 2004-06-22 17:32:07.000000000 +0200
12272 @@ -1,5 +1,5 @@
12273 /*
12274 - * IndyDog 0.2 A Hardware Watchdog Device for SGI IP22
12275 + * IndyDog 0.3 A Hardware Watchdog Device for SGI IP22
12276 *
12277 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
12278 *
12279 @@ -7,10 +7,10 @@
12280 * modify it under the terms of the GNU General Public License
12281 * as published by the Free Software Foundation; either version
12282 * 2 of the License, or (at your option) any later version.
12283 - *
12284 + *
12285 * based on softdog.c by Alan Cox <alan@redhat.com>
12286 */
12287 -
12288 +
12289 #include <linux/module.h>
12290 #include <linux/config.h>
12291 #include <linux/types.h>
12292 @@ -19,13 +19,12 @@
12293 #include <linux/mm.h>
12294 #include <linux/miscdevice.h>
12295 #include <linux/watchdog.h>
12296 -#include <linux/smp_lock.h>
12297 #include <linux/init.h>
12298 #include <asm/uaccess.h>
12299 #include <asm/sgi/mc.h>
12300
12301 -static unsigned long indydog_alive;
12302 -static int expect_close = 0;
12303 +#define PFX "indydog: "
12304 +static int indydog_alive;
12305
12306 #ifdef CONFIG_WATCHDOG_NOWAYOUT
12307 static int nowayout = 1;
12308 @@ -33,10 +32,30 @@
12309 static int nowayout = 0;
12310 #endif
12311
12312 +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
12313 +
12314 MODULE_PARM(nowayout,"i");
12315 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
12316
12317 -static inline void indydog_ping(void)
12318 +static void indydog_start(void)
12319 +{
12320 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12321 +
12322 + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
12323 + sgimc->cpuctrl0 = mc_ctrl0;
12324 +}
12325 +
12326 +static void indydog_stop(void)
12327 +{
12328 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12329 +
12330 + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
12331 + sgimc->cpuctrl0 = mc_ctrl0;
12332 +
12333 + printk(KERN_INFO PFX "Stopped watchdog timer.\n");
12334 +}
12335 +
12336 +static void indydog_ping(void)
12337 {
12338 sgimc->watchdogt = 0;
12339 }
12340 @@ -46,18 +65,14 @@
12341 */
12342 static int indydog_open(struct inode *inode, struct file *file)
12343 {
12344 - u32 mc_ctrl0;
12345 -
12346 - if (test_and_set_bit(0,&indydog_alive))
12347 + if (indydog_alive)
12348 return -EBUSY;
12349
12350 - if (nowayout) {
12351 + if (nowayout)
12352 MOD_INC_USE_COUNT;
12353 - }
12354
12355 /* Activate timer */
12356 - mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
12357 - sgimc->cpuctrl0 = mc_ctrl0;
12358 + indydog_start();
12359 indydog_ping();
12360
12361 indydog_alive = 1;
12362 @@ -69,63 +84,48 @@
12363 static int indydog_release(struct inode *inode, struct file *file)
12364 {
12365 /* Shut off the timer.
12366 - * Lock it in if it's a module and we set nowayout. */
12367 - lock_kernel();
12368 - if (expect_close) {
12369 - u32 mc_ctrl0 = sgimc->cpuctrl0;
12370 + * Lock it in if it's a module and we defined ...NOWAYOUT */
12371 + if (!nowayout) {
12372 + u32 mc_ctrl0 = sgimc->cpuctrl0;
12373 mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
12374 sgimc->cpuctrl0 = mc_ctrl0;
12375 printk(KERN_INFO "Stopped watchdog timer.\n");
12376 - } else
12377 - printk(KERN_CRIT "WDT device closed unexpectedly. WDT will not stop!\n");
12378 - clear_bit(0, &indydog_alive);
12379 - unlock_kernel();
12380 + }
12381 + indydog_alive = 0;
12382
12383 return 0;
12384 }
12385
12386 static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
12387 {
12388 - /* Can't seek (pwrite) on this device */
12389 + /* Can't seek (pwrite) on this device */
12390 if (ppos != &file->f_pos)
12391 return -ESPIPE;
12392
12393 - /*
12394 - * Refresh the timer.
12395 - */
12396 + /* Refresh the timer. */
12397 if (len) {
12398 - if (!nowayout) {
12399 - size_t i;
12400 -
12401 - /* In case it was set long ago */
12402 - expect_close = 0;
12403 -
12404 - for (i = 0; i != len; i++) {
12405 - char c;
12406 - if (get_user(c, data + i))
12407 - return -EFAULT;
12408 - if (c == 'V')
12409 - expect_close = 1;
12410 - }
12411 - }
12412 indydog_ping();
12413 - return 1;
12414 }
12415 - return 0;
12416 + return len;
12417 }
12418
12419 static int indydog_ioctl(struct inode *inode, struct file *file,
12420 unsigned int cmd, unsigned long arg)
12421 {
12422 + int options, retval = -EINVAL;
12423 static struct watchdog_info ident = {
12424 - options: WDIOF_MAGICCLOSE,
12425 - identity: "Hardware Watchdog for SGI IP22",
12426 + .options = WDIOF_KEEPALIVEPING |
12427 + WDIOF_MAGICCLOSE,
12428 + .firmware_version = 0,
12429 + .identity = "Hardware Watchdog for SGI IP22",
12430 };
12431 +
12432 switch (cmd) {
12433 default:
12434 return -ENOIOCTLCMD;
12435 case WDIOC_GETSUPPORT:
12436 - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
12437 + if (copy_to_user((struct watchdog_info *)arg,
12438 + &ident, sizeof(ident)))
12439 return -EFAULT;
12440 return 0;
12441 case WDIOC_GETSTATUS:
12442 @@ -134,31 +134,53 @@
12443 case WDIOC_KEEPALIVE:
12444 indydog_ping();
12445 return 0;
12446 + case WDIOC_GETTIMEOUT:
12447 + return put_user(WATCHDOG_TIMEOUT,(int *)arg);
12448 + case WDIOC_SETOPTIONS:
12449 + {
12450 + if (get_user(options, (int *)arg))
12451 + return -EFAULT;
12452 +
12453 + if (options & WDIOS_DISABLECARD) {
12454 + indydog_stop();
12455 + retval = 0;
12456 + }
12457 +
12458 + if (options & WDIOS_ENABLECARD) {
12459 + indydog_start();
12460 + retval = 0;
12461 + }
12462 +
12463 + return retval;
12464 + }
12465 }
12466 }
12467
12468 static struct file_operations indydog_fops = {
12469 - owner: THIS_MODULE,
12470 - write: indydog_write,
12471 - ioctl: indydog_ioctl,
12472 - open: indydog_open,
12473 - release: indydog_release,
12474 + .owner = THIS_MODULE,
12475 + .write = indydog_write,
12476 + .ioctl = indydog_ioctl,
12477 + .open = indydog_open,
12478 + .release = indydog_release,
12479 };
12480
12481 static struct miscdevice indydog_miscdev = {
12482 - minor: WATCHDOG_MINOR,
12483 - name: "watchdog",
12484 - fops: &indydog_fops,
12485 + .minor = WATCHDOG_MINOR,
12486 + .name = "watchdog",
12487 + .fops = &indydog_fops,
12488 };
12489
12490 -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
12491 +static char banner[] __initdata =
12492 + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
12493
12494 static int __init watchdog_init(void)
12495 {
12496 int ret = misc_register(&indydog_miscdev);
12497 -
12498 - if (ret)
12499 + if (ret) {
12500 + printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
12501 + WATCHDOG_MINOR, ret);
12502 return ret;
12503 + }
12504
12505 printk(banner);
12506
12507 @@ -172,4 +194,7 @@
12508
12509 module_init(watchdog_init);
12510 module_exit(watchdog_exit);
12511 +
12512 +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
12513 +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
12514 MODULE_LICENSE("GPL");
12515 diff -Nur linux-2.4.29/drivers/char/ip27-rtc.c linux-mips/drivers/char/ip27-rtc.c
12516 --- linux-2.4.29/drivers/char/ip27-rtc.c 2004-02-18 14:36:31.000000000 +0100
12517 +++ linux-mips/drivers/char/ip27-rtc.c 2004-04-06 03:35:30.000000000 +0200
12518 @@ -44,6 +44,7 @@
12519 #include <asm/sn/klconfig.h>
12520 #include <asm/sn/sn0/ip27.h>
12521 #include <asm/sn/sn0/hub.h>
12522 +#include <asm/sn/sn_private.h>
12523
12524 static int rtc_ioctl(struct inode *inode, struct file *file,
12525 unsigned int cmd, unsigned long arg);
12526 @@ -209,11 +210,8 @@
12527
12528 static int __init rtc_init(void)
12529 {
12530 - nasid_t nid;
12531 -
12532 - nid = get_nasid();
12533 rtc = (struct m48t35_rtc *)
12534 - (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
12535 + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
12536
12537 printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
12538 if (misc_register(&rtc_dev)) {
12539 @@ -325,3 +323,7 @@
12540
12541 rtc_tm->tm_mon--;
12542 }
12543 +
12544 +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
12545 +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
12546 +MODULE_LICENSE("GPL");
12547 diff -Nur linux-2.4.29/drivers/char/mips_rtc.c linux-mips/drivers/char/mips_rtc.c
12548 --- linux-2.4.29/drivers/char/mips_rtc.c 2004-01-05 14:53:56.000000000 +0100
12549 +++ linux-mips/drivers/char/mips_rtc.c 2004-06-28 14:54:53.000000000 +0200
12550 @@ -53,14 +53,6 @@
12551 #include <asm/io.h>
12552 #include <asm/uaccess.h>
12553 #include <asm/system.h>
12554 -
12555 -/*
12556 - * Check machine
12557 - */
12558 -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
12559 -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
12560 -#endif
12561 -
12562 #include <asm/time.h>
12563
12564 static unsigned long rtc_status = 0; /* bitmapped status byte. */
12565 diff -Nur linux-2.4.29/drivers/char/sb1250_duart.c linux-mips/drivers/char/sb1250_duart.c
12566 --- linux-2.4.29/drivers/char/sb1250_duart.c 2004-02-18 14:36:31.000000000 +0100
12567 +++ linux-mips/drivers/char/sb1250_duart.c 2004-09-17 01:25:44.000000000 +0200
12568 @@ -328,10 +328,11 @@
12569 if (c <= 0) break;
12570
12571 if (from_user) {
12572 + spin_unlock_irqrestore(&us->outp_lock, flags);
12573 if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
12574 - spin_unlock_irqrestore(&us->outp_lock, flags);
12575 return -EFAULT;
12576 }
12577 + spin_lock_irqsave(&us->outp_lock, flags);
12578 } else {
12579 memcpy(us->outp_buf + us->outp_tail, buf, c);
12580 }
12581 @@ -498,9 +499,31 @@
12582 duart_set_cflag(us->line, tty->termios->c_cflag);
12583 }
12584
12585 +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
12586 +
12587 + struct serial_struct tmp;
12588 +
12589 + memset(&tmp, 0, sizeof(tmp));
12590 +
12591 + tmp.type=PORT_SB1250;
12592 + tmp.line=us->line;
12593 + tmp.port=A_DUART_CHANREG(tmp.line,0);
12594 + tmp.irq=K_INT_UART_0 + tmp.line;
12595 + tmp.xmit_fifo_size=16; /* fixed by hw */
12596 + tmp.baud_base=5000000;
12597 + tmp.io_type=SERIAL_IO_MEM;
12598 +
12599 + if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
12600 + return -EFAULT;
12601 +
12602 + return 0;
12603 +}
12604 +
12605 static int duart_ioctl(struct tty_struct *tty, struct file * file,
12606 unsigned int cmd, unsigned long arg)
12607 {
12608 + uart_state_t *us = (uart_state_t *) tty->driver_data;
12609 +
12610 /* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
12611 return -ENODEV;*/
12612 switch (cmd) {
12613 @@ -517,7 +540,7 @@
12614 printk("Ignoring TIOCMSET\n");
12615 break;
12616 case TIOCGSERIAL:
12617 - printk("Ignoring TIOCGSERIAL\n");
12618 + return get_serial_info(us,(struct serial_struct *) arg);
12619 break;
12620 case TIOCSSERIAL:
12621 printk("Ignoring TIOCSSERIAL\n");
12622 diff -Nur linux-2.4.29/drivers/char/serial.c linux-mips/drivers/char/serial.c
12623 --- linux-2.4.29/drivers/char/serial.c 2005-01-19 15:09:50.000000000 +0100
12624 +++ linux-mips/drivers/char/serial.c 2004-12-27 05:13:43.000000000 +0100
12625 @@ -62,6 +62,12 @@
12626 * Robert Schwebel <robert@schwebel.de>,
12627 * Juergen Beisert <jbeisert@eurodsn.de>,
12628 * Theodore Ts'o <tytso@mit.edu>
12629 + *
12630 + * 10/00: Added suport for MIPS Atlas board.
12631 + * 11/00: Hooks for serial kernel debug port support added.
12632 + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
12633 + * carstenl@mips.com
12634 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
12635 */
12636
12637 static char *serial_version = "5.05c";
12638 @@ -413,6 +419,22 @@
12639 return 0;
12640 }
12641
12642 +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
12643 +
12644 +#include <asm/mips-boards/atlas.h>
12645 +
12646 +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
12647 +{
12648 + return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
12649 +}
12650 +
12651 +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
12652 +{
12653 + *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
12654 +}
12655 +
12656 +#else
12657 +
12658 static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
12659 {
12660 switch (info->io_type) {
12661 @@ -447,6 +469,8 @@
12662 outb(value, info->port+offset);
12663 }
12664 }
12665 +#endif
12666 +
12667
12668 /*
12669 * We used to support using pause I/O for certain machines. We
12670 diff -Nur linux-2.4.29/drivers/char/victor_mpc30x_keymap.map linux-mips/drivers/char/victor_mpc30x_keymap.map
12671 --- linux-2.4.29/drivers/char/victor_mpc30x_keymap.map 1970-01-01 01:00:00.000000000 +0100
12672 +++ linux-mips/drivers/char/victor_mpc30x_keymap.map 2004-02-05 18:04:42.000000000 +0100
12673 @@ -0,0 +1,102 @@
12674 +# Victor Interlink MP-C303/304 keyboard keymap
12675 +#
12676 +# Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
12677 +#
12678 +# This file is subject to the terms and conditions of the GNU General Public
12679 +# License. See the file "COPYING" in the main directory of this archive
12680 +# for more details.
12681 +keymaps 0-1,4-5,8-9,12
12682 +alt_is_meta
12683 +strings as usual
12684 +compose as usual for "iso-8859-1"
12685 +
12686 +# First line
12687 +keycode 89 = Escape
12688 +keycode 9 = Delete
12689 +
12690 +# 2nd line
12691 +keycode 73 = one exclam
12692 +keycode 18 = two quotedbl
12693 +keycode 92 = three numbersign
12694 + control keycode 92 = Escape
12695 +keycode 53 = four dollar
12696 + control keycode 53 = Control_backslash
12697 +keycode 21 = five percent
12698 + control keycode 21 = Control_bracketright
12699 +keycode 50 = six ampersand
12700 + control keycode 50 = Control_underscore
12701 +keycode 48 = seven apostrophe
12702 +keycode 51 = eight parenleft
12703 +keycode 16 = nine parenright
12704 +keycode 80 = zero asciitilde
12705 + control keycode 80 = nul
12706 +keycode 49 = minus equal
12707 +keycode 30 = asciicircum asciitilde
12708 + control keycode 30 = Control_asciicircum
12709 +keycode 5 = backslash bar
12710 + control keycode 5 = Control_backslash
12711 +keycode 13 = BackSpace
12712 +# 3rd line
12713 +keycode 57 = Tab
12714 +keycode 74 = q
12715 +keycode 26 = w
12716 +keycode 81 = e
12717 +keycode 29 = r
12718 +keycode 37 = t
12719 +keycode 45 = y
12720 +keycode 72 = u
12721 +keycode 24 = i
12722 +keycode 32 = o
12723 +keycode 41 = p
12724 +keycode 1 = at grave
12725 + control keycode 1 = nul
12726 +keycode 54 = bracketleft braceleft
12727 +keycode 63 = Return
12728 + alt keycode 63 = Meta_Control_m
12729 +# 4th line
12730 +keycode 23 = Caps_Lock
12731 +keycode 34 = a
12732 +keycode 66 = s
12733 +keycode 52 = d
12734 +keycode 20 = f
12735 +keycode 84 = g
12736 +keycode 67 = h
12737 +keycode 64 = j
12738 +keycode 17 = k
12739 +keycode 83 = l
12740 +keycode 22 = semicolon plus
12741 +keycode 61 = colon asterisk
12742 + control keycode 61 = Control_g
12743 +keycode 65 = bracketright braceright
12744 + control keycode 65 = Control_bracketright
12745 +# 5th line
12746 +keycode 91 = Shift
12747 +keycode 76 = z
12748 +keycode 68 = x
12749 +keycode 28 = c
12750 +keycode 36 = v
12751 +keycode 44 = b
12752 +keycode 19 = n
12753 +keycode 27 = m
12754 +keycode 35 = comma less
12755 +keycode 3 = period greater
12756 + control keycode 3 = Compose
12757 +keycode 38 = slash question
12758 + control keycode 38 = Delete
12759 + shift control keycode 38 = Delete
12760 +keycode 6 = backslash underscore
12761 + control keycode 6 = Control_backslash
12762 +keycode 55 = Up
12763 + alt keycode 55 = PageUp
12764 +keycode 14 = Shift
12765 +# 6th line
12766 +keycode 56 = Control
12767 +keycode 42 = Alt
12768 +keycode 33 = space
12769 + control keycode 33 = nul
12770 +keycode 7 = Left
12771 + alt keycode 7 = Home
12772 +keycode 31 = Down
12773 + alt keycode 31 = PageDown
12774 +keycode 47 = Right
12775 + alt keycode 47 = End
12776 diff -Nur linux-2.4.29/drivers/char/vr41xx_keyb.c linux-mips/drivers/char/vr41xx_keyb.c
12777 --- linux-2.4.29/drivers/char/vr41xx_keyb.c 2004-02-18 14:36:31.000000000 +0100
12778 +++ linux-mips/drivers/char/vr41xx_keyb.c 2004-02-17 13:08:55.000000000 +0100
12779 @@ -308,7 +308,7 @@
12780 if (found != 0) {
12781 kiu_base = VRC4173_KIU_OFFSET;
12782 mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
12783 - vrc4173_clock_supply(VRC4173_KIU_CLOCK);
12784 + vrc4173_supply_clock(VRC4173_KIU_CLOCK);
12785 }
12786 }
12787 #endif
12788 @@ -325,7 +325,7 @@
12789
12790 if (current_cpu_data.cputype == CPU_VR4111 ||
12791 current_cpu_data.cputype == CPU_VR4121)
12792 - vr41xx_clock_supply(KIU_CLOCK);
12793 + vr41xx_supply_clock(KIU_CLOCK);
12794
12795 kiu_writew(KIURST_KIURST, KIURST);
12796
12797 diff -Nur linux-2.4.29/drivers/i2c/Config.in linux-mips/drivers/i2c/Config.in
12798 --- linux-2.4.29/drivers/i2c/Config.in 2004-04-14 15:05:29.000000000 +0200
12799 +++ linux-mips/drivers/i2c/Config.in 2005-02-12 04:06:32.000000000 +0100
12800 @@ -57,6 +57,10 @@
12801 if [ "$CONFIG_SGI_IP22" = "y" ]; then
12802 dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
12803 fi
12804 +
12805 + if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
12806 + dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
12807 + fi
12808
12809 # This is needed for automatic patch generation: sensors code starts here
12810 # This is needed for automatic patch generation: sensors code ends here
12811 diff -Nur linux-2.4.29/drivers/i2c/Makefile linux-mips/drivers/i2c/Makefile
12812 --- linux-2.4.29/drivers/i2c/Makefile 2004-02-18 14:36:31.000000000 +0100
12813 +++ linux-mips/drivers/i2c/Makefile 2005-02-12 04:06:32.000000000 +0100
12814 @@ -6,7 +6,7 @@
12815
12816 export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
12817 i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
12818 - i2c-proc.o
12819 + i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
12820
12821 obj-$(CONFIG_I2C) += i2c-core.o
12822 obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
12823 @@ -25,6 +25,7 @@
12824 obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
12825 obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
12826 obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
12827 +obj-$(CONFIG_I2C_ALGO_AU1550) += i2c-algo-au1550.o i2c-au1550.o
12828
12829 # This is needed for automatic patch generation: sensors code starts here
12830 # This is needed for automatic patch generation: sensors code ends here
12831 diff -Nur linux-2.4.29/drivers/i2c/i2c-algo-au1550.c linux-mips/drivers/i2c/i2c-algo-au1550.c
12832 --- linux-2.4.29/drivers/i2c/i2c-algo-au1550.c 1970-01-01 01:00:00.000000000 +0100
12833 +++ linux-mips/drivers/i2c/i2c-algo-au1550.c 2005-02-12 04:06:32.000000000 +0100
12834 @@ -0,0 +1,340 @@
12835 +/*
12836 + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
12837 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
12838 + *
12839 + * The documentation describes this as an SMBus controller, but it doesn't
12840 + * understand any of the SMBus protocol in hardware. It's really an I2C
12841 + * controller that could emulate most of the SMBus in software.
12842 + */
12843 +
12844 +#include <linux/kernel.h>
12845 +#include <linux/module.h>
12846 +#include <linux/init.h>
12847 +#include <linux/errno.h>
12848 +#include <linux/delay.h>
12849 +
12850 +#include <asm/au1000.h>
12851 +#include <asm/au1xxx_psc.h>
12852 +
12853 +#include <linux/i2c.h>
12854 +#include <linux/i2c-algo-au1550.h>
12855 +
12856 +static int
12857 +wait_xfer_done(struct i2c_algo_au1550_data *adap)
12858 +{
12859 + u32 stat;
12860 + int i;
12861 + volatile psc_smb_t *sp;
12862 +
12863 + sp = (volatile psc_smb_t *)(adap->psc_base);
12864 +
12865 + /* Wait for Tx FIFO Underflow.
12866 + */
12867 + for (i = 0; i < adap->xfer_timeout; i++) {
12868 + stat = sp->psc_smbevnt;
12869 + au_sync();
12870 + if ((stat & PSC_SMBEVNT_TU) != 0) {
12871 + /* Clear it. */
12872 + sp->psc_smbevnt = PSC_SMBEVNT_TU;
12873 + au_sync();
12874 + return 0;
12875 + }
12876 + udelay(1);
12877 + }
12878 +
12879 + return -ETIMEDOUT;
12880 +}
12881 +
12882 +static int
12883 +wait_ack(struct i2c_algo_au1550_data *adap)
12884 +{
12885 + u32 stat;
12886 + volatile psc_smb_t *sp;
12887 +
12888 + if (wait_xfer_done(adap))
12889 + return -ETIMEDOUT;
12890 +
12891 + sp = (volatile psc_smb_t *)(adap->psc_base);
12892 +
12893 + stat = sp->psc_smbevnt;
12894 + au_sync();
12895 +
12896 + if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
12897 + return -ETIMEDOUT;
12898 +
12899 + return 0;
12900 +}
12901 +
12902 +static int
12903 +wait_master_done(struct i2c_algo_au1550_data *adap)
12904 +{
12905 + u32 stat;
12906 + int i;
12907 + volatile psc_smb_t *sp;
12908 +
12909 + sp = (volatile psc_smb_t *)(adap->psc_base);
12910 +
12911 + /* Wait for Master Done.
12912 + */
12913 + for (i = 0; i < adap->xfer_timeout; i++) {
12914 + stat = sp->psc_smbevnt;
12915 + au_sync();
12916 + if ((stat & PSC_SMBEVNT_MD) != 0)
12917 + return 0;
12918 + udelay(1);
12919 + }
12920 +
12921 + return -ETIMEDOUT;
12922 +}
12923 +
12924 +static int
12925 +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
12926 +{
12927 + volatile psc_smb_t *sp;
12928 + u32 stat;
12929 +
12930 + sp = (volatile psc_smb_t *)(adap->psc_base);
12931 +
12932 + /* Reset the FIFOs, clear events.
12933 + */
12934 + sp->psc_smbpcr = PSC_SMBPCR_DC;
12935 + sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
12936 + au_sync();
12937 + do {
12938 + stat = sp->psc_smbpcr;
12939 + au_sync();
12940 + } while ((stat & PSC_SMBPCR_DC) != 0);
12941 +
12942 + /* Write out the i2c chip address and specify operation
12943 + */
12944 + addr <<= 1;
12945 + if (rd)
12946 + addr |= 1;
12947 +
12948 + /* Put byte into fifo, start up master.
12949 + */
12950 + sp->psc_smbtxrx = addr;
12951 + au_sync();
12952 + sp->psc_smbpcr = PSC_SMBPCR_MS;
12953 + au_sync();
12954 + if (wait_ack(adap))
12955 + return -EIO;
12956 + return 0;
12957 +}
12958 +
12959 +static u32
12960 +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
12961 +{
12962 + int j;
12963 + u32 data, stat;
12964 + volatile psc_smb_t *sp;
12965 +
12966 + if (wait_xfer_done(adap))
12967 + return -EIO;
12968 +
12969 + sp = (volatile psc_smb_t *)(adap->psc_base);
12970 +
12971 + j = adap->xfer_timeout * 100;
12972 + do {
12973 + j--;
12974 + if (j <= 0)
12975 + return -EIO;
12976 +
12977 + stat = sp->psc_smbstat;
12978 + au_sync();
12979 + if ((stat & PSC_SMBSTAT_RE) == 0)
12980 + j = 0;
12981 + else
12982 + udelay(1);
12983 + } while (j > 0);
12984 + data = sp->psc_smbtxrx;
12985 + au_sync();
12986 + *ret_data = data;
12987 +
12988 + return 0;
12989 +}
12990 +
12991 +static int
12992 +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
12993 + unsigned int len)
12994 +{
12995 + int i;
12996 + u32 data;
12997 + volatile psc_smb_t *sp;
12998 +
12999 + if (len == 0)
13000 + return 0;
13001 +
13002 + /* A read is performed by stuffing the transmit fifo with
13003 + * zero bytes for timing, waiting for bytes to appear in the
13004 + * receive fifo, then reading the bytes.
13005 + */
13006 +
13007 + sp = (volatile psc_smb_t *)(adap->psc_base);
13008 +
13009 + i = 0;
13010 + while (i < (len-1)) {
13011 + sp->psc_smbtxrx = 0;
13012 + au_sync();
13013 + if (wait_for_rx_byte(adap, &data))
13014 + return -EIO;
13015 +
13016 + buf[i] = data;
13017 + i++;
13018 + }
13019 +
13020 + /* The last byte has to indicate transfer done.
13021 + */
13022 + sp->psc_smbtxrx = PSC_SMBTXRX_STP;
13023 + au_sync();
13024 + if (wait_master_done(adap))
13025 + return -EIO;
13026 +
13027 + data = sp->psc_smbtxrx;
13028 + au_sync();
13029 + buf[i] = data;
13030 + return 0;
13031 +}
13032 +
13033 +static int
13034 +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
13035 + unsigned int len)
13036 +{
13037 + int i;
13038 + u32 data;
13039 + volatile psc_smb_t *sp;
13040 +
13041 + if (len == 0)
13042 + return 0;
13043 +
13044 + sp = (volatile psc_smb_t *)(adap->psc_base);
13045 +
13046 + i = 0;
13047 + while (i < (len-1)) {
13048 + data = buf[i];
13049 + sp->psc_smbtxrx = data;
13050 + au_sync();
13051 + if (wait_ack(adap))
13052 + return -EIO;
13053 + i++;
13054 + }
13055 +
13056 + /* The last byte has to indicate transfer done.
13057 + */
13058 + data = buf[i];
13059 + data |= PSC_SMBTXRX_STP;
13060 + sp->psc_smbtxrx = data;
13061 + au_sync();
13062 + if (wait_master_done(adap))
13063 + return -EIO;
13064 + return 0;
13065 +}
13066 +
13067 +static int
13068 +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
13069 +{
13070 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
13071 + struct i2c_msg *p;
13072 + int i, err = 0;
13073 +
13074 + for (i = 0; !err && i < num; i++) {
13075 + p = &msgs[i];
13076 + err = do_address(adap, p->addr, p->flags & I2C_M_RD);
13077 + if (err || !p->len)
13078 + continue;
13079 + if (p->flags & I2C_M_RD)
13080 + err = i2c_read(adap, p->buf, p->len);
13081 + else
13082 + err = i2c_write(adap, p->buf, p->len);
13083 + }
13084 +
13085 + /* Return the number of messages processed, or the error code.
13086 + */
13087 + if (err == 0)
13088 + err = num;
13089 + return err;
13090 +}
13091 +
13092 +static u32
13093 +au1550_func(struct i2c_adapter *adap)
13094 +{
13095 + return I2C_FUNC_I2C;
13096 +}
13097 +
13098 +static struct i2c_algorithm au1550_algo = {
13099 + .name = "Au1550 algorithm",
13100 + .id = I2C_ALGO_AU1550,
13101 + .master_xfer = au1550_xfer,
13102 + .functionality = au1550_func,
13103 +};
13104 +
13105 +/*
13106 + * registering functions to load algorithms at runtime
13107 + * Prior to calling us, the 50MHz clock frequency and routing
13108 + * must have been set up for the PSC indicated by the adapter.
13109 + */
13110 +int
13111 +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
13112 +{
13113 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
13114 + volatile psc_smb_t *sp;
13115 + u32 stat;
13116 +
13117 + i2c_adap->algo = &au1550_algo;
13118 +
13119 + /* Now, set up the PSC for SMBus PIO mode.
13120 + */
13121 + sp = (volatile psc_smb_t *)(adap->psc_base);
13122 + sp->psc_ctrl = PSC_CTRL_DISABLE;
13123 + au_sync();
13124 + sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
13125 + sp->psc_smbcfg = 0;
13126 + au_sync();
13127 + sp->psc_ctrl = PSC_CTRL_ENABLE;
13128 + au_sync();
13129 + do {
13130 + stat = sp->psc_smbstat;
13131 + au_sync();
13132 + } while ((stat & PSC_SMBSTAT_SR) == 0);
13133 +
13134 + sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
13135 + PSC_SMBCFG_DD_DISABLE);
13136 +
13137 + /* Divide by 8 to get a 6.25 MHz clock. The later protocol
13138 + * timings are based on this clock.
13139 + */
13140 + sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
13141 + sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
13142 + au_sync();
13143 +
13144 + /* Set the protocol timer values. See Table 71 in the
13145 + * Au1550 Data Book for standard timing values.
13146 + */
13147 + sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
13148 + PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
13149 + PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
13150 + PSC_SMBTMR_SET_CH(11);
13151 + au_sync();
13152 +
13153 + sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
13154 + do {
13155 + stat = sp->psc_smbstat;
13156 + au_sync();
13157 + } while ((stat & PSC_SMBSTAT_DR) == 0);
13158 +
13159 + return i2c_add_adapter(i2c_adap);
13160 +}
13161 +
13162 +
13163 +int
13164 +i2c_au1550_del_bus(struct i2c_adapter *adap)
13165 +{
13166 + return i2c_del_adapter(adap);
13167 +}
13168 +
13169 +EXPORT_SYMBOL(i2c_au1550_add_bus);
13170 +EXPORT_SYMBOL(i2c_au1550_del_bus);
13171 +
13172 +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
13173 +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
13174 +MODULE_LICENSE("GPL");
13175 diff -Nur linux-2.4.29/drivers/i2c/i2c-au1550.c linux-mips/drivers/i2c/i2c-au1550.c
13176 --- linux-2.4.29/drivers/i2c/i2c-au1550.c 1970-01-01 01:00:00.000000000 +0100
13177 +++ linux-mips/drivers/i2c/i2c-au1550.c 2005-02-12 04:06:32.000000000 +0100
13178 @@ -0,0 +1,154 @@
13179 +/*
13180 + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
13181 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
13182 + *
13183 + * This is just a skeleton adapter to use with the Au1550 PSC
13184 + * algorithm. It was developed for the Pb1550, but will work with
13185 + * any Au1550 board that has a similar PSC configuration.
13186 + *
13187 + * This program is free software; you can redistribute it and/or
13188 + * modify it under the terms of the GNU General Public License
13189 + * as published by the Free Software Foundation; either version 2
13190 + * of the License, or (at your option) any later version.
13191 + *
13192 + * This program is distributed in the hope that it will be useful,
13193 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
13194 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13195 + * GNU General Public License for more details.
13196 + *
13197 + * You should have received a copy of the GNU General Public License
13198 + * along with this program; if not, write to the Free Software
13199 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
13200 + */
13201 +
13202 +#include <linux/config.h>
13203 +#include <linux/kernel.h>
13204 +#include <linux/module.h>
13205 +#include <linux/init.h>
13206 +#include <linux/errno.h>
13207 +
13208 +#include <asm/au1000.h>
13209 +#include <asm/au1xxx_psc.h>
13210 +#if defined( CONFIG_MIPS_PB1550 )
13211 + #include <asm/pb1550.h>
13212 +#endif
13213 +#if defined( CONFIG_MIPS_PB1200 )
13214 + #include <asm/pb1200.h>
13215 +#endif
13216 +#if defined( CONFIG_MIPS_DB1200 )
13217 + #include <asm/db1200.h>
13218 +#endif
13219 +#if defined( CONFIG_MIPS_FICMMP )
13220 + #include <asm/ficmmp.h>
13221 +#endif
13222 +
13223 +#include <linux/i2c.h>
13224 +#include <linux/i2c-algo-au1550.h>
13225 +
13226 +
13227 +
13228 +static int
13229 +pb1550_reg(struct i2c_client *client)
13230 +{
13231 + return 0;
13232 +}
13233 +
13234 +static int
13235 +pb1550_unreg(struct i2c_client *client)
13236 +{
13237 + return 0;
13238 +}
13239 +
13240 +static void
13241 +pb1550_inc_use(struct i2c_adapter *adap)
13242 +{
13243 +#ifdef MODULE
13244 + MOD_INC_USE_COUNT;
13245 +#endif
13246 +}
13247 +
13248 +static void
13249 +pb1550_dec_use(struct i2c_adapter *adap)
13250 +{
13251 +#ifdef MODULE
13252 + MOD_DEC_USE_COUNT;
13253 +#endif
13254 +}
13255 +
13256 +static struct i2c_algo_au1550_data pb1550_i2c_info = {
13257 + SMBUS_PSC_BASE, 200, 200
13258 +};
13259 +
13260 +static struct i2c_adapter pb1550_board_adapter = {
13261 + name: "pb1550 adapter",
13262 + id: I2C_HW_AU1550_PSC,
13263 + algo: NULL,
13264 + algo_data: &pb1550_i2c_info,
13265 + inc_use: pb1550_inc_use,
13266 + dec_use: pb1550_dec_use,
13267 + client_register: pb1550_reg,
13268 + client_unregister: pb1550_unreg,
13269 + client_count: 0,
13270 +};
13271 +
13272 +int __init
13273 +i2c_pb1550_init(void)
13274 +{
13275 + /* This is where we would set up a 50MHz clock source
13276 + * and routing. On the Pb1550, the SMBus is PSC2, which
13277 + * uses a shared clock with USB. This has been already
13278 + * configured by Yamon as a 48MHz clock, close enough
13279 + * for our work.
13280 + */
13281 + if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
13282 + return -ENODEV;
13283 +
13284 + return 0;
13285 +}
13286 +
13287 +/* BIG hack to support the control interface on the Wolfson WM8731
13288 + * audio codec on the Pb1550 board. We get an address and two data
13289 + * bytes to write, create an i2c message, and send it across the
13290 + * i2c transfer function. We do this here because we have access to
13291 + * the i2c adapter structure.
13292 + */
13293 +static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */
13294 +static u8 i2cbuf[2];
13295 +
13296 +int
13297 +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
13298 +{
13299 + wm_i2c_msg.addr = addr;
13300 + wm_i2c_msg.flags = 0;
13301 + wm_i2c_msg.buf = i2cbuf;
13302 + wm_i2c_msg.len = 2;
13303 + i2cbuf[0] = reg;
13304 + i2cbuf[1] = val;
13305 +
13306 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
13307 +}
13308 +
13309 +/* the next function is needed by DVB driver. */
13310 +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
13311 +{
13312 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
13313 +}
13314 +
13315 +EXPORT_SYMBOL(pb1550_wm_codec_write);
13316 +EXPORT_SYMBOL(pb1550_i2c_xfer);
13317 +
13318 +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
13319 +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
13320 +MODULE_LICENSE("GPL");
13321 +
13322 +int
13323 +init_module(void)
13324 +{
13325 + return i2c_pb1550_init();
13326 +}
13327 +
13328 +void
13329 +cleanup_module(void)
13330 +{
13331 + i2c_au1550_del_bus(&pb1550_board_adapter);
13332 +}
13333 diff -Nur linux-2.4.29/drivers/i2c/i2c-core.c linux-mips/drivers/i2c/i2c-core.c
13334 --- linux-2.4.29/drivers/i2c/i2c-core.c 2005-01-19 15:09:54.000000000 +0100
13335 +++ linux-mips/drivers/i2c/i2c-core.c 2004-11-29 18:47:16.000000000 +0100
13336 @@ -1280,6 +1280,9 @@
13337 #ifdef CONFIG_I2C_MAX1617
13338 extern int i2c_max1617_init(void);
13339 #endif
13340 +#ifdef CONFIG_I2C_ALGO_AU1550
13341 + extern int i2c_pb1550_init(void);
13342 +#endif
13343
13344 #ifdef CONFIG_I2C_PROC
13345 extern int sensors_init(void);
13346 @@ -1335,6 +1338,10 @@
13347 i2c_max1617_init();
13348 #endif
13349
13350 +#ifdef CONFIG_I2C_ALGO_AU1550
13351 + i2c_pb1550_init();
13352 +#endif
13353 +
13354 /* -------------- proc interface ---- */
13355 #ifdef CONFIG_I2C_PROC
13356 sensors_init();
13357 diff -Nur linux-2.4.29/drivers/media/video/indycam.c linux-mips/drivers/media/video/indycam.c
13358 --- linux-2.4.29/drivers/media/video/indycam.c 2004-02-18 14:36:31.000000000 +0100
13359 +++ linux-mips/drivers/media/video/indycam.c 2004-12-09 21:32:05.000000000 +0100
13360 @@ -50,13 +50,14 @@
13361 0x80, /* INDYCAM_GAMMA */
13362 };
13363
13364 - int err = 0;
13365 struct indycam *camera;
13366 struct i2c_client *client;
13367 + int err = 0;
13368
13369 client = kmalloc(sizeof(*client), GFP_KERNEL);
13370 - if (!client)
13371 + if (!client)
13372 return -ENOMEM;
13373 +
13374 camera = kmalloc(sizeof(*camera), GFP_KERNEL);
13375 if (!camera) {
13376 err = -ENOMEM;
13377 @@ -67,7 +68,7 @@
13378 client->adapter = adap;
13379 client->addr = addr;
13380 client->driver = &i2c_driver_indycam;
13381 - strcpy(client->name, "IndyCam client");
13382 + strcpy(client->name, "IndyCam client");
13383 camera->client = client;
13384
13385 err = i2c_attach_client(client);
13386 @@ -75,18 +76,18 @@
13387 goto out_free_camera;
13388
13389 camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
13390 - if (camera->version != CAMERA_VERSION_INDY &&
13391 - camera->version != CAMERA_VERSION_MOOSE) {
13392 + if ((camera->version != CAMERA_VERSION_INDY) &&
13393 + (camera->version != CAMERA_VERSION_MOOSE)) {
13394 err = -ENODEV;
13395 goto out_detach_client;
13396 }
13397 - printk(KERN_INFO "Indycam v%d.%d detected.\n",
13398 + printk(KERN_INFO "IndyCam v%d.%d detected.\n",
13399 INDYCAM_VERSION_MAJOR(camera->version),
13400 INDYCAM_VERSION_MINOR(camera->version));
13401
13402 err = i2c_master_send(client, initseq, sizeof(initseq));
13403 if (err)
13404 - printk(KERN_INFO "IndyCam initalization failed\n");
13405 + printk(KERN_ERR "IndyCam initalization failed.\n");
13406
13407 MOD_INC_USE_COUNT;
13408 return 0;
13409 diff -Nur linux-2.4.29/drivers/media/video/vino.c linux-mips/drivers/media/video/vino.c
13410 --- linux-2.4.29/drivers/media/video/vino.c 2004-02-18 14:36:31.000000000 +0100
13411 +++ linux-mips/drivers/media/video/vino.c 2004-12-10 05:02:54.000000000 +0100
13412 @@ -5,6 +5,8 @@
13413 * License version 2 as published by the Free Software Foundation.
13414 *
13415 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
13416 + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
13417 + *
13418 */
13419
13420 #include <linux/module.h>
13421 @@ -37,13 +39,23 @@
13422 #define DEBUG(x...)
13423 #endif
13424
13425 +/* Channels (who could have guessed) */
13426 +#define VINO_CHAN_NONE 0
13427 +#define VINO_CHAN_A 1
13428 +#define VINO_CHAN_B 2
13429 +
13430 /* VINO video size */
13431 #define VINO_PAL_WIDTH 768
13432 #define VINO_PAL_HEIGHT 576
13433 #define VINO_NTSC_WIDTH 646
13434 #define VINO_NTSC_HEIGHT 486
13435
13436 -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
13437 +/* Minimum value for Y-clipping (for smaller values the images
13438 + * will be corrupted) */
13439 +#define VINO_MIN_Y_CLIPPING 2
13440 +
13441 +/* Set these to some sensible values.
13442 + * Note: the picture width has to be divisible by 8 */
13443 #define VINO_MIN_WIDTH 32
13444 #define VINO_MIN_HEIGHT 32
13445
13446 @@ -64,9 +76,7 @@
13447
13448 struct vino_device {
13449 struct video_device vdev;
13450 -#define VINO_CHAN_A 1
13451 -#define VINO_CHAN_B 2
13452 - int chan;
13453 + int chan; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
13454 int alpha;
13455 /* clipping... */
13456 unsigned int left, right, top, bottom;
13457 @@ -106,7 +116,7 @@
13458
13459 struct vino_client {
13460 struct i2c_client *driver;
13461 - int owner;
13462 + int owner; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
13463 };
13464
13465 struct vino_video {
13466 @@ -362,6 +372,7 @@
13467 static int dma_setup(struct vino_device *v)
13468 {
13469 u32 ctrl, intr;
13470 + int ofs;
13471 struct sgi_vino_channel *ch;
13472
13473 ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
13474 @@ -377,14 +388,24 @@
13475 ch->line_size = v->line_size - 8;
13476 /* set the alpha register */
13477 ch->alpha = v->alpha;
13478 - /* set cliping registers */
13479 - ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
13480 + /* Set the clipping registers, this is the constant source of fun :)
13481 + * Y clipping start has to be >= 2 and end has to be start + height/2
13482 + * The values of top and bottom are even so dividing is not a problem
13483 + *
13484 + * The docs say that clipping values for the even field should be
13485 + * odd_end + something_to_skip_vertical_blanking + some_lines and
13486 + * even_start + height/2, though the image is good this way also
13487 + *
13488 + * TODO: for analog sources (SAA7191), the clipping values are a bit
13489 + * different and that case isn't yet handled
13490 + */
13491 + ofs = VINO_MIN_Y_CLIPPING; /* Should depend on input source */
13492 + ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
13493 + VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
13494 VINO_CLIP_X(v->left);
13495 - ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
13496 + ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
13497 + VINO_CLIP_EVEN(ofs + v->bottom / 2) |
13498 VINO_CLIP_X(v->right);
13499 - /* FIXME: end-of-field bug workaround
13500 - VINO_CLIP_X(VINO_PAL_WIDTH);
13501 - */
13502 /* init the frame rate and norm (full frame rate only for now...) */
13503 ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
13504 (get_capture_norm(v) == VIDEO_MODE_PAL ?
13505 @@ -510,6 +531,7 @@
13506 static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
13507 {
13508 u32 intr, ctrl;
13509 + int a_eof, b_eof;
13510
13511 spin_lock(&Vino->vino_lock);
13512 ctrl = vino->control;
13513 @@ -525,12 +547,14 @@
13514 vino->control = ctrl;
13515 clear_eod(&Vino->chB);
13516 }
13517 + a_eof = intr & VINO_INTSTAT_A_EOF;
13518 + b_eof = intr & VINO_INTSTAT_B_EOF;
13519 vino->intr_status = ~intr;
13520 spin_unlock(&Vino->vino_lock);
13521 - /* FIXME: For now we are assuming that interrupt means that frame is
13522 - * done. That's not true, but we can live with such brokeness for
13523 - * a while ;-) */
13524 - field_done(&Vino->chA);
13525 + if (a_eof)
13526 + field_done(&Vino->chA);
13527 + if (b_eof)
13528 + field_done(&Vino->chB);
13529 }
13530
13531 static int vino_grab(struct vino_device *v, int frame)
13532 diff -Nur linux-2.4.29/drivers/mtd/devices/docprobe.c linux-mips/drivers/mtd/devices/docprobe.c
13533 --- linux-2.4.29/drivers/mtd/devices/docprobe.c 2003-06-13 16:51:34.000000000 +0200
13534 +++ linux-mips/drivers/mtd/devices/docprobe.c 2003-06-16 01:42:21.000000000 +0200
13535 @@ -89,10 +89,10 @@
13536 0xe4000000,
13537 #elif defined(CONFIG_MOMENCO_OCELOT)
13538 0x2f000000,
13539 - 0xff000000,
13540 + 0xff000000,
13541 #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
13542 - 0xff000000,
13543 -##else
13544 + 0xff000000,
13545 +#else
13546 #warning Unknown architecture for DiskOnChip. No default probe locations defined
13547 #endif
13548 0 };
13549 diff -Nur linux-2.4.29/drivers/mtd/devices/ms02-nv.c linux-mips/drivers/mtd/devices/ms02-nv.c
13550 --- linux-2.4.29/drivers/mtd/devices/ms02-nv.c 2003-06-13 16:51:34.000000000 +0200
13551 +++ linux-mips/drivers/mtd/devices/ms02-nv.c 2004-07-30 12:22:40.000000000 +0200
13552 @@ -1,10 +1,10 @@
13553 /*
13554 - * Copyright (c) 2001 Maciej W. Rozycki
13555 + * Copyright (c) 2001 Maciej W. Rozycki
13556 *
13557 - * This program is free software; you can redistribute it and/or
13558 - * modify it under the terms of the GNU General Public License
13559 - * as published by the Free Software Foundation; either version
13560 - * 2 of the License, or (at your option) any later version.
13561 + * This program is free software; you can redistribute it and/or
13562 + * modify it under the terms of the GNU General Public License
13563 + * as published by the Free Software Foundation; either version
13564 + * 2 of the License, or (at your option) any later version.
13565 *
13566 * $Id$
13567 */
13568 @@ -29,18 +29,18 @@
13569
13570
13571 static char version[] __initdata =
13572 - "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
13573 + "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
13574
13575 -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
13576 +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
13577 MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
13578 MODULE_LICENSE("GPL");
13579
13580
13581 /*
13582 * Addresses we probe for an MS02-NV at. Modules may be located
13583 - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
13584 - * boundary within a 0MB up to 448MB range. We don't support a module
13585 - * at 0MB, though.
13586 + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
13587 + * boundary within a 0MiB up to 448MiB range. We don't support a module
13588 + * at 0MiB, though.
13589 */
13590 static ulong ms02nv_addrs[] __initdata = {
13591 0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
13592 @@ -130,7 +130,7 @@
13593
13594 int ret = -ENODEV;
13595
13596 - /* The module decodes 8MB of address space. */
13597 + /* The module decodes 8MiB of address space. */
13598 mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
13599 if (!mod_res)
13600 return -ENOMEM;
13601 @@ -233,7 +233,7 @@
13602 goto err_out_csr_res;
13603 }
13604
13605 - printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
13606 + printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
13607 mtd->index, ms02nv_name, addr, size >> 20);
13608
13609 mp->next = root_ms02nv_mtd;
13610 @@ -293,12 +293,12 @@
13611
13612 switch (mips_machtype) {
13613 case MACH_DS5000_200:
13614 - csr = (volatile u32 *)KN02_CSR_ADDR;
13615 + csr = (volatile u32 *)KN02_CSR_BASE;
13616 if (*csr & KN02_CSR_BNK32M)
13617 stride = 2;
13618 break;
13619 case MACH_DS5000_2X0:
13620 - case MACH_DS5000:
13621 + case MACH_DS5900:
13622 csr = (volatile u32 *)KN03_MCR_BASE;
13623 if (*csr & KN03_MCR_BNK32M)
13624 stride = 2;
13625 diff -Nur linux-2.4.29/drivers/mtd/devices/ms02-nv.h linux-mips/drivers/mtd/devices/ms02-nv.h
13626 --- linux-2.4.29/drivers/mtd/devices/ms02-nv.h 2002-11-29 00:53:13.000000000 +0100
13627 +++ linux-mips/drivers/mtd/devices/ms02-nv.h 2004-07-30 12:22:40.000000000 +0200
13628 @@ -1,32 +1,96 @@
13629 /*
13630 - * Copyright (c) 2001 Maciej W. Rozycki
13631 + * Copyright (c) 2001, 2003 Maciej W. Rozycki
13632 *
13633 - * This program is free software; you can redistribute it and/or
13634 - * modify it under the terms of the GNU General Public License
13635 - * as published by the Free Software Foundation; either version
13636 - * 2 of the License, or (at your option) any later version.
13637 + * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
13638 + * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
13639 + * systems.
13640 + *
13641 + * This program is free software; you can redistribute it and/or
13642 + * modify it under the terms of the GNU General Public License
13643 + * as published by the Free Software Foundation; either version
13644 + * 2 of the License, or (at your option) any later version.
13645 + *
13646 + * $Id$
13647 */
13648
13649 #include <linux/ioport.h>
13650 #include <linux/mtd/mtd.h>
13651
13652 +/*
13653 + * Addresses are decoded as follows:
13654 + *
13655 + * 0x000000 - 0x3fffff SRAM
13656 + * 0x400000 - 0x7fffff CSR
13657 + *
13658 + * Within the SRAM area the following ranges are forced by the system
13659 + * firmware:
13660 + *
13661 + * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
13662 + * 0x000400 - ENDofRAM storage area, available to operating systems
13663 + *
13664 + * but we can't really use the available area right from 0x000400 as
13665 + * the first word is used by the firmware as a status flag passed
13666 + * from an operating system. If anything but the valid data magic
13667 + * ID value is found, the firmware considers the SRAM clean, i.e.
13668 + * containing no valid data, and disables the battery resulting in
13669 + * data being erased as soon as power is switched off. So the choice
13670 + * for the start address of the user-available is 0x001000 which is
13671 + * nicely page aligned. The area between 0x000404 and 0x000fff may
13672 + * be used by the driver for own needs.
13673 + *
13674 + * The diagnostic area defines two status words to be read by an
13675 + * operating system, a magic ID to distinguish a MS02-NV board from
13676 + * anything else and a status information providing results of tests
13677 + * as well as the size of SRAM available, which can be 1MiB or 2MiB
13678 + * (that's what the firmware handles; no idea if 2MiB modules ever
13679 + * existed).
13680 + *
13681 + * The firmware only handles the MS02-NV board if installed in the
13682 + * last (15th) slot, so for any other location the status information
13683 + * stored in the SRAM cannot be relied upon. But from the hardware
13684 + * point of view there is no problem using up to 14 such boards in a
13685 + * system -- only the 1st slot needs to be filled with a DRAM module.
13686 + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
13687 + *
13688 + * The state of the battery as provided by the CSR is reflected on
13689 + * the two onboard LEDs. When facing the battery side of the board,
13690 + * with the LEDs at the top left and the battery at the bottom right
13691 + * (i.e. looking from the back side of the system box), their meaning
13692 + * is as follows (the system has to be powered on):
13693 + *
13694 + * left LED battery disable status: lit = enabled
13695 + * right LED battery condition status: lit = OK
13696 + */
13697 +
13698 /* MS02-NV iomem register offsets. */
13699 #define MS02NV_CSR 0x400000 /* control & status register */
13700
13701 +/* MS02-NV CSR status bits. */
13702 +#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
13703 +#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
13704 +
13705 +
13706 /* MS02-NV memory offsets. */
13707 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */
13708 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
13709 -#define MS02NV_RAM 0x000400 /* general-purpose RAM start */
13710 +#define MS02NV_VALID 0x000400 /* valid data magic ID */
13711 +#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
13712
13713 -/* MS02-NV diagnostic status constants. */
13714 -#define MS02NV_DIAG_SIZE_MASK 0xf0 /* RAM size mask */
13715 -#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* RAM size shift (left) */
13716 +/* MS02-NV diagnostic status bits. */
13717 +#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
13718 +#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
13719 +#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
13720 +#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
13721 +#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
13722 +#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
13723
13724 /* MS02-NV general constants. */
13725 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
13726 +#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
13727 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
13728 decoded by the module */
13729
13730 +
13731 typedef volatile u32 ms02nv_uint;
13732
13733 struct ms02nv_private {
13734 diff -Nur linux-2.4.29/drivers/mtd/maps/Config.in linux-mips/drivers/mtd/maps/Config.in
13735 --- linux-2.4.29/drivers/mtd/maps/Config.in 2003-06-13 16:51:34.000000000 +0200
13736 +++ linux-mips/drivers/mtd/maps/Config.in 2004-02-26 01:46:35.000000000 +0100
13737 @@ -51,11 +51,26 @@
13738 dep_tristate ' Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
13739 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
13740 dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
13741 + dep_tristate ' Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
13742 + dep_tristate ' XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
13743 + dep_tristate ' MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
13744 if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
13745 -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
13746 bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT
13747 bool ' Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
13748 fi
13749 + tristate ' Db1x00 MTD support' CONFIG_MTD_DB1X00
13750 + if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
13751 + bool ' Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT
13752 + bool ' Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
13753 + fi
13754 + tristate ' Pb1550 MTD support' CONFIG_MTD_PB1550
13755 + if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
13756 + bool ' Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
13757 + bool ' Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
13758 + fi
13759 + dep_tristate ' Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
13760 + dep_tristate ' Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
13761 dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
13762 if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
13763 hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
13764 diff -Nur linux-2.4.29/drivers/mtd/maps/Makefile linux-mips/drivers/mtd/maps/Makefile
13765 --- linux-2.4.29/drivers/mtd/maps/Makefile 2003-06-13 16:51:34.000000000 +0200
13766 +++ linux-mips/drivers/mtd/maps/Makefile 2004-02-26 01:46:35.000000000 +0100
13767 @@ -52,7 +52,13 @@
13768 obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
13769 obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
13770 obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
13771 +obj-$(CONFIG_MTD_XXS1500) += xxs1500.o
13772 +obj-$(CONFIG_MTD_MTX1) += mtx-1.o
13773 obj-$(CONFIG_MTD_LASAT) += lasat.o
13774 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
13775 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
13776 +obj-$(CONFIG_MTD_HYDROGEN3) += hydrogen3-flash.o
13777 +obj-$(CONFIG_MTD_BOSPORUS) += pb1xxx-flash.o
13778 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
13779 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
13780 obj-$(CONFIG_MTD_IMPA7) += impa7.o
13781 @@ -61,5 +67,6 @@
13782 obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
13783 obj-$(CONFIG_MTD_NETtel) += nettel.o
13784 obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
13785 +obj-$(CONFIG_MTD_MIRAGE) += mirage-flash.o
13786
13787 include $(TOPDIR)/Rules.make
13788 diff -Nur linux-2.4.29/drivers/mtd/maps/db1x00-flash.c linux-mips/drivers/mtd/maps/db1x00-flash.c
13789 --- linux-2.4.29/drivers/mtd/maps/db1x00-flash.c 1970-01-01 01:00:00.000000000 +0100
13790 +++ linux-mips/drivers/mtd/maps/db1x00-flash.c 2005-02-12 04:06:46.000000000 +0100
13791 @@ -0,0 +1,283 @@
13792 +/*
13793 + * Flash memory access on Alchemy Db1xxx boards
13794 + *
13795 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
13796 + *
13797 + */
13798 +
13799 +#include <linux/config.h>
13800 +#include <linux/module.h>
13801 +#include <linux/types.h>
13802 +#include <linux/kernel.h>
13803 +
13804 +#include <linux/mtd/mtd.h>
13805 +#include <linux/mtd/map.h>
13806 +#include <linux/mtd/partitions.h>
13807 +
13808 +#include <asm/io.h>
13809 +#include <asm/au1000.h>
13810 +#include <asm/db1x00.h>
13811 +
13812 +#ifdef DEBUG_RW
13813 +#define DBG(x...) printk(x)
13814 +#else
13815 +#define DBG(x...)
13816 +#endif
13817 +
13818 +static unsigned long window_addr;
13819 +static unsigned long window_size;
13820 +static unsigned long flash_size;
13821 +
13822 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
13823 +{
13824 + __u8 ret;
13825 + ret = __raw_readb(map->map_priv_1 + ofs);
13826 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13827 + return ret;
13828 +}
13829 +
13830 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
13831 +{
13832 + __u16 ret;
13833 + ret = __raw_readw(map->map_priv_1 + ofs);
13834 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13835 + return ret;
13836 +}
13837 +
13838 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
13839 +{
13840 + __u32 ret;
13841 + ret = __raw_readl(map->map_priv_1 + ofs);
13842 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
13843 + return ret;
13844 +}
13845 +
13846 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
13847 +{
13848 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
13849 + memcpy_fromio(to, map->map_priv_1 + from, len);
13850 +}
13851 +
13852 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
13853 +{
13854 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13855 + __raw_writeb(d, map->map_priv_1 + adr);
13856 + mb();
13857 +}
13858 +
13859 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
13860 +{
13861 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13862 + __raw_writew(d, map->map_priv_1 + adr);
13863 + mb();
13864 +}
13865 +
13866 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
13867 +{
13868 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
13869 + __raw_writel(d, map->map_priv_1 + adr);
13870 + mb();
13871 +}
13872 +
13873 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
13874 +{
13875 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
13876 + memcpy_toio(map->map_priv_1 + to, from, len);
13877 +}
13878 +
13879 +static struct map_info db1x00_map = {
13880 + name: "Db1x00 flash",
13881 + read8: physmap_read8,
13882 + read16: physmap_read16,
13883 + read32: physmap_read32,
13884 + copy_from: physmap_copy_from,
13885 + write8: physmap_write8,
13886 + write16: physmap_write16,
13887 + write32: physmap_write32,
13888 + copy_to: physmap_copy_to,
13889 +};
13890 +
13891 +static unsigned char flash_buswidth = 4;
13892 +
13893 +/*
13894 + * The Db1x boards support different flash densities. We setup
13895 + * the mtd_partition structures below for default of 64Mbit
13896 + * flash densities, and override the partitions sizes, if
13897 + * necessary, after we check the board status register.
13898 + */
13899 +
13900 +#ifdef DB1X00_BOTH_BANKS
13901 +/* both banks will be used. Combine the first bank and the first
13902 + * part of the second bank together into a single jffs/jffs2
13903 + * partition.
13904 + */
13905 +static struct mtd_partition db1x00_partitions[] = {
13906 + {
13907 + name: "User FS",
13908 + size: 0x1c00000,
13909 + offset: 0x0000000
13910 + },{
13911 + name: "yamon",
13912 + size: 0x0100000,
13913 + offset: MTDPART_OFS_APPEND,
13914 + mask_flags: MTD_WRITEABLE
13915 + },{
13916 + name: "raw kernel",
13917 + size: (0x300000-0x40000), /* last 256KB is yamon env */
13918 + offset: MTDPART_OFS_APPEND,
13919 + }
13920 +};
13921 +#elif defined(DB1X00_BOOT_ONLY)
13922 +static struct mtd_partition db1x00_partitions[] = {
13923 + {
13924 + name: "User FS",
13925 + size: 0x00c00000,
13926 + offset: 0x0000000
13927 + },{
13928 + name: "yamon",
13929 + size: 0x0100000,
13930 + offset: MTDPART_OFS_APPEND,
13931 + mask_flags: MTD_WRITEABLE
13932 + },{
13933 + name: "raw kernel",
13934 + size: (0x300000-0x40000), /* last 256KB is yamon env */
13935 + offset: MTDPART_OFS_APPEND,
13936 + }
13937 +};
13938 +#elif defined(DB1X00_USER_ONLY)
13939 +static struct mtd_partition db1x00_partitions[] = {
13940 + {
13941 + name: "User FS",
13942 + size: 0x0e00000,
13943 + offset: 0x0000000
13944 + },{
13945 + name: "raw kernel",
13946 + size: MTDPART_SIZ_FULL,
13947 + offset: MTDPART_OFS_APPEND,
13948 + }
13949 +};
13950 +#else
13951 +#error MTD_DB1X00 define combo error /* should never happen */
13952 +#endif
13953 +
13954 +
13955 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
13956 +
13957 +static struct mtd_partition *parsed_parts;
13958 +static struct mtd_info *mymtd;
13959 +
13960 +/*
13961 + * Probe the flash density and setup window address and size
13962 + * based on user CONFIG options. There are times when we don't
13963 + * want the MTD driver to be probing the boot or user flash,
13964 + * so having the option to enable only one bank is important.
13965 + */
13966 +int setup_flash_params()
13967 +{
13968 + switch ((bcsr->status >> 14) & 0x3) {
13969 + case 0: /* 64Mbit devices */
13970 + flash_size = 0x800000; /* 8MB per part */
13971 +#if defined(DB1X00_BOTH_BANKS)
13972 + window_addr = 0x1E000000;
13973 + window_size = 0x2000000;
13974 +#elif defined(DB1X00_BOOT_ONLY)
13975 + window_addr = 0x1F000000;
13976 + window_size = 0x1000000;
13977 +#else /* USER ONLY */
13978 + window_addr = 0x1E000000;
13979 + window_size = 0x1000000;
13980 +#endif
13981 + break;
13982 + case 1:
13983 + /* 128 Mbit devices */
13984 + flash_size = 0x1000000; /* 16MB per part */
13985 +#if defined(DB1X00_BOTH_BANKS)
13986 + window_addr = 0x1C000000;
13987 + window_size = 0x4000000;
13988 + /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
13989 + db1x00_partitions[0].size = 0x3C00000;
13990 +#elif defined(DB1X00_BOOT_ONLY)
13991 + window_addr = 0x1E000000;
13992 + window_size = 0x2000000;
13993 + /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
13994 + db1x00_partitions[0].size = 0x1C00000;
13995 +#else /* USER ONLY */
13996 + window_addr = 0x1C000000;
13997 + window_size = 0x2000000;
13998 + /* USERFS from 0x1C00 0000 to 0x1DE00000 */
13999 + db1x00_partitions[0].size = 0x1DE0000;
14000 +#endif
14001 + break;
14002 + case 2:
14003 + /* 256 Mbit devices */
14004 + flash_size = 0x4000000; /* 64MB per part */
14005 +#if defined(DB1X00_BOTH_BANKS)
14006 + return 1;
14007 +#elif defined(DB1X00_BOOT_ONLY)
14008 + /* Boot ROM flash bank only; no user bank */
14009 + window_addr = 0x1C000000;
14010 + window_size = 0x4000000;
14011 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
14012 + db1x00_partitions[0].size = 0x3C00000;
14013 +#else /* USER ONLY */
14014 + return 1;
14015 +#endif
14016 + break;
14017 + default:
14018 + return 1;
14019 + }
14020 + return 0;
14021 +}
14022 +
14023 +int __init db1x00_mtd_init(void)
14024 +{
14025 + struct mtd_partition *parts;
14026 + int nb_parts = 0;
14027 + char *part_type;
14028 +
14029 + /* Default flash buswidth */
14030 + db1x00_map.buswidth = flash_buswidth;
14031 +
14032 + if (setup_flash_params())
14033 + return -ENXIO;
14034 +
14035 + /*
14036 + * Static partition definition selection
14037 + */
14038 + part_type = "static";
14039 + parts = db1x00_partitions;
14040 + nb_parts = NB_OF(db1x00_partitions);
14041 + db1x00_map.size = window_size;
14042 +
14043 + /*
14044 + * Now let's probe for the actual flash. Do it here since
14045 + * specific machine settings might have been set above.
14046 + */
14047 + printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
14048 + db1x00_map.buswidth*8);
14049 + db1x00_map.map_priv_1 =
14050 + (unsigned long)ioremap(window_addr, window_size);
14051 + mymtd = do_map_probe("cfi_probe", &db1x00_map);
14052 + if (!mymtd) return -ENXIO;
14053 + mymtd->module = THIS_MODULE;
14054 +
14055 + add_mtd_partitions(mymtd, parts, nb_parts);
14056 + return 0;
14057 +}
14058 +
14059 +static void __exit db1x00_mtd_cleanup(void)
14060 +{
14061 + if (mymtd) {
14062 + del_mtd_partitions(mymtd);
14063 + map_destroy(mymtd);
14064 + if (parsed_parts)
14065 + kfree(parsed_parts);
14066 + }
14067 +}
14068 +
14069 +module_init(db1x00_mtd_init);
14070 +module_exit(db1x00_mtd_cleanup);
14071 +
14072 +MODULE_AUTHOR("Pete Popov");
14073 +MODULE_DESCRIPTION("Db1x00 mtd map driver");
14074 +MODULE_LICENSE("GPL");
14075 diff -Nur linux-2.4.29/drivers/mtd/maps/hydrogen3-flash.c linux-mips/drivers/mtd/maps/hydrogen3-flash.c
14076 --- linux-2.4.29/drivers/mtd/maps/hydrogen3-flash.c 1970-01-01 01:00:00.000000000 +0100
14077 +++ linux-mips/drivers/mtd/maps/hydrogen3-flash.c 2004-01-10 23:40:18.000000000 +0100
14078 @@ -0,0 +1,189 @@
14079 +/*
14080 + * Flash memory access on Alchemy HydrogenIII boards
14081 + *
14082 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14083 + *
14084 + */
14085 +
14086 +#include <linux/config.h>
14087 +#include <linux/module.h>
14088 +#include <linux/types.h>
14089 +#include <linux/kernel.h>
14090 +
14091 +#include <linux/mtd/mtd.h>
14092 +#include <linux/mtd/map.h>
14093 +#include <linux/mtd/partitions.h>
14094 +
14095 +#include <asm/io.h>
14096 +#include <asm/au1000.h>
14097 +
14098 +#ifdef DEBUG_RW
14099 +#define DBG(x...) printk(x)
14100 +#else
14101 +#define DBG(x...)
14102 +#endif
14103 +
14104 +#define WINDOW_ADDR 0x1E000000
14105 +#define WINDOW_SIZE 0x02000000
14106 +
14107 +
14108 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14109 +{
14110 + __u8 ret;
14111 + ret = __raw_readb(map->map_priv_1 + ofs);
14112 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14113 + return ret;
14114 +}
14115 +
14116 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14117 +{
14118 + __u16 ret;
14119 + ret = __raw_readw(map->map_priv_1 + ofs);
14120 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14121 + return ret;
14122 +}
14123 +
14124 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14125 +{
14126 + __u32 ret;
14127 + ret = __raw_readl(map->map_priv_1 + ofs);
14128 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14129 + return ret;
14130 +}
14131 +
14132 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14133 +{
14134 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14135 + memcpy_fromio(to, map->map_priv_1 + from, len);
14136 +}
14137 +
14138 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14139 +{
14140 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14141 + __raw_writeb(d, map->map_priv_1 + adr);
14142 + mb();
14143 +}
14144 +
14145 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14146 +{
14147 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14148 + __raw_writew(d, map->map_priv_1 + adr);
14149 + mb();
14150 +}
14151 +
14152 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14153 +{
14154 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14155 + __raw_writel(d, map->map_priv_1 + adr);
14156 + mb();
14157 +}
14158 +
14159 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14160 +{
14161 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14162 + memcpy_toio(map->map_priv_1 + to, from, len);
14163 +}
14164 +
14165 +static struct map_info hydrogen3_map = {
14166 + name: "HydrogenIII flash",
14167 + read8: physmap_read8,
14168 + read16: physmap_read16,
14169 + read32: physmap_read32,
14170 + copy_from: physmap_copy_from,
14171 + write8: physmap_write8,
14172 + write16: physmap_write16,
14173 + write32: physmap_write32,
14174 + copy_to: physmap_copy_to,
14175 +};
14176 +
14177 +static unsigned char flash_buswidth = 4;
14178 +
14179 +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
14180 + * up the offsets. */
14181 +static struct mtd_partition hydrogen3_partitions[] = {
14182 + {
14183 + name: "User FS",
14184 + size: 0x1c00000,
14185 + offset: 0x0000000
14186 + },{
14187 + name: "yamon",
14188 + size: 0x0100000,
14189 + offset: MTDPART_OFS_APPEND,
14190 + mask_flags: MTD_WRITEABLE
14191 + },{
14192 + name: "raw kernel",
14193 + size: 0x02c0000,
14194 + offset: MTDPART_OFS_APPEND
14195 + }
14196 +};
14197 +
14198 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14199 +
14200 +static struct mtd_partition *parsed_parts;
14201 +static struct mtd_info *mymtd;
14202 +
14203 +int __init hydrogen3_mtd_init(void)
14204 +{
14205 + struct mtd_partition *parts;
14206 + int nb_parts = 0;
14207 + char *part_type;
14208 +
14209 + /* Default flash buswidth */
14210 + hydrogen3_map.buswidth = flash_buswidth;
14211 +
14212 + /*
14213 + * Static partition definition selection
14214 + */
14215 + part_type = "static";
14216 + parts = hydrogen3_partitions;
14217 + nb_parts = NB_OF(hydrogen3_partitions);
14218 + hydrogen3_map.size = WINDOW_SIZE;
14219 +
14220 + /*
14221 + * Now let's probe for the actual flash. Do it here since
14222 + * specific machine settings might have been set above.
14223 + */
14224 + printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n",
14225 + hydrogen3_map.buswidth*8);
14226 + hydrogen3_map.map_priv_1 =
14227 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
14228 + mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
14229 + if (!mymtd) return -ENXIO;
14230 + mymtd->module = THIS_MODULE;
14231 +
14232 + add_mtd_partitions(mymtd, parts, nb_parts);
14233 + return 0;
14234 +}
14235 +
14236 +static void __exit hydrogen3_mtd_cleanup(void)
14237 +{
14238 + if (mymtd) {
14239 + del_mtd_partitions(mymtd);
14240 + map_destroy(mymtd);
14241 + if (parsed_parts)
14242 + kfree(parsed_parts);
14243 + }
14244 +}
14245 +
14246 +/*#ifndef MODULE
14247 +
14248 +static int __init _bootflashonly(char *str)
14249 +{
14250 + bootflashonly = simple_strtol(str, NULL, 0);
14251 + return 1;
14252 +}
14253 +
14254 +
14255 +__setup("bootflashonly=", _bootflashonly);
14256 +
14257 +#endif*/
14258 +
14259 +
14260 +module_init(hydrogen3_mtd_init);
14261 +module_exit(hydrogen3_mtd_cleanup);
14262 +
14263 +MODULE_PARM(bootflashonly, "i");
14264 +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
14265 +MODULE_AUTHOR("Pete Popov");
14266 +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
14267 +MODULE_LICENSE("GPL");
14268 diff -Nur linux-2.4.29/drivers/mtd/maps/lasat.c linux-mips/drivers/mtd/maps/lasat.c
14269 --- linux-2.4.29/drivers/mtd/maps/lasat.c 2003-06-13 16:51:34.000000000 +0200
14270 +++ linux-mips/drivers/mtd/maps/lasat.c 2003-08-18 04:59:02.000000000 +0200
14271 @@ -1,15 +1,6 @@
14272 /*
14273 * Flash device on lasat 100 and 200 boards
14274 *
14275 - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
14276 - * works for.
14277 - *
14278 - * This program is free software; you can redistribute it and/or
14279 - * modify it under the terms of the GNU General Public License version
14280 - * 2 as published by the Free Software Foundation.
14281 - *
14282 - * $Id$
14283 - *
14284 */
14285
14286 #include <linux/module.h>
14287 @@ -21,7 +12,6 @@
14288 #include <linux/mtd/partitions.h>
14289 #include <linux/config.h>
14290 #include <asm/lasat/lasat.h>
14291 -#include <asm/lasat/lasat_mtd.h>
14292
14293 static struct mtd_info *mymtd;
14294
14295 @@ -69,30 +59,33 @@
14296 }
14297
14298 static struct map_info sp_map = {
14299 - .name = "SP flash",
14300 - .buswidth = 4,
14301 - .read8 = sp_read8,
14302 - .read16 = sp_read16,
14303 - .read32 = sp_read32,
14304 - .copy_from = sp_copy_from,
14305 - .write8 = sp_write8,
14306 - .write16 = sp_write16,
14307 - .write32 = sp_write32,
14308 - .copy_to = sp_copy_to
14309 + name: "SP flash",
14310 + buswidth: 4,
14311 + read8: sp_read8,
14312 + read16: sp_read16,
14313 + read32: sp_read32,
14314 + copy_from: sp_copy_from,
14315 + write8: sp_write8,
14316 + write16: sp_write16,
14317 + write32: sp_write32,
14318 + copy_to: sp_copy_to
14319 };
14320
14321 static struct mtd_partition partition_info[LASAT_MTD_LAST];
14322 -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
14323 +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
14324
14325 static int __init init_sp(void)
14326 {
14327 int i;
14328 + int nparts = 0;
14329 /* this does not play well with the old flash code which
14330 * protects and uprotects the flash when necessary */
14331 printk(KERN_NOTICE "Unprotecting flash\n");
14332 *lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
14333
14334 - sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
14335 + sp_map.map_priv_1 = ioremap_nocache(
14336 + lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
14337 + lasat_board_info.li_flash_size);
14338 sp_map.size = lasat_board_info.li_flash_size;
14339
14340 printk(KERN_NOTICE "sp flash device: %lx at %lx\n",
14341 @@ -109,12 +102,15 @@
14342
14343 for (i=0; i < LASAT_MTD_LAST; i++) {
14344 size = lasat_flash_partition_size(i);
14345 - partition_info[i].size = size;
14346 - partition_info[i].offset = offset;
14347 - offset += size;
14348 + if (size != 0) {
14349 + nparts++;
14350 + partition_info[i].size = size;
14351 + partition_info[i].offset = offset;
14352 + offset += size;
14353 + }
14354 }
14355
14356 - add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
14357 + add_mtd_partitions( mymtd, partition_info, nparts );
14358 return 0;
14359 }
14360
14361 @@ -124,11 +120,11 @@
14362 static void __exit cleanup_sp(void)
14363 {
14364 if (mymtd) {
14365 - del_mtd_partitions(mymtd);
14366 - map_destroy(mymtd);
14367 + del_mtd_partitions(mymtd);
14368 + map_destroy(mymtd);
14369 }
14370 if (sp_map.map_priv_1) {
14371 - sp_map.map_priv_1 = 0;
14372 + sp_map.map_priv_1 = 0;
14373 }
14374 }
14375
14376 diff -Nur linux-2.4.29/drivers/mtd/maps/mirage-flash.c linux-mips/drivers/mtd/maps/mirage-flash.c
14377 --- linux-2.4.29/drivers/mtd/maps/mirage-flash.c 1970-01-01 01:00:00.000000000 +0100
14378 +++ linux-mips/drivers/mtd/maps/mirage-flash.c 2003-12-22 04:37:22.000000000 +0100
14379 @@ -0,0 +1,194 @@
14380 +/*
14381 + * Flash memory access on AMD Mirage board.
14382 + *
14383 + * (C) 2003 Embedded Edge
14384 + * based on mirage-flash.c:
14385 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14386 + *
14387 + */
14388 +
14389 +#include <linux/config.h>
14390 +#include <linux/module.h>
14391 +#include <linux/types.h>
14392 +#include <linux/kernel.h>
14393 +
14394 +#include <linux/mtd/mtd.h>
14395 +#include <linux/mtd/map.h>
14396 +#include <linux/mtd/partitions.h>
14397 +
14398 +#include <asm/io.h>
14399 +#include <asm/au1000.h>
14400 +//#include <asm/mirage.h>
14401 +
14402 +#ifdef DEBUG_RW
14403 +#define DBG(x...) printk(x)
14404 +#else
14405 +#define DBG(x...)
14406 +#endif
14407 +
14408 +static unsigned long window_addr;
14409 +static unsigned long window_size;
14410 +static unsigned long flash_size;
14411 +
14412 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14413 +{
14414 + __u8 ret;
14415 + ret = __raw_readb(map->map_priv_1 + ofs);
14416 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14417 + return ret;
14418 +}
14419 +
14420 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14421 +{
14422 + __u16 ret;
14423 + ret = __raw_readw(map->map_priv_1 + ofs);
14424 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14425 + return ret;
14426 +}
14427 +
14428 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14429 +{
14430 + __u32 ret;
14431 + ret = __raw_readl(map->map_priv_1 + ofs);
14432 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14433 + return ret;
14434 +}
14435 +
14436 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14437 +{
14438 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14439 + memcpy_fromio(to, map->map_priv_1 + from, len);
14440 +}
14441 +
14442 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14443 +{
14444 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14445 + __raw_writeb(d, map->map_priv_1 + adr);
14446 + mb();
14447 +}
14448 +
14449 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14450 +{
14451 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14452 + __raw_writew(d, map->map_priv_1 + adr);
14453 + mb();
14454 +}
14455 +
14456 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14457 +{
14458 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14459 + __raw_writel(d, map->map_priv_1 + adr);
14460 + mb();
14461 +}
14462 +
14463 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14464 +{
14465 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14466 + memcpy_toio(map->map_priv_1 + to, from, len);
14467 +}
14468 +
14469 +static struct map_info mirage_map = {
14470 + name: "Mirage flash",
14471 + read8: physmap_read8,
14472 + read16: physmap_read16,
14473 + read32: physmap_read32,
14474 + copy_from: physmap_copy_from,
14475 + write8: physmap_write8,
14476 + write16: physmap_write16,
14477 + write32: physmap_write32,
14478 + copy_to: physmap_copy_to,
14479 +};
14480 +
14481 +static unsigned char flash_buswidth = 4;
14482 +
14483 +static struct mtd_partition mirage_partitions[] = {
14484 + {
14485 + name: "User FS",
14486 + size: 0x1c00000,
14487 + offset: 0x0000000
14488 + },{
14489 + name: "yamon",
14490 + size: 0x0100000,
14491 + offset: MTDPART_OFS_APPEND,
14492 + mask_flags: MTD_WRITEABLE
14493 + },{
14494 + name: "raw kernel",
14495 + size: (0x300000-0x40000), /* last 256KB is yamon env */
14496 + offset: MTDPART_OFS_APPEND,
14497 + }
14498 +};
14499 +
14500 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14501 +
14502 +static struct mtd_partition *parsed_parts;
14503 +static struct mtd_info *mymtd;
14504 +
14505 +/*
14506 + * Probe the flash density and setup window address and size
14507 + * based on user CONFIG options. There are times when we don't
14508 + * want the MTD driver to be probing the boot or user flash,
14509 + * so having the option to enable only one bank is important.
14510 + */
14511 +int setup_flash_params()
14512 +{
14513 + flash_size = 0x4000000; /* 64MB per part */
14514 + /* Boot ROM flash bank only; no user bank */
14515 + window_addr = 0x1C000000;
14516 + window_size = 0x4000000;
14517 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
14518 + mirage_partitions[0].size = 0x3C00000;
14519 + return 0;
14520 +}
14521 +
14522 +int __init mirage_mtd_init(void)
14523 +{
14524 + struct mtd_partition *parts;
14525 + int nb_parts = 0;
14526 + char *part_type;
14527 +
14528 + /* Default flash buswidth */
14529 + mirage_map.buswidth = flash_buswidth;
14530 +
14531 + if (setup_flash_params())
14532 + return -ENXIO;
14533 +
14534 + /*
14535 + * Static partition definition selection
14536 + */
14537 + part_type = "static";
14538 + parts = mirage_partitions;
14539 + nb_parts = NB_OF(mirage_partitions);
14540 + mirage_map.size = window_size;
14541 +
14542 + /*
14543 + * Now let's probe for the actual flash. Do it here since
14544 + * specific machine settings might have been set above.
14545 + */
14546 + printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n",
14547 + mirage_map.buswidth*8);
14548 + mirage_map.map_priv_1 =
14549 + (unsigned long)ioremap(window_addr, window_size);
14550 + mymtd = do_map_probe("cfi_probe", &mirage_map);
14551 + if (!mymtd) return -ENXIO;
14552 + mymtd->module = THIS_MODULE;
14553 +
14554 + add_mtd_partitions(mymtd, parts, nb_parts);
14555 + return 0;
14556 +}
14557 +
14558 +static void __exit mirage_mtd_cleanup(void)
14559 +{
14560 + if (mymtd) {
14561 + del_mtd_partitions(mymtd);
14562 + map_destroy(mymtd);
14563 + if (parsed_parts)
14564 + kfree(parsed_parts);
14565 + }
14566 +}
14567 +
14568 +module_init(mirage_mtd_init);
14569 +module_exit(mirage_mtd_cleanup);
14570 +
14571 +MODULE_AUTHOR("Embedded Edge");
14572 +MODULE_DESCRIPTION("Mirage mtd map driver");
14573 +MODULE_LICENSE("GPL");
14574 diff -Nur linux-2.4.29/drivers/mtd/maps/mtx-1.c linux-mips/drivers/mtd/maps/mtx-1.c
14575 --- linux-2.4.29/drivers/mtd/maps/mtx-1.c 1970-01-01 01:00:00.000000000 +0100
14576 +++ linux-mips/drivers/mtd/maps/mtx-1.c 2003-06-27 02:04:35.000000000 +0200
14577 @@ -0,0 +1,181 @@
14578 +/*
14579 + * Flash memory access on 4G Systems MTX-1 board
14580 + *
14581 + * (C) 2003 Pete Popov <ppopov@mvista.com>
14582 + * Bruno Randolf <bruno.randolf@4g-systems.de>
14583 + */
14584 +
14585 +#include <linux/config.h>
14586 +#include <linux/module.h>
14587 +#include <linux/types.h>
14588 +#include <linux/kernel.h>
14589 +
14590 +#include <linux/mtd/mtd.h>
14591 +#include <linux/mtd/map.h>
14592 +#include <linux/mtd/partitions.h>
14593 +
14594 +#include <asm/io.h>
14595 +#include <asm/au1000.h>
14596 +
14597 +#ifdef DEBUG_RW
14598 +#define DBG(x...) printk(x)
14599 +#else
14600 +#define DBG(x...)
14601 +#endif
14602 +
14603 +#ifdef CONFIG_MIPS_MTX1
14604 +#define WINDOW_ADDR 0x1E000000
14605 +#define WINDOW_SIZE 0x2000000
14606 +#endif
14607 +
14608 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14609 +{
14610 + __u8 ret;
14611 + ret = __raw_readb(map->map_priv_1 + ofs);
14612 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14613 + return ret;
14614 +}
14615 +
14616 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14617 +{
14618 + __u16 ret;
14619 + ret = __raw_readw(map->map_priv_1 + ofs);
14620 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14621 + return ret;
14622 +}
14623 +
14624 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14625 +{
14626 + __u32 ret;
14627 + ret = __raw_readl(map->map_priv_1 + ofs);
14628 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14629 + return ret;
14630 +}
14631 +
14632 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14633 +{
14634 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14635 + memcpy_fromio(to, map->map_priv_1 + from, len);
14636 +}
14637 +
14638 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14639 +{
14640 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14641 + __raw_writeb(d, map->map_priv_1 + adr);
14642 + mb();
14643 +}
14644 +
14645 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14646 +{
14647 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14648 + __raw_writew(d, map->map_priv_1 + adr);
14649 + mb();
14650 +}
14651 +
14652 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14653 +{
14654 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14655 + __raw_writel(d, map->map_priv_1 + adr);
14656 + mb();
14657 +}
14658 +
14659 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14660 +{
14661 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14662 + memcpy_toio(map->map_priv_1 + to, from, len);
14663 +}
14664 +
14665 +
14666 +
14667 +static struct map_info mtx1_map = {
14668 + name: "MTX-1 flash",
14669 + read8: physmap_read8,
14670 + read16: physmap_read16,
14671 + read32: physmap_read32,
14672 + copy_from: physmap_copy_from,
14673 + write8: physmap_write8,
14674 + write16: physmap_write16,
14675 + write32: physmap_write32,
14676 + copy_to: physmap_copy_to,
14677 +};
14678 +
14679 +
14680 +static unsigned long flash_size = 0x01000000;
14681 +static unsigned char flash_buswidth = 4;
14682 +static struct mtd_partition mtx1_partitions[] = {
14683 + {
14684 + name: "user fs",
14685 + size: 0x1c00000,
14686 + offset: 0,
14687 + },{
14688 + name: "yamon",
14689 + size: 0x0100000,
14690 + offset: MTDPART_OFS_APPEND,
14691 + mask_flags: MTD_WRITEABLE
14692 + },{
14693 + name: "raw kernel",
14694 + size: 0x02c0000,
14695 + offset: MTDPART_OFS_APPEND,
14696 + },{
14697 + name: "yamon env vars",
14698 + size: 0x0040000,
14699 + offset: MTDPART_OFS_APPEND,
14700 + mask_flags: MTD_WRITEABLE
14701 + }
14702 +};
14703 +
14704 +
14705 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14706 +
14707 +static struct mtd_partition *parsed_parts;
14708 +static struct mtd_info *mymtd;
14709 +
14710 +int __init mtx1_mtd_init(void)
14711 +{
14712 + struct mtd_partition *parts;
14713 + int nb_parts = 0;
14714 + char *part_type;
14715 +
14716 + /* Default flash buswidth */
14717 + mtx1_map.buswidth = flash_buswidth;
14718 +
14719 + /*
14720 + * Static partition definition selection
14721 + */
14722 + part_type = "static";
14723 + parts = mtx1_partitions;
14724 + nb_parts = NB_OF(mtx1_partitions);
14725 + mtx1_map.size = flash_size;
14726 +
14727 + /*
14728 + * Now let's probe for the actual flash. Do it here since
14729 + * specific machine settings might have been set above.
14730 + */
14731 + printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
14732 + mtx1_map.buswidth*8);
14733 + mtx1_map.map_priv_1 =
14734 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
14735 + mymtd = do_map_probe("cfi_probe", &mtx1_map);
14736 + if (!mymtd) return -ENXIO;
14737 + mymtd->module = THIS_MODULE;
14738 +
14739 + add_mtd_partitions(mymtd, parts, nb_parts);
14740 + return 0;
14741 +}
14742 +
14743 +static void __exit mtx1_mtd_cleanup(void)
14744 +{
14745 + if (mymtd) {
14746 + del_mtd_partitions(mymtd);
14747 + map_destroy(mymtd);
14748 + if (parsed_parts)
14749 + kfree(parsed_parts);
14750 + }
14751 +}
14752 +
14753 +module_init(mtx1_mtd_init);
14754 +module_exit(mtx1_mtd_cleanup);
14755 +
14756 +MODULE_AUTHOR("Pete Popov");
14757 +MODULE_DESCRIPTION("MTX-1 CFI map driver");
14758 +MODULE_LICENSE("GPL");
14759 diff -Nur linux-2.4.29/drivers/mtd/maps/pb1550-flash.c linux-mips/drivers/mtd/maps/pb1550-flash.c
14760 --- linux-2.4.29/drivers/mtd/maps/pb1550-flash.c 1970-01-01 01:00:00.000000000 +0100
14761 +++ linux-mips/drivers/mtd/maps/pb1550-flash.c 2004-02-26 01:48:48.000000000 +0100
14762 @@ -0,0 +1,270 @@
14763 +/*
14764 + * Flash memory access on Alchemy Pb1550 board
14765 + *
14766 + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
14767 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
14768 + *
14769 + */
14770 +
14771 +#include <linux/config.h>
14772 +#include <linux/module.h>
14773 +#include <linux/types.h>
14774 +#include <linux/kernel.h>
14775 +
14776 +#include <linux/mtd/mtd.h>
14777 +#include <linux/mtd/map.h>
14778 +#include <linux/mtd/partitions.h>
14779 +
14780 +#include <asm/io.h>
14781 +#include <asm/au1000.h>
14782 +#include <asm/pb1550.h>
14783 +
14784 +#ifdef DEBUG_RW
14785 +#define DBG(x...) printk(x)
14786 +#else
14787 +#define DBG(x...)
14788 +#endif
14789 +
14790 +static unsigned long window_addr;
14791 +static unsigned long window_size;
14792 +
14793 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
14794 +{
14795 + __u8 ret;
14796 + ret = __raw_readb(map->map_priv_1 + ofs);
14797 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14798 + return ret;
14799 +}
14800 +
14801 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
14802 +{
14803 + __u16 ret;
14804 + ret = __raw_readw(map->map_priv_1 + ofs);
14805 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14806 + return ret;
14807 +}
14808 +
14809 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
14810 +{
14811 + __u32 ret;
14812 + ret = __raw_readl(map->map_priv_1 + ofs);
14813 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
14814 + return ret;
14815 +}
14816 +
14817 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
14818 +{
14819 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
14820 + memcpy_fromio(to, map->map_priv_1 + from, len);
14821 +}
14822 +
14823 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
14824 +{
14825 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14826 + __raw_writeb(d, map->map_priv_1 + adr);
14827 + mb();
14828 +}
14829 +
14830 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
14831 +{
14832 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14833 + __raw_writew(d, map->map_priv_1 + adr);
14834 + mb();
14835 +}
14836 +
14837 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
14838 +{
14839 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
14840 + __raw_writel(d, map->map_priv_1 + adr);
14841 + mb();
14842 +}
14843 +
14844 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
14845 +{
14846 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
14847 + memcpy_toio(map->map_priv_1 + to, from, len);
14848 +}
14849 +
14850 +static struct map_info pb1550_map = {
14851 + name: "Pb1550 flash",
14852 + read8: physmap_read8,
14853 + read16: physmap_read16,
14854 + read32: physmap_read32,
14855 + copy_from: physmap_copy_from,
14856 + write8: physmap_write8,
14857 + write16: physmap_write16,
14858 + write32: physmap_write32,
14859 + copy_to: physmap_copy_to,
14860 +};
14861 +
14862 +static unsigned char flash_buswidth = 4;
14863 +
14864 +/*
14865 + * Support only 64MB NOR Flash parts
14866 + */
14867 +
14868 +#ifdef PB1550_BOTH_BANKS
14869 +/* both banks will be used. Combine the first bank and the first
14870 + * part of the second bank together into a single jffs/jffs2
14871 + * partition.
14872 + */
14873 +static struct mtd_partition pb1550_partitions[] = {
14874 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
14875 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
14876 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
14877 + */
14878 + {
14879 + name: "User FS",
14880 + size: (0x1FC00000 - 0x18000000),
14881 + offset: 0x0000000
14882 + },{
14883 + name: "yamon",
14884 + size: 0x0100000,
14885 + offset: MTDPART_OFS_APPEND,
14886 + mask_flags: MTD_WRITEABLE
14887 + },{
14888 + name: "raw kernel",
14889 + size: (0x300000 - 0x40000), /* last 256KB is yamon env */
14890 + offset: MTDPART_OFS_APPEND,
14891 + }
14892 +};
14893 +#elif defined(PB1550_BOOT_ONLY)
14894 +static struct mtd_partition pb1550_partitions[] = {
14895 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
14896 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
14897 + */
14898 + {
14899 + name: "User FS",
14900 + size: 0x03c00000,
14901 + offset: 0x0000000
14902 + },{
14903 + name: "yamon",
14904 + size: 0x0100000,
14905 + offset: MTDPART_OFS_APPEND,
14906 + mask_flags: MTD_WRITEABLE
14907 + },{
14908 + name: "raw kernel",
14909 + size: (0x300000-0x40000), /* last 256KB is yamon env */
14910 + offset: MTDPART_OFS_APPEND,
14911 + }
14912 +};
14913 +#elif defined(PB1550_USER_ONLY)
14914 +static struct mtd_partition pb1550_partitions[] = {
14915 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
14916 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
14917 + */
14918 + {
14919 + name: "User FS",
14920 + size: (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
14921 + offset: 0x0000000
14922 + },{
14923 + name: "raw kernel",
14924 + size: MTDPART_SIZ_FULL,
14925 + offset: MTDPART_OFS_APPEND,
14926 + }
14927 +};
14928 +#else
14929 +#error MTD_PB1550 define combo error /* should never happen */
14930 +#endif
14931 +
14932 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
14933 +
14934 +static struct mtd_partition *parsed_parts;
14935 +static struct mtd_info *mymtd;
14936 +
14937 +/*
14938 + * Probe the flash density and setup window address and size
14939 + * based on user CONFIG options. There are times when we don't
14940 + * want the MTD driver to be probing the boot or user flash,
14941 + * so having the option to enable only one bank is important.
14942 + */
14943 +int setup_flash_params()
14944 +{
14945 + u16 boot_swapboot;
14946 + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
14947 + ((bcsr->status >> 6) & 0x1);
14948 + printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
14949 +
14950 + switch (boot_swapboot) {
14951 + case 0: /* 512Mbit devices, both enabled */
14952 + case 1:
14953 + case 8:
14954 + case 9:
14955 +#if defined(PB1550_BOTH_BANKS)
14956 + window_addr = 0x18000000;
14957 + window_size = 0x8000000;
14958 +#elif defined(PB1550_BOOT_ONLY)
14959 + window_addr = 0x1C000000;
14960 + window_size = 0x4000000;
14961 +#else /* USER ONLY */
14962 + window_addr = 0x1E000000;
14963 + window_size = 0x1000000;
14964 +#endif
14965 + break;
14966 + case 0xC:
14967 + case 0xD:
14968 + case 0xE:
14969 + case 0xF:
14970 + /* 64 MB Boot NOR Flash is disabled */
14971 + /* and the start address is moved to 0x0C00000 */
14972 + window_addr = 0x0C000000;
14973 + window_size = 0x4000000;
14974 + default:
14975 + printk("Pb1550 MTD: unsupported boot:swap setting\n");
14976 + return 1;
14977 + }
14978 + return 0;
14979 +}
14980 +
14981 +int __init pb1550_mtd_init(void)
14982 +{
14983 + struct mtd_partition *parts;
14984 + int nb_parts = 0;
14985 + char *part_type;
14986 +
14987 + /* Default flash buswidth */
14988 + pb1550_map.buswidth = flash_buswidth;
14989 +
14990 + if (setup_flash_params())
14991 + return -ENXIO;
14992 +
14993 + /*
14994 + * Static partition definition selection
14995 + */
14996 + part_type = "static";
14997 + parts = pb1550_partitions;
14998 + nb_parts = NB_OF(pb1550_partitions);
14999 + pb1550_map.size = window_size;
15000 +
15001 + /*
15002 + * Now let's probe for the actual flash. Do it here since
15003 + * specific machine settings might have been set above.
15004 + */
15005 + printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
15006 + pb1550_map.buswidth*8);
15007 + pb1550_map.map_priv_1 =
15008 + (unsigned long)ioremap(window_addr, window_size);
15009 + mymtd = do_map_probe("cfi_probe", &pb1550_map);
15010 + if (!mymtd) return -ENXIO;
15011 + mymtd->module = THIS_MODULE;
15012 +
15013 + add_mtd_partitions(mymtd, parts, nb_parts);
15014 + return 0;
15015 +}
15016 +
15017 +static void __exit pb1550_mtd_cleanup(void)
15018 +{
15019 + if (mymtd) {
15020 + del_mtd_partitions(mymtd);
15021 + map_destroy(mymtd);
15022 + if (parsed_parts)
15023 + kfree(parsed_parts);
15024 + }
15025 +}
15026 +
15027 +module_init(pb1550_mtd_init);
15028 +module_exit(pb1550_mtd_cleanup);
15029 +
15030 +MODULE_AUTHOR("Embedded Edge, LLC");
15031 +MODULE_DESCRIPTION("Pb1550 mtd map driver");
15032 +MODULE_LICENSE("GPL");
15033 diff -Nur linux-2.4.29/drivers/mtd/maps/pb1xxx-flash.c linux-mips/drivers/mtd/maps/pb1xxx-flash.c
15034 --- linux-2.4.29/drivers/mtd/maps/pb1xxx-flash.c 2003-06-13 16:51:34.000000000 +0200
15035 +++ linux-mips/drivers/mtd/maps/pb1xxx-flash.c 2003-05-19 08:27:22.000000000 +0200
15036 @@ -192,6 +192,34 @@
15037 #else
15038 #error MTD_PB1500 define combo error /* should never happen */
15039 #endif
15040 +#elif defined(CONFIG_MTD_BOSPORUS)
15041 +static unsigned char flash_buswidth = 2;
15042 +static unsigned long flash_size = 0x02000000;
15043 +#define WINDOW_ADDR 0x1F000000
15044 +#define WINDOW_SIZE 0x2000000
15045 +static struct mtd_partition pb1xxx_partitions[] = {
15046 + {
15047 + name: "User FS",
15048 + size: 0x00400000,
15049 + offset: 0x00000000,
15050 + },{
15051 + name: "Yamon-2",
15052 + size: 0x00100000,
15053 + offset: 0x00400000,
15054 + },{
15055 + name: "Root FS",
15056 + size: 0x00700000,
15057 + offset: 0x00500000,
15058 + },{
15059 + name: "Yamon-1",
15060 + size: 0x00100000,
15061 + offset: 0x00C00000,
15062 + },{
15063 + name: "Kernel",
15064 + size: 0x00300000,
15065 + offset: 0x00D00000,
15066 + }
15067 +};
15068 #else
15069 #error Unsupported board
15070 #endif
15071 diff -Nur linux-2.4.29/drivers/mtd/maps/xxs1500.c linux-mips/drivers/mtd/maps/xxs1500.c
15072 --- linux-2.4.29/drivers/mtd/maps/xxs1500.c 1970-01-01 01:00:00.000000000 +0100
15073 +++ linux-mips/drivers/mtd/maps/xxs1500.c 2003-08-02 04:06:01.000000000 +0200
15074 @@ -0,0 +1,186 @@
15075 +/*
15076 + * Flash memory access on MyCable XXS1500 board
15077 + *
15078 + * (C) 2003 Pete Popov <ppopov@mvista.com>
15079 + *
15080 + * $Id$
15081 + */
15082 +
15083 +#include <linux/config.h>
15084 +#include <linux/module.h>
15085 +#include <linux/types.h>
15086 +#include <linux/kernel.h>
15087 +
15088 +#include <linux/mtd/mtd.h>
15089 +#include <linux/mtd/map.h>
15090 +#include <linux/mtd/partitions.h>
15091 +
15092 +#include <asm/io.h>
15093 +#include <asm/au1000.h>
15094 +
15095 +#ifdef DEBUG_RW
15096 +#define DBG(x...) printk(x)
15097 +#else
15098 +#define DBG(x...)
15099 +#endif
15100 +
15101 +#ifdef CONFIG_MIPS_XXS1500
15102 +#define WINDOW_ADDR 0x1F000000
15103 +#define WINDOW_SIZE 0x1000000
15104 +#endif
15105 +
15106 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15107 +{
15108 + __u8 ret;
15109 + ret = __raw_readb(map->map_priv_1 + ofs);
15110 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15111 + return ret;
15112 +}
15113 +
15114 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15115 +{
15116 + __u16 ret;
15117 + ret = __raw_readw(map->map_priv_1 + ofs);
15118 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15119 + return ret;
15120 +}
15121 +
15122 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15123 +{
15124 + __u32 ret;
15125 + ret = __raw_readl(map->map_priv_1 + ofs);
15126 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15127 + return ret;
15128 +}
15129 +
15130 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15131 +{
15132 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15133 + memcpy_fromio(to, map->map_priv_1 + from, len);
15134 +}
15135 +
15136 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15137 +{
15138 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15139 + __raw_writeb(d, map->map_priv_1 + adr);
15140 + mb();
15141 +}
15142 +
15143 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15144 +{
15145 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15146 + __raw_writew(d, map->map_priv_1 + adr);
15147 + mb();
15148 +}
15149 +
15150 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15151 +{
15152 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15153 + __raw_writel(d, map->map_priv_1 + adr);
15154 + mb();
15155 +}
15156 +
15157 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15158 +{
15159 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15160 + memcpy_toio(map->map_priv_1 + to, from, len);
15161 +}
15162 +
15163 +
15164 +
15165 +static struct map_info xxs1500_map = {
15166 + name: "XXS1500 flash",
15167 + read8: physmap_read8,
15168 + read16: physmap_read16,
15169 + read32: physmap_read32,
15170 + copy_from: physmap_copy_from,
15171 + write8: physmap_write8,
15172 + write16: physmap_write16,
15173 + write32: physmap_write32,
15174 + copy_to: physmap_copy_to,
15175 +};
15176 +
15177 +
15178 +static unsigned long flash_size = 0x00800000;
15179 +static unsigned char flash_buswidth = 4;
15180 +static struct mtd_partition xxs1500_partitions[] = {
15181 + {
15182 + name: "kernel image",
15183 + size: 0x00200000,
15184 + offset: 0,
15185 + },{
15186 + name: "user fs 0",
15187 + size: (0x00C00000-0x200000),
15188 + offset: MTDPART_OFS_APPEND,
15189 + },{
15190 + name: "yamon",
15191 + size: 0x00100000,
15192 + offset: MTDPART_OFS_APPEND,
15193 + mask_flags: MTD_WRITEABLE
15194 + },{
15195 + name: "user fs 1",
15196 + size: 0x2c0000,
15197 + offset: MTDPART_OFS_APPEND,
15198 + },{
15199 + name: "yamon env vars",
15200 + size: 0x040000,
15201 + offset: MTDPART_OFS_APPEND,
15202 + mask_flags: MTD_WRITEABLE
15203 + }
15204 +};
15205 +
15206 +
15207 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15208 +
15209 +static struct mtd_partition *parsed_parts;
15210 +static struct mtd_info *mymtd;
15211 +
15212 +int __init xxs1500_mtd_init(void)
15213 +{
15214 + struct mtd_partition *parts;
15215 + int nb_parts = 0;
15216 + char *part_type;
15217 +
15218 + /* Default flash buswidth */
15219 + xxs1500_map.buswidth = flash_buswidth;
15220 +
15221 + /*
15222 + * Static partition definition selection
15223 + */
15224 + part_type = "static";
15225 + parts = xxs1500_partitions;
15226 + nb_parts = NB_OF(xxs1500_partitions);
15227 + xxs1500_map.size = flash_size;
15228 +
15229 + /*
15230 + * Now let's probe for the actual flash. Do it here since
15231 + * specific machine settings might have been set above.
15232 + */
15233 + printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n",
15234 + xxs1500_map.buswidth*8);
15235 + xxs1500_map.map_priv_1 =
15236 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
15237 + mymtd = do_map_probe("cfi_probe", &xxs1500_map);
15238 + if (!mymtd) return -ENXIO;
15239 + mymtd->module = THIS_MODULE;
15240 +
15241 + add_mtd_partitions(mymtd, parts, nb_parts);
15242 + return 0;
15243 +}
15244 +
15245 +static void __exit xxs1500_mtd_cleanup(void)
15246 +{
15247 + if (mymtd) {
15248 + del_mtd_partitions(mymtd);
15249 + map_destroy(mymtd);
15250 + if (parsed_parts)
15251 + kfree(parsed_parts);
15252 + }
15253 +}
15254 +
15255 +module_init(xxs1500_mtd_init);
15256 +module_exit(xxs1500_mtd_cleanup);
15257 +
15258 +MODULE_AUTHOR("Pete Popov");
15259 +MODULE_DESCRIPTION("XXS1500 CFI map driver");
15260 +MODULE_LICENSE("GPL");
15261 diff -Nur linux-2.4.29/drivers/net/defxx.c linux-mips/drivers/net/defxx.c
15262 --- linux-2.4.29/drivers/net/defxx.c 2004-11-17 12:54:21.000000000 +0100
15263 +++ linux-mips/drivers/net/defxx.c 2004-11-19 01:28:39.000000000 +0100
15264 @@ -10,24 +10,18 @@
15265 *
15266 * Abstract:
15267 * A Linux device driver supporting the Digital Equipment Corporation
15268 - * FDDI EISA and PCI controller families. Supported adapters include:
15269 + * FDDI TURBOchannel, EISA and PCI controller families. Supported
15270 + * adapters include:
15271 *
15272 - * DEC FDDIcontroller/EISA (DEFEA)
15273 - * DEC FDDIcontroller/PCI (DEFPA)
15274 + * DEC FDDIcontroller/TURBOchannel (DEFTA)
15275 + * DEC FDDIcontroller/EISA (DEFEA)
15276 + * DEC FDDIcontroller/PCI (DEFPA)
15277 *
15278 - * Maintainers:
15279 - * LVS Lawrence V. Stefani
15280 - *
15281 - * Contact:
15282 - * The author may be reached at:
15283 + * The original author:
15284 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
15285 *
15286 - * Inet: stefani@lkg.dec.com
15287 - * (NOTE! this address no longer works -jgarzik)
15288 - *
15289 - * Mail: Digital Equipment Corporation
15290 - * 550 King Street
15291 - * M/S: LKG1-3/M07
15292 - * Littleton, MA 01460
15293 + * Maintainers:
15294 + * macro Maciej W. Rozycki <macro@linux-mips.org>
15295 *
15296 * Credits:
15297 * I'd like to thank Patricia Cross for helping me get started with
15298 @@ -197,16 +191,16 @@
15299 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
15300 * Feb 2001 Skb allocation fixes
15301 * Feb 2001 davej PCI enable cleanups.
15302 + * 04 Aug 2003 macro Converted to the DMA API.
15303 + * 14 Aug 2004 macro Fix device names reported.
15304 + * 26 Sep 2004 macro TURBOchannel support.
15305 */
15306
15307 /* Include files */
15308
15309 #include <linux/module.h>
15310 -
15311 #include <linux/kernel.h>
15312 -#include <linux/sched.h>
15313 #include <linux/string.h>
15314 -#include <linux/ptrace.h>
15315 #include <linux/errno.h>
15316 #include <linux/ioport.h>
15317 #include <linux/slab.h>
15318 @@ -215,19 +209,33 @@
15319 #include <linux/delay.h>
15320 #include <linux/init.h>
15321 #include <linux/netdevice.h>
15322 +#include <linux/fddidevice.h>
15323 +#include <linux/skbuff.h>
15324 +
15325 #include <asm/byteorder.h>
15326 #include <asm/bitops.h>
15327 #include <asm/io.h>
15328
15329 -#include <linux/fddidevice.h>
15330 -#include <linux/skbuff.h>
15331 +#ifdef CONFIG_TC
15332 +#include <asm/dec/tc.h>
15333 +#else
15334 +static int search_tc_card(const char *name) { return -ENODEV; }
15335 +static void claim_tc_card(int slot) { }
15336 +static void release_tc_card(int slot) { }
15337 +static unsigned long get_tc_base_addr(int slot) { return 0; }
15338 +static unsigned long get_tc_irq_nr(int slot) { return -1; }
15339 +#endif
15340
15341 #include "defxx.h"
15342
15343 -/* Version information string - should be updated prior to each new release!!! */
15344 +/* Version information string should be updated prior to each new release! */
15345 +#define DRV_NAME "defxx"
15346 +#define DRV_VERSION "v1.07T"
15347 +#define DRV_RELDATE "2004/09/26"
15348
15349 static char version[] __devinitdata =
15350 - "defxx.c:v1.05e 2001/02/03 Lawrence V. Stefani and others\n";
15351 + DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
15352 + " Lawrence V. Stefani and others\n";
15353
15354 #define DYNAMIC_BUFFERS 1
15355
15356 @@ -243,7 +251,7 @@
15357 static void dfx_bus_init(struct net_device *dev);
15358 static void dfx_bus_config_check(DFX_board_t *bp);
15359
15360 -static int dfx_driver_init(struct net_device *dev);
15361 +static int dfx_driver_init(struct net_device *dev, const char *print_name);
15362 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
15363
15364 static int dfx_open(struct net_device *dev);
15365 @@ -337,48 +345,84 @@
15366 int offset,
15367 u8 data
15368 )
15369 +{
15370 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15371 + {
15372 + volatile u8 *addr = (void *)(bp->base_addr + offset);
15373
15374 + *addr = data;
15375 + mb();
15376 + }
15377 + else
15378 {
15379 u16 port = bp->base_addr + offset;
15380
15381 outb(data, port);
15382 }
15383 +}
15384
15385 static inline void dfx_port_read_byte(
15386 DFX_board_t *bp,
15387 int offset,
15388 u8 *data
15389 )
15390 +{
15391 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15392 + {
15393 + volatile u8 *addr = (void *)(bp->base_addr + offset);
15394
15395 + mb();
15396 + *data = *addr;
15397 + }
15398 + else
15399 {
15400 u16 port = bp->base_addr + offset;
15401
15402 *data = inb(port);
15403 }
15404 +}
15405
15406 static inline void dfx_port_write_long(
15407 DFX_board_t *bp,
15408 int offset,
15409 u32 data
15410 )
15411 +{
15412 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15413 + {
15414 + volatile u32 *addr = (void *)(bp->base_addr + offset);
15415
15416 + *addr = data;
15417 + mb();
15418 + }
15419 + else
15420 {
15421 u16 port = bp->base_addr + offset;
15422
15423 outl(data, port);
15424 }
15425 +}
15426
15427 static inline void dfx_port_read_long(
15428 DFX_board_t *bp,
15429 int offset,
15430 u32 *data
15431 )
15432 +{
15433 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15434 + {
15435 + volatile u32 *addr = (void *)(bp->base_addr + offset);
15436
15437 + mb();
15438 + *data = *addr;
15439 + }
15440 + else
15441 {
15442 u16 port = bp->base_addr + offset;
15443
15444 *data = inl(port);
15445 }
15446 +}
15447
15448 \f
15449 /*
15450 @@ -393,8 +437,9 @@
15451 * Condition code
15452 *
15453 * Arguments:
15454 - * pdev - pointer to pci device information (NULL for EISA)
15455 - * ioaddr - pointer to port (NULL for PCI)
15456 + * pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
15457 + * bus_type - bus type (one of DFX_BUS_TYPE_*)
15458 + * handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
15459 *
15460 * Functional Description:
15461 *
15462 @@ -410,54 +455,68 @@
15463 * initialized and the board resources are read and stored in
15464 * the device structure.
15465 */
15466 -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
15467 +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
15468 {
15469 + static int version_disp;
15470 + char *print_name = DRV_NAME;
15471 struct net_device *dev;
15472 DFX_board_t *bp; /* board pointer */
15473 + long ioaddr; /* pointer to port */
15474 + unsigned long len; /* resource length */
15475 + int alloc_size; /* total buffer size used */
15476 int err;
15477
15478 -#ifndef MODULE
15479 - static int version_disp;
15480 -
15481 - if (!version_disp) /* display version info if adapter is found */
15482 - {
15483 + if (!version_disp) { /* display version info if adapter is found */
15484 version_disp = 1; /* set display flag to TRUE so that */
15485 printk(version); /* we only display this string ONCE */
15486 }
15487 -#endif
15488
15489 - /*
15490 - * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
15491 - * and calls fddi_setup() and register_netdev(). Not much left to do for us here.
15492 - */
15493 - dev = init_fddidev(NULL, sizeof(*bp));
15494 + if (pdev != NULL)
15495 + print_name = pdev->slot_name;
15496 +
15497 + dev = alloc_fddidev(sizeof(*bp));
15498 if (!dev) {
15499 - printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
15500 + printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
15501 + print_name);
15502 return -ENOMEM;
15503 }
15504
15505 /* Enable PCI device. */
15506 - if (pdev != NULL) {
15507 + if (bus_type == DFX_BUS_TYPE_PCI) {
15508 err = pci_enable_device (pdev);
15509 if (err) goto err_out;
15510 ioaddr = pci_resource_start (pdev, 1);
15511 }
15512
15513 SET_MODULE_OWNER(dev);
15514 + SET_NETDEV_DEV(dev, &pdev->dev);
15515
15516 bp = dev->priv;
15517
15518 - if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
15519 - printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
15520 - dev->name, PFI_K_CSR_IO_LEN, ioaddr);
15521 + if (bus_type == DFX_BUS_TYPE_TC) {
15522 + /* TURBOchannel board */
15523 + bp->slot = handle;
15524 + claim_tc_card(bp->slot);
15525 + ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
15526 + len = PI_TC_K_CSR_LEN;
15527 + } else if (bus_type == DFX_BUS_TYPE_EISA) {
15528 + /* EISA board */
15529 + ioaddr = handle;
15530 + len = PI_ESIC_K_CSR_IO_LEN;
15531 + } else
15532 + /* PCI board */
15533 + len = PFI_K_CSR_IO_LEN;
15534 + dev->base_addr = ioaddr; /* save port (I/O) base address */
15535 +
15536 + if (!request_region(ioaddr, len, print_name)) {
15537 + printk(KERN_ERR "%s: Cannot reserve I/O resource "
15538 + "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
15539 err = -EBUSY;
15540 goto err_out;
15541 }
15542
15543 /* Initialize new device structure */
15544
15545 - dev->base_addr = ioaddr; /* save port (I/O) base address */
15546 -
15547 dev->get_stats = dfx_ctl_get_stats;
15548 dev->open = dfx_open;
15549 dev->stop = dfx_close;
15550 @@ -465,37 +524,54 @@
15551 dev->set_multicast_list = dfx_ctl_set_multicast_list;
15552 dev->set_mac_address = dfx_ctl_set_mac_address;
15553
15554 - if (pdev == NULL) {
15555 - /* EISA board */
15556 - bp->bus_type = DFX_BUS_TYPE_EISA;
15557 + bp->bus_type = bus_type;
15558 + if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
15559 + /* TURBOchannel or EISA board */
15560 bp->next = root_dfx_eisa_dev;
15561 root_dfx_eisa_dev = dev;
15562 } else {
15563 /* PCI board */
15564 - bp->bus_type = DFX_BUS_TYPE_PCI;
15565 bp->pci_dev = pdev;
15566 pci_set_drvdata (pdev, dev);
15567 pci_set_master (pdev);
15568 }
15569
15570 - if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
15571 +
15572 + if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
15573 err = -ENODEV;
15574 goto err_out_region;
15575 }
15576
15577 + err = register_netdev(dev);
15578 + if (err)
15579 + goto err_out_kfree;
15580 +
15581 + printk("%s: registered as %s\n", print_name, dev->name);
15582 return 0;
15583
15584 +err_out_kfree:
15585 + alloc_size = sizeof(PI_DESCR_BLOCK) +
15586 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
15587 +#ifndef DYNAMIC_BUFFERS
15588 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
15589 +#endif
15590 + sizeof(PI_CONSUMER_BLOCK) +
15591 + (PI_ALIGN_K_DESC_BLK - 1);
15592 + if (bp->kmalloced)
15593 + pci_free_consistent(pdev, alloc_size,
15594 + bp->kmalloced, bp->kmalloced_dma);
15595 err_out_region:
15596 - release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
15597 + release_region(ioaddr, len);
15598 err_out:
15599 - unregister_netdev(dev);
15600 - kfree(dev);
15601 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15602 + release_tc_card(bp->slot);
15603 + free_netdev(dev);
15604 return err;
15605 }
15606
15607 static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
15608 {
15609 - return dfx_init_one_pci_or_eisa(pdev, 0);
15610 + return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
15611 }
15612
15613 static int __init dfx_eisa_init(void)
15614 @@ -507,6 +583,7 @@
15615
15616 DBG_printk("In dfx_eisa_init...\n");
15617
15618 +#ifdef CONFIG_EISA
15619 /* Scan for FDDI EISA controllers */
15620
15621 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
15622 @@ -517,9 +594,27 @@
15623 {
15624 port = (i << 12); /* recalc base addr */
15625
15626 - if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
15627 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
15628 }
15629 }
15630 +#endif
15631 + return rc;
15632 +}
15633 +
15634 +static int __init dfx_tc_init(void)
15635 +{
15636 + int rc = -ENODEV;
15637 + int slot; /* TC slot number */
15638 +
15639 + DBG_printk("In dfx_tc_init...\n");
15640 +
15641 + /* Scan for FDDI TC controllers */
15642 + while ((slot = search_tc_card("PMAF-F")) >= 0) {
15643 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
15644 + rc = 0;
15645 + else
15646 + break;
15647 + }
15648 return rc;
15649 }
15650 \f
15651 @@ -583,8 +678,9 @@
15652
15653 /* Initialize adapter based on bus type */
15654
15655 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
15656 - {
15657 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
15658 + dev->irq = get_tc_irq_nr(bp->slot);
15659 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
15660 /* Get the interrupt level from the ESIC chip */
15661
15662 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
15663 @@ -766,6 +862,7 @@
15664 *
15665 * Arguments:
15666 * dev - pointer to device information
15667 + * print_name - printable device name
15668 *
15669 * Functional Description:
15670 * This function allocates additional resources such as the host memory
15671 @@ -780,20 +877,21 @@
15672 * or read adapter MAC address
15673 *
15674 * Assumptions:
15675 - * Memory allocated from kmalloc() call is physically contiguous, locked
15676 - * memory whose physical address equals its virtual address.
15677 + * Memory allocated from pci_alloc_consistent() call is physically
15678 + * contiguous, locked memory.
15679 *
15680 * Side Effects:
15681 * Adapter is reset and should be in DMA_UNAVAILABLE state before
15682 * returning from this routine.
15683 */
15684
15685 -static int __devinit dfx_driver_init(struct net_device *dev)
15686 +static int __devinit dfx_driver_init(struct net_device *dev,
15687 + const char *print_name)
15688 {
15689 DFX_board_t *bp = dev->priv;
15690 int alloc_size; /* total buffer size needed */
15691 char *top_v, *curr_v; /* virtual addrs into memory block */
15692 - u32 top_p, curr_p; /* physical addrs into memory block */
15693 + dma_addr_t top_p, curr_p; /* physical addrs into memory block */
15694 u32 data; /* host data register value */
15695
15696 DBG_printk("In dfx_driver_init...\n");
15697 @@ -837,26 +935,20 @@
15698
15699 /* Read the factory MAC address from the adapter then save it */
15700
15701 - if (dfx_hw_port_ctrl_req(bp,
15702 - PI_PCTRL_M_MLA,
15703 - PI_PDATA_A_MLA_K_LO,
15704 - 0,
15705 - &data) != DFX_K_SUCCESS)
15706 - {
15707 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
15708 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
15709 + &data) != DFX_K_SUCCESS) {
15710 + printk("%s: Could not read adapter factory MAC address!\n",
15711 + print_name);
15712 return(DFX_K_FAILURE);
15713 - }
15714 + }
15715 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
15716
15717 - if (dfx_hw_port_ctrl_req(bp,
15718 - PI_PCTRL_M_MLA,
15719 - PI_PDATA_A_MLA_K_HI,
15720 - 0,
15721 - &data) != DFX_K_SUCCESS)
15722 - {
15723 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
15724 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
15725 + &data) != DFX_K_SUCCESS) {
15726 + printk("%s: Could not read adapter factory MAC address!\n",
15727 + print_name);
15728 return(DFX_K_FAILURE);
15729 - }
15730 + }
15731 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
15732
15733 /*
15734 @@ -867,28 +959,27 @@
15735 */
15736
15737 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
15738 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
15739 - printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15740 - dev->name,
15741 - dev->base_addr,
15742 - dev->irq,
15743 - dev->dev_addr[0],
15744 - dev->dev_addr[1],
15745 - dev->dev_addr[2],
15746 - dev->dev_addr[3],
15747 - dev->dev_addr[4],
15748 - dev->dev_addr[5]);
15749 + if (bp->bus_type == DFX_BUS_TYPE_TC)
15750 + printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
15751 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15752 + print_name, dev->base_addr, dev->irq,
15753 + dev->dev_addr[0], dev->dev_addr[1],
15754 + dev->dev_addr[2], dev->dev_addr[3],
15755 + dev->dev_addr[4], dev->dev_addr[5]);
15756 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
15757 + printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
15758 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15759 + print_name, dev->base_addr, dev->irq,
15760 + dev->dev_addr[0], dev->dev_addr[1],
15761 + dev->dev_addr[2], dev->dev_addr[3],
15762 + dev->dev_addr[4], dev->dev_addr[5]);
15763 else
15764 - printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15765 - dev->name,
15766 - dev->base_addr,
15767 - dev->irq,
15768 - dev->dev_addr[0],
15769 - dev->dev_addr[1],
15770 - dev->dev_addr[2],
15771 - dev->dev_addr[3],
15772 - dev->dev_addr[4],
15773 - dev->dev_addr[5]);
15774 + printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
15775 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
15776 + print_name, dev->base_addr, dev->irq,
15777 + dev->dev_addr[0], dev->dev_addr[1],
15778 + dev->dev_addr[2], dev->dev_addr[3],
15779 + dev->dev_addr[4], dev->dev_addr[5]);
15780
15781 /*
15782 * Get memory for descriptor block, consumer block, and other buffers
15783 @@ -903,14 +994,15 @@
15784 #endif
15785 sizeof(PI_CONSUMER_BLOCK) +
15786 (PI_ALIGN_K_DESC_BLK - 1);
15787 - bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
15788 - if (top_v == NULL)
15789 - {
15790 - printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
15791 + bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
15792 + &bp->kmalloced_dma);
15793 + if (top_v == NULL) {
15794 + printk("%s: Could not allocate memory for host buffers "
15795 + "and structures!\n", print_name);
15796 return(DFX_K_FAILURE);
15797 - }
15798 + }
15799 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
15800 - top_p = virt_to_bus(top_v); /* get physical address of buffer */
15801 + top_p = bp->kmalloced_dma; /* get physical address of buffer */
15802
15803 /*
15804 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
15805 @@ -924,7 +1016,7 @@
15806 * for allocating the needed memory.
15807 */
15808
15809 - curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
15810 + curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
15811 curr_v = top_v + (curr_p - top_p);
15812
15813 /* Reserve space for descriptor block */
15814 @@ -965,14 +1057,20 @@
15815
15816 /* Display virtual and physical addresses if debug driver */
15817
15818 - DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", dev->name, (long)bp->descr_block_virt, bp->descr_block_phys);
15819 - DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
15820 - DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
15821 - DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
15822 - DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->cons_block_virt, bp->cons_block_phys);
15823 + DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
15824 + print_name,
15825 + (long)bp->descr_block_virt, bp->descr_block_phys);
15826 + DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
15827 + print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
15828 + DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
15829 + print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
15830 + DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
15831 + print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
15832 + DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
15833 + print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
15834
15835 return(DFX_K_SUCCESS);
15836 - }
15837 +}
15838
15839 \f
15840 /*
15841 @@ -1218,7 +1316,9 @@
15842
15843 /* Register IRQ - support shared interrupts by passing device ptr */
15844
15845 - ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
15846 + ret = request_irq(dev->irq, (void *)dfx_interrupt,
15847 + (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
15848 + dev->name, dev);
15849 if (ret) {
15850 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
15851 return ret;
15852 @@ -1737,7 +1837,7 @@
15853 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
15854 (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
15855 }
15856 - else
15857 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
15858 {
15859 /* Disable interrupts at the ESIC */
15860
15861 @@ -1755,6 +1855,13 @@
15862 tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
15863 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
15864 }
15865 + else {
15866 + /* TC doesn't share interrupts so no need to disable them */
15867 +
15868 + /* Call interrupt service routine for this adapter */
15869 +
15870 + dfx_int_common(dev);
15871 + }
15872
15873 spin_unlock(&bp->lock);
15874 }
15875 @@ -2663,12 +2770,12 @@
15876
15877 static void my_skb_align(struct sk_buff *skb, int n)
15878 {
15879 - u32 x=(u32)skb->data; /* We only want the low bits .. */
15880 - u32 v;
15881 + unsigned long x = (unsigned long)skb->data;
15882 + unsigned long v;
15883
15884 - v=(x+n-1)&~(n-1); /* Where we want to be */
15885 + v = ALIGN(x, n); /* Where we want to be */
15886
15887 - skb_reserve(skb, v-x);
15888 + skb_reserve(skb, v - x);
15889 }
15890
15891 \f
15892 @@ -2745,7 +2852,10 @@
15893 */
15894
15895 my_skb_align(newskb, 128);
15896 - bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
15897 + bp->descr_block_virt->rcv_data[i + j].long_1 =
15898 + (u32)pci_map_single(bp->pci_dev, newskb->data,
15899 + NEW_SKB_SIZE,
15900 + PCI_DMA_FROMDEVICE);
15901 /*
15902 * p_rcv_buff_va is only used inside the
15903 * kernel so we put the skb pointer here.
15904 @@ -2859,9 +2969,17 @@
15905
15906 my_skb_align(newskb, 128);
15907 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
15908 + pci_unmap_single(bp->pci_dev,
15909 + bp->descr_block_virt->rcv_data[entry].long_1,
15910 + NEW_SKB_SIZE,
15911 + PCI_DMA_FROMDEVICE);
15912 skb_reserve(skb, RCV_BUFF_K_PADDING);
15913 bp->p_rcv_buff_va[entry] = (char *)newskb;
15914 - bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
15915 + bp->descr_block_virt->rcv_data[entry].long_1 =
15916 + (u32)pci_map_single(bp->pci_dev,
15917 + newskb->data,
15918 + NEW_SKB_SIZE,
15919 + PCI_DMA_FROMDEVICE);
15920 } else
15921 skb = NULL;
15922 } else
15923 @@ -2934,7 +3052,7 @@
15924 * is contained in a single physically contiguous buffer
15925 * in which the virtual address of the start of packet
15926 * (skb->data) can be converted to a physical address
15927 - * by using virt_to_bus().
15928 + * by using pci_map_single().
15929 *
15930 * Since the adapter architecture requires a three byte
15931 * packet request header to prepend the start of packet,
15932 @@ -3082,12 +3200,13 @@
15933 * skb->data.
15934 * 6. The physical address of the start of packet
15935 * can be determined from the virtual address
15936 - * by using virt_to_bus() and is only 32-bits
15937 + * by using pci_map_single() and is only 32-bits
15938 * wide.
15939 */
15940
15941 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
15942 - p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
15943 + p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
15944 + skb->len, PCI_DMA_TODEVICE);
15945
15946 /*
15947 * Verify that descriptor is actually available
15948 @@ -3171,6 +3290,7 @@
15949 {
15950 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
15951 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
15952 + u8 comp; /* local transmit completion index */
15953 int freed = 0; /* buffers freed */
15954
15955 /* Service all consumed transmit frames */
15956 @@ -3188,7 +3308,11 @@
15957 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
15958
15959 /* Return skb to operating system */
15960 -
15961 + comp = bp->rcv_xmt_reg.index.xmt_comp;
15962 + pci_unmap_single(bp->pci_dev,
15963 + bp->descr_block_virt->xmt_data[comp].long_1,
15964 + p_xmt_drv_descr->p_skb->len,
15965 + PCI_DMA_TODEVICE);
15966 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
15967
15968 /*
15969 @@ -3297,6 +3421,7 @@
15970 {
15971 u32 prod_cons; /* rcv/xmt consumer block longword */
15972 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
15973 + u8 comp; /* local transmit completion index */
15974
15975 /* Flush all outstanding transmit frames */
15976
15977 @@ -3307,7 +3432,11 @@
15978 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
15979
15980 /* Return skb to operating system */
15981 -
15982 + comp = bp->rcv_xmt_reg.index.xmt_comp;
15983 + pci_unmap_single(bp->pci_dev,
15984 + bp->descr_block_virt->xmt_data[comp].long_1,
15985 + p_xmt_drv_descr->p_skb->len,
15986 + PCI_DMA_TODEVICE);
15987 dev_kfree_skb(p_xmt_drv_descr->p_skb);
15988
15989 /* Increment transmit error counter */
15990 @@ -3337,12 +3466,36 @@
15991
15992 static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
15993 {
15994 - DFX_board_t *bp = dev->priv;
15995 + DFX_board_t *bp = dev->priv;
15996 + unsigned long len; /* resource length */
15997 + int alloc_size; /* total buffer size used */
15998
15999 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
16000 + /* TURBOchannel board */
16001 + len = PI_TC_K_CSR_LEN;
16002 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
16003 + /* EISA board */
16004 + len = PI_ESIC_K_CSR_IO_LEN;
16005 + } else {
16006 + len = PFI_K_CSR_IO_LEN;
16007 + }
16008 unregister_netdev(dev);
16009 - release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
16010 - if (bp->kmalloced) kfree(bp->kmalloced);
16011 - kfree(dev);
16012 + release_region(dev->base_addr, len);
16013 +
16014 + if (bp->bus_type == DFX_BUS_TYPE_TC)
16015 + release_tc_card(bp->slot);
16016 +
16017 + alloc_size = sizeof(PI_DESCR_BLOCK) +
16018 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
16019 +#ifndef DYNAMIC_BUFFERS
16020 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
16021 +#endif
16022 + sizeof(PI_CONSUMER_BLOCK) +
16023 + (PI_ALIGN_K_DESC_BLK - 1);
16024 + if (bp->kmalloced)
16025 + pci_free_consistent(pdev, alloc_size, bp->kmalloced,
16026 + bp->kmalloced_dma);
16027 + free_netdev(dev);
16028 }
16029
16030 static void __devexit dfx_remove_one (struct pci_dev *pdev)
16031 @@ -3353,21 +3506,22 @@
16032 pci_set_drvdata(pdev, NULL);
16033 }
16034
16035 -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
16036 +static struct pci_device_id dfx_pci_tbl[] = {
16037 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
16038 { 0, }
16039 };
16040 MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
16041
16042 static struct pci_driver dfx_driver = {
16043 - name: "defxx",
16044 - probe: dfx_init_one,
16045 - remove: __devexit_p(dfx_remove_one),
16046 - id_table: dfx_pci_tbl,
16047 + .name = "defxx",
16048 + .probe = dfx_init_one,
16049 + .remove = __devexit_p(dfx_remove_one),
16050 + .id_table = dfx_pci_tbl,
16051 };
16052
16053 static int dfx_have_pci;
16054 static int dfx_have_eisa;
16055 +static int dfx_have_tc;
16056
16057
16058 static void __exit dfx_eisa_cleanup(void)
16059 @@ -3388,12 +3542,7 @@
16060
16061 static int __init dfx_init(void)
16062 {
16063 - int rc_pci, rc_eisa;
16064 -
16065 -/* when a module, this is printed whether or not devices are found in probe */
16066 -#ifdef MODULE
16067 - printk(version);
16068 -#endif
16069 + int rc_pci, rc_eisa, rc_tc;
16070
16071 rc_pci = pci_module_init(&dfx_driver);
16072 if (rc_pci >= 0) dfx_have_pci = 1;
16073 @@ -3401,20 +3550,27 @@
16074 rc_eisa = dfx_eisa_init();
16075 if (rc_eisa >= 0) dfx_have_eisa = 1;
16076
16077 - return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci);
16078 + rc_tc = dfx_tc_init();
16079 + if (rc_tc >= 0) dfx_have_tc = 1;
16080 +
16081 + return ((rc_tc < 0) ? 0 : rc_tc) +
16082 + ((rc_eisa < 0) ? 0 : rc_eisa) +
16083 + ((rc_pci < 0) ? 0 : rc_pci);
16084 }
16085
16086 static void __exit dfx_cleanup(void)
16087 {
16088 if (dfx_have_pci)
16089 pci_unregister_driver(&dfx_driver);
16090 - if (dfx_have_eisa)
16091 + if (dfx_have_eisa || dfx_have_tc)
16092 dfx_eisa_cleanup();
16093 -
16094 }
16095
16096 module_init(dfx_init);
16097 module_exit(dfx_cleanup);
16098 +MODULE_AUTHOR("Lawrence V. Stefani");
16099 +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
16100 + DRV_VERSION " " DRV_RELDATE);
16101 MODULE_LICENSE("GPL");
16102
16103 \f
16104 diff -Nur linux-2.4.29/drivers/net/defxx.h linux-mips/drivers/net/defxx.h
16105 --- linux-2.4.29/drivers/net/defxx.h 2001-02-13 22:15:05.000000000 +0100
16106 +++ linux-mips/drivers/net/defxx.h 2004-10-03 20:06:48.000000000 +0200
16107 @@ -12,17 +12,11 @@
16108 * Contains all definitions specified by port specification and required
16109 * by the defxx.c driver.
16110 *
16111 - * Maintainers:
16112 - * LVS Lawrence V. Stefani
16113 - *
16114 - * Contact:
16115 - * The author may be reached at:
16116 + * The original author:
16117 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
16118 *
16119 - * Inet: stefani@lkg.dec.com
16120 - * Mail: Digital Equipment Corporation
16121 - * 550 King Street
16122 - * M/S: LKG1-3/M07
16123 - * Littleton, MA 01460
16124 + * Maintainers:
16125 + * macro Maciej W. Rozycki <macro@linux-mips.org>
16126 *
16127 * Modification History:
16128 * Date Name Description
16129 @@ -30,6 +24,7 @@
16130 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
16131 * macros to DEFXX.C.
16132 * 12-Sep-96 LVS Removed packet request header pointers.
16133 + * 04 Aug 2003 macro Converted to the DMA API.
16134 */
16135
16136 #ifndef _DEFXX_H_
16137 @@ -1467,6 +1462,11 @@
16138
16139 #endif /* #ifndef BIG_ENDIAN */
16140
16141 +/* Define TC PDQ CSR offset and length */
16142 +
16143 +#define PI_TC_K_CSR_OFFSET 0x100000
16144 +#define PI_TC_K_CSR_LEN 0x80 /* 128 bytes */
16145 +
16146 /* Define EISA controller register offsets */
16147
16148 #define PI_ESIC_K_BURST_HOLDOFF 0x040
16149 @@ -1634,6 +1634,7 @@
16150
16151 #define DFX_BUS_TYPE_PCI 0 /* type code for DEC FDDIcontroller/PCI */
16152 #define DFX_BUS_TYPE_EISA 1 /* type code for DEC FDDIcontroller/EISA */
16153 +#define DFX_BUS_TYPE_TC 2 /* type code for DEC FDDIcontroller/TURBOchannel */
16154
16155 #define DFX_FC_PRH2_PRH1_PRH0 0x54003820 /* Packet Request Header bytes + FC */
16156 #define DFX_PRH0_BYTE 0x20 /* Packet Request Header byte 0 */
16157 @@ -1704,17 +1705,19 @@
16158 {
16159 /* Keep virtual and physical pointers to locked, physically contiguous memory */
16160
16161 - char *kmalloced; /* kfree this on unload */
16162 + char *kmalloced; /* pci_free_consistent this on unload */
16163 + dma_addr_t kmalloced_dma;
16164 + /* DMA handle for the above */
16165 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
16166 - u32 descr_block_phys; /* PDQ descriptor block phys address */
16167 + dma_addr_t descr_block_phys; /* PDQ descriptor block phys address */
16168 PI_DMA_CMD_REQ *cmd_req_virt; /* Command request buffer virt address */
16169 - u32 cmd_req_phys; /* Command request buffer phys address */
16170 + dma_addr_t cmd_req_phys; /* Command request buffer phys address */
16171 PI_DMA_CMD_RSP *cmd_rsp_virt; /* Command response buffer virt address */
16172 - u32 cmd_rsp_phys; /* Command response buffer phys address */
16173 + dma_addr_t cmd_rsp_phys; /* Command response buffer phys address */
16174 char *rcv_block_virt; /* LLC host receive queue buf blk virt */
16175 - u32 rcv_block_phys; /* LLC host receive queue buf blk phys */
16176 + dma_addr_t rcv_block_phys; /* LLC host receive queue buf blk phys */
16177 PI_CONSUMER_BLOCK *cons_block_virt; /* PDQ consumer block virt address */
16178 - u32 cons_block_phys; /* PDQ consumer block phys address */
16179 + dma_addr_t cons_block_phys; /* PDQ consumer block phys address */
16180
16181 /* Keep local copies of Type 1 and Type 2 register data */
16182
16183 @@ -1758,8 +1761,9 @@
16184
16185 struct net_device *dev; /* pointer to device structure */
16186 struct net_device *next;
16187 - u32 bus_type; /* bus type (0 == PCI, 1 == EISA) */
16188 - u16 base_addr; /* base I/O address (same as dev->base_addr) */
16189 + u32 bus_type; /* bus type (0 == PCI, 1 == EISA, 2 == TC) */
16190 + long base_addr; /* base I/O address (same as dev->base_addr) */
16191 + int slot; /* TC slot number */
16192 struct pci_dev * pci_dev;
16193 u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
16194 u32 req_ttrt; /* requested TTRT value (in 80ns units) */
16195 diff -Nur linux-2.4.29/drivers/net/hamradio/hdlcdrv.c linux-mips/drivers/net/hamradio/hdlcdrv.c
16196 --- linux-2.4.29/drivers/net/hamradio/hdlcdrv.c 2002-02-25 20:37:59.000000000 +0100
16197 +++ linux-mips/drivers/net/hamradio/hdlcdrv.c 2004-05-04 14:04:27.000000000 +0200
16198 @@ -587,6 +587,8 @@
16199 return -EINVAL;
16200 s = (struct hdlcdrv_state *)dev->priv;
16201
16202 + netif_stop_queue(dev);
16203 +
16204 if (s->ops && s->ops->close)
16205 i = s->ops->close(dev);
16206 if (s->skb)
16207 diff -Nur linux-2.4.29/drivers/net/irda/au1k_ir.c linux-mips/drivers/net/irda/au1k_ir.c
16208 --- linux-2.4.29/drivers/net/irda/au1k_ir.c 2004-02-18 14:36:31.000000000 +0100
16209 +++ linux-mips/drivers/net/irda/au1k_ir.c 2005-02-12 04:06:52.000000000 +0100
16210 @@ -81,10 +81,6 @@
16211
16212 #define RUN_AT(x) (jiffies + (x))
16213
16214 -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
16215 -static BCSR * const bcsr = (BCSR *)0xAE000000;
16216 -#endif
16217 -
16218 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
16219
16220 /*
16221 diff -Nur linux-2.4.29/drivers/pci/pci.c linux-mips/drivers/pci/pci.c
16222 --- linux-2.4.29/drivers/pci/pci.c 2004-11-17 12:54:21.000000000 +0100
16223 +++ linux-mips/drivers/pci/pci.c 2004-11-19 01:28:41.000000000 +0100
16224 @@ -1281,11 +1281,17 @@
16225 {
16226 unsigned int buses;
16227 unsigned short cr;
16228 + unsigned short bctl;
16229 struct pci_bus *child;
16230 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
16231
16232 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
16233 DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
16234 + /* Disable MasterAbortMode during probing to avoid reporting
16235 + of bus errors (in some architectures) */
16236 + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
16237 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
16238 + bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
16239 if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
16240 /*
16241 * Bus already configured by firmware, process it in the first
16242 @@ -1351,6 +1357,7 @@
16243 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
16244 pci_write_config_word(dev, PCI_COMMAND, cr);
16245 }
16246 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
16247 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
16248 return max;
16249 }
16250 diff -Nur linux-2.4.29/drivers/pcmcia/Config.in linux-mips/drivers/pcmcia/Config.in
16251 --- linux-2.4.29/drivers/pcmcia/Config.in 2004-02-18 14:36:31.000000000 +0100
16252 +++ linux-mips/drivers/pcmcia/Config.in 2004-02-22 06:21:34.000000000 +0100
16253 @@ -30,16 +30,14 @@
16254 dep_tristate ' M8xx support' CONFIG_PCMCIA_M8XX $CONFIG_PCMCIA
16255 fi
16256 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
16257 - dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
16258 - if [ "$CONFIG_PCMCIA_AU1X00" != "n" ]; then
16259 - bool ' Pb1x00 board support' CONFIG_PCMCIA_PB1X00
16260 - bool ' Db1x00 board support' CONFIG_PCMCIA_DB1X00
16261 - bool ' XXS1500 board support' CONFIG_PCMCIA_XXS1500
16262 - fi
16263 + dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
16264 fi
16265 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
16266 dep_bool ' SiByte PCMCIA support' CONFIG_PCMCIA_SIBYTE $CONFIG_PCMCIA $CONFIG_BLK_DEV_IDE_SIBYTE
16267 fi
16268 + if [ "$CONFIG_VRC4171" = "y" -o "$CONFIG_VRC4171" = "m" ]; then
16269 + dep_tristate ' NEC VRC4171 Card Controllers support' CONFIG_PCMCIA_VRC4171 $CONFIG_PCMCIA
16270 + fi
16271 if [ "$CONFIG_VRC4173" = "y" -o "$CONFIG_VRC4173" = "m" ]; then
16272 dep_tristate ' NEC VRC4173 CARDU support' CONFIG_PCMCIA_VRC4173 $CONFIG_PCMCIA
16273 fi
16274 diff -Nur linux-2.4.29/drivers/pcmcia/Makefile linux-mips/drivers/pcmcia/Makefile
16275 --- linux-2.4.29/drivers/pcmcia/Makefile 2004-02-18 14:36:31.000000000 +0100
16276 +++ linux-mips/drivers/pcmcia/Makefile 2005-02-12 04:06:57.000000000 +0100
16277 @@ -61,9 +61,18 @@
16278
16279 obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o
16280 au1000_ss-objs-y := au1000_generic.o
16281 -au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00) += au1000_pb1x00.o
16282 -au1000_ss-objs-$(CONFIG_PCMCIA_DB1X00) += au1000_db1x00.o
16283 -au1000_ss-objs-$(CONFIG_PCMCIA_XXS1500) += au1000_xxs1500.o
16284 +au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
16285 +au1000_ss-objs-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
16286 +au1000_ss-objs-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
16287 +au1000_ss-objs-$(CONFIG_MIPS_PB1550) += au1000_pb1550.o
16288 +au1000_ss-objs-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
16289 +au1000_ss-objs-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
16290 +au1000_ss-objs-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
16291 +au1000_ss-objs-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
16292 +au1000_ss-objs-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
16293 +au1000_ss-objs-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
16294 +au1000_ss-objs-$(CONFIG_MIPS_HYDROGEN3) += au1000_hydrogen3.o
16295 +au1000_ss-objs-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
16296
16297 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
16298 obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
16299 @@ -89,6 +98,7 @@
16300 sa1100_cs-objs-$(CONFIG_SA1100_XP860) += sa1100_xp860.o sa1111_generic.o
16301 sa1100_cs-objs-$(CONFIG_SA1100_YOPY) += sa1100_yopy.o
16302
16303 +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o
16304 obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
16305
16306 include $(TOPDIR)/Rules.make
16307 diff -Nur linux-2.4.29/drivers/pcmcia/au1000_db1x00.c linux-mips/drivers/pcmcia/au1000_db1x00.c
16308 --- linux-2.4.29/drivers/pcmcia/au1000_db1x00.c 2005-01-19 15:09:57.000000000 +0100
16309 +++ linux-mips/drivers/pcmcia/au1000_db1x00.c 2005-02-12 04:06:57.000000000 +0100
16310 @@ -1,6 +1,6 @@
16311 /*
16312 *
16313 - * Alchemy Semi Db1x00 boards specific pcmcia routines.
16314 + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
16315 *
16316 * Copyright 2002 MontaVista Software Inc.
16317 * Author: MontaVista Software, Inc.
16318 @@ -54,9 +54,20 @@
16319 #include <asm/au1000.h>
16320 #include <asm/au1000_pcmcia.h>
16321
16322 +#if defined(CONFIG_MIPS_PB1200)
16323 +#include <asm/pb1200.h>
16324 +#elif defined(CONFIG_MIPS_DB1200)
16325 +#include <asm/db1200.h>
16326 +#else
16327 #include <asm/db1x00.h>
16328 +#endif
16329
16330 -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
16331 +#define PCMCIA_MAX_SOCK 1
16332 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
16333 +
16334 +/* VPP/VCC */
16335 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
16336 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
16337
16338 static int db1x00_pcmcia_init(struct pcmcia_init *init)
16339 {
16340 @@ -76,7 +87,7 @@
16341 db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
16342 {
16343 u32 inserted;
16344 - unsigned char vs;
16345 + u16 vs;
16346
16347 if(sock > PCMCIA_MAX_SOCK) return -1;
16348
16349 @@ -87,11 +98,11 @@
16350
16351 if (sock == 0) {
16352 vs = bcsr->status & 0x3;
16353 - inserted = !(bcsr->status & (1<<4));
16354 + inserted = BOARD_CARD_INSERTED(0);
16355 }
16356 else {
16357 vs = (bcsr->status & 0xC)>>2;
16358 - inserted = !(bcsr->status & (1<<5));
16359 + inserted = BOARD_CARD_INSERTED(1);
16360 }
16361
16362 DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n",
16363 @@ -144,16 +155,9 @@
16364 if(info->sock > PCMCIA_MAX_SOCK) return -1;
16365
16366 if(info->sock == 0)
16367 -#ifdef CONFIG_MIPS_DB1550
16368 - info->irq = AU1000_GPIO_3;
16369 + info->irq = BOARD_PC0_INT;
16370 else
16371 - info->irq = AU1000_GPIO_5;
16372 -#else
16373 - info->irq = AU1000_GPIO_2;
16374 - else
16375 - info->irq = AU1000_GPIO_5;
16376 -#endif
16377 -
16378 + info->irq = BOARD_PC1_INT;
16379 return 0;
16380 }
16381
16382 diff -Nur linux-2.4.29/drivers/pcmcia/vrc4171_card.c linux-mips/drivers/pcmcia/vrc4171_card.c
16383 --- linux-2.4.29/drivers/pcmcia/vrc4171_card.c 1970-01-01 01:00:00.000000000 +0100
16384 +++ linux-mips/drivers/pcmcia/vrc4171_card.c 2004-01-19 16:54:58.000000000 +0100
16385 @@ -0,0 +1,886 @@
16386 +/*
16387 + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
16388 + *
16389 + * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
16390 + *
16391 + * This program is free software; you can redistribute it and/or modify
16392 + * it under the terms of the GNU General Public License as published by
16393 + * the Free Software Foundation; either version 2 of the License, or
16394 + * (at your option) any later version.
16395 + *
16396 + * This program is distributed in the hope that it will be useful,
16397 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
16398 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16399 + * GNU General Public License for more details.
16400 + *
16401 + * You should have received a copy of the GNU General Public License
16402 + * along with this program; if not, write to the Free Software
16403 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16404 + */
16405 +#include <linux/init.h>
16406 +#include <linux/ioport.h>
16407 +#include <linux/irq.h>
16408 +#include <linux/module.h>
16409 +#include <linux/spinlock.h>
16410 +#include <linux/sched.h>
16411 +#include <linux/types.h>
16412 +
16413 +#include <asm/io.h>
16414 +#include <asm/vr41xx/vrc4171.h>
16415 +
16416 +#include <pcmcia/ss.h>
16417 +
16418 +#include "i82365.h"
16419 +
16420 +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
16421 +MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
16422 +MODULE_LICENSE("GPL");
16423 +
16424 +#define CARD_MAX_SLOTS 2
16425 +#define CARD_SLOTA 0
16426 +#define CARD_SLOTB 1
16427 +#define CARD_SLOTB_OFFSET 0x40
16428 +
16429 +#define CARD_MEM_START 0x10000000
16430 +#define CARD_MEM_END 0x13ffffff
16431 +#define CARD_MAX_MEM_OFFSET 0x3ffffff
16432 +#define CARD_MAX_MEM_SPEED 1000
16433 +
16434 +#define CARD_CONTROLLER_INDEX 0x03e0
16435 +#define CARD_CONTROLLER_DATA 0x03e1
16436 +#define CARD_CONTROLLER_SIZE 2
16437 + /* Power register */
16438 + #define VPP_GET_VCC 0x01
16439 + #define POWER_ENABLE 0x10
16440 + #define CARD_VOLTAGE_SENSE 0x1f
16441 + #define VCC_3VORXV_CAPABLE 0x00
16442 + #define VCC_XV_ONLY 0x01
16443 + #define VCC_3V_CAPABLE 0x02
16444 + #define VCC_5V_ONLY 0x03
16445 + #define CARD_VOLTAGE_SELECT 0x2f
16446 + #define VCC_3V 0x01
16447 + #define VCC_5V 0x00
16448 + #define VCC_XV 0x02
16449 + #define VCC_STATUS_3V 0x02
16450 + #define VCC_STATUS_5V 0x01
16451 + #define VCC_STATUS_XV 0x03
16452 + #define GLOBAL_CONTROL 0x1e
16453 + #define EXWRBK 0x04
16454 + #define IRQPM_EN 0x08
16455 + #define CLRPMIRQ 0x10
16456 +
16457 +#define IO_MAX_MAPS 2
16458 +#define MEM_MAX_MAPS 5
16459 +
16460 +enum {
16461 + SLOTB_PROBE = 0,
16462 + SLOTB_NOPROBE_IO,
16463 + SLOTB_NOPROBE_MEM,
16464 + SLOTB_NOPROBE_ALL
16465 +};
16466 +
16467 +typedef struct vrc4171_socket {
16468 + int noprobe;
16469 + void (*handler)(void *, unsigned int);
16470 + void *info;
16471 + socket_cap_t cap;
16472 + spinlock_t event_lock;
16473 + uint16_t events;
16474 + struct socket_info_t *pcmcia_socket;
16475 + struct tq_struct tq_task;
16476 + char name[24];
16477 + int csc_irq;
16478 + int io_irq;
16479 +} vrc4171_socket_t;
16480 +
16481 +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
16482 +static int vrc4171_slotb = SLOTB_IS_NONE;
16483 +static unsigned int vrc4171_irq;
16484 +static uint16_t vrc4171_irq_mask = 0xdeb8;
16485 +
16486 +extern struct socket_info_t *pcmcia_register_socket(int slot,
16487 + struct pccard_operations *vtable,
16488 + int use_bus_pm);
16489 +extern void pcmcia_unregister_socket(struct socket_info_t *s);
16490 +
16491 +static inline uint8_t exca_read_byte(int slot, uint8_t index)
16492 +{
16493 + if (slot == CARD_SLOTB)
16494 + index += CARD_SLOTB_OFFSET;
16495 +
16496 + outb(index, CARD_CONTROLLER_INDEX);
16497 + return inb(CARD_CONTROLLER_DATA);
16498 +}
16499 +
16500 +static inline uint16_t exca_read_word(int slot, uint8_t index)
16501 +{
16502 + uint16_t data;
16503 +
16504 + if (slot == CARD_SLOTB)
16505 + index += CARD_SLOTB_OFFSET;
16506 +
16507 + outb(index++, CARD_CONTROLLER_INDEX);
16508 + data = inb(CARD_CONTROLLER_DATA);
16509 +
16510 + outb(index, CARD_CONTROLLER_INDEX);
16511 + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
16512 +
16513 + return data;
16514 +}
16515 +
16516 +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
16517 +{
16518 + if (slot == CARD_SLOTB)
16519 + index += CARD_SLOTB_OFFSET;
16520 +
16521 + outb(index, CARD_CONTROLLER_INDEX);
16522 + outb(data, CARD_CONTROLLER_DATA);
16523 +
16524 + return data;
16525 +}
16526 +
16527 +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
16528 +{
16529 + if (slot == CARD_SLOTB)
16530 + index += CARD_SLOTB_OFFSET;
16531 +
16532 + outb(index++, CARD_CONTROLLER_INDEX);
16533 + outb(data, CARD_CONTROLLER_DATA);
16534 +
16535 + outb(index, CARD_CONTROLLER_INDEX);
16536 + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
16537 +
16538 + return data;
16539 +}
16540 +
16541 +static inline int search_nonuse_irq(void)
16542 +{
16543 + int i;
16544 +
16545 + for (i = 0; i < 16; i++) {
16546 + if (vrc4171_irq_mask & (1 << i)) {
16547 + vrc4171_irq_mask &= ~(1 << i);
16548 + return i;
16549 + }
16550 + }
16551 +
16552 + return -1;
16553 +}
16554 +
16555 +static int pccard_init(unsigned int slot)
16556 +{
16557 + vrc4171_socket_t *socket = &vrc4171_sockets[slot];
16558 +
16559 + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
16560 + socket->cap.irq_mask = 0;
16561 + socket->cap.pci_irq = vrc4171_irq;
16562 + socket->cap.map_size = 0x1000;
16563 + socket->events = 0;
16564 + spin_lock_init(socket->event_lock);
16565 + socket->csc_irq = search_nonuse_irq();
16566 + socket->io_irq = search_nonuse_irq();
16567 +
16568 + return 0;
16569 +}
16570 +
16571 +static int pccard_suspend(unsigned int slot)
16572 +{
16573 + return -EINVAL;
16574 +}
16575 +
16576 +static int pccard_register_callback(unsigned int slot,
16577 + void (*handler)(void *, unsigned int),
16578 + void *info)
16579 +{
16580 + vrc4171_socket_t *socket;
16581 +
16582 + if (slot >= CARD_MAX_SLOTS)
16583 + return -EINVAL;
16584 +
16585 + socket = &vrc4171_sockets[slot];
16586 +
16587 + socket->handler = handler;
16588 + socket->info = info;
16589 +
16590 + if (handler)
16591 + MOD_INC_USE_COUNT;
16592 + else
16593 + MOD_DEC_USE_COUNT;
16594 +
16595 + return 0;
16596 +}
16597 +
16598 +static int pccard_inquire_socket(unsigned int slot, socket_cap_t *cap)
16599 +{
16600 + vrc4171_socket_t *socket;
16601 +
16602 + if (slot >= CARD_MAX_SLOTS || cap == NULL)
16603 + return -EINVAL;
16604 +
16605 + socket = &vrc4171_sockets[slot];
16606 +
16607 + *cap = socket->cap;
16608 +
16609 + return 0;
16610 +}
16611 +
16612 +static int pccard_get_status(unsigned int slot, u_int *value)
16613 +{
16614 + uint8_t status, sense;
16615 + u_int val = 0;
16616 +
16617 + if (slot >= CARD_MAX_SLOTS || value == NULL)
16618 + return -EINVAL;
16619 +
16620 + status = exca_read_byte(slot, I365_STATUS);
16621 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
16622 + if (status & I365_CS_STSCHG)
16623 + val |= SS_STSCHG;
16624 + } else {
16625 + if (!(status & I365_CS_BVD1))
16626 + val |= SS_BATDEAD;
16627 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
16628 + val |= SS_BATWARN;
16629 + }
16630 + if ((status & I365_CS_DETECT) == I365_CS_DETECT)
16631 + val |= SS_DETECT;
16632 + if (status & I365_CS_WRPROT)
16633 + val |= SS_WRPROT;
16634 + if (status & I365_CS_READY)
16635 + val |= SS_READY;
16636 + if (status & I365_CS_POWERON)
16637 + val |= SS_POWERON;
16638 +
16639 + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
16640 + switch (sense) {
16641 + case VCC_3VORXV_CAPABLE:
16642 + val |= SS_3VCARD | SS_XVCARD;
16643 + break;
16644 + case VCC_XV_ONLY:
16645 + val |= SS_XVCARD;
16646 + break;
16647 + case VCC_3V_CAPABLE:
16648 + val |= SS_3VCARD;
16649 + break;
16650 + default:
16651 + /* 5V only */
16652 + break;
16653 + }
16654 +
16655 + *value = val;
16656 +
16657 + return 0;
16658 +}
16659 +
16660 +static inline u_char get_Vcc_value(uint8_t voltage)
16661 +{
16662 + switch (voltage) {
16663 + case VCC_STATUS_3V:
16664 + return 33;
16665 + case VCC_STATUS_5V:
16666 + return 50;
16667 + default:
16668 + break;
16669 + }
16670 +
16671 + return 0;
16672 +}
16673 +
16674 +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc)
16675 +{
16676 + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02)
16677 + return Vcc;
16678 +
16679 + return 0;
16680 +}
16681 +
16682 +static int pccard_get_socket(unsigned int slot, socket_state_t *state)
16683 +{
16684 + vrc4171_socket_t *socket;
16685 + uint8_t power, voltage, control, cscint;
16686 +
16687 + if (slot >= CARD_MAX_SLOTS || state == NULL)
16688 + return -EINVAL;
16689 +
16690 + socket = &vrc4171_sockets[slot];
16691 +
16692 + power = exca_read_byte(slot, I365_POWER);
16693 + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT);
16694 +
16695 + state->Vcc = get_Vcc_value(voltage);
16696 + state->Vpp = get_Vpp_value(power, state->Vcc);
16697 +
16698 + state->flags = 0;
16699 + if (power & POWER_ENABLE)
16700 + state->flags |= SS_PWR_AUTO;
16701 + if (power & I365_PWR_OUT)
16702 + state->flags |= SS_OUTPUT_ENA;
16703 +
16704 + control = exca_read_byte(slot, I365_INTCTL);
16705 + if (control & I365_PC_IOCARD)
16706 + state->flags |= SS_IOCARD;
16707 + if (!(control & I365_PC_RESET))
16708 + state->flags |= SS_RESET;
16709 +
16710 + cscint = exca_read_byte(slot, I365_CSCINT);
16711 + state->csc_mask = 0;
16712 + if (state->flags & SS_IOCARD) {
16713 + if (cscint & I365_CSC_STSCHG)
16714 + state->flags |= SS_STSCHG;
16715 + } else {
16716 + if (cscint & I365_CSC_BVD1)
16717 + state->csc_mask |= SS_BATDEAD;
16718 + if (cscint & I365_CSC_BVD2)
16719 + state->csc_mask |= SS_BATWARN;
16720 + }
16721 + if (cscint & I365_CSC_READY)
16722 + state->csc_mask |= SS_READY;
16723 + if (cscint & I365_CSC_DETECT)
16724 + state->csc_mask |= SS_DETECT;
16725 +
16726 + return 0;
16727 +}
16728 +
16729 +static inline uint8_t set_Vcc_value(u_char Vcc)
16730 +{
16731 + switch (Vcc) {
16732 + case 33:
16733 + return VCC_3V;
16734 + case 50:
16735 + return VCC_5V;
16736 + }
16737 +
16738 + /* Small voltage is chosen for safety. */
16739 + return VCC_3V;
16740 +}
16741 +
16742 +static int pccard_set_socket(unsigned int slot, socket_state_t *state)
16743 +{
16744 + vrc4171_socket_t *socket;
16745 + uint8_t voltage, power, control, cscint;
16746 +
16747 + if (slot >= CARD_MAX_SLOTS ||
16748 + (state->Vpp != state->Vcc && state->Vpp != 0) ||
16749 + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
16750 + return -EINVAL;
16751 +
16752 + socket = &vrc4171_sockets[slot];
16753 +
16754 + spin_lock_irq(&socket->event_lock);
16755 +
16756 + voltage = set_Vcc_value(state->Vcc);
16757 + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
16758 +
16759 + power = POWER_ENABLE;
16760 + if (state->Vpp == state->Vcc)
16761 + power |= VPP_GET_VCC;
16762 + if (state->flags & SS_OUTPUT_ENA)
16763 + power |= I365_PWR_OUT;
16764 + exca_write_byte(slot, I365_POWER, power);
16765 +
16766 + control = 0;
16767 + if (state->io_irq != 0)
16768 + control |= socket->io_irq;
16769 + if (state->flags & SS_IOCARD)
16770 + control |= I365_PC_IOCARD;
16771 + if (state->flags & SS_RESET)
16772 + control &= ~I365_PC_RESET;
16773 + else
16774 + control |= I365_PC_RESET;
16775 + exca_write_byte(slot, I365_INTCTL, control);
16776 +
16777 + cscint = 0;
16778 + exca_write_byte(slot, I365_CSCINT, cscint);
16779 + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
16780 + if (state->csc_mask != 0)
16781 + cscint |= socket->csc_irq << 8;
16782 + if (state->flags & SS_IOCARD) {
16783 + if (state->csc_mask & SS_STSCHG)
16784 + cscint |= I365_CSC_STSCHG;
16785 + } else {
16786 + if (state->csc_mask & SS_BATDEAD)
16787 + cscint |= I365_CSC_BVD1;
16788 + if (state->csc_mask & SS_BATWARN)
16789 + cscint |= I365_CSC_BVD2;
16790 + }
16791 + if (state->csc_mask & SS_READY)
16792 + cscint |= I365_CSC_READY;
16793 + if (state->csc_mask & SS_DETECT)
16794 + cscint |= I365_CSC_DETECT;
16795 + exca_write_byte(slot, I365_CSCINT, cscint);
16796 +
16797 + spin_unlock_irq(&socket->event_lock);
16798 +
16799 + return 0;
16800 +}
16801 +
16802 +static int pccard_get_io_map(unsigned int slot, struct pccard_io_map *io)
16803 +{
16804 + vrc4171_socket_t *socket;
16805 + uint8_t ioctl, addrwin;
16806 + u_char map;
16807 +
16808 + if (slot >= CARD_MAX_SLOTS || io == NULL ||
16809 + io->map >= IO_MAX_MAPS)
16810 + return -EINVAL;
16811 +
16812 + socket = &vrc4171_sockets[slot];
16813 + map = io->map;
16814 +
16815 + io->start = exca_read_word(slot, I365_IO(map)+I365_W_START);
16816 + io->stop = exca_read_word(slot, I365_IO(map)+I365_W_STOP);
16817 +
16818 + ioctl = exca_read_byte(slot, I365_IOCTL);
16819 + if (io->flags & I365_IOCTL_WAIT(map))
16820 + io->speed = 1;
16821 + else
16822 + io->speed = 0;
16823 +
16824 + io->flags = 0;
16825 + if (ioctl & I365_IOCTL_16BIT(map))
16826 + io->flags |= MAP_16BIT;
16827 + if (ioctl & I365_IOCTL_IOCS16(map))
16828 + io->flags |= MAP_AUTOSZ;
16829 + if (ioctl & I365_IOCTL_0WS(map))
16830 + io->flags |= MAP_0WS;
16831 +
16832 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
16833 + if (addrwin & I365_ENA_IO(map))
16834 + io->flags |= MAP_ACTIVE;
16835 +
16836 + return 0;
16837 +}
16838 +
16839 +static int pccard_set_io_map(unsigned int slot, struct pccard_io_map *io)
16840 +{
16841 + vrc4171_socket_t *socket;
16842 + uint8_t ioctl, addrwin;
16843 + u_char map;
16844 +
16845 + if (slot >= CARD_MAX_SLOTS ||
16846 + io == NULL || io->map >= IO_MAX_MAPS ||
16847 + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
16848 + return -EINVAL;
16849 +
16850 + socket = &vrc4171_sockets[slot];
16851 + map = io->map;
16852 +
16853 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
16854 + if (addrwin & I365_ENA_IO(map)) {
16855 + addrwin &= ~I365_ENA_IO(map);
16856 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
16857 + }
16858 +
16859 + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
16860 + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
16861 +
16862 + ioctl = 0;
16863 + if (io->speed > 0)
16864 + ioctl |= I365_IOCTL_WAIT(map);
16865 + if (io->flags & MAP_16BIT)
16866 + ioctl |= I365_IOCTL_16BIT(map);
16867 + if (io->flags & MAP_AUTOSZ)
16868 + ioctl |= I365_IOCTL_IOCS16(map);
16869 + if (io->flags & MAP_0WS)
16870 + ioctl |= I365_IOCTL_0WS(map);
16871 + exca_write_byte(slot, I365_IOCTL, ioctl);
16872 +
16873 + if (io->flags & MAP_ACTIVE) {
16874 + addrwin |= I365_ENA_IO(map);
16875 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
16876 + }
16877 +
16878 + return 0;
16879 +}
16880 +
16881 +static int pccard_get_mem_map(unsigned int slot, struct pccard_mem_map *mem)
16882 +{
16883 + vrc4171_socket_t *socket;
16884 + uint8_t addrwin;
16885 + u_long start, stop;
16886 + u_int offset;
16887 + u_char map;
16888 +
16889 + if (slot >= CARD_MAX_SLOTS || mem == NULL || mem->map >= MEM_MAX_MAPS)
16890 + return -EINVAL;
16891 +
16892 + socket = &vrc4171_sockets[slot];
16893 + map = mem->map;
16894 +
16895 + mem->flags = 0;
16896 + mem->speed = 0;
16897 +
16898 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
16899 + if (addrwin & I365_ENA_MEM(map))
16900 + mem->flags |= MAP_ACTIVE;
16901 +
16902 + start = exca_read_word(slot, I365_MEM(map)+I365_W_START);
16903 + if (start & I365_MEM_16BIT)
16904 + mem->flags |= MAP_16BIT;
16905 + mem->sys_start = (start & 0x3fffUL) << 12;
16906 +
16907 + stop = exca_read_word(slot, I365_MEM(map)+I365_W_STOP);
16908 + if (start & I365_MEM_WS0)
16909 + mem->speed += 1;
16910 + if (start & I365_MEM_WS1)
16911 + mem->speed += 2;
16912 + mem->sys_stop = ((stop & 0x3fffUL) << 12) + 0xfffUL;
16913 +
16914 + offset = exca_read_word(slot, I365_MEM(map)+I365_W_OFF);
16915 + if (offset & I365_MEM_REG)
16916 + mem->flags |= MAP_ATTRIB;
16917 + if (offset & I365_MEM_WRPROT)
16918 + mem->flags |= MAP_WRPROT;
16919 + mem->card_start = (offset & 0x3fffUL) << 12;
16920 +
16921 + mem->sys_start += CARD_MEM_START;
16922 + mem->sys_stop += CARD_MEM_START;
16923 +
16924 + return 0;
16925 +}
16926 +
16927 +static int pccard_set_mem_map(unsigned int slot, struct pccard_mem_map *mem)
16928 +{
16929 + vrc4171_socket_t *socket;
16930 + uint16_t start, stop, offset;
16931 + uint8_t addrwin;
16932 + u_char map;
16933 +
16934 + if (slot >= CARD_MAX_SLOTS ||
16935 + mem == NULL || mem->map >= MEM_MAX_MAPS ||
16936 + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
16937 + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
16938 + mem->sys_start > mem->sys_stop ||
16939 + mem->card_start > CARD_MAX_MEM_OFFSET ||
16940 + mem->speed > CARD_MAX_MEM_SPEED)
16941 + return -EINVAL;
16942 +
16943 + socket = &vrc4171_sockets[slot];
16944 + map = mem->map;
16945 +
16946 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
16947 + if (addrwin & I365_ENA_MEM(map)) {
16948 + addrwin &= ~I365_ENA_MEM(map);
16949 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
16950 + }
16951 +
16952 + start = (mem->sys_start >> 12) & 0x3fff;
16953 + if (mem->flags & MAP_16BIT)
16954 + start |= I365_MEM_16BIT;
16955 + exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
16956 +
16957 + stop = (mem->sys_stop >> 12) & 0x3fff;
16958 + switch (mem->speed) {
16959 + case 0:
16960 + break;
16961 + case 1:
16962 + stop |= I365_MEM_WS0;
16963 + break;
16964 + case 2:
16965 + stop |= I365_MEM_WS1;
16966 + break;
16967 + default:
16968 + stop |= I365_MEM_WS0 | I365_MEM_WS1;
16969 + break;
16970 + }
16971 + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
16972 +
16973 + offset = (mem->card_start >> 12) & 0x3fff;
16974 + if (mem->flags & MAP_ATTRIB)
16975 + offset |= I365_MEM_REG;
16976 + if (mem->flags & MAP_WRPROT)
16977 + offset |= I365_MEM_WRPROT;
16978 + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
16979 +
16980 + if (mem->flags & MAP_ACTIVE) {
16981 + addrwin |= I365_ENA_MEM(map);
16982 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
16983 + }
16984 +
16985 + return 0;
16986 +}
16987 +
16988 +static void pccard_proc_setup(unsigned int slot, struct proc_dir_entry *base)
16989 +{
16990 +}
16991 +
16992 +static struct pccard_operations vrc4171_pccard_operations = {
16993 + .init = pccard_init,
16994 + .suspend = pccard_suspend,
16995 + .register_callback = pccard_register_callback,
16996 + .inquire_socket = pccard_inquire_socket,
16997 + .get_status = pccard_get_status,
16998 + .get_socket = pccard_get_socket,
16999 + .set_socket = pccard_set_socket,
17000 + .get_io_map = pccard_get_io_map,
17001 + .set_io_map = pccard_set_io_map,
17002 + .get_mem_map = pccard_get_mem_map,
17003 + .set_mem_map = pccard_set_mem_map,
17004 + .proc_setup = pccard_proc_setup,
17005 +};
17006 +
17007 +static void pccard_bh(void *data)
17008 +{
17009 + vrc4171_socket_t *socket = (vrc4171_socket_t *)data;
17010 + uint16_t events;
17011 +
17012 + spin_lock_irq(&socket->event_lock);
17013 + events = socket->events;
17014 + socket->events = 0;
17015 + spin_unlock_irq(&socket->event_lock);
17016 +
17017 + if (socket->handler)
17018 + socket->handler(socket->info, events);
17019 +}
17020 +
17021 +static inline uint16_t get_events(int slot)
17022 +{
17023 + uint16_t events = 0;
17024 + uint8_t status, csc;
17025 +
17026 + status = exca_read_byte(slot, I365_STATUS);
17027 + csc = exca_read_byte(slot, I365_CSC);
17028 +
17029 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
17030 + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
17031 + events |= SS_STSCHG;
17032 + } else {
17033 + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
17034 + if (!(status & I365_CS_BVD1))
17035 + events |= SS_BATDEAD;
17036 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
17037 + events |= SS_BATWARN;
17038 + }
17039 + }
17040 + if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
17041 + events |= SS_READY;
17042 + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
17043 + events |= SS_DETECT;
17044 +
17045 + return events;
17046 +}
17047 +
17048 +static void pccard_status_change(int slot, vrc4171_socket_t *socket)
17049 +{
17050 + uint16_t events;
17051 +
17052 + socket->tq_task.routine = pccard_bh;
17053 + socket->tq_task.data = socket;
17054 +
17055 + events = get_events(slot);
17056 + if (events) {
17057 + spin_lock(&socket->event_lock);
17058 + socket->events |= events;
17059 + spin_unlock(&socket->event_lock);
17060 + schedule_task(&socket->tq_task);
17061 + }
17062 +}
17063 +
17064 +static void pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
17065 +{
17066 + vrc4171_socket_t *socket;
17067 + uint16_t status;
17068 +
17069 + status = vrc4171_get_irq_status();
17070 + if (status & IRQ_A) {
17071 + socket = &vrc4171_sockets[CARD_SLOTA];
17072 + if (socket->noprobe == SLOTB_PROBE) {
17073 + if (status & (1 << socket->csc_irq))
17074 + pccard_status_change(CARD_SLOTA, socket);
17075 + }
17076 + }
17077 +
17078 + if (status & IRQ_B) {
17079 + socket = &vrc4171_sockets[CARD_SLOTB];
17080 + if (socket->noprobe == SLOTB_PROBE) {
17081 + if (status & (1 << socket->csc_irq))
17082 + pccard_status_change(CARD_SLOTB, socket);
17083 + }
17084 + }
17085 +}
17086 +
17087 +static inline void reserve_using_irq(int slot)
17088 +{
17089 + unsigned int irq;
17090 +
17091 + irq = exca_read_byte(slot, I365_INTCTL);
17092 + irq &= 0x0f;
17093 + vrc4171_irq_mask &= ~(1 << irq);
17094 +
17095 + irq = exca_read_byte(slot, I365_CSCINT);
17096 + irq = (irq & 0xf0) >> 4;
17097 + vrc4171_irq_mask &= ~(1 << irq);
17098 +}
17099 +
17100 +static int __devinit vrc4171_add_socket(int slot)
17101 +{
17102 + vrc4171_socket_t *socket;
17103 +
17104 + if (slot >= CARD_MAX_SLOTS)
17105 + return -EINVAL;
17106 +
17107 + socket = &vrc4171_sockets[slot];
17108 + if (socket->noprobe != SLOTB_PROBE) {
17109 + uint8_t addrwin;
17110 +
17111 + switch (socket->noprobe) {
17112 + case SLOTB_NOPROBE_MEM:
17113 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17114 + addrwin &= 0x1f;
17115 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17116 + break;
17117 + case SLOTB_NOPROBE_IO:
17118 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
17119 + addrwin &= 0xc0;
17120 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
17121 + break;
17122 + default:
17123 + break;
17124 + }
17125 +
17126 + reserve_using_irq(slot);
17127 +
17128 + return 0;
17129 + }
17130 +
17131 + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
17132 +
17133 + socket->pcmcia_socket = pcmcia_register_socket(slot, &vrc4171_pccard_operations, 1);
17134 + if (socket->pcmcia_socket == NULL)
17135 + return -ENOMEM;
17136 +
17137 + exca_write_byte(slot, I365_ADDRWIN, 0);
17138 +
17139 + exca_write_byte(slot, GLOBAL_CONTROL, 0);
17140 +
17141 + return 0;
17142 +}
17143 +
17144 +static void vrc4171_remove_socket(int slot)
17145 +{
17146 + vrc4171_socket_t *socket;
17147 +
17148 + if (slot >= CARD_MAX_SLOTS)
17149 + return;
17150 +
17151 + socket = &vrc4171_sockets[slot];
17152 +
17153 + if (socket->pcmcia_socket != NULL) {
17154 + pcmcia_unregister_socket(socket->pcmcia_socket);
17155 + socket->pcmcia_socket = NULL;
17156 + }
17157 +}
17158 +
17159 +static int __devinit vrc4171_card_setup(char *options)
17160 +{
17161 + if (options == NULL || *options == '\0')
17162 + return 0;
17163 +
17164 + if (strncmp(options, "irq:", 4) == 0) {
17165 + int irq;
17166 + options += 4;
17167 + irq = simple_strtoul(options, &options, 0);
17168 + if (irq >= 0 && irq < NR_IRQS)
17169 + vrc4171_irq = irq;
17170 +
17171 + if (*options != ',')
17172 + return 0;
17173 + options++;
17174 + }
17175 +
17176 + if (strncmp(options, "slota:", 6) == 0) {
17177 + options += 6;
17178 + if (*options != '\0') {
17179 + if (strncmp(options, "noprobe", 7) == 0) {
17180 + vrc4171_sockets[CARD_SLOTA].noprobe = 1;
17181 + options += 7;
17182 + }
17183 +
17184 + if (*options != ',')
17185 + return 0;
17186 + options++;
17187 + } else
17188 + return 0;
17189 +
17190 + }
17191 +
17192 + if (strncmp(options, "slotb:", 6) == 0) {
17193 + options += 6;
17194 + if (*options != '\0') {
17195 + if (strncmp(options, "pccard", 6) == 0) {
17196 + vrc4171_slotb = SLOTB_IS_PCCARD;
17197 + options += 6;
17198 + } else if (strncmp(options, "cf", 2) == 0) {
17199 + vrc4171_slotb = SLOTB_IS_CF;
17200 + options += 2;
17201 + } else if (strncmp(options, "flashrom", 8) == 0) {
17202 + vrc4171_slotb = SLOTB_IS_FLASHROM;
17203 + options += 8;
17204 + } else if (strncmp(options, "none", 4) == 0) {
17205 + vrc4171_slotb = SLOTB_IS_NONE;
17206 + options += 4;
17207 + }
17208 +
17209 + if (*options != ',')
17210 + return 0;
17211 + options++;
17212 +
17213 + if ( strncmp(options, "memnoprobe", 10) == 0)
17214 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_MEM;
17215 + if ( strncmp(options, "ionoprobe", 9) == 0)
17216 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_IO;
17217 + if ( strncmp(options, "noprobe", 7) == 0)
17218 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_ALL;
17219 + }
17220 + }
17221 +
17222 + return 0;
17223 +}
17224 +
17225 +__setup("vrc4171_card=", vrc4171_card_setup);
17226 +
17227 +static int __devinit vrc4171_card_init(void)
17228 +{
17229 + int retval, slot;
17230 +
17231 + vrc4171_set_multifunction_pin(vrc4171_slotb);
17232 +
17233 + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
17234 + "NEC VRC4171 Card Controller") == NULL)
17235 + return -EBUSY;
17236 +
17237 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
17238 + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
17239 + break;
17240 +
17241 + retval = vrc4171_add_socket(slot);
17242 + if (retval != 0)
17243 + return retval;
17244 + }
17245 +
17246 + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
17247 + "NEC VRC4171 Card Controller", vrc4171_sockets);
17248 + if (retval < 0) {
17249 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
17250 + vrc4171_remove_socket(slot);
17251 +
17252 + return retval;
17253 + }
17254 +
17255 + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
17256 +
17257 + return 0;
17258 +}
17259 +
17260 +static void __devexit vrc4171_card_exit(void)
17261 +{
17262 + int slot;
17263 +
17264 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
17265 + vrc4171_remove_socket(slot);
17266 +
17267 + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
17268 +}
17269 +
17270 +module_init(vrc4171_card_init);
17271 +module_exit(vrc4171_card_exit);
17272 diff -Nur linux-2.4.29/drivers/scsi/NCR53C9x.h linux-mips/drivers/scsi/NCR53C9x.h
17273 --- linux-2.4.29/drivers/scsi/NCR53C9x.h 2004-02-18 14:36:31.000000000 +0100
17274 +++ linux-mips/drivers/scsi/NCR53C9x.h 2003-12-15 19:19:51.000000000 +0100
17275 @@ -144,12 +144,7 @@
17276
17277 #ifndef MULTIPLE_PAD_SIZES
17278
17279 -#ifdef CONFIG_CPU_HAS_WB
17280 -#include <asm/wbflush.h>
17281 -#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
17282 -#else
17283 -#define esp_write(__reg, __val) ((__reg) = (__val))
17284 -#endif
17285 +#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
17286 #define esp_read(__reg) (__reg)
17287
17288 struct ESP_regs {
17289 diff -Nur linux-2.4.29/drivers/sound/au1550_i2s.c linux-mips/drivers/sound/au1550_i2s.c
17290 --- linux-2.4.29/drivers/sound/au1550_i2s.c 2005-01-19 15:10:04.000000000 +0100
17291 +++ linux-mips/drivers/sound/au1550_i2s.c 2005-02-12 04:07:11.000000000 +0100
17292 @@ -41,6 +41,7 @@
17293 * 675 Mass Ave, Cambridge, MA 02139, USA.
17294 *
17295 */
17296 +
17297 #include <linux/version.h>
17298 #include <linux/module.h>
17299 #include <linux/string.h>
17300 @@ -62,7 +63,45 @@
17301 #include <asm/uaccess.h>
17302 #include <asm/hardirq.h>
17303 #include <asm/au1000.h>
17304 +
17305 +#if defined(CONFIG_SOC_AU1550)
17306 #include <asm/pb1550.h>
17307 +#endif
17308 +
17309 +#if defined(CONFIG_MIPS_PB1200)
17310 +#define WM8731
17311 +#define WM_MODE_USB
17312 +#include <asm/pb1200.h>
17313 +#endif
17314 +
17315 +#if defined(CONFIG_MIPS_FICMMP)
17316 +#define WM8721
17317 +#define WM_MODE_NORMAL
17318 +#include <asm/ficmmp.h>
17319 +#endif
17320 +
17321 +
17322 +#define WM_VOLUME_MIN 47
17323 +#define WM_VOLUME_SCALE 80
17324 +
17325 +#if defined(WM8731)
17326 + /* OSS interface to the wm i2s.. */
17327 + #define CODEC_NAME "Wolfson WM8731 I2S"
17328 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM | SOUND_MASK_LINE)
17329 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK | SOUND_MASK_MIC)
17330 + #define WM_I2S_RECORD_MASK (SOUND_MASK_MIC | SOUND_MASK_LINE1 | SOUND_MASK_LINE)
17331 +#elif defined(WM8721)
17332 + #define CODEC_NAME "Wolfson WM8721 I2S"
17333 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM)
17334 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK)
17335 + #define WM_I2S_RECORD_MASK (0)
17336 +#endif
17337 +
17338 +
17339 +#define supported_mixer(FOO) ((FOO >= 0) && \
17340 + (FOO < SOUND_MIXER_NRDEVICES) && \
17341 + WM_I2S_SUPPORTED_MASK & (1<<FOO) )
17342 +
17343 #include <asm/au1xxx_psc.h>
17344 #include <asm/au1xxx_dbdma.h>
17345
17346 @@ -98,13 +137,51 @@
17347 * 0 = no VRA, 1 = use VRA if codec supports it
17348 * The framework is here, but we currently force no VRA.
17349 */
17350 +#if defined(CONFIG_MIPS_PB1200) | defined(CONFIG_MIPS_PB1550)
17351 static int vra = 0;
17352 +#elif defined(CONFIG_MIPS_FICMMP)
17353 +static int vra = 1;
17354 +#endif
17355 +
17356 +#define WM_REG_L_HEADPHONE_OUT 0x02
17357 +#define WM_REG_R_HEADPHONE_OUT 0x03
17358 +#define WM_REG_ANALOGUE_AUDIO_PATH_CTRL 0x04
17359 +#define WM_REG_DIGITAL_AUDIO_PATH_CTRL 0x05
17360 +#define WM_REG_POWER_DOWN_CTRL 0x06
17361 +#define WM_REG_DIGITAL_AUDIO_IF 0x07
17362 +#define WM_REG_SAMPLING_CONTROL 0x08
17363 +#define WM_REG_ACTIVE_CTRL 0x09
17364 +#define WM_REG_RESET 0x0F
17365 +#define WM_SC_SR_96000 (0x7<<2)
17366 +#define WM_SC_SR_88200 (0xF<<2)
17367 +#define WM_SC_SR_48000 (0x0<<2)
17368 +#define WM_SC_SR_44100 (0x8<<2)
17369 +#define WM_SC_SR_32000 (0x6<<2)
17370 +#define WM_SC_SR_8018 (0x9<<2)
17371 +#define WM_SC_SR_8000 (0x1<<2)
17372 +#define WM_SC_MODE_USB 1
17373 +#define WM_SC_MODE_NORMAL 0
17374 +#define WM_SC_BOSR_250FS (0<<1)
17375 +#define WM_SC_BOSR_272FS (1<<1)
17376 +#define WM_SC_BOSR_256FS (0<<1)
17377 +#define WM_SC_BOSR_128FS (0<<1)
17378 +#define WM_SC_BOSR_384FS (1<<1)
17379 +#define WM_SC_BOSR_192FS (1<<1)
17380 +
17381 +#define WS_64FS 31
17382 +#define WS_96FS 47
17383 +#define WS_128FS 63
17384 +#define WS_192FS 95
17385 +
17386 +#define MIN_Q_COUNT 2
17387 +
17388 MODULE_PARM(vra, "i");
17389 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
17390
17391 static struct au1550_state {
17392 /* soundcore stuff */
17393 int dev_audio;
17394 + int dev_mixer;
17395
17396 spinlock_t lock;
17397 struct semaphore open_sem;
17398 @@ -114,6 +191,11 @@
17399 int no_vra;
17400 volatile psc_i2s_t *psc_addr;
17401
17402 + int level_line;
17403 + int level_mic;
17404 + int level_left;
17405 + int level_right;
17406 +
17407 struct dmabuf {
17408 u32 dmanr;
17409 unsigned sample_rate;
17410 @@ -195,60 +277,224 @@
17411 }
17412 }
17413
17414 -/* Just a place holder. The Wolfson codec is a write only device,
17415 - * so we would have to keep a local copy of the data.
17416 - */
17417 -#if 0
17418 -static u8
17419 -rdcodec(u8 addr)
17420 -{
17421 - return 0 /* data */;
17422 -}
17423 -#endif
17424 -
17425 -
17426 static void
17427 -wrcodec(u8 ctlreg, u8 val)
17428 +wrcodec(u8 ctlreg, u16 val)
17429 {
17430 int rcnt;
17431 extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val);
17432 -
17433 /* The codec is a write only device, with a 16-bit control/data
17434 * word. Although it is written as two bytes on the I2C, the
17435 * format is actually 7 bits of register and 9 bits of data.
17436 * The ls bit of the first byte is the ms bit of the data.
17437 */
17438 rcnt = 0;
17439 - while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1)
17440 - && (rcnt < 50)) {
17441 + while ((pb1550_wm_codec_write((0x36 >> 1),
17442 + (ctlreg << 1) | ((val >> 8) & 0x01),
17443 + (u8) (val & 0x00FF)) != 1) &&
17444 + (rcnt < 50)) {
17445 rcnt++;
17446 -#if 0
17447 - printk("Codec write retry %02x %02x\n", ctlreg, val);
17448 -#endif
17449 }
17450 +
17451 + au1550_delay(10);
17452 +}
17453 +
17454 +static int
17455 +au1550_open_mixdev(struct inode *inode, struct file *file)
17456 +{
17457 + file->private_data = &au1550_state;
17458 + return 0;
17459 +}
17460 +
17461 +static int
17462 +au1550_release_mixdev(struct inode *inode, struct file *file)
17463 +{
17464 + return 0;
17465 +}
17466 +
17467 +static int wm_i2s_read_mixer(struct au1550_state *s, int oss_channel)
17468 +{
17469 + int ret = 0;
17470 +
17471 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
17472 + /* nice stereo mixers .. */
17473 +
17474 + ret = s->level_left | (s->level_right << 8);
17475 + } else if (oss_channel == SOUND_MIXER_MIC) {
17476 + ret = 0;
17477 + /* TODO: Implement read mixer for input/output codecs */
17478 + }
17479 +
17480 + return ret;
17481 }
17482
17483 +static void wm_i2s_write_mixer(struct au1550_state *s, int oss_channel, unsigned int left, unsigned int right)
17484 +{
17485 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
17486 + /* stereo mixers */
17487 + s->level_left = left;
17488 + s->level_right = right;
17489 +
17490 + right = (right * WM_VOLUME_SCALE) / 100;
17491 + left = (left * WM_VOLUME_SCALE) / 100;
17492 + if (right > WM_VOLUME_SCALE)
17493 + right = WM_VOLUME_SCALE;
17494 + if (left > WM_VOLUME_SCALE)
17495 + left = WM_VOLUME_SCALE;
17496 +
17497 + right += WM_VOLUME_MIN;
17498 + left += WM_VOLUME_MIN;
17499 +
17500 + wrcodec(WM_REG_L_HEADPHONE_OUT, left);
17501 + wrcodec(WM_REG_R_HEADPHONE_OUT, right);
17502 +
17503 + }else if (oss_channel == SOUND_MIXER_MIC) {
17504 + /* TODO: implement write mixer for input/output codecs */
17505 + }
17506 +}
17507 +
17508 +/* a thin wrapper for write_mixer */
17509 +static void wm_i2s_set_mixer(struct au1550_state *s, unsigned int oss_mixer, unsigned int val )
17510 +{
17511 + unsigned int left,right;
17512 +
17513 + /* cleanse input a little */
17514 + right = ((val >> 8) & 0xff) ;
17515 + left = (val & 0xff) ;
17516 +
17517 + if (right > 100) right = 100;
17518 + if (left > 100) left = 100;
17519 +
17520 + wm_i2s_write_mixer(s, oss_mixer, left, right);
17521 +}
17522 +
17523 +static int
17524 +au1550_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
17525 +{
17526 + struct au1550_state *s = (struct au1550_state *)file->private_data;
17527 +
17528 + int i, val = 0;
17529 +
17530 + if (cmd == SOUND_MIXER_INFO) {
17531 + mixer_info info;
17532 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
17533 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
17534 + info.modify_counter = 0;
17535 + if (copy_to_user((void *)arg, &info, sizeof(info)))
17536 + return -EFAULT;
17537 + return 0;
17538 + }
17539 + if (cmd == SOUND_OLD_MIXER_INFO) {
17540 + _old_mixer_info info;
17541 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
17542 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
17543 + if (copy_to_user((void *)arg, &info, sizeof(info)))
17544 + return -EFAULT;
17545 + return 0;
17546 + }
17547 +
17548 + if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
17549 + return -EINVAL;
17550 +
17551 + if (cmd == OSS_GETVERSION)
17552 + return put_user(SOUND_VERSION, (int *)arg);
17553 +
17554 + if (_SIOC_DIR(cmd) == _SIOC_READ) {
17555 + switch (_IOC_NR(cmd)) {
17556 + case SOUND_MIXER_RECSRC: /* give them the current record src */
17557 + val = 0;
17558 + /*
17559 + if (!codec->recmask_io) {
17560 + val = 0;
17561 + } else {
17562 + val = codec->recmask_io(codec, 1, 0);
17563 + }*/
17564 + break;
17565 +
17566 + case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
17567 + val = WM_I2S_SUPPORTED_MASK;
17568 + break;
17569 +
17570 + case SOUND_MIXER_RECMASK:
17571 + /* Arg contains a bit for each supported recording
17572 + * source */
17573 + val = WM_I2S_RECORD_MASK;
17574 + break;
17575 +
17576 + case SOUND_MIXER_STEREODEVS:
17577 + /* Mixer channels supporting stereo */
17578 + val = WM_I2S_STEREO_MASK;
17579 + break;
17580 +
17581 + case SOUND_MIXER_CAPS:
17582 + val = SOUND_CAP_EXCL_INPUT;
17583 + break;
17584 +
17585 + default: /* read a specific mixer */
17586 + i = _IOC_NR(cmd);
17587 +
17588 + if (!supported_mixer(i))
17589 + return -EINVAL;
17590 +
17591 + val = wm_i2s_read_mixer(s, i);
17592 + break;
17593 + }
17594 + return put_user(val, (int *)arg);
17595 + }
17596 +
17597 + if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
17598 + if (get_user(val, (int *)arg))
17599 + return -EFAULT;
17600 +
17601 + switch (_IOC_NR(cmd)) {
17602 + case SOUND_MIXER_RECSRC:
17603 + /* Arg contains a bit for each recording source */
17604 + if (!WM_I2S_RECORD_MASK)
17605 + return -EINVAL;
17606 + if (!val)
17607 + return 0;
17608 + if (!(val &= WM_I2S_RECORD_MASK))
17609 + return -EINVAL;
17610 +
17611 + return 0;
17612 + default: /* write a specific mixer */
17613 + i = _IOC_NR(cmd);
17614 +
17615 + if (!supported_mixer(i))
17616 + return -EINVAL;
17617 +
17618 + wm_i2s_set_mixer(s, i, val);
17619 +
17620 + return 0;
17621 + }
17622 +}
17623 + return -EINVAL;
17624 +}
17625 +
17626 +static loff_t
17627 +au1550_llseek(struct file *file, loff_t offset, int origin)
17628 +{
17629 + return -ESPIPE;
17630 +}
17631 +
17632 +static /*const */ struct file_operations au1550_mixer_fops = {
17633 + owner:THIS_MODULE,
17634 + llseek:au1550_llseek,
17635 + ioctl:au1550_ioctl_mixdev,
17636 + open:au1550_open_mixdev,
17637 + release:au1550_release_mixdev,
17638 +};
17639 +
17640 void
17641 -codec_init(void)
17642 +codec_init(struct au1550_state *s)
17643 {
17644 - wrcodec(0x1e, 0x00); /* Reset */
17645 - au1550_delay(200);
17646 - wrcodec(0x0c, 0x00); /* Power up everything */
17647 - au1550_delay(10);
17648 - wrcodec(0x12, 0x00); /* Deactivate codec */
17649 - au1550_delay(10);
17650 - wrcodec(0x08, 0x10); /* Select DAC outputs to line out */
17651 - au1550_delay(10);
17652 - wrcodec(0x0a, 0x00); /* Disable output mute */
17653 - au1550_delay(10);
17654 - wrcodec(0x05, 0x70); /* lower output volume on headphone */
17655 - au1550_delay(10);
17656 - wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */
17657 - au1550_delay(10);
17658 - wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */
17659 - au1550_delay(10);
17660 - wrcodec(0x12, 0x01); /* Activate codec */
17661 - au1550_delay(10);
17662 + wrcodec(WM_REG_RESET, 0x00); /* Reset */
17663 + wrcodec(WM_REG_POWER_DOWN_CTRL, 0x00); /* Power up everything */
17664 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00); /* Deactivate codec */
17665 + wrcodec(WM_REG_ANALOGUE_AUDIO_PATH_CTRL, 0x10); /* Select DAC outputs to line out */
17666 + wrcodec(WM_REG_DIGITAL_AUDIO_PATH_CTRL, 0x00); /* Disable output mute */
17667 + wm_i2s_write_mixer(s, SOUND_MIXER_PCM, 74, 74);
17668 + wrcodec(WM_REG_DIGITAL_AUDIO_IF, 0x02); /* Set slave, 16-bit, I2S modes */
17669 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01); /* Activate codec */
17670 }
17671
17672 /* stop the ADC before calling */
17673 @@ -256,27 +502,16 @@
17674 set_adc_rate(struct au1550_state *s, unsigned rate)
17675 {
17676 struct dmabuf *adc = &s->dma_adc;
17677 - struct dmabuf *dac = &s->dma_dac;
17678
17679 - if (s->no_vra) {
17680 - /* calc SRC factor
17681 - */
17682 + #if defined(WM_MODE_USB)
17683 adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
17684 adc->sample_rate = SAMP_RATE / adc->src_factor;
17685 return;
17686 - }
17687 + #else
17688 + //TODO: Need code for normal mode
17689 + #endif
17690
17691 adc->src_factor = 1;
17692 -
17693 -
17694 -#if 0
17695 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
17696 -
17697 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
17698 -
17699 - adc->sample_rate = rate;
17700 - dac->sample_rate = rate;
17701 -#endif
17702 }
17703
17704 /* stop the DAC before calling */
17705 @@ -284,26 +519,89 @@
17706 set_dac_rate(struct au1550_state *s, unsigned rate)
17707 {
17708 struct dmabuf *dac = &s->dma_dac;
17709 - struct dmabuf *adc = &s->dma_adc;
17710
17711 - if (s->no_vra) {
17712 - /* calc SRC factor
17713 - */
17714 - dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
17715 - dac->sample_rate = SAMP_RATE / dac->src_factor;
17716 - return;
17717 + u16 sr, ws, div, bosr, mode;
17718 + volatile psc_i2s_t* ip = (volatile psc_i2s_t *)I2S_PSC_BASE;
17719 + u32 cfg;
17720 +
17721 + #if defined(CONFIG_MIPS_FICMMP)
17722 + rate = ficmmp_set_i2s_sample_rate(rate);
17723 + #endif
17724 +
17725 + switch(rate)
17726 + {
17727 + case 96000:
17728 + sr = WM_SC_SR_96000;
17729 + ws = WS_64FS;
17730 + div = PSC_I2SCFG_DIV2;
17731 + break;
17732 + case 88200:
17733 + sr = WM_SC_SR_88200;
17734 + ws = WS_64FS;
17735 + div = PSC_I2SCFG_DIV2;
17736 + break;
17737 + case 44100:
17738 + sr = WM_SC_SR_44100;
17739 + ws = WS_128FS;
17740 + div = PSC_I2SCFG_DIV2;
17741 + break;
17742 + case 48000:
17743 + sr = WM_SC_SR_48000;
17744 + ws = WS_128FS;
17745 + div = PSC_I2SCFG_DIV2;
17746 + break;
17747 + case 32000:
17748 + sr = WM_SC_SR_32000;
17749 + ws = WS_96FS;
17750 + div = PSC_I2SCFG_DIV4;
17751 + break;
17752 + case 8018:
17753 + sr = WM_SC_SR_8018;
17754 + ws = WS_128FS;
17755 + div = PSC_I2SCFG_DIV2;
17756 + break;
17757 + case 8000:
17758 + default:
17759 + sr = WM_SC_SR_8000;
17760 + ws = WS_96FS;
17761 + div = PSC_I2SCFG_DIV16;
17762 + break;
17763 }
17764
17765 + #if defined(WM_MODE_USB)
17766 + mode = WM_SC_MODE_USB;
17767 + #else
17768 + mode = WM_SC_MODE_NORMAL;
17769 + #endif
17770 +
17771 + bosr = 0;
17772 +
17773 dac->src_factor = 1;
17774 + dac->sample_rate = rate;
17775
17776 -#if 0
17777 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
17778 + /* Deactivate codec */
17779 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00);
17780
17781 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
17782 + /* Disable I2S controller */
17783 + ip->psc_i2scfg &= ~PSC_I2SCFG_DE_ENABLE;
17784 + /* Wait for device disabled */
17785 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 1);
17786 +
17787 + cfg = ip->psc_i2scfg;
17788 + /* Clear WS and DIVIDER values */
17789 + cfg &= ~(PSC_I2SCFG_WS_MASK | PSC_I2SCFG_DIV_MASK);
17790 + cfg |= PSC_I2SCFG_WS(ws) | div;
17791 + /* Reconfigure and enable */
17792 + ip->psc_i2scfg = cfg | PSC_I2SCFG_DE_ENABLE;
17793
17794 - adc->sample_rate = rate;
17795 - dac->sample_rate = rate;
17796 -#endif
17797 + /* Wait for device enabled */
17798 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 0);
17799 +
17800 + /* Set appropriate sampling rate */
17801 + wrcodec(WM_REG_SAMPLING_CONTROL, bosr | mode | sr);
17802 +
17803 + /* Activate codec */
17804 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01);
17805 }
17806
17807 static void
17808 @@ -354,8 +652,7 @@
17809 ip->psc_i2spcr = PSC_I2SPCR_RP;
17810 au_sync();
17811
17812 - /* Wait for Receive Busy to show disabled.
17813 - */
17814 + /* Wait for Receive Busy to show disabled. */
17815 do {
17816 stat = ip->psc_i2sstat;
17817 au_sync();
17818 @@ -463,7 +760,6 @@
17819 if (db->num_channels == 1)
17820 db->cnt_factor *= 2;
17821 db->cnt_factor *= db->src_factor;
17822 -
17823 db->count = 0;
17824 db->dma_qcount = 0;
17825 db->nextIn = db->nextOut = db->rawbuf;
17826 @@ -546,12 +842,13 @@
17827 if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF))
17828 dbg("I2S status = 0x%08x", i2s_stat);
17829 #endif
17830 +
17831 db->dma_qcount--;
17832
17833 if (db->count >= db->fragsize) {
17834 - if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
17835 - db->fragsize) == 0) {
17836 - err("qcount < 2 and no ring room!");
17837 + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, db->fragsize) == 0)
17838 + {
17839 + err("qcount < MIN_Q_COUNT and no ring room!");
17840 }
17841 db->nextOut += db->fragsize;
17842 if (db->nextOut >= db->rawbuf + db->dmasize)
17843 @@ -606,65 +903,43 @@
17844
17845 }
17846
17847 -static loff_t
17848 -au1550_llseek(struct file *file, loff_t offset, int origin)
17849 -{
17850 - return -ESPIPE;
17851 -}
17852 -
17853 -
17854 -#if 0
17855 -static int
17856 -au1550_open_mixdev(struct inode *inode, struct file *file)
17857 -{
17858 - file->private_data = &au1550_state;
17859 - return 0;
17860 -}
17861 -
17862 -static int
17863 -au1550_release_mixdev(struct inode *inode, struct file *file)
17864 -{
17865 - return 0;
17866 -}
17867 -
17868 -static int
17869 -mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
17870 - unsigned long arg)
17871 -{
17872 - return codec->mixer_ioctl(codec, cmd, arg);
17873 -}
17874 -
17875 -static int
17876 -au1550_ioctl_mixdev(struct inode *inode, struct file *file,
17877 - unsigned int cmd, unsigned long arg)
17878 -{
17879 - struct au1550_state *s = (struct au1550_state *)file->private_data;
17880 - struct ac97_codec *codec = s->codec;
17881 -
17882 - return mixdev_ioctl(codec, cmd, arg);
17883 -}
17884 -
17885 -static /*const */ struct file_operations au1550_mixer_fops = {
17886 - owner:THIS_MODULE,
17887 - llseek:au1550_llseek,
17888 - ioctl:au1550_ioctl_mixdev,
17889 - open:au1550_open_mixdev,
17890 - release:au1550_release_mixdev,
17891 -};
17892 -#endif
17893 -
17894 static int
17895 drain_dac(struct au1550_state *s, int nonblock)
17896 {
17897 unsigned long flags;
17898 int count, tmo;
17899
17900 + struct dmabuf *db = &s->dma_dac;
17901 +
17902 + //DPRINTF();
17903 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
17904 return 0;
17905
17906 for (;;) {
17907 spin_lock_irqsave(&s->lock, flags);
17908 - count = s->dma_dac.count;
17909 + count = db->count;
17910 +
17911 + /* Pad the ddma buffer with zeros if the amount remaining
17912 + * is not a multiple of fragsize */
17913 + if(count % db->fragsize != 0)
17914 + {
17915 + int pad = db->fragsize - (count % db->fragsize);
17916 + char* bufptr = db->nextIn;
17917 + char* bufend = db->rawbuf + db->dmasize;
17918 +
17919 + if((bufend - bufptr) < pad)
17920 + printk("Error! ddma padding is bigger than available ring space!\n");
17921 + else
17922 + {
17923 + memset((void*)bufptr, 0, pad);
17924 + count += pad;
17925 + db->nextIn += pad;
17926 + db->count += pad;
17927 + if (db->dma_qcount == 0)
17928 + start_dac(s);
17929 + db->dma_qcount++;
17930 + }
17931 + }
17932 spin_unlock_irqrestore(&s->lock, flags);
17933 if (count <= 0)
17934 break;
17935 @@ -672,9 +947,9 @@
17936 break;
17937 if (nonblock)
17938 return -EBUSY;
17939 - tmo = 1000 * count / (s->no_vra ?
17940 - SAMP_RATE : s->dma_dac.sample_rate);
17941 + tmo = 1000 * count / s->dma_dac.sample_rate;
17942 tmo /= s->dma_dac.dma_bytes_per_sample;
17943 +
17944 au1550_delay(tmo);
17945 }
17946 if (signal_pending(current))
17947 @@ -698,8 +973,7 @@
17948 * If interpolating (no VRA), duplicate every audio frame src_factor times.
17949 */
17950 static int
17951 -translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
17952 - int dmacount)
17953 +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, int dmacount)
17954 {
17955 int sample, i;
17956 int interp_bytes_per_sample;
17957 @@ -737,11 +1011,12 @@
17958
17959 /* duplicate every audio frame src_factor times
17960 */
17961 - for (i = 0; i < db->src_factor; i++)
17962 + for (i = 0; i < db->src_factor; i++) {
17963 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
17964 + dmabuf += interp_bytes_per_sample;
17965 + }
17966
17967 userbuf += db->user_bytes_per_sample;
17968 - dmabuf += interp_bytes_per_sample;
17969 }
17970
17971 return num_samples * interp_bytes_per_sample;
17972 @@ -996,15 +1271,14 @@
17973 * on the dma queue. If the queue count reaches zero,
17974 * we know the dma has stopped.
17975 */
17976 - while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
17977 + while ((db->dma_qcount < MIN_Q_COUNT) && (db->count >= db->fragsize)) {
17978 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
17979 db->fragsize) == 0) {
17980 - err("qcount < 2 and no ring room!");
17981 + err("qcount < MIN_Q_COUNT and no ring room!");
17982 }
17983 db->nextOut += db->fragsize;
17984 if (db->nextOut >= db->rawbuf + db->dmasize)
17985 db->nextOut -= db->dmasize;
17986 - db->count -= db->fragsize;
17987 db->total_bytes += db->dma_fragsize;
17988 if (db->dma_qcount == 0)
17989 start_dac(s);
17990 @@ -1017,7 +1291,6 @@
17991 buffer += usercnt;
17992 ret += usercnt;
17993 } /* while (count > 0) */
17994 -
17995 out:
17996 up(&s->sem);
17997 out2:
17998 @@ -1371,9 +1644,6 @@
17999 s->dma_dac.cnt_factor;
18000 abinfo.fragstotal = s->dma_dac.numfrag;
18001 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
18002 -#ifdef AU1000_VERBOSE_DEBUG
18003 - dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
18004 -#endif
18005 return copy_to_user((void *) arg, &abinfo,
18006 sizeof(abinfo)) ? -EFAULT : 0;
18007
18008 @@ -1536,13 +1806,9 @@
18009 case SNDCTL_DSP_SETSYNCRO:
18010 case SOUND_PCM_READ_FILTER:
18011 return -EINVAL;
18012 + default: break;
18013 }
18014 -
18015 -#if 0
18016 - return mixdev_ioctl(s->codec, cmd, arg);
18017 -#else
18018 return 0;
18019 -#endif
18020 }
18021
18022
18023 @@ -1664,15 +1930,15 @@
18024 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
18025 MODULE_DESCRIPTION("Au1550 Audio Driver");
18026
18027 +#if defined(WM_MODE_USB)
18028 /* Set up an internal clock for the PSC3. This will then get
18029 * driven out of the Au1550 as the master.
18030 */
18031 static void
18032 intclk_setup(void)
18033 {
18034 - uint clk, rate, stat;
18035 -
18036 - /* Wire up Freq4 as a clock for the PSC3.
18037 + uint clk, rate;
18038 + /* Wire up Freq4 as a clock for the PSC.
18039 * We know SMBus uses Freq3.
18040 * By making changes to this rate, plus the word strobe
18041 * size, we can make fine adjustments to the actual data rate.
18042 @@ -1700,11 +1966,17 @@
18043 */
18044 clk = au_readl(SYS_CLKSRC);
18045 au_sync();
18046 +#if defined(CONFIG_SOC_AU1550)
18047 clk &= ~0x01f00000;
18048 clk |= (6 << 22);
18049 +#elif defined(CONFIG_SOC_AU1200)
18050 + clk &= ~0x3e000000;
18051 + clk |= (6 << 27);
18052 +#endif
18053 au_writel(clk, SYS_CLKSRC);
18054 au_sync();
18055 }
18056 +#endif
18057
18058 static int __devinit
18059 au1550_probe(void)
18060 @@ -1724,6 +1996,11 @@
18061 init_MUTEX(&s->open_sem);
18062 spin_lock_init(&s->lock);
18063
18064 + /* CPLD Mux for I2s */
18065 +
18066 +#if defined(CONFIG_MIPS_PB1200)
18067 + bcsr->resets |= BCSR_RESETS_PCS1MUX;
18068 +#endif
18069
18070 s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE;
18071 ip = s->psc_addr;
18072 @@ -1765,9 +2042,8 @@
18073
18074 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
18075 goto err_dev1;
18076 -#if 0
18077 - if ((s->codec->dev_mixer =
18078 - register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
18079 +#if 1
18080 + if ((s->dev_mixer = register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
18081 goto err_dev2;
18082 #endif
18083
18084 @@ -1777,7 +2053,6 @@
18085 proc_au1550_dump, NULL);
18086 #endif /* AU1550_DEBUG */
18087
18088 - intclk_setup();
18089
18090 /* The GPIO for the appropriate PSC was configured by the
18091 * board specific start up.
18092 @@ -1786,7 +2061,12 @@
18093 */
18094 ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */
18095 au_sync();
18096 +#if defined(WM_MODE_USB)
18097 + intclk_setup();
18098 ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE);
18099 +#else
18100 + ip->psc_sel = (PSC_SEL_CLK_EXTCLK | PSC_SEL_PS_I2SMODE);
18101 +#endif
18102 au_sync();
18103
18104 /* Enable PSC
18105 @@ -1806,42 +2086,18 @@
18106 * Actual I2S mode (first bit delayed by one clock).
18107 * Master mode (We provide the clock from the PSC).
18108 */
18109 - val = PSC_I2SCFG_SET_LEN(16);
18110 -#ifdef TRY_441KHz
18111 - /* This really should be 250, but it appears that all of the
18112 - * PLLs, dividers and so on in the chain shift it. That's the
18113 - * problem with sourceing the clock instead of letting the very
18114 - * stable codec provide it. But, the PSC doesn't appear to want
18115 - * to work in slave mode, so this is what we get. It's not
18116 - * studio quality timing, but it's good enough for listening
18117 - * to mp3s.
18118 - */
18119 - val |= PSC_I2SCFG_SET_WS(252);
18120 -#else
18121 - val |= PSC_I2SCFG_SET_WS(250);
18122 -#endif
18123 - val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
18124 +
18125 + val = PSC_I2SCFG_SET_LEN(16) | PSC_I2SCFG_WS(WS_128FS) | PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
18126 PSC_I2SCFG_BI | PSC_I2SCFG_XM;
18127
18128 - ip->psc_i2scfg = val;
18129 - au_sync();
18130 - val |= PSC_I2SCFG_DE_ENABLE;
18131 - ip->psc_i2scfg = val;
18132 - au_sync();
18133 + ip->psc_i2scfg = val | PSC_I2SCFG_DE_ENABLE;
18134
18135 - /* Wait for Device ready.
18136 - */
18137 - do {
18138 - val = ip->psc_i2sstat;
18139 - au_sync();
18140 - } while ((val & PSC_I2SSTAT_DR) == 0);
18141 + set_dac_rate(s, 8000); //Set default rate
18142
18143 - val = ip->psc_i2scfg;
18144 - au_sync();
18145 + codec_init(s);
18146
18147 - codec_init();
18148 + s->no_vra = vra ? 0 : 1;
18149
18150 - s->no_vra = 1;
18151 if (s->no_vra)
18152 info("no VRA, interpolating and decimating");
18153
18154 @@ -1866,6 +2122,8 @@
18155 err_dev2:
18156 unregister_sound_dsp(s->dev_audio);
18157 #endif
18158 + err_dev2:
18159 + unregister_sound_dsp(s->dev_audio);
18160 err_dev1:
18161 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
18162 err_dma2:
18163 diff -Nur linux-2.4.29/drivers/sound/au1550_psc.c linux-mips/drivers/sound/au1550_psc.c
18164 --- linux-2.4.29/drivers/sound/au1550_psc.c 2005-01-19 15:10:04.000000000 +0100
18165 +++ linux-mips/drivers/sound/au1550_psc.c 2005-01-31 12:59:41.000000000 +0100
18166 @@ -30,6 +30,7 @@
18167 * 675 Mass Ave, Cambridge, MA 02139, USA.
18168 *
18169 */
18170 +
18171 #include <linux/version.h>
18172 #include <linux/module.h>
18173 #include <linux/string.h>
18174 @@ -63,6 +64,14 @@
18175 #include <asm/db1x00.h>
18176 #endif
18177
18178 +#ifdef CONFIG_MIPS_PB1200
18179 +#include <asm/pb1200.h>
18180 +#endif
18181 +
18182 +#ifdef CONFIG_MIPS_DB1200
18183 +#include <asm/db1200.h>
18184 +#endif
18185 +
18186 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
18187
18188 #define AU1550_MODULE_NAME "Au1550 psc audio"
18189 @@ -521,7 +530,14 @@
18190 spin_unlock_irqrestore(&s->lock, flags);
18191 }
18192
18193 -
18194 +/*
18195 + NOTE: The xmit slots cannot be changed on the fly when in full-duplex
18196 + because the AC'97 block must be stopped/started. When using this driver
18197 + in full-duplex (in & out at the same time), the DMA engine will stop if
18198 + you disable the block.
18199 + TODO: change implementation to properly restart adc/dac after setting
18200 + xmit slots.
18201 +*/
18202 static void
18203 set_xmit_slots(int num_channels)
18204 {
18205 @@ -565,6 +581,14 @@
18206 } while ((stat & PSC_AC97STAT_DR) == 0);
18207 }
18208
18209 +/*
18210 + NOTE: The recv slots cannot be changed on the fly when in full-duplex
18211 + because the AC'97 block must be stopped/started. When using this driver
18212 + in full-duplex (in & out at the same time), the DMA engine will stop if
18213 + you disable the block.
18214 + TODO: change implementation to properly restart adc/dac after setting
18215 + recv slots.
18216 +*/
18217 static void
18218 set_recv_slots(int num_channels)
18219 {
18220 @@ -608,7 +632,6 @@
18221
18222 spin_lock_irqsave(&s->lock, flags);
18223
18224 - set_xmit_slots(db->num_channels);
18225 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
18226 au_sync();
18227 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
18228 @@ -640,7 +663,6 @@
18229 db->nextIn -= db->dmasize;
18230 }
18231
18232 - set_recv_slots(db->num_channels);
18233 au1xxx_dbdma_start(db->dmanr);
18234 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
18235 au_sync();
18236 @@ -752,12 +774,16 @@
18237 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
18238 dbg("AC97C status = 0x%08x", ac97c_stat);
18239 #endif
18240 + /* There is a possiblity that we are getting 1 interrupt for
18241 + multiple descriptors. Use ddma api to find out how many
18242 + completed.
18243 + */
18244 db->dma_qcount--;
18245
18246 if (db->count >= db->fragsize) {
18247 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
18248 db->fragsize) == 0) {
18249 - err("qcount < 2 and no ring room!");
18250 + err("qcount < 2 and no ring room1!");
18251 }
18252 db->nextOut += db->fragsize;
18253 if (db->nextOut >= db->rawbuf + db->dmasize)
18254 @@ -941,11 +967,12 @@
18255
18256 /* duplicate every audio frame src_factor times
18257 */
18258 - for (i = 0; i < db->src_factor; i++)
18259 + for (i = 0; i < db->src_factor; i++) {
18260 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
18261 + dmabuf += interp_bytes_per_sample;
18262 + }
18263
18264 userbuf += db->user_bytes_per_sample;
18265 - dmabuf += interp_bytes_per_sample;
18266 }
18267
18268 return num_samples * interp_bytes_per_sample;
18269 @@ -1203,7 +1230,7 @@
18270 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
18271 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
18272 db->fragsize) == 0) {
18273 - err("qcount < 2 and no ring room!");
18274 + err("qcount < 2 and no ring room!0");
18275 }
18276 db->nextOut += db->fragsize;
18277 if (db->nextOut >= db->rawbuf + db->dmasize)
18278 @@ -1481,6 +1508,7 @@
18279 return -EINVAL;
18280 stop_adc(s);
18281 s->dma_adc.num_channels = val;
18282 + set_recv_slots(val);
18283 if ((ret = prog_dmabuf_adc(s)))
18284 return ret;
18285 }
18286 @@ -1538,6 +1566,7 @@
18287 }
18288
18289 s->dma_dac.num_channels = val;
18290 + set_xmit_slots(val);
18291 if ((ret = prog_dmabuf_dac(s)))
18292 return ret;
18293 }
18294 @@ -1832,10 +1861,8 @@
18295 down(&s->open_sem);
18296 }
18297
18298 - stop_dac(s);
18299 - stop_adc(s);
18300 -
18301 if (file->f_mode & FMODE_READ) {
18302 + stop_adc(s);
18303 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
18304 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
18305 s->dma_adc.num_channels = 1;
18306 @@ -1846,6 +1873,7 @@
18307 }
18308
18309 if (file->f_mode & FMODE_WRITE) {
18310 + stop_dac(s);
18311 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
18312 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
18313 s->dma_dac.num_channels = 1;
18314 @@ -2091,6 +2119,9 @@
18315 ac97_read_proc, &s->codec);
18316 #endif
18317
18318 + set_xmit_slots(1);
18319 + set_recv_slots(1);
18320 +
18321 return 0;
18322
18323 err_dev3:
18324 diff -Nur linux-2.4.29/drivers/tc/lk201.c linux-mips/drivers/tc/lk201.c
18325 --- linux-2.4.29/drivers/tc/lk201.c 2004-02-18 14:36:31.000000000 +0100
18326 +++ linux-mips/drivers/tc/lk201.c 2004-09-28 02:53:04.000000000 +0200
18327 @@ -5,7 +5,7 @@
18328 * for more details.
18329 *
18330 * Copyright (C) 1999-2002 Harald Koerfgen <hkoerfg@web.de>
18331 - * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
18332 + * Copyright (C) 2001, 2002, 2003, 2004 Maciej W. Rozycki
18333 */
18334
18335 #include <linux/config.h>
18336 @@ -23,8 +23,8 @@
18337 #include <asm/keyboard.h>
18338 #include <asm/dec/tc.h>
18339 #include <asm/dec/machtype.h>
18340 +#include <asm/dec/serial.h>
18341
18342 -#include "zs.h"
18343 #include "lk201.h"
18344
18345 /*
18346 @@ -55,19 +55,20 @@
18347 unsigned char kbd_sysrq_key = -1;
18348 #endif
18349
18350 -#define KEYB_LINE 3
18351 +#define KEYB_LINE_ZS 3
18352 +#define KEYB_LINE_DZ 0
18353
18354 -static int __init lk201_init(struct dec_serial *);
18355 -static void __init lk201_info(struct dec_serial *);
18356 -static void lk201_kbd_rx_char(unsigned char, unsigned char);
18357 +static int __init lk201_init(void *);
18358 +static void __init lk201_info(void *);
18359 +static void lk201_rx_char(unsigned char, unsigned char);
18360
18361 -struct zs_hook lk201_kbdhook = {
18362 +static struct dec_serial_hook lk201_hook = {
18363 .init_channel = lk201_init,
18364 .init_info = lk201_info,
18365 .rx_char = NULL,
18366 .poll_rx_char = NULL,
18367 .poll_tx_char = NULL,
18368 - .cflags = B4800 | CS8 | CSTOPB | CLOCAL
18369 + .cflags = B4800 | CS8 | CSTOPB | CLOCAL,
18370 };
18371
18372 /*
18373 @@ -93,28 +94,28 @@
18374 LK_CMD_ENB_BELL, LK_PARAM_VOLUME(4),
18375 };
18376
18377 -static struct dec_serial* lk201kbd_info;
18378 +static void *lk201_handle;
18379
18380 -static int lk201_send(struct dec_serial *info, unsigned char ch)
18381 +static int lk201_send(unsigned char ch)
18382 {
18383 - if (info->hook->poll_tx_char(info, ch)) {
18384 + if (lk201_hook.poll_tx_char(lk201_handle, ch)) {
18385 printk(KERN_ERR "lk201: transmit timeout\n");
18386 return -EIO;
18387 }
18388 return 0;
18389 }
18390
18391 -static inline int lk201_get_id(struct dec_serial *info)
18392 +static inline int lk201_get_id(void)
18393 {
18394 - return lk201_send(info, LK_CMD_REQ_ID);
18395 + return lk201_send(LK_CMD_REQ_ID);
18396 }
18397
18398 -static int lk201_reset(struct dec_serial *info)
18399 +static int lk201_reset(void)
18400 {
18401 int i, r;
18402
18403 for (i = 0; i < sizeof(lk201_reset_string); i++) {
18404 - r = lk201_send(info, lk201_reset_string[i]);
18405 + r = lk201_send(lk201_reset_string[i]);
18406 if (r < 0)
18407 return r;
18408 }
18409 @@ -203,24 +204,26 @@
18410
18411 static int write_kbd_rate(struct kbd_repeat *rep)
18412 {
18413 - struct dec_serial* info = lk201kbd_info;
18414 int delay, rate;
18415 int i;
18416
18417 delay = rep->delay / 5;
18418 rate = rep->rate;
18419 for (i = 0; i < 4; i++) {
18420 - if (info->hook->poll_tx_char(info, LK_CMD_RPT_RATE(i)))
18421 + if (lk201_hook.poll_tx_char(lk201_handle,
18422 + LK_CMD_RPT_RATE(i)))
18423 return 1;
18424 - if (info->hook->poll_tx_char(info, LK_PARAM_DELAY(delay)))
18425 + if (lk201_hook.poll_tx_char(lk201_handle,
18426 + LK_PARAM_DELAY(delay)))
18427 return 1;
18428 - if (info->hook->poll_tx_char(info, LK_PARAM_RATE(rate)))
18429 + if (lk201_hook.poll_tx_char(lk201_handle,
18430 + LK_PARAM_RATE(rate)))
18431 return 1;
18432 }
18433 return 0;
18434 }
18435
18436 -static int lk201kbd_rate(struct kbd_repeat *rep)
18437 +static int lk201_kbd_rate(struct kbd_repeat *rep)
18438 {
18439 if (rep == NULL)
18440 return -EINVAL;
18441 @@ -237,10 +240,8 @@
18442 return 0;
18443 }
18444
18445 -static void lk201kd_mksound(unsigned int hz, unsigned int ticks)
18446 +static void lk201_kd_mksound(unsigned int hz, unsigned int ticks)
18447 {
18448 - struct dec_serial* info = lk201kbd_info;
18449 -
18450 if (!ticks)
18451 return;
18452
18453 @@ -253,20 +254,19 @@
18454 ticks = 7;
18455 ticks = 7 - ticks;
18456
18457 - if (info->hook->poll_tx_char(info, LK_CMD_ENB_BELL))
18458 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_ENB_BELL))
18459 return;
18460 - if (info->hook->poll_tx_char(info, LK_PARAM_VOLUME(ticks)))
18461 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_VOLUME(ticks)))
18462 return;
18463 - if (info->hook->poll_tx_char(info, LK_CMD_BELL))
18464 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_BELL))
18465 return;
18466 }
18467
18468 void kbd_leds(unsigned char leds)
18469 {
18470 - struct dec_serial* info = lk201kbd_info;
18471 unsigned char l = 0;
18472
18473 - if (!info) /* FIXME */
18474 + if (!lk201_handle) /* FIXME */
18475 return;
18476
18477 /* FIXME -- Only Hold and Lock LEDs for now. --macro */
18478 @@ -275,13 +275,13 @@
18479 if (leds & LED_CAP)
18480 l |= LK_LED_LOCK;
18481
18482 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_ON))
18483 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_ON))
18484 return;
18485 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(l)))
18486 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(l)))
18487 return;
18488 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_OFF))
18489 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_OFF))
18490 return;
18491 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(~l)))
18492 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(~l)))
18493 return;
18494 }
18495
18496 @@ -307,7 +307,7 @@
18497 return 0x80;
18498 }
18499
18500 -static void lk201_kbd_rx_char(unsigned char ch, unsigned char stat)
18501 +static void lk201_rx_char(unsigned char ch, unsigned char fl)
18502 {
18503 static unsigned char id[6];
18504 static int id_i;
18505 @@ -316,9 +316,8 @@
18506 static int prev_scancode;
18507 unsigned char c = scancodeRemap[ch];
18508
18509 - if (stat && stat != TTY_OVERRUN) {
18510 - printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n",
18511 - stat);
18512 + if (fl != TTY_NORMAL && fl != TTY_OVERRUN) {
18513 + printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n", fl);
18514 return;
18515 }
18516
18517 @@ -335,7 +334,7 @@
18518 /* OK, the power-up concluded. */
18519 lk201_report(id);
18520 if (id[2] == LK_STAT_PWRUP_OK)
18521 - lk201_get_id(lk201kbd_info);
18522 + lk201_get_id();
18523 else {
18524 id_i = 0;
18525 printk(KERN_ERR "lk201: keyboard power-up "
18526 @@ -345,7 +344,7 @@
18527 /* We got the ID; report it and start operation. */
18528 id_i = 0;
18529 lk201_id(id);
18530 - lk201_reset(lk201kbd_info);
18531 + lk201_reset();
18532 }
18533 return;
18534 }
18535 @@ -398,29 +397,28 @@
18536 tasklet_schedule(&keyboard_tasklet);
18537 }
18538
18539 -static void __init lk201_info(struct dec_serial *info)
18540 +static void __init lk201_info(void *handle)
18541 {
18542 }
18543
18544 -static int __init lk201_init(struct dec_serial *info)
18545 +static int __init lk201_init(void *handle)
18546 {
18547 /* First install handlers. */
18548 - lk201kbd_info = info;
18549 - kbd_rate = lk201kbd_rate;
18550 - kd_mksound = lk201kd_mksound;
18551 + lk201_handle = handle;
18552 + kbd_rate = lk201_kbd_rate;
18553 + kd_mksound = lk201_kd_mksound;
18554
18555 - info->hook->rx_char = lk201_kbd_rx_char;
18556 + lk201_hook.rx_char = lk201_rx_char;
18557
18558 /* Then just issue a reset -- the handlers will do the rest. */
18559 - lk201_send(info, LK_CMD_POWER_UP);
18560 + lk201_send(LK_CMD_POWER_UP);
18561
18562 return 0;
18563 }
18564
18565 void __init kbd_init_hw(void)
18566 {
18567 - extern int register_zs_hook(unsigned int, struct zs_hook *);
18568 - extern int unregister_zs_hook(unsigned int);
18569 + int keyb_line;
18570
18571 /* Maxine uses LK501 at the Access.Bus. */
18572 if (!LK_IFACE)
18573 @@ -428,19 +426,15 @@
18574
18575 printk(KERN_INFO "lk201: DECstation LK keyboard driver v0.05.\n");
18576
18577 - if (LK_IFACE_ZS) {
18578 - /*
18579 - * kbd_init_hw() is being called before
18580 - * rs_init() so just register the kbd hook
18581 - * and let zs_init do the rest :-)
18582 - */
18583 - if(!register_zs_hook(KEYB_LINE, &lk201_kbdhook))
18584 - unregister_zs_hook(KEYB_LINE);
18585 - } else {
18586 - /*
18587 - * TODO: modify dz.c to allow similar hooks
18588 - * for LK201 handling on DS2100, DS3100, and DS5000/200
18589 - */
18590 - printk(KERN_ERR "lk201: support for DZ11 not yet ready.\n");
18591 - }
18592 + /*
18593 + * kbd_init_hw() is being called before
18594 + * rs_init() so just register the kbd hook
18595 + * and let zs_init do the rest :-)
18596 + */
18597 + if (LK_IFACE_ZS)
18598 + keyb_line = KEYB_LINE_ZS;
18599 + else
18600 + keyb_line = KEYB_LINE_DZ;
18601 + if (!register_dec_serial_hook(keyb_line, &lk201_hook))
18602 + unregister_dec_serial_hook(keyb_line);
18603 }
18604 diff -Nur linux-2.4.29/drivers/tc/zs.c linux-mips/drivers/tc/zs.c
18605 --- linux-2.4.29/drivers/tc/zs.c 2005-01-19 15:10:05.000000000 +0100
18606 +++ linux-mips/drivers/tc/zs.c 2004-12-27 05:13:50.000000000 +0100
18607 @@ -68,6 +68,8 @@
18608 #include <asm/bitops.h>
18609 #include <asm/uaccess.h>
18610 #include <asm/bootinfo.h>
18611 +#include <asm/dec/serial.h>
18612 +
18613 #ifdef CONFIG_DECSTATION
18614 #include <asm/dec/interrupts.h>
18615 #include <asm/dec/machtype.h>
18616 @@ -160,8 +162,8 @@
18617 #ifdef CONFIG_SERIAL_DEC_CONSOLE
18618 static struct console sercons;
18619 #endif
18620 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) \
18621 - && !defined(MODULE)
18622 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18623 + !defined(MODULE)
18624 static unsigned long break_pressed; /* break, really ... */
18625 #endif
18626
18627 @@ -196,7 +198,6 @@
18628 /*
18629 * Debugging.
18630 */
18631 -#undef SERIAL_DEBUG_INTR
18632 #undef SERIAL_DEBUG_OPEN
18633 #undef SERIAL_DEBUG_FLOW
18634 #undef SERIAL_DEBUG_THROTTLE
18635 @@ -221,10 +222,6 @@
18636 static struct termios *serial_termios[NUM_CHANNELS];
18637 static struct termios *serial_termios_locked[NUM_CHANNELS];
18638
18639 -#ifndef MIN
18640 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
18641 -#endif
18642 -
18643 /*
18644 * tmp_buf is used as a temporary buffer by serial_write. We need to
18645 * lock it in case the copy_from_user blocks while swapping in a page,
18646 @@ -386,8 +383,6 @@
18647 * -----------------------------------------------------------------------
18648 */
18649
18650 -static int tty_break; /* Set whenever BREAK condition is detected. */
18651 -
18652 /*
18653 * This routine is used by the interrupt handler to schedule
18654 * processing in the software interrupt portion of the driver.
18655 @@ -414,20 +409,15 @@
18656 if (!tty && (!info->hook || !info->hook->rx_char))
18657 continue;
18658
18659 - if (tty_break) {
18660 - tty_break = 0;
18661 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18662 - if (info->line == sercons.index) {
18663 - if (!break_pressed) {
18664 - break_pressed = jiffies;
18665 - goto ignore_char;
18666 - }
18667 - break_pressed = 0;
18668 - }
18669 -#endif
18670 + flag = TTY_NORMAL;
18671 + if (info->tty_break) {
18672 + info->tty_break = 0;
18673 flag = TTY_BREAK;
18674 if (info->flags & ZILOG_SAK)
18675 do_SAK(tty);
18676 + /* Ignore the null char got when BREAK is removed. */
18677 + if (ch == 0)
18678 + continue;
18679 } else {
18680 if (stat & Rx_OVR) {
18681 flag = TTY_OVERRUN;
18682 @@ -435,20 +425,22 @@
18683 flag = TTY_FRAME;
18684 } else if (stat & PAR_ERR) {
18685 flag = TTY_PARITY;
18686 - } else
18687 - flag = 0;
18688 - if (flag)
18689 + }
18690 + if (flag != TTY_NORMAL)
18691 /* reset the error indication */
18692 write_zsreg(info->zs_channel, R0, ERR_RES);
18693 }
18694
18695 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18696 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18697 + !defined(MODULE)
18698 if (break_pressed && info->line == sercons.index) {
18699 - if (ch != 0 &&
18700 - time_before(jiffies, break_pressed + HZ*5)) {
18701 + /* Ignore the null char got when BREAK is removed. */
18702 + if (ch == 0)
18703 + continue;
18704 + if (time_before(jiffies, break_pressed + HZ * 5)) {
18705 handle_sysrq(ch, regs, NULL, NULL);
18706 break_pressed = 0;
18707 - goto ignore_char;
18708 + continue;
18709 }
18710 break_pressed = 0;
18711 }
18712 @@ -459,23 +451,7 @@
18713 return;
18714 }
18715
18716 - if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
18717 - static int flip_buf_ovf;
18718 - ++flip_buf_ovf;
18719 - continue;
18720 - }
18721 - tty->flip.count++;
18722 - {
18723 - static int flip_max_cnt;
18724 - if (flip_max_cnt < tty->flip.count)
18725 - flip_max_cnt = tty->flip.count;
18726 - }
18727 -
18728 - *tty->flip.flag_buf_ptr++ = flag;
18729 - *tty->flip.char_buf_ptr++ = ch;
18730 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
18731 - ignore_char:
18732 -#endif
18733 + tty_insert_flip_char(tty, ch, flag);
18734 }
18735 if (tty)
18736 tty_flip_buffer_push(tty);
18737 @@ -517,11 +493,15 @@
18738 /* Get status from Read Register 0 */
18739 stat = read_zsreg(info->zs_channel, R0);
18740
18741 - if (stat & BRK_ABRT) {
18742 -#ifdef SERIAL_DEBUG_INTR
18743 - printk("handling break....");
18744 + if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
18745 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
18746 + !defined(MODULE)
18747 + if (info->line == sercons.index) {
18748 + if (!break_pressed)
18749 + break_pressed = jiffies;
18750 + } else
18751 #endif
18752 - tty_break = 1;
18753 + info->tty_break = 1;
18754 }
18755
18756 if (info->zs_channel != info->zs_chan_a) {
18757 @@ -957,7 +937,7 @@
18758 save_flags(flags);
18759 while (1) {
18760 cli();
18761 - c = MIN(count, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18762 + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18763 SERIAL_XMIT_SIZE - info->xmit_head));
18764 if (c <= 0)
18765 break;
18766 @@ -965,7 +945,7 @@
18767 if (from_user) {
18768 down(&tmp_buf_sem);
18769 copy_from_user(tmp_buf, buf, c);
18770 - c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18771 + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
18772 SERIAL_XMIT_SIZE - info->xmit_head));
18773 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
18774 up(&tmp_buf_sem);
18775 @@ -1282,46 +1262,48 @@
18776 }
18777
18778 switch (cmd) {
18779 - case TIOCMGET:
18780 - error = verify_area(VERIFY_WRITE, (void *) arg,
18781 - sizeof(unsigned int));
18782 - if (error)
18783 - return error;
18784 - return get_modem_info(info, (unsigned int *) arg);
18785 - case TIOCMBIS:
18786 - case TIOCMBIC:
18787 - case TIOCMSET:
18788 - return set_modem_info(info, cmd, (unsigned int *) arg);
18789 - case TIOCGSERIAL:
18790 - error = verify_area(VERIFY_WRITE, (void *) arg,
18791 - sizeof(struct serial_struct));
18792 - if (error)
18793 - return error;
18794 - return get_serial_info(info,
18795 - (struct serial_struct *) arg);
18796 - case TIOCSSERIAL:
18797 - return set_serial_info(info,
18798 - (struct serial_struct *) arg);
18799 - case TIOCSERGETLSR: /* Get line status register */
18800 - error = verify_area(VERIFY_WRITE, (void *) arg,
18801 - sizeof(unsigned int));
18802 - if (error)
18803 - return error;
18804 - else
18805 - return get_lsr_info(info, (unsigned int *) arg);
18806 + case TIOCMGET:
18807 + error = verify_area(VERIFY_WRITE, (void *)arg,
18808 + sizeof(unsigned int));
18809 + if (error)
18810 + return error;
18811 + return get_modem_info(info, (unsigned int *)arg);
18812
18813 - case TIOCSERGSTRUCT:
18814 - error = verify_area(VERIFY_WRITE, (void *) arg,
18815 - sizeof(struct dec_serial));
18816 - if (error)
18817 - return error;
18818 - copy_from_user((struct dec_serial *) arg,
18819 - info, sizeof(struct dec_serial));
18820 - return 0;
18821 + case TIOCMBIS:
18822 + case TIOCMBIC:
18823 + case TIOCMSET:
18824 + return set_modem_info(info, cmd, (unsigned int *)arg);
18825
18826 - default:
18827 - return -ENOIOCTLCMD;
18828 - }
18829 + case TIOCGSERIAL:
18830 + error = verify_area(VERIFY_WRITE, (void *)arg,
18831 + sizeof(struct serial_struct));
18832 + if (error)
18833 + return error;
18834 + return get_serial_info(info, (struct serial_struct *)arg);
18835 +
18836 + case TIOCSSERIAL:
18837 + return set_serial_info(info, (struct serial_struct *)arg);
18838 +
18839 + case TIOCSERGETLSR: /* Get line status register */
18840 + error = verify_area(VERIFY_WRITE, (void *)arg,
18841 + sizeof(unsigned int));
18842 + if (error)
18843 + return error;
18844 + else
18845 + return get_lsr_info(info, (unsigned int *)arg);
18846 +
18847 + case TIOCSERGSTRUCT:
18848 + error = verify_area(VERIFY_WRITE, (void *)arg,
18849 + sizeof(struct dec_serial));
18850 + if (error)
18851 + return error;
18852 + copy_from_user((struct dec_serial *)arg, info,
18853 + sizeof(struct dec_serial));
18854 + return 0;
18855 +
18856 + default:
18857 + return -ENOIOCTLCMD;
18858 + }
18859 return 0;
18860 }
18861
18862 @@ -1446,7 +1428,8 @@
18863 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
18864 {
18865 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
18866 - unsigned long orig_jiffies, char_time;
18867 + unsigned long orig_jiffies;
18868 + int char_time;
18869
18870 if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
18871 return;
18872 @@ -1462,7 +1445,7 @@
18873 if (char_time == 0)
18874 char_time = 1;
18875 if (timeout)
18876 - char_time = MIN(char_time, timeout);
18877 + char_time = min(char_time, timeout);
18878 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
18879 current->state = TASK_INTERRUPTIBLE;
18880 schedule_timeout(char_time);
18881 @@ -1714,7 +1697,7 @@
18882
18883 static void __init show_serial_version(void)
18884 {
18885 - printk("DECstation Z8530 serial driver version 0.08\n");
18886 + printk("DECstation Z8530 serial driver version 0.09\n");
18887 }
18888
18889 /* Initialize Z8530s zs_channels
18890 @@ -1994,8 +1977,9 @@
18891 * polling I/O routines
18892 */
18893 static int
18894 -zs_poll_tx_char(struct dec_serial *info, unsigned char ch)
18895 +zs_poll_tx_char(void *handle, unsigned char ch)
18896 {
18897 + struct dec_serial *info = handle;
18898 struct dec_zschannel *chan = info->zs_channel;
18899 int ret;
18900
18901 @@ -2017,8 +2001,9 @@
18902 }
18903
18904 static int
18905 -zs_poll_rx_char(struct dec_serial *info)
18906 +zs_poll_rx_char(void *handle)
18907 {
18908 + struct dec_serial *info = handle;
18909 struct dec_zschannel *chan = info->zs_channel;
18910 int ret;
18911
18912 @@ -2038,12 +2023,13 @@
18913 return -ENODEV;
18914 }
18915
18916 -unsigned int register_zs_hook(unsigned int channel, struct zs_hook *hook)
18917 +int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
18918 {
18919 struct dec_serial *info = &zs_soft[channel];
18920
18921 if (info->hook) {
18922 - printk(__FUNCTION__": line %d has already a hook registered\n", channel);
18923 + printk("%s: line %d has already a hook registered\n",
18924 + __FUNCTION__, channel);
18925
18926 return 0;
18927 } else {
18928 @@ -2055,7 +2041,7 @@
18929 }
18930 }
18931
18932 -unsigned int unregister_zs_hook(unsigned int channel)
18933 +int unregister_zs_hook(unsigned int channel)
18934 {
18935 struct dec_serial *info = &zs_soft[channel];
18936
18937 @@ -2063,8 +2049,8 @@
18938 info->hook = NULL;
18939 return 1;
18940 } else {
18941 - printk(__FUNCTION__": trying to unregister hook on line %d,"
18942 - " but none is registered\n", channel);
18943 + printk("%s: trying to unregister hook on line %d,"
18944 + " but none is registered\n", __FUNCTION__, channel);
18945 return 0;
18946 }
18947 }
18948 @@ -2319,22 +2305,23 @@
18949 write_zsreg(chan, 9, nine);
18950 }
18951
18952 -static int kgdbhook_init_channel(struct dec_serial* info)
18953 +static int kgdbhook_init_channel(void *handle)
18954 {
18955 return 0;
18956 }
18957
18958 -static void kgdbhook_init_info(struct dec_serial* info)
18959 +static void kgdbhook_init_info(void *handle)
18960 {
18961 }
18962
18963 -static void kgdbhook_rx_char(struct dec_serial* info,
18964 - unsigned char ch, unsigned char stat)
18965 +static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
18966 {
18967 + struct dec_serial *info = handle;
18968 +
18969 + if (fl != TTY_NORMAL)
18970 + return;
18971 if (ch == 0x03 || ch == '$')
18972 breakpoint();
18973 - if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
18974 - write_zsreg(info->zs_channel, 0, ERR_RES);
18975 }
18976
18977 /* This sets up the serial port we're using, and turns on
18978 @@ -2360,11 +2347,11 @@
18979 * for /dev/ttyb which is determined in setup_arch() from the
18980 * boot command line flags.
18981 */
18982 -struct zs_hook zs_kgdbhook = {
18983 - init_channel : kgdbhook_init_channel,
18984 - init_info : kgdbhook_init_info,
18985 - cflags : B38400|CS8|CLOCAL,
18986 - rx_char : kgdbhook_rx_char,
18987 +struct dec_serial_hook zs_kgdbhook = {
18988 + .init_channel = kgdbhook_init_channel,
18989 + .init_info = kgdbhook_init_info,
18990 + .rx_char = kgdbhook_rx_char,
18991 + .cflags = B38400 | CS8 | CLOCAL,
18992 }
18993
18994 void __init zs_kgdb_hook(int tty_num)
18995 diff -Nur linux-2.4.29/drivers/tc/zs.h linux-mips/drivers/tc/zs.h
18996 --- linux-2.4.29/drivers/tc/zs.h 2004-02-18 14:36:31.000000000 +0100
18997 +++ linux-mips/drivers/tc/zs.h 2004-07-01 15:28:54.000000000 +0200
18998 @@ -1,14 +1,18 @@
18999 /*
19000 - * macserial.h: Definitions for the Macintosh Z8530 serial driver.
19001 + * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
19002 *
19003 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
19004 + * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
19005 *
19006 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
19007 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
19008 + * Copyright (C) 2004 Maciej W. Rozycki
19009 */
19010 #ifndef _DECSERIAL_H
19011 #define _DECSERIAL_H
19012
19013 +#include <asm/dec/serial.h>
19014 +
19015 #define NUM_ZSREGS 16
19016
19017 struct serial_struct {
19018 @@ -89,63 +93,50 @@
19019 unsigned char curregs[NUM_ZSREGS];
19020 };
19021
19022 -struct dec_serial;
19023 -
19024 -struct zs_hook {
19025 - int (*init_channel)(struct dec_serial* info);
19026 - void (*init_info)(struct dec_serial* info);
19027 - void (*rx_char)(unsigned char ch, unsigned char stat);
19028 - int (*poll_rx_char)(struct dec_serial* info);
19029 - int (*poll_tx_char)(struct dec_serial* info,
19030 - unsigned char ch);
19031 - unsigned cflags;
19032 -};
19033 -
19034 struct dec_serial {
19035 - struct dec_serial *zs_next; /* For IRQ servicing chain */
19036 - struct dec_zschannel *zs_channel; /* Channel registers */
19037 - struct dec_zschannel *zs_chan_a; /* A side registers */
19038 - unsigned char read_reg_zero;
19039 -
19040 - char soft_carrier; /* Use soft carrier on this channel */
19041 - char break_abort; /* Is serial console in, so process brk/abrt */
19042 - struct zs_hook *hook; /* Hook on this channel */
19043 - char is_cons; /* Is this our console. */
19044 - unsigned char tx_active; /* character is being xmitted */
19045 - unsigned char tx_stopped; /* output is suspended */
19046 -
19047 - /* We need to know the current clock divisor
19048 - * to read the bps rate the chip has currently
19049 - * loaded.
19050 + struct dec_serial *zs_next; /* For IRQ servicing chain. */
19051 + struct dec_zschannel *zs_channel; /* Channel registers. */
19052 + struct dec_zschannel *zs_chan_a; /* A side registers. */
19053 + unsigned char read_reg_zero;
19054 +
19055 + struct dec_serial_hook *hook; /* Hook on this channel. */
19056 + int tty_break; /* Set on BREAK condition. */
19057 + int is_cons; /* Is this our console. */
19058 + int tx_active; /* Char is being xmitted. */
19059 + int tx_stopped; /* Output is suspended. */
19060 +
19061 + /*
19062 + * We need to know the current clock divisor
19063 + * to read the bps rate the chip has currently loaded.
19064 */
19065 - unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
19066 - int zs_baud;
19067 + int clk_divisor; /* May be 1, 16, 32, or 64. */
19068 + int zs_baud;
19069
19070 - char change_needed;
19071 + char change_needed;
19072
19073 int magic;
19074 int baud_base;
19075 int port;
19076 int irq;
19077 - int flags; /* defined in tty.h */
19078 - int type; /* UART type */
19079 + int flags; /* Defined in tty.h. */
19080 + int type; /* UART type. */
19081 struct tty_struct *tty;
19082 int read_status_mask;
19083 int ignore_status_mask;
19084 int timeout;
19085 int xmit_fifo_size;
19086 int custom_divisor;
19087 - int x_char; /* xon/xoff character */
19088 + int x_char; /* XON/XOFF character. */
19089 int close_delay;
19090 unsigned short closing_wait;
19091 unsigned short closing_wait2;
19092 unsigned long event;
19093 unsigned long last_active;
19094 int line;
19095 - int count; /* # of fd on device */
19096 - int blocked_open; /* # of blocked opens */
19097 - long session; /* Session of opening process */
19098 - long pgrp; /* pgrp of opening process */
19099 + int count; /* # of fds on device. */
19100 + int blocked_open; /* # of blocked opens. */
19101 + long session; /* Sess of opening process. */
19102 + long pgrp; /* Pgrp of opening process. */
19103 unsigned char *xmit_buf;
19104 int xmit_head;
19105 int xmit_tail;
19106 diff -Nur linux-2.4.29/drivers/video/Config.in linux-mips/drivers/video/Config.in
19107 --- linux-2.4.29/drivers/video/Config.in 2004-02-18 14:36:31.000000000 +0100
19108 +++ linux-mips/drivers/video/Config.in 2005-02-12 04:07:18.000000000 +0100
19109 @@ -87,8 +87,8 @@
19110 if [ "$CONFIG_HP300" = "y" ]; then
19111 define_bool CONFIG_FB_HP300 y
19112 fi
19113 - if [ "$ARCH" = "alpha" ]; then
19114 - tristate ' TGA framebuffer support' CONFIG_FB_TGA
19115 + if [ "$ARCH" = "alpha" -o "$CONFIG_TC" = "y" ]; then
19116 + tristate ' TGA/SFB+ framebuffer support' CONFIG_FB_TGA
19117 fi
19118 if [ "$CONFIG_X86" = "y" ]; then
19119 bool ' VESA VGA graphics console' CONFIG_FB_VESA
19120 @@ -121,6 +121,17 @@
19121 hex ' Framebuffer Base Address' CONFIG_E1355_FB_BASE a8200000
19122 fi
19123 fi
19124 + if [ "$CONFIG_SOC_AU1100" = "y" ]; then
19125 + bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
19126 + fi
19127 +
19128 + if [ "$CONFIG_SOC_AU1200" = "y" ]; then
19129 + bool ' Au1200 LCD Driver' CONFIG_FB_AU1200
19130 + if [ "$CONFIG_FB_AU1200" = "y" ]; then
19131 + int ' Number of planes (1 to 4)' CONFIG_FB_AU1200_DEVS 1
19132 + fi
19133 + fi
19134 +
19135 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
19136 if [ "$CONFIG_PCI" != "n" ]; then
19137 tristate ' Matrox acceleration (EXPERIMENTAL)' CONFIG_FB_MATROX
19138 @@ -178,9 +189,6 @@
19139 bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
19140 bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
19141 fi
19142 - if [ "$CONFIG_SOC_AU1100" = "y" ]; then
19143 - bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
19144 - fi
19145 fi
19146 fi
19147 fi
19148 diff -Nur linux-2.4.29/drivers/video/Makefile linux-mips/drivers/video/Makefile
19149 --- linux-2.4.29/drivers/video/Makefile 2004-02-18 14:36:31.000000000 +0100
19150 +++ linux-mips/drivers/video/Makefile 2005-02-12 04:07:18.000000000 +0100
19151 @@ -87,6 +87,7 @@
19152 obj-$(CONFIG_FB_MAXINE) += maxinefb.o
19153 obj-$(CONFIG_FB_TX3912) += tx3912fb.o
19154 obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
19155 +obj-$(CONFIG_FB_AU1200) += au1200fb.o fbgen.o
19156 obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
19157
19158 subdir-$(CONFIG_STI_CONSOLE) += sti
19159 diff -Nur linux-2.4.29/drivers/video/au1200fb.c linux-mips/drivers/video/au1200fb.c
19160 --- linux-2.4.29/drivers/video/au1200fb.c 1970-01-01 01:00:00.000000000 +0100
19161 +++ linux-mips/drivers/video/au1200fb.c 2005-02-11 22:16:44.000000000 +0100
19162 @@ -0,0 +1,1599 @@
19163 +/*
19164 + * BRIEF MODULE DESCRIPTION
19165 + * Au1200 LCD Driver.
19166 + *
19167 + * Copyright 2004 AMD
19168 + * Author: AMD
19169 + *
19170 + * Based on:
19171 + * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
19172 + * Created 28 Dec 1997 by Geert Uytterhoeven
19173 + *
19174 + * This program is free software; you can redistribute it and/or modify it
19175 + * under the terms of the GNU General Public License as published by the
19176 + * Free Software Foundation; either version 2 of the License, or (at your
19177 + * option) any later version.
19178 + *
19179 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19180 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19181 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
19182 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19183 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19184 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19185 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19186 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19187 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19188 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19189 + *
19190 + * You should have received a copy of the GNU General Public License along
19191 + * with this program; if not, write to the Free Software Foundation, Inc.,
19192 + * 675 Mass Ave, Cambridge, MA 02139, USA.
19193 + */
19194 +
19195 +#include <linux/module.h>
19196 +#include <linux/kernel.h>
19197 +#include <linux/errno.h>
19198 +#include <linux/string.h>
19199 +#include <linux/mm.h>
19200 +#include <linux/tty.h>
19201 +#include <linux/slab.h>
19202 +#include <linux/delay.h>
19203 +#include <linux/fb.h>
19204 +#include <linux/init.h>
19205 +#include <asm/uaccess.h>
19206 +
19207 +#include <asm/au1000.h>
19208 +#include <asm/au1xxx_gpio.h>
19209 +#include "au1200fb.h"
19210 +
19211 +#include <video/fbcon.h>
19212 +#include <video/fbcon-cfb16.h>
19213 +#include <video/fbcon-cfb32.h>
19214 +#define CMAPSIZE 16
19215 +
19216 +#ifdef CONFIG_MIPS_PB1200
19217 +#include <asm/pb1200.h>
19218 +#endif
19219 +
19220 +#ifdef CONFIG_MIPS_DB1200
19221 +#include <asm/db1200.h>
19222 +#endif
19223 +
19224 +#ifdef CONFIG_MIPS_FICMMP
19225 +#include <asm/ficmmp.h>
19226 +#endif
19227 +
19228 +#define AU1200_LCD_GET_WINENABLE 1
19229 +#define AU1200_LCD_SET_WINENABLE 2
19230 +#define AU1200_LCD_GET_WINLOCATION 3
19231 +#define AU1200_LCD_SET_WINLOCATION 4
19232 +#define AU1200_LCD_GET_WINSIZE 5
19233 +#define AU1200_LCD_SET_WINSIZE 6
19234 +#define AU1200_LCD_GET_BACKCOLOR 7
19235 +#define AU1200_LCD_SET_BACKCOLOR 8
19236 +#define AU1200_LCD_GET_COLORKEY 9
19237 +#define AU1200_LCD_SET_COLORKEY 10
19238 +#define AU1200_LCD_GET_PANEL 11
19239 +#define AU1200_LCD_SET_PANEL 12
19240 +
19241 +typedef struct au1200_lcd_getset_t
19242 +{
19243 + unsigned int subcmd;
19244 + union {
19245 + struct {
19246 + int enable;
19247 + } winenable;
19248 + struct {
19249 + int x, y;
19250 + } winlocation;
19251 + struct {
19252 + int hsz, vsz;
19253 + } winsize;
19254 + struct {
19255 + unsigned int color;
19256 + } backcolor;
19257 + struct {
19258 + unsigned int key;
19259 + unsigned int mask;
19260 + } colorkey;
19261 + struct {
19262 + int panel;
19263 + char desc[80];
19264 + } panel;
19265 + };
19266 +} au1200_lcd_getset_t;
19267 +
19268 +AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;
19269 +static int window_index = 0; /* default is zero */
19270 +static int panel_index = 0; /* default is zero */
19271 +
19272 +struct window_settings
19273 +{
19274 + unsigned char name[64];
19275 + uint32 mode_backcolor;
19276 + uint32 mode_colorkey;
19277 + uint32 mode_colorkeymsk;
19278 + struct
19279 + {
19280 + int xres;
19281 + int yres;
19282 + int xpos;
19283 + int ypos;
19284 + uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
19285 + uint32 mode_winenable;
19286 + } w[4];
19287 +};
19288 +
19289 +struct panel_settings
19290 +{
19291 + unsigned char name[64];
19292 + /* panel physical dimensions */
19293 + uint32 Xres;
19294 + uint32 Yres;
19295 + /* panel timings */
19296 + uint32 mode_screen;
19297 + uint32 mode_horztiming;
19298 + uint32 mode_verttiming;
19299 + uint32 mode_clkcontrol;
19300 + uint32 mode_pwmdiv;
19301 + uint32 mode_pwmhi;
19302 + uint32 mode_outmask;
19303 + uint32 mode_fifoctrl;
19304 + uint32 mode_toyclksrc;
19305 + uint32 mode_backlight;
19306 + uint32 mode_auxpll;
19307 + int (*device_init)(void);
19308 + int (*device_shutdown)(void);
19309 +};
19310 +
19311 +#if defined(__BIG_ENDIAN)
19312 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
19313 +#else
19314 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
19315 +#endif
19316 +
19317 +static int panel_init (void);
19318 +static int panel_shutdown (void);
19319 +
19320 +
19321 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
19322 +extern int focus_init_hdtv(void);
19323 +extern int focus_init_component(void);
19324 +extern int focus_init_cvsv(void);
19325 +extern int focus_shutdown(void);
19326 +#endif
19327 +
19328 +/*
19329 + * Default window configurations
19330 + */
19331 +static struct window_settings windows[] =
19332 +{
19333 + { /* Index 0 */
19334 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
19335 + /* mode_backcolor */ 0x006600ff,
19336 + /* mode_colorkey,msk*/ 0, 0,
19337 + {
19338 + {
19339 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19340 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19341 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
19342 + },
19343 + {
19344 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19345 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19346 + /* mode_winenable*/ 0,
19347 + },
19348 + {
19349 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19350 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19351 + /* mode_winenable*/ 0,
19352 + },
19353 + {
19354 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19355 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19356 + /* mode_winenable*/ 0,
19357 + },
19358 + },
19359 + },
19360 +
19361 + { /* Index 1 */
19362 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
19363 + /* mode_backcolor */ 0x006600ff,
19364 + /* mode_colorkey,msk*/ 0, 0,
19365 + {
19366 + {
19367 + /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
19368 +#if 0
19369 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19370 +#endif
19371 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00,
19372 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
19373 + },
19374 + {
19375 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
19376 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
19377 + /* mode_winenable*/ 0,
19378 + },
19379 + {
19380 + /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
19381 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19382 + /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
19383 + },
19384 + {
19385 + /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
19386 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
19387 + /* mode_winenable*/ 0,
19388 + },
19389 + },
19390 + },
19391 + /* Need VGA 640 @ 24bpp, @ 32bpp */
19392 + /* Need VGA 800 @ 24bpp, @ 32bpp */
19393 + /* Need VGA 1024 @ 24bpp, @ 32bpp */
19394 +} ;
19395 +
19396 +/*
19397 + * Controller configurations for various panels.
19398 + */
19399 +static struct panel_settings panels[] =
19400 +{
19401 + { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */
19402 + "VGA_320x240",
19403 + 320, 240,
19404 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
19405 + /* mode_horztiming */ 0x00c4623b,
19406 + /* mode_verttiming */ 0x00502814,
19407 + /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */
19408 + /* mode_pwmdiv */ 0x00000000,
19409 + /* mode_pwmhi */ 0x00000000,
19410 + /* mode_outmask */ 0x00FFFFFF,
19411 + /* mode_fifoctrl */ 0x2f2f2f2f,
19412 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19413 + /* mode_backlight */ 0x00000000,
19414 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19415 + /* device_init */ NULL,
19416 + /* device_shutdown */ NULL,
19417 + },
19418 +
19419 + { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */
19420 + "VGA_640x480",
19421 + 640, 480,
19422 + /* mode_screen */ 0x13f9df80,
19423 + /* mode_horztiming */ 0x003c5859,
19424 + /* mode_verttiming */ 0x00741201,
19425 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
19426 + /* mode_pwmdiv */ 0x00000000,
19427 + /* mode_pwmhi */ 0x00000000,
19428 + /* mode_outmask */ 0x00FFFFFF,
19429 + /* mode_fifoctrl */ 0x2f2f2f2f,
19430 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19431 + /* mode_backlight */ 0x00000000,
19432 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19433 + /* device_init */ NULL,
19434 + /* device_shutdown */ NULL,
19435 + },
19436 +
19437 + { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */
19438 + "SVGA_800x600",
19439 + 800, 600,
19440 + /* mode_screen */ 0x18fa5780,
19441 + /* mode_horztiming */ 0x00dc7e77,
19442 + /* mode_verttiming */ 0x00584805,
19443 + /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */
19444 + /* mode_pwmdiv */ 0x00000000,
19445 + /* mode_pwmhi */ 0x00000000,
19446 + /* mode_outmask */ 0x00FFFFFF,
19447 + /* mode_fifoctrl */ 0x2f2f2f2f,
19448 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19449 + /* mode_backlight */ 0x00000000,
19450 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19451 + /* device_init */ NULL,
19452 + /* device_shutdown */ NULL,
19453 + },
19454 +
19455 + { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */
19456 + "XVGA_1024x768",
19457 + 1024, 768,
19458 + /* mode_screen */ 0x1ffaff80,
19459 + /* mode_horztiming */ 0x007d0e57,
19460 + /* mode_verttiming */ 0x00740a01,
19461 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
19462 + /* mode_pwmdiv */ 0x00000000,
19463 + /* mode_pwmhi */ 0x00000000,
19464 + /* mode_outmask */ 0x00FFFFFF,
19465 + /* mode_fifoctrl */ 0x2f2f2f2f,
19466 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19467 + /* mode_backlight */ 0x00000000,
19468 + /* mode_auxpll */ 6, /* 72MHz AUXPLL */
19469 + /* device_init */ NULL,
19470 + /* device_shutdown */ NULL,
19471 + },
19472 +
19473 + { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */
19474 + "XVGA_1280x1024",
19475 + 1280, 1024,
19476 + /* mode_screen */ 0x27fbff80,
19477 + /* mode_horztiming */ 0x00cdb2c7,
19478 + /* mode_verttiming */ 0x00600002,
19479 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
19480 + /* mode_pwmdiv */ 0x00000000,
19481 + /* mode_pwmhi */ 0x00000000,
19482 + /* mode_outmask */ 0x00FFFFFF,
19483 + /* mode_fifoctrl */ 0x2f2f2f2f,
19484 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
19485 + /* mode_backlight */ 0x00000000,
19486 + /* mode_auxpll */ 10, /* 120MHz AUXPLL */
19487 + /* device_init */ NULL,
19488 + /* device_shutdown */ NULL,
19489 + },
19490 +
19491 + { /* Index 5: Samsung 1024x768 TFT */
19492 + "Samsung_1024x768_TFT",
19493 + 1024, 768,
19494 + /* mode_screen */ 0x1ffaff80,
19495 + /* mode_horztiming */ 0x018cc677,
19496 + /* mode_verttiming */ 0x00241217,
19497 + /* mode_clkcontrol */ 0x00000000, /* SCB 0x1 /4=24Mhz */
19498 + /* mode_pwmdiv */ 0x8000063f, /* SCB 0x0 */
19499 + /* mode_pwmhi */ 0x03400000, /* SCB 0x0 */
19500 + /* mode_outmask */ 0x00fcfcfc,
19501 + /* mode_fifoctrl */ 0x2f2f2f2f,
19502 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19503 + /* mode_backlight */ 0x00000000,
19504 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19505 + /* device_init */ panel_init,
19506 + /* device_shutdown */ panel_shutdown,
19507 + },
19508 +
19509 + { /* Index 6: Toshiba 640x480 TFT */
19510 + "Toshiba_640x480_TFT",
19511 + 640, 480,
19512 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19513 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
19514 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) ,
19515 + /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */
19516 + /* mode_pwmdiv */ 0x8000063f,
19517 + /* mode_pwmhi */ 0x03400000,
19518 + /* mode_outmask */ 0x00fcfcfc,
19519 + /* mode_fifoctrl */ 0x2f2f2f2f,
19520 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19521 + /* mode_backlight */ 0x00000000,
19522 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19523 + /* device_init */ panel_init,
19524 + /* device_shutdown */ panel_shutdown,
19525 + },
19526 +
19527 + { /* Index 7: Sharp 320x240 TFT */
19528 + "Sharp_320x240_TFT",
19529 + 320, 240,
19530 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
19531 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
19532 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) ,
19533 + /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */
19534 + /* mode_pwmdiv */ 0x8000063f,
19535 + /* mode_pwmhi */ 0x03400000,
19536 + /* mode_outmask */ 0x00fcfcfc,
19537 + /* mode_fifoctrl */ 0x2f2f2f2f,
19538 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
19539 + /* mode_backlight */ 0x00000000,
19540 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19541 + /* device_init */ panel_init,
19542 + /* device_shutdown */ panel_shutdown,
19543 + },
19544 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
19545 + { /* Index 8: Focus FS453 TV-Out 640x480 */
19546 + "FS453_640x480 (Composite/S-Video)",
19547 + 640, 480,
19548 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19549 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
19550 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
19551 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19552 + /* mode_pwmdiv */ 0x00000000,
19553 + /* mode_pwmhi */ 0x00000000,
19554 + /* mode_outmask */ 0x00FFFFFF,
19555 + /* mode_fifoctrl */ 0x2f2f2f2f,
19556 + /* mode_toyclksrc */ 0x00000000,
19557 + /* mode_backlight */ 0x00000000,
19558 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19559 + /* device_init */ focus_init_cvsv,
19560 + /* device_shutdown */ focus_shutdown,
19561 + },
19562 +
19563 + { /* Index 9: Focus FS453 TV-Out 640x480 */
19564 + "FS453_640x480 (Component Video)",
19565 + 640, 480,
19566 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
19567 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
19568 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
19569 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19570 + /* mode_pwmdiv */ 0x00000000,
19571 + /* mode_pwmhi */ 0x00000000,
19572 + /* mode_outmask */ 0x00FFFFFF,
19573 + /* mode_fifoctrl */ 0x2f2f2f2f,
19574 + /* mode_toyclksrc */ 0x00000000,
19575 + /* mode_backlight */ 0x00000000,
19576 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19577 + /* device_init */ focus_init_component,
19578 + /* device_shutdown */ focus_shutdown,
19579 + },
19580 +
19581 + { /* Index 10: Focus FS453 TV-Out 640x480 */
19582 + "FS453_640x480 (HDTV)",
19583 + 720, 480,
19584 + /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480),
19585 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64),
19586 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7),
19587 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
19588 + /* mode_pwmdiv */ 0x00000000,
19589 + /* mode_pwmhi */ 0x00000000,
19590 + /* mode_outmask */ 0x00FFFFFF,
19591 + /* mode_fifoctrl */ 0x2f2f2f2f,
19592 + /* mode_toyclksrc */ 0x00000000,
19593 + /* mode_backlight */ 0x00000000,
19594 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
19595 + /* device_init */ focus_init_hdtv,
19596 + /* device_shutdown */ focus_shutdown,
19597 + },
19598 +#endif
19599 +};
19600 +
19601 +#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))
19602 +
19603 +static struct window_settings *win;
19604 +static struct panel_settings *panel;
19605 +
19606 +struct au1200fb_info {
19607 + struct fb_info_gen gen;
19608 + unsigned long fb_virt_start;
19609 + unsigned long fb_size;
19610 + unsigned long fb_phys;
19611 + int mmaped;
19612 + int nohwcursor;
19613 + int noblanking;
19614 +
19615 + struct { unsigned red, green, blue, pad; } palette[256];
19616 +
19617 +#if defined(FBCON_HAS_CFB16)
19618 + u16 fbcon_cmap16[16];
19619 +#endif
19620 +#if defined(FBCON_HAS_CFB32)
19621 + u32 fbcon_cmap32[16];
19622 +#endif
19623 +};
19624 +
19625 +
19626 +struct au1200fb_par {
19627 + struct fb_var_screeninfo var;
19628 +
19629 + int line_length; /* in bytes */
19630 + int cmap_len; /* color-map length */
19631 +};
19632 +
19633 +#ifndef CONFIG_FB_AU1200_DEVS
19634 +#define CONFIG_FB_AU1200_DEVS 1
19635 +#endif
19636 +
19637 +static struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];
19638 +static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];
19639 +static struct display disps[CONFIG_FB_AU1200_DEVS];
19640 +
19641 +int au1200fb_init(void);
19642 +void au1200fb_setup(char *options, int *ints);
19643 +static int au1200fb_mmap(struct fb_info *fb, struct file *file,
19644 + struct vm_area_struct *vma);
19645 +static int au1200_blank(int blank_mode, struct fb_info_gen *info);
19646 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
19647 + u_long arg, int con, struct fb_info *info);
19648 +
19649 +void au1200_nocursor(struct display *p, int mode, int xx, int yy){};
19650 +
19651 +static int au1200_setlocation (int plane, int xpos, int ypos);
19652 +static int au1200_setsize (int plane, int xres, int yres);
19653 +static void au1200_setmode(int plane);
19654 +static void au1200_setpanel (struct panel_settings *newpanel);
19655 +
19656 +static struct fb_ops au1200fb_ops = {
19657 + owner: THIS_MODULE,
19658 + fb_get_fix: fbgen_get_fix,
19659 + fb_get_var: fbgen_get_var,
19660 + fb_set_var: fbgen_set_var,
19661 + fb_get_cmap: fbgen_get_cmap,
19662 + fb_set_cmap: fbgen_set_cmap,
19663 + fb_pan_display: fbgen_pan_display,
19664 + fb_ioctl: au1200fb_ioctl,
19665 + fb_mmap: au1200fb_mmap,
19666 +};
19667 +
19668 +
19669 +static int panel_init (void)
19670 +{
19671 +#if defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200)
19672 + /* Apply power */
19673 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
19674 + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
19675 + /*printk("panel_init(%s)\n", panel->name); */
19676 +#elif defined(CONFIG_MIPS_FICMMP)
19677 + /*Enable data buffers*/
19678 + ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
19679 + /*Take LCD out of reset*/
19680 + ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
19681 +#endif
19682 +}
19683 +
19684 +static int panel_shutdown (void)
19685 +{
19686 +#if defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200)
19687 + /* Remove power */
19688 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
19689 + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
19690 + /*printk("panel_shutdown(%s)\n", panel->name);*/
19691 +#elif defined(CONFIG_MIPS_FICMMP)
19692 + /*Disable data buffers*/
19693 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
19694 + /*Put LCD in reset, remove power*/
19695 + ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
19696 +#endif
19697 +}
19698 +
19699 +static int
19700 +winbpp (unsigned int winctrl1)
19701 +{
19702 + /* how many bytes of memory are needed for each pixel format */
19703 + switch (winctrl1 & LCD_WINCTRL1_FRM)
19704 + {
19705 + case LCD_WINCTRL1_FRM_1BPP: return 1; break;
19706 + case LCD_WINCTRL1_FRM_2BPP: return 2; break;
19707 + case LCD_WINCTRL1_FRM_4BPP: return 4; break;
19708 + case LCD_WINCTRL1_FRM_8BPP: return 8; break;
19709 + case LCD_WINCTRL1_FRM_12BPP: return 16; break;
19710 + case LCD_WINCTRL1_FRM_16BPP655: return 16; break;
19711 + case LCD_WINCTRL1_FRM_16BPP565: return 16; break;
19712 + case LCD_WINCTRL1_FRM_16BPP556: return 16; break;
19713 + case LCD_WINCTRL1_FRM_16BPPI1555: return 16; break;
19714 + case LCD_WINCTRL1_FRM_16BPPI5551: return 16; break;
19715 + case LCD_WINCTRL1_FRM_16BPPA1555: return 16; break;
19716 + case LCD_WINCTRL1_FRM_16BPPA5551: return 16; break;
19717 + case LCD_WINCTRL1_FRM_24BPP: return 32; break;
19718 + case LCD_WINCTRL1_FRM_32BPP: return 32; break;
19719 + default: return 0; break;
19720 + }
19721 +}
19722 +
19723 +static int
19724 +fbinfo2index (struct fb_info *fb_info)
19725 +{
19726 + int i;
19727 + for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i)
19728 + {
19729 + if (fb_info == (struct fb_info *)(&fb_infos[i]))
19730 + return i;
19731 + }
19732 + printk("au1200fb: ERROR: fbinfo2index failed!\n");
19733 + return -1;
19734 +}
19735 +
19736 +static void au1200_detect(void)
19737 +{
19738 + /*
19739 + * This function should detect the current video mode settings
19740 + * and store it as the default video mode
19741 + * Yeh, well, we're not going to change any settings so we're
19742 + * always stuck with the default ...
19743 + */
19744 +}
19745 +
19746 +static int au1200_encode_fix(struct fb_fix_screeninfo *fix,
19747 + const void *_par, struct fb_info_gen *_info)
19748 +{
19749 + struct au1200fb_info *info = (struct au1200fb_info *) _info;
19750 + struct au1200fb_par *par = (struct au1200fb_par *) _par;
19751 + int plane;
19752 +
19753 + plane = fbinfo2index(info);
19754 +
19755 + memset(fix, 0, sizeof(struct fb_fix_screeninfo));
19756 +
19757 + fix->smem_start = info->fb_phys;
19758 + fix->smem_len = info->fb_size;
19759 + fix->type = FB_TYPE_PACKED_PIXELS;
19760 + fix->type_aux = 0;
19761 + fix->visual = (par->var.bits_per_pixel == 8) ?
19762 + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
19763 + fix->ywrapstep = 0;
19764 + fix->xpanstep = 1;
19765 + fix->ypanstep = 1;
19766 + /* FIX!!!! why doesn't par->line_length work???? it does for au1100 */
19767 + fix->line_length = fb_pars[plane].line_length; /*par->line_length;*/
19768 + return 0;
19769 +}
19770 +
19771 +static void set_color_bitfields(struct fb_var_screeninfo *var, int plane)
19772 +{
19773 + if (var->bits_per_pixel == 8)
19774 + {
19775 + var->red.offset = 0;
19776 + var->red.length = 8;
19777 + var->green.offset = 0;
19778 + var->green.length = 8;
19779 + var->blue.offset = 0;
19780 + var->blue.length = 8;
19781 + var->transp.offset = 0;
19782 + var->transp.length = 0;
19783 + }
19784 + else
19785 +
19786 + if (var->bits_per_pixel == 16)
19787 + {
19788 + /* FIX!!! How does CCO affect this ? */
19789 + /* FIX!!! Not exactly sure how many of these work with FB */
19790 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
19791 + {
19792 + case LCD_WINCTRL1_FRM_16BPP655:
19793 + var->red.offset = 10;
19794 + var->red.length = 6;
19795 + var->green.offset = 5;
19796 + var->green.length = 5;
19797 + var->blue.offset = 0;
19798 + var->blue.length = 5;
19799 + var->transp.offset = 0;
19800 + var->transp.length = 0;
19801 + break;
19802 +
19803 + case LCD_WINCTRL1_FRM_16BPP565:
19804 + var->red.offset = 11;
19805 + var->red.length = 5;
19806 + var->green.offset = 5;
19807 + var->green.length = 6;
19808 + var->blue.offset = 0;
19809 + var->blue.length = 5;
19810 + var->transp.offset = 0;
19811 + var->transp.length = 0;
19812 + break;
19813 +
19814 + case LCD_WINCTRL1_FRM_16BPP556:
19815 + var->red.offset = 11;
19816 + var->red.length = 5;
19817 + var->green.offset = 6;
19818 + var->green.length = 5;
19819 + var->blue.offset = 0;
19820 + var->blue.length = 6;
19821 + var->transp.offset = 0;
19822 + var->transp.length = 0;
19823 + break;
19824 +
19825 + case LCD_WINCTRL1_FRM_16BPPI1555:
19826 + var->red.offset = 10;
19827 + var->red.length = 5;
19828 + var->green.offset = 5;
19829 + var->green.length = 5;
19830 + var->blue.offset = 0;
19831 + var->blue.length = 5;
19832 + var->transp.offset = 0;
19833 + var->transp.length = 0;
19834 + break;
19835 +
19836 + case LCD_WINCTRL1_FRM_16BPPI5551:
19837 + var->red.offset = 11;
19838 + var->red.length = 5;
19839 + var->green.offset = 6;
19840 + var->green.length = 5;
19841 + var->blue.offset = 1;
19842 + var->blue.length = 5;
19843 + var->transp.offset = 0;
19844 + var->transp.length = 0;
19845 + break;
19846 +
19847 + case LCD_WINCTRL1_FRM_16BPPA1555:
19848 + var->red.offset = 10;
19849 + var->red.length = 5;
19850 + var->green.offset = 5;
19851 + var->green.length = 5;
19852 + var->blue.offset = 0;
19853 + var->blue.length = 5;
19854 + var->transp.offset = 15;
19855 + var->transp.length = 1;
19856 + break;
19857 +
19858 + case LCD_WINCTRL1_FRM_16BPPA5551:
19859 + var->red.offset = 11;
19860 + var->red.length = 5;
19861 + var->green.offset = 6;
19862 + var->green.length = 5;
19863 + var->blue.offset = 1;
19864 + var->blue.length = 5;
19865 + var->transp.offset = 0;
19866 + var->transp.length = 1;
19867 + break;
19868 +
19869 + default:
19870 + printk("ERROR: Invalid PIXEL FORMAT!!!\n"); break;
19871 + }
19872 + }
19873 + else
19874 +
19875 + if (var->bits_per_pixel == 32)
19876 + {
19877 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
19878 + {
19879 + case LCD_WINCTRL1_FRM_24BPP:
19880 + var->red.offset = 16;
19881 + var->red.length = 8;
19882 + var->green.offset = 8;
19883 + var->green.length = 8;
19884 + var->blue.offset = 0;
19885 + var->blue.length = 8;
19886 + var->transp.offset = 0;
19887 + var->transp.length = 0;
19888 + break;
19889 +
19890 + case LCD_WINCTRL1_FRM_32BPP:
19891 + var->red.offset = 16;
19892 + var->red.length = 8;
19893 + var->green.offset = 8;
19894 + var->green.length = 8;
19895 + var->blue.offset = 0;
19896 + var->blue.length = 8;
19897 + var->transp.offset = 24;
19898 + var->transp.length = 8;
19899 + break;
19900 + }
19901 + }
19902 + var->red.msb_right = 0;
19903 + var->green.msb_right = 0;
19904 + var->blue.msb_right = 0;
19905 + var->transp.msb_right = 0;
19906 +#if 0
19907 +printk("set_color_bitfields(a=%d, r=%d..%d, g=%d..%d, b=%d..%d)\n",
19908 + var->transp.offset,
19909 + var->red.offset+var->red.length-1, var->red.offset,
19910 + var->green.offset+var->green.length-1, var->green.offset,
19911 + var->blue.offset+var->blue.length-1, var->blue.offset);
19912 +#endif
19913 +}
19914 +
19915 +static int au1200_decode_var(const struct fb_var_screeninfo *var,
19916 + void *_par, struct fb_info_gen *_info)
19917 +{
19918 + struct au1200fb_par *par = (struct au1200fb_par *)_par;
19919 + int plane, bpp;
19920 +
19921 + plane = fbinfo2index((struct fb_info *)_info);
19922 +
19923 + /*
19924 + * Don't allow setting any of these yet: xres and yres don't
19925 + * make sense for LCD panels.
19926 + */
19927 + if (var->xres != win->w[plane].xres ||
19928 + var->yres != win->w[plane].yres ||
19929 + var->xres != win->w[plane].xres ||
19930 + var->yres != win->w[plane].yres) {
19931 + return -EINVAL;
19932 + }
19933 +
19934 + bpp = winbpp(win->w[plane].mode_winctrl1);
19935 + if(var->bits_per_pixel != bpp) {
19936 + /* on au1200, window pixel format is independent of panel pixel */
19937 + printk("WARNING: bits_per_pizel != panel->bpp\n");
19938 + }
19939 +
19940 + memset(par, 0, sizeof(struct au1200fb_par));
19941 + par->var = *var;
19942 +
19943 + /* FIX!!! */
19944 + switch (var->bits_per_pixel) {
19945 + case 8:
19946 + par->var.bits_per_pixel = 8;
19947 + break;
19948 + case 16:
19949 + par->var.bits_per_pixel = 16;
19950 + break;
19951 + case 24:
19952 + case 32:
19953 + par->var.bits_per_pixel = 32;
19954 + break;
19955 + default:
19956 + printk("color depth %d bpp not supported\n",
19957 + var->bits_per_pixel);
19958 + return -EINVAL;
19959 +
19960 + }
19961 + set_color_bitfields(&par->var, plane);
19962 + /* FIX!!! what is this for 24/32bpp? */
19963 + par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
19964 + return 0;
19965 +}
19966 +
19967 +static int au1200_encode_var(struct fb_var_screeninfo *var,
19968 + const void *par, struct fb_info_gen *_info)
19969 +{
19970 + *var = ((struct au1200fb_par *)par)->var;
19971 + return 0;
19972 +}
19973 +
19974 +static void
19975 +au1200_get_par(void *_par, struct fb_info_gen *_info)
19976 +{
19977 + int index;
19978 +
19979 + index = fbinfo2index((struct fb_info *)_info);
19980 + *(struct au1200fb_par *)_par = fb_pars[index];
19981 +}
19982 +
19983 +static void au1200_set_par(const void *par, struct fb_info_gen *info)
19984 +{
19985 + /* nothing to do: we don't change any settings */
19986 +}
19987 +
19988 +static int au1200_getcolreg(unsigned regno, unsigned *red, unsigned *green,
19989 + unsigned *blue, unsigned *transp,
19990 + struct fb_info *info)
19991 +{
19992 + struct au1200fb_info* i = (struct au1200fb_info*)info;
19993 +
19994 + if (regno > 255)
19995 + return 1;
19996 +
19997 + *red = i->palette[regno].red;
19998 + *green = i->palette[regno].green;
19999 + *blue = i->palette[regno].blue;
20000 + *transp = 0;
20001 +
20002 + return 0;
20003 +}
20004 +
20005 +static int au1200_setcolreg(unsigned regno, unsigned red, unsigned green,
20006 + unsigned blue, unsigned transp,
20007 + struct fb_info *info)
20008 +{
20009 + struct au1200fb_info* i = (struct au1200fb_info *)info;
20010 + u32 rgbcol;
20011 + int plane, bpp;
20012 +
20013 + plane = fbinfo2index((struct fb_info *)info);
20014 + bpp = winbpp(win->w[plane].mode_winctrl1);
20015 +
20016 + if (regno > 255)
20017 + return 1;
20018 +
20019 + i->palette[regno].red = red;
20020 + i->palette[regno].green = green;
20021 + i->palette[regno].blue = blue;
20022 +
20023 + switch(bpp) {
20024 +#ifdef FBCON_HAS_CFB8
20025 + case 8:
20026 + red >>= 10;
20027 + green >>= 10;
20028 + blue >>= 10;
20029 + panel_reg->lcd_pallettebase[regno] = (blue&0x1f) |
20030 + ((green&0x3f)<<5) | ((red&0x1f)<<11);
20031 + break;
20032 +#endif
20033 +#ifdef FBCON_HAS_CFB16
20034 +/* FIX!!!! depends upon pixel format */
20035 + case 16:
20036 + i->fbcon_cmap16[regno] =
20037 + ((red & 0xf800) >> 0) |
20038 + ((green & 0xfc00) >> 5) |
20039 + ((blue & 0xf800) >> 11);
20040 + break;
20041 +#endif
20042 +#ifdef FBCON_HAS_CFB32
20043 + case 32:
20044 + i->fbcon_cmap32[regno] =
20045 + (((u32 )transp & 0xff00) << 16) |
20046 + (((u32 )red & 0xff00) << 8) |
20047 + (((u32 )green & 0xff00)) |
20048 + (((u32 )blue & 0xff00) >> 8);
20049 + break;
20050 +#endif
20051 + default:
20052 + printk("unsupported au1200_setcolreg(%d)\n", bpp);
20053 + break;
20054 + }
20055 +
20056 + return 0;
20057 +}
20058 +
20059 +
20060 +static int au1200_blank(int blank_mode, struct fb_info_gen *_info)
20061 +{
20062 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_info;
20063 + int plane;
20064 +
20065 + /* Short-circuit screen blanking */
20066 + if (fb_info->noblanking)
20067 + return 0;
20068 +
20069 + plane = fbinfo2index((struct fb_info *)_info);
20070 +
20071 + switch (blank_mode) {
20072 + case VESA_NO_BLANKING:
20073 + /* printk("turn on panel\n"); */
20074 + if (panel->device_init) panel->device_init();
20075 + lcd->screen |= LCD_SCREEN_SEN;
20076 + /* FIX!!! Need panel poweron callback */
20077 + break;
20078 +
20079 + case VESA_VSYNC_SUSPEND:
20080 + case VESA_HSYNC_SUSPEND:
20081 + case VESA_POWERDOWN:
20082 + /* printk("turn off panel\n"); */
20083 + /* FIX!!! Need panel poweroff callback */
20084 + if (panel->device_shutdown) panel->device_shutdown();
20085 + lcd->screen &= ~LCD_SCREEN_SEN;
20086 + while ((lcd->intstatus & LCD_INT_SD) == 0)
20087 + ;
20088 + lcd->intstatus = LCD_INT_SD;
20089 + break;
20090 + default:
20091 + break;
20092 +
20093 + }
20094 + return 0;
20095 +}
20096 +
20097 +static void au1200_set_disp(const void *unused, struct display *disp,
20098 + struct fb_info_gen *info)
20099 +{
20100 + struct au1200fb_info *fb_info;
20101 + int plane;
20102 +
20103 + fb_info = (struct au1200fb_info *)info;
20104 +
20105 + disp->screen_base = (char *)fb_info->fb_virt_start;
20106 +
20107 + switch (disp->var.bits_per_pixel) {
20108 +#ifdef FBCON_HAS_CFB8
20109 + case 8:
20110 + disp->dispsw = &fbcon_cfb8;
20111 + if (fb_info->nohwcursor)
20112 + fbcon_cfb8.cursor = au1200_nocursor;
20113 + break;
20114 +#endif
20115 +#ifdef FBCON_HAS_CFB16
20116 + case 16:
20117 + disp->dispsw = &fbcon_cfb16;
20118 + disp->dispsw_data = fb_info->fbcon_cmap16;
20119 + if (fb_info->nohwcursor)
20120 + fbcon_cfb16.cursor = au1200_nocursor;
20121 + break;
20122 +#endif
20123 +#ifdef FBCON_HAS_CFB32
20124 + case 32:
20125 + disp->dispsw = &fbcon_cfb32;
20126 + disp->dispsw_data = fb_info->fbcon_cmap32;
20127 + if (fb_info->nohwcursor)
20128 + fbcon_cfb32.cursor = au1200_nocursor;
20129 + break;
20130 +#endif
20131 + default:
20132 + disp->dispsw = &fbcon_dummy;
20133 + disp->dispsw_data = NULL;
20134 + break;
20135 + }
20136 +}
20137 +
20138 +static int
20139 +au1200fb_mmap(struct fb_info *_fb,
20140 + struct file *file,
20141 + struct vm_area_struct *vma)
20142 +{
20143 + unsigned int len;
20144 + unsigned long start=0, off;
20145 +
20146 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_fb;
20147 +
20148 + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
20149 + return -EINVAL;
20150 + }
20151 +
20152 + start = fb_info->fb_phys & PAGE_MASK;
20153 + len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info->fb_size);
20154 +
20155 + off = vma->vm_pgoff << PAGE_SHIFT;
20156 +
20157 + if ((vma->vm_end - vma->vm_start + off) > len) {
20158 + return -EINVAL;
20159 + }
20160 +
20161 + off += start;
20162 + vma->vm_pgoff = off >> PAGE_SHIFT;
20163 +
20164 + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
20165 + pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
20166 +
20167 + /* This is an IO map - tell maydump to skip this VMA */
20168 + vma->vm_flags |= VM_IO;
20169 +
20170 + if (io_remap_page_range(vma->vm_start, off,
20171 + vma->vm_end - vma->vm_start,
20172 + vma->vm_page_prot)) {
20173 + return -EAGAIN;
20174 + }
20175 +
20176 + fb_info->mmaped = 1;
20177 + return 0;
20178 +}
20179 +
20180 +int au1200_pan_display(const struct fb_var_screeninfo *var,
20181 + struct fb_info_gen *info)
20182 +{
20183 + return 0;
20184 +}
20185 +
20186 +
20187 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
20188 + u_long arg, int con, struct fb_info *info)
20189 +{
20190 + int plane;
20191 +
20192 + plane = fbinfo2index(info);
20193 +
20194 + /* printk("au1200fb: ioctl %d on plane %d\n", cmd, plane); */
20195 +
20196 + if (cmd == 0x46FF)
20197 + {
20198 + au1200_lcd_getset_t iodata;
20199 +
20200 + if (copy_from_user(&iodata, (void *) arg, sizeof(au1200_lcd_getset_t)))
20201 + return -EFAULT;
20202 +
20203 + switch (iodata.subcmd)
20204 + {
20205 + case AU1200_LCD_GET_WINENABLE:
20206 + iodata.winenable.enable = (lcd->winenable & (1<<plane)) ? 1 : 0;
20207 + break;
20208 + case AU1200_LCD_SET_WINENABLE:
20209 + {
20210 + u32 winenable;
20211 + winenable = lcd->winenable;
20212 + winenable &= ~(1<<plane);
20213 + winenable |= (iodata.winenable.enable) ? (1<<plane) : 0;
20214 + lcd->winenable = winenable;
20215 + }
20216 + break;
20217 + case AU1200_LCD_GET_WINLOCATION:
20218 + iodata.winlocation.x =
20219 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
20220 + iodata.winlocation.y =
20221 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
20222 + break;
20223 + case AU1200_LCD_SET_WINLOCATION:
20224 + au1200_setlocation(plane, iodata.winlocation.x, iodata.winlocation.y);
20225 + break;
20226 + case AU1200_LCD_GET_WINSIZE:
20227 + iodata.winsize.hsz =
20228 + (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11;
20229 + iodata.winsize.vsz =
20230 + (lcd->window[plane].winctrl0 & LCD_WINCTRL1_SZY) >> 0;
20231 + break;
20232 + case AU1200_LCD_SET_WINSIZE:
20233 + au1200_setsize(plane, iodata.winsize.hsz, iodata.winsize.vsz);
20234 + break;
20235 + case AU1200_LCD_GET_BACKCOLOR:
20236 + iodata.backcolor.color = lcd->backcolor;
20237 + break;
20238 + case AU1200_LCD_SET_BACKCOLOR:
20239 + lcd->backcolor = iodata.backcolor.color;
20240 + break;
20241 + case AU1200_LCD_GET_COLORKEY:
20242 + iodata.colorkey.key = lcd->colorkey;
20243 + iodata.colorkey.mask = lcd->colorkeymsk;
20244 + break;
20245 + case AU1200_LCD_SET_COLORKEY:
20246 + lcd->colorkey = iodata.colorkey.key;
20247 + lcd->colorkeymsk = iodata.colorkey.mask;
20248 + break;
20249 + case AU1200_LCD_GET_PANEL:
20250 + iodata.panel.panel = panel_index;
20251 + break;
20252 + case AU1200_LCD_SET_PANEL:
20253 + if ((iodata.panel.panel >= 0) && (iodata.panel.panel < NUM_PANELS))
20254 + {
20255 + struct panel_settings *newpanel;
20256 + panel_index = iodata.panel.panel;
20257 + newpanel = &panels[panel_index];
20258 + au1200_setpanel(newpanel);
20259 + }
20260 + break;
20261 + }
20262 +
20263 + return copy_to_user((void *) arg, &iodata, sizeof(au1200_lcd_getset_t)) ? -EFAULT : 0;
20264 + }
20265 +
20266 + return -EINVAL;
20267 +}
20268 +
20269 +static struct fbgen_hwswitch au1200_switch = {
20270 + au1200_detect,
20271 + au1200_encode_fix,
20272 + au1200_decode_var,
20273 + au1200_encode_var,
20274 + au1200_get_par,
20275 + au1200_set_par,
20276 + au1200_getcolreg,
20277 + au1200_setcolreg,
20278 + au1200_pan_display,
20279 + au1200_blank,
20280 + au1200_set_disp
20281 +};
20282 +
20283 +static void au1200_setpanel (struct panel_settings *newpanel)
20284 +{
20285 + /*
20286 + * Perform global setup/init of LCD controller
20287 + */
20288 + uint32 winenable;
20289 +
20290 + /* Make sure all windows disabled */
20291 + winenable = lcd->winenable;
20292 + lcd->winenable = 0;
20293 +
20294 + /*
20295 + * Ensure everything is disabled before reconfiguring
20296 + */
20297 + if (lcd->screen & LCD_SCREEN_SEN)
20298 + {
20299 + /* Wait for vertical sync period */
20300 + lcd->intstatus = LCD_INT_SS;
20301 + while ((lcd->intstatus & LCD_INT_SS) == 0)
20302 + ;
20303 +
20304 + lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
20305 +
20306 + do
20307 + {
20308 + lcd->intstatus = lcd->intstatus; /*clear interrupts*/
20309 + }
20310 + /*wait for controller to shut down*/
20311 + while ((lcd->intstatus & LCD_INT_SD) == 0);
20312 +
20313 + /* Call shutdown of current panel (if up) */
20314 + /* this must occur last, because if an external clock is driving
20315 + the controller, the clock cannot be turned off before first
20316 + shutting down the controller.
20317 + */
20318 + if (panel->device_shutdown != NULL) panel->device_shutdown();
20319 + }
20320 +
20321 + panel = newpanel;
20322 +
20323 + printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
20324 +
20325 + /*
20326 + * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
20327 + */
20328 + /* FIX!!! if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT)) */
20329 + {
20330 + uint32 sys_clksrc;
20331 + au_writel(panel->mode_auxpll, SYS_AUXPLL);
20332 + sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
20333 + sys_clksrc |= panel->mode_toyclksrc;
20334 + au_writel(sys_clksrc, SYS_CLKSRC);
20335 + }
20336 +
20337 + /*
20338 + * Configure panel timings
20339 + */
20340 + lcd->screen = panel->mode_screen;
20341 + lcd->horztiming = panel->mode_horztiming;
20342 + lcd->verttiming = panel->mode_verttiming;
20343 + lcd->clkcontrol = panel->mode_clkcontrol;
20344 + lcd->pwmdiv = panel->mode_pwmdiv;
20345 + lcd->pwmhi = panel->mode_pwmhi;
20346 + lcd->outmask = panel->mode_outmask;
20347 + lcd->fifoctrl = panel->mode_fifoctrl;
20348 + au_sync();
20349 +
20350 + /* FIX!!! Check window settings to make sure still valid for new geometry */
20351 + au1200_setlocation(0, win->w[0].xpos, win->w[0].ypos);
20352 + au1200_setlocation(1, win->w[1].xpos, win->w[1].ypos);
20353 + au1200_setlocation(2, win->w[2].xpos, win->w[2].ypos);
20354 + au1200_setlocation(3, win->w[3].xpos, win->w[3].ypos);
20355 + lcd->winenable = winenable;
20356 +
20357 + /*
20358 + * Re-enable screen now that it is configured
20359 + */
20360 + lcd->screen |= LCD_SCREEN_SEN;
20361 + au_sync();
20362 +
20363 + /* Call init of panel */
20364 + if (panel->device_init != NULL) panel->device_init();
20365 +
20366 +#if 0
20367 +#define D(X) printk("%25s: %08X\n", #X, X)
20368 + D(lcd->screen);
20369 + D(lcd->horztiming);
20370 + D(lcd->verttiming);
20371 + D(lcd->clkcontrol);
20372 + D(lcd->pwmdiv);
20373 + D(lcd->pwmhi);
20374 + D(lcd->outmask);
20375 + D(lcd->fifoctrl);
20376 + D(lcd->window[0].winctrl0);
20377 + D(lcd->window[0].winctrl1);
20378 + D(lcd->window[0].winctrl2);
20379 + D(lcd->window[0].winbuf0);
20380 + D(lcd->window[0].winbuf1);
20381 + D(lcd->window[0].winbufctrl);
20382 + D(lcd->window[1].winctrl0);
20383 + D(lcd->window[1].winctrl1);
20384 + D(lcd->window[1].winctrl2);
20385 + D(lcd->window[1].winbuf0);
20386 + D(lcd->window[1].winbuf1);
20387 + D(lcd->window[1].winbufctrl);
20388 + D(lcd->window[2].winctrl0);
20389 + D(lcd->window[2].winctrl1);
20390 + D(lcd->window[2].winctrl2);
20391 + D(lcd->window[2].winbuf0);
20392 + D(lcd->window[2].winbuf1);
20393 + D(lcd->window[2].winbufctrl);
20394 + D(lcd->window[3].winctrl0);
20395 + D(lcd->window[3].winctrl1);
20396 + D(lcd->window[3].winctrl2);
20397 + D(lcd->window[3].winbuf0);
20398 + D(lcd->window[3].winbuf1);
20399 + D(lcd->window[3].winbufctrl);
20400 + D(lcd->winenable);
20401 + D(lcd->intenable);
20402 + D(lcd->intstatus);
20403 + D(lcd->backcolor);
20404 + D(lcd->winenable);
20405 + D(lcd->colorkey);
20406 + D(lcd->colorkeymsk);
20407 + D(lcd->hwc.cursorctrl);
20408 + D(lcd->hwc.cursorpos);
20409 + D(lcd->hwc.cursorcolor0);
20410 + D(lcd->hwc.cursorcolor1);
20411 + D(lcd->hwc.cursorcolor2);
20412 + D(lcd->hwc.cursorcolor3);
20413 +#endif
20414 +}
20415 +
20416 +static int au1200_setsize (int plane, int xres, int yres)
20417 +{
20418 +#if 0
20419 + uint32 winctrl0, winctrl1, winenable;
20420 + int xsz, ysz;
20421 +
20422 + /* FIX!!! X*Y can not surpass allocated memory */
20423 +
20424 + printk("setsize: x %d y %d\n", xres, yres);
20425 + winctrl1 = lcd->window[plane].winctrl1;
20426 + printk("org winctrl1 %08X\n", winctrl1);
20427 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
20428 +
20429 + xres -= 1;
20430 + yres -= 1;
20431 + winctrl1 |= (xres << 11);
20432 + winctrl1 |= (yres << 0);
20433 +
20434 + printk("new winctrl1 %08X\n", winctrl1);
20435 +
20436 + /*winenable = lcd->winenable & (1 << plane); */
20437 + /*lcd->winenable &= ~(1 << plane); */
20438 + lcd->window[plane].winctrl1 = winctrl1;
20439 + /*lcd->winenable |= winenable; */
20440 +#endif
20441 + return 0;
20442 +}
20443 +
20444 +static int au1200_setlocation (int plane, int xpos, int ypos)
20445 +{
20446 + uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
20447 + int xsz, ysz;
20448 +
20449 + /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
20450 +
20451 + winctrl0 = lcd->window[plane].winctrl0;
20452 + winctrl1 = lcd->window[plane].winctrl1;
20453 + winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
20454 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
20455 +
20456 + /* Check for off-screen adjustments */
20457 + xsz = win->w[plane].xres;
20458 + ysz = win->w[plane].yres;
20459 + if ((xpos + win->w[plane].xres) > panel->Xres)
20460 + {
20461 + /* Off-screen to the right */
20462 + xsz = panel->Xres - xpos; /* off by 1 ??? */
20463 + /*printk("off screen right\n");*/
20464 + }
20465 +
20466 + if ((ypos + win->w[plane].yres) > panel->Yres)
20467 + {
20468 + /* Off-screen to the bottom */
20469 + ysz = panel->Yres - ypos; /* off by 1 ??? */
20470 + /*printk("off screen bottom\n");*/
20471 + }
20472 +
20473 + if (xpos < 0)
20474 + {
20475 + /* Off-screen to the left */
20476 + xsz = win->w[plane].xres + xpos;
20477 + fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
20478 + xpos = 0;
20479 + /*printk("off screen left\n");*/
20480 + }
20481 +
20482 + if (ypos < 0)
20483 + {
20484 + /* Off-screen to the top */
20485 + ysz = win->w[plane].yres + ypos;
20486 + fb_offset += ((0 - ypos) * fb_pars[plane].line_length);
20487 + ypos = 0;
20488 + /*printk("off screen top\n");*/
20489 + }
20490 +
20491 + /* record settings */
20492 + win->w[plane].xpos = xpos;
20493 + win->w[plane].ypos = ypos;
20494 +
20495 + xsz -= 1;
20496 + ysz -= 1;
20497 + winctrl0 |= (xpos << 21);
20498 + winctrl0 |= (ypos << 10);
20499 + winctrl1 |= (xsz << 11);
20500 + winctrl1 |= (ysz << 0);
20501 +
20502 + /* Disable the window while making changes, then restore WINEN */
20503 + winenable = lcd->winenable & (1 << plane);
20504 + lcd->winenable &= ~(1 << plane);
20505 + lcd->window[plane].winctrl0 = winctrl0;
20506 + lcd->window[plane].winctrl1 = winctrl1;
20507 + lcd->window[plane].winbuf0 =
20508 + lcd->window[plane].winbuf1 = fb_infos[plane].fb_phys + fb_offset;
20509 + lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
20510 + lcd->winenable |= winenable;
20511 +
20512 + return 0;
20513 +}
20514 +
20515 +static void au1200_setmode(int plane)
20516 +{
20517 + /* Window/plane setup */
20518 + lcd->window[plane].winctrl1 = ( 0
20519 + | LCD_WINCTRL1_PRI_N(plane)
20520 + | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
20521 + ) ;
20522 +
20523 + au1200_setlocation(plane, win->w[plane].xpos, win->w[plane].ypos);
20524 +
20525 + lcd->window[plane].winctrl2 = ( 0
20526 + | LCD_WINCTRL2_CKMODE_00
20527 + | LCD_WINCTRL2_DBM
20528 +/* | LCD_WINCTRL2_RAM */
20529 + | LCD_WINCTRL2_BX_N(fb_pars[plane].line_length)
20530 + | LCD_WINCTRL2_SCX_1
20531 + | LCD_WINCTRL2_SCY_1
20532 + ) ;
20533 + lcd->winenable |= win->w[plane].mode_winenable;
20534 + au_sync();
20535 +
20536 +}
20537 +
20538 +static unsigned long
20539 +au1200fb_alloc_fbmem (unsigned long size)
20540 +{
20541 + /* __get_free_pages() fulfills a max request of 2MB */
20542 + /* do multiple requests to obtain large contigous mem */
20543 +#define MAX_GFP 0x00200000
20544 +
20545 + unsigned long mem, amem, alloced = 0, allocsize;
20546 +
20547 + size += 0x1000;
20548 + allocsize = (size < MAX_GFP) ? size : MAX_GFP;
20549 +
20550 + /* Get first chunk */
20551 + mem = (unsigned long )
20552 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
20553 + if (mem != 0) alloced = allocsize;
20554 +
20555 + /* Get remaining, contiguous chunks */
20556 + while (alloced < size)
20557 + {
20558 + amem = (unsigned long )
20559 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
20560 + if (amem != 0)
20561 + alloced += allocsize;
20562 +
20563 + /* check for contiguous mem alloced */
20564 + if ((amem == 0) || (amem + allocsize) != mem)
20565 + break;
20566 + else
20567 + mem = amem;
20568 + }
20569 + return mem;
20570 +}
20571 +
20572 +int __init au1200fb_init(void)
20573 +{
20574 + struct au1200fb_info *fb_info;
20575 + struct display *disp;
20576 + struct au1200fb_par *par;
20577 + unsigned long page;
20578 + int plane, bpp;
20579 +
20580 + /*
20581 + * Get the panel information/display mode
20582 + */
20583 + panel = &panels[panel_index];
20584 + win = &windows[window_index];
20585 +
20586 + printk("au1200fb: Panel %d %s\n", panel_index, panel->name);
20587 + printk("au1200fb: Win %d %s\n", window_index, win->name);
20588 +
20589 + /* Global setup/init */
20590 + au1200_setpanel(panel);
20591 + lcd->intenable = 0;
20592 + lcd->intstatus = ~0;
20593 + lcd->backcolor = win->mode_backcolor;
20594 + lcd->winenable = 0;
20595 +
20596 + /* Setup Color Key - FIX!!! */
20597 + lcd->colorkey = win->mode_colorkey;
20598 + lcd->colorkeymsk = win->mode_colorkeymsk;
20599 +
20600 + /* Setup HWCursor - FIX!!! Need to support this eventually */
20601 + lcd->hwc.cursorctrl = 0;
20602 + lcd->hwc.cursorpos = 0;
20603 + lcd->hwc.cursorcolor0 = 0;
20604 + lcd->hwc.cursorcolor1 = 0;
20605 + lcd->hwc.cursorcolor2 = 0;
20606 + lcd->hwc.cursorcolor3 = 0;
20607 +
20608 + /* Register each plane as a frame buffer device */
20609 + for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
20610 + {
20611 + fb_info = &fb_infos[plane];
20612 + disp = &disps[plane];
20613 + par = &fb_pars[plane];
20614 +
20615 + bpp = winbpp(win->w[plane].mode_winctrl1);
20616 + if (win->w[plane].xres == 0)
20617 + win->w[plane].xres = panel->Xres;
20618 + if (win->w[plane].yres == 0)
20619 + win->w[plane].yres = panel->Yres;
20620 +
20621 + par->var.xres =
20622 + par->var.xres_virtual = win->w[plane].xres;
20623 + par->var.yres =
20624 + par->var.yres_virtual = win->w[plane].yres;
20625 + par->var.bits_per_pixel = bpp;
20626 + par->line_length = win->w[plane].xres * bpp / 8; /* in bytes */
20627 + /*
20628 + * Allocate LCD framebuffer from system memory
20629 + * Set page reserved so that mmap will work. This is necessary
20630 + * since we'll be remapping normal memory.
20631 + */
20632 + fb_info->fb_size = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
20633 + fb_info->fb_virt_start = au1200fb_alloc_fbmem(fb_info->fb_size);
20634 + if (!fb_info->fb_virt_start) {
20635 + printk("Unable to allocate fb memory\n");
20636 + return -ENOMEM;
20637 + }
20638 + fb_info->fb_phys = virt_to_bus((void *)fb_info->fb_virt_start);
20639 + for (page = fb_info->fb_virt_start;
20640 + page < PAGE_ALIGN(fb_info->fb_virt_start + fb_info->fb_size);
20641 + page += PAGE_SIZE) {
20642 + SetPageReserved(virt_to_page(page));
20643 + }
20644 + /* Convert to kseg1 */
20645 + fb_info->fb_virt_start =
20646 + (void *)((u32)fb_info->fb_virt_start | 0xA0000000);
20647 + /* FIX!!! may wish to avoid this to save startup time??? */
20648 + memset((void *)fb_info->fb_virt_start, 0, fb_info->fb_size);
20649 +
20650 + fb_info->gen.parsize = sizeof(struct au1200fb_par);
20651 + fb_info->gen.fbhw = &au1200_switch;
20652 + strcpy(fb_info->gen.info.modename, "Au1200 LCD");
20653 + fb_info->gen.info.changevar = NULL;
20654 + fb_info->gen.info.node = -1;
20655 +
20656 + fb_info->gen.info.fbops = &au1200fb_ops;
20657 + fb_info->gen.info.disp = disp;
20658 + fb_info->gen.info.switch_con = &fbgen_switch;
20659 + fb_info->gen.info.updatevar = &fbgen_update_var;
20660 + fb_info->gen.info.blank = &fbgen_blank;
20661 + fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
20662 +
20663 + fb_info->nohwcursor = 1;
20664 + fb_info->noblanking = 1;
20665 +
20666 + /* This should give a reasonable default video mode */
20667 + fbgen_get_var(&disp->var, -1, &fb_info->gen.info);
20668 + fbgen_do_set_var(&disp->var, 1, &fb_info->gen);
20669 + fbgen_set_disp(-1, &fb_info->gen);
20670 + fbgen_install_cmap(0, &fb_info->gen);
20671 +
20672 + /* Turn on plane */
20673 + au1200_setmode(plane);
20674 +
20675 + if (register_framebuffer(&fb_info->gen.info) < 0)
20676 + return -EINVAL;
20677 +
20678 + printk(KERN_INFO "fb%d: %s plane %d @ %08X (%d x %d x %d)\n",
20679 + GET_FB_IDX(fb_info->gen.info.node),
20680 + fb_info->gen.info.modename, plane, fb_info->fb_phys,
20681 + win->w[plane].xres, win->w[plane].yres, bpp);
20682 + }
20683 + /* uncomment this if your driver cannot be unloaded */
20684 + /* MOD_INC_USE_COUNT; */
20685 + return 0;
20686 +}
20687 +
20688 +void au1200fb_setup(char *options, int *ints)
20689 +{
20690 + char* this_opt;
20691 + int i;
20692 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
20693 +
20694 + if (!options || !*options)
20695 + return;
20696 +
20697 + for(this_opt=strtok(options, ","); this_opt;
20698 + this_opt=strtok(NULL, ",")) {
20699 + if (!strncmp(this_opt, "panel:", 6)) {
20700 +#if defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200)
20701 + /* Read Pb1200 Rotary Switch S11 to obtain default panel */
20702 +#ifdef CONFIG_MIPS_PB1200
20703 + if (!strncmp(this_opt+6, "s11", 3))
20704 +#endif
20705 +#ifdef CONFIG_MIPS_DB1200
20706 + if (!strncmp(this_opt+6, "s7", 3))
20707 +#endif
20708 + {
20709 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
20710 + int p;
20711 +
20712 + p = bcsr->switches;
20713 + p >>= 8;
20714 + p &= 0x0F;
20715 + if (p >= num_panels) p = 0;
20716 + panel_index = p;
20717 + }
20718 + else
20719 +#elif defined(CONFIG_MIPS_FICMMP)
20720 + au1xxx_gpio_tristate(6);
20721 +
20722 + if(au1xxx_gpio_read(12) == 0)
20723 + panel_index = 8;
20724 + else
20725 + panel_index = 7;
20726 +#endif
20727 + /* Get the panel name, everything else if fixed */
20728 + for (i=0; i<num_panels; i++) {
20729 + if (!strncmp(this_opt+6, panels[i].name,
20730 + strlen(this_opt))) {
20731 + panel_index = i;
20732 + break;
20733 + }
20734 + }
20735 + }
20736 + else if (!strncmp(this_opt, "nohwcursor", 10)) {
20737 + printk("nohwcursor\n");
20738 + fb_infos[0].nohwcursor = 1;
20739 + }
20740 + }
20741 +
20742 + printk("au1200fb: Panel %d %s\n", panel_index,
20743 + panels[panel_index].name);
20744 +}
20745 +
20746 +
20747 +
20748 +#ifdef MODULE
20749 +MODULE_LICENSE("GPL");
20750 +MODULE_DESCRIPTION("Au1200 LCD framebuffer driver");
20751 +
20752 +void au1200fb_cleanup(struct fb_info *info)
20753 +{
20754 + unregister_framebuffer(info);
20755 +}
20756 +
20757 +module_init(au1200fb_init);
20758 +module_exit(au1200fb_cleanup);
20759 +#endif /* MODULE */
20760 +
20761 +
20762 diff -Nur linux-2.4.29/drivers/video/au1200fb.h linux-mips/drivers/video/au1200fb.h
20763 --- linux-2.4.29/drivers/video/au1200fb.h 1970-01-01 01:00:00.000000000 +0100
20764 +++ linux-mips/drivers/video/au1200fb.h 2005-02-11 22:16:44.000000000 +0100
20765 @@ -0,0 +1,288 @@
20766 +/*
20767 + * BRIEF MODULE DESCRIPTION
20768 + * Hardware definitions for the Au1200 LCD controller
20769 + *
20770 + * Copyright 2004 AMD
20771 + * Author: AMD
20772 + *
20773 + * This program is free software; you can redistribute it and/or modify it
20774 + * under the terms of the GNU General Public License as published by the
20775 + * Free Software Foundation; either version 2 of the License, or (at your
20776 + * option) any later version.
20777 + *
20778 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
20779 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20780 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20781 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20782 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20783 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20784 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20785 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20786 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20787 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20788 + *
20789 + * You should have received a copy of the GNU General Public License along
20790 + * with this program; if not, write to the Free Software Foundation, Inc.,
20791 + * 675 Mass Ave, Cambridge, MA 02139, USA.
20792 + */
20793 +
20794 +#ifndef _AU1200LCD_H
20795 +#define _AU1200LCD_H
20796 +
20797 +/********************************************************************/
20798 +#define AU1200_LCD_ADDR 0xB5000000
20799 +
20800 +#define uint8 unsigned char
20801 +#define uint32 unsigned int
20802 +
20803 +typedef volatile struct
20804 +{
20805 + uint32 reserved0;
20806 + uint32 screen;
20807 + uint32 backcolor;
20808 + uint32 horztiming;
20809 + uint32 verttiming;
20810 + uint32 clkcontrol;
20811 + uint32 pwmdiv;
20812 + uint32 pwmhi;
20813 + uint32 reserved1;
20814 + uint32 winenable;
20815 + uint32 colorkey;
20816 + uint32 colorkeymsk;
20817 + struct
20818 + {
20819 + uint32 cursorctrl;
20820 + uint32 cursorpos;
20821 + uint32 cursorcolor0;
20822 + uint32 cursorcolor1;
20823 + uint32 cursorcolor2;
20824 + uint32 cursorcolor3;
20825 + } hwc;
20826 + uint32 intstatus;
20827 + uint32 intenable;
20828 + uint32 outmask;
20829 + uint32 fifoctrl;
20830 + uint32 reserved2[(0x0100-0x0058)/4];
20831 + struct
20832 + {
20833 + uint32 winctrl0;
20834 + uint32 winctrl1;
20835 + uint32 winctrl2;
20836 + uint32 winbuf0;
20837 + uint32 winbuf1;
20838 + uint32 winbufctrl;
20839 + uint32 winreserved0;
20840 + uint32 winreserved1;
20841 + } window[4];
20842 +
20843 + uint32 reserved3[(0x0400-0x0180)/4];
20844 +
20845 + uint32 palette[(0x0800-0x0400)/4];
20846 +
20847 + uint8 cursorpattern[256];
20848 +
20849 +} AU1200_LCD;
20850 +
20851 +/* lcd_screen */
20852 +#define LCD_SCREEN_SEN (1<<31)
20853 +#define LCD_SCREEN_SX (0x07FF<<19)
20854 +#define LCD_SCREEN_SY (0x07FF<< 8)
20855 +#define LCD_SCREEN_SWP (1<<7)
20856 +#define LCD_SCREEN_SWD (1<<6)
20857 +#define LCD_SCREEN_ST (7<<0)
20858 +#define LCD_SCREEN_ST_TFT (0<<0)
20859 +#define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
20860 +#define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
20861 +#define LCD_SCREEN_ST_CSTN (1<<0)
20862 +#define LCD_SCREEN_ST_CDSTN (2<<0)
20863 +#define LCD_SCREEN_ST_M8STN (3<<0)
20864 +#define LCD_SCREEN_ST_M4STN (4<<0)
20865 +
20866 +/* lcd_backcolor */
20867 +#define LCD_BACKCOLOR_SBGR (0xFF<<16)
20868 +#define LCD_BACKCOLOR_SBGG (0xFF<<8)
20869 +#define LCD_BACKCOLOR_SBGB (0xFF<<0)
20870 +#define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16)
20871 +#define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8)
20872 +#define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0)
20873 +
20874 +/* lcd_winenable */
20875 +#define LCD_WINENABLE_WEN3 (1<<3)
20876 +#define LCD_WINENABLE_WEN2 (1<<2)
20877 +#define LCD_WINENABLE_WEN1 (1<<1)
20878 +#define LCD_WINENABLE_WEN0 (1<<0)
20879 +
20880 +/* lcd_colorkey */
20881 +#define LCD_COLORKEY_CKR (0xFF<<16)
20882 +#define LCD_COLORKEY_CKG (0xFF<<8)
20883 +#define LCD_COLORKEY_CKB (0xFF<<0)
20884 +#define LCD_COLORKEY_CKR_N(N) ((N)<<16)
20885 +#define LCD_COLORKEY_CKG_N(N) ((N)<<8)
20886 +#define LCD_COLORKEY_CKB_N(N) ((N)<<0)
20887 +
20888 +/* lcd_colorkeymsk */
20889 +#define LCD_COLORKEYMSK_CKMR (0xFF<<16)
20890 +#define LCD_COLORKEYMSK_CKMG (0xFF<<8)
20891 +#define LCD_COLORKEYMSK_CKMB (0xFF<<0)
20892 +#define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16)
20893 +#define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8)
20894 +#define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0)
20895 +
20896 +/* lcd windows control 0 */
20897 +#define LCD_WINCTRL0_OX (0x07FF<<21)
20898 +#define LCD_WINCTRL0_OY (0x07FF<<10)
20899 +#define LCD_WINCTRL0_A (0x00FF<<2)
20900 +#define LCD_WINCTRL0_AEN (1<<1)
20901 +#define LCD_WINCTRL0_OX_N(N) ((N)<<21)
20902 +#define LCD_WINCTRL0_OY_N(N) ((N)<<10)
20903 +#define LCD_WINCTRL0_A_N(N) ((N)<<2)
20904 +
20905 +/* lcd windows control 1 */
20906 +#define LCD_WINCTRL1_PRI (3<<30)
20907 +#define LCD_WINCTRL1_PIPE (1<<29)
20908 +#define LCD_WINCTRL1_FRM (0xF<<25)
20909 +#define LCD_WINCTRL1_CCO (1<<24)
20910 +#define LCD_WINCTRL1_PO (3<<22)
20911 +#define LCD_WINCTRL1_SZX (0x07FF<<11)
20912 +#define LCD_WINCTRL1_SZY (0x07FF<<0)
20913 +#define LCD_WINCTRL1_FRM_1BPP (0<<25)
20914 +#define LCD_WINCTRL1_FRM_2BPP (1<<25)
20915 +#define LCD_WINCTRL1_FRM_4BPP (2<<25)
20916 +#define LCD_WINCTRL1_FRM_8BPP (3<<25)
20917 +#define LCD_WINCTRL1_FRM_12BPP (4<<25)
20918 +#define LCD_WINCTRL1_FRM_16BPP655 (5<<25)
20919 +#define LCD_WINCTRL1_FRM_16BPP565 (6<<25)
20920 +#define LCD_WINCTRL1_FRM_16BPP556 (7<<25)
20921 +#define LCD_WINCTRL1_FRM_16BPPI1555 (8<<25)
20922 +#define LCD_WINCTRL1_FRM_16BPPI5551 (9<<25)
20923 +#define LCD_WINCTRL1_FRM_16BPPA1555 (10<<25)
20924 +#define LCD_WINCTRL1_FRM_16BPPA5551 (11<<25)
20925 +#define LCD_WINCTRL1_FRM_24BPP (12<<25)
20926 +#define LCD_WINCTRL1_FRM_32BPP (13<<25)
20927 +#define LCD_WINCTRL1_PRI_N(N) ((N)<<30)
20928 +#define LCD_WINCTRL1_PO_00 (0<<22)
20929 +#define LCD_WINCTRL1_PO_01 (1<<22)
20930 +#define LCD_WINCTRL1_PO_10 (2<<22)
20931 +#define LCD_WINCTRL1_PO_11 (3<<22)
20932 +#define LCD_WINCTRL1_SZX_N(N) ((N-1)<<11)
20933 +#define LCD_WINCTRL1_SZY_N(N) ((N-1)<<0)
20934 +
20935 +/* lcd windows control 2 */
20936 +#define LCD_WINCTRL2_CKMODE (3<<24)
20937 +#define LCD_WINCTRL2_DBM (1<<23)
20938 +#define LCD_WINCTRL2_RAM (3<<21)
20939 +#define LCD_WINCTRL2_BX (0x1FFF<<8)
20940 +#define LCD_WINCTRL2_SCX (0xF<<4)
20941 +#define LCD_WINCTRL2_SCY (0xF<<0)
20942 +#define LCD_WINCTRL2_CKMODE_00 (0<<24)
20943 +#define LCD_WINCTRL2_CKMODE_01 (1<<24)
20944 +#define LCD_WINCTRL2_CKMODE_10 (2<<24)
20945 +#define LCD_WINCTRL2_CKMODE_11 (3<<24)
20946 +#define LCD_WINCTRL2_RAM_NONE (0<<21)
20947 +#define LCD_WINCTRL2_RAM_PALETTE (1<<21)
20948 +#define LCD_WINCTRL2_RAM_GAMMA (2<<21)
20949 +#define LCD_WINCTRL2_RAM_BUFFER (3<<21)
20950 +#define LCD_WINCTRL2_BX_N(N) ((N)<<8)
20951 +#define LCD_WINCTRL2_SCX_1 (0<<4)
20952 +#define LCD_WINCTRL2_SCX_2 (1<<4)
20953 +#define LCD_WINCTRL2_SCX_4 (2<<4)
20954 +#define LCD_WINCTRL2_SCY_1 (0<<0)
20955 +#define LCD_WINCTRL2_SCY_2 (1<<0)
20956 +#define LCD_WINCTRL2_SCY_4 (2<<0)
20957 +
20958 +/* lcd windows buffer control */
20959 +#define LCD_WINBUFCTRL_DB (1<<1)
20960 +#define LCD_WINBUFCTRL_DBN (1<<0)
20961 +
20962 +/* lcd_intstatus, lcd_intenable */
20963 +#define LCD_INT_IFO (0xF<<14)
20964 +#define LCD_INT_IFU (0xF<<10)
20965 +#define LCD_INT_OFO (1<<9)
20966 +#define LCD_INT_OFU (1<<8)
20967 +#define LCD_INT_WAIT (1<<3)
20968 +#define LCD_INT_SD (1<<2)
20969 +#define LCD_INT_SA (1<<1)
20970 +#define LCD_INT_SS (1<<0)
20971 +
20972 +/* lcd_horztiming */
20973 +#define LCD_HORZTIMING_HND2 (0x1FF<<18)
20974 +#define LCD_HORZTIMING_HND1 (0x1FF<<9)
20975 +#define LCD_HORZTIMING_HPW (0x1FF<<0)
20976 +#define LCD_HORZTIMING_HND2_N(N)(((N)-1)<<18)
20977 +#define LCD_HORZTIMING_HND1_N(N)(((N)-1)<<9)
20978 +#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<0)
20979 +
20980 +/* lcd_verttiming */
20981 +#define LCD_VERTTIMING_VND2 (0x1FF<<18)
20982 +#define LCD_VERTTIMING_VND1 (0x1FF<<9)
20983 +#define LCD_VERTTIMING_VPW (0x1FF<<0)
20984 +#define LCD_VERTTIMING_VND2_N(N)(((N)-1)<<18)
20985 +#define LCD_VERTTIMING_VND1_N(N)(((N)-1)<<9)
20986 +#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<0)
20987 +
20988 +/* lcd_clkcontrol */
20989 +#define LCD_CLKCONTROL_EXT (1<<22)
20990 +#define LCD_CLKCONTROL_DELAY (3<<20)
20991 +#define LCD_CLKCONTROL_CDD (1<<19)
20992 +#define LCD_CLKCONTROL_IB (1<<18)
20993 +#define LCD_CLKCONTROL_IC (1<<17)
20994 +#define LCD_CLKCONTROL_IH (1<<16)
20995 +#define LCD_CLKCONTROL_IV (1<<15)
20996 +#define LCD_CLKCONTROL_BF (0x1F<<10)
20997 +#define LCD_CLKCONTROL_PCD (0x3FF<<0)
20998 +#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
20999 +#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
21000 +
21001 +/* lcd_pwmdiv */
21002 +#define LCD_PWMDIV_EN (1<<31)
21003 +#define LCD_PWMDIV_PWMDIV (0x1FFFF<<0)
21004 +#define LCD_PWMDIV_PWMDIV_N(N) ((N)<<0)
21005 +
21006 +/* lcd_pwmhi */
21007 +#define LCD_PWMHI_PWMHI1 (0xFFFF<<16)
21008 +#define LCD_PWMHI_PWMHI0 (0xFFFF<<0)
21009 +#define LCD_PWMHI_PWMHI1_N(N) ((N)<<16)
21010 +#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
21011 +
21012 +/* lcd_hwccon */
21013 +#define LCD_HWCCON_EN (1<<0)
21014 +
21015 +/* lcd_cursorpos */
21016 +#define LCD_CURSORPOS_HWCXOFF (0x1F<<27)
21017 +#define LCD_CURSORPOS_HWCXPOS (0x07FF<<16)
21018 +#define LCD_CURSORPOS_HWCYOFF (0x1F<<11)
21019 +#define LCD_CURSORPOS_HWCYPOS (0x07FF<<0)
21020 +#define LCD_CURSORPOS_HWCXOFF_N(N) ((N)<<27)
21021 +#define LCD_CURSORPOS_HWCXPOS_N(N) ((N)<<16)
21022 +#define LCD_CURSORPOS_HWCYOFF_N(N) ((N)<<11)
21023 +#define LCD_CURSORPOS_HWCYPOS_N(N) ((N)<<0)
21024 +
21025 +/* lcd_cursorcolor */
21026 +#define LCD_CURSORCOLOR_HWCA (0xFF<<24)
21027 +#define LCD_CURSORCOLOR_HWCR (0xFF<<16)
21028 +#define LCD_CURSORCOLOR_HWCG (0xFF<<8)
21029 +#define LCD_CURSORCOLOR_HWCB (0xFF<<0)
21030 +#define LCD_CURSORCOLOR_HWCA_N(N) ((N)<<24)
21031 +#define LCD_CURSORCOLOR_HWCR_N(N) ((N)<<16)
21032 +#define LCD_CURSORCOLOR_HWCG_N(N) ((N)<<8)
21033 +#define LCD_CURSORCOLOR_HWCB_N(N) ((N)<<0)
21034 +
21035 +/* lcd_fifoctrl */
21036 +#define LCD_FIFOCTRL_F3IF (1<<29)
21037 +#define LCD_FIFOCTRL_F3REQ (0x1F<<24)
21038 +#define LCD_FIFOCTRL_F2IF (1<<29)
21039 +#define LCD_FIFOCTRL_F2REQ (0x1F<<16)
21040 +#define LCD_FIFOCTRL_F1IF (1<<29)
21041 +#define LCD_FIFOCTRL_F1REQ (0x1F<<8)
21042 +#define LCD_FIFOCTRL_F0IF (1<<29)
21043 +#define LCD_FIFOCTRL_F0REQ (0x1F<<0)
21044 +#define LCD_FIFOCTRL_F3REQ_N(N) ((N-1)<<24)
21045 +#define LCD_FIFOCTRL_F2REQ_N(N) ((N-1)<<16)
21046 +#define LCD_FIFOCTRL_F1REQ_N(N) ((N-1)<<8)
21047 +#define LCD_FIFOCTRL_F0REQ_N(N) ((N-1)<<0)
21048 +
21049 +/* lcd_outmask */
21050 +#define LCD_OUTMASK_MASK (0x00FFFFFF)
21051 +
21052 +/********************************************************************/
21053 +#endif /* _AU1200LCD_H */
21054 diff -Nur linux-2.4.29/drivers/video/fbmem.c linux-mips/drivers/video/fbmem.c
21055 --- linux-2.4.29/drivers/video/fbmem.c 2005-01-19 15:10:09.000000000 +0100
21056 +++ linux-mips/drivers/video/fbmem.c 2005-02-12 04:07:19.000000000 +0100
21057 @@ -139,6 +139,8 @@
21058 extern int e1356fb_setup(char*);
21059 extern int au1100fb_init(void);
21060 extern int au1100fb_setup(char*);
21061 +extern int au1200fb_init(void);
21062 +extern int au1200fb_setup(char*);
21063 extern int pvr2fb_init(void);
21064 extern int pvr2fb_setup(char*);
21065 extern int sstfb_init(void);
21066 @@ -331,6 +333,9 @@
21067 #ifdef CONFIG_FB_AU1100
21068 { "au1100fb", au1100fb_init, au1100fb_setup },
21069 #endif
21070 +#ifdef CONFIG_FB_AU1200
21071 + { "au1200fb", au1200fb_init, au1200fb_setup },
21072 +#endif
21073 #ifdef CONFIG_FB_IT8181
21074 { "it8181fb", it8181fb_init, it8181fb_setup },
21075 #endif
21076 diff -Nur linux-2.4.29/drivers/video/ims332.h linux-mips/drivers/video/ims332.h
21077 --- linux-2.4.29/drivers/video/ims332.h 1970-01-01 01:00:00.000000000 +0100
21078 +++ linux-mips/drivers/video/ims332.h 2003-12-22 17:02:20.000000000 +0100
21079 @@ -0,0 +1,275 @@
21080 +/*
21081 + * linux/drivers/video/ims332.h
21082 + *
21083 + * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
21084 + *
21085 + * This file is subject to the terms and conditions of the GNU General
21086 + * Public License. See the file COPYING in the main directory of this
21087 + * archive for more details.
21088 + */
21089 +#include <linux/types.h>
21090 +
21091 +/*
21092 + * IMS332 16-bit wide, 128-bit aligned registers.
21093 + */
21094 +struct _ims332_reg {
21095 + volatile u16 r;
21096 + u16 pad[7];
21097 +};
21098 +
21099 +struct _ims332_regs {
21100 +#define IMS332_BOOT_PLL_MUTLIPLIER 0x00001f
21101 +#define IMS332_BOOT_CLOCK_SOURCE_SEL 0x000020
21102 +#define IMS332_BOOT_ADDRESS_ALIGNMENT 0x000040
21103 +#define IMS332_BOOT_WRITE_ZERO 0xffff80
21104 + struct _ims332_reg boot;
21105 + struct _ims332_reg pad0[0x020 - 0x000];
21106 + struct _ims332_reg half_sync;
21107 + struct _ims332_reg back_porch;
21108 + struct _ims332_reg display;
21109 + struct _ims332_reg short_display;
21110 + struct _ims332_reg broad_pulse;
21111 + struct _ims332_reg vsync;
21112 + struct _ims332_reg vpre_equalise;
21113 + struct _ims332_reg vpost_equalise;
21114 + struct _ims332_reg vblank;
21115 + struct _ims332_reg vdisplay;
21116 + struct _ims332_reg line_time;
21117 + struct _ims332_reg line_start;
21118 + struct _ims332_reg mem_init;
21119 + struct _ims332_reg transfer_delay;
21120 + struct _ims332_reg pad1[0x03f - 0x02e];
21121 + struct _ims332_reg pixel_address_mask;
21122 + struct _ims332_reg pad2[0x05f - 0x040];
21123 +
21124 +#define IMS332_CTRL_A_BOOT_ENABLE_VTG 0x000001
21125 +#define IMS332_CTRL_A_SCREEN_FORMAT 0x000002
21126 +#define IMS332_CTRL_A_INTERLACED_STANDARD 0x000004
21127 +#define IMS332_CTRL_A_OPERATING_MODE 0x000008
21128 +#define IMS332_CTRL_A_FRAME_FLYBACK_PATTERN 0x000010
21129 +#define IMS332_CTRL_A_DIGITAL_SYNC_FORMAT 0x000020
21130 +#define IMS332_CTRL_A_ANALOGUE_VIDEO_FORMAT 0x000040
21131 +#define IMS332_CTRL_A_BLANK_LEVEL 0x000080
21132 +#define IMS332_CTRL_A_BLANK_IO 0x000100
21133 +#define IMS332_CTRL_A_BLANK_FUNCTION_SWITCH 0x000200
21134 +#define IMS332_CTRL_A_FORCE_BLANKING 0x000400
21135 +#define IMS332_CTRL_A_TURN_OFF_BLANKING 0x000800
21136 +#define IMS332_CTRL_A_VRAM_ADDRESS_INCREMENT 0x003000
21137 +#define IMS332_CTRL_A_TURN_OFF_DMA 0x004000
21138 +#define IMS332_CTRL_A_SYNC_DELAY 0x038000
21139 +#define IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING 0x040000
21140 +#define IMS332_CTRL_A_DELAYED_SAMPLING 0x080000
21141 +#define IMS332_CTRL_A_BITS_PER_PIXEL 0x700000
21142 +#define IMS332_CTRL_A_CURSOR_DISABLE 0x800000
21143 + struct _ims332_reg config_control_a;
21144 + struct _ims332_reg pad3[0x06f - 0x060];
21145 +
21146 +#define IMS332_CTRL_B_WRITE_ZERO 0xffffff
21147 + struct _ims332_reg config_control_b;
21148 + struct _ims332_reg pad4[0x07f - 0x070];
21149 + struct _ims332_reg screen_top;
21150 + struct _ims332_reg pad5[0x0a0 - 0x080];
21151 + /* cursor color palette, 3 entries, reg no. 0xa1 - 0xa3 */
21152 + struct _ims332_reg cursor_color_palette0;
21153 + struct _ims332_reg cursor_color_palette1;
21154 + struct _ims332_reg cursor_color_palette2;
21155 + struct _ims332_reg pad6[0x0bf - 0x0a3];
21156 + struct _ims332_reg rgb_frame_checksum0;
21157 + struct _ims332_reg rgb_frame_checksum1;
21158 + struct _ims332_reg rgb_frame_checksum2;
21159 + struct _ims332_reg pad7[0x0c6 - 0x0c2];
21160 + struct _ims332_reg cursor_start;
21161 + struct _ims332_reg pad8[0x0ff - 0x0c7];
21162 + /* color palette, 256 entries of form 0x00BBGGRR, reg no. 0x100 - 0x1ff */
21163 + struct _ims332_reg color_palette[0x1ff - 0x0ff];
21164 + /* hardware cursor bitmap, reg no. 0x200 - 0x3ff */
21165 + struct _ims332_reg cursor_ram[0x3ff - 0x1ff];
21166 +};
21167 +
21168 +/*
21169 + * In the functions below we use some weird looking helper variables to
21170 + * access most members of this struct, otherwise the compiler splits
21171 + * the read/write in two byte accesses.
21172 + */
21173 +struct ims332_regs {
21174 + struct _ims332_regs rw;
21175 + char pad0[0x80000 - sizeof (struct _ims332_regs)];
21176 + struct _ims332_regs r;
21177 + char pad1[0xa0000 - (sizeof (struct _ims332_regs) + 0x80000)];
21178 + struct _ims332_regs w;
21179 +} __attribute__((packed));
21180 +
21181 +static inline void ims332_control_reg_bits(struct ims332_regs *regs, u32 mask,
21182 + u32 val)
21183 +{
21184 + volatile u16 *ctr = &(regs->r.config_control_a.r);
21185 + volatile u16 *ctw = &(regs->w.config_control_a.r);
21186 + u32 ctrl;
21187 +
21188 + mb();
21189 + ctrl = *ctr;
21190 + rmb();
21191 + ctrl |= ((regs->rw.boot.r << 8) & 0x00ff0000);
21192 + ctrl |= val & mask;
21193 + ctrl &= ~(~val & mask);
21194 + wmb();
21195 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
21196 + wmb();
21197 + *ctw = ctrl & 0xffff;
21198 +}
21199 +
21200 +/* FIXME: This is maxinefb specific. */
21201 +static inline void ims332_bootstrap(struct ims332_regs *regs)
21202 +{
21203 + volatile u16 *ctw = &(regs->w.config_control_a.r);
21204 + u32 ctrl = IMS332_CTRL_A_BOOT_ENABLE_VTG | IMS332_CTRL_A_TURN_OFF_DMA;
21205 +
21206 + /* bootstrap sequence */
21207 + mb();
21208 + regs->rw.boot.r = 0;
21209 + wmb();
21210 + *ctw = 0;
21211 +
21212 + /* init control A register */
21213 + wmb();
21214 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
21215 + wmb();
21216 + *ctw = ctrl & 0xffff;
21217 +}
21218 +
21219 +static inline void ims332_blank_screen(struct ims332_regs *regs, int blank)
21220 +{
21221 + ims332_control_reg_bits(regs, IMS332_CTRL_A_FORCE_BLANKING,
21222 + blank ? IMS332_CTRL_A_FORCE_BLANKING : 0);
21223 +}
21224 +
21225 +static inline void ims332_set_color_depth(struct ims332_regs *regs, u32 depth)
21226 +{
21227 + u32 dp;
21228 + u32 mask = (IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING
21229 + | IMS332_CTRL_A_DELAYED_SAMPLING
21230 + | IMS332_CTRL_A_BITS_PER_PIXEL);
21231 +
21232 + switch (depth) {
21233 + case 1: dp = 0 << 20; break;
21234 + case 2: dp = 1 << 20; break;
21235 + case 4: dp = 2 << 20; break;
21236 + case 8: dp = 3 << 20; break;
21237 + case 15: dp = (4 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
21238 + case 16: dp = (5 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
21239 + default: return;
21240 + }
21241 + ims332_control_reg_bits(regs, mask, dp);
21242 +
21243 + if (depth <= 8) {
21244 + volatile u16 *pmask = &(regs->w.pixel_address_mask.r);
21245 + u32 dm = (1 << depth) - 1;
21246 +
21247 + wmb();
21248 + regs->rw.boot.r = dm << 8;
21249 + wmb();
21250 + *pmask = dm << 8 | dm;
21251 + }
21252 +}
21253 +
21254 +static inline void ims332_set_screen_top(struct ims332_regs *regs, u16 top)
21255 +{
21256 + volatile u16 *st = &(regs->w.screen_top.r);
21257 +
21258 + mb();
21259 + *st = top & 0xffff;
21260 +}
21261 +
21262 +static inline void ims332_enable_cursor(struct ims332_regs *regs, int on)
21263 +{
21264 + ims332_control_reg_bits(regs, IMS332_CTRL_A_CURSOR_DISABLE,
21265 + on ? 0 : IMS332_CTRL_A_CURSOR_DISABLE);
21266 +}
21267 +
21268 +static inline void ims332_position_cursor(struct ims332_regs *regs,
21269 + u16 x, u16 y)
21270 +{
21271 + volatile u16 *cp = &(regs->w.cursor_start.r);
21272 + u32 val = ((x & 0xfff) << 12) | (y & 0xfff);
21273 +
21274 + if (x > 2303 || y > 2303)
21275 + return;
21276 +
21277 + mb();
21278 + regs->rw.boot.r = (val >> 8) & 0xff00;
21279 + wmb();
21280 + *cp = val & 0xffff;
21281 +}
21282 +
21283 +static inline void ims332_set_font(struct ims332_regs *regs, u8 fgc,
21284 + u16 width, u16 height)
21285 +{
21286 + volatile u16 *cp0 = &(regs->w.cursor_color_palette0.r);
21287 + int i;
21288 +
21289 + mb();
21290 + for (i = 0; i < 0x200; i++) {
21291 + volatile u16 *cram = &(regs->w.cursor_ram[i].r);
21292 +
21293 + if (height << 6 <= i << 3)
21294 + *cram = 0x0000;
21295 + else if (width <= i % 8 << 3)
21296 + *cram = 0x0000;
21297 + else if (((width >> 3) & 0xffff) > i % 8)
21298 + *cram = 0x5555;
21299 + else
21300 + *cram = 0x5555 & ~(0xffff << (width % 8 << 1));
21301 + wmb();
21302 + }
21303 + regs->rw.boot.r = fgc << 8;
21304 + wmb();
21305 + *cp0 = fgc << 8 | fgc;
21306 +}
21307 +
21308 +static inline void ims332_read_cmap(struct ims332_regs *regs, u8 reg,
21309 + u8* red, u8* green, u8* blue)
21310 +{
21311 + volatile u16 *rptr = &(regs->r.color_palette[reg].r);
21312 + u16 val;
21313 +
21314 + mb();
21315 + val = *rptr;
21316 + *red = val & 0xff;
21317 + *green = (val >> 8) & 0xff;
21318 + rmb();
21319 + *blue = (regs->rw.boot.r >> 8) & 0xff;
21320 +}
21321 +
21322 +static inline void ims332_write_cmap(struct ims332_regs *regs, u8 reg,
21323 + u8 red, u8 green, u8 blue)
21324 +{
21325 + volatile u16 *wptr = &(regs->w.color_palette[reg].r);
21326 +
21327 + mb();
21328 + regs->rw.boot.r = blue << 8;
21329 + wmb();
21330 + *wptr = (green << 8) + red;
21331 +}
21332 +
21333 +static inline void ims332_dump_regs(struct ims332_regs *regs)
21334 +{
21335 + int i;
21336 +
21337 + printk(__FUNCTION__);
21338 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG, 0);
21339 + for (i = 0; i < 0x100; i++) {
21340 + volatile u16 *cpad = (u16 *)((char *)(&regs->r) + sizeof(struct _ims332_reg) * i);
21341 + u32 val;
21342 +
21343 + val = *cpad;
21344 + rmb();
21345 + val |= regs->rw.boot.r << 8;
21346 + rmb();
21347 + if (! (i % 8))
21348 + printk("\n%02x:", i);
21349 + printk(" %06x", val);
21350 + }
21351 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG,
21352 + IMS332_CTRL_A_BOOT_ENABLE_VTG);
21353 + printk("\n");
21354 +}
21355 diff -Nur linux-2.4.29/drivers/video/maxinefb.h linux-mips/drivers/video/maxinefb.h
21356 --- linux-2.4.29/drivers/video/maxinefb.h 2003-08-25 13:44:42.000000000 +0200
21357 +++ linux-mips/drivers/video/maxinefb.h 1970-01-01 01:00:00.000000000 +0100
21358 @@ -1,38 +0,0 @@
21359 -/*
21360 - * linux/drivers/video/maxinefb.h
21361 - *
21362 - * DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
21363 - * Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
21364 - * This file is subject to the terms and conditions of the GNU General
21365 - * Public License. See the file COPYING in the main directory of this
21366 - * archive for more details.
21367 - */
21368 -
21369 -#include <asm/addrspace.h>
21370 -
21371 -/*
21372 - * IMS332 video controller register base address
21373 - */
21374 -#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)
21375 -
21376 -/*
21377 - * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
21378 - * is 1024x768x8
21379 - */
21380 -#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)
21381 -
21382 -/*
21383 - * The IMS 332 video controller used in the DECstation 5000/xx series
21384 - * uses 32 bits wide registers; the following defines declare the
21385 - * register numbers, to get the real offset, these have to be multiplied
21386 - * by four.
21387 - */
21388 -
21389 -#define IMS332_REG_CURSOR_RAM 0x200 /* hardware cursor bitmap */
21390 -
21391 -/*
21392 - * The color palette entries have the form 0x00BBGGRR
21393 - */
21394 -#define IMS332_REG_COLOR_PALETTE 0x100 /* color palette, 256 entries */
21395 -#define IMS332_REG_CURSOR_COLOR_PALETTE 0x0a1 /* cursor color palette, */
21396 - /* 3 entries */
21397 diff -Nur linux-2.4.29/drivers/video/newport_con.c linux-mips/drivers/video/newport_con.c
21398 --- linux-2.4.29/drivers/video/newport_con.c 2003-08-25 13:44:42.000000000 +0200
21399 +++ linux-mips/drivers/video/newport_con.c 2004-09-23 15:32:29.000000000 +0200
21400 @@ -22,6 +22,7 @@
21401 #include <linux/module.h>
21402 #include <linux/slab.h>
21403
21404 +#include <asm/io.h>
21405 #include <asm/uaccess.h>
21406 #include <asm/system.h>
21407 #include <asm/page.h>
21408 @@ -77,7 +78,7 @@
21409 static inline void newport_render_background(int xstart, int ystart,
21410 int xend, int yend, int ci)
21411 {
21412 - newport_wait();
21413 + newport_wait(npregs);
21414 npregs->set.wrmask = 0xffffffff;
21415 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21416 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21417 @@ -94,7 +95,7 @@
21418 unsigned short i;
21419
21420 for (i = 0; i < 16; i++) {
21421 - newport_bfwait();
21422 + newport_bfwait(npregs);
21423 newport_cmap_setaddr(npregs, color_table[i]);
21424 newport_cmap_setrgb(npregs,
21425 default_red[i],
21426 @@ -107,7 +108,7 @@
21427 unsigned long i;
21428
21429 for (i = 0; i < LINUX_LOGO_COLORS; i++) {
21430 - newport_bfwait();
21431 + newport_bfwait(npregs);
21432 newport_cmap_setaddr(npregs, i + 0x20);
21433 newport_cmap_setrgb(npregs,
21434 linux_logo_red[i],
21435 @@ -115,13 +116,13 @@
21436 linux_logo_blue[i]);
21437 }
21438
21439 - newport_wait();
21440 + newport_wait(npregs);
21441 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21442 NPORT_DMODE0_CHOST);
21443
21444 npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
21445 npregs->set.xyendi = ((newport_xsize - 1) << 16);
21446 - newport_wait();
21447 + newport_wait(npregs);
21448
21449 for (i = 0; i < LOGO_W * LOGO_H; i++)
21450 npregs->go.hostrw0 = linux_logo[i] << 24;
21451 @@ -133,7 +134,7 @@
21452 if (logo_active)
21453 return;
21454
21455 - newport_wait();
21456 + newport_wait(npregs);
21457 npregs->set.wrmask = 0xffffffff;
21458 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21459 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21460 @@ -155,7 +156,7 @@
21461 unsigned short treg;
21462 int i;
21463
21464 - newport_wait();
21465 + newport_wait(npregs);
21466 treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
21467 newport_vc2_set(npregs, VC2_IREG_CONTROL,
21468 (treg | VC2_CTRL_EVIDEO));
21469 @@ -165,7 +166,7 @@
21470 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21471 NPORT_DMODE_W2 | VC2_PROTOCOL);
21472 for (i = 0; i < 128; i++) {
21473 - newport_bfwait();
21474 + newport_bfwait(npregs);
21475 if (i == 92 || i == 94)
21476 npregs->set.dcbdata0.byshort.s1 = 0xff00;
21477 else
21478 @@ -205,7 +206,7 @@
21479 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21480 NPORT_DMODE_W2 | VC2_PROTOCOL);
21481 for (i = 0; i < 128; i++) {
21482 - newport_bfwait();
21483 + newport_bfwait(npregs);
21484 linetable[i] = npregs->set.dcbdata0.byshort.s1;
21485 }
21486
21487 @@ -216,12 +217,12 @@
21488 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
21489 NPORT_DMODE_W2 | VC2_PROTOCOL);
21490 do {
21491 - newport_bfwait();
21492 + newport_bfwait(npregs);
21493 treg = npregs->set.dcbdata0.byshort.s1;
21494 if ((treg & 1) == 0)
21495 cols += (treg >> 7) & 0xfe;
21496 if ((treg & 0x80) == 0) {
21497 - newport_bfwait();
21498 + newport_bfwait(npregs);
21499 treg = npregs->set.dcbdata0.byshort.s1;
21500 }
21501 } while ((treg & 0x8000) == 0);
21502 @@ -291,16 +292,16 @@
21503
21504 if (!sgi_gfxaddr)
21505 return NULL;
21506 - npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
21507 + npregs = (struct newport_regs *) /* ioremap cannot fail */
21508 + ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
21509 npregs->cset.config = NPORT_CFG_GD0;
21510
21511 - if (newport_wait()) {
21512 - return NULL;
21513 - }
21514 + if (newport_wait(npregs))
21515 + goto out_unmap;
21516
21517 npregs->set.xstarti = TESTVAL;
21518 if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
21519 - return NULL;
21520 + goto out_unmap;
21521
21522 for (i = 0; i < MAX_NR_CONSOLES; i++)
21523 font_data[i] = FONT_DATA;
21524 @@ -310,6 +311,10 @@
21525 newport_get_screensize();
21526
21527 return "SGI Newport";
21528 +
21529 +out_unmap:
21530 + iounmap((void *)npregs);
21531 + return NULL;
21532 }
21533
21534 static void newport_init(struct vc_data *vc, int init)
21535 @@ -363,7 +368,7 @@
21536 (charattr & 0xf0) >> 4);
21537
21538 /* Set the color and drawing mode. */
21539 - newport_wait();
21540 + newport_wait(npregs);
21541 npregs->set.colori = charattr & 0xf;
21542 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
21543 NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
21544 @@ -372,7 +377,7 @@
21545 /* Set coordinates for bitmap operation. */
21546 npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
21547 npregs->set.xyendi = ((xpos + 7) << 16);
21548 - newport_wait();
21549 + newport_wait(npregs);
21550
21551 /* Go, baby, go... */
21552 RENDER(npregs, p);
21553 @@ -396,7 +401,7 @@
21554 xpos + ((count - 1) << 3), ypos,
21555 (charattr & 0xf0) >> 4);
21556
21557 - newport_wait();
21558 + newport_wait(npregs);
21559
21560 /* Set the color and drawing mode. */
21561 npregs->set.colori = charattr & 0xf;
21562 @@ -407,7 +412,7 @@
21563 for (i = 0; i < count; i++, xpos += 8) {
21564 p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
21565
21566 - newport_wait();
21567 + newport_wait(npregs);
21568
21569 /* Set coordinates for bitmap operation. */
21570 npregs->set.xystarti =
21571 @@ -689,7 +694,7 @@
21572 xe = xs;
21573 xs = tmp;
21574 }
21575 - newport_wait();
21576 + newport_wait(npregs);
21577 npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
21578 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
21579 | NPORT_DMODE0_STOPY);
21580 @@ -706,35 +711,35 @@
21581 #define DUMMY (void *) newport_dummy
21582
21583 const struct consw newport_con = {
21584 - con_startup: newport_startup,
21585 - con_init: newport_init,
21586 - con_deinit: newport_deinit,
21587 - con_clear: newport_clear,
21588 - con_putc: newport_putc,
21589 - con_putcs: newport_putcs,
21590 - con_cursor: newport_cursor,
21591 - con_scroll: newport_scroll,
21592 - con_bmove: newport_bmove,
21593 - con_switch: newport_switch,
21594 - con_blank: newport_blank,
21595 - con_font_op: newport_font_op,
21596 - con_set_palette: newport_set_palette,
21597 - con_scrolldelta: newport_scrolldelta,
21598 - con_set_origin: DUMMY,
21599 - con_save_screen: DUMMY
21600 + .con_startup = newport_startup,
21601 + .con_init = newport_init,
21602 + .con_deinit = newport_deinit,
21603 + .con_clear = newport_clear,
21604 + .con_putc = newport_putc,
21605 + .con_putcs = newport_putcs,
21606 + .con_cursor = newport_cursor,
21607 + .con_scroll = newport_scroll,
21608 + .con_bmove = newport_bmove,
21609 + .con_switch = newport_switch,
21610 + .con_blank = newport_blank,
21611 + .con_font_op = newport_font_op,
21612 + .con_set_palette = newport_set_palette,
21613 + .con_scrolldelta = newport_scrolldelta,
21614 + .con_set_origin = DUMMY,
21615 + .con_save_screen = DUMMY
21616 };
21617
21618 #ifdef MODULE
21619 static int __init newport_console_init(void)
21620 {
21621 take_over_console(&newport_con, 0, MAX_NR_CONSOLES - 1, 1);
21622 -
21623 return 0;
21624 }
21625
21626 static void __exit newport_console_exit(void)
21627 {
21628 give_up_console(&newport_con);
21629 + iounmap((void *)npregs);
21630 }
21631
21632 module_init(newport_console_init);
21633 diff -Nur linux-2.4.29/drivers/video/tgafb.c linux-mips/drivers/video/tgafb.c
21634 --- linux-2.4.29/drivers/video/tgafb.c 2001-11-14 23:52:20.000000000 +0100
21635 +++ linux-mips/drivers/video/tgafb.c 2004-10-30 01:15:02.000000000 +0200
21636 @@ -45,6 +45,15 @@
21637 #include <linux/console.h>
21638 #include <asm/io.h>
21639
21640 +#ifdef CONFIG_TC
21641 +#include <asm/dec/tc.h>
21642 +#else
21643 +static int search_tc_card(const char *) { return -1; }
21644 +static void claim_tc_card(int) { }
21645 +static void release_tc_card(int) { }
21646 +static unsigned long get_tc_base_addr(int) { return 0; }
21647 +#endif
21648 +
21649 #include <video/fbcon.h>
21650 #include <video/fbcon-cfb8.h>
21651 #include <video/fbcon-cfb32.h>
21652 @@ -84,10 +93,10 @@
21653 };
21654
21655 static unsigned int deep_presets[4] = {
21656 - 0x00014000,
21657 - 0x0001440d,
21658 + 0x00004000,
21659 + 0x0000440d,
21660 0xffffffff,
21661 - 0x0001441d
21662 + 0x0000441d
21663 };
21664
21665 static unsigned int rasterop_presets[4] = {
21666 @@ -131,6 +140,13 @@
21667 0,
21668 FB_VMODE_NONINTERLACED
21669 }},
21670 + { "1280x1024-72", { /* mode #0 of PMAGD boards */
21671 + 1280, 1024, 1280, 1024, 0, 0, 0, 0,
21672 + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
21673 + 0, 0, -1, -1, FB_ACCELF_TEXT, 7692, 232, 32, 34, 3, 160, 3,
21674 + FB_SYNC_ON_GREEN,
21675 + FB_VMODE_NONINTERLACED
21676 + }},
21677 { "800x600-56", {
21678 800, 600, 800, 600, 0, 0, 0, 0,
21679 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
21680 @@ -488,7 +504,8 @@
21681 continue;
21682
21683 mb();
21684 - TGA_WRITE_REG(deep_presets[fb_info.tga_type], TGA_DEEP_REG);
21685 + TGA_WRITE_REG(deep_presets[fb_info.tga_type] |
21686 + (par->sync_on_green ? 0x0 : 0x00010000), TGA_DEEP_REG);
21687 while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
21688 continue;
21689 mb();
21690 @@ -548,7 +565,7 @@
21691 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
21692 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
21693 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2,
21694 - (par->sync_on_green ? 0x80 : 0x40));
21695 + (par->sync_on_green ? 0xc0 : 0x40));
21696
21697 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
21698 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
21699 @@ -921,19 +938,34 @@
21700 int __init tgafb_init(void)
21701 {
21702 struct pci_dev *pdev;
21703 + int slot;
21704
21705 pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
21706 if (!pdev)
21707 + slot = search_tc_card("PMAGD");
21708 + if (!pdev && slot < 0)
21709 return -ENXIO;
21710
21711 /* divine board type */
21712
21713 - fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
21714 - fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
21715 - fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21716 - fb_info.tga_fb_base = (fb_info.tga_mem_base
21717 + if (pdev) {
21718 + fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start,
21719 + 0);
21720 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
21721 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21722 + fb_info.tga_fb_base = (fb_info.tga_mem_base
21723 + fb_offset_presets[fb_info.tga_type]);
21724 - pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
21725 + pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
21726 +
21727 + } else {
21728 + claim_tc_card(slot);
21729 + fb_info.tga_mem_base = get_tc_base_addr(slot);
21730 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f; /* ? */
21731 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
21732 + fb_info.tga_fb_base = (fb_info.tga_mem_base
21733 + + fb_offset_presets[fb_info.tga_type]);
21734 + fb_info.tga_chip_rev = TGA_READ_REG(TGA_START_REG) & 0xff;
21735 + }
21736
21737 /* setup framebuffer */
21738
21739 @@ -950,40 +982,62 @@
21740 fb_info.gen.fbhw = &tgafb_hwswitch;
21741 fb_info.gen.fbhw->detect();
21742
21743 - printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
21744 - printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
21745 - pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
21746 + if (pdev) {
21747 + printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
21748 + fb_info.tga_chip_rev);
21749 + printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
21750 + pdev->bus->number,
21751 + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
21752 + } else {
21753 + printk (KERN_INFO "tgafb: SFB+ detected, rev=0x%02x\n",
21754 + fb_info.tga_chip_rev);
21755 + }
21756
21757 switch (fb_info.tga_type)
21758 {
21759 case TGA_TYPE_8PLANE:
21760 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
21761 + if (pdev)
21762 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
21763 + else
21764 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E1");
21765 break;
21766
21767 case TGA_TYPE_24PLANE:
21768 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
21769 + if (pdev)
21770 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
21771 + else
21772 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E2");
21773 break;
21774
21775 case TGA_TYPE_24PLUSZ:
21776 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
21777 + if (pdev)
21778 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
21779 + else
21780 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E3");
21781 break;
21782 }
21783
21784 /* This should give a reasonable default video mode */
21785
21786 if (!default_var_valid) {
21787 - default_var = tgafb_predefined[0].var;
21788 + if (pdev)
21789 + default_var = tgafb_predefined[0].var;
21790 + else
21791 + default_var = tgafb_predefined[1].var;
21792 }
21793 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
21794 disp.var.activate = FB_ACTIVATE_NOW;
21795 fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
21796 fbgen_set_disp(-1, &fb_info.gen);
21797 fbgen_install_cmap(0, &fb_info.gen);
21798 - if (register_framebuffer(&fb_info.gen.info) < 0)
21799 + if (register_framebuffer(&fb_info.gen.info) < 0) {
21800 + if (slot >= 0)
21801 + release_tc_card(slot);
21802 return -EINVAL;
21803 - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
21804 + }
21805 + printk(KERN_INFO "fb%d: %s frame buffer device at 0x%llx\n",
21806 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,
21807 - pdev->resource[0].start);
21808 + fb_info.tga_mem_base);
21809 return 0;
21810 }
21811
21812 diff -Nur linux-2.4.29/drivers/video/tgafb.h linux-mips/drivers/video/tgafb.h
21813 --- linux-2.4.29/drivers/video/tgafb.h 2000-04-12 18:47:28.000000000 +0200
21814 +++ linux-mips/drivers/video/tgafb.h 2004-10-30 01:15:02.000000000 +0200
21815 @@ -36,6 +36,7 @@
21816 #define TGA_RASTEROP_REG 0x0034
21817 #define TGA_PIXELSHIFT_REG 0x0038
21818 #define TGA_DEEP_REG 0x0050
21819 +#define TGA_START_REG 0x0054
21820 #define TGA_PIXELMASK_REG 0x005c
21821 #define TGA_CURSOR_BASE_REG 0x0060
21822 #define TGA_HORIZ_REG 0x0064
21823 diff -Nur linux-2.4.29/fs/binfmt_elf.c linux-mips/fs/binfmt_elf.c
21824 --- linux-2.4.29/fs/binfmt_elf.c 2005-01-19 15:10:10.000000000 +0100
21825 +++ linux-mips/fs/binfmt_elf.c 2005-01-13 11:59:03.000000000 +0100
21826 @@ -660,6 +660,9 @@
21827 bprm->argc++;
21828 }
21829 }
21830 + } else {
21831 + /* Executables without an interpreter also need a personality */
21832 + SET_PERSONALITY(elf_ex, ibcs2_interpreter);
21833 }
21834
21835 /* Flush all traces of the currently running executable */
21836 @@ -1208,7 +1211,11 @@
21837 elf.e_entry = 0;
21838 elf.e_phoff = sizeof(elf);
21839 elf.e_shoff = 0;
21840 +#ifdef ELF_CORE_EFLAGS
21841 + elf.e_flags = ELF_CORE_EFLAGS;
21842 +#else
21843 elf.e_flags = 0;
21844 +#endif
21845 elf.e_ehsize = sizeof(elf);
21846 elf.e_phentsize = sizeof(struct elf_phdr);
21847 elf.e_phnum = segs+1; /* Include notes */
21848 diff -Nur linux-2.4.29/fs/partitions/sgi.c linux-mips/fs/partitions/sgi.c
21849 --- linux-2.4.29/fs/partitions/sgi.c 2001-10-02 05:03:26.000000000 +0200
21850 +++ linux-mips/fs/partitions/sgi.c 2004-08-11 22:30:07.000000000 +0200
21851 @@ -17,6 +17,11 @@
21852 #include "check.h"
21853 #include "sgi.h"
21854
21855 +#if CONFIG_BLK_DEV_MD
21856 +extern void md_autodetect_dev(kdev_t dev);
21857 +#endif
21858 +
21859 +
21860 int sgi_partition(struct gendisk *hd, struct block_device *bdev, unsigned long first_sector, int current_minor)
21861 {
21862 int i, csum, magic;
21863 @@ -77,6 +82,10 @@
21864 if(!blocks)
21865 continue;
21866 add_gd_partition(hd, current_minor, start, blocks);
21867 +#ifdef CONFIG_BLK_DEV_MD
21868 + if (be32_to_cpu(p->type) == LINUX_RAID_PARTITION)
21869 + md_autodetect_dev(MKDEV(hd->major, current_minor));
21870 +#endif
21871 current_minor++;
21872 }
21873 printk("\n");
21874 diff -Nur linux-2.4.29/fs/proc/array.c linux-mips/fs/proc/array.c
21875 --- linux-2.4.29/fs/proc/array.c 2005-01-19 15:10:11.000000000 +0100
21876 +++ linux-mips/fs/proc/array.c 2004-11-29 18:47:18.000000000 +0100
21877 @@ -368,15 +368,15 @@
21878 task->cmin_flt,
21879 task->maj_flt,
21880 task->cmaj_flt,
21881 - task->times.tms_utime,
21882 - task->times.tms_stime,
21883 - task->times.tms_cutime,
21884 - task->times.tms_cstime,
21885 + hz_to_std(task->times.tms_utime),
21886 + hz_to_std(task->times.tms_stime),
21887 + hz_to_std(task->times.tms_cutime),
21888 + hz_to_std(task->times.tms_cstime),
21889 priority,
21890 nice,
21891 0UL /* removed */,
21892 task->it_real_value,
21893 - task->start_time,
21894 + hz_to_std(task->start_time),
21895 vsize,
21896 mm ? mm->rss : 0, /* you might want to shift this left 3 */
21897 task->rlim[RLIMIT_RSS].rlim_cur,
21898 @@ -615,14 +615,14 @@
21899
21900 len = sprintf(buffer,
21901 "cpu %lu %lu\n",
21902 - task->times.tms_utime,
21903 - task->times.tms_stime);
21904 + hz_to_std(task->times.tms_utime),
21905 + hz_to_std(task->times.tms_stime));
21906
21907 for (i = 0 ; i < smp_num_cpus; i++)
21908 len += sprintf(buffer + len, "cpu%d %lu %lu\n",
21909 i,
21910 - task->per_cpu_utime[cpu_logical_map(i)],
21911 - task->per_cpu_stime[cpu_logical_map(i)]);
21912 + hz_to_std(task->per_cpu_utime[cpu_logical_map(i)]),
21913 + hz_to_std(task->per_cpu_stime[cpu_logical_map(i)]));
21914
21915 return len;
21916 }
21917 diff -Nur linux-2.4.29/fs/proc/proc_misc.c linux-mips/fs/proc/proc_misc.c
21918 --- linux-2.4.29/fs/proc/proc_misc.c 2004-08-08 01:26:06.000000000 +0200
21919 +++ linux-mips/fs/proc/proc_misc.c 2004-08-14 20:39:01.000000000 +0200
21920 @@ -308,16 +308,16 @@
21921 {
21922 int i, len = 0;
21923 extern unsigned long total_forks;
21924 - unsigned long jif = jiffies;
21925 + unsigned long jif = hz_to_std(jiffies);
21926 unsigned int sum = 0, user = 0, nice = 0, system = 0;
21927 int major, disk;
21928
21929 for (i = 0 ; i < smp_num_cpus; i++) {
21930 int cpu = cpu_logical_map(i), j;
21931
21932 - user += kstat.per_cpu_user[cpu];
21933 - nice += kstat.per_cpu_nice[cpu];
21934 - system += kstat.per_cpu_system[cpu];
21935 + user += hz_to_std(kstat.per_cpu_user[cpu]);
21936 + nice += hz_to_std(kstat.per_cpu_nice[cpu]);
21937 + system += hz_to_std(kstat.per_cpu_system[cpu]);
21938 #if !defined(CONFIG_ARCH_S390)
21939 for (j = 0 ; j < NR_IRQS ; j++)
21940 sum += kstat.irqs[cpu][j];
21941 @@ -331,10 +331,10 @@
21942 proc_sprintf(page, &off, &len,
21943 "cpu%d %u %u %u %lu\n",
21944 i,
21945 - kstat.per_cpu_user[cpu_logical_map(i)],
21946 - kstat.per_cpu_nice[cpu_logical_map(i)],
21947 - kstat.per_cpu_system[cpu_logical_map(i)],
21948 - jif - ( kstat.per_cpu_user[cpu_logical_map(i)] \
21949 + hz_to_std(kstat.per_cpu_user[cpu_logical_map(i)]),
21950 + hz_to_std(kstat.per_cpu_nice[cpu_logical_map(i)]),
21951 + hz_to_std(kstat.per_cpu_system[cpu_logical_map(i)]),
21952 + jif - hz_to_std( kstat.per_cpu_user[cpu_logical_map(i)] \
21953 + kstat.per_cpu_nice[cpu_logical_map(i)] \
21954 + kstat.per_cpu_system[cpu_logical_map(i)]));
21955 proc_sprintf(page, &off, &len,
21956 diff -Nur linux-2.4.29/include/asm-alpha/param.h linux-mips/include/asm-alpha/param.h
21957 --- linux-2.4.29/include/asm-alpha/param.h 2000-11-08 08:37:31.000000000 +0100
21958 +++ linux-mips/include/asm-alpha/param.h 2000-11-28 04:59:03.000000000 +0100
21959 @@ -13,6 +13,9 @@
21960 # else
21961 # define HZ 1200
21962 # endif
21963 +#ifdef __KERNEL__
21964 +# define hz_to_std(a) (a)
21965 +#endif
21966 #endif
21967
21968 #define EXEC_PAGESIZE 8192
21969 diff -Nur linux-2.4.29/include/asm-i386/param.h linux-mips/include/asm-i386/param.h
21970 --- linux-2.4.29/include/asm-i386/param.h 2000-10-27 20:04:43.000000000 +0200
21971 +++ linux-mips/include/asm-i386/param.h 2000-11-23 03:00:55.000000000 +0100
21972 @@ -3,6 +3,9 @@
21973
21974 #ifndef HZ
21975 #define HZ 100
21976 +#ifdef __KERNEL__
21977 +#define hz_to_std(a) (a)
21978 +#endif
21979 #endif
21980
21981 #define EXEC_PAGESIZE 4096
21982 diff -Nur linux-2.4.29/include/asm-ia64/param.h linux-mips/include/asm-ia64/param.h
21983 --- linux-2.4.29/include/asm-ia64/param.h 2004-04-14 15:05:40.000000000 +0200
21984 +++ linux-mips/include/asm-ia64/param.h 2004-04-16 05:14:20.000000000 +0200
21985 @@ -7,9 +7,15 @@
21986 * Based on <asm-i386/param.h>.
21987 *
21988 * Modified 1998, 1999, 2002-2003
21989 - * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
21990 + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
21991 */
21992
21993 +#include <linux/config.h>
21994 +
21995 +#ifdef __KERNEL__
21996 +#define hz_to_std(a) (a)
21997 +#endif
21998 +
21999 #define EXEC_PAGESIZE 65536
22000
22001 #ifndef NGROUPS
22002 diff -Nur linux-2.4.29/include/asm-m68k/param.h linux-mips/include/asm-m68k/param.h
22003 --- linux-2.4.29/include/asm-m68k/param.h 2001-01-04 22:00:55.000000000 +0100
22004 +++ linux-mips/include/asm-m68k/param.h 2001-01-11 05:02:45.000000000 +0100
22005 @@ -3,6 +3,9 @@
22006
22007 #ifndef HZ
22008 #define HZ 100
22009 +#ifdef __KERNEL__
22010 +#define hz_to_std(a) (a)
22011 +#endif
22012 #endif
22013
22014 #define EXEC_PAGESIZE 8192
22015 diff -Nur linux-2.4.29/include/asm-mips/au1000.h linux-mips/include/asm-mips/au1000.h
22016 --- linux-2.4.29/include/asm-mips/au1000.h 2005-01-19 15:10:11.000000000 +0100
22017 +++ linux-mips/include/asm-mips/au1000.h 2005-01-31 12:59:48.000000000 +0100
22018 @@ -160,28 +160,356 @@
22019 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
22020 #endif
22021
22022 -/* SDRAM Controller */
22023 +/*
22024 + * SDRAM Register Offsets
22025 + */
22026 #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
22027 -#define MEM_SDMODE0 0xB4000000
22028 -#define MEM_SDMODE1 0xB4000004
22029 -#define MEM_SDMODE2 0xB4000008
22030 -
22031 -#define MEM_SDADDR0 0xB400000C
22032 -#define MEM_SDADDR1 0xB4000010
22033 -#define MEM_SDADDR2 0xB4000014
22034 -
22035 -#define MEM_SDREFCFG 0xB4000018
22036 -#define MEM_SDPRECMD 0xB400001C
22037 -#define MEM_SDAUTOREF 0xB4000020
22038 -
22039 -#define MEM_SDWRMD0 0xB4000024
22040 -#define MEM_SDWRMD1 0xB4000028
22041 -#define MEM_SDWRMD2 0xB400002C
22042 +#define MEM_SDMODE0 (0x0000)
22043 +#define MEM_SDMODE1 (0x0004)
22044 +#define MEM_SDMODE2 (0x0008)
22045 +#define MEM_SDADDR0 (0x000C)
22046 +#define MEM_SDADDR1 (0x0010)
22047 +#define MEM_SDADDR2 (0x0014)
22048 +#define MEM_SDREFCFG (0x0018)
22049 +#define MEM_SDPRECMD (0x001C)
22050 +#define MEM_SDAUTOREF (0x0020)
22051 +#define MEM_SDWRMD0 (0x0024)
22052 +#define MEM_SDWRMD1 (0x0028)
22053 +#define MEM_SDWRMD2 (0x002C)
22054 +#define MEM_SDSLEEP (0x0030)
22055 +#define MEM_SDSMCKE (0x0034)
22056 +
22057 +#ifndef ASSEMBLER
22058 +/*typedef volatile struct
22059 +{
22060 + uint32 sdmode0;
22061 + uint32 sdmode1;
22062 + uint32 sdmode2;
22063 + uint32 sdaddr0;
22064 + uint32 sdaddr1;
22065 + uint32 sdaddr2;
22066 + uint32 sdrefcfg;
22067 + uint32 sdautoref;
22068 + uint32 sdwrmd0;
22069 + uint32 sdwrmd1;
22070 + uint32 sdwrmd2;
22071 + uint32 sdsleep;
22072 + uint32 sdsmcke;
22073 +
22074 +} AU1X00_SDRAM;*/
22075 +#endif
22076 +
22077 +/*
22078 + * MEM_SDMODE register content definitions
22079 + */
22080 +#define MEM_SDMODE_F (1<<22)
22081 +#define MEM_SDMODE_SR (1<<21)
22082 +#define MEM_SDMODE_BS (1<<20)
22083 +#define MEM_SDMODE_RS (3<<18)
22084 +#define MEM_SDMODE_CS (7<<15)
22085 +#define MEM_SDMODE_TRAS (15<<11)
22086 +#define MEM_SDMODE_TMRD (3<<9)
22087 +#define MEM_SDMODE_TWR (3<<7)
22088 +#define MEM_SDMODE_TRP (3<<5)
22089 +#define MEM_SDMODE_TRCD (3<<3)
22090 +#define MEM_SDMODE_TCL (7<<0)
22091 +
22092 +#define MEM_SDMODE_BS_2Bank (0<<20)
22093 +#define MEM_SDMODE_BS_4Bank (1<<20)
22094 +#define MEM_SDMODE_RS_11Row (0<<18)
22095 +#define MEM_SDMODE_RS_12Row (1<<18)
22096 +#define MEM_SDMODE_RS_13Row (2<<18)
22097 +#define MEM_SDMODE_RS_N(N) ((N)<<18)
22098 +#define MEM_SDMODE_CS_7Col (0<<15)
22099 +#define MEM_SDMODE_CS_8Col (1<<15)
22100 +#define MEM_SDMODE_CS_9Col (2<<15)
22101 +#define MEM_SDMODE_CS_10Col (3<<15)
22102 +#define MEM_SDMODE_CS_11Col (4<<15)
22103 +#define MEM_SDMODE_CS_N(N) ((N)<<15)
22104 +#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
22105 +#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
22106 +#define MEM_SDMODE_TWR_N(N) ((N)<<7)
22107 +#define MEM_SDMODE_TRP_N(N) ((N)<<5)
22108 +#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
22109 +#define MEM_SDMODE_TCL_N(N) ((N)<<0)
22110 +
22111 +/*
22112 + * MEM_SDADDR register contents definitions
22113 + */
22114 +#define MEM_SDADDR_E (1<<20)
22115 +#define MEM_SDADDR_CSBA (0x03FF<<10)
22116 +#define MEM_SDADDR_CSMASK (0x03FF<<0)
22117 +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
22118 +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
22119 +
22120 +/*
22121 + * MEM_SDREFCFG register content definitions
22122 + */
22123 +#define MEM_SDREFCFG_TRC (15<<28)
22124 +#define MEM_SDREFCFG_TRPM (3<<26)
22125 +#define MEM_SDREFCFG_E (1<<25)
22126 +#define MEM_SDREFCFG_RE (0x1ffffff<<0)
22127 +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
22128 +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
22129 +#define MEM_SDREFCFG_REF_N(N) (N)
22130 +#endif
22131 +
22132 +/***********************************************************************/
22133 +
22134 +/*
22135 + * Au1550 SDRAM Register Offsets
22136 + */
22137 +
22138 +/***********************************************************************/
22139 +
22140 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
22141 +#define MEM_SDMODE0 (0x0800)
22142 +#define MEM_SDMODE1 (0x0808)
22143 +#define MEM_SDMODE2 (0x0810)
22144 +#define MEM_SDADDR0 (0x0820)
22145 +#define MEM_SDADDR1 (0x0828)
22146 +#define MEM_SDADDR2 (0x0830)
22147 +#define MEM_SDCONFIGA (0x0840)
22148 +#define MEM_SDCONFIGB (0x0848)
22149 +#define MEM_SDSTAT (0x0850)
22150 +#define MEM_SDERRADDR (0x0858)
22151 +#define MEM_SDSTRIDE0 (0x0860)
22152 +#define MEM_SDSTRIDE1 (0x0868)
22153 +#define MEM_SDSTRIDE2 (0x0870)
22154 +#define MEM_SDWRMD0 (0x0880)
22155 +#define MEM_SDWRMD1 (0x0888)
22156 +#define MEM_SDWRMD2 (0x0890)
22157 +#define MEM_SDPRECMD (0x08C0)
22158 +#define MEM_SDAUTOREF (0x08C8)
22159 +#define MEM_SDSREF (0x08D0)
22160 +#define MEM_SDSLEEP MEM_SDSREF
22161 +
22162 +#ifndef ASSEMBLER
22163 +/*typedef volatile struct
22164 +{
22165 + uint32 sdmode0;
22166 + uint32 reserved0;
22167 + uint32 sdmode1;
22168 + uint32 reserved1;
22169 + uint32 sdmode2;
22170 + uint32 reserved2[3];
22171 + uint32 sdaddr0;
22172 + uint32 reserved3;
22173 + uint32 sdaddr1;
22174 + uint32 reserved4;
22175 + uint32 sdaddr2;
22176 + uint32 reserved5[3];
22177 + uint32 sdconfiga;
22178 + uint32 reserved6;
22179 + uint32 sdconfigb;
22180 + uint32 reserved7;
22181 + uint32 sdstat;
22182 + uint32 reserved8;
22183 + uint32 sderraddr;
22184 + uint32 reserved9;
22185 + uint32 sdstride0;
22186 + uint32 reserved10;
22187 + uint32 sdstride1;
22188 + uint32 reserved11;
22189 + uint32 sdstride2;
22190 + uint32 reserved12[3];
22191 + uint32 sdwrmd0;
22192 + uint32 reserved13;
22193 + uint32 sdwrmd1;
22194 + uint32 reserved14;
22195 + uint32 sdwrmd2;
22196 + uint32 reserved15[11];
22197 + uint32 sdprecmd;
22198 + uint32 reserved16;
22199 + uint32 sdautoref;
22200 + uint32 reserved17;
22201 + uint32 sdsref;
22202 +
22203 +} AU1550_SDRAM;*/
22204 +#endif
22205 +#endif
22206 +
22207 +/*
22208 + * Physical base addresses for integrated peripherals
22209 + */
22210 +
22211 +#ifdef CONFIG_SOC_AU1000
22212 +#define MEM_PHYS_ADDR 0x14000000
22213 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22214 +#define DMA0_PHYS_ADDR 0x14002000
22215 +#define DMA1_PHYS_ADDR 0x14002100
22216 +#define DMA2_PHYS_ADDR 0x14002200
22217 +#define DMA3_PHYS_ADDR 0x14002300
22218 +#define DMA4_PHYS_ADDR 0x14002400
22219 +#define DMA5_PHYS_ADDR 0x14002500
22220 +#define DMA6_PHYS_ADDR 0x14002600
22221 +#define DMA7_PHYS_ADDR 0x14002700
22222 +#define IC0_PHYS_ADDR 0x10400000
22223 +#define IC1_PHYS_ADDR 0x11800000
22224 +#define AC97_PHYS_ADDR 0x10000000
22225 +#define USBH_PHYS_ADDR 0x10100000
22226 +#define USBD_PHYS_ADDR 0x10200000
22227 +#define IRDA_PHYS_ADDR 0x10300000
22228 +#define MAC0_PHYS_ADDR 0x10500000
22229 +#define MAC1_PHYS_ADDR 0x10510000
22230 +#define MACEN_PHYS_ADDR 0x10520000
22231 +#define MACDMA0_PHYS_ADDR 0x14004000
22232 +#define MACDMA1_PHYS_ADDR 0x14004200
22233 +#define I2S_PHYS_ADDR 0x11000000
22234 +#define UART0_PHYS_ADDR 0x11100000
22235 +#define UART1_PHYS_ADDR 0x11200000
22236 +#define UART2_PHYS_ADDR 0x11300000
22237 +#define UART3_PHYS_ADDR 0x11400000
22238 +#define SSI0_PHYS_ADDR 0x11600000
22239 +#define SSI1_PHYS_ADDR 0x11680000
22240 +#define SYS_PHYS_ADDR 0x11900000
22241 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22242 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22243 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22244 +#endif
22245 +
22246 +/********************************************************************/
22247
22248 -#define MEM_SDSLEEP 0xB4000030
22249 -#define MEM_SDSMCKE 0xB4000034
22250 +#ifdef CONFIG_SOC_AU1500
22251 +#define MEM_PHYS_ADDR 0x14000000
22252 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22253 +#define DMA0_PHYS_ADDR 0x14002000
22254 +#define DMA1_PHYS_ADDR 0x14002100
22255 +#define DMA2_PHYS_ADDR 0x14002200
22256 +#define DMA3_PHYS_ADDR 0x14002300
22257 +#define DMA4_PHYS_ADDR 0x14002400
22258 +#define DMA5_PHYS_ADDR 0x14002500
22259 +#define DMA6_PHYS_ADDR 0x14002600
22260 +#define DMA7_PHYS_ADDR 0x14002700
22261 +#define IC0_PHYS_ADDR 0x10400000
22262 +#define IC1_PHYS_ADDR 0x11800000
22263 +#define AC97_PHYS_ADDR 0x10000000
22264 +#define USBH_PHYS_ADDR 0x10100000
22265 +#define USBD_PHYS_ADDR 0x10200000
22266 +#define PCI_PHYS_ADDR 0x14005000
22267 +#define MAC0_PHYS_ADDR 0x11500000
22268 +#define MAC1_PHYS_ADDR 0x11510000
22269 +#define MACEN_PHYS_ADDR 0x11520000
22270 +#define MACDMA0_PHYS_ADDR 0x14004000
22271 +#define MACDMA1_PHYS_ADDR 0x14004200
22272 +#define I2S_PHYS_ADDR 0x11000000
22273 +#define UART0_PHYS_ADDR 0x11100000
22274 +#define UART3_PHYS_ADDR 0x11400000
22275 +#define GPIO2_PHYS_ADDR 0x11700000
22276 +#define SYS_PHYS_ADDR 0x11900000
22277 +#define PCI_MEM_PHYS_ADDR 0x400000000
22278 +#define PCI_IO_PHYS_ADDR 0x500000000
22279 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
22280 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
22281 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22282 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22283 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22284 #endif
22285
22286 +/********************************************************************/
22287 +
22288 +#ifdef CONFIG_SOC_AU1100
22289 +#define MEM_PHYS_ADDR 0x14000000
22290 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22291 +#define DMA0_PHYS_ADDR 0x14002000
22292 +#define DMA1_PHYS_ADDR 0x14002100
22293 +#define DMA2_PHYS_ADDR 0x14002200
22294 +#define DMA3_PHYS_ADDR 0x14002300
22295 +#define DMA4_PHYS_ADDR 0x14002400
22296 +#define DMA5_PHYS_ADDR 0x14002500
22297 +#define DMA6_PHYS_ADDR 0x14002600
22298 +#define DMA7_PHYS_ADDR 0x14002700
22299 +#define IC0_PHYS_ADDR 0x10400000
22300 +#define SD0_PHYS_ADDR 0x10600000
22301 +#define SD1_PHYS_ADDR 0x10680000
22302 +#define IC1_PHYS_ADDR 0x11800000
22303 +#define AC97_PHYS_ADDR 0x10000000
22304 +#define USBH_PHYS_ADDR 0x10100000
22305 +#define USBD_PHYS_ADDR 0x10200000
22306 +#define IRDA_PHYS_ADDR 0x10300000
22307 +#define MAC0_PHYS_ADDR 0x10500000
22308 +#define MACEN_PHYS_ADDR 0x10520000
22309 +#define MACDMA0_PHYS_ADDR 0x14004000
22310 +#define MACDMA1_PHYS_ADDR 0x14004200
22311 +#define I2S_PHYS_ADDR 0x11000000
22312 +#define UART0_PHYS_ADDR 0x11100000
22313 +#define UART1_PHYS_ADDR 0x11200000
22314 +#define UART3_PHYS_ADDR 0x11400000
22315 +#define SSI0_PHYS_ADDR 0x11600000
22316 +#define SSI1_PHYS_ADDR 0x11680000
22317 +#define GPIO2_PHYS_ADDR 0x11700000
22318 +#define SYS_PHYS_ADDR 0x11900000
22319 +#define LCD_PHYS_ADDR 0x15000000
22320 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22321 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22322 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22323 +#endif
22324 +
22325 +/***********************************************************************/
22326 +
22327 +#ifdef CONFIG_SOC_AU1550
22328 +#define MEM_PHYS_ADDR 0x14000000
22329 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22330 +#define IC0_PHYS_ADDR 0x10400000
22331 +#define IC1_PHYS_ADDR 0x11800000
22332 +#define USBH_PHYS_ADDR 0x14020000
22333 +#define USBD_PHYS_ADDR 0x10200000
22334 +#define PCI_PHYS_ADDR 0x14005000
22335 +#define MAC0_PHYS_ADDR 0x10500000
22336 +#define MAC1_PHYS_ADDR 0x10510000
22337 +#define MACEN_PHYS_ADDR 0x10520000
22338 +#define MACDMA0_PHYS_ADDR 0x14004000
22339 +#define MACDMA1_PHYS_ADDR 0x14004200
22340 +#define UART0_PHYS_ADDR 0x11100000
22341 +#define UART1_PHYS_ADDR 0x11200000
22342 +#define UART3_PHYS_ADDR 0x11400000
22343 +#define GPIO2_PHYS_ADDR 0x11700000
22344 +#define SYS_PHYS_ADDR 0x11900000
22345 +#define DDMA_PHYS_ADDR 0x14002000
22346 +#define PE_PHYS_ADDR 0x14008000
22347 +#define PSC0_PHYS_ADDR 0x11A00000
22348 +#define PSC1_PHYS_ADDR 0x11B00000
22349 +#define PSC2_PHYS_ADDR 0x10A00000
22350 +#define PSC3_PHYS_ADDR 0x10B00000
22351 +#define PCI_MEM_PHYS_ADDR 0x400000000
22352 +#define PCI_IO_PHYS_ADDR 0x500000000
22353 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
22354 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
22355 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22356 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22357 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22358 +#endif
22359 +
22360 +/***********************************************************************/
22361 +
22362 +#ifdef CONFIG_SOC_AU1200
22363 +#define MEM_PHYS_ADDR 0x14000000
22364 +#define STATIC_MEM_PHYS_ADDR 0x14001000
22365 +#define AES_PHYS_ADDR 0x10300000
22366 +#define CIM_PHYS_ADDR 0x14004000
22367 +#define IC0_PHYS_ADDR 0x10400000
22368 +#define IC1_PHYS_ADDR 0x11800000
22369 +#define USBM_PHYS_ADDR 0x14020000
22370 +#define USBH_PHYS_ADDR 0x14020100
22371 +#define UART0_PHYS_ADDR 0x11100000
22372 +#define UART1_PHYS_ADDR 0x11200000
22373 +#define GPIO2_PHYS_ADDR 0x11700000
22374 +#define SYS_PHYS_ADDR 0x11900000
22375 +#define DDMA_PHYS_ADDR 0x14002000
22376 +#define PSC0_PHYS_ADDR 0x11A00000
22377 +#define PSC1_PHYS_ADDR 0x11B00000
22378 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
22379 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
22380 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
22381 +#define SD0_PHYS_ADDR 0x10600000
22382 +#define SD1_PHYS_ADDR 0x10680000
22383 +#define LCD_PHYS_ADDR 0x15000000
22384 +#define SWCNT_PHYS_ADDR 0x1110010C
22385 +#define MAEFE_PHYS_ADDR 0x14012000
22386 +#define MAEBE_PHYS_ADDR 0x14010000
22387 +#endif
22388 +
22389 +
22390 /* Static Bus Controller */
22391 #define MEM_STCFG0 0xB4001000
22392 #define MEM_STTIME0 0xB4001004
22393 @@ -367,7 +695,7 @@
22394 #define AU1000_MAC0_ENABLE 0xB0520000
22395 #define AU1000_MAC1_ENABLE 0xB0520004
22396 #define NUM_ETH_INTERFACES 2
22397 -#endif // CONFIG_SOC_AU1000
22398 +#endif /* CONFIG_SOC_AU1000 */
22399
22400 /* Au1500 */
22401 #ifdef CONFIG_SOC_AU1500
22402 @@ -438,7 +766,7 @@
22403 #define AU1500_MAC0_ENABLE 0xB1520000
22404 #define AU1500_MAC1_ENABLE 0xB1520004
22405 #define NUM_ETH_INTERFACES 2
22406 -#endif // CONFIG_SOC_AU1500
22407 +#endif /* CONFIG_SOC_AU1500 */
22408
22409 /* Au1100 */
22410 #ifdef CONFIG_SOC_AU1100
22411 @@ -483,6 +811,22 @@
22412 #define AU1000_GPIO_13 45
22413 #define AU1000_GPIO_14 46
22414 #define AU1000_GPIO_15 47
22415 +#define AU1000_GPIO_16 48
22416 +#define AU1000_GPIO_17 49
22417 +#define AU1000_GPIO_18 50
22418 +#define AU1000_GPIO_19 51
22419 +#define AU1000_GPIO_20 52
22420 +#define AU1000_GPIO_21 53
22421 +#define AU1000_GPIO_22 54
22422 +#define AU1000_GPIO_23 55
22423 +#define AU1000_GPIO_24 56
22424 +#define AU1000_GPIO_25 57
22425 +#define AU1000_GPIO_26 58
22426 +#define AU1000_GPIO_27 59
22427 +#define AU1000_GPIO_28 60
22428 +#define AU1000_GPIO_29 61
22429 +#define AU1000_GPIO_30 62
22430 +#define AU1000_GPIO_31 63
22431
22432 #define UART0_ADDR 0xB1100000
22433 #define UART1_ADDR 0xB1200000
22434 @@ -494,7 +838,7 @@
22435 #define AU1100_ETH0_BASE 0xB0500000
22436 #define AU1100_MAC0_ENABLE 0xB0520000
22437 #define NUM_ETH_INTERFACES 1
22438 -#endif // CONFIG_SOC_AU1100
22439 +#endif /* CONFIG_SOC_AU1100 */
22440
22441 #ifdef CONFIG_SOC_AU1550
22442 #define AU1550_UART0_INT 0
22443 @@ -511,14 +855,14 @@
22444 #define AU1550_PSC1_INT 11
22445 #define AU1550_PSC2_INT 12
22446 #define AU1550_PSC3_INT 13
22447 -#define AU1550_TOY_INT 14
22448 -#define AU1550_TOY_MATCH0_INT 15
22449 -#define AU1550_TOY_MATCH1_INT 16
22450 -#define AU1550_TOY_MATCH2_INT 17
22451 -#define AU1550_RTC_INT 18
22452 -#define AU1550_RTC_MATCH0_INT 19
22453 -#define AU1550_RTC_MATCH1_INT 20
22454 -#define AU1550_RTC_MATCH2_INT 21
22455 +#define AU1000_TOY_INT 14
22456 +#define AU1000_TOY_MATCH0_INT 15
22457 +#define AU1000_TOY_MATCH1_INT 16
22458 +#define AU1000_TOY_MATCH2_INT 17
22459 +#define AU1000_RTC_INT 18
22460 +#define AU1000_RTC_MATCH0_INT 19
22461 +#define AU1000_RTC_MATCH1_INT 20
22462 +#define AU1000_RTC_MATCH2_INT 21
22463 #define AU1550_NAND_INT 23
22464 #define AU1550_USB_DEV_REQ_INT 24
22465 #define AU1550_USB_DEV_SUS_INT 25
22466 @@ -573,7 +917,7 @@
22467 #define AU1550_MAC0_ENABLE 0xB0520000
22468 #define AU1550_MAC1_ENABLE 0xB0520004
22469 #define NUM_ETH_INTERFACES 2
22470 -#endif // CONFIG_SOC_AU1550
22471 +#endif /* CONFIG_SOC_AU1550 */
22472
22473 #ifdef CONFIG_SOC_AU1200
22474 #define AU1200_UART0_INT 0
22475 @@ -590,14 +934,14 @@
22476 #define AU1200_PSC1_INT 11
22477 #define AU1200_AES_INT 12
22478 #define AU1200_CAMERA_INT 13
22479 -#define AU1200_TOY_INT 14
22480 -#define AU1200_TOY_MATCH0_INT 15
22481 -#define AU1200_TOY_MATCH1_INT 16
22482 -#define AU1200_TOY_MATCH2_INT 17
22483 -#define AU1200_RTC_INT 18
22484 -#define AU1200_RTC_MATCH0_INT 19
22485 -#define AU1200_RTC_MATCH1_INT 20
22486 -#define AU1200_RTC_MATCH2_INT 21
22487 +#define AU1000_TOY_INT 14
22488 +#define AU1000_TOY_MATCH0_INT 15
22489 +#define AU1000_TOY_MATCH1_INT 16
22490 +#define AU1000_TOY_MATCH2_INT 17
22491 +#define AU1000_RTC_INT 18
22492 +#define AU1000_RTC_MATCH0_INT 19
22493 +#define AU1000_RTC_MATCH1_INT 20
22494 +#define AU1000_RTC_MATCH2_INT 21
22495 #define AU1200_NAND_INT 23
22496 #define AU1200_GPIO_204 24
22497 #define AU1200_GPIO_205 25
22498 @@ -605,6 +949,7 @@
22499 #define AU1200_GPIO_207 27
22500 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
22501 #define AU1200_USB_INT 29
22502 +#define AU1000_USB_HOST_INT AU1200_USB_INT
22503 #define AU1200_LCD_INT 30
22504 #define AU1200_MAE_BOTH_INT 31
22505 #define AU1000_GPIO_0 32
22506 @@ -643,21 +988,36 @@
22507 #define UART0_ADDR 0xB1100000
22508 #define UART1_ADDR 0xB1200000
22509
22510 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
22511 -#define USB_HOST_CONFIG 0xB4027ffc
22512 +#define USB_UOC_BASE 0x14020020
22513 +#define USB_UOC_LEN 0x20
22514 +#define USB_OHCI_BASE 0x14020100
22515 +#define USB_OHCI_LEN 0x100
22516 +#define USB_EHCI_BASE 0x14020200
22517 +#define USB_EHCI_LEN 0x100
22518 +#define USB_UDC_BASE 0x14022000
22519 +#define USB_UDC_LEN 0x2000
22520 +#define USB_MSR_BASE 0xB4020000
22521 +#define USB_MSR_MCFG 4
22522 +#define USBMSRMCFG_OMEMEN 0
22523 +#define USBMSRMCFG_OBMEN 1
22524 +#define USBMSRMCFG_EMEMEN 2
22525 +#define USBMSRMCFG_EBMEN 3
22526 +#define USBMSRMCFG_DMEMEN 4
22527 +#define USBMSRMCFG_DBMEN 5
22528 +#define USBMSRMCFG_GMEMEN 6
22529 +#define USBMSRMCFG_OHCCLKEN 16
22530 +#define USBMSRMCFG_EHCCLKEN 17
22531 +#define USBMSRMCFG_UDCCLKEN 18
22532 +#define USBMSRMCFG_PHYPLLEN 19
22533 +#define USBMSRMCFG_RDCOMB 30
22534 +#define USBMSRMCFG_PFEN 31
22535
22536 -// these are here for prototyping on au1550 (do not exist on au1200)
22537 -#define AU1200_ETH0_BASE 0xB0500000
22538 -#define AU1200_ETH1_BASE 0xB0510000
22539 -#define AU1200_MAC0_ENABLE 0xB0520000
22540 -#define AU1200_MAC1_ENABLE 0xB0520004
22541 -#define NUM_ETH_INTERFACES 2
22542 -#endif // CONFIG_SOC_AU1200
22543 +#endif /* CONFIG_SOC_AU1200 */
22544
22545 #define AU1000_LAST_INTC0_INT 31
22546 +#define AU1000_LAST_INTC1_INT 63
22547 #define AU1000_MAX_INTR 63
22548
22549 -
22550 /* Programmable Counters 0 and 1 */
22551 #define SYS_BASE 0xB1900000
22552 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
22553 @@ -728,6 +1088,8 @@
22554 #define I2S_CONTROL_D (1<<1)
22555 #define I2S_CONTROL_CE (1<<0)
22556
22557 +#ifndef CONFIG_SOC_AU1200
22558 +
22559 /* USB Host Controller */
22560 #define USB_OHCI_LEN 0x00100000
22561
22562 @@ -773,6 +1135,8 @@
22563 #define USBDEV_ENABLE (1<<1)
22564 #define USBDEV_CE (1<<0)
22565
22566 +#endif /* !CONFIG_SOC_AU1200 */
22567 +
22568 /* Ethernet Controllers */
22569
22570 /* 4 byte offsets from AU1000_ETH_BASE */
22571 @@ -1171,6 +1535,37 @@
22572 #define SYS_PF_PSC1_S1 (1 << 1)
22573 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
22574
22575 +/* Au1200 Only */
22576 +#ifdef CONFIG_SOC_AU1200
22577 +#define SYS_PINFUNC_DMA (1<<31)
22578 +#define SYS_PINFUNC_S0A (1<<30)
22579 +#define SYS_PINFUNC_S1A (1<<29)
22580 +#define SYS_PINFUNC_LP0 (1<<28)
22581 +#define SYS_PINFUNC_LP1 (1<<27)
22582 +#define SYS_PINFUNC_LD16 (1<<26)
22583 +#define SYS_PINFUNC_LD8 (1<<25)
22584 +#define SYS_PINFUNC_LD1 (1<<24)
22585 +#define SYS_PINFUNC_LD0 (1<<23)
22586 +#define SYS_PINFUNC_P1A (3<<21)
22587 +#define SYS_PINFUNC_P1B (1<<20)
22588 +#define SYS_PINFUNC_FS3 (1<<19)
22589 +#define SYS_PINFUNC_P0A (3<<17)
22590 +#define SYS_PINFUNC_CS (1<<16)
22591 +#define SYS_PINFUNC_CIM (1<<15)
22592 +#define SYS_PINFUNC_P1C (1<<14)
22593 +#define SYS_PINFUNC_U1T (1<<12)
22594 +#define SYS_PINFUNC_U1R (1<<11)
22595 +#define SYS_PINFUNC_EX1 (1<<10)
22596 +#define SYS_PINFUNC_EX0 (1<<9)
22597 +#define SYS_PINFUNC_U0R (1<<8)
22598 +#define SYS_PINFUNC_MC (1<<7)
22599 +#define SYS_PINFUNC_S0B (1<<6)
22600 +#define SYS_PINFUNC_S0C (1<<5)
22601 +#define SYS_PINFUNC_P0B (1<<4)
22602 +#define SYS_PINFUNC_U0T (1<<3)
22603 +#define SYS_PINFUNC_S1B (1<<2)
22604 +#endif
22605 +
22606 #define SYS_TRIOUTRD 0xB1900100
22607 #define SYS_TRIOUTCLR 0xB1900100
22608 #define SYS_OUTPUTRD 0xB1900108
22609 @@ -1298,7 +1693,6 @@
22610 #define SD1_XMIT_FIFO 0xB0680000
22611 #define SD1_RECV_FIFO 0xB0680004
22612
22613 -
22614 #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
22615 /* Au1500 PCI Controller */
22616 #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
22617 @@ -1388,9 +1782,60 @@
22618
22619 #endif
22620
22621 +#ifndef _LANGUAGE_ASSEMBLY
22622 +typedef volatile struct
22623 +{
22624 + /* 0x0000 */ u32 toytrim;
22625 + /* 0x0004 */ u32 toywrite;
22626 + /* 0x0008 */ u32 toymatch0;
22627 + /* 0x000C */ u32 toymatch1;
22628 + /* 0x0010 */ u32 toymatch2;
22629 + /* 0x0014 */ u32 cntrctrl;
22630 + /* 0x0018 */ u32 scratch0;
22631 + /* 0x001C */ u32 scratch1;
22632 + /* 0x0020 */ u32 freqctrl0;
22633 + /* 0x0024 */ u32 freqctrl1;
22634 + /* 0x0028 */ u32 clksrc;
22635 + /* 0x002C */ u32 pinfunc;
22636 + /* 0x0030 */ u32 reserved0;
22637 + /* 0x0034 */ u32 wakemsk;
22638 + /* 0x0038 */ u32 endian;
22639 + /* 0x003C */ u32 powerctrl;
22640 + /* 0x0040 */ u32 toyread;
22641 + /* 0x0044 */ u32 rtctrim;
22642 + /* 0x0048 */ u32 rtcwrite;
22643 + /* 0x004C */ u32 rtcmatch0;
22644 + /* 0x0050 */ u32 rtcmatch1;
22645 + /* 0x0054 */ u32 rtcmatch2;
22646 + /* 0x0058 */ u32 rtcread;
22647 + /* 0x005C */ u32 wakesrc;
22648 + /* 0x0060 */ u32 cpupll;
22649 + /* 0x0064 */ u32 auxpll;
22650 + /* 0x0068 */ u32 reserved1;
22651 + /* 0x006C */ u32 reserved2;
22652 + /* 0x0070 */ u32 reserved3;
22653 + /* 0x0074 */ u32 reserved4;
22654 + /* 0x0078 */ u32 slppwr;
22655 + /* 0x007C */ u32 sleep;
22656 + /* 0x0080 */ u32 reserved5[32];
22657 + /* 0x0100 */ u32 trioutrd;
22658 +#define trioutclr trioutrd
22659 + /* 0x0104 */ u32 reserved6;
22660 + /* 0x0108 */ u32 outputrd;
22661 +#define outputset outputrd
22662 + /* 0x010C */ u32 outputclr;
22663 + /* 0x0110 */ u32 pinstaterd;
22664 +#define pininputen pinstaterd
22665 +
22666 +} AU1X00_SYS;
22667 +
22668 +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
22669 +
22670 +#endif
22671 /* Processor information base on prid.
22672 * Copied from PowerPC.
22673 */
22674 +#ifndef _LANGUAGE_ASSEMBLY
22675 struct cpu_spec {
22676 /* CPU is matched via (PRID & prid_mask) == prid_value */
22677 unsigned int prid_mask;
22678 @@ -1404,3 +1849,6 @@
22679 extern struct cpu_spec cpu_specs[];
22680 extern struct cpu_spec *cur_cpu_spec[];
22681 #endif
22682 +
22683 +#endif
22684 +
22685 diff -Nur linux-2.4.29/include/asm-mips/au1000_gpio.h linux-mips/include/asm-mips/au1000_gpio.h
22686 --- linux-2.4.29/include/asm-mips/au1000_gpio.h 2002-11-29 00:53:15.000000000 +0100
22687 +++ linux-mips/include/asm-mips/au1000_gpio.h 2005-01-31 12:59:48.000000000 +0100
22688 @@ -30,6 +30,13 @@
22689 * 675 Mass Ave, Cambridge, MA 02139, USA.
22690 */
22691
22692 +/*
22693 + * Revision history
22694 + * 01/31/02 0.01 Initial release. Steve Longerbeam, MontaVista
22695 + * 10/12/03 0.1 Added Au1100/Au1500, GPIO2, and bit operations. K.C. Nishio, AMD
22696 + * 08/05/04 0.11 Added Au1550 and Au1200. K.C. Nishio
22697 + */
22698 +
22699 #ifndef __AU1000_GPIO_H
22700 #define __AU1000_GPIO_H
22701
22702 @@ -44,13 +51,94 @@
22703 #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
22704 #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
22705
22706 +// bit operations
22707 +#define AU1000GPIO_BIT_READ _IOW (AU1000GPIO_IOC_MAGIC, 6, int)
22708 +#define AU1000GPIO_BIT_SET _IOW (AU1000GPIO_IOC_MAGIC, 7, int)
22709 +#define AU1000GPIO_BIT_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 8, int)
22710 +#define AU1000GPIO_BIT_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 9, int)
22711 +#define AU1000GPIO_BIT_INIT _IOW (AU1000GPIO_IOC_MAGIC, 10, int)
22712 +#define AU1000GPIO_BIT_TERM _IOW (AU1000GPIO_IOC_MAGIC, 11, int)
22713 +
22714 +/* set this major numer same as the CRIS GPIO driver */
22715 +#define AU1X00_GPIO_MAJOR (120)
22716 +
22717 +#define ENABLED_ZERO (0)
22718 +#define ENABLED_ONE (1)
22719 +#define ENABLED_10 (0x2)
22720 +#define ENABLED_11 (0x3)
22721 +#define ENABLED_111 (0x7)
22722 +#define NOT_AVAIL (-1)
22723 +#define AU1X00_MAX_PRIMARY_GPIO (32)
22724 +
22725 +#define AU1000_GPIO_MINOR_MAX AU1X00_MAX_PRIMARY_GPIO
22726 +/* Au1100, 1500, 1550 and 1200 have the secondary GPIO block */
22727 +#define AU1XX0_GPIO_MINOR_MAX (48)
22728 +
22729 +#define AU1X00_GPIO_NAME "gpio"
22730 +
22731 +/* GPIO pins which are not multiplexed */
22732 +#if defined(CONFIG_SOC_AU1000)
22733 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
22734 + #define NATIVE_GPIO2PIN (0)
22735 +#elif defined(CONFIG_SOC_AU1100)
22736 + #define NATIVE_GPIOPIN ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) | (1 << 18) | \
22737 + (1 << 17) | (1 << 16) | (1 << 7) | (1 << 1) | (1 << 0))
22738 + #define NATIVE_GPIO2PIN (0)
22739 +#elif defined(CONFIG_SOC_AU1500)
22740 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
22741 + /* exclude the PCI reset output signal: GPIO[200], DMA_REQ2 and DMA_REQ3 */
22742 + #define NATIVE_GPIO2PIN (0xfffe & ~((1 << 9) | (1 << 8)))
22743 +#elif defined(CONFIG_SOC_AU1550)
22744 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 6) | (1 << 1) | (1 << 0))
22745 + /* please refere Au1550 Data Book, chapter 15 */
22746 + #define NATIVE_GPIO2PIN (1 << 5)
22747 +#elif defined(CONFIG_SOC_AU1200)
22748 + #define NATIVE_GPIOPIN ((1 << 7) | (1 << 5))
22749 + #define NATIVE_GPIO2PIN (0)
22750 +#endif
22751 +
22752 +/* minor as u32 */
22753 +#define MINOR_TO_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? minor : (minor - AU1X00_MAX_PRIMARY_GPIO))
22754 +#define IS_PRIMARY_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? 1 : 0)
22755 +
22756 +/*
22757 + * pin to minor mapping.
22758 + * GPIO0-GPIO31, minor=0-31.
22759 + * GPIO200-GPIO215, minor=32-47.
22760 + */
22761 +typedef struct _au1x00_gpio_bit_ctl {
22762 + int direction; // The direction of this GPIO pin. 0: IN, 1: OUT.
22763 + int data; // Pin output when itized (0/1), or at the term. 0/1/-1 (tristate).
22764 +} au1x00_gpio_bit_ctl;
22765 +
22766 +typedef struct _au1x00_gpio_driver {
22767 + const char *driver_name;
22768 + const char *name;
22769 + int name_base; /* offset of printed name */
22770 + short major; /* major device number */
22771 + short minor_start; /* start of minor device number*/
22772 + short num; /* number of devices */
22773 +} au1x00_gpio_driver;
22774 +
22775 #ifdef __KERNEL__
22776 -extern u32 get_au1000_avail_gpio_mask(void);
22777 -extern int au1000gpio_tristate(u32 data);
22778 -extern int au1000gpio_in(u32 *data);
22779 -extern int au1000gpio_set(u32 data);
22780 -extern int au1000gpio_clear(u32 data);
22781 -extern int au1000gpio_out(u32 data);
22782 +extern u32 get_au1000_avail_gpio_mask(u32 *avail_gpio2);
22783 +extern int au1000gpio_tristate(u32 minor, u32 data);
22784 +extern int au1000gpio_in(u32 minor, u32 *data);
22785 +extern int au1000gpio_set(u32 minor, u32 data);
22786 +extern int au1000gpio_clear(u32 minor, u32 data);
22787 +extern int au1000gpio_out(u32 minor, u32 data);
22788 +extern int au1000gpio_bit_read(u32 minor, u32 *read_data);
22789 +extern int au1000gpio_bit_set(u32 minor);
22790 +extern int au1000gpio_bit_clear(u32 minor);
22791 +extern int au1000gpio_bit_tristate(u32 minor);
22792 +extern int check_minor_to_gpio(u32 minor);
22793 +extern int au1000gpio_bit_init(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
22794 +extern int au1000gpio_bit_term(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
22795 +
22796 +extern void gpio_register_devfs (au1x00_gpio_driver *driver, unsigned int flags, unsigned minor);
22797 +extern void gpio_unregister_devfs (au1x00_gpio_driver *driver, unsigned minor);
22798 +extern int gpio_register_driver(au1x00_gpio_driver *driver);
22799 +extern int gpio_unregister_driver(au1x00_gpio_driver *driver);
22800 #endif
22801
22802 #endif
22803 diff -Nur linux-2.4.29/include/asm-mips/au1000_pcmcia.h linux-mips/include/asm-mips/au1000_pcmcia.h
22804 --- linux-2.4.29/include/asm-mips/au1000_pcmcia.h 2005-01-19 15:10:11.000000000 +0100
22805 +++ linux-mips/include/asm-mips/au1000_pcmcia.h 2005-01-31 12:59:48.000000000 +0100
22806 @@ -38,16 +38,41 @@
22807 #define AU1X_SOCK0_PHYS_MEM 0xF80000000
22808
22809 /* pcmcia socket 1 needs external glue logic so the memory map
22810 - * differs from board to board.
22811 + * differs from board to board. the general rule is that
22812 + * static bus address bit 26 should be used to decode socket 0
22813 + * from socket 1. alas, some boards dont follow this...
22814 + * These really belong in a board-specific header file...
22815 */
22816 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
22817 -#define AU1X_SOCK1_IO 0xF08000000
22818 -#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
22819 -#define AU1X_SOCK1_PHYS_MEM 0xF88000000
22820 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
22821 -#define AU1X_SOCK1_IO 0xF04000000
22822 -#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
22823 -#define AU1X_SOCK1_PHYS_MEM 0xF84000000
22824 +#ifdef CONFIG_MIPS_PB1000
22825 +#define SOCK1_DECODE (1<<27)
22826 +#endif
22827 +#ifdef CONFIG_MIPS_DB1000
22828 +#define SOCK1_DECODE (1<<26)
22829 +#endif
22830 +#ifdef CONFIG_MIPS_DB1500
22831 +#define SOCK1_DECODE (1<<26)
22832 +#endif
22833 +#ifdef CONFIG_MIPS_DB1100
22834 +#define SOCK1_DECODE (1<<26)
22835 +#endif
22836 +#ifdef CONFIG_MIPS_DB1550
22837 +#define SOCK1_DECODE (1<<26)
22838 +#endif
22839 +#ifdef CONFIG_MIPS_DB1200
22840 +#define SOCK1_DECODE (1<<26)
22841 +#endif
22842 +#ifdef CONFIG_MIPS_PB1550
22843 +#define SOCK1_DECODE (1<<26)
22844 +#endif
22845 +#ifdef CONFIG_MIPS_PB1200
22846 +#define SOCK1_DECODE (1<<26)
22847 +#endif
22848 +
22849 +/* The board has a second PCMCIA socket */
22850 +#ifdef SOCK1_DECODE
22851 +#define AU1X_SOCK1_IO (0xF00000000|SOCK1_DECODE)
22852 +#define AU1X_SOCK1_PHYS_ATTR (0xF40000000|SOCK1_DECODE)
22853 +#define AU1X_SOCK1_PHYS_MEM (0xF80000000|SOCK1_DECODE)
22854 #endif
22855
22856 struct pcmcia_state {
22857 diff -Nur linux-2.4.29/include/asm-mips/au1100_mmc.h linux-mips/include/asm-mips/au1100_mmc.h
22858 --- linux-2.4.29/include/asm-mips/au1100_mmc.h 2005-01-19 15:10:11.000000000 +0100
22859 +++ linux-mips/include/asm-mips/au1100_mmc.h 2005-01-31 12:59:48.000000000 +0100
22860 @@ -39,16 +39,22 @@
22861 #define __ASM_AU1100_MMC_H
22862
22863
22864 -#define NUM_AU1100_MMC_CONTROLLERS 2
22865 -
22866 -
22867 -#define AU1100_SD_IRQ 2
22868 -
22869 +#if defined(CONFIG_SOC_AU1100)
22870 +#define NUM_MMC_CONTROLLERS 2
22871 +#define AU1X_MMC_INT AU1100_SD_INT
22872 +#endif
22873 +
22874 +#if defined(CONFIG_SOC_AU1200)
22875 +#define NUM_MMC_CONTROLLERS 2
22876 +#define AU1X_MMC_INT AU1200_SD_INT
22877 +#endif
22878
22879 #define SD0_BASE 0xB0600000
22880 #define SD1_BASE 0xB0680000
22881
22882
22883 +
22884 +
22885 /*
22886 * Register offsets.
22887 */
22888 @@ -201,5 +207,12 @@
22889 #define SD_CMD_RT_1B (0x00810000)
22890
22891
22892 +/* support routines required on a platform-specific basis */
22893 +extern void mmc_card_inserted(int _n_, int *_res_);
22894 +extern void mmc_card_writable(int _n_, int *_res_);
22895 +extern void mmc_power_on(int _n_);
22896 +extern void mmc_power_off(int _n_);
22897 +
22898 +
22899 #endif /* __ASM_AU1100_MMC_H */
22900
22901 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_dbdma.h linux-mips/include/asm-mips/au1xxx_dbdma.h
22902 --- linux-2.4.29/include/asm-mips/au1xxx_dbdma.h 2005-01-19 15:10:11.000000000 +0100
22903 +++ linux-mips/include/asm-mips/au1xxx_dbdma.h 2005-01-31 12:59:48.000000000 +0100
22904 @@ -43,7 +43,7 @@
22905 #define DDMA_GLOBAL_BASE 0xb4003000
22906 #define DDMA_CHANNEL_BASE 0xb4002000
22907
22908 -typedef struct dbdma_global {
22909 +typedef volatile struct dbdma_global {
22910 u32 ddma_config;
22911 u32 ddma_intstat;
22912 u32 ddma_throttle;
22913 @@ -60,7 +60,7 @@
22914
22915 /* The structure of a DMA Channel.
22916 */
22917 -typedef struct au1xxx_dma_channel {
22918 +typedef volatile struct au1xxx_dma_channel {
22919 u32 ddma_cfg; /* See below */
22920 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
22921 u32 ddma_statptr; /* word aligned pointer to status word */
22922 @@ -96,7 +96,7 @@
22923 /* "Standard" DDMA Descriptor.
22924 * Must be 32-byte aligned.
22925 */
22926 -typedef struct au1xxx_ddma_desc {
22927 +typedef volatile struct au1xxx_ddma_desc {
22928 u32 dscr_cmd0; /* See below */
22929 u32 dscr_cmd1; /* See below */
22930 u32 dscr_source0; /* source phys address */
22931 @@ -105,6 +105,12 @@
22932 u32 dscr_dest1; /* See below */
22933 u32 dscr_stat; /* completion status */
22934 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
22935 + /* First 32bytes are HW specific!!!
22936 + Lets have some SW data following.. make sure its 32bytes
22937 + */
22938 + u32 sw_status;
22939 + u32 sw_context;
22940 + u32 sw_reserved[6];
22941 } au1x_ddma_desc_t;
22942
22943 #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
22944 @@ -123,6 +129,8 @@
22945 #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
22946 #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
22947
22948 +#define SW_STATUS_INUSE (1<<0)
22949 +
22950 /* Command 0 device IDs.
22951 */
22952 #ifdef CONFIG_SOC_AU1550
22953 @@ -169,8 +177,8 @@
22954 #define DSCR_CMD0_SDMS_RX0 9
22955 #define DSCR_CMD0_SDMS_TX1 10
22956 #define DSCR_CMD0_SDMS_RX1 11
22957 -#define DSCR_CMD0_AES_TX 12
22958 -#define DSCR_CMD0_AES_RX 13
22959 +#define DSCR_CMD0_AES_TX 13
22960 +#define DSCR_CMD0_AES_RX 12
22961 #define DSCR_CMD0_PSC0_TX 14
22962 #define DSCR_CMD0_PSC0_RX 15
22963 #define DSCR_CMD0_PSC1_TX 16
22964 @@ -189,6 +197,10 @@
22965 #define DSCR_CMD0_THROTTLE 30
22966 #define DSCR_CMD0_ALWAYS 31
22967 #define DSCR_NDEV_IDS 32
22968 +/* THis macro is used to find/create custom device types */
22969 +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
22970 +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
22971 +
22972
22973 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
22974 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
22975 @@ -277,6 +289,43 @@
22976 */
22977 #define NUM_DBDMA_CHANS 16
22978
22979 +/*
22980 + * Ddma API definitions
22981 + * FIXME: may not fit to this header file
22982 + */
22983 +typedef struct dbdma_device_table {
22984 + u32 dev_id;
22985 + u32 dev_flags;
22986 + u32 dev_tsize;
22987 + u32 dev_devwidth;
22988 + u32 dev_physaddr; /* If FIFO */
22989 + u32 dev_intlevel;
22990 + u32 dev_intpolarity;
22991 +} dbdev_tab_t;
22992 +
22993 +
22994 +typedef struct dbdma_chan_config {
22995 + spinlock_t lock;
22996 +
22997 + u32 chan_flags;
22998 + u32 chan_index;
22999 + dbdev_tab_t *chan_src;
23000 + dbdev_tab_t *chan_dest;
23001 + au1x_dma_chan_t *chan_ptr;
23002 + au1x_ddma_desc_t *chan_desc_base;
23003 + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
23004 + void *chan_callparam;
23005 + void (*chan_callback)(int, void *, struct pt_regs *);
23006 +} chan_tab_t;
23007 +
23008 +#define DEV_FLAGS_INUSE (1 << 0)
23009 +#define DEV_FLAGS_ANYUSE (1 << 1)
23010 +#define DEV_FLAGS_OUT (1 << 2)
23011 +#define DEV_FLAGS_IN (1 << 3)
23012 +#define DEV_FLAGS_BURSTABLE (1 << 4)
23013 +#define DEV_FLAGS_SYNC (1 << 5)
23014 +/* end Ddma API definitions */
23015 +
23016 /* External functions for drivers to use.
23017 */
23018 /* Use this to allocate a dbdma channel. The device ids are one of the
23019 @@ -299,8 +348,8 @@
23020
23021 /* Put buffers on source/destination descriptors.
23022 */
23023 -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
23024 -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
23025 +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
23026 +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
23027
23028 /* Get a buffer from the destination descriptor.
23029 */
23030 @@ -314,5 +363,25 @@
23031 void au1xxx_dbdma_chan_free(u32 chanid);
23032 void au1xxx_dbdma_dump(u32 chanid);
23033
23034 +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
23035 +
23036 +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
23037 +
23038 +/*
23039 + Some compatibilty macros --
23040 + Needed to make changes to API without breaking existing drivers
23041 +*/
23042 +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
23043 +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
23044 +
23045 +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
23046 +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
23047 +
23048 +/*
23049 + * Flags for the put_source/put_dest functions.
23050 + */
23051 +#define DDMA_FLAGS_IE (1<<0)
23052 +#define DDMA_FLAGS_NOIE (1<<1)
23053 +
23054 #endif /* _LANGUAGE_ASSEMBLY */
23055 #endif /* _AU1000_DBDMA_H_ */
23056 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_gpio.h linux-mips/include/asm-mips/au1xxx_gpio.h
23057 --- linux-2.4.29/include/asm-mips/au1xxx_gpio.h 1970-01-01 01:00:00.000000000 +0100
23058 +++ linux-mips/include/asm-mips/au1xxx_gpio.h 2005-01-30 09:01:28.000000000 +0100
23059 @@ -0,0 +1,22 @@
23060 +
23061 +
23062 +#ifndef __AU1XXX_GPIO_H
23063 +#define __AU1XXX_GPIO_H
23064 +
23065 +void au1xxx_gpio1_set_inputs(void);
23066 +void au1xxx_gpio_tristate(int signal);
23067 +void au1xxx_gpio_write(int signal, int value);
23068 +int au1xxx_gpio_read(int signal);
23069 +
23070 +typedef volatile struct
23071 +{
23072 + u32 dir;
23073 + u32 reserved;
23074 + u32 output;
23075 + u32 pinstate;
23076 + u32 inten;
23077 + u32 enable;
23078 +
23079 +} AU1X00_GPIO2;
23080 +
23081 +#endif //__AU1XXX_GPIO_H
23082 diff -Nur linux-2.4.29/include/asm-mips/au1xxx_psc.h linux-mips/include/asm-mips/au1xxx_psc.h
23083 --- linux-2.4.29/include/asm-mips/au1xxx_psc.h 2005-01-19 15:10:11.000000000 +0100
23084 +++ linux-mips/include/asm-mips/au1xxx_psc.h 2005-01-31 12:59:49.000000000 +0100
23085 @@ -41,6 +41,11 @@
23086 #define PSC3_BASE_ADDR 0xb0d00000
23087 #endif
23088
23089 +#ifdef CONFIG_SOC_AU1200
23090 +#define PSC0_BASE_ADDR 0xb1a00000
23091 +#define PSC1_BASE_ADDR 0xb1b00000
23092 +#endif
23093 +
23094 /* The PSC select and control registers are common to
23095 * all protocols.
23096 */
23097 @@ -226,6 +231,8 @@
23098 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
23099 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
23100 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
23101 +#define PSC_I2SCFG_WS(n) ((n&0xFF)<<16)
23102 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
23103 #define PSC_I2SCFG_WI (1 << 15)
23104
23105 #define PSC_I2SCFG_DIV_MASK (3 << 13)
23106 diff -Nur linux-2.4.29/include/asm-mips/bootinfo.h linux-mips/include/asm-mips/bootinfo.h
23107 --- linux-2.4.29/include/asm-mips/bootinfo.h 2004-02-18 14:36:32.000000000 +0100
23108 +++ linux-mips/include/asm-mips/bootinfo.h 2005-01-31 12:59:49.000000000 +0100
23109 @@ -180,6 +180,9 @@
23110 #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
23111 #define MACH_CSB250 8 /* Cogent Au1500 */
23112 #define MACH_PB1550 9 /* Au1550-based eval board */
23113 +#define MACH_PB1200 10 /* Au1200-based eval board */
23114 +#define MACH_DB1550 11 /* Au1550-based eval board */
23115 +#define MACH_DB1200 12 /* Au1200-based eval board */
23116
23117 /*
23118 * Valid machtype for group NEC_VR41XX
23119 diff -Nur linux-2.4.29/include/asm-mips/db1200.h linux-mips/include/asm-mips/db1200.h
23120 --- linux-2.4.29/include/asm-mips/db1200.h 1970-01-01 01:00:00.000000000 +0100
23121 +++ linux-mips/include/asm-mips/db1200.h 2005-01-30 09:02:45.000000000 +0100
23122 @@ -0,0 +1,214 @@
23123 +/*
23124 + * AMD Alchemy DB1200 Referrence Board
23125 + * Board Registers defines.
23126 + *
23127 + * ########################################################################
23128 + *
23129 + * This program is free software; you can distribute it and/or modify it
23130 + * under the terms of the GNU General Public License (Version 2) as
23131 + * published by the Free Software Foundation.
23132 + *
23133 + * This program is distributed in the hope it will be useful, but WITHOUT
23134 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
23135 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23136 + * for more details.
23137 + *
23138 + * You should have received a copy of the GNU General Public License along
23139 + * with this program; if not, write to the Free Software Foundation, Inc.,
23140 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23141 + *
23142 + * ########################################################################
23143 + *
23144 + *
23145 + */
23146 +#ifndef __ASM_DB1200_H
23147 +#define __ASM_DB1200_H
23148 +
23149 +#include <linux/types.h>
23150 +
23151 +// This is defined in au1000.h with bogus value
23152 +#undef AU1X00_EXTERNAL_INT
23153 +
23154 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
23155 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
23156 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
23157 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
23158 +
23159 +/* SPI and SMB are muxed on the Pb1200 board.
23160 + Refer to board documentation.
23161 + */
23162 +#define SPI_PSC_BASE PSC0_BASE_ADDR
23163 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
23164 +/* AC97 and I2S are muxed on the Pb1200 board.
23165 + Refer to board documentation.
23166 + */
23167 +#define AC97_PSC_BASE PSC1_BASE_ADDR
23168 +#define I2S_PSC_BASE PSC1_BASE_ADDR
23169 +
23170 +#define BCSR_KSEG1_ADDR 0xB9800000
23171 +
23172 +typedef volatile struct
23173 +{
23174 + /*00*/ u16 whoami;
23175 + u16 reserved0;
23176 + /*04*/ u16 status;
23177 + u16 reserved1;
23178 + /*08*/ u16 switches;
23179 + u16 reserved2;
23180 + /*0C*/ u16 resets;
23181 + u16 reserved3;
23182 +
23183 + /*10*/ u16 pcmcia;
23184 + u16 reserved4;
23185 + /*14*/ u16 board;
23186 + u16 reserved5;
23187 + /*18*/ u16 disk_leds;
23188 + u16 reserved6;
23189 + /*1C*/ u16 system;
23190 + u16 reserved7;
23191 +
23192 + /*20*/ u16 intclr;
23193 + u16 reserved8;
23194 + /*24*/ u16 intset;
23195 + u16 reserved9;
23196 + /*28*/ u16 intclr_mask;
23197 + u16 reserved10;
23198 + /*2C*/ u16 intset_mask;
23199 + u16 reserved11;
23200 +
23201 + /*30*/ u16 sig_status;
23202 + u16 reserved12;
23203 + /*34*/ u16 int_status;
23204 + u16 reserved13;
23205 + /*38*/ u16 reserved14;
23206 + u16 reserved15;
23207 + /*3C*/ u16 reserved16;
23208 + u16 reserved17;
23209 +
23210 +} BCSR;
23211 +
23212 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
23213 +
23214 +/*
23215 + * Register bit definitions for the BCSRs
23216 + */
23217 +#define BCSR_WHOAMI_DCID 0x000F
23218 +#define BCSR_WHOAMI_CPLD 0x00F0
23219 +#define BCSR_WHOAMI_BOARD 0x0F00
23220 +
23221 +#define BCSR_STATUS_PCMCIA0VS 0x0003
23222 +#define BCSR_STATUS_PCMCIA1VS 0x000C
23223 +#define BCSR_STATUS_SWAPBOOT 0x0040
23224 +#define BCSR_STATUS_FLASHBUSY 0x0100
23225 +#define BCSR_STATUS_IDECBLID 0x0200
23226 +#define BCSR_STATUS_SD0WP 0x0400
23227 +#define BCSR_STATUS_U0RXD 0x1000
23228 +#define BCSR_STATUS_U1RXD 0x2000
23229 +
23230 +#define BCSR_SWITCHES_OCTAL 0x00FF
23231 +#define BCSR_SWITCHES_DIP_1 0x0080
23232 +#define BCSR_SWITCHES_DIP_2 0x0040
23233 +#define BCSR_SWITCHES_DIP_3 0x0020
23234 +#define BCSR_SWITCHES_DIP_4 0x0010
23235 +#define BCSR_SWITCHES_DIP_5 0x0008
23236 +#define BCSR_SWITCHES_DIP_6 0x0004
23237 +#define BCSR_SWITCHES_DIP_7 0x0002
23238 +#define BCSR_SWITCHES_DIP_8 0x0001
23239 +#define BCSR_SWITCHES_ROTARY 0x0F00
23240 +
23241 +#define BCSR_RESETS_ETH 0x0001
23242 +#define BCSR_RESETS_CAMERA 0x0002
23243 +#define BCSR_RESETS_DC 0x0004
23244 +#define BCSR_RESETS_IDE 0x0008
23245 +#define BCSR_RESETS_TV 0x0010
23246 +/* not resets but in the same register */
23247 +#define BCSR_RESETS_PWMR1mUX 0x0800
23248 +#define BCSR_RESETS_PCS0MUX 0x1000
23249 +#define BCSR_RESETS_PCS1MUX 0x2000
23250 +#define BCSR_RESETS_SPISEL 0x4000
23251 +
23252 +#define BCSR_PCMCIA_PC0VPP 0x0003
23253 +#define BCSR_PCMCIA_PC0VCC 0x000C
23254 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
23255 +#define BCSR_PCMCIA_PC0RST 0x0080
23256 +#define BCSR_PCMCIA_PC1VPP 0x0300
23257 +#define BCSR_PCMCIA_PC1VCC 0x0C00
23258 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
23259 +#define BCSR_PCMCIA_PC1RST 0x8000
23260 +
23261 +#define BCSR_BOARD_LCDVEE 0x0001
23262 +#define BCSR_BOARD_LCDVDD 0x0002
23263 +#define BCSR_BOARD_LCDBL 0x0004
23264 +#define BCSR_BOARD_CAMSNAP 0x0010
23265 +#define BCSR_BOARD_CAMPWR 0x0020
23266 +#define BCSR_BOARD_SD0PWR 0x0040
23267 +
23268 +#define BCSR_LEDS_DECIMALS 0x0003
23269 +#define BCSR_LEDS_LED0 0x0100
23270 +#define BCSR_LEDS_LED1 0x0200
23271 +#define BCSR_LEDS_LED2 0x0400
23272 +#define BCSR_LEDS_LED3 0x0800
23273 +
23274 +#define BCSR_SYSTEM_POWEROFF 0x4000
23275 +#define BCSR_SYSTEM_RESET 0x8000
23276 +
23277 +/* Bit positions for the different interrupt sources */
23278 +#define BCSR_INT_IDE 0x0001
23279 +#define BCSR_INT_ETH 0x0002
23280 +#define BCSR_INT_PC0 0x0004
23281 +#define BCSR_INT_PC0STSCHG 0x0008
23282 +#define BCSR_INT_PC1 0x0010
23283 +#define BCSR_INT_PC1STSCHG 0x0020
23284 +#define BCSR_INT_DC 0x0040
23285 +#define BCSR_INT_FLASHBUSY 0x0080
23286 +#define BCSR_INT_PC0INSERT 0x0100
23287 +#define BCSR_INT_PC0EJECT 0x0200
23288 +#define BCSR_INT_PC1INSERT 0x0400
23289 +#define BCSR_INT_PC1EJECT 0x0800
23290 +#define BCSR_INT_SD0INSERT 0x1000
23291 +#define BCSR_INT_SD0EJECT 0x2000
23292 +
23293 +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
23294 +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
23295 +
23296 +#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
23297 +#define AU1XXX_ATA_PHYS_LEN (0x100)
23298 +#define AU1XXX_ATA_REG_OFFSET (5)
23299 +#define AU1XXX_ATA_INT DB1200_IDE_INT
23300 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
23301 +#define AU1XXX_ATA_RQSIZE 128
23302 +
23303 +#define NAND_PHYS_ADDR 0x20000000
23304 +
23305 +/*
23306 + * External Interrupts for Pb1200 as of 8/6/2004.
23307 + * Bit positions in the CPLD registers can be calculated by taking
23308 + * the interrupt define and subtracting the DB1200_INT_BEGIN value.
23309 + * *example: IDE bis pos is = 64 - 64
23310 + ETH bit pos is = 65 - 64
23311 + */
23312 +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
23313 +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
23314 +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
23315 +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
23316 +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
23317 +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
23318 +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
23319 +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
23320 +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
23321 +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
23322 +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
23323 +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
23324 +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
23325 +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
23326 +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
23327 +
23328 +#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
23329 +
23330 +/* For drivers/pcmcia/au1000_db1x00.c */
23331 +#define BOARD_PC0_INT DB1200_PC0_INT
23332 +#define BOARD_PC1_INT DB1200_PC1_INT
23333 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
23334 +
23335 +#endif /* __ASM_DB1200_H */
23336 +
23337 diff -Nur linux-2.4.29/include/asm-mips/db1x00.h linux-mips/include/asm-mips/db1x00.h
23338 --- linux-2.4.29/include/asm-mips/db1x00.h 2005-01-19 15:10:11.000000000 +0100
23339 +++ linux-mips/include/asm-mips/db1x00.h 2005-01-31 12:59:49.000000000 +0100
23340 @@ -1,5 +1,5 @@
23341 /*
23342 - * AMD Alchemy DB1x00 Reference Boards
23343 + * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
23344 *
23345 * Copyright 2001 MontaVista Software Inc.
23346 * Author: MontaVista Software, Inc.
23347 @@ -36,9 +36,18 @@
23348 #define AC97_PSC_BASE PSC1_BASE_ADDR
23349 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
23350 #define I2S_PSC_BASE PSC3_BASE_ADDR
23351 +#define NAND_CS 1
23352 +/* for drivers/pcmcia/au1000_db1x00.c */
23353 +#define BOARD_PC0_INT AU1000_GPIO_3
23354 +#define BOARD_PC1_INT AU1000_GPIO_5
23355 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
23356
23357 #else
23358 #define BCSR_KSEG1_ADDR 0xAE000000
23359 +/* for drivers/pcmcia/au1000_db1x00.c */
23360 +#define BOARD_PC0_INT AU1000_GPIO_2
23361 +#define BOARD_PC1_INT AU1000_GPIO_5
23362 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
23363 #endif
23364
23365 /*
23366 @@ -66,6 +75,7 @@
23367
23368 } BCSR;
23369
23370 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
23371
23372 /*
23373 * Register/mask bit definitions for the BCSRs
23374 @@ -130,14 +140,6 @@
23375
23376 #define BCSR_SWRESET_RESET 0x0080
23377
23378 -/* PCMCIA Db1x00 specific defines */
23379 -#define PCMCIA_MAX_SOCK 1
23380 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
23381 -
23382 -/* VPP/VCC */
23383 -#define SET_VCC_VPP(VCC, VPP, SLOT)\
23384 - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
23385 -
23386 /* MTD CONFIG OPTIONS */
23387 #if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
23388 #define DB1X00_BOTH_BANKS
23389 @@ -147,48 +149,15 @@
23390 #define DB1X00_USER_ONLY
23391 #endif
23392
23393 -/* SD controller macros */
23394 -/*
23395 - * Detect card.
23396 - */
23397 -#define mmc_card_inserted(_n_, _res_) \
23398 - do { \
23399 - BCSR * const bcsr = (BCSR *)0xAE000000; \
23400 - unsigned long mmc_wp, board_specific; \
23401 - if ((_n_)) { \
23402 - mmc_wp = BCSR_BOARD_SD1_WP; \
23403 - } else { \
23404 - mmc_wp = BCSR_BOARD_SD0_WP; \
23405 - } \
23406 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
23407 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
23408 - *(int *)(_res_) = 1; \
23409 - } else { \
23410 - *(int *)(_res_) = 0; \
23411 - } \
23412 - } while (0)
23413 -
23414 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
23415 /*
23416 - * Apply power to card slot(s).
23417 + * Daughter card information.
23418 */
23419 -#define mmc_power_on(_n_) \
23420 - do { \
23421 - BCSR * const bcsr = (BCSR *)0xAE000000; \
23422 - unsigned long mmc_pwr, mmc_wp, board_specific; \
23423 - if ((_n_)) { \
23424 - mmc_pwr = BCSR_BOARD_SD1_PWR; \
23425 - mmc_wp = BCSR_BOARD_SD1_WP; \
23426 - } else { \
23427 - mmc_pwr = BCSR_BOARD_SD0_PWR; \
23428 - mmc_wp = BCSR_BOARD_SD0_WP; \
23429 - } \
23430 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
23431 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
23432 - board_specific |= mmc_pwr; \
23433 - au_writel(board_specific, (int)(&bcsr->specific)); \
23434 - au_sync(); \
23435 - } \
23436 - } while (0)
23437 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
23438 +/* DC_IDE */
23439 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
23440 +#define AU1XXX_ATA_REG_OFFSET (5)
23441 +#endif /* CONFIG_MIPS_DB1550 */
23442
23443 #endif /* __ASM_DB1X00_H */
23444
23445 diff -Nur linux-2.4.29/include/asm-mips/ficmmp.h linux-mips/include/asm-mips/ficmmp.h
23446 --- linux-2.4.29/include/asm-mips/ficmmp.h 1970-01-01 01:00:00.000000000 +0100
23447 +++ linux-mips/include/asm-mips/ficmmp.h 2005-01-30 09:01:28.000000000 +0100
23448 @@ -0,0 +1,156 @@
23449 +/*
23450 + * FIC MMP
23451 + *
23452 + * ########################################################################
23453 + *
23454 + * This program is free software; you can distribute it and/or modify it
23455 + * under the terms of the GNU General Public License (Version 2) as
23456 + * published by the Free Software Foundation.
23457 + *
23458 + * This program is distributed in the hope it will be useful, but WITHOUT
23459 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
23460 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23461 + * for more details.
23462 + *
23463 + * You should have received a copy of the GNU General Public License along
23464 + * with this program; if not, write to the Free Software Foundation, Inc.,
23465 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23466 + *
23467 + * ########################################################################
23468 + *
23469 + *
23470 + */
23471 +#ifndef __ASM_FICMMP_H
23472 +#define __ASM_FICMMP_H
23473 +
23474 +#include <linux/types.h>
23475 +#include <asm/au1000.h>
23476 +#include <asm/au1xxx_gpio.h>
23477 +
23478 +// This is defined in au1000.h with bogus value
23479 +#undef AU1X00_EXTERNAL_INT
23480 +
23481 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
23482 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
23483 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
23484 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
23485 +/* SPI and SMB are muxed on the Pb1200 board.
23486 + Refer to board documentation.
23487 + */
23488 +#define SPI_PSC_BASE PSC0_BASE_ADDR
23489 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
23490 +/* AC97 and I2S are muxed on the Pb1200 board.
23491 + Refer to board documentation.
23492 + */
23493 +#define AC97_PSC_BASE PSC1_BASE_ADDR
23494 +#define I2S_PSC_BASE PSC1_BASE_ADDR
23495 +
23496 +
23497 +/*
23498 + * SMSC LAN91C111
23499 + */
23500 +#define AU1XXX_SMC91111_PHYS_ADDR (0xAC000300)
23501 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_5
23502 +
23503 +/* DC_IDE and DC_ETHERNET */
23504 +#define FICMMP_IDE_INT AU1000_GPIO_4
23505 +
23506 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
23507 +#define AU1XXX_ATA_REG_OFFSET (5)
23508 +/*
23509 +#define AU1XXX_ATA_BASE (0x0C800000)
23510 +#define AU1XXX_ATA_END (0x0CFFFFFF)
23511 +#define AU1XXX_ATA_MEM_SIZE (AU1XXX_ATA_END - AU1XXX_ATA_BASE +1)
23512 +
23513 +#define AU1XXX_ATA_REG_OFFSET (5)
23514 +*/
23515 +/* VPP/VCC */
23516 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
23517 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
23518 +
23519 +
23520 +#define FICMMP_CONFIG_BASE 0xAD000000
23521 +#define FICMMP_CONFIG_ENABLE 13
23522 +
23523 +#define FICMMP_CONFIG_I2SFREQ(N) (N<<0)
23524 +#define FICMMP_CONFIG_I2SXTAL0 (1<<0)
23525 +#define FICMMP_CONFIG_I2SXTAL1 (1<<1)
23526 +#define FICMMP_CONFIG_I2SXTAL2 (1<<2)
23527 +#define FICMMP_CONFIG_I2SXTAL3 (1<<3)
23528 +#define FICMMP_CONFIG_ADV1 (1<<4)
23529 +#define FICMMP_CONFIG_IDERST (1<<5)
23530 +#define FICMMP_CONFIG_LCMEN (1<<6)
23531 +#define FICMMP_CONFIG_CAMPWDN (1<<7)
23532 +#define FICMMP_CONFIG_USBPWREN (1<<8)
23533 +#define FICMMP_CONFIG_LCMPWREN (1<<9)
23534 +#define FICMMP_CONFIG_TVOUTPWREN (1<<10)
23535 +#define FICMMP_CONFIG_RS232PWREN (1<<11)
23536 +#define FICMMP_CONFIG_LCMDATAOUT (1<<12)
23537 +#define FICMMP_CONFIG_TVODATAOUT (1<<13)
23538 +#define FICMMP_CONFIG_ADV3 (1<<14)
23539 +#define FICMMP_CONFIG_ADV4 (1<<15)
23540 +
23541 +#define I2S_FREQ_8_192 (0x0)
23542 +#define I2S_FREQ_11_2896 (0x1)
23543 +#define I2S_FREQ_12_288 (0x2)
23544 +#define I2S_FREQ_24_576 (0x3)
23545 +//#define I2S_FREQ_12_288 (0x4)
23546 +#define I2S_FREQ_16_9344 (0x5)
23547 +#define I2S_FREQ_18_432 (0x6)
23548 +#define I2S_FREQ_36_864 (0x7)
23549 +#define I2S_FREQ_16_384 (0x8)
23550 +#define I2S_FREQ_22_5792 (0x9)
23551 +//#define I2S_FREQ_24_576 (0x10)
23552 +#define I2S_FREQ_49_152 (0x11)
23553 +//#define I2S_FREQ_24_576 (0x12)
23554 +#define I2S_FREQ_33_8688 (0x13)
23555 +//#define I2S_FREQ_36_864 (0x14)
23556 +#define I2S_FREQ_73_728 (0x15)
23557 +
23558 +#define FICMMP_IDE_PWR 9
23559 +#define FICMMP_FOCUS_RST 2
23560 +
23561 +static __inline void ficmmp_config_set(u16 bits)
23562 +{
23563 + extern u16 ficmmp_config;
23564 + //printk("set_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config | bits);
23565 + ficmmp_config |= bits;
23566 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
23567 +}
23568 +
23569 +static __inline void ficmmp_config_clear(u16 bits)
23570 +{
23571 + extern u16 ficmmp_config;
23572 +// printk("clear_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config & ~bits);
23573 + ficmmp_config &= ~bits;
23574 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
23575 +}
23576 +
23577 +static __inline void ficmmp_config_init(void)
23578 +{
23579 + au1xxx_gpio_write(FICMMP_CONFIG_ENABLE, 0); //Enable configuration latch
23580 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT | FICMMP_CONFIG_TVODATAOUT | FICMMP_CONFIG_IDERST); //Disable display data buffers
23581 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(I2S_FREQ_36_864));
23582 +}
23583 +
23584 +static __inline u32 ficmmp_set_i2s_sample_rate(u32 rate)
23585 +{
23586 + u32 freq;
23587 +
23588 + switch(rate)
23589 + {
23590 + case 88200:
23591 + case 44100:
23592 + case 8018: freq = I2S_FREQ_11_2896; break;
23593 + case 48000:
23594 + case 32000: //freq = I2S_FREQ_18_432; break;
23595 + case 8000: freq = I2S_FREQ_12_288; break;
23596 + default: freq = I2S_FREQ_12_288; rate = 8000;
23597 + }
23598 + ficmmp_config_clear(FICMMP_CONFIG_I2SFREQ(0xF));
23599 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(freq));
23600 + return rate;
23601 +}
23602 +
23603 +#endif /* __ASM_FICMMP_H */
23604 +
23605 diff -Nur linux-2.4.29/include/asm-mips/hazards.h linux-mips/include/asm-mips/hazards.h
23606 --- linux-2.4.29/include/asm-mips/hazards.h 2004-02-18 14:36:32.000000000 +0100
23607 +++ linux-mips/include/asm-mips/hazards.h 2004-11-25 23:18:38.000000000 +0100
23608 @@ -3,7 +3,7 @@
23609 * License. See the file "COPYING" in the main directory of this archive
23610 * for more details.
23611 *
23612 - * Copyright (C) 2003 Ralf Baechle
23613 + * Copyright (C) 2003, 2004 Ralf Baechle
23614 */
23615 #ifndef _ASM_HAZARDS_H
23616 #define _ASM_HAZARDS_H
23617 @@ -12,38 +12,185 @@
23618
23619 #ifdef __ASSEMBLY__
23620
23621 + .macro _ssnop
23622 + sll $0, $0, 1
23623 + .endm
23624 +
23625 /*
23626 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
23627 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
23628 * for data translations should not occur for 3 cpu cycles.
23629 */
23630 #ifdef CONFIG_CPU_RM9000
23631 -#define rm9000_tlb_hazard \
23632 +
23633 +#define mtc0_tlbw_hazard \
23634 + .set push; \
23635 + .set mips32; \
23636 + _ssnop; _ssnop; _ssnop; _ssnop; \
23637 + .set pop
23638 +
23639 +#define tlbw_eret_hazard \
23640 .set push; \
23641 .set mips32; \
23642 - ssnop; ssnop; ssnop; ssnop; \
23643 + _ssnop; _ssnop; _ssnop; _ssnop; \
23644 .set pop
23645 +
23646 #else
23647 -#define rm9000_tlb_hazard
23648 +
23649 +/*
23650 + * The taken branch will result in a two cycle penalty for the two killed
23651 + * instructions on R4000 / R4400. Other processors only have a single cycle
23652 + * hazard so this is nice trick to have an optimal code for a range of
23653 + * processors.
23654 + */
23655 +#define mtc0_tlbw_hazard \
23656 + b . + 8
23657 +#define tlbw_eret_hazard
23658 #endif
23659
23660 +/*
23661 + * mtc0->mfc0 hazard
23662 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
23663 + * It is a MIPS32R2 processor so ehb will clear the hazard.
23664 + */
23665 +
23666 +#ifdef CONFIG_CPU_MIPSR2
23667 +/*
23668 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
23669 + */
23670 + .macro ehb
23671 + sll $0, $0, 3
23672 + .endm
23673 +
23674 +#define irq_enable_hazard \
23675 + ehb # irq_enable_hazard
23676 +
23677 +#define irq_disable_hazard \
23678 + ehb # irq_disable_hazard
23679 +
23680 #else
23681
23682 +#define irq_enable_hazard
23683 +#define irq_disable_hazard
23684 +
23685 +#endif
23686 +
23687 +#else /* __ASSEMBLY__ */
23688 +
23689 /*
23690 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
23691 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
23692 * for data translations should not occur for 3 cpu cycles.
23693 */
23694 #ifdef CONFIG_CPU_RM9000
23695 -#define rm9000_tlb_hazard() \
23696 +
23697 +#define mtc0_tlbw_hazard() \
23698 __asm__ __volatile__( \
23699 ".set\tmips32\n\t" \
23700 - "ssnop; ssnop; ssnop; ssnop\n\t" \
23701 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
23702 + ".set\tmips0")
23703 +
23704 +#define tlbw_use_hazard() \
23705 + __asm__ __volatile__( \
23706 + ".set\tmips32\n\t" \
23707 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
23708 ".set\tmips0")
23709 #else
23710 -#define rm9000_tlb_hazard() do { } while (0)
23711 +
23712 +/*
23713 + * Overkill warning ...
23714 + */
23715 +#define mtc0_tlbw_hazard() \
23716 + __asm__ __volatile__( \
23717 + ".set noreorder\n\t" \
23718 + "nop; nop; nop; nop; nop; nop;\n\t" \
23719 + ".set reorder\n\t")
23720 +
23721 +#define tlbw_use_hazard() \
23722 + __asm__ __volatile__( \
23723 + ".set noreorder\n\t" \
23724 + "nop; nop; nop; nop; nop; nop;\n\t" \
23725 + ".set reorder\n\t")
23726 +
23727 #endif
23728
23729 +/*
23730 + * mtc0->mfc0 hazard
23731 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
23732 + * It is a MIPS32R2 processor so ehb will clear the hazard.
23733 + */
23734 +
23735 +#ifdef CONFIG_CPU_MIPSR2
23736 +/*
23737 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
23738 + */
23739 +__asm__(
23740 + " .macro ehb \n\t"
23741 + " sll $0, $0, 3 \n\t"
23742 + " .endm \n\t"
23743 + " \n\t"
23744 + " .macro\tirq_enable_hazard \n\t"
23745 + " ehb \n\t"
23746 + " .endm \n\t"
23747 + " \n\t"
23748 + " .macro\tirq_disable_hazard \n\t"
23749 + " ehb \n\t"
23750 + " .endm");
23751 +
23752 +#define irq_enable_hazard() \
23753 + __asm__ __volatile__( \
23754 + "ehb\t\t\t\t# irq_enable_hazard")
23755 +
23756 +#define irq_disable_hazard() \
23757 + __asm__ __volatile__( \
23758 + "ehb\t\t\t\t# irq_disable_hazard")
23759 +
23760 +#elif defined(CONFIG_CPU_R10000)
23761 +
23762 +/*
23763 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
23764 + */
23765 +
23766 +__asm__(
23767 + " .macro\tirq_enable_hazard \n\t"
23768 + " .endm \n\t"
23769 + " \n\t"
23770 + " .macro\tirq_disable_hazard \n\t"
23771 + " .endm");
23772 +
23773 +#define irq_enable_hazard() do { } while (0)
23774 +#define irq_disable_hazard() do { } while (0)
23775 +
23776 +#else
23777 +
23778 +/*
23779 + * Default for classic MIPS processors. Assume worst case hazards but don't
23780 + * care about the irq_enable_hazard - sooner or later the hardware will
23781 + * enable it and we don't care when exactly.
23782 + */
23783 +
23784 +__asm__(
23785 + " .macro _ssnop \n\t"
23786 + " sll $0, $2, 1 \n\t"
23787 + " .endm \n\t"
23788 + " \n\t"
23789 + " # \n\t"
23790 + " # There is a hazard but we do not care \n\t"
23791 + " # \n\t"
23792 + " .macro\tirq_enable_hazard \n\t"
23793 + " .endm \n\t"
23794 + " \n\t"
23795 + " .macro\tirq_disable_hazard \n\t"
23796 + " _ssnop; _ssnop; _ssnop \n\t"
23797 + " .endm");
23798 +
23799 +#define irq_enable_hazard() do { } while (0)
23800 +#define irq_disable_hazard() \
23801 + __asm__ __volatile__( \
23802 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
23803 +
23804 #endif
23805
23806 +#endif /* __ASSEMBLY__ */
23807 +
23808 #endif /* _ASM_HAZARDS_H */
23809 diff -Nur linux-2.4.29/include/asm-mips/mipsregs.h linux-mips/include/asm-mips/mipsregs.h
23810 --- linux-2.4.29/include/asm-mips/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
23811 +++ linux-mips/include/asm-mips/mipsregs.h 2005-02-12 04:07:58.000000000 +0100
23812 @@ -757,10 +757,18 @@
23813 #define read_c0_config1() __read_32bit_c0_register($16, 1)
23814 #define read_c0_config2() __read_32bit_c0_register($16, 2)
23815 #define read_c0_config3() __read_32bit_c0_register($16, 3)
23816 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
23817 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
23818 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
23819 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
23820 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
23821 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
23822 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
23823 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
23824 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
23825 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
23826 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
23827 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
23828
23829 /*
23830 * The WatchLo register. There may be upto 8 of them.
23831 @@ -874,42 +882,34 @@
23832 */
23833 static inline void tlb_probe(void)
23834 {
23835 - rm9000_tlb_hazard();
23836 __asm__ __volatile__(
23837 ".set noreorder\n\t"
23838 "tlbp\n\t"
23839 ".set reorder");
23840 - rm9000_tlb_hazard();
23841 }
23842
23843 static inline void tlb_read(void)
23844 {
23845 - rm9000_tlb_hazard();
23846 __asm__ __volatile__(
23847 ".set noreorder\n\t"
23848 "tlbr\n\t"
23849 ".set reorder");
23850 - rm9000_tlb_hazard();
23851 }
23852
23853 static inline void tlb_write_indexed(void)
23854 {
23855 - rm9000_tlb_hazard();
23856 __asm__ __volatile__(
23857 ".set noreorder\n\t"
23858 "tlbwi\n\t"
23859 ".set reorder");
23860 - rm9000_tlb_hazard();
23861 }
23862
23863 static inline void tlb_write_random(void)
23864 {
23865 - rm9000_tlb_hazard();
23866 __asm__ __volatile__(
23867 ".set noreorder\n\t"
23868 "tlbwr\n\t"
23869 ".set reorder");
23870 - rm9000_tlb_hazard();
23871 }
23872
23873 /*
23874 diff -Nur linux-2.4.29/include/asm-mips/mmu_context.h linux-mips/include/asm-mips/mmu_context.h
23875 --- linux-2.4.29/include/asm-mips/mmu_context.h 2005-01-19 15:10:12.000000000 +0100
23876 +++ linux-mips/include/asm-mips/mmu_context.h 2004-11-22 14:38:29.000000000 +0100
23877 @@ -27,7 +27,7 @@
23878 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
23879 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
23880 #define TLBMISS_HANDLER_SETUP() \
23881 - write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
23882 + write_c0_context((unsigned long) smp_processor_id() << 23); \
23883 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
23884 extern unsigned long pgd_current[];
23885
23886 diff -Nur linux-2.4.29/include/asm-mips/pb1100.h linux-mips/include/asm-mips/pb1100.h
23887 --- linux-2.4.29/include/asm-mips/pb1100.h 2003-08-25 13:44:44.000000000 +0200
23888 +++ linux-mips/include/asm-mips/pb1100.h 2005-01-31 12:59:49.000000000 +0100
23889 @@ -1,5 +1,5 @@
23890 /*
23891 - * Alchemy Semi PB1100 Referrence Board
23892 + * AMD Alchemy PB1100 Reference Boards
23893 *
23894 * Copyright 2001 MontaVista Software Inc.
23895 * Author: MontaVista Software, Inc.
23896 @@ -27,55 +27,108 @@
23897 #ifndef __ASM_PB1100_H
23898 #define __ASM_PB1100_H
23899
23900 -#define PB1100_IDENT 0xAE000000
23901 -#define BOARD_STATUS_REG 0xAE000004
23902 - #define PB1100_ROM_SEL (1<<15)
23903 - #define PB1100_ROM_SIZ (1<<14)
23904 - #define PB1100_SWAP_BOOT (1<<13)
23905 - #define PB1100_FLASH_WP (1<<12)
23906 - #define PB1100_ROM_H_STS (1<<11)
23907 - #define PB1100_ROM_L_STS (1<<10)
23908 - #define PB1100_FLASH_H_STS (1<<9)
23909 - #define PB1100_FLASH_L_STS (1<<8)
23910 - #define PB1100_SRAM_SIZ (1<<7)
23911 - #define PB1100_TSC_BUSY (1<<6)
23912 - #define PB1100_PCMCIA_VS_MASK (3<<4)
23913 - #define PB1100_RS232_CD (1<<3)
23914 - #define PB1100_RS232_CTS (1<<2)
23915 - #define PB1100_RS232_DSR (1<<1)
23916 - #define PB1100_RS232_RI (1<<0)
23917 -
23918 -#define PB1100_IRDA_RS232 0xAE00000C
23919 - #define PB1100_IRDA_FULL (0<<14) /* full power */
23920 - #define PB1100_IRDA_SHUTDOWN (1<<14)
23921 - #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
23922 - #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
23923 - #define PB1100_IRDA_FIR (1<<13)
23924 -
23925 -#define PCMCIA_BOARD_REG 0xAE000010
23926 - #define PB1100_SD_WP1_RO (1<<15) /* read only */
23927 - #define PB1100_SD_WP0_RO (1<<14) /* read only */
23928 - #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
23929 - #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
23930 - #define PB1100_SEL_SD_CONN1 (1<<9)
23931 - #define PB1100_SEL_SD_CONN0 (1<<8)
23932 - #define PC_DEASSERT_RST (1<<7)
23933 - #define PC_DRV_EN (1<<4)
23934 -
23935 -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
23936 -
23937 -#define PB1100_RST_VDDI 0xAE00001C
23938 - #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
23939 - #define PB1100_VDDI_MASK (0x1F)
23940 +#define BCSR_KSEG1_ADDR 0xAE000000
23941 +
23942 +/*
23943 + * Overlay data structure of the Pb1100 board registers.
23944 + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
23945 + */
23946 +typedef volatile struct
23947 +{
23948 + /*00*/ unsigned short whoami;
23949 + unsigned short reserved0;
23950 + /*04*/ unsigned short status;
23951 + unsigned short reserved1;
23952 + /*08*/ unsigned short switches;
23953 + unsigned short reserved2;
23954 + /*0C*/ unsigned short resets;
23955 + unsigned short reserved3;
23956 + /*10*/ unsigned short pcmcia;
23957 + unsigned short reserved4;
23958 + /*14*/ unsigned short graphics;
23959 + unsigned short reserved5;
23960 + /*18*/ unsigned short leds;
23961 + unsigned short reserved6;
23962 + /*1C*/ unsigned short swreset;
23963 + unsigned short reserved7;
23964 +
23965 +} BCSR;
23966
23967 -#define PB1100_LEDS 0xAE000018
23968
23969 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
23970 - * 7:0 is the LED Display's decimal points.
23971 +/*
23972 + * Register/mask bit definitions for the BCSRs
23973 */
23974 -#define PB1100_HEX_LED 0xAE000018
23975 +#define BCSR_WHOAMI_DCID 0x000F
23976 +#define BCSR_WHOAMI_CPLD 0x00F0
23977 +#define BCSR_WHOAMI_BOARD 0x0F00
23978 +
23979 +#define BCSR_STATUS_RS232_RI 0x0001
23980 +#define BCSR_STATUS_RS232_DSR 0x0002
23981 +#define BCSR_STATUS_RS232_CTS 0x0004
23982 +#define BCSR_STATUS_RS232_CD 0x0008
23983 +#define BCSR_STATUS_PCMCIA_VS_MASK 0x0030
23984 +#define BCSR_STATUS_TSC_BUSY 0x0040
23985 +#define BCSR_STATUS_SRAM_SIZ 0x0080
23986 +#define BCSR_STATUS_FLASH_L_STS 0x0100
23987 +#define BCSR_STATUS_FLASH_H_STS 0x0200
23988 +#define BCSR_STATUS_ROM_H_STS 0x0400
23989 +#define BCSR_STATUS_ROM_L_STS 0x0800
23990 +#define BCSR_STATUS_FLASH_WP 0x1000
23991 +#define BCSR_STATUS_SWAP_BOOT 0x2000
23992 +#define BCSR_STATUS_ROM_SIZ 0x4000
23993 +#define BCSR_STATUS_ROM_SEL 0x8000
23994 +
23995 +#define BCSR_SWITCHES_DIP 0x00FF
23996 +#define BCSR_SWITCHES_DIP_1 0x0080
23997 +#define BCSR_SWITCHES_DIP_2 0x0040
23998 +#define BCSR_SWITCHES_DIP_3 0x0020
23999 +#define BCSR_SWITCHES_DIP_4 0x0010
24000 +#define BCSR_SWITCHES_DIP_5 0x0008
24001 +#define BCSR_SWITCHES_DIP_6 0x0004
24002 +#define BCSR_SWITCHES_DIP_7 0x0002
24003 +#define BCSR_SWITCHES_DIP_8 0x0001
24004 +#define BCSR_SWITCHES_ROTARY 0x0F00
24005 +#define BCSR_SWITCHES_SDO_CL 0x8000
24006 +
24007 +#define BCSR_RESETS_PHY0 0x0001
24008 +#define BCSR_RESETS_PHY1 0x0002
24009 +#define BCSR_RESETS_DC 0x0004
24010 +#define BCSR_RESETS_RS232_RTS 0x0100
24011 +#define BCSR_RESETS_RS232_DTR 0x0200
24012 +#define BCSR_RESETS_FIR_SEL 0x2000
24013 +#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
24014 +#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
24015 +#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
24016 +#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
24017 +#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
24018 +
24019 +#define BCSR_PCMCIA_PC0VPP 0x0003
24020 +#define BCSR_PCMCIA_PC0VCC 0x000C
24021 +#define BCSR_PCMCIA_PC0_DR_VEN 0x0010
24022 +#define BCSR_PCMCIA_PC0RST 0x0080
24023 +#define BCSR_PCMCIA_SEL_SD_CON0 0x0100
24024 +#define BCSR_PCMCIA_SEL_SD_CON1 0x0200
24025 +#define BCSR_PCMCIA_SD0_PWR 0x0400
24026 +#define BCSR_PCMCIA_SD1_PWR 0x0800
24027 +#define BCSR_PCMCIA_SD0_WP 0x4000
24028 +#define BCSR_PCMCIA_SD1_WP 0x8000
24029 +
24030 +#define PB1100_G_CONTROL 0xAE000014
24031 +#define BCSR_GRAPHICS_GPX_SMPASS 0x0010
24032 +#define BCSR_GRAPHICS_GPX_BIG_ENDIAN 0x0020
24033 +#define BCSR_GRAPHICS_GPX_RST 0x0040
24034 +
24035 +#define BCSR_LEDS_DECIMALS 0x00FF
24036 +#define BCSR_LEDS_LED0 0x0100
24037 +#define BCSR_LEDS_LED1 0x0200
24038 +#define BCSR_LEDS_LED2 0x0400
24039 +#define BCSR_LEDS_LED3 0x0800
24040 +
24041 +#define BCSR_SWRESET_RESET 0x0080
24042 +#define BCSR_VDDI_VDI 0x001F
24043
24044 -/* PCMCIA PB1100 specific defines */
24045 +
24046 + /* PCMCIA Pb1x00 specific defines */
24047 #define PCMCIA_MAX_SOCK 0
24048 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
24049
24050 @@ -83,3 +136,4 @@
24051 #define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
24052
24053 #endif /* __ASM_PB1100_H */
24054 +
24055 diff -Nur linux-2.4.29/include/asm-mips/pb1200.h linux-mips/include/asm-mips/pb1200.h
24056 --- linux-2.4.29/include/asm-mips/pb1200.h 1970-01-01 01:00:00.000000000 +0100
24057 +++ linux-mips/include/asm-mips/pb1200.h 2005-01-30 09:01:28.000000000 +0100
24058 @@ -0,0 +1,244 @@
24059 +/*
24060 + * AMD Alchemy PB1200 Referrence Board
24061 + * Board Registers defines.
24062 + *
24063 + * ########################################################################
24064 + *
24065 + * This program is free software; you can distribute it and/or modify it
24066 + * under the terms of the GNU General Public License (Version 2) as
24067 + * published by the Free Software Foundation.
24068 + *
24069 + * This program is distributed in the hope it will be useful, but WITHOUT
24070 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24071 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24072 + * for more details.
24073 + *
24074 + * You should have received a copy of the GNU General Public License along
24075 + * with this program; if not, write to the Free Software Foundation, Inc.,
24076 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24077 + *
24078 + * ########################################################################
24079 + *
24080 + *
24081 + */
24082 +#ifndef __ASM_PB1200_H
24083 +#define __ASM_PB1200_H
24084 +
24085 +#include <linux/types.h>
24086 +
24087 +// This is defined in au1000.h with bogus value
24088 +#undef AU1X00_EXTERNAL_INT
24089 +
24090 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
24091 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
24092 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
24093 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
24094 +
24095 +/* SPI and SMB are muxed on the Pb1200 board.
24096 + Refer to board documentation.
24097 + */
24098 +#define SPI_PSC_BASE PSC0_BASE_ADDR
24099 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
24100 +/* AC97 and I2S are muxed on the Pb1200 board.
24101 + Refer to board documentation.
24102 + */
24103 +#define AC97_PSC_BASE PSC1_BASE_ADDR
24104 +#define I2S_PSC_BASE PSC1_BASE_ADDR
24105 +
24106 +#define BCSR_KSEG1_ADDR 0xAD800000
24107 +
24108 +typedef volatile struct
24109 +{
24110 + /*00*/ u16 whoami;
24111 + u16 reserved0;
24112 + /*04*/ u16 status;
24113 + u16 reserved1;
24114 + /*08*/ u16 switches;
24115 + u16 reserved2;
24116 + /*0C*/ u16 resets;
24117 + u16 reserved3;
24118 +
24119 + /*10*/ u16 pcmcia;
24120 + u16 reserved4;
24121 + /*14*/ u16 board;
24122 + u16 reserved5;
24123 + /*18*/ u16 disk_leds;
24124 + u16 reserved6;
24125 + /*1C*/ u16 system;
24126 + u16 reserved7;
24127 +
24128 + /*20*/ u16 intclr;
24129 + u16 reserved8;
24130 + /*24*/ u16 intset;
24131 + u16 reserved9;
24132 + /*28*/ u16 intclr_mask;
24133 + u16 reserved10;
24134 + /*2C*/ u16 intset_mask;
24135 + u16 reserved11;
24136 +
24137 + /*30*/ u16 sig_status;
24138 + u16 reserved12;
24139 + /*34*/ u16 int_status;
24140 + u16 reserved13;
24141 + /*38*/ u16 reserved14;
24142 + u16 reserved15;
24143 + /*3C*/ u16 reserved16;
24144 + u16 reserved17;
24145 +
24146 +} BCSR;
24147 +
24148 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
24149 +
24150 +/*
24151 + * Register bit definitions for the BCSRs
24152 + */
24153 +#define BCSR_WHOAMI_DCID 0x000F
24154 +#define BCSR_WHOAMI_CPLD 0x00F0
24155 +#define BCSR_WHOAMI_BOARD 0x0F00
24156 +
24157 +#define BCSR_STATUS_PCMCIA0VS 0x0003
24158 +#define BCSR_STATUS_PCMCIA1VS 0x000C
24159 +#define BCSR_STATUS_SWAPBOOT 0x0040
24160 +#define BCSR_STATUS_FLASHBUSY 0x0100
24161 +#define BCSR_STATUS_IDECBLID 0x0200
24162 +#define BCSR_STATUS_SD0WP 0x0400
24163 +#define BCSR_STATUS_SD1WP 0x0800
24164 +#define BCSR_STATUS_U0RXD 0x1000
24165 +#define BCSR_STATUS_U1RXD 0x2000
24166 +
24167 +#define BCSR_SWITCHES_OCTAL 0x00FF
24168 +#define BCSR_SWITCHES_DIP_1 0x0080
24169 +#define BCSR_SWITCHES_DIP_2 0x0040
24170 +#define BCSR_SWITCHES_DIP_3 0x0020
24171 +#define BCSR_SWITCHES_DIP_4 0x0010
24172 +#define BCSR_SWITCHES_DIP_5 0x0008
24173 +#define BCSR_SWITCHES_DIP_6 0x0004
24174 +#define BCSR_SWITCHES_DIP_7 0x0002
24175 +#define BCSR_SWITCHES_DIP_8 0x0001
24176 +#define BCSR_SWITCHES_ROTARY 0x0F00
24177 +
24178 +#define BCSR_RESETS_ETH 0x0001
24179 +#define BCSR_RESETS_CAMERA 0x0002
24180 +#define BCSR_RESETS_DC 0x0004
24181 +#define BCSR_RESETS_IDE 0x0008
24182 +/* not resets but in the same register */
24183 +#define BCSR_RESETS_WSCFSM 0x0800
24184 +#define BCSR_RESETS_PCS0MUX 0x1000
24185 +#define BCSR_RESETS_PCS1MUX 0x2000
24186 +#define BCSR_RESETS_SPISEL 0x4000
24187 +#define BCSR_RESETS_SD1MUX 0x8000
24188 +
24189 +#define BCSR_PCMCIA_PC0VPP 0x0003
24190 +#define BCSR_PCMCIA_PC0VCC 0x000C
24191 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
24192 +#define BCSR_PCMCIA_PC0RST 0x0080
24193 +#define BCSR_PCMCIA_PC1VPP 0x0300
24194 +#define BCSR_PCMCIA_PC1VCC 0x0C00
24195 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
24196 +#define BCSR_PCMCIA_PC1RST 0x8000
24197 +
24198 +#define BCSR_BOARD_LCDVEE 0x0001
24199 +#define BCSR_BOARD_LCDVDD 0x0002
24200 +#define BCSR_BOARD_LCDBL 0x0004
24201 +#define BCSR_BOARD_CAMSNAP 0x0010
24202 +#define BCSR_BOARD_CAMPWR 0x0020
24203 +#define BCSR_BOARD_SD0PWR 0x0040
24204 +#define BCSR_BOARD_SD1PWR 0x0080
24205 +
24206 +#define BCSR_LEDS_DECIMALS 0x00FF
24207 +#define BCSR_LEDS_LED0 0x0100
24208 +#define BCSR_LEDS_LED1 0x0200
24209 +#define BCSR_LEDS_LED2 0x0400
24210 +#define BCSR_LEDS_LED3 0x0800
24211 +
24212 +#define BCSR_SYSTEM_VDDI 0x001F
24213 +#define BCSR_SYSTEM_POWEROFF 0x4000
24214 +#define BCSR_SYSTEM_RESET 0x8000
24215 +
24216 +/* Bit positions for the different interrupt sources */
24217 +#define BCSR_INT_IDE 0x0001
24218 +#define BCSR_INT_ETH 0x0002
24219 +#define BCSR_INT_PC0 0x0004
24220 +#define BCSR_INT_PC0STSCHG 0x0008
24221 +#define BCSR_INT_PC1 0x0010
24222 +#define BCSR_INT_PC1STSCHG 0x0020
24223 +#define BCSR_INT_DC 0x0040
24224 +#define BCSR_INT_FLASHBUSY 0x0080
24225 +#define BCSR_INT_PC0INSERT 0x0100
24226 +#define BCSR_INT_PC0EJECT 0x0200
24227 +#define BCSR_INT_PC1INSERT 0x0400
24228 +#define BCSR_INT_PC1EJECT 0x0800
24229 +#define BCSR_INT_SD0INSERT 0x1000
24230 +#define BCSR_INT_SD0EJECT 0x2000
24231 +#define BCSR_INT_SD1INSERT 0x4000
24232 +#define BCSR_INT_SD1EJECT 0x8000
24233 +
24234 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
24235 +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
24236 +
24237 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
24238 +#define AU1XXX_ATA_PHYS_LEN (0x100)
24239 +#define AU1XXX_ATA_REG_OFFSET (5)
24240 +#define AU1XXX_ATA_INT PB1200_IDE_INT
24241 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
24242 +#define AU1XXX_ATA_RQSIZE 128
24243 +
24244 +#define NAND_PHYS_ADDR 0x1C000000
24245 +
24246 +/* Timing values as described in databook, * ns value stripped of
24247 + * lower 2 bits.
24248 + * These defines are here rather than an SOC1200 generic file because
24249 + * the parts chosen on another board may be different and may require
24250 + * different timings.
24251 + */
24252 +#define NAND_T_H (18 >> 2)
24253 +#define NAND_T_PUL (30 >> 2)
24254 +#define NAND_T_SU (30 >> 2)
24255 +#define NAND_T_WH (30 >> 2)
24256 +
24257 +/* Bitfield shift amounts */
24258 +#define NAND_T_H_SHIFT 0
24259 +#define NAND_T_PUL_SHIFT 4
24260 +#define NAND_T_SU_SHIFT 8
24261 +#define NAND_T_WH_SHIFT 12
24262 +
24263 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24264 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24265 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24266 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24267 +
24268 +
24269 +/*
24270 + * External Interrupts for Pb1200 as of 8/6/2004.
24271 + * Bit positions in the CPLD registers can be calculated by taking
24272 + * the interrupt define and subtracting the PB1200_INT_BEGIN value.
24273 + * *example: IDE bis pos is = 64 - 64
24274 + ETH bit pos is = 65 - 64
24275 + */
24276 +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
24277 +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
24278 +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
24279 +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
24280 +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
24281 +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
24282 +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
24283 +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
24284 +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
24285 +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
24286 +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
24287 +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
24288 +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
24289 +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
24290 +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
24291 +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
24292 +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
24293 +
24294 +#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
24295 +
24296 +/* For drivers/pcmcia/au1000_db1x00.c */
24297 +#define BOARD_PC0_INT PB1200_PC0_INT
24298 +#define BOARD_PC1_INT PB1200_PC1_INT
24299 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
24300 +
24301 +#endif /* __ASM_PB1200_H */
24302 +
24303 diff -Nur linux-2.4.29/include/asm-mips/pb1550.h linux-mips/include/asm-mips/pb1550.h
24304 --- linux-2.4.29/include/asm-mips/pb1550.h 2005-01-19 15:10:12.000000000 +0100
24305 +++ linux-mips/include/asm-mips/pb1550.h 2005-01-31 12:59:49.000000000 +0100
24306 @@ -30,13 +30,11 @@
24307
24308 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
24309 #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
24310 -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
24311 -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
24312 -
24313 #define SPI_PSC_BASE PSC0_BASE_ADDR
24314 #define AC97_PSC_BASE PSC1_BASE_ADDR
24315 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
24316 #define I2S_PSC_BASE PSC3_BASE_ADDR
24317 +#define NAND_CS 1
24318
24319 #define BCSR_PHYS_ADDR 0xAF000000
24320
24321 @@ -160,9 +158,23 @@
24322 #define NAND_T_SU_SHIFT 8
24323 #define NAND_T_WH_SHIFT 12
24324
24325 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24326 - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24327 - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24328 - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24329 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
24330 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
24331 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
24332 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
24333 +
24334 +/*
24335 + * Daughter card information.
24336 + */
24337 +#define DAUGHTER_CARD_BASE (0xAC000000)
24338 +#define DAUGHTER_CARD_MEM_SIZE (0xADFFFFFF - DAUGHTER_CARD_BASE + 1)
24339 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_3)
24340 +
24341 +/* DC_IDE and DC_ETHERNET */
24342 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
24343 +#define AU1XXX_ATA_REG_OFFSET (5)
24344 +
24345 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0C000300)
24346 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_3
24347
24348 #endif /* __ASM_PB1550_H */
24349 diff -Nur linux-2.4.29/include/asm-mips/tx4927/tx4927.h linux-mips/include/asm-mips/tx4927/tx4927.h
24350 --- linux-2.4.29/include/asm-mips/tx4927/tx4927.h 2003-08-25 13:44:44.000000000 +0200
24351 +++ linux-mips/include/asm-mips/tx4927/tx4927.h 2004-11-22 19:02:10.000000000 +0100
24352 @@ -88,8 +88,8 @@
24353
24354
24355 /* TX4927 Configuration registers (64-bit registers) */
24356 -#define TX4927_CONFIG_BASE 0xe300
24357 -#define TX4927_CONFIG_CCFG 0xe300
24358 +#define TX4927_CONFIG_BASE 0xe000
24359 +#define TX4927_CONFIG_CCFG 0xe000
24360 #define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
24361 #define TX4927_CONFIG_CCFG_WDRST BM_41_41
24362 #define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
24363 @@ -124,14 +124,14 @@
24364 #define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
24365 #define TX4927_CONFIG_CCFG_ARMODE BM_01_01
24366 #define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
24367 -#define TX4927_CONFIG_REVID 0xe308
24368 +#define TX4927_CONFIG_REVID 0xe008
24369 #define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
24370 #define TX4927_CONFIG_REVID_PCODE BM_16_31
24371 #define TX4927_CONFIG_REVID_MJERREV BM_12_15
24372 #define TX4927_CONFIG_REVID_MINEREV BM_08_11
24373 #define TX4927_CONFIG_REVID_MJREV BM_04_07
24374 #define TX4927_CONFIG_REVID_MINREV BM_00_03
24375 -#define TX4927_CONFIG_PCFG 0xe310
24376 +#define TX4927_CONFIG_PCFG 0xe010
24377 #define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
24378 #define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
24379 #define TX4927_CONFIG_PCFG_DRVCB BM_55_55
24380 @@ -197,10 +197,10 @@
24381 #define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
24382 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
24383 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
24384 -#define TX4927_CONFIG_TOEA 0xe318
24385 +#define TX4927_CONFIG_TOEA 0xe018
24386 #define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
24387 #define TX4927_CONFIG_TOEA_TOEA BM_00_35
24388 -#define TX4927_CONFIG_CLKCTR 0xe320
24389 +#define TX4927_CONFIG_CLKCTR 0xe020
24390 #define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
24391 #define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
24392 #define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
24393 @@ -223,7 +223,7 @@
24394 #define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
24395 #define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
24396 #define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
24397 -#define TX4927_CONFIG_GARBC 0xe330
24398 +#define TX4927_CONFIG_GARBC 0xe030
24399 #define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
24400 #define TX4927_CONFIG_GARBC_SET_09 BM_09_09
24401 #define TX4927_CONFIG_GARBC_ARBMD BM_08_08
24402 @@ -243,7 +243,7 @@
24403 #define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
24404 #define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
24405 #define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
24406 -#define TX4927_CONFIG_RAMP 0xe348
24407 +#define TX4927_CONFIG_RAMP 0xe048
24408 #define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
24409 #define TX4927_CONFIG_RAMP_RAMP BM_00_19
24410 #define TX4927_CONFIG_LIMIT 0xefff
24411 @@ -456,7 +456,7 @@
24412 #define TX4927_ACLC_ACINTSTS 0xf710
24413 #define TX4927_ACLC_ACINTMSTS 0xf714
24414 #define TX4927_ACLC_ACINTEN 0xf718
24415 -#define TX4927_ACLC_ACINTDIS 0xfR71c
24416 +#define TX4927_ACLC_ACINTDIS 0xf71c
24417 #define TX4927_ACLC_ACSEMAPH 0xf720
24418 #define TX4927_ACLC_ACGPIDAT 0xf740
24419 #define TX4927_ACLC_ACGPODAT 0xf744
24420 diff -Nur linux-2.4.29/include/asm-mips/unistd.h linux-mips/include/asm-mips/unistd.h
24421 --- linux-2.4.29/include/asm-mips/unistd.h 2005-01-19 15:10:12.000000000 +0100
24422 +++ linux-mips/include/asm-mips/unistd.h 2004-11-24 21:30:06.000000000 +0100
24423 @@ -760,7 +760,7 @@
24424 if (__a3 == 0) \
24425 return (type) __v0; \
24426 errno = __v0; \
24427 - return -1; \
24428 + return (type)-1; \
24429 }
24430
24431 /*
24432 @@ -788,7 +788,7 @@
24433 if (__a3 == 0) \
24434 return (type) __v0; \
24435 errno = __v0; \
24436 - return -1; \
24437 + return (type)-1; \
24438 }
24439
24440 #define _syscall2(type,name,atype,a,btype,b) \
24441 @@ -813,7 +813,7 @@
24442 if (__a3 == 0) \
24443 return (type) __v0; \
24444 errno = __v0; \
24445 - return -1; \
24446 + return (type)-1; \
24447 }
24448
24449 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
24450 @@ -839,7 +839,7 @@
24451 if (__a3 == 0) \
24452 return (type) __v0; \
24453 errno = __v0; \
24454 - return -1; \
24455 + return (type)-1; \
24456 }
24457
24458 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
24459 @@ -865,7 +865,7 @@
24460 if (__a3 == 0) \
24461 return (type) __v0; \
24462 errno = __v0; \
24463 - return -1; \
24464 + return (type)-1; \
24465 }
24466
24467 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
24468 @@ -902,7 +902,7 @@
24469 if (__a3 == 0) \
24470 return (type) __v0; \
24471 errno = __v0; \
24472 - return -1; \
24473 + return (type)-1; \
24474 }
24475
24476 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24477 @@ -935,7 +935,7 @@
24478 if (__a3 == 0) \
24479 return (type) __v0; \
24480 errno = __v0; \
24481 - return -1; \
24482 + return (type)-1; \
24483 }
24484
24485 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
24486 @@ -966,7 +966,7 @@
24487 if (__a3 == 0) \
24488 return (type) __v0; \
24489 errno = __v0; \
24490 - return -1; \
24491 + return (type)-1; \
24492 }
24493
24494 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24495 @@ -995,7 +995,7 @@
24496 if (__a3 == 0) \
24497 return (type) __v0; \
24498 errno = __v0; \
24499 - return -1; \
24500 + return (type)-1; \
24501 }
24502
24503 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
24504 diff -Nur linux-2.4.29/include/asm-mips64/hazards.h linux-mips/include/asm-mips64/hazards.h
24505 --- linux-2.4.29/include/asm-mips64/hazards.h 2004-02-18 14:36:32.000000000 +0100
24506 +++ linux-mips/include/asm-mips64/hazards.h 2004-11-25 23:18:38.000000000 +0100
24507 @@ -3,7 +3,7 @@
24508 * License. See the file "COPYING" in the main directory of this archive
24509 * for more details.
24510 *
24511 - * Copyright (C) 2003 Ralf Baechle
24512 + * Copyright (C) 2003, 2004 Ralf Baechle
24513 */
24514 #ifndef _ASM_HAZARDS_H
24515 #define _ASM_HAZARDS_H
24516 @@ -12,37 +12,185 @@
24517
24518 #ifdef __ASSEMBLY__
24519
24520 + .macro _ssnop
24521 + sll $0, $0, 1
24522 + .endm
24523 +
24524 /*
24525 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
24526 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
24527 * for data translations should not occur for 3 cpu cycles.
24528 */
24529 #ifdef CONFIG_CPU_RM9000
24530 -#define rm9000_tlb_hazard \
24531 +
24532 +#define mtc0_tlbw_hazard \
24533 + .set push; \
24534 + .set mips32; \
24535 + _ssnop; _ssnop; _ssnop; _ssnop; \
24536 + .set pop
24537 +
24538 +#define tlbw_eret_hazard \
24539 + .set push; \
24540 .set mips32; \
24541 - ssnop; ssnop; ssnop; ssnop; \
24542 - .set mips0
24543 + _ssnop; _ssnop; _ssnop; _ssnop; \
24544 + .set pop
24545 +
24546 #else
24547 -#define rm9000_tlb_hazard
24548 +
24549 +/*
24550 + * The taken branch will result in a two cycle penalty for the two killed
24551 + * instructions on R4000 / R4400. Other processors only have a single cycle
24552 + * hazard so this is nice trick to have an optimal code for a range of
24553 + * processors.
24554 + */
24555 +#define mtc0_tlbw_hazard \
24556 + b . + 8
24557 +#define tlbw_eret_hazard
24558 #endif
24559
24560 +/*
24561 + * mtc0->mfc0 hazard
24562 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
24563 + * It is a MIPS32R2 processor so ehb will clear the hazard.
24564 + */
24565 +
24566 +#ifdef CONFIG_CPU_MIPSR2
24567 +/*
24568 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
24569 + */
24570 + .macro ehb
24571 + sll $0, $0, 3
24572 + .endm
24573 +
24574 +#define irq_enable_hazard \
24575 + ehb # irq_enable_hazard
24576 +
24577 +#define irq_disable_hazard \
24578 + ehb # irq_disable_hazard
24579 +
24580 #else
24581
24582 +#define irq_enable_hazard
24583 +#define irq_disable_hazard
24584 +
24585 +#endif
24586 +
24587 +#else /* __ASSEMBLY__ */
24588 +
24589 /*
24590 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
24591 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
24592 * for data translations should not occur for 3 cpu cycles.
24593 */
24594 #ifdef CONFIG_CPU_RM9000
24595 -#define rm9000_tlb_hazard() \
24596 +
24597 +#define mtc0_tlbw_hazard() \
24598 + __asm__ __volatile__( \
24599 + ".set\tmips32\n\t" \
24600 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
24601 + ".set\tmips0")
24602 +
24603 +#define tlbw_use_hazard() \
24604 __asm__ __volatile__( \
24605 ".set\tmips32\n\t" \
24606 - "ssnop; ssnop; ssnop; ssnop\n\t" \
24607 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
24608 ".set\tmips0")
24609 #else
24610 -#define rm9000_tlb_hazard() do { } while (0)
24611 +
24612 +/*
24613 + * Overkill warning ...
24614 + */
24615 +#define mtc0_tlbw_hazard() \
24616 + __asm__ __volatile__( \
24617 + ".set noreorder\n\t" \
24618 + "nop; nop; nop; nop; nop; nop;\n\t" \
24619 + ".set reorder\n\t")
24620 +
24621 +#define tlbw_use_hazard() \
24622 + __asm__ __volatile__( \
24623 + ".set noreorder\n\t" \
24624 + "nop; nop; nop; nop; nop; nop;\n\t" \
24625 + ".set reorder\n\t")
24626 +
24627 #endif
24628
24629 +/*
24630 + * mtc0->mfc0 hazard
24631 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
24632 + * It is a MIPS32R2 processor so ehb will clear the hazard.
24633 + */
24634 +
24635 +#ifdef CONFIG_CPU_MIPSR2
24636 +/*
24637 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
24638 + */
24639 +__asm__(
24640 + " .macro ehb \n\t"
24641 + " sll $0, $0, 3 \n\t"
24642 + " .endm \n\t"
24643 + " \n\t"
24644 + " .macro\tirq_enable_hazard \n\t"
24645 + " ehb \n\t"
24646 + " .endm \n\t"
24647 + " \n\t"
24648 + " .macro\tirq_disable_hazard \n\t"
24649 + " ehb \n\t"
24650 + " .endm");
24651 +
24652 +#define irq_enable_hazard() \
24653 + __asm__ __volatile__( \
24654 + "ehb\t\t\t\t# irq_enable_hazard")
24655 +
24656 +#define irq_disable_hazard() \
24657 + __asm__ __volatile__( \
24658 + "ehb\t\t\t\t# irq_disable_hazard")
24659 +
24660 +#elif defined(CONFIG_CPU_R10000)
24661 +
24662 +/*
24663 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
24664 + */
24665 +
24666 +__asm__(
24667 + " .macro\tirq_enable_hazard \n\t"
24668 + " .endm \n\t"
24669 + " \n\t"
24670 + " .macro\tirq_disable_hazard \n\t"
24671 + " .endm");
24672 +
24673 +#define irq_enable_hazard() do { } while (0)
24674 +#define irq_disable_hazard() do { } while (0)
24675 +
24676 +#else
24677 +
24678 +/*
24679 + * Default for classic MIPS processors. Assume worst case hazards but don't
24680 + * care about the irq_enable_hazard - sooner or later the hardware will
24681 + * enable it and we don't care when exactly.
24682 + */
24683 +
24684 +__asm__(
24685 + " .macro _ssnop \n\t"
24686 + " sll $0, $2, 1 \n\t"
24687 + " .endm \n\t"
24688 + " \n\t"
24689 + " # \n\t"
24690 + " # There is a hazard but we do not care \n\t"
24691 + " # \n\t"
24692 + " .macro\tirq_enable_hazard \n\t"
24693 + " .endm \n\t"
24694 + " \n\t"
24695 + " .macro\tirq_disable_hazard \n\t"
24696 + " _ssnop; _ssnop; _ssnop \n\t"
24697 + " .endm");
24698 +
24699 +#define irq_enable_hazard() do { } while (0)
24700 +#define irq_disable_hazard() \
24701 + __asm__ __volatile__( \
24702 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
24703 +
24704 #endif
24705
24706 +#endif /* __ASSEMBLY__ */
24707 +
24708 #endif /* _ASM_HAZARDS_H */
24709 diff -Nur linux-2.4.29/include/asm-mips64/mipsregs.h linux-mips/include/asm-mips64/mipsregs.h
24710 --- linux-2.4.29/include/asm-mips64/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
24711 +++ linux-mips/include/asm-mips64/mipsregs.h 2005-02-12 04:08:02.000000000 +0100
24712 @@ -757,10 +757,18 @@
24713 #define read_c0_config1() __read_32bit_c0_register($16, 1)
24714 #define read_c0_config2() __read_32bit_c0_register($16, 2)
24715 #define read_c0_config3() __read_32bit_c0_register($16, 3)
24716 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
24717 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
24718 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
24719 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
24720 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
24721 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
24722 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
24723 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
24724 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
24725 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
24726 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
24727 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
24728
24729 /*
24730 * The WatchLo register. There may be upto 8 of them.
24731 @@ -856,42 +864,34 @@
24732 */
24733 static inline void tlb_probe(void)
24734 {
24735 - rm9000_tlb_hazard();
24736 __asm__ __volatile__(
24737 ".set noreorder\n\t"
24738 "tlbp\n\t"
24739 ".set reorder");
24740 - rm9000_tlb_hazard();
24741 }
24742
24743 static inline void tlb_read(void)
24744 {
24745 - rm9000_tlb_hazard();
24746 __asm__ __volatile__(
24747 ".set noreorder\n\t"
24748 "tlbr\n\t"
24749 ".set reorder");
24750 - rm9000_tlb_hazard();
24751 }
24752
24753 static inline void tlb_write_indexed(void)
24754 {
24755 - rm9000_tlb_hazard();
24756 __asm__ __volatile__(
24757 ".set noreorder\n\t"
24758 "tlbwi\n\t"
24759 ".set reorder");
24760 - rm9000_tlb_hazard();
24761 }
24762
24763 static inline void tlb_write_random(void)
24764 {
24765 - rm9000_tlb_hazard();
24766 __asm__ __volatile__(
24767 ".set noreorder\n\t"
24768 "tlbwr\n\t"
24769 ".set reorder");
24770 - rm9000_tlb_hazard();
24771 }
24772
24773 /*
24774 diff -Nur linux-2.4.29/include/asm-mips64/unistd.h linux-mips/include/asm-mips64/unistd.h
24775 --- linux-2.4.29/include/asm-mips64/unistd.h 2005-01-19 15:10:12.000000000 +0100
24776 +++ linux-mips/include/asm-mips64/unistd.h 2004-11-24 21:30:06.000000000 +0100
24777 @@ -760,7 +760,7 @@
24778 if (__a3 == 0) \
24779 return (type) __v0; \
24780 errno = __v0; \
24781 - return -1; \
24782 + return (type)-1; \
24783 }
24784
24785 /*
24786 @@ -788,7 +788,7 @@
24787 if (__a3 == 0) \
24788 return (type) __v0; \
24789 errno = __v0; \
24790 - return -1; \
24791 + return (type)-1; \
24792 }
24793
24794 #define _syscall2(type,name,atype,a,btype,b) \
24795 @@ -813,7 +813,7 @@
24796 if (__a3 == 0) \
24797 return (type) __v0; \
24798 errno = __v0; \
24799 - return -1; \
24800 + return (type)-1; \
24801 }
24802
24803 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
24804 @@ -839,7 +839,7 @@
24805 if (__a3 == 0) \
24806 return (type) __v0; \
24807 errno = __v0; \
24808 - return -1; \
24809 + return (type)-1; \
24810 }
24811
24812 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
24813 @@ -865,7 +865,7 @@
24814 if (__a3 == 0) \
24815 return (type) __v0; \
24816 errno = __v0; \
24817 - return -1; \
24818 + return (type)-1; \
24819 }
24820
24821 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
24822 @@ -902,7 +902,7 @@
24823 if (__a3 == 0) \
24824 return (type) __v0; \
24825 errno = __v0; \
24826 - return -1; \
24827 + return (type)-1; \
24828 }
24829
24830 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24831 @@ -935,7 +935,7 @@
24832 if (__a3 == 0) \
24833 return (type) __v0; \
24834 errno = __v0; \
24835 - return -1; \
24836 + return (type)-1; \
24837 }
24838
24839 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
24840 @@ -966,7 +966,7 @@
24841 if (__a3 == 0) \
24842 return (type) __v0; \
24843 errno = __v0; \
24844 - return -1; \
24845 + return (type)-1; \
24846 }
24847
24848 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
24849 @@ -995,7 +995,7 @@
24850 if (__a3 == 0) \
24851 return (type) __v0; \
24852 errno = __v0; \
24853 - return -1; \
24854 + return (type)-1; \
24855 }
24856
24857 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
24858 diff -Nur linux-2.4.29/include/asm-ppc/param.h linux-mips/include/asm-ppc/param.h
24859 --- linux-2.4.29/include/asm-ppc/param.h 2003-06-13 16:51:38.000000000 +0200
24860 +++ linux-mips/include/asm-ppc/param.h 2003-07-05 05:23:46.000000000 +0200
24861 @@ -3,6 +3,9 @@
24862
24863 #ifndef HZ
24864 #define HZ 100
24865 +#ifdef __KERNEL__
24866 +#define hz_to_std(a) (a)
24867 +#endif
24868 #endif
24869
24870 #define EXEC_PAGESIZE 4096
24871 diff -Nur linux-2.4.29/include/asm-s390/param.h linux-mips/include/asm-s390/param.h
24872 --- linux-2.4.29/include/asm-s390/param.h 2001-02-13 23:13:44.000000000 +0100
24873 +++ linux-mips/include/asm-s390/param.h 2001-03-09 21:34:48.000000000 +0100
24874 @@ -11,6 +11,9 @@
24875
24876 #ifndef HZ
24877 #define HZ 100
24878 +#ifdef __KERNEL__
24879 +#define hz_to_std(a) (a)
24880 +#endif
24881 #endif
24882
24883 #define EXEC_PAGESIZE 4096
24884 diff -Nur linux-2.4.29/include/asm-sh/param.h linux-mips/include/asm-sh/param.h
24885 --- linux-2.4.29/include/asm-sh/param.h 2001-01-04 22:19:13.000000000 +0100
24886 +++ linux-mips/include/asm-sh/param.h 2001-01-11 05:02:45.000000000 +0100
24887 @@ -3,6 +3,9 @@
24888
24889 #ifndef HZ
24890 #define HZ 100
24891 +#ifdef __KERNEL__
24892 +#define hz_to_std(a) (a)
24893 +#endif
24894 #endif
24895
24896 #define EXEC_PAGESIZE 4096
24897 diff -Nur linux-2.4.29/include/asm-sparc/param.h linux-mips/include/asm-sparc/param.h
24898 --- linux-2.4.29/include/asm-sparc/param.h 2000-10-30 23:34:12.000000000 +0100
24899 +++ linux-mips/include/asm-sparc/param.h 2000-11-23 03:00:56.000000000 +0100
24900 @@ -4,6 +4,9 @@
24901
24902 #ifndef HZ
24903 #define HZ 100
24904 +#ifdef __KERNEL__
24905 +#define hz_to_std(a) (a)
24906 +#endif
24907 #endif
24908
24909 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
24910 diff -Nur linux-2.4.29/include/asm-sparc64/param.h linux-mips/include/asm-sparc64/param.h
24911 --- linux-2.4.29/include/asm-sparc64/param.h 2000-10-30 23:34:12.000000000 +0100
24912 +++ linux-mips/include/asm-sparc64/param.h 2000-11-23 03:00:56.000000000 +0100
24913 @@ -4,6 +4,9 @@
24914
24915 #ifndef HZ
24916 #define HZ 100
24917 +#ifdef __KERNEL__
24918 +#define hz_to_std(a) (a)
24919 +#endif
24920 #endif
24921
24922 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
24923 diff -Nur linux-2.4.29/include/linux/i2c-algo-au1550.h linux-mips/include/linux/i2c-algo-au1550.h
24924 --- linux-2.4.29/include/linux/i2c-algo-au1550.h 1970-01-01 01:00:00.000000000 +0100
24925 +++ linux-mips/include/linux/i2c-algo-au1550.h 2004-07-07 02:38:02.000000000 +0200
24926 @@ -0,0 +1,31 @@
24927 +/*
24928 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
24929 + *
24930 + * This program is free software; you can redistribute it and/or modify
24931 + * it under the terms of the GNU General Public License as published by
24932 + * the Free Software Foundation; either version 2 of the License, or
24933 + * (at your option) any later version.
24934 + *
24935 + * This program is distributed in the hope that it will be useful,
24936 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
24937 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24938 + * GNU General Public License for more details.
24939 + *
24940 + * You should have received a copy of the GNU General Public License
24941 + * along with this program; if not, write to the Free Software
24942 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24943 + */
24944 +
24945 +#ifndef I2C_ALGO_AU1550_H
24946 +#define I2C_ALGO_AU1550_H 1
24947 +
24948 +struct i2c_algo_au1550_data {
24949 + u32 psc_base;
24950 + int xfer_timeout;
24951 + int ack_timeout;
24952 +};
24953 +
24954 +int i2c_au1550_add_bus(struct i2c_adapter *);
24955 +int i2c_au1550_del_bus(struct i2c_adapter *);
24956 +
24957 +#endif /* I2C_ALGO_AU1550_H */
24958 diff -Nur linux-2.4.29/include/linux/i2c-id.h linux-mips/include/linux/i2c-id.h
24959 --- linux-2.4.29/include/linux/i2c-id.h 2004-02-18 14:36:32.000000000 +0100
24960 +++ linux-mips/include/linux/i2c-id.h 2004-07-07 02:38:02.000000000 +0200
24961 @@ -156,6 +156,8 @@
24962
24963 #define I2C_ALGO_SGI 0x130000 /* SGI algorithm */
24964
24965 +#define I2C_ALGO_AU1550 0x140000 /* Alchemy Au1550 PSC */
24966 +
24967 #define I2C_ALGO_EXP 0x800000 /* experimental */
24968
24969 #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
24970 @@ -204,6 +206,9 @@
24971 #define I2C_HW_SGI_VINO 0x00
24972 #define I2C_HW_SGI_MACE 0x01
24973
24974 +/* --- Au1550 PSC adapters */
24975 +#define I2C_HW_AU1550_PSC 0x00
24976 +
24977 /* --- SMBus only adapters */
24978 #define I2C_HW_SMBUS_PIIX4 0x00
24979 #define I2C_HW_SMBUS_ALI15X3 0x01
24980 diff -Nur linux-2.4.29/include/linux/sched.h linux-mips/include/linux/sched.h
24981 --- linux-2.4.29/include/linux/sched.h 2005-01-19 15:10:12.000000000 +0100
24982 +++ linux-mips/include/linux/sched.h 2004-11-29 18:47:18.000000000 +0100
24983 @@ -617,6 +617,10 @@
24984 extern int in_group_p(gid_t);
24985 extern int in_egroup_p(gid_t);
24986
24987 +extern ATTRIB_NORET void cpu_idle(void);
24988 +
24989 +extern void release_task(struct task_struct * p);
24990 +
24991 extern void proc_caches_init(void);
24992 extern void flush_signals(struct task_struct *);
24993 extern void flush_signal_handlers(struct task_struct *);
24994 diff -Nur linux-2.4.29/include/linux/serial.h linux-mips/include/linux/serial.h
24995 --- linux-2.4.29/include/linux/serial.h 2002-08-03 02:39:45.000000000 +0200
24996 +++ linux-mips/include/linux/serial.h 2004-07-31 02:17:57.000000000 +0200
24997 @@ -75,7 +75,8 @@
24998 #define PORT_16654 11
24999 #define PORT_16850 12
25000 #define PORT_RSA 13 /* RSA-DV II/S card */
25001 -#define PORT_MAX 13
25002 +#define PORT_SB1250 14
25003 +#define PORT_MAX 14
25004
25005 #define SERIAL_IO_PORT 0
25006 #define SERIAL_IO_HUB6 1
25007 diff -Nur linux-2.4.29/include/linux/swap.h linux-mips/include/linux/swap.h
25008 --- linux-2.4.29/include/linux/swap.h 2005-01-19 15:10:12.000000000 +0100
25009 +++ linux-mips/include/linux/swap.h 2004-11-29 18:47:18.000000000 +0100
25010 @@ -1,6 +1,12 @@
25011 #ifndef _LINUX_SWAP_H
25012 #define _LINUX_SWAP_H
25013
25014 +#include <linux/config.h>
25015 +
25016 +#define MAX_SWAPFILES 32
25017 +
25018 +#ifdef __KERNEL__
25019 +
25020 #include <linux/spinlock.h>
25021 #include <asm/page.h>
25022
25023 @@ -8,8 +14,6 @@
25024 #define SWAP_FLAG_PRIO_MASK 0x7fff
25025 #define SWAP_FLAG_PRIO_SHIFT 0
25026
25027 -#define MAX_SWAPFILES 32
25028 -
25029 /*
25030 * Magic header for a swap area. The first part of the union is
25031 * what the swap magic looks like for the old (limited to 128MB)
25032 @@ -39,8 +43,6 @@
25033 } info;
25034 };
25035
25036 -#ifdef __KERNEL__
25037 -
25038 /*
25039 * Max bad pages in the new format..
25040 */
25041 diff -Nur linux-2.4.29/include/video/newport.h linux-mips/include/video/newport.h
25042 --- linux-2.4.29/include/video/newport.h 2001-04-12 21:20:31.000000000 +0200
25043 +++ linux-mips/include/video/newport.h 2004-09-23 15:32:29.000000000 +0200
25044 @@ -291,8 +291,6 @@
25045 unsigned int _unused2[0x1ef];
25046 struct newport_cregs cgo;
25047 };
25048 -extern struct newport_regs *npregs;
25049 -
25050
25051 typedef struct {
25052 unsigned int drawmode1;
25053 @@ -450,38 +448,26 @@
25054
25055 /* Miscellaneous NEWPORT routines. */
25056 #define BUSY_TIMEOUT 100000
25057 -static __inline__ int newport_wait(void)
25058 +static __inline__ int newport_wait(struct newport_regs *regs)
25059 {
25060 - int i = 0;
25061 + int t = BUSY_TIMEOUT;
25062
25063 - while(i < BUSY_TIMEOUT)
25064 - if(!(npregs->cset.status & NPORT_STAT_GBUSY))
25065 + while (t--)
25066 + if (!(regs->cset.status & NPORT_STAT_GBUSY))
25067 break;
25068 - if(i == BUSY_TIMEOUT)
25069 - return 1;
25070 - return 0;
25071 + return !t;
25072 }
25073
25074 -static __inline__ int newport_bfwait(void)
25075 +static __inline__ int newport_bfwait(struct newport_regs *regs)
25076 {
25077 - int i = 0;
25078 + int t = BUSY_TIMEOUT;
25079
25080 - while(i < BUSY_TIMEOUT)
25081 - if(!(npregs->cset.status & NPORT_STAT_BBUSY))
25082 + while (t--)
25083 + if(!(regs->cset.status & NPORT_STAT_BBUSY))
25084 break;
25085 - if(i == BUSY_TIMEOUT)
25086 - return 1;
25087 - return 0;
25088 + return !t;
25089 }
25090
25091 -/* newport.c and cons_newport.c routines */
25092 -extern struct graphics_ops *newport_probe (int, const char **);
25093 -
25094 -void newport_save (void *);
25095 -void newport_restore (void *);
25096 -void newport_reset (void);
25097 -int newport_ioctl (int card, int cmd, unsigned long arg);
25098 -
25099 /*
25100 * DCBMODE register defines:
25101 */
25102 @@ -564,7 +550,7 @@
25103 {
25104 rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
25105 DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
25106 - newport_bfwait ();
25107 + newport_bfwait (rex);
25108
25109 while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
25110 ;
25111 diff -Nur linux-2.4.29/init/main.c linux-mips/init/main.c
25112 --- linux-2.4.29/init/main.c 2004-11-17 12:54:22.000000000 +0100
25113 +++ linux-mips/init/main.c 2004-11-19 01:28:52.000000000 +0100
25114 @@ -296,7 +296,6 @@
25115
25116
25117 extern void setup_arch(char **);
25118 -extern void cpu_idle(void);
25119
25120 unsigned long wait_init_idle;
25121
25122 diff -Nur linux-2.4.29/kernel/exit.c linux-mips/kernel/exit.c
25123 --- linux-2.4.29/kernel/exit.c 2002-11-29 00:53:15.000000000 +0100
25124 +++ linux-mips/kernel/exit.c 2003-01-11 18:53:18.000000000 +0100
25125 @@ -26,7 +26,7 @@
25126
25127 int getrusage(struct task_struct *, int, struct rusage *);
25128
25129 -static void release_task(struct task_struct * p)
25130 +void release_task(struct task_struct * p)
25131 {
25132 if (p != current) {
25133 #ifdef CONFIG_SMP
25134 diff -Nur linux-2.4.29/kernel/signal.c linux-mips/kernel/signal.c
25135 --- linux-2.4.29/kernel/signal.c 2004-02-18 14:36:32.000000000 +0100
25136 +++ linux-mips/kernel/signal.c 2004-01-20 16:10:34.000000000 +0100
25137 @@ -14,6 +14,7 @@
25138 #include <linux/init.h>
25139 #include <linux/sched.h>
25140
25141 +#include <asm/param.h>
25142 #include <asm/uaccess.h>
25143
25144 /*
25145 @@ -28,6 +29,14 @@
25146 #define SIG_SLAB_DEBUG 0
25147 #endif
25148
25149 +#define DEBUG_SIG 0
25150 +
25151 +#if DEBUG_SIG
25152 +#define SIG_SLAB_DEBUG (SLAB_DEBUG_FREE | SLAB_RED_ZONE /* | SLAB_POISON */)
25153 +#else
25154 +#define SIG_SLAB_DEBUG 0
25155 +#endif
25156 +
25157 static kmem_cache_t *sigqueue_cachep;
25158
25159 atomic_t nr_queued_signals;
25160 @@ -270,6 +279,11 @@
25161 signal_pending(current));
25162 #endif
25163
25164 +#if DEBUG_SIG
25165 +printk("SIG dequeue (%s:%d): %d ", current->comm, current->pid,
25166 + signal_pending(current));
25167 +#endif
25168 +
25169 sig = next_signal(current, mask);
25170 if (sig) {
25171 if (current->notifier) {
25172 @@ -293,6 +307,10 @@
25173 printk(" %d -> %d\n", signal_pending(current), sig);
25174 #endif
25175
25176 +#if DEBUG_SIG
25177 +printk(" %d -> %d\n", signal_pending(current), sig);
25178 +#endif
25179 +
25180 return sig;
25181 }
25182
25183 @@ -540,6 +558,11 @@
25184 printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
25185 #endif
25186
25187 +
25188 +#if DEBUG_SIG
25189 +printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
25190 +#endif
25191 +
25192 ret = -EINVAL;
25193 if (sig < 0 || sig > _NSIG)
25194 goto out_nolock;
25195 @@ -778,8 +801,8 @@
25196 info.si_uid = tsk->uid;
25197
25198 /* FIXME: find out whether or not this is supposed to be c*time. */
25199 - info.si_utime = tsk->times.tms_utime;
25200 - info.si_stime = tsk->times.tms_stime;
25201 + info.si_utime = hz_to_std(tsk->times.tms_utime);
25202 + info.si_stime = hz_to_std(tsk->times.tms_stime);
25203
25204 status = tsk->exit_code & 0x7f;
25205 why = SI_KERNEL; /* shouldn't happen */
25206 diff -Nur linux-2.4.29/kernel/sys.c linux-mips/kernel/sys.c
25207 --- linux-2.4.29/kernel/sys.c 2003-11-28 19:26:21.000000000 +0100
25208 +++ linux-mips/kernel/sys.c 2003-11-17 02:07:47.000000000 +0100
25209 @@ -801,16 +801,23 @@
25210
25211 asmlinkage long sys_times(struct tms * tbuf)
25212 {
25213 + struct tms temp;
25214 +
25215 /*
25216 * In the SMP world we might just be unlucky and have one of
25217 * the times increment as we use it. Since the value is an
25218 * atomically safe type this is just fine. Conceptually its
25219 * as if the syscall took an instant longer to occur.
25220 */
25221 - if (tbuf)
25222 - if (copy_to_user(tbuf, &current->times, sizeof(struct tms)))
25223 + if (tbuf) {
25224 + temp.tms_utime = hz_to_std(current->times.tms_utime);
25225 + temp.tms_stime = hz_to_std(current->times.tms_stime);
25226 + temp.tms_cutime = hz_to_std(current->times.tms_cutime);
25227 + temp.tms_cstime = hz_to_std(current->times.tms_cstime);
25228 + if (copy_to_user(tbuf, &temp, sizeof(struct tms)))
25229 return -EFAULT;
25230 - return jiffies;
25231 + }
25232 + return hz_to_std(jiffies);
25233 }
25234
25235 /*
25236 diff -Nur linux-2.4.29/lib/Makefile linux-mips/lib/Makefile
25237 --- linux-2.4.29/lib/Makefile 2004-04-14 15:05:40.000000000 +0200
25238 +++ linux-mips/lib/Makefile 2004-04-16 05:14:21.000000000 +0200
25239 @@ -27,6 +27,7 @@
25240 subdir-$(CONFIG_ZLIB_INFLATE) += zlib_inflate
25241 subdir-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate
25242
25243 +-include $(TOPDIR)/arch/$(ARCH)/Makefile.lib
25244 include $(TOPDIR)/drivers/net/Makefile.lib
25245 include $(TOPDIR)/drivers/usb/Makefile.lib
25246 include $(TOPDIR)/drivers/bluetooth/Makefile.lib
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