fixes reset button on atheros platform, ar5312 gpio_irqs will be added later
[openwrt.git] / target / linux / atheros / files / include / asm-mips / mach-atheros / cpu-feature-overrides.h
1 /*
2 * Atheros SoC specific CPU feature overrides
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This file was derived from: include/asm-mips/cpu-features.h
7 * Copyright (C) 2003, 2004 Ralf Baechle
8 * Copyright (C) 2004 Maciej W. Rozycki
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 *
14 */
15 #ifndef __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
16 #define __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
17
18 /*
19 * The ATHEROS SoCs have MIPS 4Kc/4KEc core.
20 */
21 #define cpu_has_tlb 1
22 #define cpu_has_4kex 1
23 #define cpu_has_3k_cache 0
24 #define cpu_has_4k_cache 1
25 #define cpu_has_tx39_cache 0
26 #define cpu_has_sb1_cache 0
27 #define cpu_has_fpu 0
28 #define cpu_has_32fpr 0
29 #define cpu_has_counter 1
30 /* #define cpu_has_watch ? */
31 /* #define cpu_has_divec ? */
32 /* #define cpu_has_vce ? */
33 /* #define cpu_has_cache_cdex_p ? */
34 /* #define cpu_has_cache_cdex_s ? */
35 /* #define cpu_has_prefetch ? */
36 /* #define cpu_has_mcheck ? */
37 #define cpu_has_ejtag 1
38
39 #if !defined(CONFIG_ATHEROS_AR5312)
40 # define cpu_has_llsc 1
41 #else
42 /*
43 * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the
44 * ll/sc instructions.
45 */
46 # define cpu_has_llsc 0
47 #endif
48
49 #define cpu_has_mips16 0
50 #define cpu_has_mdmx 0
51 #define cpu_has_mips3d 0
52 #define cpu_has_smartmips 0
53
54 /* #define cpu_has_vtag_icache ? */
55 /* #define cpu_has_dc_aliases ? */
56 /* #define cpu_has_ic_fills_f_dc ? */
57 /* #define cpu_has_pindexed_dcache ? */
58
59 /* #define cpu_icache_snoops_remote_store ? */
60
61 #define cpu_has_mips32r1 1
62
63 #if !defined(CONFIG_ATHEROS_5312)
64 # define cpu_has_mips32r2 1
65 #endif
66
67 #define cpu_has_mips64r1 0
68 #define cpu_has_mips64r2 0
69
70 #define cpu_has_dsp 0
71 #define cpu_has_mipsmt 0
72
73 /* #define cpu_has_nofpuex ? */
74 #define cpu_has_64bits 0
75 #define cpu_has_64bit_zero_reg 0
76 #define cpu_has_64bit_gp_regs 0
77 #define cpu_has_64bit_addresses 0
78
79 /* #define cpu_has_inclusive_pcaches ? */
80
81 /* #define cpu_dcache_line_size() ? */
82 /* #define cpu_icache_line_size() ? */
83
84 #endif /* __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H */
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