2 +++ b/arch/powerpc/boot/cuboot-magicbox.c
5 + * Old U-boot compatibility for Magicbox boards
7 + * Author: Imre Kaloz <kaloz@openwrt.org>
8 + * Gabor Juhos <juhosg@openwrt.org>
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
29 +static void fixup_perwe(void)
31 +#define DCRN_CPC0_PCI_BASE 0xf9
33 + /* Turn on PerWE instead of PCIINT */
34 + mtdcr(DCRN_CPC0_PCI_BASE,
35 + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
37 +#undef DCRN_CPC0_PCI_BASE
40 +static void fixup_cf_card(void)
42 +#define CF_CS0_BASE 0xff100000
43 +#define CF_CS1_BASE 0xff200000
45 + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
46 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
47 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
48 + EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
49 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
50 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
52 + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
53 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
54 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
55 + EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
56 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
57 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
63 +static void magicbox_fixups(void)
65 + ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
66 + ibm4xx_sdram_fixup_memsize();
68 + /* Magicbox v1 has only one ethernet, one serial and no
69 + * CF slot -- detect it using it's fake enet1addr
71 + if ((bd.bi_enet1addr[0] == 0x00) &&
72 + (bd.bi_enet1addr[1] == 0x00) &&
73 + (bd.bi_enet1addr[2] == 0x02) &&
74 + (bd.bi_enet1addr[3] == 0xfa) &&
75 + (bd.bi_enet1addr[4] == 0xf0) &&
76 + (bd.bi_enet1addr[5] == 0x80)) {
79 + devp = finddevice("/plb/opb/ethernet@ef600900");
81 + devp = finddevice("/plb/opb/serial@ef600400");
83 + devp = finddevice("/plb/ebc/cf_card@ff100000");
90 + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
93 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
94 + unsigned long r6, unsigned long r7)
97 + platform_ops.fixups = magicbox_fixups;
98 + platform_ops.exit = ibm40x_dbcr_reset;
99 + fdt_init(_dtb_start);
100 + serial_console_init();
103 +++ b/arch/powerpc/boot/dts/magicbox.dts
106 + * Device Tree Source for Magicbox boards
108 + * Copyright 2008-2009 Imre Kaloz <kaloz@openwrt.org>
109 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
111 + * Based on walnut.dts
113 + * This file is licensed under the terms of the GNU General Public
114 + * License version 2. This program is licensed "as is" without
115 + * any warranty of any kind, whether express or implied.
121 + #address-cells = <1>;
123 + model = "magicbox";
124 + compatible = "magicbox";
125 + dcr-parent = <&{/cpus/cpu@0}>;
128 + ethernet0 = &EMAC0;
129 + ethernet1 = &EMAC1;
135 + #address-cells = <1>;
139 + device_type = "cpu";
140 + model = "PowerPC,405EP";
141 + reg = <0x00000000>;
142 + clock-frequency = <0>; /* Filled in by zImage */
143 + timebase-frequency = <0>; /* Filled in by zImage */
144 + i-cache-line-size = <0x20>;
145 + d-cache-line-size = <0x20>;
146 + i-cache-size = <0x4000>;
147 + d-cache-size = <0x4000>;
149 + dcr-access-method = "native";
154 + device_type = "memory";
155 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
158 + UIC0: interrupt-controller {
159 + compatible = "ibm,uic";
160 + interrupt-controller;
162 + dcr-reg = <0x0c0 0x009>;
163 + #address-cells = <0>;
165 + #interrupt-cells = <2>;
169 + compatible = "ibm,plb3";
170 + #address-cells = <1>;
173 + clock-frequency = <0>; /* Filled in by zImage */
175 + SDRAM0: memory-controller {
176 + compatible = "ibm,sdram-405ep";
177 + dcr-reg = <0x010 0x002>;
181 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
182 + dcr-reg = <0x180 0x062>;
183 + num-tx-chans = <4>;
184 + num-rx-chans = <2>;
185 + interrupt-parent = <&UIC0>;
187 + 0xb 0x4 /* TXEOB */
188 + 0xc 0x4 /* RXEOB */
191 + 0xe 0x4 /* RXDE */>;
195 + compatible = "ibm,opb-405ep", "ibm,opb";
196 + #address-cells = <1>;
198 + ranges = <0xef600000 0xef600000 0x00a00000>;
199 + dcr-reg = <0x0a0 0x005>;
200 + clock-frequency = <0>; /* Filled in by zImage */
202 + UART0: serial@ef600300 {
203 + device_type = "serial";
204 + compatible = "ns16550";
205 + reg = <0xef600300 0x00000008>;
206 + virtual-reg = <0xef600300>;
207 + clock-frequency = <0>; /* Filled in by zImage */
208 + current-speed = <115200>;
209 + interrupt-parent = <&UIC0>;
210 + interrupts = <0x0 0x4>;
213 + UART1: serial@ef600400 {
214 + device_type = "serial";
215 + compatible = "ns16550";
216 + reg = <0xef600400 0x00000008>;
217 + virtual-reg = <0xef600400>;
218 + clock-frequency = <0>; /* Filled in by zImage */
219 + current-speed = <115200>;
220 + interrupt-parent = <&UIC0>;
221 + interrupts = <0x1 0x4>;
224 + IIC: i2c@ef600500 {
225 + compatible = "ibm,iic-405ep", "ibm,iic";
226 + #address-cells = <1>;
228 + reg = <0xef600500 0x00000011>;
229 + interrupt-parent = <&UIC0>;
230 + interrupts = <0x2 0x4>;
233 + compatible = "national,lm75";
238 + compatible = "at24,24c16";
243 + GPIO0: gpio-controller@ef600700 {
244 + compatible = "ibm,ppc4xx-gpio";
245 + reg = <0xef600700 0x00000020>;
250 + EMAC0: ethernet@ef600800 {
251 + linux,network-index = <0x0>;
252 + device_type = "network";
253 + compatible = "ibm,emac-405ep", "ibm,emac";
254 + interrupt-parent = <&UIC0>;
256 + 0xf 0x4 /* Ethernet */
257 + 0x9 0x4 /* Ethernet Wake Up */>;
258 + local-mac-address = [000000000000]; /* Filled in by zImage */
259 + reg = <0xef600800 0x00000070>;
260 + mal-device = <&MAL>;
261 + mal-tx-channel = <0>;
262 + mal-rx-channel = <0>;
264 + max-frame-size = <0x5dc>;
265 + rx-fifo-size = <0x1000>;
266 + tx-fifo-size = <0x800>;
268 + phy-map = <0x00000000>;
271 + EMAC1: ethernet@ef600900 {
272 + linux,network-index = <0x1>;
273 + device_type = "network";
274 + compatible = "ibm,emac-405ep", "ibm,emac";
275 + interrupt-parent = <&UIC0>;
277 + 0x11 0x4 /* Ethernet */
278 + 0x09 0x4 /* Ethernet Wake Up */>;
279 + local-mac-address = [000000000000]; /* Filled in by zImage */
280 + reg = <0xef600900 0x00000070>;
281 + mal-device = <&MAL>;
282 + mal-tx-channel = <2>;
283 + mal-rx-channel = <1>;
285 + max-frame-size = <0x5dc>;
286 + rx-fifo-size = <0x1000>;
287 + tx-fifo-size = <0x800>;
288 + mdio-device = <&EMAC0>;
290 + phy-map = <0x00000001>;
294 + compatible = "gpio-leds";
296 + label = "magicbox:red:user";
297 + gpios = <&GPIO0 2 1>;
303 + compatible = "ibm,ebc-405ep", "ibm,ebc";
304 + dcr-reg = <0x012 0x002>;
305 + #address-cells = <2>;
307 + /* The ranges property is supplied by the bootwrapper
308 + * and is based on the firmware's configuration of the
311 + clock-frequency = <0>; /* Filled in by zImage */
314 + compatible = "magicbox-cf", "pata-magicbox-cf";
315 + reg = <0x00000000 0xff100000 0x00001000
316 + 0x00000000 0xff200000 0x00001000>;
317 + interrupt-parent = <&UIC0>;
318 + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
321 + nor_flash@ffc00000 {
322 + compatible = "cfi-flash";
324 + reg = <0x00000000 0xffc00000 0x00400000>;
325 + #address-cells = <1>;
329 + reg = <0x0 0x140000>;
331 + partition1@120000 {
333 + reg = <0x140000 0x280000>;
335 + partition2@3c0000 {
337 + reg = <0x3c0000 0x30000>;
341 + label = "firmware";
342 + reg = <0x0 0x3c0000>;
347 + PCI0: pci@ec000000 {
348 + device_type = "pci";
349 + #interrupt-cells = <1>;
351 + #address-cells = <3>;
352 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
354 + reg = <0xeec00000 0x00000008 /* Config space access */
355 + 0xeed80000 0x00000004 /* IACK */
356 + 0xeed80000 0x00000004 /* Special cycle */
357 + 0xef480000 0x00000040>; /* Internal registers */
359 + /* Outbound ranges, one memory and one IO,
360 + * later cannot be changed. Chip supports a second
361 + * IO range but we don't use it for now
363 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
364 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
366 + /* Inbound 2GB range starting at 0 */
367 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
369 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
372 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
375 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
378 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
381 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
387 + linux,stdout-path = "/plb/opb/serial@ef600300";
390 --- a/arch/powerpc/boot/Makefile
391 +++ b/arch/powerpc/boot/Makefile
392 @@ -43,6 +43,7 @@ $(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -
393 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
394 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
395 $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
396 +$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
397 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
398 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
400 @@ -76,7 +77,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
401 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
402 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
403 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
404 - cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
405 + cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
407 src-boot := $(src-wlib) $(src-plat) empty.c
409 src-boot := $(addprefix $(obj)/, $(src-boot))
410 @@ -194,6 +196,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
411 image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
412 image-$(CONFIG_WALNUT) += treeImage.walnut
413 image-$(CONFIG_ACADIA) += cuImage.acadia
414 +image-$(CONFIG_MAGICBOX) += cuImage.magicbox
416 # Board ports in arch/powerpc/platform/44x/Kconfig
417 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
418 --- a/arch/powerpc/platforms/40x/Kconfig
419 +++ b/arch/powerpc/platforms/40x/Kconfig
420 @@ -60,6 +60,16 @@ config KILAUEA
422 This option enables support for the AMCC PPC405EX evaluation board.
428 + select PPC40x_SIMPLE
432 + This option enables support for the Magicbox boards.
437 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
438 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
439 @@ -55,7 +55,8 @@ static char *board[] __initdata = {
448 static int __init ppc40x_probe(void)