target/linux/cavium-octeon/patches/001-handle_removal_h_constraint.patch

   1 This is an incomplete proof of concept that I applied to be able to
   2 build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
   3 or the R4000_WAR case.
   4
   5 Comments welcome.
   6
   7 Signed-off-by: David Daney <ddaney@caviumnetworks.com>
   8 ---
   9  arch/mips/include/asm/compiler.h |    7 +++++++
  10  arch/mips/include/asm/delay.h    |    4 ++++
  11  2 files changed, 11 insertions(+), 0 deletions(-)
  12
  13 diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
  14 index 71f5c5c..1f0954d 100644
  15 --- a/arch/mips/include/asm/compiler.h
  16 +++ b/arch/mips/include/asm/compiler.h
  17 @@ -16,4 +16,11 @@
  18  #define GCC_REG_ACCUM "accum"
  19  #endif
  20
  21 +#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
  22 +#define GCC_NO_H_CONSTRAINT
  23 +#ifdef CONFIG_64BIT
  24 +typedef unsigned int uint128_t __attribute__((mode(TI)));
  25 +#endif
  26 +#endif
  27 +
  28  #endif /* _ASM_COMPILER_H */
  29 diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
  30 index b0bccd2..3e467e8 100644
  31 --- a/arch/mips/include/asm/delay.h
  32 +++ b/arch/mips/include/asm/delay.h
  33 @@ -83,10 +83,14 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
  34                 : "r" (usecs), "r" (lpj)
  35                 : GCC_REG_ACCUM);
  36         else if (sizeof(long) == 8 && !R4000_WAR)
  37 +#ifdef GCC_NO_H_CONSTRAINT
  38 +               usecs = ((uint128_t)usecs * lpj) >> 64;
  39 +#else
  40                 __asm__("dmultu\t%2, %3"
  41                 : "=h" (usecs), "=l" (lo)
  42                 : "r" (usecs), "r" (lpj)
  43                 : GCC_REG_ACCUM);
  44 +#endif
  45         else if (sizeof(long) == 8 && R4000_WAR)
  46                 __asm__("dmultu\t%3, %4\n\tmfhi\t%0"
  47                 : "=r" (usecs), "=h" (hi), "=l" (lo)
  48 --
  49 1.5.6.5
  50
  51
  52