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nuke old 2.6.23 code for brcm47xx
[openwrt.git] / package / ath9k / src / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28 static char *dev_info = "ath9k";
29
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
34
35 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42 };
43
44 static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46 {
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55 }
56
57 static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59 {
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92 }
93
94
95 static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99 {
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 }
136
137 static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140 {
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 sc->sc_keytype = hk.kv_type;
210 return 0;
211 }
212
213 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214 {
215 #define ATH_MAX_NUM_KEYS 4
216 int freeslot;
217
218 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
219 ath_key_reset(sc, key->keyidx, freeslot);
220 #undef ATH_MAX_NUM_KEYS
221 }
222
223 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
224 {
225 /* Until mac80211 includes these fields */
226
227 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
228 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
229 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
230
231 ht_info->ht_supported = 1;
232 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
233 |(u16)IEEE80211_HT_CAP_MIMO_PS
234 |(u16)IEEE80211_HT_CAP_SGI_40
235 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
236
237 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
238 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
239 /* setup supported mcs set */
240 memset(ht_info->supp_mcs_set, 0, 16);
241 ht_info->supp_mcs_set[0] = 0xff;
242 ht_info->supp_mcs_set[1] = 0xff;
243 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
244 }
245
246 static int ath_rate2idx(struct ath_softc *sc, int rate)
247 {
248 int i = 0, cur_band, n_rates;
249 struct ieee80211_hw *hw = sc->hw;
250
251 cur_band = hw->conf.channel->band;
252 n_rates = sc->sbands[cur_band].n_bitrates;
253
254 for (i = 0; i < n_rates; i++) {
255 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
256 break;
257 }
258
259 /*
260 * NB:mac80211 validates rx rate index against the supported legacy rate
261 * index only (should be done against ht rates also), return the highest
262 * legacy rate index for rx rate which does not match any one of the
263 * supported basic and extended rates to make mac80211 happy.
264 * The following hack will be cleaned up once the issue with
265 * the rx rate index validation in mac80211 is fixed.
266 */
267 if (i == n_rates)
268 return n_rates - 1;
269 return i;
270 }
271
272 static void ath9k_rx_prepare(struct ath_softc *sc,
273 struct sk_buff *skb,
274 struct ath_recv_status *status,
275 struct ieee80211_rx_status *rx_status)
276 {
277 struct ieee80211_hw *hw = sc->hw;
278 struct ieee80211_channel *curchan = hw->conf.channel;
279
280 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
281
282 rx_status->mactime = status->tsf;
283 rx_status->band = curchan->band;
284 rx_status->freq = curchan->center_freq;
285 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
286 rx_status->signal = rx_status->noise + status->rssi;
287 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
288 rx_status->antenna = status->antenna;
289 rx_status->qual = status->rssi * 100 / 64;
290
291 if (status->flags & ATH_RX_MIC_ERROR)
292 rx_status->flag |= RX_FLAG_MMIC_ERROR;
293 if (status->flags & ATH_RX_FCS_ERROR)
294 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
295
296 rx_status->flag |= RX_FLAG_TSFT;
297 }
298
299 static u8 parse_mpdudensity(u8 mpdudensity)
300 {
301 /*
302 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
303 * 0 for no restriction
304 * 1 for 1/4 us
305 * 2 for 1/2 us
306 * 3 for 1 us
307 * 4 for 2 us
308 * 5 for 4 us
309 * 6 for 8 us
310 * 7 for 16 us
311 */
312 switch (mpdudensity) {
313 case 0:
314 return 0;
315 case 1:
316 case 2:
317 case 3:
318 /* Our lower layer calculations limit our precision to
319 1 microsecond */
320 return 1;
321 case 4:
322 return 2;
323 case 5:
324 return 4;
325 case 6:
326 return 8;
327 case 7:
328 return 16;
329 default:
330 return 0;
331 }
332 }
333
334 static int ath9k_start(struct ieee80211_hw *hw)
335 {
336 struct ath_softc *sc = hw->priv;
337 struct ieee80211_channel *curchan = hw->conf.channel;
338 int error = 0, pos;
339
340 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
341 "initial channel: %d MHz\n", __func__, curchan->center_freq);
342
343 /* setup initial channel */
344
345 pos = ath_get_channel(sc, curchan);
346 if (pos == -1) {
347 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
348 return -EINVAL;
349 }
350
351 sc->sc_ah->ah_channels[pos].chanmode =
352 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
353
354 /* open ath_dev */
355 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
356 if (error) {
357 DPRINTF(sc, ATH_DBG_FATAL,
358 "%s: Unable to complete ath_open\n", __func__);
359 return error;
360 }
361
362 ieee80211_wake_queues(hw);
363 return 0;
364 }
365
366 static int ath9k_tx(struct ieee80211_hw *hw,
367 struct sk_buff *skb)
368 {
369 struct ath_softc *sc = hw->priv;
370 int hdrlen, padsize;
371
372 /* Add the padding after the header if this is not already done */
373 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
374 if (hdrlen & 3) {
375 padsize = hdrlen % 4;
376 if (skb_headroom(skb) < padsize)
377 return -1;
378 skb_push(skb, padsize);
379 memmove(skb->data, skb->data + padsize, hdrlen);
380 }
381
382 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
383 __func__,
384 skb);
385
386 if (ath_tx_start(sc, skb) != 0) {
387 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
388 dev_kfree_skb_any(skb);
389 /* FIXME: Check for proper return value from ATH_DEV */
390 return 0;
391 }
392
393 return 0;
394 }
395
396 static void ath9k_stop(struct ieee80211_hw *hw)
397 {
398 struct ath_softc *sc = hw->priv;
399 int error;
400
401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
402
403 error = ath_suspend(sc);
404 if (error)
405 DPRINTF(sc, ATH_DBG_CONFIG,
406 "%s: Device is no longer present\n", __func__);
407
408 ieee80211_stop_queues(hw);
409 }
410
411 static int ath9k_add_interface(struct ieee80211_hw *hw,
412 struct ieee80211_if_init_conf *conf)
413 {
414 struct ath_softc *sc = hw->priv;
415 int error, ic_opmode = 0;
416
417 /* Support only vap for now */
418
419 if (sc->sc_nvaps)
420 return -ENOBUFS;
421
422 switch (conf->type) {
423 case IEEE80211_IF_TYPE_STA:
424 ic_opmode = ATH9K_M_STA;
425 break;
426 case IEEE80211_IF_TYPE_IBSS:
427 ic_opmode = ATH9K_M_IBSS;
428 break;
429 default:
430 DPRINTF(sc, ATH_DBG_FATAL,
431 "%s: Only STA and IBSS are supported currently\n",
432 __func__);
433 return -EOPNOTSUPP;
434 }
435
436 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
437 __func__,
438 ic_opmode);
439
440 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
441 if (error) {
442 DPRINTF(sc, ATH_DBG_FATAL,
443 "%s: Unable to attach vap, error: %d\n",
444 __func__, error);
445 return error;
446 }
447
448 return 0;
449 }
450
451 static void ath9k_remove_interface(struct ieee80211_hw *hw,
452 struct ieee80211_if_init_conf *conf)
453 {
454 struct ath_softc *sc = hw->priv;
455 struct ath_vap *avp;
456 int error;
457
458 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
459
460 avp = sc->sc_vaps[0];
461 if (avp == NULL) {
462 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
463 __func__);
464 return;
465 }
466
467 #ifdef CONFIG_SLOW_ANT_DIV
468 ath_slow_ant_div_stop(&sc->sc_antdiv);
469 #endif
470
471 /* Update ratectrl */
472 ath_rate_newstate(sc, avp);
473
474 /* Reclaim beacon resources */
475 if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
476 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
477 ath_beacon_return(sc, avp);
478 }
479
480 /* Set interrupt mask */
481 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
482 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
483 sc->sc_beacons = 0;
484
485 error = ath_vap_detach(sc, 0);
486 if (error)
487 DPRINTF(sc, ATH_DBG_FATAL,
488 "%s: Unable to detach vap, error: %d\n",
489 __func__, error);
490 }
491
492 static int ath9k_config(struct ieee80211_hw *hw,
493 struct ieee80211_conf *conf)
494 {
495 struct ath_softc *sc = hw->priv;
496 struct ieee80211_channel *curchan = hw->conf.channel;
497 int pos;
498
499 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
500 __func__,
501 curchan->center_freq);
502
503 pos = ath_get_channel(sc, curchan);
504 if (pos == -1) {
505 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
506 return -EINVAL;
507 }
508
509 sc->sc_ah->ah_channels[pos].chanmode =
510 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
511 sc->sc_config.txpowlimit = 2 * conf->power_level;
512
513 /* set h/w channel */
514 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
515 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
516 __func__);
517
518 return 0;
519 }
520
521 static int ath9k_config_interface(struct ieee80211_hw *hw,
522 struct ieee80211_vif *vif,
523 struct ieee80211_if_conf *conf)
524 {
525 struct ath_softc *sc = hw->priv;
526 struct ath_vap *avp;
527 u32 rfilt = 0;
528 int error, i;
529 DECLARE_MAC_BUF(mac);
530
531 avp = sc->sc_vaps[0];
532 if (avp == NULL) {
533 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
534 __func__);
535 return -EINVAL;
536 }
537
538 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
539 !is_zero_ether_addr(conf->bssid)) {
540 switch (vif->type) {
541 case IEEE80211_IF_TYPE_STA:
542 case IEEE80211_IF_TYPE_IBSS:
543 /* Update ratectrl about the new state */
544 ath_rate_newstate(sc, avp);
545
546 /* Set rx filter */
547 rfilt = ath_calcrxfilter(sc);
548 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
549
550 /* Set BSSID */
551 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
552 sc->sc_curaid = 0;
553 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
554 sc->sc_curaid);
555
556 /* Set aggregation protection mode parameters */
557 sc->sc_config.ath_aggr_prot = 0;
558
559 /*
560 * Reset our TSF so that its value is lower than the
561 * beacon that we are trying to catch.
562 * Only then hw will update its TSF register with the
563 * new beacon. Reset the TSF before setting the BSSID
564 * to avoid allowing in any frames that would update
565 * our TSF only to have us clear it
566 * immediately thereafter.
567 */
568 ath9k_hw_reset_tsf(sc->sc_ah);
569
570 /* Disable BMISS interrupt when we're not associated */
571 ath9k_hw_set_interrupts(sc->sc_ah,
572 sc->sc_imask &
573 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
574 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
575
576 DPRINTF(sc, ATH_DBG_CONFIG,
577 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
578 __func__, rfilt,
579 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
580
581 /* need to reconfigure the beacon */
582 sc->sc_beacons = 0;
583
584 break;
585 default:
586 break;
587 }
588 }
589
590 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
591 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
592 /*
593 * Allocate and setup the beacon frame.
594 *
595 * Stop any previous beacon DMA. This may be
596 * necessary, for example, when an ibss merge
597 * causes reconfiguration; we may be called
598 * with beacon transmission active.
599 */
600 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
601
602 error = ath_beacon_alloc(sc, 0);
603 if (error != 0)
604 return error;
605
606 ath_beacon_sync(sc, 0);
607 }
608
609 /* Check for WLAN_CAPABILITY_PRIVACY ? */
610 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
611 for (i = 0; i < IEEE80211_WEP_NKID; i++)
612 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
613 ath9k_hw_keysetmac(sc->sc_ah,
614 (u16)i,
615 sc->sc_curbssid);
616 }
617
618 /* Only legacy IBSS for now */
619 if (vif->type == IEEE80211_IF_TYPE_IBSS)
620 ath_update_chainmask(sc, 0);
621
622 return 0;
623 }
624
625 #define SUPPORTED_FILTERS \
626 (FIF_PROMISC_IN_BSS | \
627 FIF_ALLMULTI | \
628 FIF_CONTROL | \
629 FIF_OTHER_BSS | \
630 FIF_BCN_PRBRESP_PROMISC | \
631 FIF_FCSFAIL)
632
633 /* Accept unicast, bcast and mcast frames */
634
635 static void ath9k_configure_filter(struct ieee80211_hw *hw,
636 unsigned int changed_flags,
637 unsigned int *total_flags,
638 int mc_count,
639 struct dev_mc_list *mclist)
640 {
641 struct ath_softc *sc = hw->priv;
642
643 changed_flags &= SUPPORTED_FILTERS;
644 *total_flags &= SUPPORTED_FILTERS;
645
646 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
647 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
648 ath_scan_start(sc);
649 else
650 ath_scan_end(sc);
651 }
652 }
653
654 static void ath9k_sta_notify(struct ieee80211_hw *hw,
655 struct ieee80211_vif *vif,
656 enum sta_notify_cmd cmd,
657 const u8 *addr)
658 {
659 struct ath_softc *sc = hw->priv;
660 struct ath_node *an;
661 unsigned long flags;
662 DECLARE_MAC_BUF(mac);
663
664 spin_lock_irqsave(&sc->node_lock, flags);
665 an = ath_node_find(sc, (u8 *) addr);
666 spin_unlock_irqrestore(&sc->node_lock, flags);
667
668 switch (cmd) {
669 case STA_NOTIFY_ADD:
670 spin_lock_irqsave(&sc->node_lock, flags);
671 if (!an) {
672 ath_node_attach(sc, (u8 *)addr, 0);
673 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
674 __func__,
675 print_mac(mac, addr));
676 } else {
677 ath_node_get(sc, (u8 *)addr);
678 }
679 spin_unlock_irqrestore(&sc->node_lock, flags);
680 break;
681 case STA_NOTIFY_REMOVE:
682 if (!an)
683 DPRINTF(sc, ATH_DBG_FATAL,
684 "%s: Removal of a non-existent node\n",
685 __func__);
686 else {
687 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
688 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
689 __func__,
690 print_mac(mac, addr));
691 }
692 break;
693 default:
694 break;
695 }
696 }
697
698 static int ath9k_conf_tx(struct ieee80211_hw *hw,
699 u16 queue,
700 const struct ieee80211_tx_queue_params *params)
701 {
702 struct ath_softc *sc = hw->priv;
703 struct ath9k_txq_info qi;
704 int ret = 0, qnum;
705
706 if (queue >= WME_NUM_AC)
707 return 0;
708
709 qi.tqi_aifs = params->aifs;
710 qi.tqi_cwmin = params->cw_min;
711 qi.tqi_cwmax = params->cw_max;
712 qi.tqi_burstTime = params->txop;
713 qnum = ath_get_hal_qnum(queue, sc);
714
715 DPRINTF(sc, ATH_DBG_CONFIG,
716 "%s: Configure tx [queue/halq] [%d/%d], "
717 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
718 __func__,
719 queue,
720 qnum,
721 params->aifs,
722 params->cw_min,
723 params->cw_max,
724 params->txop);
725
726 ret = ath_txq_update(sc, qnum, &qi);
727 if (ret)
728 DPRINTF(sc, ATH_DBG_FATAL,
729 "%s: TXQ Update failed\n", __func__);
730
731 return ret;
732 }
733
734 static int ath9k_set_key(struct ieee80211_hw *hw,
735 enum set_key_cmd cmd,
736 const u8 *local_addr,
737 const u8 *addr,
738 struct ieee80211_key_conf *key)
739 {
740 struct ath_softc *sc = hw->priv;
741 int ret = 0;
742
743 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
744
745 switch (cmd) {
746 case SET_KEY:
747 ret = ath_key_config(sc, addr, key);
748 if (!ret) {
749 set_bit(key->keyidx, sc->sc_keymap);
750 key->hw_key_idx = key->keyidx;
751 /* push IV and Michael MIC generation to stack */
752 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
753 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
754 }
755 break;
756 case DISABLE_KEY:
757 ath_key_delete(sc, key);
758 clear_bit(key->keyidx, sc->sc_keymap);
759 sc->sc_keytype = ATH9K_CIPHER_CLR;
760 break;
761 default:
762 ret = -EINVAL;
763 }
764
765 return ret;
766 }
767
768 static void ath9k_ht_conf(struct ath_softc *sc,
769 struct ieee80211_bss_conf *bss_conf)
770 {
771 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
772 struct ath_ht_info *ht_info = &sc->sc_ht_info;
773
774 if (bss_conf->assoc_ht) {
775 ht_info->ext_chan_offset =
776 bss_conf->ht_bss_conf->bss_cap &
777 IEEE80211_HT_IE_CHA_SEC_OFFSET;
778
779 if (!(bss_conf->ht_conf->cap &
780 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
781 (bss_conf->ht_bss_conf->bss_cap &
782 IEEE80211_HT_IE_CHA_WIDTH))
783 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
784 else
785 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
786
787 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
788 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
789 bss_conf->ht_conf->ampdu_factor);
790 ht_info->mpdudensity =
791 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
792
793 }
794
795 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
796 }
797
798 static void ath9k_bss_assoc_info(struct ath_softc *sc,
799 struct ieee80211_bss_conf *bss_conf)
800 {
801 struct ieee80211_hw *hw = sc->hw;
802 struct ieee80211_channel *curchan = hw->conf.channel;
803 struct ath_vap *avp;
804 int pos;
805 DECLARE_MAC_BUF(mac);
806
807 if (bss_conf->assoc) {
808 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
809 __func__,
810 bss_conf->aid);
811
812 avp = sc->sc_vaps[0];
813 if (avp == NULL) {
814 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
815 __func__);
816 return;
817 }
818
819 /* New association, store aid */
820 if (avp->av_opmode == ATH9K_M_STA) {
821 sc->sc_curaid = bss_conf->aid;
822 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
823 sc->sc_curaid);
824 }
825
826 /* Configure the beacon */
827 ath_beacon_config(sc, 0);
828 sc->sc_beacons = 1;
829
830 /* Reset rssi stats */
831 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
832 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
833 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
834 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
835
836 /* Update chainmask */
837 ath_update_chainmask(sc, bss_conf->assoc_ht);
838
839 DPRINTF(sc, ATH_DBG_CONFIG,
840 "%s: bssid %s aid 0x%x\n",
841 __func__,
842 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
843
844 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
845 __func__,
846 curchan->center_freq);
847
848 pos = ath_get_channel(sc, curchan);
849 if (pos == -1) {
850 DPRINTF(sc, ATH_DBG_FATAL,
851 "%s: Invalid channel\n", __func__);
852 return;
853 }
854
855 if (hw->conf.ht_conf.ht_supported)
856 sc->sc_ah->ah_channels[pos].chanmode =
857 ath_get_extchanmode(sc, curchan);
858 else
859 sc->sc_ah->ah_channels[pos].chanmode =
860 (curchan->band == IEEE80211_BAND_2GHZ) ?
861 CHANNEL_G : CHANNEL_A;
862
863 /* set h/w channel */
864 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
865 DPRINTF(sc, ATH_DBG_FATAL,
866 "%s: Unable to set channel\n",
867 __func__);
868
869 ath_rate_newstate(sc, avp);
870 /* Update ratectrl about the new state */
871 ath_rc_node_update(hw, avp->rc_node);
872 } else {
873 DPRINTF(sc, ATH_DBG_CONFIG,
874 "%s: Bss Info DISSOC\n", __func__);
875 sc->sc_curaid = 0;
876 }
877 }
878
879 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
880 struct ieee80211_vif *vif,
881 struct ieee80211_bss_conf *bss_conf,
882 u32 changed)
883 {
884 struct ath_softc *sc = hw->priv;
885
886 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
887 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
888 __func__,
889 bss_conf->use_short_preamble);
890 if (bss_conf->use_short_preamble)
891 sc->sc_flags |= ATH_PREAMBLE_SHORT;
892 else
893 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
894 }
895
896 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
897 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
898 __func__,
899 bss_conf->use_cts_prot);
900 if (bss_conf->use_cts_prot &&
901 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
902 sc->sc_flags |= ATH_PROTECT_ENABLE;
903 else
904 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
905 }
906
907 if (changed & BSS_CHANGED_HT) {
908 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
909 __func__,
910 bss_conf->assoc_ht);
911 ath9k_ht_conf(sc, bss_conf);
912 }
913
914 if (changed & BSS_CHANGED_ASSOC) {
915 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
916 __func__,
917 bss_conf->assoc);
918 ath9k_bss_assoc_info(sc, bss_conf);
919 }
920 }
921
922 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
923 {
924 u64 tsf;
925 struct ath_softc *sc = hw->priv;
926 struct ath_hal *ah = sc->sc_ah;
927
928 tsf = ath9k_hw_gettsf64(ah);
929
930 return tsf;
931 }
932
933 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
934 {
935 struct ath_softc *sc = hw->priv;
936 struct ath_hal *ah = sc->sc_ah;
937
938 ath9k_hw_reset_tsf(ah);
939 }
940
941 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
942 enum ieee80211_ampdu_mlme_action action,
943 const u8 *addr,
944 u16 tid,
945 u16 *ssn)
946 {
947 struct ath_softc *sc = hw->priv;
948 int ret = 0;
949
950 switch (action) {
951 case IEEE80211_AMPDU_RX_START:
952 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
953 if (ret < 0)
954 DPRINTF(sc, ATH_DBG_FATAL,
955 "%s: Unable to start RX aggregation\n",
956 __func__);
957 break;
958 case IEEE80211_AMPDU_RX_STOP:
959 ret = ath_rx_aggr_stop(sc, addr, tid);
960 if (ret < 0)
961 DPRINTF(sc, ATH_DBG_FATAL,
962 "%s: Unable to stop RX aggregation\n",
963 __func__);
964 break;
965 case IEEE80211_AMPDU_TX_START:
966 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
967 if (ret < 0)
968 DPRINTF(sc, ATH_DBG_FATAL,
969 "%s: Unable to start TX aggregation\n",
970 __func__);
971 else
972 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
973 break;
974 case IEEE80211_AMPDU_TX_STOP:
975 ret = ath_tx_aggr_stop(sc, addr, tid);
976 if (ret < 0)
977 DPRINTF(sc, ATH_DBG_FATAL,
978 "%s: Unable to stop TX aggregation\n",
979 __func__);
980
981 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
982 break;
983 default:
984 DPRINTF(sc, ATH_DBG_FATAL,
985 "%s: Unknown AMPDU action\n", __func__);
986 }
987
988 return ret;
989 }
990
991 static struct ieee80211_ops ath9k_ops = {
992 .tx = ath9k_tx,
993 .start = ath9k_start,
994 .stop = ath9k_stop,
995 .add_interface = ath9k_add_interface,
996 .remove_interface = ath9k_remove_interface,
997 .config = ath9k_config,
998 .config_interface = ath9k_config_interface,
999 .configure_filter = ath9k_configure_filter,
1000 .get_stats = NULL,
1001 .sta_notify = ath9k_sta_notify,
1002 .conf_tx = ath9k_conf_tx,
1003 .get_tx_stats = NULL,
1004 .bss_info_changed = ath9k_bss_info_changed,
1005 .set_tim = NULL,
1006 .set_key = ath9k_set_key,
1007 .hw_scan = NULL,
1008 .get_tkip_seq = NULL,
1009 .set_rts_threshold = NULL,
1010 .set_frag_threshold = NULL,
1011 .set_retry_limit = NULL,
1012 .get_tsf = ath9k_get_tsf,
1013 .reset_tsf = ath9k_reset_tsf,
1014 .tx_last_beacon = NULL,
1015 .ampdu_action = ath9k_ampdu_action
1016 };
1017
1018 void ath_get_beaconconfig(struct ath_softc *sc,
1019 int if_id,
1020 struct ath_beacon_config *conf)
1021 {
1022 struct ieee80211_hw *hw = sc->hw;
1023
1024 /* fill in beacon config data */
1025
1026 conf->beacon_interval = hw->conf.beacon_int;
1027 conf->listen_interval = 100;
1028 conf->dtim_count = 1;
1029 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1030 }
1031
1032 int ath_update_beacon(struct ath_softc *sc,
1033 int if_id,
1034 struct ath_beacon_offset *bo,
1035 struct sk_buff *skb,
1036 int mcast)
1037 {
1038 return 0;
1039 }
1040
1041 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1042 struct ath_xmit_status *tx_status, struct ath_node *an)
1043 {
1044 struct ieee80211_hw *hw = sc->hw;
1045 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1046
1047 DPRINTF(sc, ATH_DBG_XMIT,
1048 "%s: TX complete: skb: %p\n", __func__, skb);
1049
1050 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1051 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1052 /* free driver's private data area of tx_info */
1053 if (tx_info->driver_data[0] != NULL)
1054 kfree(tx_info->driver_data[0]);
1055 tx_info->driver_data[0] = NULL;
1056 }
1057
1058 if (tx_status->flags & ATH_TX_BAR) {
1059 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1060 tx_status->flags &= ~ATH_TX_BAR;
1061 }
1062 if (tx_status->flags)
1063 tx_info->status.excessive_retries = 1;
1064
1065 tx_info->status.retry_count = tx_status->retries;
1066
1067 ieee80211_tx_status(hw, skb);
1068 if (an)
1069 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1070 }
1071
1072 int ath__rx_indicate(struct ath_softc *sc,
1073 struct sk_buff *skb,
1074 struct ath_recv_status *status,
1075 u16 keyix)
1076 {
1077 struct ieee80211_hw *hw = sc->hw;
1078 struct ath_node *an = NULL;
1079 struct ieee80211_rx_status rx_status;
1080 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1081 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1082 int padsize;
1083 enum ATH_RX_TYPE st;
1084
1085 /* see if any padding is done by the hw and remove it */
1086 if (hdrlen & 3) {
1087 padsize = hdrlen % 4;
1088 memmove(skb->data + padsize, skb->data, hdrlen);
1089 skb_pull(skb, padsize);
1090 }
1091
1092 /* remove FCS before passing up to protocol stack */
1093 skb_trim(skb, (skb->len - FCS_LEN));
1094
1095 /* Prepare rx status */
1096 ath9k_rx_prepare(sc, skb, status, &rx_status);
1097
1098 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1099 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1100 rx_status.flag |= RX_FLAG_DECRYPTED;
1101 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1102 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1103 && skb->len >= hdrlen + 4) {
1104 keyix = skb->data[hdrlen + 3] >> 6;
1105
1106 if (test_bit(keyix, sc->sc_keymap))
1107 rx_status.flag |= RX_FLAG_DECRYPTED;
1108 }
1109
1110 spin_lock_bh(&sc->node_lock);
1111 an = ath_node_find(sc, hdr->addr2);
1112 spin_unlock_bh(&sc->node_lock);
1113
1114 if (an) {
1115 ath_rx_input(sc, an,
1116 hw->conf.ht_conf.ht_supported,
1117 skb, status, &st);
1118 }
1119 if (!an || (st != ATH_RX_CONSUMED))
1120 __ieee80211_rx(hw, skb, &rx_status);
1121
1122 return 0;
1123 }
1124
1125 int ath_rx_subframe(struct ath_node *an,
1126 struct sk_buff *skb,
1127 struct ath_recv_status *status)
1128 {
1129 struct ath_softc *sc = an->an_sc;
1130 struct ieee80211_hw *hw = sc->hw;
1131 struct ieee80211_rx_status rx_status;
1132
1133 /* Prepare rx status */
1134 ath9k_rx_prepare(sc, skb, status, &rx_status);
1135 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1136 rx_status.flag |= RX_FLAG_DECRYPTED;
1137
1138 __ieee80211_rx(hw, skb, &rx_status);
1139
1140 return 0;
1141 }
1142
1143 enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1144 {
1145 return sc->sc_ht_info.tx_chan_width;
1146 }
1147
1148 void ath_setup_rate(struct ath_softc *sc,
1149 enum wireless_mode wMode,
1150 enum RATE_TYPE type,
1151 const struct ath9k_rate_table *rt)
1152 {
1153 int i, maxrates, a = 0, b = 0;
1154 struct ieee80211_supported_band *band_2ghz;
1155 struct ieee80211_supported_band *band_5ghz;
1156 struct ieee80211_rate *rates_2ghz;
1157 struct ieee80211_rate *rates_5ghz;
1158
1159 if ((wMode >= WIRELESS_MODE_MAX) || (type != NORMAL_RATE))
1160 return;
1161
1162 band_2ghz = &sc->sbands[IEEE80211_BAND_2GHZ];
1163 band_5ghz = &sc->sbands[IEEE80211_BAND_5GHZ];
1164 rates_2ghz = sc->rates[IEEE80211_BAND_2GHZ];
1165 rates_5ghz = sc->rates[IEEE80211_BAND_5GHZ];
1166
1167 if (rt->rateCount > ATH_RATE_MAX)
1168 maxrates = ATH_RATE_MAX;
1169 else
1170 maxrates = rt->rateCount;
1171
1172 if ((band_2ghz->n_bitrates != 0) && (band_5ghz->n_bitrates != 0)) {
1173 DPRINTF(sc, ATH_DBG_CONFIG,
1174 "%s: Rates already setup\n", __func__);
1175 return;
1176 }
1177
1178 for (i = 0; i < maxrates; i++) {
1179 switch (wMode) {
1180 case WIRELESS_MODE_11b:
1181 case WIRELESS_MODE_11g:
1182 rates_2ghz[a].bitrate = rt->info[i].rateKbps / 100;
1183 rates_2ghz[a].hw_value = rt->info[i].rateCode;
1184 a++;
1185 band_2ghz->n_bitrates = a;
1186 break;
1187 case WIRELESS_MODE_11a:
1188 rates_5ghz[b].bitrate = rt->info[i].rateKbps / 100;
1189 rates_5ghz[b].hw_value = rt->info[i].rateCode;
1190 b++;
1191 band_5ghz->n_bitrates = b;
1192 break;
1193 default:
1194 break;
1195 }
1196 }
1197
1198 if (band_2ghz->n_bitrates) {
1199 for (i = 0; i < band_2ghz->n_bitrates; i++) {
1200 DPRINTF(sc, ATH_DBG_CONFIG,
1201 "%s: 2GHz Rate: %2dMbps, ratecode: %2d\n",
1202 __func__,
1203 rates_2ghz[i].bitrate / 10,
1204 rates_2ghz[i].hw_value);
1205 }
1206 } else if (band_5ghz->n_bitrates) {
1207 for (i = 0; i < band_5ghz->n_bitrates; i++) {
1208 DPRINTF(sc, ATH_DBG_CONFIG,
1209 "%s: 5Ghz Rate: %2dMbps, ratecode: %2d\n",
1210 __func__,
1211 rates_5ghz[i].bitrate / 10,
1212 rates_5ghz[i].hw_value);
1213 }
1214 }
1215 }
1216
1217 static int ath_detach(struct ath_softc *sc)
1218 {
1219 struct ieee80211_hw *hw = sc->hw;
1220
1221 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1222
1223 /* Unregister hw */
1224
1225 ieee80211_unregister_hw(hw);
1226
1227 /* unregister Rate control */
1228 ath_rate_control_unregister();
1229
1230 /* tx/rx cleanup */
1231
1232 ath_rx_cleanup(sc);
1233 ath_tx_cleanup(sc);
1234
1235 /* Deinit */
1236
1237 ath_deinit(sc);
1238
1239 return 0;
1240 }
1241
1242 static int ath_attach(u16 devid,
1243 struct ath_softc *sc)
1244 {
1245 struct ieee80211_hw *hw = sc->hw;
1246 int error = 0;
1247
1248 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1249
1250 error = ath_init(devid, sc);
1251 if (error != 0)
1252 return error;
1253
1254 /* Init nodes */
1255
1256 INIT_LIST_HEAD(&sc->node_list);
1257 spin_lock_init(&sc->node_lock);
1258
1259 /* get mac address from hardware and set in mac80211 */
1260
1261 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1262
1263 /* setup channels and rates */
1264
1265 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1266 sc->channels[IEEE80211_BAND_2GHZ];
1267 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1268 sc->rates[IEEE80211_BAND_2GHZ];
1269 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1270
1271 if (sc->sc_ah->ah_caps.halHTSupport)
1272 /* Setup HT capabilities for 2.4Ghz*/
1273 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1274
1275 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1276 &sc->sbands[IEEE80211_BAND_2GHZ];
1277
1278 if (sc->sc_ah->ah_caps.halWirelessModes & ATH9K_MODE_SEL_11A) {
1279 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1280 sc->channels[IEEE80211_BAND_5GHZ];
1281 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1282 sc->rates[IEEE80211_BAND_5GHZ];
1283 sc->sbands[IEEE80211_BAND_5GHZ].band =
1284 IEEE80211_BAND_5GHZ;
1285
1286 if (sc->sc_ah->ah_caps.halHTSupport)
1287 /* Setup HT capabilities for 5Ghz*/
1288 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1289
1290 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1291 &sc->sbands[IEEE80211_BAND_5GHZ];
1292 }
1293
1294 /* FIXME: Have to figure out proper hw init values later */
1295
1296 hw->queues = 4;
1297 hw->ampdu_queues = 1;
1298
1299 /* Register rate control */
1300 hw->rate_control_algorithm = "ath9k_rate_control";
1301 error = ath_rate_control_register();
1302 if (error != 0) {
1303 DPRINTF(sc, ATH_DBG_FATAL,
1304 "%s: Unable to register rate control "
1305 "algorithm:%d\n", __func__, error);
1306 ath_rate_control_unregister();
1307 goto bad;
1308 }
1309
1310 error = ieee80211_register_hw(hw);
1311 if (error != 0) {
1312 ath_rate_control_unregister();
1313 goto bad;
1314 }
1315
1316 /* initialize tx/rx engine */
1317
1318 error = ath_tx_init(sc, ATH_TXBUF);
1319 if (error != 0)
1320 goto bad1;
1321
1322 error = ath_rx_init(sc, ATH_RXBUF);
1323 if (error != 0)
1324 goto bad1;
1325
1326 return 0;
1327 bad1:
1328 ath_detach(sc);
1329 bad:
1330 return error;
1331 }
1332
1333 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1334 {
1335 void __iomem *mem;
1336 struct ath_softc *sc;
1337 struct ieee80211_hw *hw;
1338 const char *athname;
1339 u8 csz;
1340 u32 val;
1341 int ret = 0;
1342
1343 if (pci_enable_device(pdev))
1344 return -EIO;
1345
1346 /* XXX 32-bit addressing only */
1347 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1348 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1349 ret = -ENODEV;
1350 goto bad;
1351 }
1352
1353 /*
1354 * Cache line size is used to size and align various
1355 * structures used to communicate with the hardware.
1356 */
1357 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1358 if (csz == 0) {
1359 /*
1360 * Linux 2.4.18 (at least) writes the cache line size
1361 * register as a 16-bit wide register which is wrong.
1362 * We must have this setup properly for rx buffer
1363 * DMA to work so force a reasonable value here if it
1364 * comes up zero.
1365 */
1366 csz = L1_CACHE_BYTES / sizeof(u32);
1367 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1368 }
1369 /*
1370 * The default setting of latency timer yields poor results,
1371 * set it to the value used by other systems. It may be worth
1372 * tweaking this setting more.
1373 */
1374 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1375
1376 pci_set_master(pdev);
1377
1378 /*
1379 * Disable the RETRY_TIMEOUT register (0x41) to keep
1380 * PCI Tx retries from interfering with C3 CPU state.
1381 */
1382 pci_read_config_dword(pdev, 0x40, &val);
1383 if ((val & 0x0000ff00) != 0)
1384 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1385
1386 ret = pci_request_region(pdev, 0, "ath9k");
1387 if (ret) {
1388 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1389 ret = -ENODEV;
1390 goto bad;
1391 }
1392
1393 mem = pci_iomap(pdev, 0, 0);
1394 if (!mem) {
1395 printk(KERN_ERR "PCI memory map error\n") ;
1396 ret = -EIO;
1397 goto bad1;
1398 }
1399
1400 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1401 if (hw == NULL) {
1402 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1403 goto bad2;
1404 }
1405
1406 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1407 IEEE80211_HW_NOISE_DBM;
1408
1409 SET_IEEE80211_DEV(hw, &pdev->dev);
1410 pci_set_drvdata(pdev, hw);
1411
1412 sc = hw->priv;
1413 sc->hw = hw;
1414 sc->pdev = pdev;
1415 sc->mem = mem;
1416
1417 if (ath_attach(id->device, sc) != 0) {
1418 ret = -ENODEV;
1419 goto bad3;
1420 }
1421
1422 /* setup interrupt service routine */
1423
1424 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1425 printk(KERN_ERR "%s: request_irq failed\n",
1426 wiphy_name(hw->wiphy));
1427 ret = -EIO;
1428 goto bad4;
1429 }
1430
1431 athname = ath9k_hw_probe(id->vendor, id->device);
1432
1433 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1434 wiphy_name(hw->wiphy),
1435 athname ? athname : "Atheros ???",
1436 (unsigned long)mem, pdev->irq);
1437
1438 return 0;
1439 bad4:
1440 ath_detach(sc);
1441 bad3:
1442 ieee80211_free_hw(hw);
1443 bad2:
1444 pci_iounmap(pdev, mem);
1445 bad1:
1446 pci_release_region(pdev, 0);
1447 bad:
1448 pci_disable_device(pdev);
1449 return ret;
1450 }
1451
1452 static void ath_pci_remove(struct pci_dev *pdev)
1453 {
1454 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1455 struct ath_softc *sc = hw->priv;
1456
1457 if (pdev->irq)
1458 free_irq(pdev->irq, sc);
1459 ath_detach(sc);
1460 pci_iounmap(pdev, sc->mem);
1461 pci_release_region(pdev, 0);
1462 pci_disable_device(pdev);
1463 ieee80211_free_hw(hw);
1464 }
1465
1466 #ifdef CONFIG_PM
1467
1468 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1469 {
1470 pci_save_state(pdev);
1471 pci_disable_device(pdev);
1472 pci_set_power_state(pdev, 3);
1473
1474 return 0;
1475 }
1476
1477 static int ath_pci_resume(struct pci_dev *pdev)
1478 {
1479 u32 val;
1480 int err;
1481
1482 err = pci_enable_device(pdev);
1483 if (err)
1484 return err;
1485 pci_restore_state(pdev);
1486 /*
1487 * Suspend/Resume resets the PCI configuration space, so we have to
1488 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1489 * PCI Tx retries from interfering with C3 CPU state
1490 */
1491 pci_read_config_dword(pdev, 0x40, &val);
1492 if ((val & 0x0000ff00) != 0)
1493 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1494
1495 return 0;
1496 }
1497
1498 #endif /* CONFIG_PM */
1499
1500 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1501
1502 static struct pci_driver ath_pci_driver = {
1503 .name = "ath9k",
1504 .id_table = ath_pci_id_table,
1505 .probe = ath_pci_probe,
1506 .remove = ath_pci_remove,
1507 #ifdef CONFIG_PM
1508 .suspend = ath_pci_suspend,
1509 .resume = ath_pci_resume,
1510 #endif /* CONFIG_PM */
1511 };
1512
1513 static int __init init_ath_pci(void)
1514 {
1515 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1516
1517 if (pci_register_driver(&ath_pci_driver) < 0) {
1518 printk(KERN_ERR
1519 "ath_pci: No devices found, driver not installed.\n");
1520 pci_unregister_driver(&ath_pci_driver);
1521 return -ENODEV;
1522 }
1523
1524 return 0;
1525 }
1526 module_init(init_ath_pci);
1527
1528 static void __exit exit_ath_pci(void)
1529 {
1530 pci_unregister_driver(&ath_pci_driver);
1531 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1532 }
1533 module_exit(exit_ath_pci);
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